Re: [PATCH 2/3] net: hns: add Hisilicon RoCE support

2016-03-19 Thread oulijun 
On 2016/3/14 14:49, Leon Romanovsky wrote:
> On Mon, Mar 14, 2016 at 09:12:28AM +0800, Yankejian (Hackim Yim) wrote:
>>
>>
>> On 2016/3/12 18:43, Leon Romanovsky wrote:
>>> On Fri, Mar 11, 2016 at 06:37:10PM +0800, Lijun Ou wrote:
 It added hns_dsaf_roce_reset routine for roce driver.
 RoCE is a feature of hns.
 In hip06 SOC, in roce reset process, it's needed to configure
 dsaf channel reset,port and sl map info.

 Signed-off-by: Lijun Ou 
 Signed-off-by: Wei Hu(Xavier) 
 Signed-off-by: Lisheng 
 ---
  drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c | 84 
 ++
  drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h | 14 
  drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c | 62 +---
  drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h  | 13 
  4 files changed, 163 insertions(+), 10 deletions(-)

 diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c 
 b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
 index 38fc5be..a0f0d4f 100644
 --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
 +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
 @@ -12,6 +12,7 @@
  #include 
  #include 
  #include 
 +#include 
  #include 
  #include 
  #include 
 @@ -2593,6 +2594,89 @@ static struct platform_driver g_dsaf_driver = {
  
  module_platform_driver(g_dsaf_driver);
  
 +/**
 + * hns_dsaf_roce_reset - reset dsaf and roce
 + * @dsaf_fwnode: Pointer to framework node for the dasf
 + * @val: 0 - request reset , 1 - drop reset
 + * retuen 0 - success , negative --fail
 + */
 +int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, u32 val)
 +{
 +  struct dsaf_device *dsaf_dev;
 +  struct platform_device *pdev;
 +  unsigned int mp;
 +  unsigned int sl;
 +  unsigned int credit;
 +  int i;
 +  const u32 port_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE] = {
 +  {0, 0, 0},
 +  {1, 0, 0},
 +  {2, 1, 0},
 +  {3, 1, 0},
 +  {4, 2, 1},
 +  {4, 2, 1},
 +  {5, 3, 1},
 +  {5, 3, 1},
 +  };
 +  const u32 sl_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE] = {
 +  {0, 0, 0},
 +  {0, 1, 1},
 +  {0, 0, 2},
 +  {0, 1, 3},
 +  {0, 0, 0},
 +  {1, 1, 1},
 +  {0, 0, 2},
 +  {1, 1, 3},
 +  };
>>> Do you have a plan to send a version with enums/defines for this
>>> numbers? Especially for _CHAN_MODE.
>>>
>>> .
>>
>> Hi leon,
>>
>> it seems the enums is added in hns_dsaf_main.h, as belows:
>>
>> diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h 
>> b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
>> index 5fea226..c917b9a 100644
>> --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
>> +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
>> @@ -40,6 +40,16 @@ struct hns_mac_cb;
>>  #define DSAF_DUMP_REGS_NUM 504
>>  #define DSAF_STATIC_NUM 28
>>  
>> +#define DSAF_ROCE_CREDIT_CHN 8
>> +#define DSAF_ROCE_CHAN_MODE 3
>> +
>> +enum dsaf_roce_port_port_mode {
>> +DSAF_ROCE_6PORT_MODE,
>> +DSAF_ROCE_4PORT_MODE,
>> +DSAF_ROCE_2PORT_MODE,
>> +DSAF_ROCE_CHAN_MODE_NUM
>> +};
>> +
> 
> These defines are used as an index entry into si_map and port_map arrays
> and seems as not related to the actual data.
> 
> I suggest you to take this code back to drawing table, redesign it,
> clean unused functions and defines and resubmit it.
> 
> Thanks.
>

Hi Leon Romanovsky

   I have redesigned the port_map and sl_map structures. Please refer to the
hns_dsaf_main.c and hns_dsaf_main.h.

thanks
Lijun Ou

>>
>> MBR, Kejian
>>
>>
>>
>>
>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-rdma" in
>> the body of a message to majord...@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> .
>

Re: [PATCH 2/3] net: hns: add Hisilicon RoCE support

2016-03-13 Thread Leon Romanovsky 
On Mon, Mar 14, 2016 at 09:12:28AM +0800, Yankejian (Hackim Yim) wrote:
> 
> 
> On 2016/3/12 18:43, Leon Romanovsky wrote:
> > On Fri, Mar 11, 2016 at 06:37:10PM +0800, Lijun Ou wrote:
> >> It added hns_dsaf_roce_reset routine for roce driver.
> >> RoCE is a feature of hns.
> >> In hip06 SOC, in roce reset process, it's needed to configure
> >> dsaf channel reset,port and sl map info.
> >>
> >> Signed-off-by: Lijun Ou 
> >> Signed-off-by: Wei Hu(Xavier) 
> >> Signed-off-by: Lisheng 
> >> ---
> >>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c | 84 
> >> ++
> >>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h | 14 
> >>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c | 62 +---
> >>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h  | 13 
> >>  4 files changed, 163 insertions(+), 10 deletions(-)
> >>
> >> diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c 
> >> b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
> >> index 38fc5be..a0f0d4f 100644
> >> --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
> >> +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
> >> @@ -12,6 +12,7 @@
> >>  #include 
> >>  #include 
> >>  #include 
> >> +#include 
> >>  #include 
> >>  #include 
> >>  #include 
> >> @@ -2593,6 +2594,89 @@ static struct platform_driver g_dsaf_driver = {
> >>  
> >>  module_platform_driver(g_dsaf_driver);
> >>  
> >> +/**
> >> + * hns_dsaf_roce_reset - reset dsaf and roce
> >> + * @dsaf_fwnode: Pointer to framework node for the dasf
> >> + * @val: 0 - request reset , 1 - drop reset
> >> + * retuen 0 - success , negative --fail
> >> + */
> >> +int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, u32 val)
> >> +{
> >> +  struct dsaf_device *dsaf_dev;
> >> +  struct platform_device *pdev;
> >> +  unsigned int mp;
> >> +  unsigned int sl;
> >> +  unsigned int credit;
> >> +  int i;
> >> +  const u32 port_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE] = {
> >> +  {0, 0, 0},
> >> +  {1, 0, 0},
> >> +  {2, 1, 0},
> >> +  {3, 1, 0},
> >> +  {4, 2, 1},
> >> +  {4, 2, 1},
> >> +  {5, 3, 1},
> >> +  {5, 3, 1},
> >> +  };
> >> +  const u32 sl_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE] = {
> >> +  {0, 0, 0},
> >> +  {0, 1, 1},
> >> +  {0, 0, 2},
> >> +  {0, 1, 3},
> >> +  {0, 0, 0},
> >> +  {1, 1, 1},
> >> +  {0, 0, 2},
> >> +  {1, 1, 3},
> >> +  };
> > Do you have a plan to send a version with enums/defines for this
> > numbers? Especially for _CHAN_MODE.
> >
> > .
> 
> Hi leon,
> 
> it seems the enums is added in hns_dsaf_main.h, as belows:
> 
> diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h 
> b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
> index 5fea226..c917b9a 100644
> --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
> +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
> @@ -40,6 +40,16 @@ struct hns_mac_cb;
>  #define DSAF_DUMP_REGS_NUM 504
>  #define DSAF_STATIC_NUM 28
>  
> +#define DSAF_ROCE_CREDIT_CHN 8
> +#define DSAF_ROCE_CHAN_MODE 3
> +
> +enum dsaf_roce_port_port_mode {
> + DSAF_ROCE_6PORT_MODE,
> + DSAF_ROCE_4PORT_MODE,
> + DSAF_ROCE_2PORT_MODE,
> + DSAF_ROCE_CHAN_MODE_NUM
> +};
> +

These defines are used as an index entry into si_map and port_map arrays
and seems as not related to the actual data.

I suggest you to take this code back to drawing table, redesign it,
clean unused functions and defines and resubmit it.

Thanks.

> 
> MBR, Kejian
> 
> 
> 
> 
> 
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-rdma" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 2/3] net: hns: add Hisilicon RoCE support

2016-03-13 Thread Yankejian (Hackim Yim) 


On 2016/3/12 18:43, Leon Romanovsky wrote:
> On Fri, Mar 11, 2016 at 06:37:10PM +0800, Lijun Ou wrote:
>> It added hns_dsaf_roce_reset routine for roce driver.
>> RoCE is a feature of hns.
>> In hip06 SOC, in roce reset process, it's needed to configure
>> dsaf channel reset,port and sl map info.
>>
>> Signed-off-by: Lijun Ou 
>> Signed-off-by: Wei Hu(Xavier) 
>> Signed-off-by: Lisheng 
>> ---
>>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c | 84 
>> ++
>>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h | 14 
>>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c | 62 +---
>>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h  | 13 
>>  4 files changed, 163 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c 
>> b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
>> index 38fc5be..a0f0d4f 100644
>> --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
>> +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
>> @@ -12,6 +12,7 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>> @@ -2593,6 +2594,89 @@ static struct platform_driver g_dsaf_driver = {
>>  
>>  module_platform_driver(g_dsaf_driver);
>>  
>> +/**
>> + * hns_dsaf_roce_reset - reset dsaf and roce
>> + * @dsaf_fwnode: Pointer to framework node for the dasf
>> + * @val: 0 - request reset , 1 - drop reset
>> + * retuen 0 - success , negative --fail
>> + */
>> +int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, u32 val)
>> +{
>> +struct dsaf_device *dsaf_dev;
>> +struct platform_device *pdev;
>> +unsigned int mp;
>> +unsigned int sl;
>> +unsigned int credit;
>> +int i;
>> +const u32 port_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE] = {
>> +{0, 0, 0},
>> +{1, 0, 0},
>> +{2, 1, 0},
>> +{3, 1, 0},
>> +{4, 2, 1},
>> +{4, 2, 1},
>> +{5, 3, 1},
>> +{5, 3, 1},
>> +};
>> +const u32 sl_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE] = {
>> +{0, 0, 0},
>> +{0, 1, 1},
>> +{0, 0, 2},
>> +{0, 1, 3},
>> +{0, 0, 0},
>> +{1, 1, 1},
>> +{0, 0, 2},
>> +{1, 1, 3},
>> +};
> Do you have a plan to send a version with enums/defines for this
> numbers? Especially for _CHAN_MODE.
>
> .

Hi leon,

it seems the enums is added in hns_dsaf_main.h, as belows:

diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h 
b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
index 5fea226..c917b9a 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
@@ -40,6 +40,16 @@ struct hns_mac_cb;
 #define DSAF_DUMP_REGS_NUM 504
 #define DSAF_STATIC_NUM 28
 
+#define DSAF_ROCE_CREDIT_CHN 8
+#define DSAF_ROCE_CHAN_MODE 3
+
+enum dsaf_roce_port_port_mode {
+   DSAF_ROCE_6PORT_MODE,
+   DSAF_ROCE_4PORT_MODE,
+   DSAF_ROCE_2PORT_MODE,
+   DSAF_ROCE_CHAN_MODE_NUM
+};
+

MBR, Kejian

Re: [PATCH 2/3] net: hns: add Hisilicon RoCE support

2016-03-12 Thread Leon Romanovsky 
On Fri, Mar 11, 2016 at 06:37:10PM +0800, Lijun Ou wrote:
> It added hns_dsaf_roce_reset routine for roce driver.
> RoCE is a feature of hns.
> In hip06 SOC, in roce reset process, it's needed to configure
> dsaf channel reset,port and sl map info.
> 
> Signed-off-by: Lijun Ou 
> Signed-off-by: Wei Hu(Xavier) 
> Signed-off-by: Lisheng 
> ---
>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c | 84 
> ++
>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h | 14 
>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c | 62 +---
>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h  | 13 
>  4 files changed, 163 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c 
> b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
> index 38fc5be..a0f0d4f 100644
> --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
> +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
> @@ -12,6 +12,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -2593,6 +2594,89 @@ static struct platform_driver g_dsaf_driver = {
>  
>  module_platform_driver(g_dsaf_driver);
>  
> +/**
> + * hns_dsaf_roce_reset - reset dsaf and roce
> + * @dsaf_fwnode: Pointer to framework node for the dasf
> + * @val: 0 - request reset , 1 - drop reset
> + * retuen 0 - success , negative --fail
> + */
> +int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, u32 val)
> +{
> + struct dsaf_device *dsaf_dev;
> + struct platform_device *pdev;
> + unsigned int mp;
> + unsigned int sl;
> + unsigned int credit;
> + int i;
> + const u32 port_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE] = {
> + {0, 0, 0},
> + {1, 0, 0},
> + {2, 1, 0},
> + {3, 1, 0},
> + {4, 2, 1},
> + {4, 2, 1},
> + {5, 3, 1},
> + {5, 3, 1},
> + };
> + const u32 sl_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE] = {
> + {0, 0, 0},
> + {0, 1, 1},
> + {0, 0, 2},
> + {0, 1, 3},
> + {0, 0, 0},
> + {1, 1, 1},
> + {0, 0, 2},
> + {1, 1, 3},
> + };

Do you have a plan to send a version with enums/defines for this
numbers? Especially for _CHAN_MODE.

[PATCH 2/3] net: hns: add Hisilicon RoCE support

2016-03-11 Thread Lijun Ou 
It added hns_dsaf_roce_reset routine for roce driver.
RoCE is a feature of hns.
In hip06 SOC, in roce reset process, it's needed to configure
dsaf channel reset,port and sl map info.

Signed-off-by: Lijun Ou 
Signed-off-by: Wei Hu(Xavier) 
Signed-off-by: Lisheng 
---
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c | 84 ++
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h | 14 
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c | 62 +---
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h  | 13 
 4 files changed, 163 insertions(+), 10 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c 
b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
index 38fc5be..a0f0d4f 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -2593,6 +2594,89 @@ static struct platform_driver g_dsaf_driver = {
 
 module_platform_driver(g_dsaf_driver);
 
+/**
+ * hns_dsaf_roce_reset - reset dsaf and roce
+ * @dsaf_fwnode: Pointer to framework node for the dasf
+ * @val: 0 - request reset , 1 - drop reset
+ * retuen 0 - success , negative --fail
+ */
+int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, u32 val)
+{
+   struct dsaf_device *dsaf_dev;
+   struct platform_device *pdev;
+   unsigned int mp;
+   unsigned int sl;
+   unsigned int credit;
+   int i;
+   const u32 port_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE] = {
+   {0, 0, 0},
+   {1, 0, 0},
+   {2, 1, 0},
+   {3, 1, 0},
+   {4, 2, 1},
+   {4, 2, 1},
+   {5, 3, 1},
+   {5, 3, 1},
+   };
+   const u32 sl_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE] = {
+   {0, 0, 0},
+   {0, 1, 1},
+   {0, 0, 2},
+   {0, 1, 3},
+   {0, 0, 0},
+   {1, 1, 1},
+   {0, 0, 2},
+   {1, 1, 3},
+   };
+
+   if (!is_of_node(dsaf_fwnode)) {
+   pr_err("Only support DT node!\n");
+   return -EINVAL;
+   }
+   pdev = of_find_device_by_node(to_of_node(dsaf_fwnode));
+   dsaf_dev = dev_get_drvdata(&pdev->dev);
+   if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
+   dev_err(dsaf_dev->dev, "%s v1 chip do not support roce!\n",
+   dsaf_dev->ae_dev.name);
+   return -ENODEV;
+   }
+
+   if (!val) {
+   /* Reset rocee-channels in dsaf and rocee */
+   hns_dsaf_srst_chns(dsaf_dev, 0x3f000, 0);
+   hns_dsaf_roce_srst(dsaf_dev, 0);
+   } else {
+   /* Configure dsaf tx roce correspond to port map and sl map */
+   mp = dsaf_read_dev(dsaf_dev, DSAF_ROCE_PORT_MAP_REG);
+   for (i = 0; i < DSAF_ROCE_CREDIT_CHN; i++)
+   dsaf_set_field(mp, 7 << i * 3, i * 3,
+  port_map[i][DSAF_ROCE_6PORT_MODE]);
+   dsaf_set_field(mp, 3 << i * 3, i * 3, 0);
+   dsaf_write_dev(dsaf_dev, DSAF_ROCE_PORT_MAP_REG, mp);
+
+   sl = dsaf_read_dev(dsaf_dev, DSAF_ROCE_SL_MAP_REG);
+   for (i = 0; i < DSAF_ROCE_CREDIT_CHN; i++)
+   dsaf_set_field(sl, 3 << i * 2, i * 2,
+  sl_map[i][DSAF_ROCE_6PORT_MODE]);
+   dsaf_write_dev(dsaf_dev, DSAF_ROCE_SL_MAP_REG, sl);
+
+   /* De-reset rocee-channels in dsaf and rocee */
+   hns_dsaf_srst_chns(dsaf_dev, 0x3f000, 1);
+   msleep(20);
+   hns_dsaf_roce_srst(dsaf_dev, 1);
+
+   /* Eanble dsaf channel rocee credit */
+   credit = dsaf_read_dev(dsaf_dev, DSAF_SBM_ROCEE_CFG_REG_REG);
+   dsaf_set_bit(credit, DSAF_SBM_ROCEE_CFG_CRD_EN_B, 0);
+   dsaf_write_dev(dsaf_dev, DSAF_SBM_ROCEE_CFG_REG_REG, credit);
+
+   dsaf_set_bit(credit, DSAF_SBM_ROCEE_CFG_CRD_EN_B, 1);
+   dsaf_write_dev(dsaf_dev, DSAF_SBM_ROCEE_CFG_REG_REG, credit);
+   }
+   return 0;
+}
+EXPORT_SYMBOL(hns_dsaf_roce_reset);
+
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
 MODULE_DESCRIPTION("HNS DSAF driver");
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h 
b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
index 5fea226..c917b9a 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
@@ -40,6 +40,16 @@ struct hns_mac_cb;
 #define DSAF_DUMP_REGS_NUM 504
 #define DSAF_STATIC_NUM 28
 
+#define DSAF_ROCE_CREDIT_CHN 8
+#define DSAF_ROCE_CHAN_MODE 3
+
+enum dsaf_roce_port_port_mode {
+   DSAF_ROCE_6PORT_MODE,
+   DSAF_ROCE_4PORT_MODE,
+   DSAF_ROCE_2PORT_MODE,
+   DSAF_ROCE_CHAN_MODE_NUM
+};
+
 #define DSAF_STA