[PATCH 3/10] cxgb3 - [PATCH 3/10] cxgb3 - HW access routines - part 1

2006-12-13 Thread divy
From: Divy Le Ray [EMAIL PROTECTED]
[PATCH 3/10] cxgb3 - HW access routines - part 1


This patch implements the HW access routines for the
Chelsio T3 network adapter's driver.
This patch is split. This is the first part.

Signed-off-by: Divy Le Ray [EMAIL PROTECTED]
---
 drivers/net/cxgb3/t3_hw.c | 3352 +
 1 files changed, 3352 insertions(+), 0 deletions(-)

diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c
new file mode 100755
index 000..3a1802d
--- /dev/null
+++ b/drivers/net/cxgb3/t3_hw.c
@@ -0,0 +1,3352 @@
+/*
+ * This file is part of the Chelsio T3 Ethernet driver.
+ *
+ * Copyright (C) 2003-2006 Chelsio Communications.  All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the LICENSE file included in this
+ * release for licensing terms and conditions.
+ */
+
+#include common.h
+#include regs.h
+#include sge_defs.h
+#include firmware_exports.h
+
+ /**
+  *t3_wait_op_done_val - wait until an operation is completed
+  *@adapter: the adapter performing the operation
+  *@reg: the register to check for completion
+  *@mask: a single-bit field within @reg that indicates completion
+  *@polarity: the value of the field when the operation is completed
+  *@attempts: number of check iterations
+  *@delay: delay in usecs between iterations
+  *@valp: where to store the value of the register at completion time
+  *
+  *Wait until an operation is completed by checking a bit in a register
+  *up to @attempts times.  If @valp is not NULL the value of the register
+  *at the time it indicated completion is stored there.  Returns 0 if the
+  *operation completes and -EAGAIN otherwise.
+  */
+
+int t3_wait_op_done_val(struct adapter *adapter, int reg, u32 mask,
+   int polarity, int attempts, int delay, u32 *valp)
+{
+   while (1) {
+   u32 val = t3_read_reg(adapter, reg);
+
+   if (!!(val  mask) == polarity) {
+   if (valp)
+   *valp = val;
+   return 0;
+   }
+   if (--attempts == 0)
+   return -EAGAIN;
+   if (delay)
+   udelay(delay);
+   }
+}
+
+/**
+ * t3_write_regs - write a bunch of registers
+ * @adapter: the adapter to program
+ * @p: an array of register address/register value pairs
+ * @n: the number of address/value pairs
+ * @offset: register address offset
+ *
+ * Takes an array of register address/register value pairs and writes each
+ * value to the corresponding register.  Register addresses are adjusted
+ * by the supplied offset.
+ */
+void t3_write_regs(struct adapter *adapter, const struct addr_val_pair *p,
+  int n, unsigned int offset)
+{
+   while (n--) {
+   t3_write_reg(adapter, p-reg_addr + offset, p-val);
+   p++;
+   }
+}
+
+/**
+ * t3_set_reg_field - set a register field to a value
+ * @adapter: the adapter to program
+ * @addr: the register address
+ * @mask: specifies the portion of the register to modify
+ * @val: the new value for the register field
+ *
+ * Sets a register field specified by the supplied mask to the
+ * given value.
+ */
+void t3_set_reg_field(struct adapter *adapter, unsigned int addr, u32 mask,
+ u32 val)
+{
+   u32 v = t3_read_reg(adapter, addr)  ~mask;
+
+   t3_write_reg(adapter, addr, v | val);
+   (void)t3_read_reg(adapter, addr);   /* flush */
+}
+
+/**
+ * t3_read_indirect - read indirectly addressed registers
+ * @adap: the adapter
+ * @addr_reg: register holding the indirect address
+ * @data_reg: register holding the value of the indirect register
+ * @vals: where the read register values are stored
+ * @start_idx: index of first indirect register to read
+ * @nregs: how many indirect registers to read
+ *
+ * Reads registers that are accessed indirectly through an address/data
+ * register pair.
+ */
+void t3_read_indirect(struct adapter *adap, unsigned int addr_reg,
+ unsigned int data_reg, u32 *vals, unsigned int nregs,
+ unsigned int start_idx)
+{
+   while (nregs--) {
+   t3_write_reg(adap, addr_reg, start_idx);
+   *vals++ = t3_read_reg(adap, data_reg);
+   start_idx++;
+   }
+}
+
+/**
+ * t3_mc7_bd_read - read from MC7 through backdoor accesses
+ * @mc7: identifies MC7 to read from
+ * @start: index of first 64-bit word to read
+ * @n: number of 64-bit words to read
+ * @buf: where to store the read result
+ *
+ * Read n 64-bit words from MC7 starting at word start, using backdoor
+ * 

Re: [LIKELY_SPAM][PATCH 3/10] cxgb3 - [PATCH 3/10] cxgb3 - HW access routines - part 1

2006-12-13 Thread Divy Le Ray

I obviously managed to mess up the subject.
The patch with proper subject is reposted.

Divy


From: Divy Le Ray [EMAIL PROTECTED]
[PATCH 3/10] cxgb3 - HW access routines - part 1


This patch implements the HW access routines for the
Chelsio T3 network adapter's driver.
This patch is split. This is the first part.

Signed-off-by: Divy Le Ray [EMAIL PROTECTED]
---
  

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