[PATCH V2 18/22] bnxt_re: Support for DCB

2016-12-08 Thread Selvin Xavier
This patch queries the configured RoCE APP Priority on the host
using the dcbnl API and programs the RoCE FW with the corresponding
Traffic Class(es) for the priority.

v2: Fixed some sparse warning and cleanup of function
bnxt_re_query_hwrm_pri2cos

Signed-off-by: Eddie Wai 
Signed-off-by: Devesh Sharma 
Signed-off-by: Somnath Kotur 
Signed-off-by: Sriharsha Basavapatna 
Signed-off-by: Selvin Xavier 
---
 drivers/infiniband/hw/bnxtre/bnxt_qplib_sp.h |   3 +-
 drivers/infiniband/hw/bnxtre/bnxt_re.h   |   6 ++
 drivers/infiniband/hw/bnxtre/bnxt_re_main.c  | 140 +++
 3 files changed, 148 insertions(+), 1 deletion(-)

diff --git a/drivers/infiniband/hw/bnxtre/bnxt_qplib_sp.h 
b/drivers/infiniband/hw/bnxtre/bnxt_qplib_sp.h
index 3358f6d..a72dfab 100644
--- a/drivers/infiniband/hw/bnxtre/bnxt_qplib_sp.h
+++ b/drivers/infiniband/hw/bnxtre/bnxt_qplib_sp.h
@@ -156,4 +156,5 @@ int bnxt_qplib_alloc_fast_reg_page_list(struct 
bnxt_qplib_res *res,
struct bnxt_qplib_frpl *frpl, int max);
 int bnxt_qplib_free_fast_reg_page_list(struct bnxt_qplib_res *res,
   struct bnxt_qplib_frpl *frpl);
-#endif /* __BNXT_QPLIB_SP_H__*/
+int bnxt_qplib_map_tc2cos(struct bnxt_qplib_res *res, u16 *cids);
+#endif
diff --git a/drivers/infiniband/hw/bnxtre/bnxt_re.h 
b/drivers/infiniband/hw/bnxtre/bnxt_re.h
index 30f4b30..36b1d4f 100644
--- a/drivers/infiniband/hw/bnxtre/bnxt_re.h
+++ b/drivers/infiniband/hw/bnxtre/bnxt_re.h
@@ -45,6 +45,9 @@
 #define BNXT_RE_REF_WAIT_COUNT 10
 #define BNXT_RE_DESC   "Broadcom NetXtreme-C/E RoCE Driver"
 
+#define BNXT_RE_ROCE_V1_ETH_TYPE   0x8915
+#define BNXT_RE_ROCE_V2_PORT_NO4791
+
 #define BNXT_RE_PAGE_SIZE_4K   BIT(12)
 #define BNXT_RE_PAGE_SIZE_8K   BIT(13)
 #define BNXT_RE_PAGE_SIZE_64K  BIT(16)
@@ -95,6 +98,9 @@ struct bnxt_re_dev {
 
int id;
 
+   struct delayed_work worker;
+   u8  cur_prio_map;
+
/* FP Notification Queue (CQ & SRQ) */
struct tasklet_struct   nq_task;
 
diff --git a/drivers/infiniband/hw/bnxtre/bnxt_re_main.c 
b/drivers/infiniband/hw/bnxtre/bnxt_re_main.c
index 260dec1..f3ce02c 100644
--- a/drivers/infiniband/hw/bnxtre/bnxt_re_main.c
+++ b/drivers/infiniband/hw/bnxtre/bnxt_re_main.c
@@ -44,6 +44,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -734,6 +735,50 @@ static void bnxt_re_dispatch_event(struct ib_device 
*ibdev, struct ib_qp *qp,
ib_dispatch_event(&ib_event);
 }
 
+#define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN  0x02
+static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir,
+ u64 *cid_map)
+{
+   struct hwrm_queue_pri2cos_qcfg_input req = {0};
+   struct bnxt *bp = netdev_priv(rdev->netdev);
+   struct hwrm_queue_pri2cos_qcfg_output resp;
+   struct bnxt_en_dev *en_dev = rdev->en_dev;
+   struct bnxt_fw_msg fw_msg;
+   u32 flags = 0;
+   u8 *qcfgmap, *tmp_map;
+   int rc = 0, i;
+
+   if (!cid_map)
+   return -EINVAL;
+
+   memset(&fw_msg, 0, sizeof(fw_msg));
+   bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
+ HWRM_QUEUE_PRI2COS_QCFG, -1, -1);
+   flags |= (dir & 0x01);
+   flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN;
+   req.flags = cpu_to_le32(flags);
+   req.port_id = bp->pf.port_id;
+
+   bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
+   sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
+   rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
+   if (rc)
+   return rc;
+
+   if (resp.queue_cfg_info) {
+   dev_warn(rdev_to_dev(rdev),
+"Asymmetric cos queue configuration detected");
+   dev_warn(rdev_to_dev(rdev),
+" on device, QoS may not be fully functional\n");
+   }
+   qcfgmap = &resp.pri0_cos_queue_id;
+   tmp_map = (u8 *)cid_map;
+   for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
+   tmp_map[i] = qcfgmap[i];
+
+   return rc;
+}
+
 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev,
struct bnxt_re_qp *qp)
 {
@@ -774,6 +819,80 @@ static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev, 
bool qp_wait)
}
 }
 
+static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev)
+{
+   u32 prio_map = 0, tmp_map = 0;
+   struct net_device *netdev;
+   struct dcb_app app;
+
+   netdev = rdev->netdev;
+
+   memset(&app, 0, sizeof(app));
+   app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
+   app.protocol = BNXT_RE_ROCE_V1_ETH_TYPE;
+   tmp_map = dcb_ieee_getapp_mask(netdev, &app);
+   prio_map = tmp_map;
+
+   app.selector = IEEE_8021QAZ_APP_SEL_DG

Re: [PATCH V2 18/22] bnxt_re: Support for DCB

2016-12-10 Thread Or Gerlitz
On Fri, Dec 9, 2016 at 8:48 AM, Selvin Xavier
 wrote:
> This patch queries the configured RoCE APP Priority on the host
> using the dcbnl API and programs the RoCE FW with the corresponding
> Traffic Class(es) for the priority.

> +#define BNXT_RE_ROCE_V1_ETH_TYPE   0x8915
> +#define BNXT_RE_ROCE_V2_PORT_NO4791

I believe these two are defined already, try # git grep on each under include


Re: [PATCH V2 18/22] bnxt_re: Support for DCB

2016-12-12 Thread Selvin Xavier
On Sat, Dec 10, 2016 at 7:20 PM, Or Gerlitz  wrote:
> On Fri, Dec 9, 2016 at 8:48 AM, Selvin Xavier
>  wrote:
>> This patch queries the configured RoCE APP Priority on the host
>> using the dcbnl API and programs the RoCE FW with the corresponding
>> Traffic Class(es) for the priority.
>
>> +#define BNXT_RE_ROCE_V1_ETH_TYPE   0x8915
>> +#define BNXT_RE_ROCE_V2_PORT_NO4791
>
> I believe these two are defined already, try # git grep on each under include

Thanks Or for your comments.
V2 port number is defined in ib_verbs.h.  i will include this in the
next patch set.
v1 eth_type is not defined. All vendor drivers have their own definition.

Thanks,
Selvin


Re: [PATCH V2 18/22] bnxt_re: Support for DCB

2016-12-13 Thread Jason Gunthorpe
On Tue, Dec 13, 2016 at 11:55:55AM +0530, Selvin Xavier wrote:

> v1 eth_type is not defined. All vendor drivers have their own definition.

Send a cleanup patch?

Jason