Re: [PATCH net-next] sh_eth: fix TSU init on SH7734/R8A7740

2018-02-26 Thread David Miller
From: Sergei Shtylyov 
Date: Sat, 24 Feb 2018 22:41:45 +0300

> It appears that the single port Ether controllers having TSU (like SH7734/
> R8A7740) need the same kind of treating in sh_eth_tsu_init() as R7S72100
> currently has -- they also don't have the TSU registers related e.g. to
> passing the frames between ports. Add the 'sh_eth_cpu_data::dual_port'
> flag and use it as a new criterion for taking a "short path" in the TSU
> init sequence in order to avoid writing to the non-existant registers...
> 
> Fixes: f0e81fecd4f8 ("net: sh_eth: Add support SH7734")
> Fixes: 73a0d907301e ("net: sh_eth: add support R8A7740")
> Signed-off-by: Sergei Shtylyov 

Applied with commit messsage spelling problem fixed.

Thanks.


Re: [PATCH net-next] sh_eth: fix TSU init on SH7734/R8A7740

2018-02-26 Thread Sergei Shtylyov
On 02/24/2018 10:41 PM, Sergei Shtylyov wrote:

> It appears that the single port Ether controllers having TSU (like SH7734/
> R8A7740) need the same kind of treating in sh_eth_tsu_init() as R7S72100
> currently has -- they also don't have the TSU registers related e.g. to
> passing the frames between ports. Add the 'sh_eth_cpu_data::dual_port'
> flag and use it as a new criterion for taking a "short path" in the TSU
> init sequence in order to avoid writing to the non-existant registers...

   Spell checker tells it should have been "non-existent" -- would it be 
possible
to fix while merging?

> Fixes: f0e81fecd4f8 ("net: sh_eth: Add support SH7734")
> Fixes: 73a0d907301e ("net: sh_eth: add support R8A7740")
> Signed-off-by: Sergei Shtylyov 
[...]

MBR, Sergei


Re: [PATCH net-next] sh_eth: fix TSU init on SH7734/R8A7740

2018-02-26 Thread Geert Uytterhoeven
Hi Sergei,

On Sat, Feb 24, 2018 at 8:41 PM, Sergei Shtylyov
 wrote:
> It appears that the single port Ether controllers having TSU (like SH7734/
> R8A7740) need the same kind of treating in sh_eth_tsu_init() as R7S72100
> currently has -- they also don't have the TSU registers related e.g. to
> passing the frames between ports. Add the 'sh_eth_cpu_data::dual_port'
> flag and use it as a new criterion for taking a "short path" in the TSU
> init sequence in order to avoid writing to the non-existant registers...
>
> Fixes: f0e81fecd4f8 ("net: sh_eth: Add support SH7734")
> Fixes: 73a0d907301e ("net: sh_eth: add support R8A7740")
> Signed-off-by: Sergei Shtylyov 

Thanks for your patch!

Ethernet (nfsroot and WoL) is still working fine on r8a7740/armadillo,
which has a single "gether" port.

Tested-by: Geert Uytterhoeven 

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds


[PATCH net-next] sh_eth: fix TSU init on SH7734/R8A7740

2018-02-24 Thread Sergei Shtylyov
It appears that the single port Ether controllers having TSU (like SH7734/
R8A7740) need the same kind of treating in sh_eth_tsu_init() as R7S72100
currently has -- they also don't have the TSU registers related e.g. to
passing the frames between ports. Add the 'sh_eth_cpu_data::dual_port'
flag and use it as a new criterion for taking a "short path" in the TSU
init sequence in order to avoid writing to the non-existant registers...

Fixes: f0e81fecd4f8 ("net: sh_eth: Add support SH7734")
Fixes: 73a0d907301e ("net: sh_eth: add support R8A7740")
Signed-off-by: Sergei Shtylyov 

---
David, I'm submitting this patch against the 'net-next.git' repo since nothing
seems to explode when writing to the non-existing TSU registers. Whether to
apply this to 'net.git' instead is up to you...

 drivers/net/ethernet/renesas/sh_eth.c |6 +-
 drivers/net/ethernet/renesas/sh_eth.h |1 +
 2 files changed, 6 insertions(+), 1 deletion(-)

Index: net-next/drivers/net/ethernet/renesas/sh_eth.c
===
--- net-next.orig/drivers/net/ethernet/renesas/sh_eth.c
+++ net-next/drivers/net/ethernet/renesas/sh_eth.c
@@ -752,6 +752,7 @@ static struct sh_eth_cpu_data sh7757_dat
.rpadir = 1,
.rpadir_value   = 2 << 16,
.rtrate = 1,
+   .dual_port  = 1,
 };
 
 #define SH_GIGA_ETH_BASE   0xfee0UL
@@ -830,6 +831,7 @@ static struct sh_eth_cpu_data sh7757_dat
.no_trimd   = 1,
.no_ade = 1,
.tsu= 1,
+   .dual_port  = 1,
 };
 
 /* SH7734 */
@@ -900,6 +902,7 @@ static struct sh_eth_cpu_data sh7763_dat
.tsu= 1,
.irq_flags  = IRQF_SHARED,
.magic  = 1,
+   .dual_port  = 1,
 };
 
 static struct sh_eth_cpu_data sh7619_data = {
@@ -932,6 +935,7 @@ static struct sh_eth_cpu_data sh771x_dat
  EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
  EESIPR_PREIP | EESIPR_CERFIP,
.tsu= 1,
+   .dual_port  = 1,
 };
 
 static void sh_eth_set_default_cpu_data(struct sh_eth_cpu_data *cd)
@@ -2915,7 +2919,7 @@ static int sh_eth_vlan_rx_kill_vid(struc
 /* SuperH's TSU register init function */
 static void sh_eth_tsu_init(struct sh_eth_private *mdp)
 {
-   if (sh_eth_is_rz_fast_ether(mdp)) {
+   if (!mdp->cd->dual_port) {
sh_eth_tsu_write(mdp, 0, TSU_TEN); /* Disable all CAM entry */
sh_eth_tsu_write(mdp, TSU_FWSLC_POSTENU | TSU_FWSLC_POSTENL,
 TSU_FWSLC);/* Enable POST registers */
Index: net-next/drivers/net/ethernet/renesas/sh_eth.h
===
--- net-next.orig/drivers/net/ethernet/renesas/sh_eth.h
+++ net-next/drivers/net/ethernet/renesas/sh_eth.h
@@ -509,6 +509,7 @@ struct sh_eth_cpu_data {
unsigned rmiimode:1;/* EtherC has RMIIMODE register */
unsigned rtrate:1;  /* EtherC has RTRATE register */
unsigned magic:1;   /* EtherC has ECMR.MPDE and ECSR.MPD */
+   unsigned dual_port:1;   /* Dual EtherC/E-DMAC */
 };
 
 struct sh_eth_private {