Re: [PATCH v3 1/1] net: ethernet: Add TSE PCS support to dwmac-socfpga

2016-06-10 Thread Giuseppe CAVALLARO 

Hello Tien Hock

On 6/10/2016 8:12 AM, Tien Hock Loh wrote:

Yeah the PCS support for TSE is Altera. To avoid confusion, let's rename
> > them, would altr_tse_pcs.[hc] be good? I don't think creating a
> > sub-directory with only 2 files is necessary though.

>
> ok for two files w/o sub-dir.
>

> >
> > I see that stmmac.txt is generic, and other vendor's PCS support
> > documents their specific uses in their own *-dwmac.txt (eg.
> > rockchip-dwmac.txt). Is this not the case?

>
> yes you can use this name convention. I let you decide.

What I meant was we've documented the bindings in socfpga-dwmac.txt for
platform specific bindings, and I won't be updating stmmac.txt because
that is the generic driver binding. Agree?


ok if you documented all in socfpga-dwmac.txt

peppe

Re: [PATCH v3 1/1] net: ethernet: Add TSE PCS support to dwmac-socfpga

2016-06-10 Thread Tien Hock Loh 
Hi Peppe, 

On Wed, 2016-06-08 at 23:20 +, Giuseppe CAVALLARO wrote:
> Hello Tien Hock
> 
> On 6/9/2016 7:48 AM, Tien Hock Loh wrote:
> 
> [snip]
> 
> >>>  .../devicetree/bindings/net/socfpga-dwmac.txt  |   4 +
> >>>  drivers/net/ethernet/stmicro/stmmac/Makefile   |   2 +-
> >>>  .../net/ethernet/stmicro/stmmac/dwmac-socfpga.c| 140 +--
> >>>  drivers/net/ethernet/stmicro/stmmac/tse_pcs.c  | 261 
> >>> +
> >>>  drivers/net/ethernet/stmicro/stmmac/tse_pcs.h  |  36 +++
> >>>  5 files changed, 419 insertions(+), 24 deletions(-)
> >>>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/tse_pcs.c
> >>>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/tse_pcs.h
> >>
> >> I just wonder if it could make sense to rename the
> >> tse_pcs.[hc] files or creating a sub-directory for altera devel.
> >> It seems that tse_pcs.[hc] are common files but this support
> >> is for Altera.
> >> Anyway, I let you decide and I also ask you to update the stmmac.txt
> >> file.
> >
> > Yeah the PCS support for TSE is Altera. To avoid confusion, let's rename
> > them, would altr_tse_pcs.[hc] be good? I don't think creating a
> > sub-directory with only 2 files is necessary though.
> 
> ok for two files w/o sub-dir.
> 
> >
> > I see that stmmac.txt is generic, and other vendor's PCS support
> > documents their specific uses in their own *-dwmac.txt (eg.
> > rockchip-dwmac.txt). Is this not the case?
> 
> yes you can use this name convention. I let you decide.

What I meant was we've documented the bindings in socfpga-dwmac.txt for
platform specific bindings, and I won't be updating stmmac.txt because
that is the generic driver binding. Agree?

> 
> [snip]
> 
> 
> >>> +
> >>> + index = of_property_match_string(np_sgmii_adapter, "reg-names",
> >>> +  "eth_tse_control_port");
> >>
> >> reg-names looks to be specific and mandatory, IMO they should be
> >> documented in the binding.
> >
> > That's the binding for the adapter (the phandle to the sgmii adapter),
> > not the stmac binding itself. Do you mean I should document the sgmii
> > adapter as well?
> 
> no I just meant for the adapter binding, I had understood that
> eth_tse_control_port and gmii_to_sgmii_adapter_avalon_slave
> were not documented and these seem to be mandatory.

OK noted.

> 
> [snip]
> 
> >>> +
> >>> +static void auto_nego_timer_callback(unsigned long data)
> >>> +{
> >>> + u16 val = 0;
> >>> + u16 speed = 0;
> >>> + u16 duplex = 0;
> >>> +
> >>> + struct tse_pcs *pcs = (struct tse_pcs *)data;
> >>> + void __iomem *tse_pcs_base = pcs->tse_pcs_base;
> >>> + void __iomem *sgmii_adapter_base = pcs->sgmii_adapter_base;
> >>> +
> >>> + val = readw(tse_pcs_base + TSE_PCS_STATUS_REG);
> >>> + val &=  TSE_PCS_STATUS_AN_COMPLETED_MASK;
> 
> [snip]
> 
> >>
> >> ANE is completed but speed or duplex is NOK. Any failure to signalling?
> >> I see that you then enable the adpter in any case.
> >>
> >> Maybe we could try to restart ANE again or force it (reducing the speed)
> >> I wonder what happens if, for some reason, there is some hw problem. In
> >> that case the timer is always running signalling an invalid Parter
> >> speed. Anyway, this is jus a question... I expect that this error will
> >> always point us to a problem to debug further (if occurs).
> >
> > Let me look at how we can handle the case. Perhaps we could do a restart
> > and register the timer again. I'm just worried it will go into an
> > infinite timer registering hogging up the kernel if the hardware really
> > fails. Maybe I can do a n-time retry here. Looking into this. Let me
> > know if you have any opinions on this.
> >
> > I haven't been able to check for this behaviour though, negative testing
> > on this code isn't too easy to simulate.
> 
> yes and I expect this can occur on hw / conf problems. Take a look at
> how the Physical Abstraction Layer manages this.
> Indeed, we can try to restart ANE for a while and then just report the
> failure (dev_err). Or we can try to fix other speed or duplex. But not
> sure this is a good solution. We just mask a problem.

Done some read up on the generic PHY in Physical Abstraction Layer and
it halts the PHY on aneg failure. I guess we can do do the same then, to
not enable the SGMII adapter.

> 
> [snip]
> 
> >>> +
> >>> + setup_timer(>an_timer,
> >>> + auto_nego_timer_callback,
> >>> + (unsigned long)pcs);
> >>> + mod_timer(>an_timer, jiffies +
> >>> +   msecs_to_jiffies(AUTONEGO_TIMER));
> >>> + } else if (phy_dev->autoneg == AUTONEG_DISABLE) {
> >>> + val = readw(tse_pcs_base + TSE_PCS_CONTROL_REG);
> >>> + val &= ~TSE_PCS_CONTROL_AN_EN_MASK;
> >>> + writew(val, tse_pcs_base + TSE_PCS_CONTROL_REG);
> >>> +
> >>> + val = readw(tse_pcs_base + TSE_PCS_IF_MODE_REG);
> >>> + val &= ~TSE_PCS_USE_SGMII_AN_MASK;
> >>> + writew(val,

Re: [PATCH v3 1/1] net: ethernet: Add TSE PCS support to dwmac-socfpga

2016-06-09 Thread Tien Hock Loh 
Hi Peppe,

On Tue, 2016-06-07 at 10:30 +0200, Giuseppe CAVALLARO wrote:
> Hello
> 
> On 6/7/2016 5:01 AM, th...@altera.com wrote:
> > From: Tien Hock Loh 
> >
> > This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
> > the dwmac is set to sgmii
> >
> > Signed-off-by: Tien Hock Loh 
> >
> > ---
> > v2:
> > - Refactored the TSE PCS out from the dwmac-socfpga.c file
> > - Added binding documentation for TSE PCS sgmii adapter
> > v3:
> > - Added missing license header for new source files
> > - Updated tse_pcs.h include headers
> > - Standardize if statements
> > ---
> >  .../devicetree/bindings/net/socfpga-dwmac.txt  |   4 +
> >  drivers/net/ethernet/stmicro/stmmac/Makefile   |   2 +-
> >  .../net/ethernet/stmicro/stmmac/dwmac-socfpga.c| 140 +--
> >  drivers/net/ethernet/stmicro/stmmac/tse_pcs.c  | 261 
> > +
> >  drivers/net/ethernet/stmicro/stmmac/tse_pcs.h  |  36 +++
> >  5 files changed, 419 insertions(+), 24 deletions(-)
> >  create mode 100644 drivers/net/ethernet/stmicro/stmmac/tse_pcs.c
> >  create mode 100644 drivers/net/ethernet/stmicro/stmmac/tse_pcs.h
> 
> I just wonder if it could make sense to rename the
> tse_pcs.[hc] files or creating a sub-directory for altera devel.
> It seems that tse_pcs.[hc] are common files but this support
> is for Altera.
> Anyway, I let you decide and I also ask you to update the stmmac.txt
> file.

Yeah the PCS support for TSE is Altera. To avoid confusion, let's rename
them, would altr_tse_pcs.[hc] be good? I don't think creating a
sub-directory with only 2 files is necessary though.

I see that stmmac.txt is generic, and other vendor's PCS support
documents their specific uses in their own *-dwmac.txt (eg.
rockchip-dwmac.txt). Is this not the case?

> 
> > diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt 
> > b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
> > index 3a9d679..2bc39f1 100644
> > --- a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
> > +++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
> > @@ -15,6 +15,8 @@ Required properties:
> >  Optional properties:
> >  altr,emac-splitter: Should be the phandle to the emac splitter soft IP 
> > node if
> > DWMAC controller is connected emac splitter.
> > +phy-mode: The phy mode the ethernet operates in
> > +altr,sgmii_to_sgmii_converter: phandle to the TSE SGMII converter
> >
> >  Example:
> >
> > @@ -28,4 +30,6 @@ gmac0: ethernet@ff70 {
> > mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
> > clocks = <_0_clk>;
> > clock-names = "stmmaceth";
> > +   phy-mode = "sgmii";
> > +   altr,gmii_to_sgmii_converter = <_1_gmii_to_sgmii_converter_0>;
> >  };
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile 
> > b/drivers/net/ethernet/stmicro/stmmac/Makefile
> > index 73c2715..29c1dee 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> > +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> > @@ -6,7 +6,7 @@ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o 
> > ring_mode.o  \
> >
> >  obj-$(CONFIG_STMMAC_PLATFORM) += stmmac-platform.o
> >  stmmac-platform-objs:= stmmac_platform.o dwmac-meson.o dwmac-sunxi.o   
> > \
> > -  dwmac-sti.o dwmac-socfpga.o dwmac-rk.o
> > +  dwmac-sti.o dwmac-socfpga.o dwmac-rk.o tse_pcs.o
> >
> >  obj-$(CONFIG_STMMAC_PCI) += stmmac-pci.o
> >  stmmac-pci-objs:= stmmac_pci.o
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c 
> > b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> > index 3f9588e..88fba4e 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> > @@ -27,6 +27,8 @@
> >  #include "stmmac.h"
> >  #include "stmmac_platform.h"
> >
> > +#include "tse_pcs.h"
> > +
> >  #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0
> >  #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII 0x1
> >  #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII 0x2
> > @@ -47,48 +49,60 @@ struct socfpga_dwmac {
> > struct regmap *sys_mgr_base_addr;
> > struct reset_control *stmmac_rst;
> > void __iomem *splitter_base;
> > +   struct tse_pcs pcs;
> >  };
> >
> >  static void socfpga_dwmac_fix_mac_speed(void *priv, unsigned int speed)
> >  {
> > struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv;
> > void __iomem *splitter_base = dwmac->splitter_base;
> > +   void __iomem *tse_pcs_base = dwmac->pcs.tse_pcs_base;
> > +   void __iomem *sgmii_adapter_base = dwmac->pcs.sgmii_adapter_base;
> > +   struct device *dev = dwmac->dev;
> > +   struct net_device *ndev = dev_get_drvdata(dev);
> > +   struct phy_device *phy_dev = ndev->phydev;
> > u32 val;
> >
> > -   if (!splitter_base)
> > -   return;
> > -
> > -   val = readl(splitter_base + EMAC_SPLITTER_CTRL_REG);
> > -   val &= ~EMAC_SPLITTER_CTRL_SPEED_MASK;
> > -
> > -   switch

Re: [PATCH v3 1/1] net: ethernet: Add TSE PCS support to dwmac-socfpga

2016-06-09 Thread Giuseppe CAVALLARO 

Hello Tien Hock

On 6/9/2016 7:48 AM, Tien Hock Loh wrote:

[snip]


 .../devicetree/bindings/net/socfpga-dwmac.txt  |   4 +
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   2 +-
 .../net/ethernet/stmicro/stmmac/dwmac-socfpga.c| 140 +--
 drivers/net/ethernet/stmicro/stmmac/tse_pcs.c  | 261 +
 drivers/net/ethernet/stmicro/stmmac/tse_pcs.h  |  36 +++
 5 files changed, 419 insertions(+), 24 deletions(-)
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/tse_pcs.c
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/tse_pcs.h


I just wonder if it could make sense to rename the
tse_pcs.[hc] files or creating a sub-directory for altera devel.
It seems that tse_pcs.[hc] are common files but this support
is for Altera.
Anyway, I let you decide and I also ask you to update the stmmac.txt
file.


Yeah the PCS support for TSE is Altera. To avoid confusion, let's rename
them, would altr_tse_pcs.[hc] be good? I don't think creating a
sub-directory with only 2 files is necessary though.


ok for two files w/o sub-dir.



I see that stmmac.txt is generic, and other vendor's PCS support
documents their specific uses in their own *-dwmac.txt (eg.
rockchip-dwmac.txt). Is this not the case?


yes you can use this name convention. I let you decide.

[snip]



+
+   index = of_property_match_string(np_sgmii_adapter, "reg-names",
+"eth_tse_control_port");


reg-names looks to be specific and mandatory, IMO they should be
documented in the binding.


That's the binding for the adapter (the phandle to the sgmii adapter),
not the stmac binding itself. Do you mean I should document the sgmii
adapter as well?


no I just meant for the adapter binding, I had understood that
eth_tse_control_port and gmii_to_sgmii_adapter_avalon_slave
were not documented and these seem to be mandatory.

[snip]


+
+static void auto_nego_timer_callback(unsigned long data)
+{
+   u16 val = 0;
+   u16 speed = 0;
+   u16 duplex = 0;
+
+   struct tse_pcs *pcs = (struct tse_pcs *)data;
+   void __iomem *tse_pcs_base = pcs->tse_pcs_base;
+   void __iomem *sgmii_adapter_base = pcs->sgmii_adapter_base;
+
+   val = readw(tse_pcs_base + TSE_PCS_STATUS_REG);
+   val &=  TSE_PCS_STATUS_AN_COMPLETED_MASK;


[snip]



ANE is completed but speed or duplex is NOK. Any failure to signalling?
I see that you then enable the adpter in any case.

Maybe we could try to restart ANE again or force it (reducing the speed)
I wonder what happens if, for some reason, there is some hw problem. In
that case the timer is always running signalling an invalid Parter
speed. Anyway, this is jus a question... I expect that this error will
always point us to a problem to debug further (if occurs).


Let me look at how we can handle the case. Perhaps we could do a restart
and register the timer again. I'm just worried it will go into an
infinite timer registering hogging up the kernel if the hardware really
fails. Maybe I can do a n-time retry here. Looking into this. Let me
know if you have any opinions on this.

I haven't been able to check for this behaviour though, negative testing
on this code isn't too easy to simulate.


yes and I expect this can occur on hw / conf problems. Take a look at
how the Physical Abstraction Layer manages this.
Indeed, we can try to restart ANE for a while and then just report the
failure (dev_err). Or we can try to fix other speed or duplex. But not
sure this is a good solution. We just mask a problem.

[snip]


+
+   setup_timer(>an_timer,
+   auto_nego_timer_callback,
+   (unsigned long)pcs);
+   mod_timer(>an_timer, jiffies +
+ msecs_to_jiffies(AUTONEGO_TIMER));
+   } else if (phy_dev->autoneg == AUTONEG_DISABLE) {
+   val = readw(tse_pcs_base + TSE_PCS_CONTROL_REG);
+   val &= ~TSE_PCS_CONTROL_AN_EN_MASK;
+   writew(val, tse_pcs_base + TSE_PCS_CONTROL_REG);
+
+   val = readw(tse_pcs_base + TSE_PCS_IF_MODE_REG);
+   val &= ~TSE_PCS_USE_SGMII_AN_MASK;
+   writew(val, tse_pcs_base + TSE_PCS_IF_MODE_REG);
+
+   val = readw(tse_pcs_base + TSE_PCS_IF_MODE_REG);
+   val &= ~TSE_PCS_SGMII_SPEED_MASK;
+
+   switch (speed) {
+   case 1000:
+   val |= TSE_PCS_SGMII_SPEED_1000;
+   break;
+   case 100:
+   val |= TSE_PCS_SGMII_SPEED_100;
+   break;
+   case 10:
+   val |= TSE_PCS_SGMII_SPEED_10;
+   break;
+   default:
+   return;
+   }
+   writew(val, tse_pcs_base + TSE_PCS_IF_MODE_REG);
+
+   tse_pcs_reset(tse_pcs_base, pcs);
+
+   setup_timer(>link_timer,
+

Re: [PATCH v3 1/1] net: ethernet: Add TSE PCS support to dwmac-socfpga

2016-06-08 Thread Rob Herring 
On Mon, Jun 06, 2016 at 08:01:56PM -0700, th...@altera.com wrote:
> From: Tien Hock Loh 
> 
> This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
> the dwmac is set to sgmii
> 
> Signed-off-by: Tien Hock Loh 
> 
> ---
> v2:
> - Refactored the TSE PCS out from the dwmac-socfpga.c file
> - Added binding documentation for TSE PCS sgmii adapter
> v3:
> - Added missing license header for new source files
> - Updated tse_pcs.h include headers
> - Standardize if statements
> ---
>  .../devicetree/bindings/net/socfpga-dwmac.txt  |   4 +
>  drivers/net/ethernet/stmicro/stmmac/Makefile   |   2 +-
>  .../net/ethernet/stmicro/stmmac/dwmac-socfpga.c| 140 +--
>  drivers/net/ethernet/stmicro/stmmac/tse_pcs.c  | 261 
> +
>  drivers/net/ethernet/stmicro/stmmac/tse_pcs.h  |  36 +++
>  5 files changed, 419 insertions(+), 24 deletions(-)
>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/tse_pcs.c
>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/tse_pcs.h
> 
> diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt 
> b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
> index 3a9d679..2bc39f1 100644
> --- a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
> +++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
> @@ -15,6 +15,8 @@ Required properties:
>  Optional properties:
>  altr,emac-splitter: Should be the phandle to the emac splitter soft IP node 
> if
>   DWMAC controller is connected emac splitter.
> +phy-mode: The phy mode the ethernet operates in
> +altr,sgmii_to_sgmii_converter: phandle to the TSE SGMII converter

Use '-' rather than '_'.

With that, for the binding:

Acked-by: Rob Herring

Re: [PATCH v3 1/1] net: ethernet: Add TSE PCS support to dwmac-socfpga

2016-06-07 Thread Giuseppe CAVALLARO 

Hello

On 6/7/2016 5:01 AM, th...@altera.com wrote:

From: Tien Hock Loh 

This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
the dwmac is set to sgmii

Signed-off-by: Tien Hock Loh 

---
v2:
- Refactored the TSE PCS out from the dwmac-socfpga.c file
- Added binding documentation for TSE PCS sgmii adapter
v3:
- Added missing license header for new source files
- Updated tse_pcs.h include headers
- Standardize if statements
---
 .../devicetree/bindings/net/socfpga-dwmac.txt  |   4 +
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   2 +-
 .../net/ethernet/stmicro/stmmac/dwmac-socfpga.c| 140 +--
 drivers/net/ethernet/stmicro/stmmac/tse_pcs.c  | 261 +
 drivers/net/ethernet/stmicro/stmmac/tse_pcs.h  |  36 +++
 5 files changed, 419 insertions(+), 24 deletions(-)
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/tse_pcs.c
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/tse_pcs.h


I just wonder if it could make sense to rename the
tse_pcs.[hc] files or creating a sub-directory for altera devel.
It seems that tse_pcs.[hc] are common files but this support
is for Altera.
Anyway, I let you decide and I also ask you to update the stmmac.txt
file.


diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt 
b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
index 3a9d679..2bc39f1 100644
--- a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
+++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
@@ -15,6 +15,8 @@ Required properties:
 Optional properties:
 altr,emac-splitter: Should be the phandle to the emac splitter soft IP node if
DWMAC controller is connected emac splitter.
+phy-mode: The phy mode the ethernet operates in
+altr,sgmii_to_sgmii_converter: phandle to the TSE SGMII converter

 Example:

@@ -28,4 +30,6 @@ gmac0: ethernet@ff70 {
mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
clocks = <_0_clk>;
clock-names = "stmmaceth";
+   phy-mode = "sgmii";
+   altr,gmii_to_sgmii_converter = <_1_gmii_to_sgmii_converter_0>;
 };
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile 
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 73c2715..29c1dee 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -6,7 +6,7 @@ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o 
ring_mode.o  \

 obj-$(CONFIG_STMMAC_PLATFORM) += stmmac-platform.o
 stmmac-platform-objs:= stmmac_platform.o dwmac-meson.o dwmac-sunxi.o   \
-  dwmac-sti.o dwmac-socfpga.o dwmac-rk.o
+  dwmac-sti.o dwmac-socfpga.o dwmac-rk.o tse_pcs.o

 obj-$(CONFIG_STMMAC_PCI) += stmmac-pci.o
 stmmac-pci-objs:= stmmac_pci.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
index 3f9588e..88fba4e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -27,6 +27,8 @@
 #include "stmmac.h"
 #include "stmmac_platform.h"

+#include "tse_pcs.h"
+
 #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0
 #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII 0x1
 #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII 0x2
@@ -47,48 +49,60 @@ struct socfpga_dwmac {
struct regmap *sys_mgr_base_addr;
struct reset_control *stmmac_rst;
void __iomem *splitter_base;
+   struct tse_pcs pcs;
 };

 static void socfpga_dwmac_fix_mac_speed(void *priv, unsigned int speed)
 {
struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv;
void __iomem *splitter_base = dwmac->splitter_base;
+   void __iomem *tse_pcs_base = dwmac->pcs.tse_pcs_base;
+   void __iomem *sgmii_adapter_base = dwmac->pcs.sgmii_adapter_base;
+   struct device *dev = dwmac->dev;
+   struct net_device *ndev = dev_get_drvdata(dev);
+   struct phy_device *phy_dev = ndev->phydev;
u32 val;

-   if (!splitter_base)
-   return;
-
-   val = readl(splitter_base + EMAC_SPLITTER_CTRL_REG);
-   val &= ~EMAC_SPLITTER_CTRL_SPEED_MASK;
-
-   switch (speed) {
-   case 1000:
-   val |= EMAC_SPLITTER_CTRL_SPEED_1000;
-   break;
-   case 100:
-   val |= EMAC_SPLITTER_CTRL_SPEED_100;
-   break;
-   case 10:
-   val |= EMAC_SPLITTER_CTRL_SPEED_10;
-   break;
-   default:
-   return;
+   if (splitter_base) {
+   val = readl(splitter_base + EMAC_SPLITTER_CTRL_REG);
+   val &= ~EMAC_SPLITTER_CTRL_SPEED_MASK;
+
+   switch (speed) {
+   case 1000:
+   val |= EMAC_SPLITTER_CTRL_SPEED_1000;
+   break;
+   case 100:
+   val |= EMAC_SPLITTER_CTRL_SPEED_100;
+   break;
+

[PATCH v3 1/1] net: ethernet: Add TSE PCS support to dwmac-socfpga

2016-06-06 Thread thloh 
From: Tien Hock Loh 

This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
the dwmac is set to sgmii

Signed-off-by: Tien Hock Loh 

---
v2:
- Refactored the TSE PCS out from the dwmac-socfpga.c file
- Added binding documentation for TSE PCS sgmii adapter
v3:
- Added missing license header for new source files
- Updated tse_pcs.h include headers
- Standardize if statements
---
 .../devicetree/bindings/net/socfpga-dwmac.txt  |   4 +
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   2 +-
 .../net/ethernet/stmicro/stmmac/dwmac-socfpga.c| 140 +--
 drivers/net/ethernet/stmicro/stmmac/tse_pcs.c  | 261 +
 drivers/net/ethernet/stmicro/stmmac/tse_pcs.h  |  36 +++
 5 files changed, 419 insertions(+), 24 deletions(-)
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/tse_pcs.c
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/tse_pcs.h

diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt 
b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
index 3a9d679..2bc39f1 100644
--- a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
+++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
@@ -15,6 +15,8 @@ Required properties:
 Optional properties:
 altr,emac-splitter: Should be the phandle to the emac splitter soft IP node if
DWMAC controller is connected emac splitter.
+phy-mode: The phy mode the ethernet operates in
+altr,sgmii_to_sgmii_converter: phandle to the TSE SGMII converter
 
 Example:
 
@@ -28,4 +30,6 @@ gmac0: ethernet@ff70 {
mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
clocks = <_0_clk>;
clock-names = "stmmaceth";
+   phy-mode = "sgmii";
+   altr,gmii_to_sgmii_converter = <_1_gmii_to_sgmii_converter_0>;
 };
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile 
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 73c2715..29c1dee 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -6,7 +6,7 @@ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o 
ring_mode.o  \
 
 obj-$(CONFIG_STMMAC_PLATFORM) += stmmac-platform.o
 stmmac-platform-objs:= stmmac_platform.o dwmac-meson.o dwmac-sunxi.o   \
-  dwmac-sti.o dwmac-socfpga.o dwmac-rk.o
+  dwmac-sti.o dwmac-socfpga.o dwmac-rk.o tse_pcs.o
 
 obj-$(CONFIG_STMMAC_PCI) += stmmac-pci.o
 stmmac-pci-objs:= stmmac_pci.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
index 3f9588e..88fba4e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -27,6 +27,8 @@
 #include "stmmac.h"
 #include "stmmac_platform.h"
 
+#include "tse_pcs.h"
+
 #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0
 #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII 0x1
 #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII 0x2
@@ -47,48 +49,60 @@ struct socfpga_dwmac {
struct regmap *sys_mgr_base_addr;
struct reset_control *stmmac_rst;
void __iomem *splitter_base;
+   struct tse_pcs pcs;
 };
 
 static void socfpga_dwmac_fix_mac_speed(void *priv, unsigned int speed)
 {
struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv;
void __iomem *splitter_base = dwmac->splitter_base;
+   void __iomem *tse_pcs_base = dwmac->pcs.tse_pcs_base;
+   void __iomem *sgmii_adapter_base = dwmac->pcs.sgmii_adapter_base;
+   struct device *dev = dwmac->dev;
+   struct net_device *ndev = dev_get_drvdata(dev);
+   struct phy_device *phy_dev = ndev->phydev;
u32 val;
 
-   if (!splitter_base)
-   return;
-
-   val = readl(splitter_base + EMAC_SPLITTER_CTRL_REG);
-   val &= ~EMAC_SPLITTER_CTRL_SPEED_MASK;
-
-   switch (speed) {
-   case 1000:
-   val |= EMAC_SPLITTER_CTRL_SPEED_1000;
-   break;
-   case 100:
-   val |= EMAC_SPLITTER_CTRL_SPEED_100;
-   break;
-   case 10:
-   val |= EMAC_SPLITTER_CTRL_SPEED_10;
-   break;
-   default:
-   return;
+   if (splitter_base) {
+   val = readl(splitter_base + EMAC_SPLITTER_CTRL_REG);
+   val &= ~EMAC_SPLITTER_CTRL_SPEED_MASK;
+
+   switch (speed) {
+   case 1000:
+   val |= EMAC_SPLITTER_CTRL_SPEED_1000;
+   break;
+   case 100:
+   val |= EMAC_SPLITTER_CTRL_SPEED_100;
+   break;
+   case 10:
+   val |= EMAC_SPLITTER_CTRL_SPEED_10;
+   break;
+   default:
+   return;
+   }
+   writel(val, splitter_base + EMAC_SPLITTER_CTRL_REG);
}
 
-   writel(val, splitter_base +