[PATCH v3 5/9] ARM: dts: sun8i-h3: add sun8i-emac ethernet driver

[Corentin Labbe]

The sun8i-emac is an ethernet MAC hardware that support 10/100/1000
speed.

This patch enable the sun8i-emac on the Allwinner H3 SoC Device-tree.
The SoC H3 have an internal PHY, so optionals syscon and ephy are set.

Signed-off-by: Corentin Labbe 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index a39da6f..a3ac476 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -50,6 +50,10 @@
 / {
interrupt-parent = <&gic>;
 
+   aliases {
+   ethernet0 = &emac;
+   };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -446,6 +450,21 @@
status = "disabled";
};
 
+   emac: ethernet@1c3 {
+   compatible = "allwinner,sun8i-h3-emac";
+   syscon = <&syscon>;
+   reg = <0x01c3 0x104>;
+   reg-names = "emac";
+   interrupts = ;
+   resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>;
+   reset-names = "ahb", "ephy";
+   clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>;
+   clock-names = "ahb", "ephy";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
-- 
2.7.3

Re: [PATCH v3 5/9] ARM: dts: sun8i-h3: add sun8i-emac ethernet driver

[Maxime Ripard]

On Fri, Sep 09, 2016 at 02:45:13PM +0200, Corentin Labbe wrote:
> The sun8i-emac is an ethernet MAC hardware that support 10/100/1000
> speed.
> 
> This patch enable the sun8i-emac on the Allwinner H3 SoC Device-tree.
> The SoC H3 have an internal PHY, so optionals syscon and ephy are set.
> 
> Signed-off-by: Corentin Labbe 
> ---
>  arch/arm/boot/dts/sun8i-h3.dtsi | 19 +++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index a39da6f..a3ac476 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -50,6 +50,10 @@
>  / {
>   interrupt-parent = <&gic>;
>  
> + aliases {
> + ethernet0 = &emac;
> + };
> +

This needs to be done at the board level.

>   cpus {
>   #address-cells = <1>;
>   #size-cells = <0>;
> @@ -446,6 +450,21 @@
>   status = "disabled";
>   };
>  
> + emac: ethernet@1c3 {
> + compatible = "allwinner,sun8i-h3-emac";
> + syscon = <&syscon>;
> + reg = <0x01c3 0x104>;
> + reg-names = "emac";

You don't need reg-names anymore.

> + interrupts = ;
> + resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>;
> + reset-names = "ahb", "ephy";
> + clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>;
> + clock-names = "ahb", "ephy";

I still believe that having the same node for both the PHY and the MAC
is wrong.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com


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Re: [PATCH v3 5/9] ARM: dts: sun8i-h3: add sun8i-emac ethernet driver

[LABBE Corentin]

On Mon, Sep 12, 2016 at 09:29:33AM +0200, Maxime Ripard wrote:
> On Fri, Sep 09, 2016 at 02:45:13PM +0200, Corentin Labbe wrote:
> > The sun8i-emac is an ethernet MAC hardware that support 10/100/1000
> > speed.
> > 
> > This patch enable the sun8i-emac on the Allwinner H3 SoC Device-tree.
> > The SoC H3 have an internal PHY, so optionals syscon and ephy are set.
> > 
> > Signed-off-by: Corentin Labbe 
> > ---
> >  arch/arm/boot/dts/sun8i-h3.dtsi | 19 +++
> >  1 file changed, 19 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi 
> > b/arch/arm/boot/dts/sun8i-h3.dtsi
> > index a39da6f..a3ac476 100644
> > --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> > @@ -50,6 +50,10 @@
> >  / {
> > interrupt-parent = <&gic>;
> >  
> > +   aliases {
> > +   ethernet0 = &emac;
> > +   };
> > +
> 
> This needs to be done at the board level.
> 

ok

> > cpus {
> > #address-cells = <1>;
> > #size-cells = <0>;
> > @@ -446,6 +450,21 @@
> > status = "disabled";
> > };
> >  
> > +   emac: ethernet@1c3 {
> > +   compatible = "allwinner,sun8i-h3-emac";
> > +   syscon = <&syscon>;
> > +   reg = <0x01c3 0x104>;
> > +   reg-names = "emac";
> 
> You don't need reg-names anymore.
> 

ok

> > +   interrupts = ;
> > +   resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>;
> > +   reset-names = "ahb", "ephy";
> > +   clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>;
> > +   clock-names = "ahb", "ephy";
> 
> I still believe that having the same node for both the PHY and the MAC
> is wrong.
> 

Ok I have moved clock/reset of ephy in its node.

Thanks

Regards

Corentin Labbe