Add Ethernet node with Internal PHY selection for the Amlogic GXL SoCs
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 45 ++
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index d1bf381..71670c3 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -47,6 +47,24 @@
/ {
compatible = "amlogic,meson-gxl";
+
+
+};
+
+ {
+ reg = <0x0 0xc941 0x0 0x1
+ 0x0 0xc8834540 0x0 0x4>;
+
+ clocks = < CLKID_ETH>,
+< CLKID_FCLK_DIV2>,
+< CLKID_MPLL2>;
+ clock-names = "stmmaceth", "clkin0", "clkin1";
+
+ mdio0: mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ };
};
{
@@ -214,6 +232,33 @@
};
};
};
+
+ eth-phy-mux {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x55c 0x0 0x4>;
+ mux-mask = <0x>;
+ mdio-parent-bus = <>;
+
+ internal_mdio: mdio@e40908ff {
+ reg = <0xe40908ff>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ internal_phy: ethernet-phy@8 {
+ compatible = "ethernet-phy-id0181.4400",
"ethernet-phy-ieee802.3-c22";
+ reg = <8>;
+ max-speed = <100>;
+ };
+ };
+
+ external_mdio: mdio@2009087f {
+ reg = <0x2009087f>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
};
{
--
1.9.1