RE: [v8, 1/7] Documentation: DT: update Freescale DCFG compatible
Hi Mark, > -Original Message- > From: Mark Rutland [mailto:mark.rutl...@arm.com] > Sent: Friday, April 22, 2016 9:12 PM > To: Yangbo Lu > Cc: linux-...@vger.kernel.org; linuxppc-...@lists.ozlabs.org; > devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux- > ker...@vger.kernel.org; linux-...@vger.kernel.org; linux- > i...@vger.kernel.org; io...@lists.linux-foundation.org; > netdev@vger.kernel.org; ulf.hans...@linaro.org; Scott Wood; Rob Herring; > Russell King; Jochen Friedrich; Joerg Roedel; Claudiu Manoil; Bhupesh > Sharma; Zhao Qiang; Kumar Gala; Santosh Shilimkar; Yang-Leo Li; Xiaobo > Xie > Subject: Re: [v8, 1/7] Documentation: DT: update Freescale DCFG > compatible > > On Fri, Apr 22, 2016 at 02:27:38PM +0800, Yangbo Lu wrote: > > Update Freescale DCFG compatible with 'fsl,-dcfg' instead of > > 'fsl,ls1021a-dcfg' to include more chips. > > > > Signed-off-by: Yangbo Lu <yangbo...@nxp.com> > > --- > > Changes for v8: > > - Added this patch > > --- > > Documentation/devicetree/bindings/arm/fsl.txt | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/Documentation/devicetree/bindings/arm/fsl.txt > > b/Documentation/devicetree/bindings/arm/fsl.txt > > index 752a685..1d5f512 100644 > > --- a/Documentation/devicetree/bindings/arm/fsl.txt > > +++ b/Documentation/devicetree/bindings/arm/fsl.txt > > @@ -119,7 +119,7 @@ Freescale DCFG > > configuration and status for the device. Such as setting the > > secondary core start address and release the secondary core from > holdoff and startup. > >Required properties: > > - - compatible: should be "fsl,ls1021a-dcfg" > > + - compatible: should be "fsl,-dcfg" > > Please list specific values expected for , while jusy saying > may be more generic, it makes it practically impossible to search for the > correct binding given a compatible string, and it's vague as to exaclty > what should be. [Lu Yangbo-B47093] Thanks for your comment. I will list the possible chips. > > Thanks, > Mark. > > > > >- reg : should contain base address and length of DCFG > > memory-mapped registers > > > > Example: > > -- > > 2.1.0.27.g96db324 > > > > -- > > To unsubscribe from this list: send the line "unsubscribe devicetree" > > in the body of a message to majord...@vger.kernel.org More majordomo > > info at http://vger.kernel.org/majordomo-info.html > >
Re: [v8, 1/7] Documentation: DT: update Freescale DCFG compatible
On Fri, Apr 22, 2016 at 02:27:38PM +0800, Yangbo Lu wrote: > Update Freescale DCFG compatible with 'fsl,-dcfg' instead > of 'fsl,ls1021a-dcfg' to include more chips. > > Signed-off-by: Yangbo Lu> --- > Changes for v8: > - Added this patch > --- > Documentation/devicetree/bindings/arm/fsl.txt | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/arm/fsl.txt > b/Documentation/devicetree/bindings/arm/fsl.txt > index 752a685..1d5f512 100644 > --- a/Documentation/devicetree/bindings/arm/fsl.txt > +++ b/Documentation/devicetree/bindings/arm/fsl.txt > @@ -119,7 +119,7 @@ Freescale DCFG > configuration and status for the device. Such as setting the secondary > core start address and release the secondary core from holdoff and startup. >Required properties: > - - compatible: should be "fsl,ls1021a-dcfg" > + - compatible: should be "fsl,-dcfg" Please list specific values expected for , while jusy saying may be more generic, it makes it practically impossible to search for the correct binding given a compatible string, and it's vague as to exaclty what should be. Thanks, Mark. >- reg : should contain base address and length of DCFG memory-mapped > registers > > Example: > -- > 2.1.0.27.g96db324 > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in > the body of a message to majord...@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html >
[v8, 1/7] Documentation: DT: update Freescale DCFG compatible
Update Freescale DCFG compatible with 'fsl,-dcfg' instead of 'fsl,ls1021a-dcfg' to include more chips. Signed-off-by: Yangbo Lu--- Changes for v8: - Added this patch --- Documentation/devicetree/bindings/arm/fsl.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt index 752a685..1d5f512 100644 --- a/Documentation/devicetree/bindings/arm/fsl.txt +++ b/Documentation/devicetree/bindings/arm/fsl.txt @@ -119,7 +119,7 @@ Freescale DCFG configuration and status for the device. Such as setting the secondary core start address and release the secondary core from holdoff and startup. Required properties: - - compatible: should be "fsl,ls1021a-dcfg" + - compatible: should be "fsl,-dcfg" - reg : should contain base address and length of DCFG memory-mapped registers Example: -- 2.1.0.27.g96db324