[Nouveau] [PATCH 04/19] clk: print the base clocks
Signed-off-by: Karol Herbst--- drm/nouveau/nvkm/subdev/clk/base.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drm/nouveau/nvkm/subdev/clk/base.c b/drm/nouveau/nvkm/subdev/clk/base.c index 889cce2..4928668 100644 --- a/drm/nouveau/nvkm/subdev/clk/base.c +++ b/drm/nouveau/nvkm/subdev/clk/base.c @@ -24,6 +24,7 @@ #include "priv.h" #include +#include #include #include #include @@ -561,10 +562,24 @@ int nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device, int index, bool allow_reclock, struct nvkm_clk *clk) { + struct nvkm_subdev *subdev = >subdev; + struct nvkm_bios *bios = device->bios; int ret, idx, arglen; const char *mode; + struct nvbios_baseclk_header h; + + nvkm_subdev_ctor(_clk, device, index, 0, subdev); + + if (bios && !nvbios_baseclock_parse(bios, )) { + struct nvbios_baseclk_entry base, boost; + if (!nvbios_baseclock_entry(bios, , h.boost, )) + nvkm_info(subdev, "boost: %i MHz\n", + boost.clock_mhz / 2); + if (!nvbios_baseclock_entry(bios, , h.base, )) + nvkm_info(subdev, "base: %i MHz\n", + base.clock_mhz / 2); + } - nvkm_subdev_ctor(_clk, device, index, 0, >subdev); clk->func = func; INIT_LIST_HEAD(>states); clk->domains = func->domains; -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH 02/19] volt: properly detect entry based voltage tables
there is a field in the voltage table which tells us if the VIDs are taken from the entries or calculated through the header v2: don't break older versions Signed-off-by: Karol HerbstReviewed-by: Martin Peres --- drm/nouveau/include/nvkm/subdev/bios/volt.h | 5 ++-- drm/nouveau/nvkm/subdev/bios/volt.c | 42 - drm/nouveau/nvkm/subdev/volt/base.c | 8 -- 3 files changed, 33 insertions(+), 22 deletions(-) diff --git a/drm/nouveau/include/nvkm/subdev/bios/volt.h b/drm/nouveau/include/nvkm/subdev/bios/volt.h index b0df610..0d91c24 100644 --- a/drm/nouveau/include/nvkm/subdev/bios/volt.h +++ b/drm/nouveau/include/nvkm/subdev/bios/volt.h @@ -13,8 +13,9 @@ struct nvbios_volt { u32 base; /* GPIO mode */ - u8 vidmask; - s16 step; + bool entry_based; + u8 vidmask; + s16 step; /* PWM mode */ u32 pwm_freq; diff --git a/drm/nouveau/nvkm/subdev/bios/volt.c b/drm/nouveau/nvkm/subdev/bios/volt.c index 81a47b2..70e1f9d 100644 --- a/drm/nouveau/nvkm/subdev/bios/volt.c +++ b/drm/nouveau/nvkm/subdev/bios/volt.c @@ -73,30 +73,34 @@ nvbios_volt_parse(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, memset(info, 0x00, sizeof(*info)); switch (!!volt * *ver) { case 0x12: - info->type= NVBIOS_VOLT_GPIO; - info->vidmask = nvbios_rd08(bios, volt + 0x04); + info->type= NVBIOS_VOLT_GPIO; + info->vidmask = nvbios_rd08(bios, volt + 0x04); + info->entry_based = true; break; case 0x20: - info->type= NVBIOS_VOLT_GPIO; - info->vidmask = nvbios_rd08(bios, volt + 0x05); + info->type= NVBIOS_VOLT_GPIO; + info->vidmask = nvbios_rd08(bios, volt + 0x05); + info->entry_based = true; break; case 0x30: - info->type= NVBIOS_VOLT_GPIO; - info->vidmask = nvbios_rd08(bios, volt + 0x04); + info->type= NVBIOS_VOLT_GPIO; + info->vidmask = nvbios_rd08(bios, volt + 0x04); + info->entry_based = true; break; case 0x40: - info->type= NVBIOS_VOLT_GPIO; - info->base= nvbios_rd32(bios, volt + 0x04); - info->step= nvbios_rd16(bios, volt + 0x08); - info->vidmask = nvbios_rd08(bios, volt + 0x0b); + info->type= NVBIOS_VOLT_GPIO; + info->base= nvbios_rd32(bios, volt + 0x04); + info->step= nvbios_rd16(bios, volt + 0x08); + info->vidmask = nvbios_rd08(bios, volt + 0x0b); + info->entry_based = false; /* XXX: find the flag byte */ /*XXX*/ - info->min = 0; - info->max = info->base; + info->min = 0; + info->max = info->base; break; case 0x50: - info->min = nvbios_rd32(bios, volt + 0x0a); - info->max = nvbios_rd32(bios, volt + 0x0e); - info->base= nvbios_rd32(bios, volt + 0x12) & 0x00ff; + info->min = nvbios_rd32(bios, volt + 0x0a); + info->max = nvbios_rd32(bios, volt + 0x0e); + info->base = nvbios_rd32(bios, volt + 0x12) & 0x00ff; /* offset 4 seems to be a flag byte */ if (nvbios_rd32(bios, volt + 0x4) & 1) { @@ -104,9 +108,11 @@ nvbios_volt_parse(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, info->pwm_freq = nvbios_rd32(bios, volt + 0x5) / 1000; info->pwm_range = nvbios_rd32(bios, volt + 0x16); } else { - info->type = NVBIOS_VOLT_GPIO; - info->vidmask = nvbios_rd08(bios, volt + 0x06); - info->step = nvbios_rd16(bios, volt + 0x16); + info->type= NVBIOS_VOLT_GPIO; + info->vidmask = nvbios_rd08(bios, volt + 0x06); + info->step= nvbios_rd16(bios, volt + 0x16); + info->entry_based = + !(nvbios_rd08(bios, volt + 0x4) & 0x2); } break; } diff --git a/drm/nouveau/nvkm/subdev/volt/base.c b/drm/nouveau/nvkm/subdev/volt/base.c index 50b5649..ef653b1 100644 --- a/drm/nouveau/nvkm/subdev/volt/base.c +++ b/drm/nouveau/nvkm/subdev/volt/base.c @@ -112,6 +112,7 @@ nvkm_volt_set_id(struct nvkm_volt *volt, u8 id, int condition) static void nvkm_volt_parse_bios(struct nvkm_bios *bios, struct nvkm_volt *volt) { + struct nvkm_subdev *subdev = >subdev; struct nvbios_volt_entry ivid; struct
[Nouveau] [PATCH 11/19] clk: export nvkm_volt_map
before clocking to a cstate, we have to check if the voltage is within the allowed range Signed-off-by: Karol Herbst--- drm/nouveau/include/nvkm/subdev/volt.h | 1 + drm/nouveau/nvkm/subdev/volt/base.c| 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drm/nouveau/include/nvkm/subdev/volt.h b/drm/nouveau/include/nvkm/subdev/volt.h index e966266..e8637b9 100644 --- a/drm/nouveau/include/nvkm/subdev/volt.h +++ b/drm/nouveau/include/nvkm/subdev/volt.h @@ -19,6 +19,7 @@ struct nvkm_volt { u8 max1_vid; }; +int nvkm_volt_map(struct nvkm_volt *volt, u8 id); int nvkm_volt_map_min(struct nvkm_volt *volt, u8 id); int nvkm_volt_get(struct nvkm_volt *); int nvkm_volt_set_id(struct nvkm_volt *, u8 id, u8 min_id, int condition); diff --git a/drm/nouveau/nvkm/subdev/volt/base.c b/drm/nouveau/nvkm/subdev/volt/base.c index a7f8c76..c4fde8f 100644 --- a/drm/nouveau/nvkm/subdev/volt/base.c +++ b/drm/nouveau/nvkm/subdev/volt/base.c @@ -87,7 +87,7 @@ nvkm_volt_map_min(struct nvkm_volt *volt, u8 id) return id ? id * 1 : -ENODEV; } -static int +int nvkm_volt_map(struct nvkm_volt *volt, u8 id) { struct nvkm_bios *bios = volt->subdev.device->bios; -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH 10/19] volt: add min_id parameter to nvkm_volt_set_id
min_id indicates a volt map entry which acts as a floor value, this will be used to set the lower voltage limit through pstates Signed-off-by: Karol Herbst--- drm/nouveau/include/nvkm/subdev/volt.h | 2 +- drm/nouveau/nvkm/subdev/clk/base.c | 6 -- drm/nouveau/nvkm/subdev/volt/base.c| 5 - 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/drm/nouveau/include/nvkm/subdev/volt.h b/drm/nouveau/include/nvkm/subdev/volt.h index 3e0f8da..e966266 100644 --- a/drm/nouveau/include/nvkm/subdev/volt.h +++ b/drm/nouveau/include/nvkm/subdev/volt.h @@ -21,7 +21,7 @@ struct nvkm_volt { int nvkm_volt_map_min(struct nvkm_volt *volt, u8 id); int nvkm_volt_get(struct nvkm_volt *); -int nvkm_volt_set_id(struct nvkm_volt *, u8 id, int condition); +int nvkm_volt_set_id(struct nvkm_volt *, u8 id, u8 min_id, int condition); int nv40_volt_new(struct nvkm_device *, int, struct nvkm_volt **); int gk104_volt_new(struct nvkm_device *, int, struct nvkm_volt **); diff --git a/drm/nouveau/nvkm/subdev/clk/base.c b/drm/nouveau/nvkm/subdev/clk/base.c index 5b8e1df..00271a9 100644 --- a/drm/nouveau/nvkm/subdev/clk/base.c +++ b/drm/nouveau/nvkm/subdev/clk/base.c @@ -100,7 +100,8 @@ nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) } if (volt) { - ret = nvkm_volt_set_id(volt, cstate->voltage, +1); + ret = nvkm_volt_set_id(volt, cstate->voltage, + pstate->base.voltage, +1); if (ret && ret != -ENODEV) { nvkm_error(subdev, "failed to raise voltage: %d\n", ret); return ret; @@ -114,7 +115,8 @@ nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) } if (volt) { - ret = nvkm_volt_set_id(volt, cstate->voltage, -1); + ret = nvkm_volt_set_id(volt, cstate->voltage, + pstate->base.voltage, -1); if (ret && ret != -ENODEV) nvkm_error(subdev, "failed to lower voltage: %d\n", ret); } diff --git a/drm/nouveau/nvkm/subdev/volt/base.c b/drm/nouveau/nvkm/subdev/volt/base.c index 205dfcf..a7f8c76 100644 --- a/drm/nouveau/nvkm/subdev/volt/base.c +++ b/drm/nouveau/nvkm/subdev/volt/base.c @@ -110,7 +110,7 @@ nvkm_volt_map(struct nvkm_volt *volt, u8 id) } int -nvkm_volt_set_id(struct nvkm_volt *volt, u8 id, int condition) +nvkm_volt_set_id(struct nvkm_volt *volt, u8 id, u8 min_id, int condition) { int ret; @@ -123,6 +123,9 @@ nvkm_volt_set_id(struct nvkm_volt *volt, u8 id, int condition) if (!condition || prev < 0 || (condition < 0 && ret < prev) || (condition > 0 && ret > prev)) { + int min = nvkm_volt_map(volt, min_id); + if (min >= 0) + ret = max(min, ret); ret = nvkm_volt_set(volt, ret); } else { ret = 0; -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
Re: [Nouveau] [RFC mesa] nouveau: Add support for OpenCL global memory buffers
Hi, On 14-03-16 21:50, Samuel Pitoiset wrote: Btw, do you need someone with commit access to push your previous series (the tgsi thing)? I can do this for you. Thanks for the offer. IIRC Ilia wanted some minor fixes there, so I'll do a v2 tomorrow. Talking about commit rights, I guess it would be convenient for all if I would get commit rights myself? I promise I won't push anythings without acks. Yes sure, I trust you, no worries. :-) I already have a freedesktop.org account, my username is jwrdegoede. Please open a ticket on bugs.freedesktop to ask for commit rights. Done: https://bugs.freedesktop.org/show_bug.cgi?id=94594 Can you or Ilia please ack this ? Thanks, Hans ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
Re: [Nouveau] [PATCH v2 2/2] volt: properly detect entry based voltage tables
On 16/03/16 20:17, Karol Herbst wrote: there is a field in the voltage table which tells us if the VIDs are taken from the entries or calculated through the header v2: don't break older versions of the table Signed-off-by: Karol Herbst--- drm/nouveau/include/nvkm/subdev/bios/volt.h | 5 +-- drm/nouveau/nvkm/subdev/bios/volt.c | 47 - drm/nouveau/nvkm/subdev/volt/base.c | 7 +++-- 3 files changed, 34 insertions(+), 25 deletions(-) diff --git a/drm/nouveau/include/nvkm/subdev/bios/volt.h b/drm/nouveau/include/nvkm/subdev/bios/volt.h index b0df610..0d91c24 100644 --- a/drm/nouveau/include/nvkm/subdev/bios/volt.h +++ b/drm/nouveau/include/nvkm/subdev/bios/volt.h @@ -13,8 +13,9 @@ struct nvbios_volt { u32 base; /* GPIO mode */ - u8 vidmask; - s16 step; + bool entry_based; + u8 vidmask; + s16 step; /* PWM mode */ u32 pwm_freq; diff --git a/drm/nouveau/nvkm/subdev/bios/volt.c b/drm/nouveau/nvkm/subdev/bios/volt.c index 81a47b2..77e7b75 100644 --- a/drm/nouveau/nvkm/subdev/bios/volt.c +++ b/drm/nouveau/nvkm/subdev/bios/volt.c @@ -73,40 +73,45 @@ nvbios_volt_parse(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, memset(info, 0x00, sizeof(*info)); switch (!!volt * *ver) { case 0x12: - info->type= NVBIOS_VOLT_GPIO; - info->vidmask = nvbios_rd08(bios, volt + 0x04); + info->type= NVBIOS_VOLT_GPIO; + info->vidmask = nvbios_rd08(bios, volt + 0x04); + info->entry_based = true; break; case 0x20: - info->type= NVBIOS_VOLT_GPIO; - info->vidmask = nvbios_rd08(bios, volt + 0x05); + info->type= NVBIOS_VOLT_GPIO; + info->vidmask = nvbios_rd08(bios, volt + 0x05); + info->entry_based = true; break; case 0x30: - info->type= NVBIOS_VOLT_GPIO; - info->vidmask = nvbios_rd08(bios, volt + 0x04); + info->type= NVBIOS_VOLT_GPIO; + info->vidmask = nvbios_rd08(bios, volt + 0x04); + info->entry_based = true; break; case 0x40: - info->type= NVBIOS_VOLT_GPIO; - info->base= nvbios_rd32(bios, volt + 0x04); - info->step= nvbios_rd16(bios, volt + 0x08); - info->vidmask = nvbios_rd08(bios, volt + 0x0b); + info->type= NVBIOS_VOLT_GPIO; + info->base= nvbios_rd32(bios, volt + 0x04); + info->step= nvbios_rd16(bios, volt + 0x08); + info->vidmask = nvbios_rd08(bios, volt + 0x0b); + info->entry_based = false; /* XXX: check for it */ /* Overridden when parsing the flag byte */ /*XXX*/ - info->min = 0; - info->max = info->base; + info->min = 0; + info->max = info->base; break; case 0x50: - info->min = nvbios_rd32(bios, volt + 0x0a); - info->max = nvbios_rd32(bios, volt + 0x0e); - info->base= nvbios_rd32(bios, volt + 0x12) & 0x00ff; + info->min = nvbios_rd32(bios, volt + 0x0a); + info->max = nvbios_rd32(bios, volt + 0x0e); + info->base= nvbios_rd32(bios, volt + 0x12) & 0x00ff; /* offset 4 seems to be a flag byte */ if (nvbios_rd32(bios, volt + 0x4) & 1) { - info->type = NVBIOS_VOLT_PWM; - info->pwm_freq = nvbios_rd32(bios, volt + 0x5) / 1000; - info->pwm_range = nvbios_rd32(bios, volt + 0x16); + info->type= NVBIOS_VOLT_PWM; + info->pwm_freq= nvbios_rd32(bios, volt + 0x5) / 1000; + info->pwm_range = nvbios_rd32(bios, volt + 0x16); } else { - info->type = NVBIOS_VOLT_GPIO; - info->vidmask = nvbios_rd08(bios, volt + 0x06); - info->step = nvbios_rd16(bios, volt + 0x16); + info->type= NVBIOS_VOLT_GPIO; + info->vidmask = nvbios_rd08(bios, volt + 0x06); + info->step= nvbios_rd16(bios, volt + 0x16); + info->entry_based = !(nvbios_rd08(bios, volt + 0x4) & 0x2); } break; } diff --git a/drm/nouveau/nvkm/subdev/volt/base.c b/drm/nouveau/nvkm/subdev/volt/base.c index 50b5649..4653f3f 100644 --- a/drm/nouveau/nvkm/subdev/volt/base.c +++ b/drm/nouveau/nvkm/subdev/volt/base.c @@ -112,6 +112,7 @@ nvkm_volt_set_id(struct nvkm_volt *volt, u8 id, int
[Nouveau] [PATCH 16/19] clk: respect voltage limits in nvkm_cstate_prog with cstate = -1
we should never allow to select a cstate which current voltage (depending on the temperature) is higher than 1. the max volt entries in the voltage map table 2. what tha gpu actually can volt to this resolves most of the remaining volting errors on fermi and newer Signed-off-by: Karol Herbst--- drm/nouveau/nvkm/subdev/clk/base.c | 54 -- 1 file changed, 52 insertions(+), 2 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/clk/base.c b/drm/nouveau/nvkm/subdev/clk/base.c index 7998840..9658f6d 100644 --- a/drm/nouveau/nvkm/subdev/clk/base.c +++ b/drm/nouveau/nvkm/subdev/clk/base.c @@ -75,6 +75,57 @@ nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust, /** * C-States */ +static bool +nvkm_cstate_valid(struct nvkm_clk *clk, struct nvkm_cstate *cstate, u32 max_volt, int temp) +{ + struct nvkm_volt *volt = clk->subdev.device->volt; + int voltage; + + if (!volt) + return true; + + voltage = nvkm_volt_map(volt, cstate->voltage, temp); + if (voltage < 0) + return false; + return voltage <= min(max_volt, volt->max_uv) && + voltage >= volt->min_uv; +} + +static struct nvkm_cstate * +nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate) +{ + struct nvkm_device *device = clk->subdev.device; + struct nvkm_therm *therm = device->therm; + struct nvkm_volt *volt = device->volt; + struct nvkm_cstate *cstate; + int temp = 0, max_volt; + + if (!volt) + return list_entry(pstate->list.prev, typeof(*cstate), head); + + if (therm) { + /* ignore error code */ + temp = max(0, nvkm_therm_temp_get(therm)); + } + + max_volt = volt->max_uv; + if (volt->max0_vid != 0xff) + max_volt = min(max_volt, + nvkm_volt_map(volt, volt->max0_vid, temp)); + if (volt->max1_vid != 0xff) + max_volt = min(max_volt, + nvkm_volt_map(volt, volt->max1_vid, temp)); + + for (cstate = list_entry(pstate->list.prev, typeof(*cstate), head); +>head != >list; +cstate = list_entry(cstate->head.prev, typeof(*cstate), head)) { + if (nvkm_cstate_valid(clk, cstate, max_volt, temp)) + break; + } + + return cstate; +} + static int nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) { @@ -87,8 +138,7 @@ nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) if (!list_empty(>list)) { if (cstatei == -1) - cstate = list_entry(pstate->list.prev, typeof(*cstate), - head); + cstate = nvkm_cstate_find_best(clk, pstate); else { list_for_each_entry(cstate, >list, head) { if (cstate->cstate == cstatei) -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH 14/19] volt: add temperature parameter to nvkm_volt_map
the voltage entries actually may map to a different voltage depending on the current temperature. Signed-off-by: Karol Herbst--- bin/nv_cmp_volt.c | 2 +- drm/nouveau/include/nvkm/subdev/volt.h | 2 +- drm/nouveau/nvkm/subdev/volt/base.c| 14 ++ 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/bin/nv_cmp_volt.c b/bin/nv_cmp_volt.c index 6147a7d..16aa7e6 100644 --- a/bin/nv_cmp_volt.c +++ b/bin/nv_cmp_volt.c @@ -108,7 +108,7 @@ main(int argc, char **argv) new_voltage = nvkm_volt_get(volt); new_temp = nvkm_rd32(device, 0x20400);//nvkm_therm_temp_get(therm); - new_nouveau_voltage = max(nvkm_volt_map(volt, best_cstate->voltage), nvkm_volt_map(volt, best_pstate->base.voltage)); + new_nouveau_voltage = max(nvkm_volt_map(volt, best_cstate->voltage, new_temp), nvkm_volt_map(volt, best_pstate->base.voltage, new_temp)); new_pstate = best_pstate->pstate; new_cstate = best_cstate->cstate; diff --git a/drm/nouveau/include/nvkm/subdev/volt.h b/drm/nouveau/include/nvkm/subdev/volt.h index e8637b9..3b94ab0 100644 --- a/drm/nouveau/include/nvkm/subdev/volt.h +++ b/drm/nouveau/include/nvkm/subdev/volt.h @@ -19,7 +19,7 @@ struct nvkm_volt { u8 max1_vid; }; -int nvkm_volt_map(struct nvkm_volt *volt, u8 id); +int nvkm_volt_map(struct nvkm_volt *volt, u8 id, u8 temperature); int nvkm_volt_map_min(struct nvkm_volt *volt, u8 id); int nvkm_volt_get(struct nvkm_volt *); int nvkm_volt_set_id(struct nvkm_volt *, u8 id, u8 min_id, int condition); diff --git a/drm/nouveau/nvkm/subdev/volt/base.c b/drm/nouveau/nvkm/subdev/volt/base.c index c4fde8f..e741383 100644 --- a/drm/nouveau/nvkm/subdev/volt/base.c +++ b/drm/nouveau/nvkm/subdev/volt/base.c @@ -26,6 +26,7 @@ #include #include #include +#include int nvkm_volt_get(struct nvkm_volt *volt) @@ -88,7 +89,7 @@ nvkm_volt_map_min(struct nvkm_volt *volt, u8 id) } int -nvkm_volt_map(struct nvkm_volt *volt, u8 id) +nvkm_volt_map(struct nvkm_volt *volt, u8 id, u8 temp) { struct nvkm_bios *bios = volt->subdev.device->bios; struct nvbios_vmap_entry info; @@ -98,7 +99,7 @@ nvkm_volt_map(struct nvkm_volt *volt, u8 id) vmap = nvbios_vmap_entry_parse(bios, id, , , ); if (vmap) { if (info.link != 0xff) { - int ret = nvkm_volt_map(volt, info.link); + int ret = nvkm_volt_map(volt, info.link, temp); if (ret < 0) return ret; info.min += ret; @@ -112,18 +113,23 @@ nvkm_volt_map(struct nvkm_volt *volt, u8 id) int nvkm_volt_set_id(struct nvkm_volt *volt, u8 id, u8 min_id, int condition) { + struct nvkm_therm *therm = volt->subdev.device->therm; int ret; + int temp = 0; + + if (therm) + temp = nvkm_therm_temp_get(therm); if (volt->func->set_id) return volt->func->set_id(volt, id, condition); - ret = nvkm_volt_map(volt, id); + ret = nvkm_volt_map(volt, id, max(temp, 0)); if (ret >= 0) { int prev = nvkm_volt_get(volt); if (!condition || prev < 0 || (condition < 0 && ret < prev) || (condition > 0 && ret > prev)) { - int min = nvkm_volt_map(volt, min_id); + int min = nvkm_volt_map(volt, min_id, max(temp, 0)); if (min >= 0) ret = max(min, ret); ret = nvkm_volt_set(volt, ret); -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
Re: [Nouveau] [Mesa-dev] [PATCH mesa v2 3/3] gallium: Remove unused TGSI_RESOURCE_ defines
Reviewed-by: Marek OlšákMarek On Thu, Mar 17, 2016 at 10:13 AM, Hans de Goede wrote: > These magic file-index defines where only ever used in the nouveau code > and that no longer uses them. > > Signed-off-by: Hans de Goede > --- > Changes in v2: > -Split out of "nouveau: codegen: Disable more old resource handling code" > --- > src/gallium/include/pipe/p_shader_tokens.h | 9 - > 1 file changed, 9 deletions(-) > > diff --git a/src/gallium/include/pipe/p_shader_tokens.h > b/src/gallium/include/pipe/p_shader_tokens.h > index 65d8ad9..5ef6c30 100644 > --- a/src/gallium/include/pipe/p_shader_tokens.h > +++ b/src/gallium/include/pipe/p_shader_tokens.h > @@ -237,15 +237,6 @@ struct tgsi_declaration_array { > unsigned Padding : 22; > }; > > -/* > - * Special resources that don't need to be declared. They map to the > - * GLOBAL/LOCAL/PRIVATE/INPUT compute memory spaces. > - */ > -#define TGSI_RESOURCE_GLOBAL 0x7fff > -#define TGSI_RESOURCE_LOCAL0x7ffe > -#define TGSI_RESOURCE_PRIVATE 0x7ffd > -#define TGSI_RESOURCE_INPUT0x7ffc > - > #define TGSI_IMM_FLOAT32 0 > #define TGSI_IMM_UINT321 > #define TGSI_IMM_INT32 2 > -- > 2.7.2 > > ___ > mesa-dev mailing list > mesa-...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH 13/19] add daemon to compare nouveau with blob voltage
this tool can be run alongside the nvidia driver to print information about the current p/cstate, which voltage was set by nvidia and what nouveau would set in the same situation. Signed-off-by: Karol Herbst--- bin/nv_cmp_volt.c | 130 ++ 1 file changed, 130 insertions(+) create mode 100644 bin/nv_cmp_volt.c diff --git a/bin/nv_cmp_volt.c b/bin/nv_cmp_volt.c new file mode 100644 index 000..6147a7d --- /dev/null +++ b/bin/nv_cmp_volt.c @@ -0,0 +1,130 @@ +/* + * Copyright 2016 Karol Herbst + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Karol Herbst + */ + +#include +#include +#include + +#include + +#include "util.h" + +int +main(int argc, char **argv) +{ + struct nvif_client if_client; + struct nvif_device if_device; + struct nvkm_clk *clk; + struct nvkm_volt *volt; + struct nvkm_device *device; + int ret; + int old_voltage = 0, old_nouveau_voltage = 0, old_pstate = 0; + int old_cstate = 0, old_temp = 0; + + ret = u_device("lib", argv[0], "error", true, true, + (1ULL << NVKM_SUBDEV_CLK) | +// (1ULL << NVKM_SUBDEV_FUSE) | + (1ULL << NVKM_SUBDEV_GPIO) | +// (1ULL << NVKM_SUBDEV_I2C) | + (1ULL << NVKM_SUBDEV_PCI) | +// (1ULL << NVKM_SUBDEV_THERM) | +// (1ULL << NVKM_SUBDEV_TIMER) | + (1ULL << NVKM_SUBDEV_VBIOS) | + (1ULL << NVKM_SUBDEV_VOLT), + 0x, _client, _device); + + if (ret < 0) + return ret; + + device = nvxx_device(_device); + clk = device->clk; +// therm = device->therm; + volt = device->volt; + + printf("current voltage (µV), expected voltage (µV), abs diff (µV)," + "rel diff nouveau/nvidia (%%), pstate, cstate, temperature" + "(°C)\n"); + while (true) { + int gpc_clock = nvkm_clk_read(clk, nv_clk_src_gpc); + int mem_clock = nvkm_clk_read(clk, nv_clk_src_mem); + struct nvkm_pstate *pstate = NULL, *best_pstate = NULL; + struct nvkm_cstate *cstate = NULL, *best_cstate = NULL; + int mem_err, gpc_err; + int new_voltage, new_nouveau_voltage, new_pstate, new_cstate; + int new_temp; + + list_for_each_entry(pstate, >states, head) { + list_for_each_entry(cstate, >list, head) { + if (!best_pstate) { + best_pstate = pstate; + best_cstate = cstate; + gpc_err = abs(cstate->domain[nv_clk_src_gpc] - gpc_clock); + mem_err = abs(cstate->domain[nv_clk_src_mem] - mem_clock); + continue; + } + + if (abs(cstate->domain[nv_clk_src_gpc] - gpc_clock) <= gpc_err && + abs(cstate->domain[nv_clk_src_mem] - mem_clock) <= mem_err) { + best_pstate = pstate; + best_cstate = cstate; + gpc_err = abs(cstate->domain[nv_clk_src_gpc] - gpc_clock); + mem_err = abs(cstate->domain[nv_clk_src_mem] - mem_clock); + } + } + + if (!best_pstate) { + best_pstate = pstate; + mem_err = abs(cstate->domain[nv_clk_src_mem] - mem_clock); + continue; + } else if (!best_cstate &&
[Nouveau] [PATCH 00/19] Volting/Clocking improvements for Fermi and newer
This series fixes most of the issues regarding volting on GPUs with any form of GPU Boost inside their vbios, which is mainly Kepler and newer, but we find some boosting related tables in Fermi vbios' already In the end reclocking should work on most Kepler cards without any issues Karol Herbst (19): bios/volt: handle voltage table version 0x50 with 0ed header volt: properly detect entry based voltage tables bios: add parsing of BASE CLOCK table clk: print the base clocks clk: allow boosting only when NvBoost is set volt: save the voltage range we are able to set volt: add nvkm_volt_map_min function clk: don't create cstates which voltage is higher than what the gpu can do volt: parse the both max voltage entries volt: add min_id parameter to nvkm_volt_set_id clk: export nvkm_volt_map clk: add index field to nvkm_cstate add daemon to compare nouveau with blob voltage volt: add temperature parameter to nvkm_volt_map nouveau/subdev/clk: fixup cstate selection clk: respect voltage limits in nvkm_cstate_prog with cstate = -1 volt: don't require perfect fit bios/vmap: unk0 field is the mode volt: add coefficients I found on my gpu bin/nv_cmp_volt.c| 130 + drm/nouveau/include/nvkm/subdev/bios/baseclock.h | 24 drm/nouveau/include/nvkm/subdev/bios/vmap.h | 4 +- drm/nouveau/include/nvkm/subdev/bios/volt.h | 5 +- drm/nouveau/include/nvkm/subdev/clk.h| 10 +- drm/nouveau/include/nvkm/subdev/volt.h | 9 +- drm/nouveau/nvkm/subdev/bios/Kbuild | 1 + drm/nouveau/nvkm/subdev/bios/baseclock.c | 82 + drm/nouveau/nvkm/subdev/bios/vmap.c | 7 +- drm/nouveau/nvkm/subdev/bios/volt.c | 45 +--- drm/nouveau/nvkm/subdev/clk/base.c | 112 +- drm/nouveau/nvkm/subdev/clk/gf100.c | 2 +- drm/nouveau/nvkm/subdev/clk/gk104.c | 2 +- drm/nouveau/nvkm/subdev/volt/base.c | 141 +-- 14 files changed, 532 insertions(+), 42 deletions(-) create mode 100644 bin/nv_cmp_volt.c create mode 100644 drm/nouveau/include/nvkm/subdev/bios/baseclock.h create mode 100644 drm/nouveau/nvkm/subdev/bios/baseclock.c -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH 09/19] volt: parse the both max voltage entries
these entries specify a maximum voltage nvidia never exceeds, we shouldn't do that, too. Signed-off-by: Karol Herbst--- drm/nouveau/include/nvkm/subdev/bios/vmap.h | 2 ++ drm/nouveau/include/nvkm/subdev/volt.h | 2 ++ drm/nouveau/nvkm/subdev/bios/vmap.c | 5 + drm/nouveau/nvkm/subdev/volt/base.c | 11 +++ 4 files changed, 20 insertions(+) diff --git a/drm/nouveau/include/nvkm/subdev/bios/vmap.h b/drm/nouveau/include/nvkm/subdev/bios/vmap.h index 6633c6d..48fe71d 100644 --- a/drm/nouveau/include/nvkm/subdev/bios/vmap.h +++ b/drm/nouveau/include/nvkm/subdev/bios/vmap.h @@ -1,6 +1,8 @@ #ifndef __NVBIOS_VMAP_H__ #define __NVBIOS_VMAP_H__ struct nvbios_vmap { + u8 max0; + u8 max1; }; u16 nvbios_vmap_table(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len); diff --git a/drm/nouveau/include/nvkm/subdev/volt.h b/drm/nouveau/include/nvkm/subdev/volt.h index fc68825..3e0f8da 100644 --- a/drm/nouveau/include/nvkm/subdev/volt.h +++ b/drm/nouveau/include/nvkm/subdev/volt.h @@ -15,6 +15,8 @@ struct nvkm_volt { u32 max_uv; u32 min_uv; + u8 max0_vid; + u8 max1_vid; }; int nvkm_volt_map_min(struct nvkm_volt *volt, u8 id); diff --git a/drm/nouveau/nvkm/subdev/bios/vmap.c b/drm/nouveau/nvkm/subdev/bios/vmap.c index 2f13db7..f5463b1 100644 --- a/drm/nouveau/nvkm/subdev/bios/vmap.c +++ b/drm/nouveau/nvkm/subdev/bios/vmap.c @@ -61,7 +61,12 @@ nvbios_vmap_parse(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, memset(info, 0x00, sizeof(*info)); switch (!!vmap * *ver) { case 0x10: + info->max0 = 0xff; + info->max1 = 0xff; + break; case 0x20: + info->max0 = nvbios_rd08(bios, vmap + 0x7); + info->max1 = nvbios_rd08(bios, vmap + 0x8); break; } return vmap; diff --git a/drm/nouveau/nvkm/subdev/volt/base.c b/drm/nouveau/nvkm/subdev/volt/base.c index 71094a9..205dfcf 100644 --- a/drm/nouveau/nvkm/subdev/volt/base.c +++ b/drm/nouveau/nvkm/subdev/volt/base.c @@ -217,9 +217,20 @@ nvkm_volt_ctor(const struct nvkm_volt_func *func, struct nvkm_device *device, /* Assuming the non-bios device should build the voltage table later */ if (bios) { + u8 ver, hdr, cnt, len; + struct nvbios_vmap vmap; + nvkm_volt_parse_bios(bios, volt); nvkm_debug(>subdev, "min: %iuv max: %iuv\n", volt->min_uv, volt->max_uv); + + if (nvbios_vmap_parse(bios, , , , , )) { + volt->max0_vid = vmap.max0; + volt->max1_vid = vmap.max1; + } else { + volt->max0_vid = 0xff; + volt->max1_vid = 0xff; + } } if (volt->vid_nr) { -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH 03/19] bios: add parsing of BASE CLOCK table
this table contains three important clocks: base clock: this is the non boosted max clock tdp clock: the clock at wich the vbios guarentees the TDP won't ever be exceeded at max load (seems to be always the same as the base clock, but behaves differently) boost clock: the avg clock the gpu will stay boosted to. It doesn't seem to affect the behaviour of the nvidia driver at all though. Signed-off-by: Karol Herbst--- drm/nouveau/include/nvkm/subdev/bios/baseclock.h | 24 +++ drm/nouveau/nvkm/subdev/bios/Kbuild | 1 + drm/nouveau/nvkm/subdev/bios/baseclock.c | 82 3 files changed, 107 insertions(+) create mode 100644 drm/nouveau/include/nvkm/subdev/bios/baseclock.h create mode 100644 drm/nouveau/nvkm/subdev/bios/baseclock.c diff --git a/drm/nouveau/include/nvkm/subdev/bios/baseclock.h b/drm/nouveau/include/nvkm/subdev/bios/baseclock.h new file mode 100644 index 000..eca7b4a --- /dev/null +++ b/drm/nouveau/include/nvkm/subdev/bios/baseclock.h @@ -0,0 +1,24 @@ +#ifndef __NVBIOS_BASECLOCK_H__ +#define __NVBIOS_BASECLOCK_H__ +struct nvbios_baseclk_header { + u16 offset; + + u8 version; + u8 hlen; + u8 ecount; + u8 elen; + u8 scount; + u8 slen; + + u8 base; + u8 boost; + u8 tdp; +}; +struct nvbios_baseclk_entry { + u8 pstate; + u16 clock_mhz; +}; +int nvbios_baseclock_parse(struct nvkm_bios *, struct nvbios_baseclk_header *); +int nvbios_baseclock_entry(struct nvkm_bios *, struct nvbios_baseclk_header *, + u8 idx, struct nvbios_baseclk_entry *); +#endif diff --git a/drm/nouveau/nvkm/subdev/bios/Kbuild b/drm/nouveau/nvkm/subdev/bios/Kbuild index dbcb0ef..6cb3beb 100644 --- a/drm/nouveau/nvkm/subdev/bios/Kbuild +++ b/drm/nouveau/nvkm/subdev/bios/Kbuild @@ -1,4 +1,5 @@ nvkm-y += nvkm/subdev/bios/base.o +nvkm-y += nvkm/subdev/bios/baseclock.o nvkm-y += nvkm/subdev/bios/bit.o nvkm-y += nvkm/subdev/bios/boost.o nvkm-y += nvkm/subdev/bios/conn.o diff --git a/drm/nouveau/nvkm/subdev/bios/baseclock.c b/drm/nouveau/nvkm/subdev/bios/baseclock.c new file mode 100644 index 000..2f15abb --- /dev/null +++ b/drm/nouveau/nvkm/subdev/bios/baseclock.c @@ -0,0 +1,82 @@ +/* + * Copyright 2016 Karol Herbst + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Karol Herbst + */ +#include +#include +#include + +static u16 +nvbios_baseclock_offset(struct nvkm_bios *b) +{ + struct bit_entry bit_P; + + if (!bit_entry(b, 'P', _P)) { + if (bit_P.version == 2) + return nvbios_rd16(b, bit_P.offset + 0x38); + } + + return 0x; +} + +int +nvbios_baseclock_parse(struct nvkm_bios *b, struct nvbios_baseclk_header *h) +{ + if (!h) + return -EINVAL; + + h->offset = nvbios_baseclock_offset(b); + if (!h->offset) + return -ENODEV; + + h->version = nvbios_rd08(b, h->offset); + switch (h->version) { + case 0x10: + h->hlen = nvbios_rd08(b, h->offset + 0x1); + h->elen = nvbios_rd08(b, h->offset + 0x2); + h->slen = nvbios_rd08(b, h->offset + 0x3); + h->scount = nvbios_rd08(b, h->offset + 0x4); + h->ecount = nvbios_rd08(b, h->offset + 0x5); + + h->base = nvbios_rd08(b, h->offset + 0x0f); + h->boost = nvbios_rd08(b, h->offset + 0x10); + h->tdp= nvbios_rd08(b, h->offset + 0x11); + return 0; + default: + return -EINVAL; + } +} + +int +nvbios_baseclock_entry(struct nvkm_bios *b, struct nvbios_baseclk_header *h, + u8 idx, struct nvbios_baseclk_entry *e) +{ + u16 offset; + + if (!e || !h || idx > h->ecount) + return -EINVAL; + + offset = h->offset +
[Nouveau] [Bug 94627] Game Risen on wine black grass
https://bugs.freedesktop.org/show_bug.cgi?id=94627 Ilia Mirkinchanged: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED --- Comment #5 from Ilia Mirkin --- OK, so looks like it was the sqrt change that fixed it (commit c1e4a6bfbf01) - thanks Karol. I'm a bit scared of backporting that to 11.2 at such a late date, so I'd rather leave this alone for now. It should be fixed in 11.3 though. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug.___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 94627] Game Risen on wine black grass
https://bugs.freedesktop.org/show_bug.cgi?id=94627 --- Comment #4 from Karol Herbst--- I bisected it, here is my git bisect log: git bisect start # bad: [5dbb57a99482e2e04302ec8ef8cb4130e4ddb882] nouveua_compiler stuff git bisect bad 5dbb57a99482e2e04302ec8ef8cb4130e4ddb882 # good: [9f21fdd8e697a1a0868f4ec4573235325294b7b3] Update version to 11.2.0-rc3 git bisect good 9f21fdd8e697a1a0868f4ec4573235325294b7b3 # good: [4cd5e5b48e24a8b8ff7255022208d3e5fe6557d8] nouveau: update the Makefile.sources list git bisect good 4cd5e5b48e24a8b8ff7255022208d3e5fe6557d8 # good: [b4b50b074beae9b679e5acdbb4b49193e539576d] mesa: Make glGet queries initialize ctx->Debug when necessary. git bisect good b4b50b074beae9b679e5acdbb4b49193e539576d # good: [60c08aa90bce4c8766a747c8517f7ff6987937f0] gallium/radeon: disable CMASK on handle export if sharing doesn't allow it (v2) git bisect good 60c08aa90bce4c8766a747c8517f7ff6987937f0 # good: [8be9efcce70f671afcaf3cfc76c624b3467b7834] radeon/uvd: handle HEVC main 10 decode git bisect good 8be9efcce70f671afcaf3cfc76c624b3467b7834 # bad: [c1e4a6bfbf015801c6a8b0ae694482421a22c2d9] nv50,nvc0: handle SQRT lowering inside the driver git bisect bad c1e4a6bfbf015801c6a8b0ae694482421a22c2d9 # good: [a651bc027d5ed4150bb5240fc9f46a6ca569f665] nvc0: fix blit triangle size to fully cover FB's > 8192x8192 git bisect good a651bc027d5ed4150bb5240fc9f46a6ca569f665 # good: [b3e7fb52349848b24f005c07859bc43691bd64bd] nv50/ir: avoid folding mul + add if the mul has a dnz git bisect good b3e7fb52349848b24f005c07859bc43691bd64bd # first bad commit: [c1e4a6bfbf015801c6a8b0ae694482421a22c2d9] nv50,nvc0: handle SQRT lowering inside the driver -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for the bug.___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH mesa v2 2/3] nouveau: codegen: Do not silently fail in handeLOAD / handleSTORE / handleATOM
handeLOAD / handleSTORE / handleATOM can only handle TGSI_FILE_BUFFER and TGSI_FILE_MEMORY. Make things fail explictly when another register-file is used in these functions. Signed-off-by: Hans de Goede--- Changes in v2: -Split out of "nouveau: codegen: Disable more old resource handling code" --- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 27 ++ 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index 41eb4e3..baa2e30 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp @@ -2270,8 +2270,9 @@ Converter::handleLOAD(Value *dst0[4]) int c; std::vector off, src, ldv, def; - if (tgsi.getSrc(0).getFile() == TGSI_FILE_BUFFER || - tgsi.getSrc(0).getFile() == TGSI_FILE_MEMORY) { + switch (tgsi.getSrc(0).getFile()) { + case TGSI_FILE_BUFFER: + case TGSI_FILE_MEMORY: for (c = 0; c < 4; ++c) { if (!dst0[c]) continue; @@ -2291,7 +2292,9 @@ Converter::handleLOAD(Value *dst0[4]) if (tgsi.getSrc(0).isIndirect(0)) ld->setIndirect(0, 1, fetchSrc(tgsi.getSrc(0).getIndirect(0), 0, 0)); } - return; + break; + default: + assert(!"Unsupported srcFile for LOAD"); } /* Keep this around for now as reference when adding img support @@ -2372,8 +2375,9 @@ Converter::handleSTORE() int c; std::vector off, src, dummy; - if (tgsi.getDst(0).getFile() == TGSI_FILE_BUFFER || - tgsi.getDst(0).getFile() == TGSI_FILE_MEMORY) { + switch (tgsi.getDst(0).getFile()) { + case TGSI_FILE_BUFFER: + case TGSI_FILE_MEMORY: for (c = 0; c < 4; ++c) { if (!(tgsi.getDst(0).getMask() & (1 << c))) continue; @@ -2394,7 +2398,9 @@ Converter::handleSTORE() if (tgsi.getDst(0).isIndirect(0)) st->setIndirect(0, 1, fetchSrc(tgsi.getDst(0).getIndirect(0), 0, 0)); } - return; + break; + default: + assert(!"Unsupported dstFile for STORE"); } /* Keep this around for now as reference when adding img support @@ -2460,8 +2466,9 @@ Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp) std::vector defv; LValue *dst = getScratch(); - if (tgsi.getSrc(0).getFile() == TGSI_FILE_BUFFER || - tgsi.getSrc(0).getFile() == TGSI_FILE_MEMORY) { + switch (tgsi.getSrc(0).getFile()) { + case TGSI_FILE_BUFFER: + case TGSI_FILE_MEMORY: for (int c = 0; c < 4; ++c) { if (!dst0[c]) continue; @@ -2489,7 +2496,9 @@ Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp) for (int c = 0; c < 4; ++c) if (dst0[c]) dst0[c] = dst; // not equal to rDst so handleInstruction will do mkMov - return; + break; + default: + assert(!"Unsupported srcFile for ATOM"); } /* Keep this around for now as reference when adding img support -- 2.7.2 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 94627] Game Risen on wine black grass
https://bugs.freedesktop.org/show_bug.cgi?id=94627 --- Comment #3 from Ilia Mirkin--- I'm able to reproduce with Mesa 11.1.2, but not with the current mesa master. Would be nice to figure out what fixed it, but I don't really have the patience to do a reverse bisect (trace takes a long time, my GPU is slow). -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug.___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
Re: [Nouveau] [Mesa-dev] [PATCH mesa 1/6] tgsi_build: Fix return of uninitialized memory in tgsi_*_instruction_memory
On 16.03.2016 04:23, Hans de Goede wrote: tgsi_default_instruction_memory / tgsi_build_instruction_memory were returning uninitialized memory for tgsi_instruction_memory.Texture and tgsi_instruction_memory.Format. Note 0 means not set, and thus is a correct default initializer for these. Fixes: 3243b6fc97 ("tgsi: add Texture and Format to tgsi_instruction_memory") Cc: Nicolai HähnleSigned-off-by: Hans de Goede Thanks. Reviewed-by: Nicolai Hähnle --- src/gallium/auxiliary/tgsi/tgsi_build.c | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c b/src/gallium/auxiliary/tgsi/tgsi_build.c index a3e659b..7e30bb6 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_build.c +++ b/src/gallium/auxiliary/tgsi/tgsi_build.c @@ -781,6 +781,8 @@ tgsi_default_instruction_memory( void ) struct tgsi_instruction_memory instruction_memory; instruction_memory.Qualifier = 0; + instruction_memory.Texture = 0; + instruction_memory.Format = 0; instruction_memory.Padding = 0; return instruction_memory; @@ -796,6 +798,8 @@ tgsi_build_instruction_memory( struct tgsi_instruction_memory instruction_memory; instruction_memory.Qualifier = qualifier; + instruction_memory.Texture = 0; + instruction_memory.Format = 0; instruction_memory.Padding = 0; instruction->Memory = 1; ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 94627] Game Risen on wine black grass
https://bugs.freedesktop.org/show_bug.cgi?id=94627 Ilia Mirkinchanged: What|Removed |Added Component|Other |Drivers/DRI/nouveau Assignee|mesa-dev@lists.freedesktop. |nouveau@lists.freedesktop.o |org |rg QA Contact|mesa-dev@lists.freedesktop. |nouveau@lists.freedesktop.o |org |rg --- Comment #2 from Ilia Mirkin --- Reassigning to nouveau for now until we can verify where the issue lies. -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for the bug.___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
Some of the lowering steps we currently do for FILE_MEMORY_GLOBAL only apply to buffers, making it impossible to use FILE_MEMORY_GLOBAL for OpenCL global buffers. This commits changes the buffer code to use FILE_MEMORY_BUFFER at the ir_from_tgsi and lowering steps, freeing use of FILE_MEMORY_GLOBAL for use with OpenCL global buffers. Note that after lowering buffer accesses use the FILE_MEMORY_GLOBAL register file. Tested with piglet on a gk107, before this patch: ./piglit run -o shader -t '.*arb_shader_storage_buffer_object.*' results/shader [9/9] pass: 9 / after: ./piglit run -o shader -t '.*arb_shader_storage_buffer_object.*' results/shader [9/9] pass: 9 / Signed-off-by: Hans de Goede--- Changes in v2: -New patch in v2 of patch-set to re-enable support for global opencl buffers --- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 + src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 2 +- src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 8 +--- src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 5 - src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 1 + 6 files changed, 13 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h index 7b0eb2f..5141fc6 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.h @@ -332,6 +332,7 @@ enum DataFile FILE_MEMORY_CONST, FILE_SHADER_INPUT, FILE_SHADER_OUTPUT, + FILE_MEMORY_BUFFER, FILE_MEMORY_GLOBAL, FILE_MEMORY_SHARED, FILE_MEMORY_LOCAL, diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index baa2e30..7ae0cb2 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp @@ -373,7 +373,7 @@ static nv50_ir::DataFile translateFile(uint file) case TGSI_FILE_PREDICATE: return nv50_ir::FILE_PREDICATE; case TGSI_FILE_IMMEDIATE: return nv50_ir::FILE_IMMEDIATE; case TGSI_FILE_SYSTEM_VALUE:return nv50_ir::FILE_SYSTEM_VALUE; - case TGSI_FILE_BUFFER: return nv50_ir::FILE_MEMORY_GLOBAL; + case TGSI_FILE_BUFFER: return nv50_ir::FILE_MEMORY_BUFFER; case TGSI_FILE_MEMORY: return nv50_ir::FILE_MEMORY_GLOBAL; case TGSI_FILE_SAMPLER: case TGSI_FILE_NULL: diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index d0936d8..628deb7 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -1141,13 +1141,14 @@ NVC0LoweringPass::handleATOM(Instruction *atom) handleSharedATOM(atom); return true; default: - assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL); + assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER); base = loadResInfo64(ind, atom->getSrc(0)->reg.fileIndex * 16); assert(base->reg.size == 8); if (ptr) base = bld.mkOp2v(OP_ADD, TYPE_U64, base, base, ptr); assert(base->reg.size == 8); atom->setIndirect(0, 0, base); + atom->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL; return true; } base = @@ -1963,7 +1964,7 @@ NVC0LoweringPass::visit(Instruction *i) } else if (i->src(0).getFile() == FILE_SHADER_OUTPUT) { assert(prog->getType() == Program::TYPE_TESSELLATION_CONTROL); i->op = OP_VFETCH; - } else if (i->src(0).getFile() == FILE_MEMORY_GLOBAL) { + } else if (i->src(0).getFile() == FILE_MEMORY_BUFFER) { Value *ind = i->getIndirect(0, 1); Value *ptr = loadResInfo64(ind, i->getSrc(0)->reg.fileIndex * 16); // XXX come up with a way not to do this for EVERY little access but @@ -1978,6 +1979,7 @@ NVC0LoweringPass::visit(Instruction *i) } i->setIndirect(0, 1, NULL); i->setIndirect(0, 0, ptr); + i->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL; bld.mkCmp(OP_SET, CC_GT, TYPE_U32, pred, TYPE_U32, offset, length); i->setPredicate(CC_NOT_P, pred); if (i->defExists(0)) { @@ -1987,7 +1989,7 @@ NVC0LoweringPass::visit(Instruction *i) break; case OP_ATOM: { - const bool cctl = i->src(0).getFile() == FILE_MEMORY_GLOBAL; + const bool cctl = i->src(0).getFile() == FILE_MEMORY_BUFFER; handleATOM(i); handleCasExch(i, cctl); } diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp index cfa85ec..870b36e 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp @@ -455,6 +455,7 @@
[Nouveau] [PATCH 06/19] volt: save the voltage range we are able to set
We shouldn't set voltages below the min or above the max voltage the gpu is able to set, so save the range Signed-off-by: Karol Herbst--- drm/nouveau/include/nvkm/subdev/volt.h | 3 +++ drm/nouveau/nvkm/subdev/volt/base.c| 14 +- 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/drm/nouveau/include/nvkm/subdev/volt.h b/drm/nouveau/include/nvkm/subdev/volt.h index feff55c..b765f4f 100644 --- a/drm/nouveau/include/nvkm/subdev/volt.h +++ b/drm/nouveau/include/nvkm/subdev/volt.h @@ -12,6 +12,9 @@ struct nvkm_volt { u32 uv; u8 vid; } vid[256]; + + u32 max_uv; + u32 min_uv; }; int nvkm_volt_get(struct nvkm_volt *); diff --git a/drm/nouveau/nvkm/subdev/volt/base.c b/drm/nouveau/nvkm/subdev/volt/base.c index ef653b1..95fe065 100644 --- a/drm/nouveau/nvkm/subdev/volt/base.c +++ b/drm/nouveau/nvkm/subdev/volt/base.c @@ -123,6 +123,8 @@ nvkm_volt_parse_bios(struct nvkm_bios *bios, struct nvkm_volt *volt) if (data && info.vidmask && info.base && info.step && !info.entry_based) { nvkm_debug(subdev, "found header based VIDs\n"); + volt->min_uv = info.min; + volt->max_uv = info.max; for (i = 0; i < info.vidmask + 1; i++) { if (info.base >= info.min && info.base <= info.max) { @@ -135,6 +137,8 @@ nvkm_volt_parse_bios(struct nvkm_bios *bios, struct nvkm_volt *volt) volt->vid_mask = info.vidmask; } else if (data && info.vidmask && info.entry_based) { nvkm_debug(subdev, "found entry based VIDs\n"); + volt->min_uv = 0x; + volt->max_uv = 0; for (i = 0; i < cnt; i++) { data = nvbios_volt_entry_parse(bios, i, , , ); @@ -142,9 +146,14 @@ nvkm_volt_parse_bios(struct nvkm_bios *bios, struct nvkm_volt *volt) volt->vid[volt->vid_nr].uv = ivid.voltage; volt->vid[volt->vid_nr].vid = ivid.vid; volt->vid_nr++; + volt->min_uv = min(volt->min_uv, ivid.voltage); + volt->max_uv = max(volt->max_uv, ivid.voltage); } } volt->vid_mask = info.vidmask; + } else if (data && info.type == NVBIOS_VOLT_PWM) { + volt->min_uv = info.base; + volt->max_uv = info.base + info.pwm_range; } } @@ -185,8 +194,11 @@ nvkm_volt_ctor(const struct nvkm_volt_func *func, struct nvkm_device *device, volt->func = func; /* Assuming the non-bios device should build the voltage table later */ - if (bios) + if (bios) { nvkm_volt_parse_bios(bios, volt); + nvkm_debug(>subdev, "min: %iuv max: %iuv\n", + volt->min_uv, volt->max_uv); + } if (volt->vid_nr) { for (i = 0; i < volt->vid_nr; i++) { -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH 15/19] nouveau/subdev/clk: fixup cstate selection
From: Karol Herbstnow the cstatei parameter can be used of the nvkm_cstate_prog function to select a specific cstate -1 is a magic value, which will always select the highest currently possible cstate Signed-off-by: Karol Herbst --- drm/nouveau/nvkm/subdev/clk/base.c | 12 ++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/clk/base.c b/drm/nouveau/nvkm/subdev/clk/base.c index b79644d..7998840 100644 --- a/drm/nouveau/nvkm/subdev/clk/base.c +++ b/drm/nouveau/nvkm/subdev/clk/base.c @@ -86,7 +86,15 @@ nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) int ret; if (!list_empty(>list)) { - cstate = list_entry(pstate->list.prev, typeof(*cstate), head); + if (cstatei == -1) + cstate = list_entry(pstate->list.prev, typeof(*cstate), + head); + else { + list_for_each_entry(cstate, >list, head) { + if (cstate->cstate == cstatei) + break; + } + } } else { cstate = >base; } @@ -223,7 +231,7 @@ nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei) ram->func->tidy(ram); } - return nvkm_cstate_prog(clk, pstate, 0); + return nvkm_cstate_prog(clk, pstate, -1); } static void -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH 01/19] bios/volt: handle voltage table version 0x50 with 0ed header
Some Fermi+ gpus have no usefull header in the voltage table, which means nouveau has to read the voltages out of the entries directly. The mask may be bigger than 0x1f, but this value is already >2V, so it will be fine for now. This patch fixes volting issues on those cards enabling them to switch cstates Signed-off-by: Karol HerbstReviewed-by: Martin Peres --- drm/nouveau/nvkm/subdev/bios/volt.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drm/nouveau/nvkm/subdev/bios/volt.c b/drm/nouveau/nvkm/subdev/bios/volt.c index 6e0a336..81a47b2 100644 --- a/drm/nouveau/nvkm/subdev/bios/volt.c +++ b/drm/nouveau/nvkm/subdev/bios/volt.c @@ -142,7 +142,10 @@ nvbios_volt_entry_parse(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len, info->vid = nvbios_rd08(bios, volt + 0x01) >> 2; break; case 0x40: + break; case 0x50: + info->voltage = nvbios_rd32(bios, volt) & 0x001f; + info->vid = (nvbios_rd32(bios, volt) >> 23) & 0xff; break; } return volt; -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
Re: [Nouveau] [PATCH mesa 4/6] nouveau: codegen: s/FILE_MEMORY_GLOBAL/FILE_MEMORY_BUFFER/
Hi, On 16-03-16 15:55, Ilia Mirkin wrote: This approach leads to the emitters needing to know about both global and buffer, even though at that point, they are identical. I was thinking that in the lowering logic, buffer would just get rewritten as global (with the offset added), thus not needing any change to the emitters. What do you think about such an approach? I was actually thinking the same, but I was a bit afraid I might break something by doing that. I'm willing to try though, but the result is going to need some extra testing by others I believe. Questions: 1) Any tests I can run to test the buffer paths ? 2) So the resulting patch, which would replace this one, and make most of the "nouveau: codegen: Add support for OpenCL global memory buffers" unnecessary would look something like this: 2a) Add FILE_MEMORY_BUFFER as nv50_ir::FILE_* type 2b) Use it in nv50_ir_from_tgsi.cpp instead of GLOBAL 2c) Use it in nv50_ir_lowering_ to check for buffer accesses, and when adding the offset change the file_type to GLOBAL Right ? Regards, Hans On Mar 16, 2016 2:24 AM, "Hans de Goede"wrote: FILE_MEMORY_GLOBAL is currently only used for buffer handling, as we do not yet have (opencl) global memory support. Global memory support actually requires some different handling during lowering, so rename FILE_MEMORY_GLOBAL to FILE_MEMORY_BUFFER to reflect that the current code is for buffer handling, this will allow the later (re-)addition of FILE_MEMORY_GLOBAL for regular global memory. Signed-off-by: Hans de Goede --- src/gallium/drivers/nouveau/codegen/nv50_ir.h| 2 +- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 10 +- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 6 +++--- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp| 10 +- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp| 12 ++-- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp| 8 .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp| 10 +- src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 8 src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp| 2 +- src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 6 +++--- src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 2 +- 11 files changed, 38 insertions(+), 38 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h index 7b0eb2f..fdc2195 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.h @@ -332,7 +332,7 @@ enum DataFile FILE_MEMORY_CONST, FILE_SHADER_INPUT, FILE_SHADER_OUTPUT, - FILE_MEMORY_GLOBAL, + FILE_MEMORY_BUFFER, FILE_MEMORY_SHARED, FILE_MEMORY_LOCAL, FILE_SYSTEM_VALUE, diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp index 70f3c3f..02a1101 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp @@ -1641,7 +1641,7 @@ CodeEmitterGK110::emitSTORE(const Instruction *i) int32_t offset = SDATA(i->src(0)).offset; switch (i->src(0).getFile()) { - case FILE_MEMORY_GLOBAL: code[1] = 0xe000; code[0] = 0x; break; + case FILE_MEMORY_BUFFER: code[1] = 0xe000; code[0] = 0x; break; case FILE_MEMORY_LOCAL: code[1] = 0x7a80; code[0] = 0x0002; break; case FILE_MEMORY_SHARED: code[0] = 0x0002; @@ -1678,7 +1678,7 @@ CodeEmitterGK110::emitSTORE(const Instruction *i) srcId(i->src(1), 2); srcId(i->src(0).getIndirect(0), 10); - if (i->src(0).getFile() == FILE_MEMORY_GLOBAL && + if (i->src(0).getFile() == FILE_MEMORY_BUFFER && i->src(0).isIndirect(0) && i->getIndirect(0, 0)->reg.size == 8) code[1] |= 1 << 23; @@ -1690,7 +1690,7 @@ CodeEmitterGK110::emitLOAD(const Instruction *i) int32_t offset = SDATA(i->src(0)).offset; switch (i->src(0).getFile()) { - case FILE_MEMORY_GLOBAL: code[1] = 0xc000; code[0] = 0x; break; + case FILE_MEMORY_BUFFER: code[1] = 0xc000; code[0] = 0x; break; case FILE_MEMORY_LOCAL: code[1] = 0x7a00; code[0] = 0x0002; break; case FILE_MEMORY_SHARED: code[0] = 0x0002; @@ -1800,7 +1800,7 @@ CodeEmitterGK110::emitMOV(const Instruction *i) static inline bool uses64bitAddress(const Instruction *ldst) { - return ldst->src(0).getFile() == FILE_MEMORY_GLOBAL && + return ldst->src(0).getFile() == FILE_MEMORY_BUFFER && ldst->src(0).isIndirect(0) && ldst->getIndirect(0, 0)->reg.size == 8; } @@ -1862,7 +1862,7 @@ CodeEmitterGK110::emitCCTL(const Instruction *i) code[0] = 0x0002 | (i->subOp << 2); - if
[Nouveau] [PATCH 05/19] clk: allow boosting only when NvBoost is set
0: base clock from the vbios is max clock 1: boost only to boost clock from the vbios (default) 2: boost to max clock available Signed-off-by: Karol Herbst--- drm/nouveau/include/nvkm/subdev/clk.h | 9 - drm/nouveau/nvkm/subdev/clk/base.c| 26 -- drm/nouveau/nvkm/subdev/clk/gf100.c | 2 +- drm/nouveau/nvkm/subdev/clk/gk104.c | 2 +- 4 files changed, 34 insertions(+), 5 deletions(-) diff --git a/drm/nouveau/include/nvkm/subdev/clk.h b/drm/nouveau/include/nvkm/subdev/clk.h index fb54417..a292e5a 100644 --- a/drm/nouveau/include/nvkm/subdev/clk.h +++ b/drm/nouveau/include/nvkm/subdev/clk.h @@ -67,7 +67,8 @@ struct nvkm_pstate { struct nvkm_domain { enum nv_clk_src name; u8 bios; /* 0xff for none */ -#define NVKM_CLK_DOM_FLAG_CORE 0x01 +#define NVKM_CLK_DOM_FLAG_CORE0x01 +#define NVKM_CLK_DOM_FLAG_BASECLK 0x02 u8 flags; const char *mname; int mdiv; @@ -97,6 +98,12 @@ struct nvkm_clk { int dstate; /* display adjustment (min+) */ bool allow_reclock; +#define NVKM_CLK_BOOST_NONE 0x0 +#define NVKM_CLK_BOOST_AVG 0x1 +#define NVKM_CLK_BOOST_FULL 0x2 + u8 boost_mode; + u32 base_khz; + u32 boost_khz; /*XXX: die, these are here *only* to support the completely * bat-shit insane what-was-nouveau_hw.c code diff --git a/drm/nouveau/nvkm/subdev/clk/base.c b/drm/nouveau/nvkm/subdev/clk/base.c index 4928668..d575412 100644 --- a/drm/nouveau/nvkm/subdev/clk/base.c +++ b/drm/nouveau/nvkm/subdev/clk/base.c @@ -160,6 +160,18 @@ nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate) if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) { u32 freq = nvkm_clk_adjust(clk, true, pstate->pstate, domain->bios, cstepX.freq); + if (domain->flags & NVKM_CLK_DOM_FLAG_BASECLK) { + switch (clk->boost_mode) { + case NVKM_CLK_BOOST_NONE: + if (clk->base_khz + && freq > clk->base_khz) + goto err; + case NVKM_CLK_BOOST_AVG: + if (clk->boost_khz + && freq > clk->boost_khz) + goto err; + } + } cstate->domain[domain->name] = freq; } domain++; @@ -167,6 +179,9 @@ nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate) list_add(>head, >list); return 0; +err: + kfree(cstate); + return -EINVAL; } /** @@ -570,14 +585,21 @@ nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device, nvkm_subdev_ctor(_clk, device, index, 0, subdev); + clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost", + NVKM_CLK_BOOST_AVG); if (bios && !nvbios_baseclock_parse(bios, )) { struct nvbios_baseclk_entry base, boost; - if (!nvbios_baseclock_entry(bios, , h.boost, )) + if (!nvbios_baseclock_entry(bios, , h.boost, )) { + clk->boost_khz = boost.clock_mhz * 1000; nvkm_info(subdev, "boost: %i MHz\n", boost.clock_mhz / 2); - if (!nvbios_baseclock_entry(bios, , h.base, )) + } + + if (!nvbios_baseclock_entry(bios, , h.base, )) { + clk->base_khz = base.clock_mhz * 1000; nvkm_info(subdev, "base: %i MHz\n", base.clock_mhz / 2); + } } clk->func = func; diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c b/drm/nouveau/nvkm/subdev/clk/gf100.c index 78c449b..71b7c9f 100644 --- a/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -443,7 +443,7 @@ gf100_clk = { { nv_clk_src_hubk06 , 0x00 }, { nv_clk_src_hubk01 , 0x01 }, { nv_clk_src_copy , 0x02 }, - { nv_clk_src_gpc, 0x03, 0, "core", 2000 }, + { nv_clk_src_gpc, 0x03, NVKM_CLK_DOM_FLAG_BASECLK, "core", 2000 }, { nv_clk_src_rop, 0x04 }, { nv_clk_src_mem, 0x05, 0, "memory", 1000 }, { nv_clk_src_vdec , 0x06 }, diff --git a/drm/nouveau/nvkm/subdev/clk/gk104.c b/drm/nouveau/nvkm/subdev/clk/gk104.c index 975c401..639234f 100644 --- a/drm/nouveau/nvkm/subdev/clk/gk104.c +++ b/drm/nouveau/nvkm/subdev/clk/gk104.c @@ -485,7 +485,7 @@ gk104_clk = {
Re: [Nouveau] [PATCH mesa 6/6] nouveau: codegen: Disable more old resource handling code
On 03/16/2016 11:49 AM, Hans de Goede wrote: Hi, On 16-03-16 11:45, Samuel Pitoiset wrote: On 03/16/2016 10:23 AM, Hans de Goede wrote: Commit c3083c7082 ("nv50/ir: add support for BUFFER accesses") disabled / commented out some of the old resource handling code, but not all of it. Effectively all of it is dead already, if we ever enter the old code paths in handeLOAD / handleSTORE / handleATOM we will get an exception due to trying to access the now always zero-sized resources vector. Make non buffer / memory file accesses not being supported in these functions more explicit and comment out a whole bunch of dead code. Also remove the magic file-indexe defines from the old resource code from include/pipe/p_shader_tokens.h as those are no longer used now (which is a good thing). Signed-off-by: Hans de Goede--- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 42 +++--- src/gallium/include/pipe/p_shader_tokens.h | 9 - 2 files changed, 30 insertions(+), 21 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index c167c4a..115d0bb 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp @@ -856,12 +856,14 @@ public: }; std::vector textureViews; + /* struct Resource { uint8_t target; // TGSI_TEXTURE_* bool raw; uint8_t slot; // $surface index }; std::vector resources; + */ struct MemoryFile { uint8_t mem_type; // TGSI_MEMORY_TYPE_* @@ -1423,8 +1425,8 @@ private: void handleLIT(Value *dst0[4]); void handleUserClipPlanes(); - Symbol *getResourceBase(int r); - void getResourceCoords(std::vector&, int r, int s); + // Symbol *getResourceBase(int r); + // void getResourceCoords(std::vector&, int r, int s); void handleLOAD(Value *dst0[4]); void handleSTORE(); @@ -2169,6 +2171,7 @@ Converter::handleLIT(Value *dst0[4]) } } +/* Keep this around for now as reference when adding img support static inline bool isResourceSpecial(const int r) { @@ -2264,6 +2267,7 @@ partitionLoadStore(uint8_t comp[2], uint8_t size[2], uint8_t mask) } return n + 1; } +*/ // For raw loads, granularity is 4 byte. // Usage of the texture read mask on OP_SULDP is not allowed. @@ -2274,8 +2278,9 @@ Converter::handleLOAD(Value *dst0[4]) int c; std::vector off, src, ldv, def; - if (tgsi.getSrc(0).getFile() == TGSI_FILE_BUFFER || - tgsi.getSrc(0).getFile() == TGSI_FILE_MEMORY) { + switch (tgsi.getSrc(0).getFile()) { + case TGSI_FILE_BUFFER: + case TGSI_FILE_MEMORY: for (c = 0; c < 4; ++c) { if (!dst0[c]) continue; @@ -2295,9 +2300,12 @@ Converter::handleLOAD(Value *dst0[4]) if (tgsi.getSrc(0).isIndirect(0)) ld->setIndirect(0, 1, fetchSrc(tgsi.getSrc(0).getIndirect(0), 0, 0)); } - return; + break; + default: + assert(!"Unsupported srcFile for LOAD"); } +/* Keep this around for now as reference when adding img support getResourceCoords(off, r, 1); if (isResourceRaw(code, r)) { @@ -2363,6 +2371,7 @@ Converter::handleLOAD(Value *dst0[4]) FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) if (dst0[c] != def[c]) mkMov(dst0[c], def[tgsi.getSrc(0).getSwizzle(c)]); +*/ } // For formatted stores, the write mask on OP_SUSTP can be used. @@ -2374,8 +2383,9 @@ Converter::handleSTORE() int c; std::vector off, src, dummy; - if (tgsi.getDst(0).getFile() == TGSI_FILE_BUFFER || - tgsi.getDst(0).getFile() == TGSI_FILE_MEMORY) { + switch (tgsi.getDst(0).getFile()) { + case TGSI_FILE_BUFFER: + case TGSI_FILE_MEMORY: for (c = 0; c < 4; ++c) { if (!(tgsi.getDst(0).getMask() & (1 << c))) continue; @@ -2396,9 +2406,12 @@ Converter::handleSTORE() if (tgsi.getDst(0).isIndirect(0)) st->setIndirect(0, 1, fetchSrc(tgsi.getDst(0).getIndirect(0), 0, 0)); } - return; + break; + default: + assert(!"Unsupported dstFile for STORE"); } +/* Keep this around for now as reference when adding img support getResourceCoords(off, r, 0); src = off; const int s = src.size(); @@ -2446,6 +2459,7 @@ Converter::handleSTORE() mkTex(OP_SUSTP, getResourceTarget(code, r), code->resources[r].slot, 0, dummy, src)->tex.mask = tgsi.getDst(0).getMask(); } +*/ } // XXX: These only work on resources with the single-component u32/s32 formats. @@ -2460,8 +2474,9 @@ Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp) std::vector defv; LValue *dst = getScratch(); - if (tgsi.getSrc(0).getFile() == TGSI_FILE_BUFFER || - tgsi.getSrc(0).getFile() == TGSI_FILE_MEMORY) { + switch (tgsi.getSrc(0).getFile()) { + case
[Nouveau] [PATCH 18/19] bios/vmap: unk0 field is the mode
this selects which formula is used to calculate the voltage Signed-off-by: Karol Herbst--- drm/nouveau/include/nvkm/subdev/bios/vmap.h | 2 +- drm/nouveau/nvkm/subdev/bios/vmap.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drm/nouveau/include/nvkm/subdev/bios/vmap.h b/drm/nouveau/include/nvkm/subdev/bios/vmap.h index 48fe71d..c036315 100644 --- a/drm/nouveau/include/nvkm/subdev/bios/vmap.h +++ b/drm/nouveau/include/nvkm/subdev/bios/vmap.h @@ -10,7 +10,7 @@ u16 nvbios_vmap_parse(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_vmap *); struct nvbios_vmap_entry { - u8 unk0; + u8 mode; u8 link; u32 min; u32 max; diff --git a/drm/nouveau/nvkm/subdev/bios/vmap.c b/drm/nouveau/nvkm/subdev/bios/vmap.c index f5463b1..159c456 100644 --- a/drm/nouveau/nvkm/subdev/bios/vmap.c +++ b/drm/nouveau/nvkm/subdev/bios/vmap.c @@ -100,7 +100,7 @@ nvbios_vmap_entry_parse(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len, info->arg[2] = nvbios_rd32(bios, vmap + 0x10); break; case 0x20: - info->unk0 = nvbios_rd08(bios, vmap + 0x00); + info->mode = nvbios_rd08(bios, vmap + 0x00); info->link = nvbios_rd08(bios, vmap + 0x01); info->min= nvbios_rd32(bios, vmap + 0x02); info->max= nvbios_rd32(bios, vmap + 0x06); -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH 0/2] Fix some VID parsing in the voltage table version 0x50
On a very few GPUs with the voltage table version 0x50 we have to read out the VIDs out of the entries of the table, where all the other gpus are either PWM based or get a base and a step voltage out of the table header. Currently nouveau tried to autodetect this and actually doesn't parse the entries. This Series adds two things: 1. It parses the entries 2. It decides upon a field in the voltage table to either use the base+step or entries approach This fixes volting on some GPUs Karol Herbst (2): bios/volt: handle voltage table version 0x50 with 0ed header volt: properly detect entry based voltage tables drm/nouveau/include/nvkm/subdev/bios/volt.h | 5 +++-- drm/nouveau/nvkm/subdev/bios/volt.c | 16 ++-- drm/nouveau/nvkm/subdev/volt/base.c | 7 +-- 3 files changed, 18 insertions(+), 10 deletions(-) -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH mesa v2 3/3] gallium: Remove unused TGSI_RESOURCE_ defines
These magic file-index defines where only ever used in the nouveau code and that no longer uses them. Signed-off-by: Hans de Goede--- Changes in v2: -Split out of "nouveau: codegen: Disable more old resource handling code" --- src/gallium/include/pipe/p_shader_tokens.h | 9 - 1 file changed, 9 deletions(-) diff --git a/src/gallium/include/pipe/p_shader_tokens.h b/src/gallium/include/pipe/p_shader_tokens.h index 65d8ad9..5ef6c30 100644 --- a/src/gallium/include/pipe/p_shader_tokens.h +++ b/src/gallium/include/pipe/p_shader_tokens.h @@ -237,15 +237,6 @@ struct tgsi_declaration_array { unsigned Padding : 22; }; -/* - * Special resources that don't need to be declared. They map to the - * GLOBAL/LOCAL/PRIVATE/INPUT compute memory spaces. - */ -#define TGSI_RESOURCE_GLOBAL 0x7fff -#define TGSI_RESOURCE_LOCAL0x7ffe -#define TGSI_RESOURCE_PRIVATE 0x7ffd -#define TGSI_RESOURCE_INPUT0x7ffc - #define TGSI_IMM_FLOAT32 0 #define TGSI_IMM_UINT321 #define TGSI_IMM_INT32 2 -- 2.7.2 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH mesa v2 1/3] nouveau: codegen: Disable more old resource handling code
Commit c3083c7082 ("nv50/ir: add support for BUFFER accesses") disabled / commented out some of the old resource handling code, but not all of it. Effectively all of it is dead already, if we ever enter the old code paths in handeLOAD / handleSTORE / handleATOM we will get an exception due to trying to access the now always zero-sized resources vector. Disable all the dead code. Signed-off-by: Hans de Goede--- Changes in v2: -Split out assert() on getFile() != BUFFER/MEMORY into a separate patch -Split out removal of TGSI_RESOURCE_* defines into a separate patch --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 15 --- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index 1e91ad3..41eb4e3 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp @@ -856,12 +856,14 @@ public: }; std::vector textureViews; + /* struct Resource { uint8_t target; // TGSI_TEXTURE_* bool raw; uint8_t slot; // $surface index }; std::vector resources; + */ struct MemoryFile { uint8_t mem_type; // TGSI_MEMORY_TYPE_* @@ -1419,8 +1421,8 @@ private: void handleLIT(Value *dst0[4]); void handleUserClipPlanes(); - Symbol *getResourceBase(int r); - void getResourceCoords(std::vector&, int r, int s); + // Symbol *getResourceBase(int r); + // void getResourceCoords(std::vector&, int r, int s); void handleLOAD(Value *dst0[4]); void handleSTORE(); @@ -2161,6 +2163,7 @@ Converter::handleLIT(Value *dst0[4]) } } +/* Keep this around for now as reference when adding img support static inline bool isResourceSpecial(const int r) { @@ -2256,6 +2259,7 @@ partitionLoadStore(uint8_t comp[2], uint8_t size[2], uint8_t mask) } return n + 1; } +*/ // For raw loads, granularity is 4 byte. // Usage of the texture read mask on OP_SULDP is not allowed. @@ -2290,6 +2294,7 @@ Converter::handleLOAD(Value *dst0[4]) return; } +/* Keep this around for now as reference when adding img support getResourceCoords(off, r, 1); if (isResourceRaw(code, r)) { @@ -2355,6 +2360,7 @@ Converter::handleLOAD(Value *dst0[4]) FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) if (dst0[c] != def[c]) mkMov(dst0[c], def[tgsi.getSrc(0).getSwizzle(c)]); +*/ } // For formatted stores, the write mask on OP_SUSTP can be used. @@ -2391,6 +2397,7 @@ Converter::handleSTORE() return; } +/* Keep this around for now as reference when adding img support getResourceCoords(off, r, 0); src = off; const int s = src.size(); @@ -2438,6 +2445,7 @@ Converter::handleSTORE() mkTex(OP_SUSTP, getResourceTarget(code, r), code->resources[r].slot, 0, dummy, src)->tex.mask = tgsi.getDst(0).getMask(); } +*/ } // XXX: These only work on resources with the single-component u32/s32 formats. @@ -2484,7 +2492,7 @@ Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp) return; } - +/* Keep this around for now as reference when adding img support getResourceCoords(srcv, r, 1); if (isResourceSpecial(r)) { @@ -2512,6 +2520,7 @@ Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp) for (int c = 0; c < 4; ++c) if (dst0[c]) dst0[c] = dst; // not equal to rDst so handleInstruction will do mkMov +*/ } void -- 2.7.2 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
Re: [Nouveau] [RFC mesa] nouveau: Add support for OpenCL global memory buffers
On 03/17/2016 05:07 PM, Hans de Goede wrote: Hi, On 14-03-16 21:50, Samuel Pitoiset wrote: Btw, do you need someone with commit access to push your previous series (the tgsi thing)? I can do this for you. Thanks for the offer. IIRC Ilia wanted some minor fixes there, so I'll do a v2 tomorrow. Talking about commit rights, I guess it would be convenient for all if I would get commit rights myself? I promise I won't push anythings without acks. Yes sure, I trust you, no worries. :-) I already have a freedesktop.org account, my username is jwrdegoede. Please open a ticket on bugs.freedesktop to ask for commit rights. Done: https://bugs.freedesktop.org/show_bug.cgi?id=94594 Can you or Ilia please ack this ? Done. Thanks, Hans ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH 12/19] clk: add index field to nvkm_cstate
From: Karol HerbstSigned-off-by: Karol Herbst --- drm/nouveau/include/nvkm/subdev/clk.h | 1 + drm/nouveau/nvkm/subdev/clk/base.c| 1 + 2 files changed, 2 insertions(+) diff --git a/drm/nouveau/include/nvkm/subdev/clk.h b/drm/nouveau/include/nvkm/subdev/clk.h index a292e5a..99ee05c 100644 --- a/drm/nouveau/include/nvkm/subdev/clk.h +++ b/drm/nouveau/include/nvkm/subdev/clk.h @@ -52,6 +52,7 @@ struct nvkm_cstate { struct list_head head; u8 voltage; u32 domain[nv_clk_src_max]; + u8 cstate; }; struct nvkm_pstate { diff --git a/drm/nouveau/nvkm/subdev/clk/base.c b/drm/nouveau/nvkm/subdev/clk/base.c index 00271a9..b79644d 100644 --- a/drm/nouveau/nvkm/subdev/clk/base.c +++ b/drm/nouveau/nvkm/subdev/clk/base.c @@ -161,6 +161,7 @@ nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate) *cstate = pstate->base; cstate->voltage = cstepX.voltage; + cstate->cstate = idx; while (domain && domain->name != nv_clk_src_max) { if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) { -- 2.7.3 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] display freezes when mouse pointer hits left edge
Hi! I have a very strange problem with a recently purchased ViewSonic 4k display connected via display port to a Thinkpad 410 with nvidia gt218m (nvs 3100m). Every time the mouse pointer touches the left edge of the screen, the display becomes a block of solid color and freezes. Suspend/resume of the laptop reanimates the display. I suspected a bug in the handling of the hardware cursor, so tried disabling that via HWcursor false in xorg.conf, to no avail. HWcursor false leads to black screens (internal and external). There are no related messages in dmesg or in xserver-log. versions: X server 1.17.2, linux kernel 4.5.0, nouveau 1.0.12, dual screens active (also happens with external monitor active only, though that configuration is very unstable), does not matter if the external monitor is configured as "left", "right" or "top" to the internal; did not try "bottom". Any Idea how I could further investigate this problem? As a workaround, i create a pointer barrier via xfixes, that works for now. TIA Robert ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
Re: [Nouveau] [PATCH mesa v2 1/3] nouveau: codegen: Disable more old resource handling code
Series is: Reviewed-by: Samuel PitoisetOn 03/17/2016 10:13 AM, Hans de Goede wrote: Commit c3083c7082 ("nv50/ir: add support for BUFFER accesses") disabled / commented out some of the old resource handling code, but not all of it. Effectively all of it is dead already, if we ever enter the old code paths in handeLOAD / handleSTORE / handleATOM we will get an exception due to trying to access the now always zero-sized resources vector. Disable all the dead code. Signed-off-by: Hans de Goede --- Changes in v2: -Split out assert() on getFile() != BUFFER/MEMORY into a separate patch -Split out removal of TGSI_RESOURCE_* defines into a separate patch --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 15 --- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index 1e91ad3..41eb4e3 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp @@ -856,12 +856,14 @@ public: }; std::vector textureViews; + /* struct Resource { uint8_t target; // TGSI_TEXTURE_* bool raw; uint8_t slot; // $surface index }; std::vector resources; + */ struct MemoryFile { uint8_t mem_type; // TGSI_MEMORY_TYPE_* @@ -1419,8 +1421,8 @@ private: void handleLIT(Value *dst0[4]); void handleUserClipPlanes(); - Symbol *getResourceBase(int r); - void getResourceCoords(std::vector&, int r, int s); + // Symbol *getResourceBase(int r); + // void getResourceCoords(std::vector&, int r, int s); void handleLOAD(Value *dst0[4]); void handleSTORE(); @@ -2161,6 +2163,7 @@ Converter::handleLIT(Value *dst0[4]) } } +/* Keep this around for now as reference when adding img support static inline bool isResourceSpecial(const int r) { @@ -2256,6 +2259,7 @@ partitionLoadStore(uint8_t comp[2], uint8_t size[2], uint8_t mask) } return n + 1; } +*/ // For raw loads, granularity is 4 byte. // Usage of the texture read mask on OP_SULDP is not allowed. @@ -2290,6 +2294,7 @@ Converter::handleLOAD(Value *dst0[4]) return; } +/* Keep this around for now as reference when adding img support getResourceCoords(off, r, 1); if (isResourceRaw(code, r)) { @@ -2355,6 +2360,7 @@ Converter::handleLOAD(Value *dst0[4]) FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) if (dst0[c] != def[c]) mkMov(dst0[c], def[tgsi.getSrc(0).getSwizzle(c)]); +*/ } // For formatted stores, the write mask on OP_SUSTP can be used. @@ -2391,6 +2397,7 @@ Converter::handleSTORE() return; } +/* Keep this around for now as reference when adding img support getResourceCoords(off, r, 0); src = off; const int s = src.size(); @@ -2438,6 +2445,7 @@ Converter::handleSTORE() mkTex(OP_SUSTP, getResourceTarget(code, r), code->resources[r].slot, 0, dummy, src)->tex.mask = tgsi.getDst(0).getMask(); } +*/ } // XXX: These only work on resources with the single-component u32/s32 formats. @@ -2484,7 +2492,7 @@ Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp) return; } - +/* Keep this around for now as reference when adding img support getResourceCoords(srcv, r, 1); if (isResourceSpecial(r)) { @@ -2512,6 +2520,7 @@ Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp) for (int c = 0; c < 4; ++c) if (dst0[c]) dst0[c] = dst; // not equal to rDst so handleInstruction will do mkMov +*/ } void ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau