Re: [Nouveau] Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues
On Tue, Aug 28, 2018 at 5:57 PM, Peter Wu wrote: > Only non-bridge devices can be passed to a guest, but perhaps logging > access to the emulated bridge is already sufficient. The Prefetchable > Base Upper 32 Bits register is at offset 0x28. > > In a trace where the Nvidia device is disabled/enabled via Device > Manager, I see writes on the enable path: > > 2571@1535108904.593107:rp_write_config (ioh3420, @0x28, 0x0, len=0x4) Did you do anything special to get an emulated bridge included in this setup? Folllowing the instructions at https://wiki.archlinux.org/index.php/PCI_passthrough_via_OVMF I can successfully pass through devices to windows running under virt-manager. In the nvidia GPU case I haven't got passed the driver installation failure, but I can pass through other devices OK and install their drivers. However I do not end up with any PCI-to-PCI bridges in this setup. The passed through device sits at address 00:08.0, parent is the PCI host bridge 00:00.0. (I'm trying to spy if Windows appears to restore or reset the PCI bridge prefetch registers upon resume) Thanks Daniel ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 100228] [NV137] bus: MMIO read of 00000000 FAULT at 409800 [ TIMEOUT ]
https://bugs.freedesktop.org/show_bug.cgi?id=100228 --- Comment #25 from Boris Vinogradov --- Created attachment 141455 --> https://bugs.freedesktop.org/attachment.cgi?id=141455&action=edit Kernel log with new firmware after some boot But I have some boot with reproduce error. -- You are receiving this mail because: You are the assignee for the bug.___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 100228] [NV137] bus: MMIO read of 00000000 FAULT at 409800 [ TIMEOUT ]
https://bugs.freedesktop.org/show_bug.cgi?id=100228 --- Comment #24 from Boris Vinogradov --- (In reply to Boris Vinogradov from comment #23) > Created attachment 141453 [details] > Kernel log with new firmware > > There're no any changes for me with new firmare from git. (In reply to Boris Vinogradov from comment #23) > Created attachment 141453 [details] > Kernel log with new firmware > > There're no any changes for me with new firmare from git. Sorry, I recheck. No errors in dmesg and sleep mode is work. -- You are receiving this mail because: You are the assignee for the bug.___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 100228] [NV137] bus: MMIO read of 00000000 FAULT at 409800 [ TIMEOUT ]
https://bugs.freedesktop.org/show_bug.cgi?id=100228 --- Comment #23 from Boris Vinogradov --- Created attachment 141453 --> https://bugs.freedesktop.org/attachment.cgi?id=141453&action=edit Kernel log with new firmware There're no any changes for me with new firmare from git. -- You are receiving this mail because: You are the assignee for the bug.___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 107817] NV50 : Nvidia NVS295 - Printing out EDID errors about not connected monitor ports
https://bugs.freedesktop.org/show_bug.cgi?id=107817 --- Comment #1 from Ilia Mirkin --- Should be fixed by: https://github.com/skeggsb/nouveau/commit/c122b4b8854c3ac7d1d5a8fd902b54e9e42a27ac Ben -- probably worth backporting... -- You are receiving this mail because: You are the assignee for the bug.___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 100228] [NV137] bus: MMIO read of 00000000 FAULT at 409800 [ TIMEOUT ]
https://bugs.freedesktop.org/show_bug.cgi?id=100228 --- Comment #22 from Rhys Kidd --- So there's updated low-level firmware shipped by NVIDIA for the GP107 (and other pre-GP108 Pascal GPUs) [0]. This might resolve or improve the situation for mobile GP107 users. nvidia: switch GP10[2467] to newer scrubber/ACR firmware (from GP108) This is being done to resolve issues being seen on a number of newer laptop systems which aren't compatible with the older binaries. Users will likely need to wait for their distribution to ship the updated firmware through the usual package update process, or get the firmware directly from upstream linux-firmware.git. [0] https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/?id=85c5d90fc155d78531efa5d2b02e92aaef7e4b88 -- You are receiving this mail because: You are the assignee for the bug.___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH] drm/nouveau/bios/dp: make array vsoff static, shrinks object size
From: Colin Ian King
Don't populate the array vsoff on the stack but instead make it
static. Makes the object code smaller by 67 bytes:
Before:
textdata bss dec hex filename
5753 112 0586516e9 .../nouveau/nvkm/subdev/bios/dp.o
After:
textdata bss dec hex filename
5622 176 0579816a6 .../nouveau/nvkm/subdev/bios/dp.o
(gcc version 8.2.0 x86_64)
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.c
index 3133b28f849c..b099d1209be8 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.c
@@ -212,7 +212,7 @@ nvbios_dpcfg_match(struct nvkm_bios *bios, u16 outp, u8 pc,
u8 vs, u8 pe,
u16 data;
if (*ver >= 0x30) {
- const u8 vsoff[] = { 0, 4, 7, 9 };
+ static const u8 vsoff[] = { 0, 4, 7, 9 };
idx = (pc * 10) + vsoff[vs] + pe;
if (*ver >= 0x40 && *ver <= 0x41 && *hdr >= 0x12)
idx += nvbios_rd08(bios, outp + 0x11) * 40;
--
2.17.1
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Re: [Nouveau] [PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues
Hi Daniel,
I love your patch! Perhaps something to improve:
[auto build test WARNING on pci/next]
[also build test WARNING on v4.19-rc2 next-20180831]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Daniel-Drake/PCI-add-prefetch-quirk-to-work-around-Asus-Nvidia-suspend-issues/20180901-043245
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: x86_64-randconfig-s5-09031857 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
:: branch date: 3 days ago
:: commit date: 3 days ago
All warnings (new ones prefixed by >>):
In file included from include/linux/export.h:45:0,
from include/linux/linkage.h:7,
from include/linux/kernel.h:7,
from drivers/pci/quirks.c:16:
drivers/pci/quirks.c: In function 'quirk_asus_pci_prefetch':
drivers/pci/quirks.c:5134:6: warning: argument 1 null where non-null
expected [-Wnonnull]
if (strcmp(sys_vendor, "ASUSTeK COMPUTER INC.") != 0)
^~~
include/linux/compiler.h:58:30: note: in definition of macro '__trace_if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^~~~
>> drivers/pci/quirks.c:5134:2: note: in expansion of macro 'if'
if (strcmp(sys_vendor, "ASUSTeK COMPUTER INC.") != 0)
^~
In file included from include/linux/uuid.h:20:0,
from include/linux/mod_devicetable.h:13,
from include/linux/pci.h:21,
from drivers/pci/quirks.c:18:
include/linux/string.h:44:12: note: in a call to function 'strcmp' declared
here
extern int strcmp(const char *,const char *);
^~
#
https://github.com/0day-ci/linux/commit/eccd2a8c40e1a705a666e6fe1c52aca3f2130984
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout eccd2a8c40e1a705a666e6fe1c52aca3f2130984
vim +/if +5134 drivers/pci/quirks.c
e7aaf90f9 Bjorn Helgaas 2018-08-15 4983
e7aaf90f9 Bjorn Helgaas 2018-08-15 4984 /*
ad281ecf1 Doug Meyer2018-05-23 4985 * Microsemi Switchtec NTB uses devfn
proxy IDs to move TLPs between
ad281ecf1 Doug Meyer2018-05-23 4986 * NT endpoints via the internal
switch fabric. These IDs replace the
ad281ecf1 Doug Meyer2018-05-23 4987 * originating requestor ID TLPs
which access host memory on peer NTB
ad281ecf1 Doug Meyer2018-05-23 4988 * ports. Therefore, all proxy IDs
must be aliased to the NTB device
ad281ecf1 Doug Meyer2018-05-23 4989 * to permit access when the IOMMU is
turned on.
ad281ecf1 Doug Meyer2018-05-23 4990 */
ad281ecf1 Doug Meyer2018-05-23 4991 static void
quirk_switchtec_ntb_dma_alias(struct pci_dev *pdev)
ad281ecf1 Doug Meyer2018-05-23 4992 {
ad281ecf1 Doug Meyer2018-05-23 4993void __iomem *mmio;
ad281ecf1 Doug Meyer2018-05-23 4994struct ntb_info_regs __iomem
*mmio_ntb;
ad281ecf1 Doug Meyer2018-05-23 4995struct ntb_ctrl_regs __iomem
*mmio_ctrl;
ad281ecf1 Doug Meyer2018-05-23 4996struct sys_info_regs __iomem
*mmio_sys_info;
ad281ecf1 Doug Meyer2018-05-23 4997u64 partition_map;
ad281ecf1 Doug Meyer2018-05-23 4998u8 partition;
ad281ecf1 Doug Meyer2018-05-23 4999int pp;
ad281ecf1 Doug Meyer2018-05-23 5000
ad281ecf1 Doug Meyer2018-05-23 5001if (pci_enable_device(pdev)) {
ad281ecf1 Doug Meyer2018-05-23 5002pci_err(pdev, "Cannot
enable Switchtec device\n");
ad281ecf1 Doug Meyer2018-05-23 5003return;
ad281ecf1 Doug Meyer2018-05-23 5004}
ad281ecf1 Doug Meyer2018-05-23 5005
ad281ecf1 Doug Meyer2018-05-23 5006mmio = pci_iomap(pdev, 0, 0);
ad281ecf1 Doug Meyer2018-05-23 5007if (mmio == NULL) {
ad281ecf1 Doug Meyer2018-05-23 5008
pci_disable_device(pdev);
ad281ecf1 Doug Meyer2018-05-23 5009pci_err(pdev, "Cannot
iomap Switchtec device\n");
ad281ecf1 Doug Meyer2018-05-23 5010return;
ad281ecf1 Doug Meyer2018-05-23 5011}
ad281ecf1 Doug Meyer2018-05-23 5012
ad281ecf1 Doug Meyer2018-05-23 5013pci_info(pdev, "Setting
Switchtec proxy ID aliases\n");
ad281ecf1 Doug Meyer2018-05-23 5014
ad281ecf1 Doug Meyer2018-05-23 5015mmio_ntb = mmio +
SWITCHTEC_GAS_NTB_OFFSET;
ad281ecf1 Doug Meyer2018-05-23 5016mmio_ctrl = (void __iomem *)
mmio_ntb + SWITCHTEC_NTB_REG_CTRL_OFFSET;
ad281ecf1 Doug Meyer2018-05-23 5017mmio_sys_info = mmio +
SWITCHTEC_GAS_SYS_INFO_OFFSET;
ad281ecf1 Doug Meyer2018-05-23 5018
ad281ecf1 Doug Meyer2018-05-23 5019partition =
ioread8(
Re: [Nouveau] [PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues
On Tue, Sep 04, 2018 at 03:07:52PM +0800, Daniel Drake wrote: > On Tue, Sep 4, 2018 at 2:43 PM, Mika Westerberg > wrote: > > Yes, can you check if the failing device BAR is included in any of the > > above entries? If not then it is probably not related. > > mtrr again for reference: > reg00: base=0x0c000 ( 3072MB), size= 1024MB, count=1: uncachable > reg01: base=0x0a000 ( 2560MB), size= 512MB, count=1: uncachable > reg02: base=0x09000 ( 2304MB), size= 256MB, count=1: uncachable > reg03: base=0x08c00 ( 2240MB), size= 64MB, count=1: uncachable > reg04: base=0x08b80 ( 2232MB), size=8MB, count=1: uncachable > > > The PCI bridge is: > 00:1c.0 PCI bridge: Intel Corporation Sunrise Point-LP PCI Express > Root Port (rev f1) (prog-if 00 [Normal decode]) > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- > ParErr- Stepping- SERR- FastB2B- DisINTx+ > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- > SERR- Latency: 0, Cache Line Size: 64 bytes > Interrupt: pin A routed to IRQ 122 > Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 > I/O behind bridge: e000-efff > Memory behind bridge: ee00-ef0f > Prefetchable memory behind bridge: d000-e1ff > > The memory behind bridge at ee00 is included in the mtrr region > reg00 which is 0xc000 to 0x. > Same for the prefetchable memory behind bridge. Yeah and it is uncachable so it should be fine. > The nvidia GPU which becomes unresponsive is: > > 01:00.0 3D controller: NVIDIA Corporation GM108M [GeForce 940MX] (rev a2) > Subsystem: ASUSTeK Computer Inc. GM108M [GeForce 940MX] > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- > ParErr- Stepping- SERR- FastB2B- DisINTx+ > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- > SERR- Latency: 0, Cache Line Size: 64 bytes > Interrupt: pin A routed to IRQ 133 > Region 0: Memory at ee00 (32-bit, non-prefetchable) [size=16M] > Region 1: Memory at d000 (64-bit, prefetchable) [size=256M] > Region 3: Memory at e000 (64-bit, prefetchable) [size=32M] > Region 5: I/O ports at e000 [size=128] > Expansion ROM at ef00 [disabled] [size=512K] > > Region 0, 1, 3 and the expansion ROM are all included in the mtrr region > reg00. > > > The magic register that we write to workaround the issue is in PCI > bridge config space - not in a BAR. OK, I just wanted to rule out MTRR misconfiguration but I guess it is not the case here. ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
Re: [Nouveau] [PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues
On Tue, Sep 4, 2018 at 2:43 PM, Mika Westerberg wrote: > Yes, can you check if the failing device BAR is included in any of the > above entries? If not then it is probably not related. mtrr again for reference: reg00: base=0x0c000 ( 3072MB), size= 1024MB, count=1: uncachable reg01: base=0x0a000 ( 2560MB), size= 512MB, count=1: uncachable reg02: base=0x09000 ( 2304MB), size= 256MB, count=1: uncachable reg03: base=0x08c00 ( 2240MB), size= 64MB, count=1: uncachable reg04: base=0x08b80 ( 2232MB), size=8MB, count=1: uncachable The PCI bridge is: 00:1c.0 PCI bridge: Intel Corporation Sunrise Point-LP PCI Express Root Port (rev f1) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- TAbort- SERR- https://lists.freedesktop.org/mailman/listinfo/nouveau
