[ns] Deadline Extension: VALID 2012 || November 18-23, 2012 - Lisbon, Portugal

2012-06-29 Thread Cristina Pascual


INVITATION:

=

The submission deadline has been extended to July 18, 2012.

Please consider to contribute to and/or forward to the appropriate groups the 
following opportunity to submit and 
publish original scientific results to VALID 2012.

In addition, authors of selected papers will be invited to submit extended 
article versions to one of the IARIA 
Journals: http://www.iariajournals.org

=


== VALID 2012 | Call for Papers ===

CALL FOR PAPERS, TUTORIALS, PANELS

VALID 2012, The Fourth International Conference on Advances in System Testing 
and Validation Lifecycle
November 18-23, 2012 - Lisbon, Portugal

General page: http://www.iaria.org/conferences2012/VALID12.html

Call for Papers: http://www.iaria.org/conferences2012/CfPVALID12.html

- regular papers
- short papers (work in progress)
- posters

Submission page: http://www.iaria.org/conferences2012/SubmitVALID12.html

Submission deadline: July 18, 2012

Sponsored by IARIA, www.iaria.org

Extended versions of selected papers will be published in IARIA Journals: 
http://www.iariajournals.org

Please note the Poster and Work in Progress options.

The topics suggested by the conference can be discussed in term of concepts, 
state of the art, research, 
standards, implementations, running experiments, applications, and industrial 
case studies.

Authors are invited to submit complete unpublished papers, which are not under 
review in any other conference or 
journal in the following, but not limited to, topic areas.

All tracks are open to both research and industry contributions, in terms of 
Regular papers, Posters, Work in 
progress, Technical/marketing/business presentations, Demos, Tutorials, and 
Panels.

Before submission, please check and comply with the Editorial rules: 
http://www.iaria.org/editorialrules.html


VALID 2012 Topics (topics and submission details: see CfP on the site)

Robust design methodologies
Designing methodologies for robust systems; Secure software techniques; 
Industrial real-time software; Defect 
avoidance; Cost models for robust systems; Design for testability; Design for 
reliability and variability; Design 
for adaptation and resilience; Design for fault-tolerance and fast recovery; 
Design for manufacturability, yield 
and reliability; Design for testability in the context of model-driven 
engineering

Vulnerability discovery and resolution
Vulnerability assessment; On-line error detection; Vulnerabilities in hardware 
security; Self-calibration; 
Alternative inspections; Non-intrusive vulnerability discovery methods; 
Embedded malware detection

Defects and Debugging
Debugging techniques; Component debug; System debug; Software debug; Hardware 
debug; System debug; Power-ground 
defects; Full-open defects in interconnecting lines; Physical defects in 
memories and microprocessors; Zero-defect 
principles

Diagnosis
Diagnosis techniques; Advances in silicon debug and diagnosis; Error diagnosis; 
History-based diagnosis; 
Multiple-defect diagnosis; Optical diagnostics; Testability and diagnosability; 
Diagnosis and testing in mo bile 
environments

System and feature testing
Test strategy for systems-in-package; Testing embedded systems; Testing 
high-speed systems; Testing delay and 
performance; Testing communication traffic and QoS/SLA metrics; Testing 
robustness; Software testing; Hardware 
testing; Supply-chain testing; Memory testing; Microprocessor testing; 
Mixed-signal production test; Testing 
multi-voltage domains; Interconnection and compatibility testing

Testing techniques and mechanisms
Fundamentals for digital and analog testing; Emerging testing methodologies; 
Engineering test coverage; Designing 
testing suites; Statistical testing; Functional testing; Parametric testing; 
Defect- and data-driven testing; 
Automated testing; Embedded testing; Autonomous self-testing; Low cost testing; 
Optimized testing; Testing systems 
and devices; Test standards

Testing of wireless communications systems
Testing of mobile wireless communication systems; Testing of wireless sensor 
networks; Testing of radio-frequency 
identification systems; Testing of ad-hoc networks; Testing methods for 
emerging standards; Hardware-based 
prototyping of wireless communication systems; Physical layer performance 
verification; On-chip testing of 
wireless communication systems; Modeling and simulation of wireless channels; 
Noise characterization and 
validation; Case studies and industrial applications of test instruments;

Software verification and validation
High-speed interface verification and fault-analysis; Software testing theory 
and practice; Model-based testing; 
Verification metrics; Service/application specific testing; Model checking; OO 
software testing; Testing embedded 
software; Quality assurance; Empirical studies for verification and validation; 
Software inspection techniques; 
Software testing tools; New approaches for software reliability 

[ns] Protocol development

2012-06-29 Thread Frank Wetzels

All,

I am in the process of the development a protocol. I read some of the 
documentation and suggestions.
Now, to ease my life a little bit, I decided to start with one of the 
suggestions: take an existing protocol and change it to my needs.
My question to you all is whether some of you have experience with doing this. 
If so, what existing protocol would be good to start with. Note that my 
protocol should run over UDP or TCP. It would be implemented as an agent.
Note that If the protocol runs in NS2, I need to tune some parameters in OTcl, 
meaning that variable binding is needed. Some parameters need to be sent within 
the protocol including some calculations.

Any suggestions?



Regards,
Frank




Frank Wetzels
frank.wetz...@cwi.nl
Cell: +31 6437 95508





[ns] Preamble/Frame Body Capture Threshold - IEEE 802.11b

2012-06-29 Thread Saravanan Kandasamy

Dear All,

If a stronger frame (P1) arrive during the reception of a weaker frame
(P2) by a certain threshold (dB), a MAC (802.11) in NS2 will decide it
as a collision.

However in  hardware implementation for e.g in Prism chipset, P1 can
still be captured if it arrives within P2's preamble time (Preamble
Capture) and in Atheros chipset, P1 can be captured even if it arrives
after P2's preamble time (Frame Body Capture) [1].

Settings in [2],
MAC = IEEE 802.11p
Preamble Capture Threshold = 5dB
Frame Body Capture Threshold  = 10dB

Settings in [3],
MAC = IEEE 802.11p
Preamble Capture Threshold = 4dB
Frame Body Capture Threshold = 10dB

Settings in [4],
MAC = IEEE 802.11a (5.9GHz)
Preamble Capture Threshold = 4dB
Frame Body Capture Threshold = 10dB

These capture thresholds very much dependent on the datarate, chipset
manufacturer's parameter setting etc. It is not defined by the
standard.

Anyone aware the optimal/chipset manufacturer setting for IEEE 802.11b
(e.g 11Mbps) for Preamble and Frame Body Capture Threshold ?

Would appreciate if you could point me to some papers or web URL's for
my further reading. My search have not been fruitful thus far.

rgds
Saravanan K

Reference:
[1] Jiho Ryu, Jeongkeun Lee, Sung-Ju Lee, and Taekyoung Kwon,
Revamping the IEEE 802.11a PHY simulation models,  in Proceedings of
the 11th international symposium on Modeling, analysis and simulation
of wireless and mobile systems (MSWiM '08), pp 28-36, New York, USA
[2] Hannes Hartenstein, Kenneth Laberteaux, VANET: Vehicular
Applications and Inter-Networking Technologies, Wiley,
[3] Moritz Killat* and Hannes Hartenstein, An Empirical Model for
Probability of Packet Reception in Vehicular Ad Hoc Networks, EURASIP
Journal on Wireless Communications and Networking, 2009
[4] Byungjin Cho, A Simulation study on Interference in CSMA/CA
Ad-Hoc Networks using Point Process, Masters Thesis, Aaltoo
University, 2010