[PATCH]: dfac674f29 target: arm_dap: Fix crash in 'dap info' command

[gerrit]

This is an automated email from Gerrit.

"Grant Ramsay " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8415

-- gerrit

commit dfac674f2930c8bc925cdbfb9fd60680f2b9afe7
Author: Grant Ramsay 
Date:   Wed Jul 24 10:57:03 2024 +1200

target: arm_dap: Fix crash in 'dap info' command

Check target is ARM before dereference. Running 'dap info'
when the current target is a mem_ap would cause a crash

Change-Id: I0c765f915f2ef7b9a7d20c934e144559ca4e5f1c
Signed-off-by: Grant Ramsay 

diff --git a/src/target/arm_dap.c b/src/target/arm_dap.c
index 9f4afae743..55e916845e 100644
--- a/src/target/arm_dap.c
+++ b/src/target/arm_dap.c
@@ -452,8 +452,15 @@ COMMAND_HANDLER(handle_dap_info_command)
struct adiv5_dap *dap = arm->dap;
uint64_t apsel;
 
+   if (!is_arm(arm)) {
+   command_print(CMD, "target '%s' is '%s'; not an ARM",
+   target_name(target),
+   target_type_name(target));
+   return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+   }
+
if (!dap) {
-   LOG_ERROR("DAP instance not available. Probably a HLA 
target...");
+   command_print(CMD, "DAP instance not available. Probably a HLA 
target...");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
 

-- 

[PATCH]: 7f6b2fa971 jtag: Use 'unsigned int' data type

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8414

-- gerrit

commit 7f6b2fa97134c7a17371f90b66458bb85d88b22c
Author: Marc Schink 
Date:   Mon Jul 22 09:30:42 2024 +0200

jtag: Use 'unsigned int' data type

This patch modifies as little code as possible in order to simplify the
review. Data types that are affected by these changes will be addresses
in following patches.

While at it, apply coding style fixes if these are not too extensive.

Change-Id: I364467b88f193f8387623a19e6994ef77899d117
Signed-off-by: Marc Schink 

diff --git a/src/jtag/commands.c b/src/jtag/commands.c
index a15af68dbc..1bca4e8df3 100644
--- a/src/jtag/commands.c
+++ b/src/jtag/commands.c
@@ -178,9 +178,9 @@ enum scan_type jtag_scan_type(const struct scan_command 
*cmd)
return type;
 }
 
-int jtag_scan_size(const struct scan_command *cmd)
+unsigned int jtag_scan_size(const struct scan_command *cmd)
 {
-   int bit_count = 0;
+   unsigned int bit_count = 0;
 
/* count bits in scan command */
for (unsigned int i = 0; i < cmd->num_fields; i++)
@@ -191,9 +191,7 @@ int jtag_scan_size(const struct scan_command *cmd)
 
 int jtag_build_buffer(const struct scan_command *cmd, uint8_t **buffer)
 {
-   int bit_count = 0;
-
-   bit_count = jtag_scan_size(cmd);
+   unsigned int bit_count = jtag_scan_size(cmd);
*buffer = calloc(1, DIV_ROUND_UP(bit_count, 8));
 
bit_count = 0;
diff --git a/src/jtag/commands.h b/src/jtag/commands.h
index 885e6a3608..29fa8426ee 100644
--- a/src/jtag/commands.h
+++ b/src/jtag/commands.h
@@ -157,7 +157,7 @@ struct jtag_command *jtag_command_queue_get(void);
 
 void jtag_scan_field_clone(struct scan_field *dst, const struct scan_field 
*src);
 enum scan_type jtag_scan_type(const struct scan_command *cmd);
-int jtag_scan_size(const struct scan_command *cmd);
+unsigned int jtag_scan_size(const struct scan_command *cmd);
 int jtag_read_buffer(uint8_t *buffer, const struct scan_command *cmd);
 int jtag_build_buffer(const struct scan_command *cmd, uint8_t **buffer);
 
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 261de98612..9eae5e74ba 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -39,7 +39,7 @@
 #include "server/ipdbg.h"
 
 /** The number of JTAG queue flushes (for profiling and debugging purposes). */
-static int jtag_flush_queue_count;
+static unsigned int jtag_flush_queue_count;
 
 /* Sleep this # of ms after flushing the queue */
 static int jtag_flush_queue_sleep;
@@ -92,10 +92,10 @@ static bool jtag_verify = true;
 
 /* how long the OpenOCD should wait before attempting JTAG communication after 
reset lines
  *deasserted (in ms) */
-static int adapter_nsrst_delay;/* default to no nSRST delay */
-static int jtag_ntrst_delay;/* default to no nTRST delay */
-static int adapter_nsrst_assert_width; /* width of assertion */
-static int jtag_ntrst_assert_width;/* width of assertion */
+static unsigned int adapter_nsrst_delay;   /* default to no nSRST delay */
+static unsigned int jtag_ntrst_delay;/* default to no nTRST delay */
+static unsigned int adapter_nsrst_assert_width;/* width of assertion */
+static unsigned int jtag_ntrst_assert_width;   /* width of assertion */
 
 /**
  * Contains a single callback along with a pointer that will be passed
@@ -186,10 +186,10 @@ struct jtag_tap *jtag_all_taps(void)
return __jtag_all_taps;
 };
 
-unsigned jtag_tap_count(void)
+unsigned int jtag_tap_count(void)
 {
struct jtag_tap *t = jtag_all_taps();
-   unsigned n = 0;
+   unsigned int n = 0;
while (t) {
n++;
t = t->next_tap;
@@ -197,10 +197,10 @@ unsigned jtag_tap_count(void)
return n;
 }
 
-unsigned jtag_tap_count_enabled(void)
+unsigned int jtag_tap_count_enabled(void)
 {
struct jtag_tap *t = jtag_all_taps();
-   unsigned n = 0;
+   unsigned int n = 0;
while (t) {
if (t->enabled)
n++;
@@ -499,7 +499,7 @@ void jtag_add_tlr(void)
  *
  * @todo Update naming conventions to stop assuming everything is JTAG.
  */
-int jtag_add_tms_seq(unsigned nbits, const uint8_t *seq, enum tap_state state)
+int jtag_add_tms_seq(unsigned int nbits, const uint8_t *seq, enum tap_state 
state)
 {
int retval;
 
@@ -567,12 +567,12 @@ int jtag_add_statemove(tap_state_t goal_state)
/* nothing to do */;
 
else if (tap_is_state_stable(cur_state) && 
tap_is_state_stable(goal_state)) {
-   unsigned tms_bits  = tap_get_tms_path(cur_state, goal_state);
-   unsigned tms_count = tap_get_tms_path_len(cur_state, 
goal_state);
+   unsigned int tms_bits  = tap_get_tms_path(cur_state, 
goal_state);
+   unsigned int tms_count = tap_get_tms_path_len(cur_state, 
goal_sta

[PATCH]: 6bf51a9cf7 jtag: Use 'unsigned int' for 'scan_field.num_bits'

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8413

-- gerrit

commit 6bf51a9cf799d384648cccbf14e4d2b21424ce72
Author: Marc Schink 
Date:   Sun Jul 21 20:28:17 2024 +0200

jtag: Use 'unsigned int' for 'scan_field.num_bits'

This patch modifies as little code as possible in order to simplify the
review. Data types that are affected by these changes will be addresses
in following patches.

While at it, apply coding style fixes if these are not too extensive.

Change-Id: Idcbea2705512201eb326c3e6cef110dbc674
Signed-off-by: Marc Schink 

diff --git a/src/jtag/core.c b/src/jtag/core.c
index a8190dd23c..261de98612 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -964,12 +964,12 @@ int default_interface_jtag_execute_queue(void)
struct scan_field *field = 
cmd->cmd.scan->fields + i;
if (field->out_value) {
char *str = 
buf_to_hex_str(field->out_value, field->num_bits);
-   LOG_DEBUG_IO("  %db out: %s", 
field->num_bits, str);
+   LOG_DEBUG_IO("  %ub out: %s", 
field->num_bits, str);
free(str);
}
if (field->in_value) {
char *str = 
buf_to_hex_str(field->in_value, field->num_bits);
-   LOG_DEBUG_IO("  %db  in: %s", 
field->num_bits, str);
+   LOG_DEBUG_IO("  %ub  in: %s", 
field->num_bits, str);
free(str);
}
}
@@ -1337,7 +1337,7 @@ static int jtag_validate_ircapture(void)
int retval;
 
/* when autoprobing, accommodate huge IR lengths */
-   int total_ir_length = 0;
+   unsigned int total_ir_length = 0;
for (tap = jtag_tap_next_enabled(NULL); tap; tap = 
jtag_tap_next_enabled(tap)) {
if (tap->ir_length == 0)
total_ir_length += JTAG_IRLEN_MAX;
diff --git a/src/jtag/drivers/bitq.c b/src/jtag/drivers/bitq.c
index 6816b9b86f..c5343a515c 100644
--- a/src/jtag/drivers/bitq.c
+++ b/src/jtag/drivers/bitq.c
@@ -19,7 +19,7 @@ struct bitq_interface *bitq_interface; /* low level bit queue 
interface */
 struct bitq_state {
struct jtag_command *cmd; /* command currently processed */
unsigned int field_idx; /* index of field currently being processed */
-   int bit_pos; /* position of bit currently being processed */
+   unsigned int bit_pos; /* position of bit currently being processed */
int status; /* processing status */
 };
 static struct bitq_state bitq_in_state;
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 243b01c63b..a6dcfcd3d2 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -1772,11 +1772,11 @@ static void cmsis_dap_execute_scan(struct jtag_command 
*cmd)
cmsis_dap_end_state(cmd->cmd.scan->end_state);
 
struct scan_field *field = cmd->cmd.scan->fields;
-   unsigned scan_size = 0;
+   unsigned int scan_size = 0;
 
for (unsigned int i = 0; i < cmd->cmd.scan->num_fields; i++, field++) {
scan_size += field->num_bits;
-   LOG_DEBUG_IO("%s%s field %u/%u %d bits",
+   LOG_DEBUG_IO("%s%s field %u/%u %u bits",
field->in_value ? "in" : "",
field->out_value ? "out" : "",
i,
diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index 70e88ca113..faa0b673ed 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -451,7 +451,7 @@ static void ftdi_execute_scan(struct jtag_command *cmd)
 
for (unsigned int i = 0; i < cmd->cmd.scan->num_fields; i++, field++) {
scan_size += field->num_bits;
-   LOG_DEBUG_IO("%s%s field %u/%u %d bits",
+   LOG_DEBUG_IO("%s%s field %u/%u %u bits",
field->in_value ? "in" : "",
field->out_value ? "out" : "",
i,
diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c
index ff39167359..21a5da8875 100644
--- a/src/jtag/drivers/jlink.c
+++ b/src/jtag/drivers/jlink.c
@@ -183,7 +183,7 @@ static void jlink_execute_scan(struct jtag_command *cmd)
 
for 

[PATCH]: 41bef75267 target/avrt: Remove unused parameter 'rti'

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8412

-- gerrit

commit 41bef75267ccdfa822510c601e95c22b440e55cd
Author: Marc Schink 
Date:   Sun Jul 21 17:43:08 2024 +0200

target/avrt: Remove unused parameter 'rti'

Change-Id: Ib6957b89190188f5c15fadc3d4036709f19a6cea
Signed-off-by: Marc Schink 

diff --git a/src/target/avrt.c b/src/target/avrt.c
index ccce7e5e52..8886a46778 100644
--- a/src/target/avrt.c
+++ b/src/target/avrt.c
@@ -31,10 +31,10 @@ static int avr_assert_reset(struct target *target);
 static int avr_deassert_reset(struct target *target);
 
 /* IR and DR functions */
-static int mcu_write_ir(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out, 
int ir_len, int rti);
-static int mcu_write_dr(struct jtag_tap *tap, uint8_t *dr_in, uint8_t *dr_out, 
int dr_len, int rti);
-static int mcu_write_ir_u8(struct jtag_tap *tap, uint8_t *ir_in, uint8_t 
ir_out, int ir_len, int rti);
-static int mcu_write_dr_u32(struct jtag_tap *tap, uint32_t *ir_in, uint32_t 
ir_out, int dr_len, int rti);
+static int mcu_write_ir(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out, 
int ir_len);
+static int mcu_write_dr(struct jtag_tap *tap, uint8_t *dr_in, uint8_t *dr_out, 
int dr_len);
+static int mcu_write_ir_u8(struct jtag_tap *tap, uint8_t *ir_in, uint8_t 
ir_out, int ir_len);
+static int mcu_write_dr_u32(struct jtag_tap *tap, uint32_t *ir_in, uint32_t 
ir_out, int dr_len);
 
 struct target_type avr_target = {
.name = "avr",
@@ -137,17 +137,17 @@ static int avr_deassert_reset(struct target *target)
 int avr_jtag_senddat(struct jtag_tap *tap, uint32_t *dr_in, uint32_t dr_out,
int len)
 {
-   return mcu_write_dr_u32(tap, dr_in, dr_out, len, 1);
+   return mcu_write_dr_u32(tap, dr_in, dr_out, len);
 }
 
 int avr_jtag_sendinstr(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out)
 {
-   return mcu_write_ir_u8(tap, ir_in, ir_out, AVR_JTAG_INS_LEN, 1);
+   return mcu_write_ir_u8(tap, ir_in, ir_out, AVR_JTAG_INS_LEN);
 }
 
 /* IR and DR functions */
 static int mcu_write_ir(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out,
-   int ir_len, int rti)
+   int ir_len)
 {
if (!tap) {
LOG_ERROR("invalid tap");
@@ -166,7 +166,7 @@ static int mcu_write_ir(struct jtag_tap *tap, uint8_t 
*ir_in, uint8_t *ir_out,
 }
 
 static int mcu_write_dr(struct jtag_tap *tap, uint8_t *dr_in, uint8_t *dr_out,
-   int dr_len, int rti)
+   int dr_len)
 {
if (!tap) {
LOG_ERROR("invalid tap");
@@ -181,27 +181,27 @@ static int mcu_write_dr(struct jtag_tap *tap, uint8_t 
*dr_in, uint8_t *dr_out,
 }
 
 static int mcu_write_ir_u8(struct jtag_tap *tap, uint8_t *ir_in,
-   uint8_t ir_out, int ir_len, int rti)
+   uint8_t ir_out, int ir_len)
 {
if (ir_len > 8) {
LOG_ERROR("ir_len overflow, maximum is 8");
return ERROR_FAIL;
}
 
-   mcu_write_ir(tap, ir_in, _out, ir_len, rti);
+   mcu_write_ir(tap, ir_in, _out, ir_len);
 
return ERROR_OK;
 }
 
 static int mcu_write_dr_u32(struct jtag_tap *tap, uint32_t *dr_in,
-   uint32_t dr_out, int dr_len, int rti)
+   uint32_t dr_out, int dr_len)
 {
if (dr_len > 32) {
LOG_ERROR("dr_len overflow, maximum is 32");
return ERROR_FAIL;
}
 
-   mcu_write_dr(tap, (uint8_t *)dr_in, (uint8_t *)_out, dr_len, rti);
+   mcu_write_dr(tap, (uint8_t *)dr_in, (uint8_t *)_out, dr_len);
 
return ERROR_OK;
 }

-- 

[PATCH]: 9dc29a8566 doc: Makefile.am: add SPDX license

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8410

-- gerrit

commit 9dc29a856618a62725a33ea8f07a1ba37d6638f5
Author: Antonio Borneo 
Date:   Sun Jul 21 13:06:58 2024 +0200

doc: Makefile.am: add SPDX license

Add the SPDX tag line.

Change-Id: Iffe73faaf20614f9e5237b7afba3c580dfa03a9e
Signed-off-by: Antonio Borneo 

diff --git a/doc/Makefile.am b/doc/Makefile.am
index 67592038d5..17d051ff87 100644
--- a/doc/Makefile.am
+++ b/doc/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 info_TEXINFOS += %D%/openocd.texi
 %C%_openocd_TEXINFOS = %D%/fdl.texi
 

-- 

[PATCH]: 367f99cd95 uncrustify.cfg: add SPDX license

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8411

-- gerrit

commit 367f99cd951a1c2753ff665a6ad5a5e5fa208798
Author: Antonio Borneo 
Date:   Sun Jul 21 13:07:47 2024 +0200

uncrustify.cfg: add SPDX license

Add the SPDX tag line.

Change-Id: I701580948a0cacdb7fe31d91ed730e848da9b0ba
Signed-off-by: Antonio Borneo 

diff --git a/uncrustify.cfg b/uncrustify.cfg
index 07d097818a..593bcc2adf 100644
--- a/uncrustify.cfg
+++ b/uncrustify.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 tok_split_gte=false
 utf8_byte=false
 utf8_force=false

-- 

[PATCH]: 7506757495 checkpatch: extend checks to TCL, Makefile.am and configure.ac files

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8408

-- gerrit

commit 7506757495211c5a44b9d5cab6cf0148655cb588
Author: Antonio Borneo 
Date:   Sun Jul 21 13:00:08 2024 +0200

checkpatch: extend checks to TCL, Makefile.am and configure.ac files

The script, originally written for Linux code, skips several tests
on files whose name's extension is not in Perl list
'(h|c|s|S|sh|dtsi|dts)$'.
This causes such tests to not be executed on OpenOCD TCL files and
on Makefile.am and configure.ac.

Modify the script to include the OpenOCD files in the list.

Change-Id: I17c96bf32ee40d9390e60996e176e4e927c00197
Signed-off-by: Antonio Borneo 

diff --git a/tools/scripts/checkpatch.pl b/tools/scripts/checkpatch.pl
index 9dda61cde0..26589beab0 100755
--- a/tools/scripts/checkpatch.pl
+++ b/tools/scripts/checkpatch.pl
@@ -3769,7 +3769,11 @@ sub process {
}
 
 # check we are in a valid source file if not then ignore this hunk
+   if (!$OpenOCD) {
next if ($realfile !~ /\.(h|c|s|S|sh|dtsi|dts)$/);
+   } else { # !$OpenOCD
+   next if ($realfile !~ /\.(h|c|s|S|sh|dtsi|dts|tcl|cfg|ac|am)$/);
+   } # !$OpenOCD
 
 # check for using SPDX-License-Identifier on the wrong line number
if ($realline != $checklicenseline &&

-- 

[PATCH]: 007f9b1a59 tcl: fix minor typos and repeated words

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8409

-- gerrit

commit 007f9b1a59343e1117227dd48f263e6814f70187
Author: Antonio Borneo 
Date:   Sun Jul 21 13:04:36 2024 +0200

tcl: fix minor typos and repeated words

Detected with checkpatch.

Change-Id: Id306928496cf70bbe7ff065bf726bc7dceadce26
Signed-off-by: Antonio Borneo 

diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index 4740471c89..22a38a7089 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -43,7 +43,7 @@ proc read_register {register} {
 
 proc at91sam9g20_reset_start { } {
 
-   # Make sure that the the jtag is running slow, since there are a number 
of different ways the board
+   # Make sure that the jtag is running slow, since there are a number of 
different ways the board
# can be configured coming into this state that can cause communication 
problems with the jtag
# adapter.  Also since this call can be made following a "reset init" 
where fast memory accesses
# are enabled, need to temporarily shut this down so that the RSTC_MR 
register can be written at slower
@@ -202,7 +202,7 @@ proc at91sam9g20_reset_init { } {
mww 0xea00 0x3
mww 0x2000 0
 
-   # Signal normal mode using the SDRAMC_MR register and follow with a 
zero value write the the starting
+   # Signal normal mode using the SDRAMC_MR register and follow with a 
zero value write the starting
# memory location for the SDRAM.
 
mww 0xea00 0x0
diff --git a/tcl/board/netgear-wg102.cfg b/tcl/board/netgear-wg102.cfg
index 15f9c118af..0a7dad5ab2 100644
--- a/tcl/board/netgear-wg102.cfg
+++ b/tcl/board/netgear-wg102.cfg
@@ -27,7 +27,7 @@ $_TARGETNAME configure -event reset-init {
# 0x3800 - 0x07 << FLASHCTL_WST2_S
# FLASHCTL_AC_8M  0x0006 - Size of flash
# FLASHCTL_E  0x0008 - Flash bank enable (added)
-   # FLASHCTL_WP 0x0400 - write protect. If used, CFI mode wont 
work!!
+   # FLASHCTL_WP 0x0400 - write protect. If used, CFI mode won't 
work!!
# FLASHCTL_MWx16  0x1000 - 16bit mode. Do not use it!!
# FLASHCTL_MWx8   0x - 8bit mode.
mww 0xb840 0x000d3ce1
diff --git a/tcl/target/allwinner_v3s.cfg b/tcl/target/allwinner_v3s.cfg
index 437bd956df..6c3435ed74 100644
--- a/tcl/target/allwinner_v3s.cfg
+++ b/tcl/target/allwinner_v3s.cfg
@@ -28,7 +28,7 @@
 # UART2_TX PB0 Per default disabled
 # UART2_RX PB1 Per default disabled
 #
-# JTAG is enabled by default after power on on listed JTAG_* pins. So far the
+# JTAG is enabled by default after power-on on listed JTAG_* pins. So far the
 # boot sequence is:
 # Time Action
 # ms   Power ON
diff --git a/tcl/target/ampere_emag.cfg b/tcl/target/ampere_emag.cfg
index 0b0bd9e88d..fd68fcd482 100644
--- a/tcl/target/ampere_emag.cfg
+++ b/tcl/target/ampere_emag.cfg
@@ -8,7 +8,7 @@
 
 #
 # Configure defaults for target
-# Can be overriden in board configuration file
+# Can be overridden in board configuration file
 #
 
 if { [info exists CHIPNAME] } {
diff --git a/tcl/target/icepick.cfg b/tcl/target/icepick.cfg
index 5509532111..e5d5706f02 100644
--- a/tcl/target/icepick.cfg
+++ b/tcl/target/icepick.cfg
@@ -6,7 +6,7 @@
 #
 
 # Utilities for TI ICEpick-C/D used in most TI SoCs
-# Details about the ICEPick are available in the the TRM for each SoC
+# Details about the ICEPick are available in the TRM for each SoC
 # and http://processors.wiki.ti.com/index.php/ICEPICK
 
 # create "constants"

-- 

[PATCH]: 998bed8484 tcl/target: add initial Bouffalo Lab BL702 chip series support

[gerrit]

This is an automated email from Gerrit.

"Marek Kraus " just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8407

-- gerrit

commit 998bed848438a452d68072b743fd32a4c21d4056
Author: Marek Kraus 
Date:   Sat Jul 20 16:29:19 2024 +0200

tcl/target: add initial Bouffalo Lab BL702 chip series support

Adds initial support for the BL702 series of chips, BL702, BL704 and BL706.
No flash bank support yet.

File name bl702.tcl was chosen over bl70x.tcl, because Bouffalo Lab
uses bl702 to mark the whole series in many of their tools.

The ndmreset bit in the RISC-V Debug Module isn't implemented correctly,
so it doesn't trigger a system reset as it should.
To solve this problem, the software reset is implemented
in the reset-assert-pre hook, which uses best reset method I could find.
What is not reset is the GLB core, which handles GPIOs, pinmux, etc.
The reset mechanism has been extensively tested, and works correctly
for both "reset run" and "reset halt", which the latter
halts very early in the BootROM.

Change-Id: I5ced6eb3902d1b9d9c1bba56f817ec5dc3493cb0
Signed-off-by: Marek Kraus 

diff --git a/tcl/target/bl702.cfg b/tcl/target/bl702.cfg
new file mode 100644
index 00..952aa2630c
--- /dev/null
+++ b/tcl/target/bl702.cfg
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Bouffalo Labs BL702, BL704 and BL706 target
+#
+# https://en.bouffalolab.com/product/?type=detail=8
+#
+# Default JTAG pins: (if not changed by eFuse configuration)
+# TMS - GPIO0
+# TDI - GPIO1
+# TCK - GPIO2
+# TDO - GPIO9
+#
+
+source [find mem_helper.tcl]
+
+transport select jtag
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME bl702
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x2e05
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+
+riscv set_mem_access sysbus
+
+$_TARGETNAME configure -work-area-phys 0x2202 -work-area-size 0x1 
-work-area-backup 1
+
+# Internal RC ticks on 32 MHz, so this speed should be safe to use.
+adapter speed 4000
+
+$_TARGETNAME configure -event reset-assert-pre {
+   halt
+
+   # Switch clock to internal RC32M
+   # In HBN_GLB, set ROOT_CLK_SEL = 0
+   mmw 0x4000f030 0x0 0x0003
+   # Wait for clock switch
+   sleep 10
+
+   # GLB_REG_BCLK_DIS_FALSE
+   mww 0x4ffc 0x0
+
+   # HCLK is RC32M, so BCLK/HCLK doesn't need divider
+   # In GLB_CLK_CFG0, set BCLK_DIV = 0 and HCLK_DIV = 0
+   mmw 0x4000 0x0 0x0000
+   # Wait for clock to stabilize
+   sleep 10
+
+   # Do reset
+   # In GLB_SWRST_CFG2, clear CTRL_SYS_RESET, CTRL_CPU_RESET and 
CTRL_PWRON_RESET
+   mmw 0x4018 0x0 0x0007
+   # In GLB_SWRST_CFG2, set CTRL_SYS_RESET, CTRL_CPU_RESET and 
CTRL_PWRON_RESET to 1
+   mmw 0x4018 0x6 0x0
+}
\ No newline at end of file

-- 

[PATCH]: 54394901bb jep106: update to revision JEP106BJ.01 July 2024

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8406

-- gerrit

commit 54394901bbbc859967d2f2408ea58c5e7607f668
Author: Antonio Borneo 
Date:   Thu Jul 18 14:51:01 2024 +0200

jep106: update to revision JEP106BJ.01 July 2024

Change-Id: Iebab3f6a3b1f6d82f955997fd4e691c55d01c767
Signed-off-by: Antonio Borneo 

diff --git a/src/helper/jep106.inc b/src/helper/jep106.inc
index 958dc4ea4d..b74cda85fe 100644
--- a/src/helper/jep106.inc
+++ b/src/helper/jep106.inc
@@ -8,9 +8,7 @@
  * identification code list, please visit the JEDEC website at www.jedec.org .
  */
 
-/* This file is aligned to revision JEP106BI January 2024. */
-
-/* "NXP (Philips)" is reported below, while missing since JEP106BG */
+/* This file is aligned to revision JEP106BJ.01 July 2024. */
 
 [0][0x01 - 1] = "AMD",
 [0][0x02 - 1] = "AMI",
@@ -30,7 +28,7 @@
 [0][0x10 - 1] = "NEC",
 [0][0x11 - 1] = "RCA",
 [0][0x12 - 1] = "Raytheon",
-[0][0x13 - 1] = "Conexant (Rockwell)",
+[0][0x13 - 1] = "Synaptics",
 [0][0x14 - 1] = "Seeq",
 [0][0x15 - 1] = "NXP (Philips)",
 [0][0x16 - 1] = "Synertek",
@@ -1045,7 +1043,7 @@
 [8][0x17 - 1] = "Axell Corporation",
 [8][0x18 - 1] = "Essencore Limited",
 [8][0x19 - 1] = "Phytium",
-[8][0x1a - 1] = "Xi'an UniIC Semiconductors Co Ltd",
+[8][0x1a - 1] = "UniIC Semiconductors Co Ltd",
 [8][0x1b - 1] = "Ambiq Micro",
 [8][0x1c - 1] = "eveRAM Technology Inc",
 [8][0x1d - 1] = "Infomax",
@@ -1452,7 +1450,7 @@
 [11][0x34 - 1] = "Acacia Communications",
 [11][0x35 - 1] = "Beijinjinshengyihe Technology Co Ltd",
 [11][0x36 - 1] = "Zyzyx",
-[11][0x37 - 1] = "T-HEAD Semiconductor Co Ltd",
+[11][0x37 - 1] = "C-SKY Microsystems Co Ltd",
 [11][0x38 - 1] = "Shenzhen Hystou Technology Co Ltd",
 [11][0x39 - 1] = "Syzexion",
 [11][0x3a - 1] = "Kembona",
@@ -1938,4 +1936,31 @@
 [15][0x22 - 1] = "SkyeChip",
 [15][0x23 - 1] = "Guangzhou Kaishile Trading Co Ltd",
 [15][0x24 - 1] = "Jing Pai Digital Technology (Shenzhen) Co",
+[15][0x25 - 1] = "Memoritek",
+[15][0x26 - 1] = "Zhejiang Hikstor Technology Co Ltd",
+[15][0x27 - 1] = "Memoritek PTE Ltd",
+[15][0x28 - 1] = "Longsailing Semiconductor Co Ltd",
+[15][0x29 - 1] = "LX Semicon",
+[15][0x2a - 1] = "Shenzhen Techwinsemi Technology Co Ltd",
+[15][0x2b - 1] = "AOC",
+[15][0x2c - 1] = "GOEPEL Electronic GmbH",
+[15][0x2d - 1] = "Shenzhen G-Bong Technology Co Ltd",
+[15][0x2e - 1] = "Openedges Technology Inc",
+[15][0x2f - 1] = "EA Semi Shangahi Limited",
+[15][0x30 - 1] = "EMBCORF",
+[15][0x31 - 1] = "Shenzhen MicroBT Electronics Technology",
+[15][0x32 - 1] = "Shanghai Simor Chip Semiconductor Co",
+[15][0x33 - 1] = "Xllbyte",
+[15][0x34 - 1] = "Guangzhou Maidite Electronics Co Ltd.",
+[15][0x35 - 1] = "Zhejiang Changchun Technology Co Ltd",
+[15][0x36 - 1] = "Beijing Cloud Security Technology Co Ltd",
+[15][0x37 - 1] = "SSTC Technology and Distribution Inc",
+[15][0x38 - 1] = "Shenzhen Panmin Technology Co Ltd",
+[15][0x39 - 1] = "ITE Tech Inc",
+[15][0x3a - 1] = "Beijing Zettastone Technology Co Ltd",
+[15][0x3b - 1] = "Powerchip Micro Device",
+[15][0x3c - 1] = "Shenzhen Ysemi Computing Co Ltd",
+[15][0x3d - 1] = "Shenzhen Titan Micro Electronics Co Ltd",
+[15][0x3e - 1] = "Shenzhen Macroflash Technology Co Ltd",
+[15][0x3f - 1] = "Advantech Group",
 /* EOF */

-- 

[PATCH]: 93aeef8cd1 target profiling: add support for 64-bit systems profiling

[gerrit]

This is an automated email from Gerrit.

"Yurii Shutkin " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8405

-- gerrit

commit 93aeef8cd18eff8fea4c73f373c97e8ff808f3dd
Author: Yurii Shutkin 
Date:   Thu Jul 18 09:33:45 2024 +0300

target profiling: add support for 64-bit systems profiling

64-bit support preserves array of 32-bit words to store samples
by using an additional single high 32-bit word that should
be the same for all collected samples.

High 32-bit word is calculated automatically by the first
coming sample and checked against other samples. Consequent
samples that do not match this high 32-bit word are skipped.

'with_range', 'start_address' and 'end_address' are added to
collection function to be able to select samples that
determine the high 32-bit work. This also makes samples
collection more efficient and allows to collect more samples.

Change-Id: Ie379161d20ec514c9fb28daa04f6164e3bd1616e
Signed-off-by: Yurii Shutkin 

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 791a432427..b75910deb8 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2277,8 +2277,9 @@ void cortex_m_deinit_target(struct target *target)
free(cortex_m);
 }
 
-int cortex_m_profiling(struct target *target, uint32_t *samples,
- uint32_t max_num_samples, uint32_t *num_samples, 
uint32_t seconds)
+int cortex_m_profiling(struct target *target, uint32_t *samples, uint32_t 
*sample_address_hi32,
+   bool with_range, uint64_t start_address, uint64_t 
end_address,
+   uint32_t max_num_samples, uint32_t *num_samples, 
uint32_t seconds)
 {
struct timeval timeout, now;
struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -2292,7 +2293,8 @@ int cortex_m_profiling(struct target *target, uint32_t 
*samples,
}
if (reg_value == 0) {
LOG_TARGET_INFO(target, "PCSR sampling not supported on this 
processor.");
-   return target_profiling_default(target, samples, 
max_num_samples, num_samples, seconds);
+   return target_profiling_default(target, samples, 
sample_address_hi32, with_range,
+   start_address, end_address, max_num_samples, 
num_samples, seconds);
}
 
gettimeofday(, NULL);
@@ -2318,12 +2320,17 @@ int cortex_m_profiling(struct target *target, uint32_t 
*samples,
if (read_count > 1024)
read_count = 1024;
 
+   // this case ignores with_range flag, all samples are 
collected
+   // and will be filtered out later on write_gmon
retval = mem_ap_read_buf_noincr(armv7m->debug_ap,
(void *)[sample_count],
4, read_count, DWT_PCSR);
sample_count += read_count;
} else {
-   target_read_u32(target, DWT_PCSR, 
[sample_count++]);
+   target_read_u32(target, DWT_PCSR, _value);
+   if (!with_range || (reg_value >= start_address && 
reg_value < end_address)) {
+   samples[sample_count++] = reg_value;
+   }
}
 
if (retval != ERROR_OK) {
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 726fca2903..91198c2ce5 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -337,7 +337,8 @@ int cortex_m_remove_watchpoint(struct target *target, 
struct watchpoint *watchpo
 void cortex_m_enable_breakpoints(struct target *target);
 void cortex_m_enable_watchpoints(struct target *target);
 void cortex_m_deinit_target(struct target *target);
-int cortex_m_profiling(struct target *target, uint32_t *samples,
+int cortex_m_profiling(struct target *target, uint32_t *samples, uint32_t 
*sample_address_hi32,
+   bool with_range, uint64_t start_address, uint64_t end_address,
uint32_t max_num_samples, uint32_t *num_samples, uint32_t seconds);
 
 #endif /* OPENOCD_TARGET_CORTEX_M_H */
diff --git a/src/target/openrisc/or1k.c b/src/target/openrisc/or1k.c
index 8c38610805..0556431d2a 100644
--- a/src/target/openrisc/or1k.c
+++ b/src/target/openrisc/or1k.c
@@ -1200,7 +1200,8 @@ static int or1k_checksum_memory(struct target *target, 
target_addr_t address,
return ERROR_FAIL;
 }
 
-static int or1k_profiling(struct target *target, uint32_t *samples,
+static int or1k_profiling(struct target *target, uint32_t *samples, uint32_t 
*sample_address_hi32,
+   bool with_range, uint64_t start_address, uint64_t end_address,
uint32_t max_num_samples, uint32_t *num_samples, uint32_t 
seconds)
 {
struct timeval timeout, now;
@@ -123

[PATCH]: 8541f717df jtag: Use 'unsigned int' for 'abs_chain_position'

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8402

-- gerrit

commit 8541f717df1546c763b369635a05cb5111727a37
Author: Marc Schink 
Date:   Wed Jul 17 16:48:14 2024 +0200

jtag: Use 'unsigned int' for 'abs_chain_position'

Change-Id: I1ac0a6a86f820b051619aa132754a69b8f8e0ab9
Signed-off-by: Marc Schink 

diff --git a/src/jtag/core.c b/src/jtag/core.c
index c8f20b73c6..939199462e 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -212,7 +212,7 @@ unsigned jtag_tap_count_enabled(void)
 /** Append a new TAP to the chain of all taps. */
 static void jtag_tap_add(struct jtag_tap *t)
 {
-   unsigned jtag_num_taps = 0;
+   unsigned int jtag_num_taps = 0;
 
struct jtag_tap **tap = &__jtag_all_taps;
while (*tap) {
@@ -1471,7 +1471,7 @@ void jtag_tap_init(struct jtag_tap *tap)
jtag_register_event_callback(_reset_callback, tap);
jtag_tap_add(tap);
 
-   LOG_DEBUG("Created Tap: %s @ abs position %d, "
+   LOG_DEBUG("Created Tap: %s @ abs position %u, "
"irlen %d, capture: 0x%x mask: 0x%x", tap->dotted_name,
tap->abs_chain_position, tap->ir_length,
(unsigned) tap->ir_capture_value,
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index 470ae18334..46ab584d92 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -102,7 +102,7 @@ struct jtag_tap {
char *chip;
char *tapname;
char *dotted_name;
-   int abs_chain_position;
+   unsigned int abs_chain_position;
/** Is this TAP disabled after JTAG reset? */
bool disabled_after_reset;
/** Is this TAP currently enabled? */
@@ -150,7 +150,7 @@ struct jtag_tap *jtag_all_taps(void);
 const char *jtag_tap_name(const struct jtag_tap *tap);
 struct jtag_tap *jtag_tap_by_string(const char *dotted_name);
 struct jtag_tap *jtag_tap_by_jim_obj(Jim_Interp *interp, Jim_Obj *obj);
-struct jtag_tap *jtag_tap_by_position(unsigned abs_position);
+struct jtag_tap *jtag_tap_by_position(unsigned int abs_position);
 struct jtag_tap *jtag_tap_next_enabled(struct jtag_tap *p);
 unsigned jtag_tap_count_enabled(void);
 unsigned jtag_tap_count(void);
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 2f4a8fe2e6..0aa82031cd 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -132,7 +132,7 @@ typedef enum {
 
 typedef struct {
struct list_head list;
-   int abs_chain_position;
+   unsigned int abs_chain_position;
 
/* The number of harts connected to this DM. */
int hart_count;
@@ -236,7 +236,7 @@ static dm013_info_t *get_dm(struct target *target)
if (info->dm)
return info->dm;
 
-   int abs_chain_position = target->tap->abs_chain_position;
+   unsigned int abs_chain_position = target->tap->abs_chain_position;
 
dm013_info_t *entry;
dm013_info_t *dm = NULL;

-- 

[PATCH]: b27b198093 jtag/commands: Use 'unsigned int' data type

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8404

-- gerrit

commit b27b1980935ee33a2490a63991d5db82bd940ba4
Author: Marc Schink 
Date:   Wed Jul 17 17:35:42 2024 +0200

jtag/commands: Use 'unsigned int' data type

This patch modifies as little code as possible in order to simplify the
review. Data types that are affected by these changes will be addresses
in following patches.

While at it, apply coding style fixes if these are not too extensive.

Change-Id: Ie048b3d472f546fecb6733f17f9d0f17fda40187
Signed-off-by: Marc Schink 

diff --git a/src/jtag/commands.c b/src/jtag/commands.c
index a60684c880..6ffbdf8f68 100644
--- a/src/jtag/commands.c
+++ b/src/jtag/commands.c
@@ -166,10 +166,9 @@ void jtag_scan_field_clone(struct scan_field *dst, const 
struct scan_field *src)
 
 enum scan_type jtag_scan_type(const struct scan_command *cmd)
 {
-   int i;
int type = 0;
 
-   for (i = 0; i < cmd->num_fields; i++) {
+   for (unsigned int i = 0; i < cmd->num_fields; i++) {
if (cmd->fields[i].in_value)
type |= SCAN_IN;
if (cmd->fields[i].out_value)
@@ -182,10 +181,9 @@ enum scan_type jtag_scan_type(const struct scan_command 
*cmd)
 int jtag_scan_size(const struct scan_command *cmd)
 {
int bit_count = 0;
-   int i;
 
/* count bits in scan command */
-   for (i = 0; i < cmd->num_fields; i++)
+   for (unsigned int i = 0; i < cmd->num_fields; i++)
bit_count += cmd->fields[i].num_bits;
 
return bit_count;
@@ -194,18 +192,17 @@ int jtag_scan_size(const struct scan_command *cmd)
 int jtag_build_buffer(const struct scan_command *cmd, uint8_t **buffer)
 {
int bit_count = 0;
-   int i;
 
bit_count = jtag_scan_size(cmd);
*buffer = calloc(1, DIV_ROUND_UP(bit_count, 8));
 
bit_count = 0;
 
-   LOG_DEBUG_IO("%s num_fields: %i",
+   LOG_DEBUG_IO("%s num_fields: %u",
cmd->ir_scan ? "IRSCAN" : "DRSCAN",
cmd->num_fields);
 
-   for (i = 0; i < cmd->num_fields; i++) {
+   for (unsigned int i = 0; i < cmd->num_fields; i++) {
if (cmd->fields[i].out_value) {
if (LOG_LEVEL_IS(LOG_LVL_DEBUG_IO)) {
char *char_buf = 
buf_to_hex_str(cmd->fields[i].out_value,
@@ -234,14 +231,13 @@ int jtag_build_buffer(const struct scan_command *cmd, 
uint8_t **buffer)
 
 int jtag_read_buffer(uint8_t *buffer, const struct scan_command *cmd)
 {
-   int i;
int bit_count = 0;
int retval;
 
/* we return ERROR_OK, unless a check fails, or a handler reports a 
problem */
retval = ERROR_OK;
 
-   for (i = 0; i < cmd->num_fields; i++) {
+   for (unsigned int i = 0; i < cmd->num_fields; i++) {
/* if neither in_value nor in_handler
 * are specified we don't have to examine this field
 */
diff --git a/src/jtag/commands.h b/src/jtag/commands.h
index 825907733f..cdf19adfd5 100644
--- a/src/jtag/commands.h
+++ b/src/jtag/commands.h
@@ -36,7 +36,7 @@ struct scan_command {
/** instruction/not data scan */
bool ir_scan;
/** number of fields in *fields array */
-   int num_fields;
+   unsigned int num_fields;
/** pointer to an array of data scan fields */
struct scan_field *fields;
/** state in which JTAG commands should finish */
@@ -50,14 +50,14 @@ struct statemove_command {
 
 struct pathmove_command {
/** number of states in *path */
-   int num_states;
+   unsigned int num_states;
/** states that have to be passed */
tap_state_t *path;
 };
 
 struct runtest_command {
/** number of cycles to spend in Run-Test/Idle state */
-   int num_cycles;
+   unsigned int num_cycles;
/** state in which JTAG commands should finish */
tap_state_t end_state;
 };
@@ -65,7 +65,7 @@ struct runtest_command {
 
 struct stableclocks_command {
/** number of clock cycles that should be sent */
-   int num_cycles;
+   unsigned int num_cycles;
 };
 
 
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 939199462e..b89005ad9d 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -514,7 +514,7 @@ int jtag_add_tms_seq(unsigned nbits, const uint8_t *seq, 
enum tap_state state)
return retval;
 }
 
-void jtag_add_pathmove(int num_states, const tap_state_t *path)
+void jtag_add_pathmove(unsigned int num_states, const tap_state_t *path)
 {
tap_state_t cur_state = cmd_queue_cur_state;
 
@@ -525,7 +525,7 @@ void jtag_add_pathmove(int num_states, const tap_state_t 
*path)
  

[PATCH]: 2f6b9e8fba jtag: Use 'unsigned int' for 'ir_length'

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8403

-- gerrit

commit 2f6b9e8fbab944aac65bd072af78f8d26809c933
Author: Marc Schink 
Date:   Wed Jul 17 16:59:51 2024 +0200

jtag: Use 'unsigned int' for 'ir_length'

This patch modifies as little code as possible in order to simplify the
review. Data types that are affected by these changes will be modified
in following patches.

Change-Id: I83921d70e017095d63547e0bc9fe61779191d9d0
Signed-off-by: Marc Schink 

diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index 46ab584d92..76bfdf157b 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -107,7 +107,7 @@ struct jtag_tap {
bool disabled_after_reset;
/** Is this TAP currently enabled? */
bool enabled;
-   int ir_length; /**< size of instruction register */
+   unsigned int ir_length; /**< size of instruction register */
uint32_t ir_capture_value;
uint8_t *expected; /**< Capture-IR expected value */
uint32_t ir_capture_mask;
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index e534134276..9e53bbcb6a 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -448,11 +448,11 @@ static COMMAND_HELPER(handle_jtag_newtap_args, struct 
jtag_tap *tap)
if (!CMD_ARGC)
return ERROR_COMMAND_ARGUMENT_INVALID;
 
-   COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tap->ir_length);
+   COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], tap->ir_length);
CMD_ARGC--;
CMD_ARGV++;
-   if (tap->ir_length > (int)(8 * 
sizeof(tap->ir_capture_value)))
-   LOG_WARNING("%s: huge IR length %d", 
tap->dotted_name, tap->ir_length);
+   if (tap->ir_length > (8 * 
sizeof(tap->ir_capture_value)))
+   LOG_WARNING("%s: huge IR length %u", 
tap->dotted_name, tap->ir_length);
break;
 
case NTAP_OPT_IRMASK:
@@ -820,7 +820,7 @@ COMMAND_HANDLER(handle_scan_chain_command)
tap->enabled ? 'Y' : 'n',
(unsigned int)(tap->idcode),
expected_id,
-   (unsigned int)(tap->ir_length),
+   tap->ir_length,
(unsigned int)(expected),
(unsigned int)(expected_mask));
 
@@ -972,7 +972,7 @@ COMMAND_HANDLER(handle_irscan_command)
if (retval != ERROR_OK)
goto error_return;
 
-   int field_size = tap->ir_length;
+   unsigned int field_size = tap->ir_length;
fields[i].num_bits = field_size;
uint8_t *v = calloc(1, DIV_ROUND_UP(field_size, 8));
if (!v) {
diff --git a/src/target/avrt.c b/src/target/avrt.c
index 61bef329fe..ccce7e5e52 100644
--- a/src/target/avrt.c
+++ b/src/target/avrt.c
@@ -153,7 +153,7 @@ static int mcu_write_ir(struct jtag_tap *tap, uint8_t 
*ir_in, uint8_t *ir_out,
LOG_ERROR("invalid tap");
return ERROR_FAIL;
}
-   if (ir_len != tap->ir_length) {
+   if ((unsigned int)ir_len != tap->ir_length) {
LOG_ERROR("invalid ir_len");
return ERROR_FAIL;
}

-- 

[PATCH]: 155b88d23a jtag: Use bool data type for 'jtag_verify'

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8401

-- gerrit

commit 155b88d23a2f900399930a6c85cd429b56750247
Author: Marc Schink 
Date:   Wed Jul 17 15:11:46 2024 +0200

jtag: Use bool data type for 'jtag_verify'

Change-Id: Iae46e45c7523252eee44224e6b9b3b1484aaeb35
Signed-off-by: Marc Schink 

diff --git a/src/jtag/core.c b/src/jtag/core.c
index c84d5aa3d3..c8f20b73c6 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -88,7 +88,7 @@ static enum reset_types jtag_reset_config = RESET_NONE;
 tap_state_t cmd_queue_cur_state = TAP_RESET;
 
 static bool jtag_verify_capture_ir = true;
-static int jtag_verify = 1;
+static bool jtag_verify = true;
 
 /* how long the OpenOCD should wait before attempting JTAG communication after 
reset lines
  *deasserted (in ms) */

-- 

[PATCH]: 6861bd1bba flash/nor: add DesignWare SPI controller driver

[gerrit]

This is an automated email from Gerrit.

"Sergey Matsievskiy " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8400

-- gerrit

commit 6861bd1bbac352218c7a8cc45659fd38410c9059
Author: Matsievskiy S.V. 
Date:   Tue Jul 16 08:08:23 2024 +0300

flash/nor: add DesignWare SPI controller driver

Driver for DesignWare SPI controller, found on many SoCs (see compatible
list in Linux device tree bindings
Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml). This
implementation only supports MIPS as it was the only one available for the
tests, however, adding support for other architectures should require only
few adjustments. Driver relies on flash/nor/spi.h to find Flash chip info.
Driver internal functions support 24bit addressing mode, but due to
limitations of flash/nor/spi.h, it is not used. The repoted writing speed
is about 60kb/s.
Lint, sanitizer and valgraind repoted warnings were not related to the
driver.

Change-Id: Id3df5626ab88055f034f74f274823051dedefeb1
Signed-off-by: Matsievskiy S.V. 

diff --git a/contrib/loaders/flash/dw-spi/Makefile 
b/contrib/loaders/flash/dw-spi/Makefile
new file mode 100644
index 00..a2f4cced70
--- /dev/null
+++ b/contrib/loaders/flash/dw-spi/Makefile
@@ -0,0 +1,33 @@
+TOOLCHAIN:=mipsel-linux-gnu-
+CC:=$(TOOLCHAIN)gcc
+OBJCOPY:=$(TOOLCHAIN)objcopy
+CFLAGS:=-O2 -Wall -Wextra -fpic
+SRC=dw-spi.c
+OBJ=$(patsubst %.c, %.o,$(SRC))
+
+# sparx-iv
+ifeq ($(TOOLCHAIN),mipsel-linux-gnu-)
+   CFLAGS+= -march=24kec
+endif
+
+all: \
+   $(TOOLCHAIN)transaction.inc \
+   $(TOOLCHAIN)erase.inc \
+   $(TOOLCHAIN)check_fill.inc \
+   $(TOOLCHAIN)program.inc \
+   $(TOOLCHAIN)read.inc
+
+$(TOOLCHAIN)%.bin: $(OBJ)
+   $(OBJCOPY) --dump-section .$*=$@ $<
+
+%.inc: %.bin
+   xxd -i > $@ < $<
+
+.PHONY: clean
+clean:
+   rm -rf .ccls-cache
+   find . \( \
+   -iname "*.o" \
+   -o -iname "*.bin" \
+   -o -iname "*.inc" \
+   \) -delete
diff --git a/contrib/loaders/flash/dw-spi/dw-spi.c 
b/contrib/loaders/flash/dw-spi/dw-spi.c
new file mode 100644
index 00..2bdf115d25
--- /dev/null
+++ b/contrib/loaders/flash/dw-spi/dw-spi.c
@@ -0,0 +1,262 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "dw-spi.h"
+
+#include "../../../../src/flash/nor/dw-spi-helper.h"
+
+/**
+ * @brief Generic flash transaction.
+ *
+ * nCS is only asserted when TX FIFO is not empty.
+ * Must supply TX FIFO with data for the whole duration of transaction.
+ *
+ * @param[in] arg Function arguments.
+ * @retval 0 Success. Returned in argument register.
+ * @retval 1 Failure. Returned in argument register.
+ */
+__attribute__((section(".transaction"))) void
+transaction(struct dw_spi_transaction_t *arg)
+{
+   register uint8_t  *buffer_tx = (uint8_t *)arg->buffer;
+   register uint8_t  *buffer_rx = buffer_tx;
+   register uint32_t  size  = arg->size;
+   register volatile uint8_t *status= (uint8_t *)arg->status_reg;
+   register volatile uint8_t *data  = (uint8_t *)arg->data_reg;
+
+   wait_tx_finish(status);
+   flush_rx(status, data);
+
+   for (; size > 0; size--) {
+   wait_tx_available(status);
+   push_byte(data, *buffer_tx++);
+   if (!tx_in_progress(status)) {
+   RET_ERROR;
+   BKPT;
+   return;
+   }
+   if (arg->read_flag && rx_available(status))
+   *buffer_rx++ = rcv_byte(data);
+   }
+
+   if (arg->read_flag) {
+   while (buffer_rx < buffer_tx) {
+   wait_rx_available(status);
+   *buffer_rx++ = rcv_byte(data);
+   }
+   }
+
+   RET_OK;
+   BKPT;
+}
+
+/**
+ * @brief Check flash sectors are filled with pattern. Primary use for
+ * checking sector erase state.
+ *
+ * nCS is only asserted when TX FIFO is not empty.
+ * Must supply TX FIFO with data for the whole duration of transaction.
+ *
+ * @param[in] arg Function arguments.
+ * @retval 0 Success. Returned in argument register.
+ * @retval 1 Failure. Returned in argument register.
+ */
+__attribute__((section(".check_fill"))) void
+check_fill(struct dw_spi_check_fill_t *arg)
+{
+   register uint32_t tx_size;
+   register uint32_t rx_size;
+   register uint32_t dummy_count;
+   register uint8_t  filled;
+   register uint8_t *fill_status_array =
+   (uint8_t *)arg->fill_status_array;
+   register volatile uint8_t *status = (uint8_t *)arg->status_reg;
+   register volatile uint8_t *data   = (uint8_t *)arg->data_reg;
+
+   for (; arg->se

[PATCH]: 8e18f0874c target: cortex_m: fix polling for target kept under reset

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8399

-- gerrit

commit 8e18f0874c1fced5870114163d092f2f872a1be5
Author: Antonio Borneo 
Date:   Mon Jul 15 11:56:36 2024 +0200

target: cortex_m: fix polling for target kept under reset

In multi-target SoC not all the targets are running simultaneously
and some target could be powered off or kept under reset.
Commit 4892e32294c6 ("target/cortex_m: allow poll quickly get out
of TARGET_RESET state") does not considers the case of a target
that is kept in reset and expects the target to change state from
TARGET_RESET immediately.
This causes OpenOCD to log continuously:
Info : [stm32mp15x.cm4] external reset detected
Info : [stm32mp15x.cm4] external reset detected
Info : [stm32mp15x.cm4] external reset detected

Read again dhcsr to detect the 'stable' reset status and quit,
waiting for next poll to re-check the target's status.

Change-Id: Ic66029b988404a1599bb99bc66d4a8845b8b02c6
Signed-off-by: Antonio Borneo 
Fixes: 4892e32294c6 ("target/cortex_m: allow poll quickly get out of 
TARGET_RESET state")

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 791a432427..a300992a41 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -988,6 +988,18 @@ static int cortex_m_poll_one(struct target *target)
 * and keep it until the next poll to allow its 
detection */
return ERROR_OK;
}
+
+   /* refresh status bits */
+   retval = cortex_m_read_dhcsr_atomic_sticky(target);
+   if (retval != ERROR_OK)
+   return retval;
+
+   /* If still under reset, quit and re-check at next poll */
+   if (cortex_m->dcb_dhcsr_cumulated_sticky & S_RESET_ST) {
+   cortex_m->dcb_dhcsr_cumulated_sticky &= ~S_RESET_ST;
+   return ERROR_OK;
+   }
+
/* S_RESET_ST was expected (in a reset command). Continue 
processing
 * to quickly get out of TARGET_RESET state */
}

-- 

[PATCH]: c4f9d68f08 binarybuffer: str_to_buf(): support optional separator '_'

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8398

-- gerrit

commit c4f9d68f08b566ae5d21ed402a8e6da4095511c0
Author: Antonio Borneo 
Date:   Sun Jul 14 15:27:30 2024 +0200

binarybuffer: str_to_buf(): support optional separator '_'

While handling long sequence of digits, mainly binary, it's more
comfortable and readable using a separator in the same way ',' is
often used for the thousands.

Add the support for '_' as generic separator. It is ignored, so it
can be used in any position in the number.

Change-Id: I46abbc92c412487e0690a7a816fcce762a492f63
Signed-off-by: Antonio Borneo 

diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c
index 930cf12f90..507f89dbb7 100644
--- a/src/helper/binarybuffer.c
+++ b/src/helper/binarybuffer.c
@@ -272,7 +272,9 @@ int str_to_buf(const char *str, void *_buf, unsigned int 
buf_bitsize)
unsigned int tmp;
const char c = *str;
 
-   if ((c >= '0') && (c <= '9')) {
+   if (c == '_') {
+   continue;
+   } else if ((c >= '0') && (c <= '9')) {
tmp = c - '0';
} else if ((c >= 'a') && (c <= 'f')) {
tmp = c - 'a' + 10;

-- 

[PATCH]: 9bbdb687cf binarybuffer: str_to_buf(): simplify it and fix scan-build error

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8396

-- gerrit

commit 9bbdb687cf16355d4cba5e20aac41084c9ac6058
Author: Antonio Borneo 
Date:   Sun Jul 14 14:59:34 2024 +0200

binarybuffer: str_to_buf(): simplify it and fix scan-build error

The function str_to_buf() can be simplified by writing directly
the intermediate results in the output buffer.
Such simplification improves the readability and also makes
scan-build happy, as it does not trigger anymore the warning:
src/helper/binarybuffer.c:328:8: warning: Use of memory
allocated with size zero [unix.Malloc]
if ((b256_buf[(buf_len / 8)] & mask) != 0x0) {

Change-Id: I1cef9a1ec5ff0e5841ba582610f273e89e7a81da
Signed-off-by: Antonio Borneo 

diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c
index dd1449276a..ced1701d71 100644
--- a/src/helper/binarybuffer.c
+++ b/src/helper/binarybuffer.c
@@ -175,19 +175,6 @@ uint32_t flip_u32(uint32_t value, unsigned int num)
return c;
 }
 
-static int ceil_f_to_u32(float x)
-{
-   if (x < 0)  /* return zero for negative numbers */
-   return 0;
-
-   uint32_t y = x; /* cut off fraction */
-
-   if ((x - y) > 0.0)  /* if there was a fractional part, increase by 
one */
-   y++;
-
-   return y;
-}
-
 char *buf_to_hex_str(const void *_buf, unsigned buf_len)
 {
unsigned len_bytes = DIV_ROUND_UP(buf_len, 8);
@@ -252,7 +239,10 @@ static const char *str_strip_number_prefix(const char 
*str, unsigned int radix)
 int str_to_buf(const char *str, void *_buf, unsigned int buf_bitsize)
 {
assert(str);
+   assert(_buf);
+   assert(buf_bitsize);
 
+   uint8_t *buf = _buf;
unsigned int radix = str_radix_guess(str);
 
str = str_strip_number_prefix(str, radix);
@@ -261,86 +251,49 @@ int str_to_buf(const char *str, void *_buf, unsigned int 
buf_bitsize)
if (str_len == 0)
return ERROR_INVALID_NUMBER;
 
-   float factor = 0.0;
-   if (radix == 16)
-   factor = 0.5;   /* log(16) / log(256) = 0.5 */
-   else if (radix == 10)
-   factor = 0.41524;   /* log(10) / log(256) = 0.41524 */
-   else if (radix == 8)
-   factor = 0.375; /* log(8) / log(256) = 0.375 */
-   else
-   assert(false);
-
-   const unsigned int b256_len = ceil_f_to_u32(str_len * factor);
-
-   /* Allocate a buffer for digits in base-256 notation */
-   uint8_t *b256_buf = calloc(b256_len, 1);
-   if (!b256_buf) {
-   LOG_ERROR("Unable to allocate memory");
-   return ERROR_FAIL;
-   }
+   const size_t buf_len = DIV_ROUND_UP(buf_bitsize, 8);
+   bzero(buf, buf_len);
 
/* Go through the zero-terminated buffer
 * of input digits (ASCII) */
-   for (unsigned int i = 0; str[i]; i++) {
-   uint32_t tmp = str[i];
-   if ((tmp >= '0') && (tmp <= '9')) {
-   tmp = (tmp - '0');
-   } else if ((tmp >= 'a') && (tmp <= 'f')) {
-   tmp = (tmp - 'a' + 10);
-   } else if ((tmp >= 'A') && (tmp <= 'F')) {
-   tmp = (tmp - 'A' + 10);
+   for (; *str; str++) {
+   unsigned int tmp;
+   const char c = *str;
+
+   if ((c >= '0') && (c <= '9')) {
+   tmp = c - '0';
+   } else if ((c >= 'a') && (c <= 'f')) {
+   tmp = c - 'a' + 10;
+   } else if ((c >= 'A') && (c <= 'F')) {
+   tmp = c - 'A' + 10;
} else {
/* Characters other than [0-9,a-f,A-F] are invalid */
-   free(b256_buf);
return ERROR_INVALID_NUMBER;
}
 
-   if (tmp >= radix) {
-   /* Encountered a digit that is invalid for the current 
radix */
-   free(b256_buf);
+   /* Error on invalid digit for current radix */
+   if (tmp >= radix)
return ERROR_INVALID_NUMBER;
-   }
 
-   /* Add the current digit (tmp) to the intermediate result
-* in b256_buf (base-256 digits) */
-   for (unsigned int j = 0; j < b256_len; j++) {
-   tmp += (uint32_t)b256_buf[j] * radix;
-   b256_buf[j] = (uint8_t)(tmp & 0xFFu);
+   /* Add the current digit (tmp) to the intermediate result in 
buf */
+   for (unsigned int j = 0; j < buf_len; j++) {
+   tmp += buf[j] * radix;
+   buf[j] = t

[PATCH]: 0a775cab49 binarybuffer: str_to_buf(): rename buf_len as buf_bitsize

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8395

-- gerrit

commit 0a775cab49ed72f0699c4b5839f3f61f140fbd05
Author: Antonio Borneo 
Date:   Sun Jul 14 12:31:53 2024 +0200

binarybuffer: str_to_buf(): rename buf_len as buf_bitsize

The name 'buf_len' is misleading, as it usually refers to the byte
length of a buffer. Here we use it for the length in bits.

Rename it as 'buf_bitsize'.
While there, fix checkpatch error by changing the index type to
'unsigned int'.

Change-Id: I78855ed79a346d996d9c0100d94d14c64a36b228
Signed-off-by: Antonio Borneo 

diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c
index da6e10bab7..dd1449276a 100644
--- a/src/helper/binarybuffer.c
+++ b/src/helper/binarybuffer.c
@@ -249,7 +249,7 @@ static const char *str_strip_number_prefix(const char *str, 
unsigned int radix)
}
 }
 
-int str_to_buf(const char *str, void *_buf, unsigned int buf_len)
+int str_to_buf(const char *str, void *_buf, unsigned int buf_bitsize)
 {
assert(str);
 
@@ -314,18 +314,18 @@ int str_to_buf(const char *str, void *_buf, unsigned int 
buf_len)
assert(tmp == 0);
}
 
-   /* The result must not contain more bits than buf_len. */
+   /* The result must not contain more bits than buf_bitsize. */
/* Check the whole bytes: */
-   for (unsigned int j = DIV_ROUND_UP(buf_len, 8); j < b256_len; j++) {
+   for (unsigned int j = DIV_ROUND_UP(buf_bitsize, 8); j < b256_len; j++) {
if (b256_buf[j] != 0x0) {
free(b256_buf);
return ERROR_NUMBER_EXCEEDS_BUFFER;
}
}
/* Check the partial byte: */
-   if (buf_len % 8) {
-   const uint8_t mask = 0xFFu << (buf_len % 8);
-   if ((b256_buf[(buf_len / 8)] & mask) != 0x0) {
+   if (buf_bitsize % 8) {
+   const uint8_t mask = 0xFFu << (buf_bitsize % 8);
+   if ((b256_buf[(buf_bitsize / 8)] & mask) != 0x0) {
free(b256_buf);
return ERROR_NUMBER_EXCEEDS_BUFFER;
}
@@ -333,7 +333,7 @@ int str_to_buf(const char *str, void *_buf, unsigned int 
buf_len)
 
/* Copy the digits to the output buffer */
uint8_t *buf = _buf;
-   for (unsigned j = 0; j < DIV_ROUND_UP(buf_len, 8); j++) {
+   for (unsigned int j = 0; j < DIV_ROUND_UP(buf_bitsize, 8); j++) {
if (j < b256_len)
buf[j] = b256_buf[j];
else
diff --git a/src/helper/binarybuffer.h b/src/helper/binarybuffer.h
index 6cff86bd92..103a48c5c5 100644
--- a/src/helper/binarybuffer.h
+++ b/src/helper/binarybuffer.h
@@ -198,10 +198,10 @@ void *buf_set_buf(const void *src, unsigned src_start,
  * number is detected between decimal, hexadecimal and octal.
  * @param str Input number, zero-terminated string
  * @param _buf Output buffer, allocated by the caller
- * @param buf_len Output buffer size in bits
+ * @param buf_bitsize Output buffer size in bits
  * @returns Error on invalid or overflowing number
  */
-int str_to_buf(const char *str, void *_buf, unsigned int buf_len);
+int str_to_buf(const char *str, void *_buf, unsigned int buf_bitsize);
 
 char *buf_to_hex_str(const void *buf, unsigned size);
 

-- 

[PATCH]: e9dda807a8 binarybuffer: str_to_buf(): add support for binary numbers

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8397

-- gerrit

commit e9dda807a825defc57e6695efc78a796883e4b21
Author: Antonio Borneo 
Date:   Sun Jul 14 15:12:59 2024 +0200

binarybuffer: str_to_buf(): add support for binary numbers

The GCC compiler accepts non-standard '0b' and '0B' prefix for
binary numbers.
Such prefix is also welcome in OpenOCD.

Extend str_to_buf() to support binary numbers.

Today only the commands 'jtag drscan', 'reg' and 'set_reg' use it.

Change-Id: I00ed2504417cf3c8c5f0edf7287237ed911c2f87
Signed-off-by: Antonio Borneo 

diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c
index ced1701d71..930cf12f90 100644
--- a/src/helper/binarybuffer.c
+++ b/src/helper/binarybuffer.c
@@ -198,12 +198,17 @@ static bool str_has_hex_prefix(const char *s)
return (s[0] == '0') && (s[1] == 'x' || s[1] == 'X');
 }
 
+static bool str_has_binary_prefix(const char *s)
+{
+   /* Starts with "0b" or "0B" */
+   return (s[0] == '0') && (s[1] == 'b' || s[1] == 'B');
+}
+
 static bool str_has_octal_prefix(const char *s)
 {
-   /* - starts with '0',
-* - has at least two characters, and
-* - the second character is not 'x' or 'X' */
-   return (s[0] == '0') && (s[1] != '\0') && (s[1] != 'x') && (s[1] != 
'X');
+   /* - starts with '0' and
+* - the second character is an octal digit */
+   return (s[0] == '0') && (s[1] >= '0') && (s[1] <= '7');
 }
 
 /**
@@ -218,14 +223,21 @@ static unsigned int str_radix_guess(const char *str)
if (str_has_octal_prefix(str))
return 8;
 
+   if (str_has_binary_prefix(str))
+   return 2;
+
/* Otherwise assume a decimal number. */
return 10;
 }
 
-/** Strip leading "0x" or "0X" from hex numbers or "0" from octal numbers. */
+/**
+ * Strip leading "0x" or "0X" from hex numbers, "0b" or "0B" from hex numbers
+ * or "0" from octal numbers.
+ */
 static const char *str_strip_number_prefix(const char *str, unsigned int radix)
 {
switch (radix) {
+   case 2:
case 16:
return str + 2;
case 8:

-- 

[PATCH]: 7ea3f10501 helper: command: drop radix parameter from command_parse_str_to_buf()

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8393

-- gerrit

commit 7ea3f10501ef76fa1077e0fd3c0128491731b9a3
Author: Antonio Borneo 
Date:   Sun Jul 14 11:28:49 2024 +0200

helper: command: drop radix parameter from command_parse_str_to_buf()

Commit 53b94fad58ab ("binarybuffer: Fix str_to_buf() parsing
function") introduces the helper command_parse_str_to_buf() to
parse as number a string on TCL command-line.
The parameter 'radix' can specify the base (decimal, octal,
hexadecimal, or auto-detected).

TCL is supposed to use decimal numbers by default, while octal and
hexadecimal numbers must be prefixed respectively with '0' and
'0x' (or '0X').
This would require the helper to always run auto-detection of the
base, thus always set the 'radix' parameter to zero. This makes
the parameter useless.

Keeping the 'radix' parameter can open the door to future abuse of
TCL syntax, E.g. a command can require an octal value without the
mandatory TCL '0' prefix; the octal value cannot be the result of
TCL expression.

To prevent any future abuse of the 'radix' parameter, drop it.

Change-Id: I88855bd83b4e08e8fdcf86a2fa5ef3269dd4ad57
Signed-off-by: Antonio Borneo 

diff --git a/src/helper/command.c b/src/helper/command.c
index 15a9b4a084..b5dd927f25 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -1360,37 +1360,18 @@ int command_parse_bool_arg(const char *in, bool *out)
return ERROR_COMMAND_SYNTAX_ERROR;
 }
 
-static const char *radix_to_str(unsigned int radix)
-{
-   switch (radix) {
-   case 16: return "hexadecimal";
-   case 10: return "decadic";
-   case 8: return "octal";
-   }
-   assert(false);
-   return "";
-}
-
-COMMAND_HELPER(command_parse_str_to_buf, const char *str, void *buf, unsigned 
int buf_len,
-   unsigned int radix)
+COMMAND_HELPER(command_parse_str_to_buf, const char *str, void *buf, unsigned 
int buf_len)
 {
assert(str);
assert(buf);
 
-   int ret = str_to_buf(str, buf, buf_len, radix, NULL);
+   int ret = str_to_buf(str, buf, buf_len, 0, NULL);
if (ret == ERROR_OK)
return ret;
 
/* Provide a clear error message to the user */
if (ret == ERROR_INVALID_NUMBER) {
-   if (radix == 0) {
-   /* Any radix is accepted, so don't include it in the 
error message. */
-   command_print(CMD, "'%s' is not a valid number", str);
-   } else {
-   /* Specific radix is required - tell the user what it 
is. */
-   command_print(CMD, "'%s' is not a valid number 
(requiring %s number)",
-   str, radix_to_str(radix));
-   }
+   command_print(CMD, "'%s' is not a valid number", str);
} else if (ret == ERROR_NUMBER_EXCEEDS_BUFFER) {
command_print(CMD, "Number %s exceeds %u bits", str, buf_len);
} else {
diff --git a/src/helper/command.h b/src/helper/command.h
index 7a044e6191..b224bd0221 100644
--- a/src/helper/command.h
+++ b/src/helper/command.h
@@ -519,14 +519,12 @@ COMMAND_HELPER(handle_command_parse_bool, bool *out, 
const char *label);
 
 /**
  * Parse a number (base 10, base 16 or base 8) and store the result
- * into a bit buffer.
+ * into a bit buffer. Use the prefixes '0' and '0x' for base 8 and 16,
+ * otherwise defaults to base 10.
  *
  * In case of parsing error, a user-readable error message is produced.
- *
- * If radix = 0 is given, the function guesses the radix by looking at the 
number prefix.
  */
-COMMAND_HELPER(command_parse_str_to_buf, const char *str, void *buf, unsigned 
int buf_len,
-   unsigned int radix);
+COMMAND_HELPER(command_parse_str_to_buf, const char *str, void *buf, unsigned 
int buf_len);
 
 /** parses an on/off command argument */
 #define COMMAND_PARSE_ON_OFF(in, out) \
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index e534134276..eb35421155 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -89,7 +89,7 @@ static COMMAND_HELPER(handle_jtag_command_drscan_fields, 
struct scan_field *fiel
}
 
fields[field_count].out_value = t;
-   int ret = CALL_COMMAND_HANDLER(command_parse_str_to_buf, 
CMD_ARGV[i + 1], t, bits, 0);
+   int ret = CALL_COMMAND_HANDLER(command_parse_str_to_buf, 
CMD_ARGV[i + 1], t, bits);
if (ret != ERROR_OK)
return ret;
fields[field_count].in_value = t;
diff --git a/src/target/target.c b/src/target/target.c
index 8ff665f474..1542ad145f 100644
--- a/src/target/target.c
+++ b/src/target/target.c

[PATCH]: 94c7849b2d binarybuffer: simplify the prototype of str_to_buf()

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8394

-- gerrit

commit 94c7849b2dfac78cfd50195af94d3d1046854c96
Author: Antonio Borneo 
Date:   Sun Jul 14 12:09:15 2024 +0200

binarybuffer: simplify the prototype of str_to_buf()

With 'radix' always zero and '_detected_radix' always NULL, drop
the two parameters and simplify str_to_buf().

While there:
- drop some redundant assert(),
- drop the re-check for the base prefix,
- simplify str_strip_number_prefix_if_present() and rename it, as
  the prefix MUST be present,
- fix a minor typo,
- update the doxygen description of str_to_buf().

Change-Id: I1abdc8ec0587b23881953d3094101c04d5bb1c58
Signed-off-by: Antonio Borneo 

diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c
index 3e09143c68..da6e10bab7 100644
--- a/src/helper/binarybuffer.c
+++ b/src/helper/binarybuffer.c
@@ -225,49 +225,37 @@ static bool str_has_octal_prefix(const char *s)
  */
 static unsigned int str_radix_guess(const char *str)
 {
-   assert(str);
-
if (str_has_hex_prefix(str))
return 16;
 
if (str_has_octal_prefix(str))
return 8;
 
-   /* Otherwise assume a decadic number. */
+   /* Otherwise assume a decimal number. */
return 10;
 }
 
 /** Strip leading "0x" or "0X" from hex numbers or "0" from octal numbers. */
-static void str_strip_number_prefix_if_present(const char **_str, unsigned int 
radix)
+static const char *str_strip_number_prefix(const char *str, unsigned int radix)
 {
-   assert(radix == 16 || radix == 10 || radix == 8);
-   assert(_str);
-
-   const char *str = *_str;
-   assert(str);
-
-   if (radix == 16 && str_has_hex_prefix(str))
-   str += 2;
-   else if (radix == 8 && str_has_octal_prefix(str))
-   str += 1;
-
-   /* No prefix to strip for radix == 10. */
-
-   *_str = str;
+   switch (radix) {
+   case 16:
+   return str + 2;
+   case 8:
+   return str + 1;
+   case 10:
+   default:
+   return str;
+   }
 }
 
-int str_to_buf(const char *str, void *_buf, unsigned int buf_len,
-   unsigned int radix, unsigned int *_detected_radix)
+int str_to_buf(const char *str, void *_buf, unsigned int buf_len)
 {
-   assert(radix == 0 || radix == 8 || radix == 10 || radix == 16);
-
-   if (radix == 0)
-   radix = str_radix_guess(str);
+   assert(str);
 
-   if (_detected_radix)
-   *_detected_radix = radix;
+   unsigned int radix = str_radix_guess(str);
 
-   str_strip_number_prefix_if_present(, radix);
+   str = str_strip_number_prefix(str, radix);
 
const size_t str_len = strlen(str);
if (str_len == 0)
diff --git a/src/helper/binarybuffer.h b/src/helper/binarybuffer.h
index 441374330e..6cff86bd92 100644
--- a/src/helper/binarybuffer.h
+++ b/src/helper/binarybuffer.h
@@ -194,15 +194,14 @@ void *buf_set_buf(const void *src, unsigned src_start,
 
 /**
  * Parse an unsigned number (provided as a zero-terminated string)
- * into a bit buffer whose size is buf_len bits.
+ * into a bit buffer whose size is buf_len bits. The base of the
+ * number is detected between decimal, hexadecimal and octal.
  * @param str Input number, zero-terminated string
  * @param _buf Output buffer, allocated by the caller
  * @param buf_len Output buffer size in bits
- * @param radix Base of the input number - 16, 10, 8 or 0.
- *  0 means auto-detect the radix.
+ * @returns Error on invalid or overflowing number
  */
-int str_to_buf(const char *str, void *_buf, unsigned int buf_len,
-   unsigned int radix, unsigned int *_detected_radix);
+int str_to_buf(const char *str, void *_buf, unsigned int buf_len);
 
 char *buf_to_hex_str(const void *buf, unsigned size);
 
diff --git a/src/helper/command.c b/src/helper/command.c
index b5dd927f25..907869325d 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -1365,7 +1365,7 @@ COMMAND_HELPER(command_parse_str_to_buf, const char *str, 
void *buf, unsigned in
assert(str);
assert(buf);
 
-   int ret = str_to_buf(str, buf, buf_len, 0, NULL);
+   int ret = str_to_buf(str, buf, buf_len);
if (ret == ERROR_OK)
return ret;
 

-- 

[PATCH]: d6b76fa6f8 doc: fix makeinfo warning

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8392

-- gerrit

commit d6b76fa6f831d199a02339cbfbb2ebbdf9dc8955
Author: Antonio Borneo 
Date:   Sun Jul 14 10:46:48 2024 +0200

doc: fix makeinfo warning

Build returns a makeinfo warning:
openocd.texi:5201: warning: `.' or `,' must follow @xref, not f

Add a dummy ',' after '@xref{..}' to silent the warning.

Fixes: 44cfdef0a40d ("server/gdb: Restructure commands")
Change-Id: Ic0bff8fc9b54942ebb72762816686ea7c7881345
Signed-off-by: Antonio Borneo 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 7169ef08b5..a8a1892db8 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -5198,7 +5198,7 @@ where it is a mandatory configuration for the target run 
control.
 for instruction on how to declare and control a CTI instance.
 
 @anchor{gdbportoverride}
-@item @code{-gdb-port} @var{number} -- @xref{gdb port,,command gdb port} for 
the
+@item @code{-gdb-port} @var{number} -- @xref{gdb port,,command gdb port}, for 
the
 possible values of the parameter @var{number}, which are not only numeric 
values.
 Use this option to override, for this target only, the global parameter set 
with
 command @command{gdb port}.

-- 

[PATCH]: d0d51b7ec3 cortex_m: fix scan-build false positive

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8391

-- gerrit

commit d0d51b7ec3cca4a65e8fe73a779bcf20b2c3152d
Author: Antonio Borneo 
Date:   Sat Jul 13 19:14:39 2024 +0200

cortex_m: fix scan-build false positive

Scan-build is unable to detect that 'target->dbg_msg_enabled' does
not change across the function cortex_m_fast_read_all_regs().
It incorrectly assumes that it can be false at the first check (so
'dcrdr' get not assigned) and it is true later on (when 'dcrdr'
get used).
This triggers a false positive:
src/target/cortex_m.c:338:12: warning:
3rd function call argument is an uninitialized value
[core.CallAndMessage]
retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DCRDR, 
dcrdr);

Use a local variable for 'target->dbg_msg_enabled' so scan-build
can track it as not modified.
While there, change the type of 'target->dbg_msg_enabled' to
boolean as there is no reason to use uint32_t.

Change-Id: Icaf1a1b2dea8bc55108182ea440708ab76396cd7
Signed-off-by: Antonio Borneo 

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 9b00a2796f..eb109201b0 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -273,7 +273,8 @@ static int cortex_m_fast_read_all_regs(struct target 
*target)
 
/* because the DCB_DCRDR is used for the emulated dcc channel
 * we have to save/restore the DCB_DCRDR when used */
-   if (target->dbg_msg_enabled) {
+   bool dbg_msg_enabled = target->dbg_msg_enabled;
+   if (dbg_msg_enabled) {
retval = mem_ap_read_u32(armv7m->debug_ap, DCB_DCRDR, );
if (retval != ERROR_OK)
return retval;
@@ -326,7 +327,7 @@ static int cortex_m_fast_read_all_regs(struct target 
*target)
if (retval != ERROR_OK)
return retval;
 
-   if (target->dbg_msg_enabled) {
+   if (dbg_msg_enabled) {
/* restore DCB_DCRDR - this needs to be in a separate
 * transaction otherwise the emulated DCC channel breaks */
retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DCRDR, 
dcrdr);
diff --git a/src/target/target.c b/src/target/target.c
index 1f4817d5c1..17c8633269 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -5805,7 +5805,7 @@ static int target_create(struct jim_getopt_info *goi)
}
 
target->dbgmsg  = NULL;
-   target->dbg_msg_enabled = 0;
+   target->dbg_msg_enabled = false;
 
target->endianness = TARGET_ENDIAN_UNKNOWN;
 
diff --git a/src/target/target.h b/src/target/target.h
index 03db3950ce..d3077f5716 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -160,7 +160,7 @@ struct target {
struct watchpoint *watchpoints; /* list of watchpoints */
struct trace *trace_info;   /* generic trace 
information */
struct debug_msg_receiver *dbgmsg;  /* list of debug message 
receivers */
-   uint32_t dbg_msg_enabled;   /* debug message status 
*/
+   bool dbg_msg_enabled;   /* debug message status 
*/
void *arch_info;/* architecture 
specific information */
void *private_config;   /* pointer to target 
specific config data (for jim_configure hook) */
struct target *next;/* next target in list 
*/
diff --git a/src/target/target_request.c b/src/target/target_request.c
index 72c84216fa..bccae07b42 100644
--- a/src/target/target_request.c
+++ b/src/target/target_request.c
@@ -164,7 +164,7 @@ static int add_debug_msg_receiver(struct command_context 
*cmd_ctx, struct target
(*p)->next = NULL;
 
/* enable callback */
-   target->dbg_msg_enabled = 1;
+   target->dbg_msg_enabled = true;
 
return ERROR_OK;
 }
@@ -225,7 +225,7 @@ int delete_debug_msg_receiver(struct command_context 
*cmd_ctx, struct target *ta
free(c);
if (!*p) {
/* disable callback */
-   target->dbg_msg_enabled = 0;
+   target->dbg_msg_enabled = false;
}
return ERROR_OK;
} else

-- 

[PATCH]: fbd2ac2c55 flash/nor/atsame5: add PIC32CX-SG device IDs

[gerrit]

This is an automated email from Gerrit.

"Matt Trescott " just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8355

-- gerrit

commit fbd2ac2c55ebc86d94c1ebb9139079fdd084114e
Author: Matt Trescott 
Date:   Wed Jul 10 14:46:28 2024 -0400

flash/nor/atsame5: add PIC32CX-SG device IDs

These devices are essentially the same as the E54 series with the
exception of immutable boot (SG41, SG61) and HSM (SG60, SG61), and some
bug fixes found only in E54 revision F. When the security features are
not enabled, they behave identically except for the different DIDs.

Signed-off-by: Matt Trescott 
Change-Id: Ic93313f3e20af0ed4a5768880d17b335a7b7bb04

diff --git a/src/flash/nor/atsame5.c b/src/flash/nor/atsame5.c
index c590081fcc..f8b46a75ef 100644
--- a/src/flash/nor/atsame5.c
+++ b/src/flash/nor/atsame5.c
@@ -85,6 +85,9 @@
 #define SAME_SERIES_51 0x01
 #define SAME_SERIES_53 0x03
 #define SAME_SERIES_54 0x04
+#define PIC32CXSG_SERIES_410x07
+#define PIC32CXSG_SERIES_600x00
+#define PIC32CXSG_SERIES_610x02
 
 /* Device ID macros */
 #define SAMD_GET_PROCESSOR(id) (id >> 28)
@@ -148,6 +151,26 @@ static const struct samd_part same54_parts[] = {
{ 0x03, "SAME54N19A", 512, 192 },
 };
 
+/* See PIC32CX SG41/SG60/SG61 Family Silicon Errata and Datasheet 
Clarifications
+ * DS8985G */
+/* Known PIC32CX-SG41 parts. */
+static const struct samd_part pic32cxsg41_parts[] = {
+   { 0x00, "PIC32CX1025SG41128", 1024, 256 },
+   { 0x01, "PIC32CX1025SG41100", 1024, 256 },
+};
+
+/* Known PIC32CX-SG60 parts. */
+static const struct samd_part pic32cxsg60_parts[] = {
+   { 0x00, "PIC32CX1025SG60128", 1024, 256 },
+   { 0x01, "PIC32CX1025SG60100", 1024, 256 },
+};
+
+/* Known PIC32CX-SG61 parts. */
+static const struct samd_part pic32cxsg61_parts[] = {
+   { 0x00, "PIC32CX1025SG61128", 1024, 256 },
+   { 0x01, "PIC32CX1025SG61100", 1024, 256 },
+};
+
 /* Each family of parts contains a parts table in the DEVSEL field of DID.  The
  * processor ID, family ID, and series ID are used to determine which exact
  * family this is and then we can use the corresponding table. */
@@ -169,6 +192,12 @@ static const struct samd_family samd_families[] = {
same53_parts, ARRAY_SIZE(same53_parts) },
{ SAMD_PROCESSOR_M4, SAMD_FAMILY_E, SAME_SERIES_54,
same54_parts, ARRAY_SIZE(same54_parts) },
+   { SAMD_PROCESSOR_M4, SAMD_FAMILY_E, PIC32CXSG_SERIES_41,
+   pic32cxsg41_parts, ARRAY_SIZE(pic32cxsg41_parts) },
+   { SAMD_PROCESSOR_M4, SAMD_FAMILY_E, PIC32CXSG_SERIES_60,
+   pic32cxsg60_parts, ARRAY_SIZE(pic32cxsg60_parts) },
+   { SAMD_PROCESSOR_M4, SAMD_FAMILY_E, PIC32CXSG_SERIES_61,
+   pic32cxsg61_parts, ARRAY_SIZE(pic32cxsg61_parts) },
 };
 
 struct samd_info {

-- 

[PATCH]: d4cc10515e flash/nor/renesas_mf3: support Renesas MF3 flash

[gerrit]

This is an automated email from Gerrit.

"Mark Featherston " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8390

-- gerrit

commit d4cc10515e4239e3a8c5c33107c7e9d1878fc7c5
Author: Mark Featherston 
Date:   Tue Jun 4 11:01:13 2024 -0700

flash/nor/renesas_mf3: support Renesas MF3 flash

Supports the MF3 variant of flash technology used on Synergy MCUs

no new Clang analyzer warnings

Change-Id: I00d7c6dded4ffb4f64ff5ec39df9adff08b3fcf7
Signed-off-by: Mark Featherston 

diff --git a/contrib/loaders/flash/mf3.S b/contrib/loaders/flash/mf3.S
new file mode 100644
index 00..d66cd3d0f5
--- /dev/null
+++ b/contrib/loaders/flash/mf3.S
@@ -0,0 +1,158 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/*
+ * This code is embedded within: src/flash/nor/sst_mf3.c as a "C" array.
+ * To rebuild:
+ *  arm-none-eabi-gcc -c mf3.S
+ *  arm-none-eabi-objcopy -O binary mf3.o mf3.bin
+ *  xxd -c 8 -i mf3.bin > mf3.txt
+ * Then read and edit this result into the "C" source.
+ */
+/***
+ *   Copyright (C) 2022 by Kevlar Harness  *
+ *   softw...@klystron.com *
+ ***/
+
+#define FACI_FPMCR  0x407ec100/* flash mode 
control register */
+
+/* offsets of other registers relative to FPMCR */
+#define FSARL  0x08/* start address (low 16 bits) 
*/
+#define FSARH  0x10/* start address (high 16 bits) 
*/
+#define FCR0x14/* flash control register */
+#define FEARL  0x18/* end address (low 16 bits) */
+#define FEARH  0x20/* end address (high 16 bits) */
+#define FRESETR0x24/* flash reset register 
*/
+#define FSTATR00   0x28
+#define FSTATR10x2c
+#define FWBL0  0x30
+#define FWBH0  0x38
+#define FSTATR01   0x3c
+#define FPR0x80/* flash protection register */
+#define FPSR   0x84/* flash protection status 
register */
+#define FSTATR20xf0
+
+/* values used in the FCR register */
+#define FACI_FCR_CMD_PROGRAM   0x01/* program data 
*/
+#define FACI_FCR_OPST  0x80/* 
start processing the command */
+
+/* values used in the FRESETR register */
+#define FACI_FRESETR_FRESET0x01/* reset flash 
programming registers */
+
+/* values used in the FSTATR1 register */
+#define FACI_FSTATR1_FRDY  0x40/* command 
complete */
+
+/* values used in the FSTATR2 register */
+#define FACI_FSTATR2_ILGLERR   0x10/* illegal command 
error flag */
+#define FACI_FSTATR2_ERERR 0x01/* erase error 
flag */
+
+/* mf3_flash_write
+ * This function writes a block of data to the code flash. If the size of the 
source
+ * buffer (given by 'pulWorkareaStart' and 'pulWorkareaEnd') then the source 
data
+ * is repeated to fill up the destination until 'ulCount' bytes have been 
written.
+ * This function must be executed from RAM since code cannot be executed from 
flash
+ * while it is in programming mode.
+ * Inputs:
+ *   r0 ulong ulCount - number of bytes to write
+ *   r1 - ulong * pulWorkareaStart - start of the work area in RAM
+ *   r2 - ulong * pulWorkareaEnd - end address of the work area
+ *   r3 - ulong * pulTarget - address to write the data to
+ * Returns:
+ *   r0 - result
+ * Registers:
+ *   r4 - count - number of bytes to write
+ *   r5 - R_FACI - base address of flash controller peripheral
+ *   r6 - source address (rotates in the area between r1 and r2)
+ *   r7 - working register
+ *   r10 - start address of the work area in RAM
+ *   r11 - end address of the work area in RAM
+ */
+
+   .syntax unified
+   .thumb
+   .thumb_func
+
+.global mf3_flash_write
+
+mf3_flash_write:
+   movsr0, #0  /* r0 => result code (0 == no error) */
+   ldr r5, =FACI_FPMCR /* r5 => base register address */
+   mov r6, r1  /* r6 => source address */
+   mov r10, r1 /* r10 => source start address*/
+   mov r11, r2 /* r11 => source end address*/
+   movsr4, r0  /* r4 => ulCount */
+   b.n loop_end
+
+loop_start:
+   /* set the destination address */
+   mov r7, r3
+   strhr7, [r5, #FSARL]
+   lsrsr7, r7, #16
+   strhr7, [r5, #FSARH]
+
+   /* set the source address */
+   mov r7, r6
+   strhr7, [r5, #FW

[PATCH]: 4b2a62db9b flash/nor/renesas_rv40: support Renesas RV40 flash

[gerrit]

This is an automated email from Gerrit.

"Mark Featherston " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8389

-- gerrit

commit 4b2a62db9b6ceec3f1df762558a19a113f53aa38
Author: Mark Featherston 
Date:   Sun Jun 2 19:26:59 2024 -0700

flash/nor/renesas_rv40: support Renesas RV40 flash

Supports the RV40 variant of flash technology used on RA MCUs

no new Clang analyzer warnings

Change-Id: I47a8cf7a87b10b298565a90ad809bda100c6fb10
Signed-off-by: Mark Featherston 

diff --git a/contrib/loaders/flash/rv40f.S b/contrib/loaders/flash/rv40f.S
new file mode 100644
index 00..43a3d26a3c
--- /dev/null
+++ b/contrib/loaders/flash/rv40f.S
@@ -0,0 +1,130 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/*
+ * This code is embedded within: src/flash/nor/renesas_rv40f.c as a "C" array.
+ *
+ * To rebuild:
+ *   arm-none-eabi-gcc -c rv40f.S
+ *   arm-none-eabi-objcopy -O binary rv40f.o rv40f.bin
+ *   xxd -c 8 -i rv40f.bin > rv40f.txt
+ *
+ * Then read and edit this result into the "C" source.
+ */
+
+#define FACI_BASE 0x407fe000 /* flash mode control register */
+#define FACI_CMD  0x407e /* FACI command issuing area address */
+
+/* offsets of other registers relative to FPMCR */
+#define FASTAT   0x10   /* Flash access status register */
+#define FAEINT   0x14   /* Flash access error interrupt enable register */
+#define FRDYIE   0x18   /* Flash ready interrupt enable register */
+#define FSADDR   0x30   /* FACI command start address register */
+#define FEADDR   0x34   /* FACI command end address register */
+#define FSTATR   0x80   /* Flash status register */
+#define FENTRYR  0x84   /* Flash P/E mode entry register */
+#define FSUINITR 0x8c   /* Flash sequencer set-up initialization register */
+#define FCMDR0xa0   /* Flash command register */
+#define FBCCNT   0xd0   /* Data flash bank check control register */
+#define FBCSTAT 0xd4   /* Data flash bank check status register */
+#define FPSADDR  0xd8   /* Data flash programming start address register */
+#define FAWMON   0xdc   /* Flash access window monitor register */
+#define FCPSR0xe0   /* Flash sequencer processing switching register */
+#define FPCKAR   0xe4   /* Flash sequencer processing clock notification 
register */
+#define FSUACR   0xe8   /* Flash start-up area control register */
+
+/* values used in the FSTATR register */
+#define FSTATR_DBFULL 0x400
+
+/* rv40f_flash_write:
+ *   This function writes a block of data to the code flash. If the size of the
+ *   source buffer (given by 'pulWorkareaStart' and 'pulWorkareaEnd') then the
+ *   source data is repeated to fill up the destination until 'ulCount' bytes
+ *   have been written.
+ *
+ *   This function must be executed from RAM since code cannot be executed from
+ *   flash while it is in programming mode.
+ *
+ *   The arguments to this function match the arguments passed by OpenOCD to 
its
+ *   flash loader functions.
+ *
+ * Inputs:
+ *   r0 - ulong ulCount - number of halfwords to write
+ *   r1 - ulong * pulWorkareaStart - start of the work area in RAM
+ *   r2 - ulong * pulWorkareaEnd - end address of the work area
+ *   r3 - ulong * pulTarget - address to write the data To
+ * Returns:
+ *   r0 - result
+ * Registers:
+ *   r0, r1 - working registers
+ *   r5 - R_FACI - base address of flash controller peripheral
+ *   r4 - source address (iterated)
+ *   r6 - decremented count of halfwords
+ *   r7 - FACI command issuing area address
+ */
+
+.syntax unified
+.cpu cortex-m0plus
+.thumb
+.thumb_func
+
+.global rv40f_flash_write
+
+rv40f_flash_write:
+
+mov r9, r1
+mov r4, r9  /* r4 => iterated source address */
+ldr r5, =FACI_BASE  /* r5 => base register address */
+ldr r7, =FACI_CMD   /* r7 => load FACI command issuing area address */
+mov r9, r0
+mov r6, r9  /* r6 => count of halfwords */
+
+/* set the destination address of the block */
+str r3, [r5, #FSADDR]
+
+/* issue the write command */
+movsr0, #0xE8
+strbr0, [r7]
+/* write count of halfwords */
+mov r0, r9
+strbr0, [r7]
+
+/* write first halfword */
+ldrhr0, [r4]
+strhr0, [r7]
+/* increment src address */
+addsr4, #2
+
+loop_start:
+/* decrement counter */
+subs r6, #1
+
+/* if zero, jump to completion */
+beq complete
+
+/* write next halfword */
+ldrhr0, [r4]
+strhr0, [r7]
+/* increment src address */
+addsr4, #2
+
+/* wait while dbfull bit == 1 */
+wait_dbfull:
+movsr0, #FSTATR
+addsr0, r5
+ldr r1, [r0]
+/* check DBFULL bit */
+ldr r0, =FSTATR_DBFULL
+tst r0, r1
+bne wait_dbfull
+b   loop_start
+
+/* complete transaction by writing D0h to FACI cmd issuing area */
+complete:
+mo

[PATCH]: 21e735b628 doc: document that breakpoints are disabled on step/resume

[gerrit]

This is an automated email from Gerrit.

"Anatoly P " just uploaded a new patch set 
to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8388

-- gerrit

commit 21e735b62801241a2dfcd1ca7d07008203aff59b
Author: Parshintsev Anatoly 
Date:   Thu Jul 4 20:52:13 2024 +0300

doc: document that breakpoints are disabled on step/resume

OpenOCD disables breakpoints on step/resume if they
match the current code position. This is a non-obvious
behavior that should be documented

Change-Id: Id762066569ec6452869a58dfcd9df88c8a14d6ab
Signed-off-by: Parshintsev Anatoly 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index e46e6004bc..b42c7c750b 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -9240,11 +9240,19 @@ power consumption (because the CPU is needlessly 
clocked).
 @deffn {Command} {resume} [address]
 Resume the target at its current code position,
 or the optional @var{address} if it is provided.
+
+@b{NOTE:} targets are expected to temporary disable breakpoints
+if they match the address of the current code position
+or the @var{address} provided by user.
 @end deffn
 
 @deffn {Command} {step} [address]
 Single-step the target at its current code position,
 or the optional @var{address} if it is provided.
+
+@b{NOTE:} targets are expected to temporary disable breakpoints
+if they match the address of the current code position
+or the @var{address} provided by user.
 @end deffn
 
 @anchor{resetcommand}

-- 

[PATCH]: fa2fa116a3 README: Use proper Markdown

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8387

-- gerrit

commit fa2fa116a31a4b83a67bbf822bd608eb1bb32efe
Author: Marc Schink 
Date:   Wed Jul 3 15:16:27 2024 +0200

README: Use proper Markdown

The README file contains a mixture of Markdown and non-Markdown syntax.
Refurbish the document and use only Markdown syntax according to the
specification in [1].

[1] https://www.markdownguide.org/

Change-Id: If58f4e2971dc798a03a78841226804ab1f2d33c8
Signed-off-by: Marc Schink 

diff --git a/README b/README
index 7d3f10def0..950c71f707 100644
--- a/README
+++ b/README
@@ -1,5 +1,4 @@
-Welcome to OpenOCD!
-===
+# Welcome to OpenOCD!
 
 OpenOCD provides on-chip programming and debugging support with a
 layered architecture of JTAG interface and TAP support including:
@@ -26,33 +25,33 @@ This README file contains an overview of the following 
topics:
 - packaging tips.
 
 
-
-Quickstart for the impatient
-
+# Quickstart for the impatient
 
 If you have a popular board then just start OpenOCD with its config,
 e.g.:
 
-  openocd -f board/stm32f4discovery.cfg
+openocd -f board/stm32f4discovery.cfg
 
 If you are connecting a particular adapter with some specific target,
 you need to source both the jtag interface and the target configs,
 e.g.:
 
-  openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \
-  -f target/ti_calypso.cfg
+```
+openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \
+-f target/ti_calypso.cfg
+```
 
-  openocd -f interface/stlink.cfg -c "transport select hla_swd" \
-  -f target/stm32l0.cfg
+```
+openocd -f interface/stlink.cfg -c "transport select hla_swd" \
+-f target/stm32l0.cfg
+```
 
 After OpenOCD startup, connect GDB with
 
-  (gdb) target extended-remote localhost:
+(gdb) target extended-remote localhost:
 
 
-=
-OpenOCD Documentation
-=
+# OpenOCD Documentation
 
 In addition to the in-tree documentation, the latest manuals may be
 viewed online at the following URLs:
@@ -71,35 +70,34 @@ by subscribing to the OpenOCD developer mailing list:
 
openocd-devel@lists.sourceforge.net
 
-Building the OpenOCD Documentation
---
+## Building the OpenOCD Documentation
 
 By default the OpenOCD build process prepares documentation in the
-"Info format" and installs it the standard way, so that "info openocd"
+"Info format" and installs it the standard way, so that `info openocd`
 can access it.
 
 Additionally, the OpenOCD User's Guide can be produced in the
 following different formats:
 
-  # If PDFVIEWER is set, this creates and views the PDF User Guide.
-  make pdf && ${PDFVIEWER} doc/openocd.pdf
+If `PDFVIEWER` is set, this creates and views the PDF User Guide.
 
-  # If HTMLVIEWER is set, this creates and views the HTML User Guide.
-  make html && ${HTMLVIEWER} doc/openocd.html/index.html
+make pdf && ${PDFVIEWER} doc/openocd.pdf
+
+If `HTMLVIEWER` is set, this creates and views the HTML User Guide.
+
+make html && ${HTMLVIEWER} doc/openocd.html/index.html
 
 The OpenOCD Developer Manual contains information about the internal
 architecture and other details about the code:
 
-  # NB! make sure doxygen is installed, type doxygen --version
-  make doxygen && ${HTMLVIEWER} doxygen/index.html
+Note: make sure doxygen is installed, type doxygen --version
 
+make doxygen && ${HTMLVIEWER} doxygen/index.html
 
-==
-Supported hardware
-==
 
-JTAG adapters
--
+# Supported hardware
+
+## JTAG adapters
 
 AM335x, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432, BCM2835,
 Bus Blaster, Buspirate, Cadence DPI, Cadence vdebug, Chameleon, CMSIS-DAP,
@@ -116,8 +114,7 @@ sysfsgpio, Tigard, TI XDS110, TUMPA, Turtelizer, ULINK, 
USB-A9260, USB-Blaster,
 USB-JTAG, USBprog, VPACLink, VSLLink, Wiggler, XDS100v2, Xilinx XVC/PCIe,
 Xverve.
 
-Debug targets
--
+## Debug targets
 
 ARM: AArch64, ARM11, ARM7, ARM9, Cortex-A/R (v7-A/R), Cortex-M (ARMv{6/7/8}-M),
 FA526, Feroceon/Dragonite, XScale.
@@ -125,8 +122,7 @@ ARCv2, AVR32, DSP563xx, DSP5680xx, EnSilica eSi-RISC, EJTAG 
(MIPS32, MIPS64),
 ESP32, ESP32-S2, ESP32-S3, Intel Quark, LS102x-SAP, RISC-V, ST STM8,
 Xtensa.
 
-Flash drivers
--
+## Flash drivers
 
 ADUC702x, AT91SAM, AT91SAM9 (NAND), ATH79, ATmega128RFA1, Atmel SAM, AVR, CFI,
 DSP5680xx, EFM32, EM357, eSi-RISC, eSi-TSMC, EZR32HG, FM3, FM4, Freedom E SPI,
@@ -140,12 +136,9 @@ TI CC13xx, TI CC26xx, TI CC32xx, TI MSP432, Winner Micro 
w600, Xilinx XCF,
 XMC1xxx, XMC4xxx.
 
 
-==
-Installing OpenOCD
-

[PATCH]: b776584c18 flash/nor: Add basic support for TI's MSPM0L/G family

[gerrit]

This is an automated email from Gerrit.

"Nishanth Menon " just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8384

-- gerrit

commit b776584c182c9e5ced86186ec57ac7e7de0d5711
Author: Nishanth Menon 
Date:   Thu Sep 28 03:37:03 2023 -0500

flash/nor: Add basic support for TI's MSPM0L/G family

Add basic flashing support for Texas Instruments MSPM0L, C and G family of
Cortex-M0 based micro-controllers.

This initial basic flashing support allows for controlling protection,
erase, write and read of non-main flash region.

This has been tested with:
* valgrind --leak-check=full --show-leak-kinds=all --track-origins=yes 
--verbose
* Ubuntu clang version 19.0.0 
(++20240627042246+c791d86eab13-1~exp1~20240627042407.1770)

Valgrind-clean, no new Clang analyzer warnings have been introduced.

Change-Id: I29b8055ea6da9c38c5b7b91bea1ec7581c5bc8ff
Co-developed-by: Henry Nguyen 
Signed-off-by: Henry Nguyen 
Signed-off-by: Nishanth Menon 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index e46e6004bc..a394092159 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -7238,6 +7238,19 @@ msp432 bsl lock
 @end deffn
 @end deffn
 
+@deffn {Flash Driver} {mspm0}
+All Arm Cortex-M0+ MSPM microcontroller versions from Texas
+Instruments include internal flash. The mspm0 flash driver
+automatically recognizes the specific version's flash parameters and
+autoconfigures itself. The main program flash starts at address 0x0.
+Non-main flash starts at 0x41c0. If present on the device, the
+optional region called "Data" starts at 0x41d0.
+
+@example
+flash bank $_FLASHNAME mspm0 0 0 0 0 $_TARGETNAME
+@end example
+@end deffn
+
 @deffn {Flash Driver} {niietcm4}
 This drivers handles the integrated NOR flash on NIIET Cortex-M4
 based controllers. Flash size and sector layout are auto-configured by the 
driver.
diff --git a/src/flash/nor/Makefile.am b/src/flash/nor/Makefile.am
index afa11e7d40..a1c6da332b 100644
--- a/src/flash/nor/Makefile.am
+++ b/src/flash/nor/Makefile.am
@@ -44,6 +44,7 @@ NOR_DRIVERS = \
%D%/max32xxx.c \
%D%/mdr.c \
%D%/msp432.c \
+   %D%/mspm0.c \
%D%/mrvlqspi.c \
%D%/niietcm4.c \
%D%/non_cfi.c \
diff --git a/src/flash/nor/driver.h b/src/flash/nor/driver.h
index 211661e214..ac945530d5 100644
--- a/src/flash/nor/driver.h
+++ b/src/flash/nor/driver.h
@@ -273,6 +273,7 @@ extern const struct flash_driver max32xxx_flash;
 extern const struct flash_driver mdr_flash;
 extern const struct flash_driver mrvlqspi_flash;
 extern const struct flash_driver msp432_flash;
+extern const struct flash_driver mspm0_flash;
 extern const struct flash_driver niietcm4_flash;
 extern const struct flash_driver npcx_flash;
 extern const struct flash_driver nrf51_flash;
diff --git a/src/flash/nor/drivers.c b/src/flash/nor/drivers.c
index 34359889a6..2e8a83cf19 100644
--- a/src/flash/nor/drivers.c
+++ b/src/flash/nor/drivers.c
@@ -50,6 +50,7 @@ static const struct flash_driver * const flash_drivers[] = {
_flash,
_flash,
_flash,
+   _flash,
_flash,
_flash,
_flash,
diff --git a/src/flash/nor/mspm0.c b/src/flash/nor/mspm0.c
new file mode 100644
index 00..9774cc94de
--- /dev/null
+++ b/src/flash/nor/mspm0.c
@@ -0,0 +1,1083 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***
+ * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * NOR flash driver for MSPM0L and MSPM0G class of uC from Texas Instruments.
+ *
+ * See:
+ * 
https://www.ti.com/microcontrollers-mcus-processors/arm-based-microcontrollers/arm-cortex-m0-mcus/overview.html
+ ***/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "imp.h"
+#include 
+#include 
+
+/* MPM0 Region memory map */
+#define MSPM0_FLASH_BASE_NONMAIN   (0x41c0)
+#define MSPM0_FLASH_END_NONMAIN(0x41c00400)
+#define MSPM0_FLASH_BASE_MAIN  (0x0)
+#define MSPM0_FLASH_BASE_DATA  (0x41d0)
+
+/* MPM0 FACTORYREGION registers */
+#define MSPM0_FACTORYREGION(0x41c4)
+#define MSPM0_TRACEID  (MSPM0_FACTORYREGION + 
0x000)
+#define MSPM0_DID  
(MSPM0_FACTORYREGION + 0x004)
+#define MSPM0_USERID   (MSPM0_FACTORYREGION + 
0x008)
+#define MSPM0_SRAMFLASH
(MSPM0_FACTORYREGION + 0x018)
+
+/* MPM0 FCTL registers */
+#define FLASH_CONTROL_BASE (0x400cd000)
+#define FCTL_REG_CMDEXEC   (FLASH_CONTROL_BASE + 
0x1100)
+#define FCTL_REG_CMDTYPE  

[PATCH]: 957fed0ddb tcl/board: Add MSPM0 Launchpad support

[gerrit]

This is an automated email from Gerrit.

"Nishanth Menon " just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8386

-- gerrit

commit 957fed0ddbc2f2be79dd08940fcde60d02b1802f
Author: Nishanth Menon 
Date:   Thu Sep 28 03:37:03 2023 -0500

tcl/board: Add MSPM0 Launchpad support

Add basic connection details for TI's MSPM0 Launchpad series of
evaluation kits:
https://www.ti.com/tool/LP-MSPM0L1306
https://www.ti.com/tool/LP-MSPM0C1104
https://www.ti.com/tool/LP-MSPM0G3507

Change-Id: I33499f2d5fef846185ff6c330f9bfd0251117eb6
Co-developed-by: Henry Nguyen 
Signed-off-by: Henry Nguyen 
Signed-off-by: Nishanth Menon 

diff --git a/tcl/board/ti_mspm0_launchpad.cfg b/tcl/board/ti_mspm0_launchpad.cfg
new file mode 100644
index 00..abb2131929
--- /dev/null
+++ b/tcl/board/ti_mspm0_launchpad.cfg
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
+#
+# TI MSPM0L1306 LaunchPad Evaluation Kit
+# https://www.ti.com/tool/LP-MSPM0L1306
+# TI MSPM0C1104 LaunchPad Evaluation Kit
+# https://www.ti.com/tool/LP-MSPM0C1104
+# TI MSPM0G3507 LaunchPad Evaluation Kit
+# https://www.ti.com/tool/LP-MSPM0G3507
+#
+
+source [find interface/xds110.cfg]
+adapter speed 1
+transport select swd
+source [find target/ti_mspm0.cfg]

-- 

[PATCH]: 8d793ad3f5 tcl/target: Add support for TI MSPM0

[gerrit]

This is an automated email from Gerrit.

"Nishanth Menon " just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8385

-- gerrit

commit 8d793ad3f598a9cdeee9a4cea52843303be60c4b
Author: Nishanth Menon 
Date:   Thu Sep 28 03:37:03 2023 -0500

tcl/target: Add support for TI MSPM0

Add basic support for Texas Instruments MSPM0L, C and G family of
Cortex-M0 based micro-controllers.

Change-Id: If2b5b1eca001f74d501ede67ec621c7497548a85
Co-developed-by: Henry Nguyen 
Signed-off-by: Henry Nguyen 
Signed-off-by: Nishanth Menon 

diff --git a/tcl/target/ti_mspm0.cfg b/tcl/target/ti_mspm0.cfg
new file mode 100644
index 00..f3d66c8e4c
--- /dev/null
+++ b/tcl/target/ti_mspm0.cfg
@@ -0,0 +1,196 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Texas Instruments MSPM0L/G - ARM Cortex-M0 @ 32MHz
+# 
https://www.ti.com/microcontrollers-mcus-processors/arm-based-microcontrollers/arm-cortex-m0-mcus/overview.html
+#
+
+source [find bitsbytes.tcl]
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   # Meant to work with MSPM0L and MSPM0G class of devices.
+   set _CHIPNAME mspm0x
+}
+
+if { [info exists CPUTAPID] } {
+   set _DAP_TAPID $CPUTAPID
+} else {
+   set _DAP_TAPID 0x4ba00477
+}
+
+if { [info exists DAP_SWD_ID] } {
+   set _DAP_SWD_ID $DAP_SWD_ID
+} else {
+   set _DAP_SWD_ID 0x2ba01477
+}
+
+source [find target/swj-dp.tcl]
+
+if { [using_jtag] } {
+   set _DAP_ID $_DAP_TAPID
+} else {
+   set _DAP_ID $_DAP_SWD_ID
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_DAP_ID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+
+if { [info exists WORKAREABASE] } {
+   set _WORKAREABASE $WORKAREABASE
+} else {
+   set _WORKAREABASE 0x2000
+}
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+# Smallest SRAM size is 1K SRAM.
+   set _WORKAREASIZE 0x400
+}
+
+#
+# MSPM0 Debug SubSystem Mailbox (DSSM) Communication helpers
+#
+
+proc _mspm0_wait_for_dssm_response {command} {
+   # Wait for SECAP::RCR rx_valid to be set
+   set timeout 1000
+   while { [expr { [$::_CHIPNAME.dap apreg 2 0xc] & 0x1}] != 0x1 } {
+   sleep 1
+   set timeout [expr {$timeout - 1}]
+   if { $timeout == 0 } {
+   set rcr [$::_CHIPNAME.dap apreg 2 0xc]
+   return -code error [format "MSPM0 SECAP RCR=0x%08x 
timeout rx_valid" $rcr]
+   }
+   }
+
+   # Read SECAP::RXD to clear the RX_VALID bit
+   set rxd [$::_CHIPNAME.dap apreg 2 0x8]
+   # Read SECAP::RCR
+   set rcr [$::_CHIPNAME.dap apreg 2 0xc]
+
+   # Check if we got successful response. This is denoted as:
+   # 8 LSBits of $command should matchup with SECAP::RCR
+   # and
+   # SECAP::RXD should be 0x10003
+   if { ([expr { $command & 0xff}] == $rcr) && ($rxd == 0x10003) } { 
return 0 }
+
+   # Provide some debug log for users to report back if CMD fails.
+   return -code error [format "MSPM0 SECAP CMD FAIL! RXD: 0x%08X RCR: 
0x%08X" $rxd $rcr]
+}
+
+proc _mspm0_dssm_command {command} {
+   # SECAP::TCR = command
+   $::_CHIPNAME.dap apreg 2 0x4 $command
+   # SECAP::TDR = 0x0
+   $::_CHIPNAME.dap apreg 2 0x0 0x0
+   # Read SECAP::RCR and RXD to clear up any prev pending reads
+   set rxd [$::_CHIPNAME.dap apreg 2 0x8]
+   set rcr [$::_CHIPNAME.dap apreg 2 0xc]
+   # Make sure everything is synced
+   sleep 1000
+   # Trigger nRST
+   mspm0_board_reset
+
+   # Wait for ROM to do it's magic and respond back
+   set res [_mspm0_wait_for_dssm_response $command]
+   if { $res } { return $res }
+   # Paranoid.. make sure ROM does what it is meant to do
+   # RX valid should have been cleared after the operation is
+   # complete
+   sleep 1000
+
+   # Trigger nRST to get back to sane system
+   mspm0_board_reset
+   sleep 1000
+
+   return 0
+}
+
+# NOTE: Password authentication scheme is NOT supported atm.
+# mspm0_factory_reset: Factory reset the board
+proc mspm0_factory_reset {} {
+   set res [_mspm0_dssm_command 0x020a]
+   if { $res } {
+   echo "Factory Reset failed!"
+   } else {
+   echo "Factory reset success! Halting processor"
+   # We need to halt the processor else the WDT fires!
+   halt
+   }
+   return $res
+}
+
+add_help_text mspm0_factory_reset "Force Factory reset to recover 'bricked' 
board"
+
+# NOTE: Password authentication scheme is NOT supported atm.
+# mspm0_mass_erase: Mass erase flash
+proc mspm0_ma

[PATCH]: f155882403 tools/release: Set up Git submodules

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8382

-- gerrit

commit f155882403d7acce1c02df7d8e6b04783e65cfa0
Author: Marc Schink 
Date:   Tue Jul 2 16:12:25 2024 +0200

tools/release: Set up Git submodules

Since Git submodules are not set up by default anymore, use the
'with-submodules' bootstrap argument to ensure that the 'git2cl'
submodule is available.

Change-Id: I2fb2f8f3acf43bc0f8951b6391c49965d8be2b39
Signed-off-by: Marc Schink 

diff --git a/tools/release.sh b/tools/release.sh
index ac8af646e8..9f0a9ae376 100755
--- a/tools/release.sh
+++ b/tools/release.sh
@@ -60,7 +60,7 @@ do_info() {
 
 do_bootstrap() {
echo -n "Bootstrapping..."
-   ./bootstrap 2>&1 | perl tools/logger.pl > "release-bootstrap.log"
+   ./bootstrap with-submodules 2>&1 | perl tools/logger.pl > 
"release-bootstrap.log"
 }
 maybe_bootstrap() { [ -f "configure" ] || do_bootstrap; }
 

-- 

[PATCH]: 450af54643 configure: Use pkg-config for jimtcl

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8383

-- gerrit

commit 450af54643d96644640c97ca1134c5422b7d8632
Author: Marc Schink 
Date:   Tue Jul 2 17:14:22 2024 +0200

configure: Use pkg-config for jimtcl

The jimtcl project supports pkg-config, use it for a simpler
configuration of compiler and linker flags and to enforce the minimum
required package version.

Change-Id: I6fdcc818a8fdd205a126b0a46356434dbe890226
Signed-off-by: Marc Schink 

diff --git a/Makefile.am b/Makefile.am
index 647b571cfa..2230e628f8 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -48,6 +48,8 @@ AM_CPPFLAGS = $(HOST_CPPFLAGS)\
 if INTERNAL_JIMTCL
 AM_CPPFLAGS += -I$(top_srcdir)/jimtcl \
   -I$(top_builddir)/jimtcl
+else
+AM_CPPFLAGS += $(JIMTCL_CFLAGS)
 endif
 EXTRA_DIST += \
BUGS \
diff --git a/configure.ac b/configure.ac
index 6b5e90f1f0..87568b04ac 100644
--- a/configure.ac
+++ b/configure.ac
@@ -594,6 +594,8 @@ AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
   ], [
 AC_MSG_ERROR([jimtcl not found, run git submodule init and git submodule 
update.])
   ])
+], [
+  PKG_CHECK_MODULES([JIMTCL], [jimtcl >= 0.82])
 ])
 
 AS_IF([test "x$build_remote_bitbang" = "xyes"], [
diff --git a/src/Makefile.am b/src/Makefile.am
index 6d79cd6311..93d128e290 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -17,7 +17,7 @@ bin_PROGRAMS += %D%/openocd
 if INTERNAL_JIMTCL
 %C%_openocd_LDADD += $(top_builddir)/jimtcl/libjim.a
 else
-%C%_openocd_LDADD += -ljim
+%C%_openocd_LDADD += $(JIMTCL_LIBS)
 endif
 
 %C%_libopenocd_la_CPPFLAGS =

-- 

[PATCH]: 2d78bbf6d5 bootstrap: Do not set up Git submodules by default

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8381

-- gerrit

commit 2d78bbf6d587ad92e06ac9dbfbfc3a3185727b8e
Author: Marc Schink 
Date:   Wed Jun 26 15:50:45 2024 +0200

bootstrap: Do not set up Git submodules by default

Building OpenOCD with jimtcl and libjaylink Git submodules is deprecated
and will be removed in the upcoming releases. The remaining 'git2cl'
submodule is only required during the OpenOCD release process.

Only set up Git submodules when the 'with-submodules' argument is used,
for example during the OpenOCD release process or for the transition
period until all submodules are replaced by external dependencies.

Change-Id: Ia4fd765e3a2d6b2c40b084a1ffdf919d5f4f35bb
Signed-off-by: Marc Schink 

diff --git a/bootstrap b/bootstrap
index cf6167fff6..d054319e52 100755
--- a/bootstrap
+++ b/bootstrap
@@ -15,11 +15,11 @@ else
 exit 1
 fi
 
-if [ "$1" = "nosubmodule" ]; then
-SKIP_SUBMODULE=1
+if [ "$1" = "with-submodules" ]; then
+WITH_SUBMODULES=1
 elif [ -n "$1" ]; then
 echo "$0: Illegal argument $1"
-echo "USAGE: $0 [nosubmodule]"
+echo "USAGE: $0 [with-submodules]"
 exit 1
 fi
 
@@ -34,12 +34,12 @@ autoheader --warnings=all
 automake --warnings=all --gnu --add-missing --copy
 )
 
-if [ -n "$SKIP_SUBMODULE" ]; then
-echo "Skipping submodule setup"
-else
+if [ -n "$WITH_SUBMODULES" ]; then
 echo "Setting up submodules"
 git submodule init
 git submodule update
+else
+echo "Skipping submodule setup"
 fi
 
 if [ -x src/jtag/drivers/libjaylink/autogen.sh ]; then

-- 

[PATCH]: 1f81ae7fd5 Deprecate jimtcl Git submodule

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8380

-- gerrit

commit 1f81ae7fd516d7ea6728bfe64040531ef485f9b2
Author: Marc Schink 
Date:   Tue Jul 2 17:12:46 2024 +0200

Deprecate jimtcl Git submodule

jimtcl was integrated as Git submodule for convenience and probably also
because packages were not widely available at the time. Today, jimtcl is
available in many popular package repositories [1] and the integration
as Git submodule adds unnecessary complexity to the OpenOCD build
process. For details, see the discussion on the mailing list in [2].

Disable the jimtcl Git submodule by default and announce it as
deprecated feature that will be removed in the next release. This gives
package maintainers time to adapt to the change and, if necessary,
build a package for jimtcl.

[1] https://repology.org/project/jimtcl/versions
[2] https://sourceforge.net/p/openocd/mailman/message/58786630/

Change-Id: I07930ac07f7d7a6317c08b21dc118f4f128b331c
Signed-off-by: Marc Schink 

diff --git a/configure.ac b/configure.ac
index becc531b0d..6b5e90f1f0 100644
--- a/configure.ac
+++ b/configure.ac
@@ -372,8 +372,8 @@ AS_CASE([$host_os],
 ])
 
 AC_ARG_ENABLE([internal-jimtcl],
-  AS_HELP_STRING([--disable-internal-jimtcl], [Disable building internal 
jimtcl]),
-  [use_internal_jimtcl=$enableval], [use_internal_jimtcl=yes])
+  AS_HELP_STRING([--enable-internal-jimtcl], [Enable building internal jimtcl 
(deprecated)]),
+  [use_internal_jimtcl=$enableval], [use_internal_jimtcl=no])
 
 AC_ARG_ENABLE([jimtcl-maintainer],
   AS_HELP_STRING([--enable-jimtcl-maintainer], [Enable maintainer mode when 
building internal jimtcl]),
@@ -848,6 +848,10 @@ AS_IF([test "x$enable_jlink" != "xno"], [
   ]])
 )
 
+AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
+  AC_MSG_WARN([Using the internal jimtcl is deprecated and will not be 
possible in the future.])
+])
+
 echo
 echo
 echo OpenOCD configuration summary

-- 

[PATCH]: d54cc7e02f server/telnet: Restructure commands

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8378

-- gerrit

commit d54cc7e02f0c17298d0b747ba4d040495e400e11
Author: Marc Schink 
Date:   Mon Jun 24 16:26:02 2024 +0200

server/telnet: Restructure commands

Use a command group 'telnet' with subcommands instead of individual
commands with 'telnet_' prefix. Even though there is only one subcommand
at the moment, make this change to ensure consistency with other commands.

The old command is still available to ensure backwards compatibility,
but are marked as deprecated.

Change-Id: I5e88632fa0d0ce5a8129e9fcf5ae743fc5b093cb
Signed-off-by: Marc Schink 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 3d5e213c4b..f823b65851 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2229,7 +2229,7 @@ the port @var{number} defaults to .
 When specified as "disabled", this service is not activated.
 @end deffn
 
-@deffn {Config Command} {telnet_port} [number]
+@deffn {Config Command} {telnet port} [number]
 Specify or query the
 port on which to listen for incoming telnet connections.
 This port is intended for interaction with one human through TCL commands.
diff --git a/src/server/startup.tcl b/src/server/startup.tcl
index 93f718927d..33f706109c 100644
--- a/src/server/startup.tcl
+++ b/src/server/startup.tcl
@@ -95,3 +95,9 @@ proc "gdb_save_tdesc" {} {
echo "DEPRECATED! use 'gdb save_tdesc', not 'gdb_save_tdesc'"
eval gdb save_tdesc
 }
+
+lappend _telnet_autocomplete_skip "telnet_port"
+proc "telnet_port" {args} {
+   echo "DEPRECATED! use 'telnet port', not 'telnet_port'"
+   eval telnet port $args
+}
diff --git a/src/server/telnet_server.c b/src/server/telnet_server.c
index 72171cb3f5..0f10aa65fe 100644
--- a/src/server/telnet_server.c
+++ b/src/server/telnet_server.c
@@ -967,7 +967,6 @@ int telnet_init(char *banner)
return ERROR_OK;
 }
 
-/* daemon configuration command telnet_port */
 COMMAND_HANDLER(handle_telnet_port_command)
 {
return CALL_COMMAND_HANDLER(server_pipe_command, _port);
@@ -978,6 +977,19 @@ COMMAND_HANDLER(handle_exit_command)
return ERROR_COMMAND_CLOSE_CONNECTION;
 }
 
+static const struct command_registration telnet_subcommand_handlers[] = {
+   {
+   .name = "port",
+   .handler = handle_telnet_port_command,
+   .mode = COMMAND_CONFIG,
+   .help = "Specify port on which to listen "
+   "for incoming telnet connections.  "
+   "Read help on 'gdb port'.",
+   .usage = "[port_num]",
+   },
+   COMMAND_REGISTRATION_DONE
+};
+
 static const struct command_registration telnet_command_handlers[] = {
{
.name = "exit",
@@ -987,13 +999,11 @@ static const struct command_registration 
telnet_command_handlers[] = {
.help = "exit telnet session",
},
{
-   .name = "telnet_port",
-   .handler = handle_telnet_port_command,
+   .name = "telnet",
+   .chain = telnet_subcommand_handlers,
.mode = COMMAND_CONFIG,
-   .help = "Specify port on which to listen "
-   "for incoming telnet connections.  "
-   "Read help on 'gdb port'.",
-   .usage = "[port_num]",
+   .help = "telnet commands",
+   .usage = "",
},
COMMAND_REGISTRATION_DONE
 };

-- 

[PATCH]: d4f956298f server/telnet: Always allow 'exit' command

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8379

-- gerrit

commit d4f956298f2eb3c1439097f2977d2379b9300d21
Author: Marc Schink 
Date:   Mon Jun 24 16:26:46 2024 +0200

server/telnet: Always allow 'exit' command

The telnet 'exit' command is only available in the execution phase of
OpenOCD. Thus, a telnet session cannot be closed via 'exit' if OpenOCD
is started with 'noinit'. Make the 'exit' command always available.

Change-Id: I14447ecde63e579f1c523d606f048ad29cc84a35
Signed-off-by: Marc Schink 

diff --git a/src/server/telnet_server.c b/src/server/telnet_server.c
index 0f10aa65fe..a596afef08 100644
--- a/src/server/telnet_server.c
+++ b/src/server/telnet_server.c
@@ -994,7 +994,7 @@ static const struct command_registration 
telnet_command_handlers[] = {
{
.name = "exit",
.handler = handle_exit_command,
-   .mode = COMMAND_EXEC,
+   .mode = COMMAND_ANY,
.usage = "",
.help = "exit telnet session",
},

-- 

[PATCH]: 9675f039a7 rtt: default the ID to "SEGGER RTT"

[gerrit]

This is an automated email from Gerrit.

"Karl Palsson " just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8354

-- gerrit

commit 9675f039a78f658f294f59a96bcec13256ba4bcc
Author: Karl Palsson 
Date:   Tue Jan 16 13:52:56 2024 +

rtt: default the ID to "SEGGER RTT"

Instead of making people type this in all the time, just default to
"SEGGER RTT" so more things work out of the box.

Change-Id: I147142cf0a755e635d3f66e047be2eb5049cf511
Signed-off-by: Karl Palsson 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 53730eafaf..1a76bb80a0 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -9465,11 +9465,12 @@ Channels are exposed via raw TCP/IP connections. One or 
more RTT servers can be
 assigned to each channel to make them accessible to an unlimited number
 of TCP/IP connections.
 
-@deffn {Command} {rtt setup} address size ID
+@deffn {Command} {rtt setup} address size [ID]
 Configure RTT for the currently selected target.
 Once RTT is started, OpenOCD searches for a control block with the
 identifier @var{ID} starting at the memory address @var{address} within the 
next
 @var{size} bytes.
+ID defaults to the string "SEGGER RTT"
 @end deffn
 
 @deffn {Command} {rtt start}
@@ -9512,7 +9513,7 @@ on the target device.
 @example
 resume
 
-rtt setup 0x2000 2048 "SEGGER RTT"
+rtt setup 0x2000 2048
 rtt start
 
 rtt server start 9090 0
diff --git a/src/rtt/tcl.c b/src/rtt/tcl.c
index 2b8822fce8..16804f1aea 100644
--- a/src/rtt/tcl.c
+++ b/src/rtt/tcl.c
@@ -19,8 +19,15 @@ COMMAND_HANDLER(handle_rtt_setup_command)
 {
struct rtt_source source;
 
-   if (CMD_ARGC != 3)
+   const char *DEFAULT_ID = "SEGGER RTT";
+   const char *selected_id;
+   if (CMD_ARGC < 2 || CMD_ARGC > 3)
return ERROR_COMMAND_SYNTAX_ERROR;
+   if (CMD_ARGC == 2) {
+   selected_id = DEFAULT_ID;
+   } else {
+   selected_id = CMD_ARGV[2];
+   }
 
source.find_cb = _rtt_find_control_block;
source.read_cb = _rtt_read_control_block;
@@ -38,7 +45,7 @@ COMMAND_HANDLER(handle_rtt_setup_command)
 
rtt_register_source(source, get_current_target(CMD_CTX));
 
-   if (rtt_setup(address, size, CMD_ARGV[2]) != ERROR_OK)
+   if (rtt_setup(address, size, selected_id) != ERROR_OK)
return ERROR_FAIL;
 
return ERROR_OK;
@@ -218,7 +225,7 @@ static const struct command_registration 
rtt_subcommand_handlers[] = {
.handler = handle_rtt_setup_command,
.mode = COMMAND_ANY,
.help = "setup RTT",
-   .usage = "  "
+   .usage = "  [ID]"
},
{
.name = "start",

-- 

[PATCH]: f7bef5149f flash/startup.tcl: Use "flash verify_image" for program verify

[gerrit]

This is an automated email from Gerrit.

"Grant Ramsay " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8377

-- gerrit

commit f7bef5149fe43e222681289809287d485c2bc0fe
Author: Grant Ramsay 
Date:   Tue Jun 25 16:54:21 2024 +1200

flash/startup.tcl: Use "flash verify_image" for program verify

The "verify_image" command relies on the flash being memory mapped.
Whereas the "flash verify_image" command lets the flash driver
determine how to do the verification and falls back to a memory
mapped checksum if not implemented

Change-Id: If2b9c5607655ff95d690fa4b46cac6c937291566
Signed-off-by: Grant Ramsay 

diff --git a/src/flash/startup.tcl b/src/flash/startup.tcl
index 654f201a4e..f3cedd5136 100644
--- a/src/flash/startup.tcl
+++ b/src/flash/startup.tcl
@@ -58,7 +58,7 @@ proc program {filename args} {
# Check whether programming is needed
if {[info exists preverify]} {
echo "**pre-verifying**"
-   if {[catch {eval verify_image $flash_args}] == 0} {
+   if {[catch {eval flash verify_image $flash_args}] == 0} {
echo "**Verified OK - No flashing**"
set needsflash 0
}
@@ -73,7 +73,7 @@ proc program {filename args} {
if {[info exists verify]} {
# verify phase
echo "** Verify Started **"
-   if {[catch {eval verify_image $flash_args}] == 
0} {
+   if {[catch {eval flash verify_image 
$flash_args}] == 0} {
echo "** Verified OK **"
} else {
program_error "** Verify Failed **" 
$exit

-- 

[PATCH]: 65a0bed3a0 flash/startup.tcl: Tidy flash program preverify documentation

[gerrit]

This is an automated email from Gerrit.

"Grant Ramsay " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8376

-- gerrit

commit 65a0bed3a06c4f8f8a0c2aeb612cdd7c01ed6798
Author: Grant Ramsay 
Date:   Tue Jun 25 16:52:59 2024 +1200

flash/startup.tcl: Tidy flash program preverify documentation

Remove the hyphen from "pre-verify" in usage text.
Add preverify to the help text and procedure comment.

Change-Id: I6d96e78ca84d99929300d461e435f5b4ce07b5db
Signed-off-by: Grant Ramsay 

diff --git a/src/flash/startup.tcl b/src/flash/startup.tcl
index 654f201a4e..0dd84efacc 100644
--- a/src/flash/startup.tcl
+++ b/src/flash/startup.tcl
@@ -5,7 +5,7 @@
 #
 # program utility proc
 # usage: program filename
-# optional args: verify, reset, exit and address
+# optional args: preverify, verify, reset, exit and address
 #
 
 lappend _telnet_autocomplete_skip program_error
@@ -101,8 +101,8 @@ proc program {filename args} {
return
 }
 
-add_help_text program "write an image to flash, address is only required for 
binary images. verify, reset, exit are optional"
-add_usage_text program " \[address\] \[pre-verify\] \[verify\] 
\[reset\] \[exit\]"
+add_help_text program "write an image to flash, address is only required for 
binary images. preverify, verify, reset, exit are optional"
+add_usage_text program " \[address\] \[preverify\] \[verify\] 
\[reset\] \[exit\]"
 
 # stm32[f0x|f3x] uses the same flash driver as the stm32f1x
 proc stm32f0x args { eval stm32f1x $args }

-- 

[PATCH]: 77a93f4bb0 openocd: build: prevent old clone to fail on git submodules

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8375

-- gerrit

commit 77a93f4bb0934f022e303aff3b9f3f400176d2aa
Author: Antonio Borneo 
Date:   Fri Jun 21 14:32:45 2024 +0200

openocd: build: prevent old clone to fail on git submodules

Working on an old local git repository, the git sub-modules could
have been set before last changes in .gitmodules.
The script 'bootstrap' does not update the url of the repositories
and this can cause the script to fail.

Add 'git submodule sync' to the script to update the url of the
repositories.

Reported-by: Karl Hammar 
Change-Id: I61412f804dbbb7a843aa009139ddb4b8e71beefb
Signed-off-by: Antonio Borneo 

diff --git a/bootstrap b/bootstrap
index cf6167fff6..29cd8463e0 100755
--- a/bootstrap
+++ b/bootstrap
@@ -39,6 +39,7 @@ if [ -n "$SKIP_SUBMODULE" ]; then
 else
 echo "Setting up submodules"
 git submodule init
+git submodule sync
 git submodule update
 fi
 

-- 

[PATCH]: 0f4102758c fixup! atsamv: add support for user signature partition write

[gerrit]

This is an automated email from Gerrit.

"Michal Lenc " just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8374

-- gerrit

commit 0f4102758c5db0319a29bf4ff6fcbdc1549d3d09
Author: Michal Lenc 
Date:   Fri Jun 21 10:33:31 2024 +0200

fixup! atsamv: add support for user signature partition write

Change-Id: If7484519feab1cd541d02c1b80b1f8d4982f0ab2
Signed-off-by: Michal Lenc 

diff --git a/src/flash/nor/atsamv.c b/src/flash/nor/atsamv.c
index f9d26200bc..a2fb681c5a 100644
--- a/src/flash/nor/atsamv.c
+++ b/src/flash/nor/atsamv.c
@@ -49,6 +49,8 @@
 #define SAMV_EFC_FCMD_STU(0x14)/* (EFC) Start Read User Signature */
 #define SAMV_EFC_FCMD_SPUS   (0x15)/* (EFC) Stop Read User Signature */
 
+#define SAMV_EFC_FMR_SCOD (1 << 16) /* Sequantial Code Optimalization Disable 
*/
+
 #define OFFSET_EFC_FMR0
 #define OFFSET_EFC_FCR4
 #define OFFSET_EFC_FSR8
@@ -60,6 +62,14 @@
 #define SAMV_SECTOR_SIZE 16384
 #define SAMV_PAGE_SIZE 512
 #define SAMV_FLASH_BASE 0x0040
+/* This is a workaround. Flash Signature area is actually located at the
+ * begining of the flash memory at the address range overlapping the
+ * first page of program flash. Since OpenOCD does not support write to
+ * a bank outside of address range, we use address above maximum 32-bit
+ * address space.
+ */
+#define SAMV_FLASH_SIGNATURE_BASE (0x1)
+#define SAMV_FLASH_SIGNATURE_SIZE (SAMV_PAGE_SIZE)
 
 struct samv_flash_bank {
bool  probed;
@@ -67,6 +77,7 @@ struct samv_flash_bank {
unsigned gpnvm[SAMV_NUM_GPNVM_BITS];
 };
 
+
 /* The actual sector size of the SAMV7 flash memory is 128K bytes.
  * 16 sectors for a 2048KB device. The lock regions are 16KB per lock
  * region, with a 2048KB device having 128 lock regions.
@@ -80,6 +91,46 @@ static int samv_efc_get_status(struct target *target, 
uint32_t *v)
return r;
 }
 
+static int samv_efc_check_status(struct target *target, uint8_t desired)
+{
+   uint32_t v;
+   samv_efc_get_status(target, );
+   if ((v & 1) != desired)
+   return ERROR_FAIL;
+
+   return ERROR_OK;
+}
+
+static int samv_efc_wait_status(struct target *target, uint8_t desired,
+   int64_t timeout, uint32_t *status)
+{
+   uint32_t v;
+   int64_t ms_now, ms_end;
+   int r;
+
+   if (status)
+   *status = 0;
+
+   ms_end = timeout + timeval_ms();
+
+   do {
+   r = samv_efc_get_status(target, );
+   if (r != ERROR_OK)
+   return r;
+
+   if (status)
+   *status = v;
+   ms_now = timeval_ms();
+   if (ms_now > ms_end) {
+   /* error */
+   LOG_ERROR("Command timeout");
+   return ERROR_FAIL;
+   }
+   } while ((v & 1) != desired);
+
+   return ERROR_OK;
+}
+
 static int samv_efc_get_result(struct target *target, uint32_t *v)
 {
uint32_t rv;
@@ -89,15 +140,20 @@ static int samv_efc_get_result(struct target *target, 
uint32_t *v)
return r;
 }
 
+static inline int samv_efc_get_mode(struct target *target, uint32_t *v)
+{
+   return target_read_u32(target, SAMV_CONTROLLER_ADDR + OFFSET_EFC_FMR, 
v);
+}
+
+static inline int samv_efc_set_mode(struct target *target, uint32_t v)
+{
+   return target_write_u32(target, SAMV_CONTROLLER_ADDR + OFFSET_EFC_FMR, 
v);
+}
+
 static int samv_efc_start_command(struct target *target,
unsigned command, unsigned argument)
 {
uint32_t v;
-   samv_efc_get_status(target, );
-   if (!(v & 1)) {
-   LOG_ERROR("flash controller is not ready");
-   return ERROR_FAIL;
-   }
 
v = (0x5A << 24) | (argument << 8) | command;
LOG_DEBUG("starting flash command: 0x%08x", (unsigned int)(v));
@@ -112,28 +168,20 @@ static int samv_efc_perform_command(struct target *target,
 {
int r;
uint32_t v;
-   int64_t ms_now, ms_end;
 
if (status)
*status = 0;
 
+   r = samv_efc_check_status(target, 1);
+   if (r != ERROR_OK)
+   return r;
r = samv_efc_start_command(target, command, argument);
if (r != ERROR_OK)
return r;
 
-   ms_end = 1 + timeval_ms();
-
-   do {
-   r = samv_efc_get_status(target, );
-   if (r != ERROR_OK)
-   return r;
-   ms_now = timeval_ms();
-   if (ms_now > ms_end) {
-   /* error */
-   LOG_ERROR("Command timeout");
-   return ERROR_FAIL;
-   }
-   } while ((v & 1) == 0);
+   r = samv_efc_wait_status(target, 1, 1, );
+   if (r != ERROR_OK)
+   

[PATCH]: 33f0e33d46 flash/nor/stm32f1x: Add GD32L233x support

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8351

-- gerrit

commit 33f0e33d46f915d3214de7c45120015a88ae07e9
Author: Marc Schink 
Date:   Fri Jun 21 08:35:02 2024 +0100

flash/nor/stm32f1x: Add GD32L233x support

The revision number is not updated since there is no information in the
datasheet.

Tested with GD32L233CCT6 (programming, write protection and mass erase).

Change-Id: Ia105fca8843449672cd497576da8b2d7334baa1b
Signed-off-by: Marc Schink 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index e46e6004bc..86d1e47d5f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -7739,7 +7739,7 @@ applied to all of them.
 
 @deffn {Flash Driver} {stm32f1x}
 This driver supports the STM32F0, STM32F1 and STM32F3 microcontroller series 
from STMicroelectronics.
-The driver is also compatible with the GD32F1, GD32VF103 (RISC-V core), GD32F3 
and GD32E23 microcontroller series from GigaDevice.
+The driver is also compatible with the GD32F1, GD32VF103 (RISC-V core), 
GD32F3, GD32E23 and GD32L233 microcontroller series from GigaDevice.
 The driver also supports the APM32F0 and APM32F1 series from Geehy 
Semiconductor.
 The driver automatically recognizes a number of these chips using the chip 
identification register, and autoconfigures itself.
 
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index 5a3c2da663..604d7fcfe0 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -757,7 +757,11 @@ static int stm32x_get_property_addr(struct target *target, 
struct stm32x_propert
addr->device_id = 0xE0042000;
addr->flash_size = 0x17CC;
return ERROR_OK;
-   case CORTEX_M23_PARTNO: /* GD32E23x devices */
+   case CORTEX_M23_PARTNO:
+/*
+ * GD32E23x devices
+ * GD32L233x devices
+ */
addr->device_id = 0x40015800;
addr->flash_size = 0x17E0;
return ERROR_OK;

-- 

[PATCH]: 8b63032059 tcl/board: Add GigaDevice GD32L233C-Start config

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8373

-- gerrit

commit 8b63032059e453677ed47cddaa31b2afb8e263f7
Author: Marc Schink 
Date:   Thu May 18 11:29:49 2023 +0200

tcl/board: Add GigaDevice GD32L233C-Start config

Change-Id: I46ed0149d4ce54a879d10c9362f276138f672bff
Signed-off-by: Marc Schink 

diff --git a/tcl/board/gigadevice/gd32l233c-start.cfg 
b/tcl/board/gigadevice/gd32l233c-start.cfg
new file mode 100644
index 00..1ad5d8b1cb
--- /dev/null
+++ b/tcl/board/gigadevice/gd32l233c-start.cfg
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# GigaDevice GD32L233C-Start
+#
+# https://www.gigadevice.com/technical-resource/gd32-mcu-development-tool
+#
+
+source [find interface/cmsis-dap.cfg]
+
+source [find target/gigadevice/gd32l233x.cfg]
+adapter speed 4000

-- 

[PATCH]: 6b73b7d8e7 tcl/target: Add GigaDevice GD32L233x config

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8372

-- gerrit

commit 6b73b7d8e72fa5578eb059d695f1530d60673cac
Author: Marc Schink 
Date:   Thu May 18 11:29:04 2023 +0200

tcl/target: Add GigaDevice GD32L233x config

Change-Id: I067b7e6e7e121fdca60d84f0bd411423187bd643
Signed-off-by: Marc Schink 

diff --git a/tcl/target/gigadevice/gd32l233x.cfg 
b/tcl/target/gigadevice/gd32l233x.cfg
new file mode 100644
index 00..06bb7f53a3
--- /dev/null
+++ b/tcl/target/gigadevice/gd32l233x.cfg
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# GigaDevice GD32L233x target
+#
+# https://www.gigadevice.com/product/mcu/arm-cortex-m23
+#
+
+# This microcontroller series supports only SWD transport.
+transport select swd
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME gd32l233x
+}
+
+# Work-area size in RAM used for flash operations (16 KiB).
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x4000
+}
+
+if { [info exists CPUTAPID] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x0bf11477
+}
+
+swd newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x2000 -work-area-size 
$_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
+
+adapter speed 1000
+
+if {![using_hla]} {
+   cortex_m reset_config sysresetreq
+}

-- 

[PATCH]: 753c706011 Drop parallel port adapters

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8350

-- gerrit

commit 753c70601179f91f04dd86375f7bd559331c3e86
Author: Marc Schink 
Date:   Wed Jun 12 22:08:48 2024 +0200

Drop parallel port adapters

Parallel port adapters are deprected for at least one release and can
be dropped now.

Change-Id: I78a2922ac5b7a404f9d9f29273df0549c3980660
Signed-off-by: Marc Schink 

diff --git a/README b/README
index 7d3f10def0..1ff4b46a59 100644
--- a/README
+++ b/README
@@ -261,13 +261,6 @@ file. It probably belongs somewhere in /etc/udev/rules.d, 
but
 consult your operating system documentation to be sure. Do not forget
 to add yourself to the "plugdev" group.
 
-For parallel port adapters on GNU/Linux and FreeBSD please change your
-"ppdev" (parport* or ppi*) device node permissions accordingly.
-
-For parport adapters on Windows you need to run install_giveio.bat
-(it's also possible to use "ioperm" with Cygwin instead) to give
-ordinary users permissions for accessing the "LPT" registers directly.
-
 Compiling OpenOCD
 -
 
@@ -310,18 +303,6 @@ For a more or less complete script that does all this for 
you, see
 
   contrib/cross-build.sh
 
-Parallel Port Dongles
--
-
-If you want to access the parallel port using the PPDEV interface you
-have to specify both --enable-parport AND --enable-parport-ppdev, since
-the later option is an option to the parport driver.
-
-The same is true for the --enable-parport-giveio option, you have to
-use both the --enable-parport AND the --enable-parport-giveio option
-if you want to use giveio instead of ioperm parallel port access
-method.
-
 
 ==
 Obtaining OpenOCD From GIT
diff --git a/configure.ac b/configure.ac
index e003a293b2..097af17814 100644
--- a/configure.ac
+++ b/configure.ac
@@ -269,20 +269,6 @@ AC_ARG_ADAPTERS([
 
 AC_ARG_ADAPTERS([DUMMY_ADAPTER],[no])
 
-AC_ARG_ENABLE([parport],
-  AS_HELP_STRING([--enable-parport], [Enable building the pc parallel port 
driver]),
-  [build_parport=$enableval], [build_parport=no])
-
-AC_ARG_ENABLE([parport_ppdev],
-  AS_HELP_STRING([--disable-parport-ppdev],
-  [Disable use of ppdev (/dev/parportN) for parport (for x86 only)]),
-[parport_use_ppdev=$enableval], [parport_use_ppdev=yes])
-
-AC_ARG_ENABLE([parport_giveio],
-AS_HELP_STRING([--enable-parport-giveio],
-  [Enable use of giveio for parport (for CygWin only)]),
-[parport_use_giveio=$enableval], [parport_use_giveio=])
-
 AC_ARG_ENABLE([jtag_vpi],
   AS_HELP_STRING([--enable-jtag_vpi], [Enable building support for JTAG VPI]),
   [build_jtag_vpi=$enableval], [build_jtag_vpi=no])
@@ -295,10 +281,6 @@ AC_ARG_ENABLE([jtag_dpi],
   AS_HELP_STRING([--enable-jtag_dpi], [Enable building support for JTAG DPI]),
   [build_jtag_dpi=$enableval], [build_jtag_dpi=no])
 
-AC_ARG_ENABLE([amtjtagaccel],
-  AS_HELP_STRING([--enable-amtjtagaccel], [Enable building the Amontec 
JTAG-Accelerator driver]),
-  [build_amtjtagaccel=$enableval], [build_amtjtagaccel=no])
-
 AS_CASE(["${host_cpu}"],
   [arm*|aarch64], [
 AC_ARG_ENABLE([bcm2835gpio],
@@ -332,10 +314,6 @@ AS_CASE(["${host_cpu}"],
 build_at91rm9200=no
 ])
 
-AC_ARG_ENABLE([gw16012],
-  AS_HELP_STRING([--enable-gw16012], [Enable building support for the 
Gateworks GW16012 JTAG Programmer]),
-  [build_gw16012=$enableval], [build_gw16012=no])
-
 AC_ARG_ENABLE([sysfsgpio],
   AS_HELP_STRING([--enable-sysfsgpio], [Enable building support for 
programming driven via sysfs gpios.]),
   [build_sysfsgpio=$enableval], [build_sysfsgpio=no])
@@ -388,45 +366,21 @@ AC_ARG_ENABLE([remote-bitbang],
   AS_HELP_STRING([--enable-remote-bitbang], [Enable building support for the 
Remote Bitbang driver]),
   [build_remote_bitbang=$enableval], [build_remote_bitbang=no])
 
-AS_CASE(["${host_cpu}"],
-  [i?86|x86*], [],
-  [
-AS_IF([test "x$parport_use_ppdev" = "xno"], [
-  AC_MSG_WARN([--disable-parport-ppdev is not supported by the host CPU])
-])
-parport_use_ppdev=yes
-])
-
 AS_CASE([$host],
   [*-cygwin*], [
 is_win32=yes
-parport_use_ppdev=no
 
 AC_COMPILE_IFELSE([AC_LANG_PROGRAM([], [[return __MINGW32__;]])],
   [is_mingw=yes],[is_mingw=no])
 AS_IF([test "x$is_mingw" = "xyes"], [
-  AS_IF([test "x$parport_use_giveio" = "xno"], [
-AC_MSG_WARN([--disable-parport-giveio is not supported by MinGW32 
hosts])
-  ])
-  parport_use_giveio=yes
   is_cygwin=no
 ], [
   is_cygwin=yes
-  # sys/io.h needed under cygwin for parport access
-  AS_IF([test "x$build_parport" = "xyes"], [
-AC_CHECK_HEADERS([sys/io.h],[],AC_MSG_ERROR([Please install the cygwin 
ioperm package]))
-  ])
 ])
   ],
   [*-mingw*

[PATCH]: eb11f9e38d Deprecate parallel port adapters

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8349

-- gerrit

commit eb11f9e38d0ce510264f9fe13009d7f61d04
Author: Marc Schink 
Date:   Wed Jun 12 21:53:25 2024 +0200

Deprecate parallel port adapters

Since USB almost completely replaced parallel port interfaces, parallel
port debug adapters are very rarely used these days. The poor hardware
availability and the lack of users prevents testing, maintenance and
adaptations to future changes.

Mark parallel port adapters as deprecated as a first step to give
potential users the opportunity to upgrade the hardware until the next
OpenOCD release. The documentation already recommends to use USB-based
adapters in instead of parallel port adapters.

Change-Id: Idd9fb75588246bc39e12ea17a71435ed77f0f50b
Signed-off-by: Marc Schink 

diff --git a/configure.ac b/configure.ac
index becc531b0d..e003a293b2 100644
--- a/configure.ac
+++ b/configure.ac
@@ -848,6 +848,12 @@ AS_IF([test "x$enable_jlink" != "xno"], [
   ]])
 )
 
+AS_IF([test "x$build_parport" = "xyes" || test "x$build_amtjtagaccel" = "xyes" 
|| test "x$build_gw16012" = "xyes"], [
+  echo
+  echo
+  AC_MSG_WARN([Parallel port adapters are deprecated and support will be 
removed in the next release!])
+])
+
 echo
 echo
 echo OpenOCD configuration summary
diff --git a/doc/openocd.texi b/doc/openocd.texi
index e46e6004bc..d487bfdde0 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2502,6 +2502,8 @@ enabled when OpenOCD is configured, in order to be made
 available at run time.
 
 @deffn {Interface Driver} {amt_jtagaccel}
+@b{Note: Parallel port adapters are deprecated and support will be removed in 
the next release!}
+
 Amontec Chameleon in its JTAG Accelerator configuration,
 connected to a PC's EPP mode parallel port.
 This defines some driver-specific commands:
@@ -2921,6 +2923,8 @@ image. To be used with USB-Blaster II only.
 @end deffn
 
 @deffn {Interface Driver} {gw16012}
+@b{Note: Parallel port adapters are deprecated and support will be removed in 
the next release!}
+
 Gateworks GW16012 JTAG programmer.
 This has one driver-specific command:
 
@@ -3067,6 +3071,8 @@ version, and target voltage.
 @end deffn
 
 @deffn {Interface Driver} {parport}
+@b{Note: Parallel port adapters are deprecated and support will be removed in 
the next release!}
+
 Supports PC parallel port bit-banging cables:
 Wigglers, PLD download cable, and more.
 These interfaces have several commands, used to configure the driver
diff --git a/src/jtag/drivers/amt_jtagaccel.c b/src/jtag/drivers/amt_jtagaccel.c
index b28ce62ffb..9b27c10f5f 100644
--- a/src/jtag/drivers/amt_jtagaccel.c
+++ b/src/jtag/drivers/amt_jtagaccel.c
@@ -419,6 +419,8 @@ static int amt_jtagaccel_init(void)
 #endif
uint8_t ar_status;
 
+   LOG_WARNING("Parallel port adapters are deprecated and support will be 
removed in the next release!");
+
 #if PARPORT_USE_PPDEV == 1
if (device_handle > 0) {
LOG_ERROR("device is already opened");
diff --git a/src/jtag/drivers/gw16012.c b/src/jtag/drivers/gw16012.c
index a4c6fd0f00..597a8dd4d4 100644
--- a/src/jtag/drivers/gw16012.c
+++ b/src/jtag/drivers/gw16012.c
@@ -462,6 +462,8 @@ static int gw16012_init(void)
 {
uint8_t status_port;
 
+   LOG_WARNING("Parallel port adapters are deprecated and support will be 
removed in the next release!");
+
if (gw16012_init_device() != ERROR_OK)
return ERROR_JTAG_INIT_FAILED;
 
diff --git a/src/jtag/drivers/parport.c b/src/jtag/drivers/parport.c
index d26a51048f..746db1ef32 100644
--- a/src/jtag/drivers/parport.c
+++ b/src/jtag/drivers/parport.c
@@ -259,6 +259,7 @@ static int parport_init(void)
 #if PARPORT_USE_PPDEV == 1
char buffer[256];
 #endif
+   LOG_WARNING("Parallel port adapters are deprecated and support will be 
removed in the next release!");
 
cur_cable = cables;
 

-- 

[PATCH]: 07f3692ac1 AUTHORS: Refer to source code and Git history

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8346

-- gerrit

commit 07f3692ac160c869abb3202f74b369afd6c376f5
Author: Marc Schink 
Date:   Tue Jun 18 11:03:11 2024 +0200

AUTHORS: Refer to source code and Git history

The list of authors and contributors is not maintained and outdated for
years now. Refer to the source code and Git history instead of keeping a
separate list.

Change-Id: I9a92e8e0d5073b56030bc36086b76e28de96389f
Signed-off-by: Marc Schink 

diff --git a/AUTHORS b/AUTHORS
index 2a989f37ec..7489834647 100644
--- a/AUTHORS
+++ b/AUTHORS
@@ -1,12 +1,2 @@
-Dominic Rath 
-Magnus Lundin 
-Michael Fischer 
-Spencer Oliver 
-Carsten Schlote 
-Øyvind Harboe 
-Duane Ellis 
-Michael Schwingen 
-Rick Altherr 
-David Brownell 
-Vincint Palatin 
-Zachary T Welch 
+Please check the source code files and/or Git history for a list of all authors
+and contributors.

-- 

[PATCH]: 40923d8841 doc: Remove outdated '--pipe' option

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8348

-- gerrit

commit 40923d8841cf8a2e058eb6845ba26bb23f714290
Author: Marc Schink 
Date:   Wed Jun 19 08:52:04 2024 +0200

doc: Remove outdated '--pipe' option

Change-Id: Ie3a7a3aaf69485f16b2447bd1dfa7622b584c7c0
Signed-off-by: Marc Schink 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index e46e6004bc..6044138c91 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2179,8 +2179,6 @@ only during configuration (before those ports are opened).
 For reasons including security, you may wish to prevent remote
 access using one or more of these ports.
 In such cases, just specify the relevant port number as "disabled".
-If you disable all access through TCP/IP, you will need to
-use the command line @option{-pipe} option.
 
 You can request the operating system to select one of the available
 ports for the server by specifying the relevant port number as "0".

-- 

[PATCH]: 434a265a33 doc: Refurbish manual page

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8347

-- gerrit

commit 434a265a33f35218769dfadad7c98304a3217bcc
Author: Marc Schink 
Date:   Tue Jun 18 17:26:21 2024 +0200

doc: Refurbish manual page

Remove the outdated option '--pipe' and bring the description of OpenOCD
up to date without focus on JTAG only.

Change-Id: If52e936a366dde21c1dd514bd3960d100b540e77
Signed-off-by: Marc Schink 

diff --git a/doc/openocd.1 b/doc/openocd.1
index 4278486e5d..34ec7617d1 100644
--- a/doc/openocd.1
+++ b/doc/openocd.1
@@ -1,24 +1,21 @@
-.TH "OPENOCD" "1" "November 24, 2009"
+.TH "OPENOCD" "1" "June 18, 2024"
 .SH "NAME"
 openocd \- A free and open on\-chip debugging, in\-system programming and
-boundary\-scan testing tool for ARM and MIPS systems
+boundary\-scan testing tool for microcontrollers and other embedded devices
 .SH "SYNOPSIS"
-.B openocd \fR[\fB\-fsdlcphv\fR] [\fB\-\-file\fR ] [\fB\-\-search\fR 
] [\fB\-\-debug\fR ] [\fB\-\-log_output\fR ] 
[\fB\-\-command\fR ] [\fB\-\-pipe\fR] [\fB\-\-help\fR] [\fB\-\-version\fR]
+.B openocd \fR[\fB\-fsdlchv\fR] [\fB\-\-file\fR ] [\fB\-\-search\fR 
] [\fB\-\-debug\fR ] [\fB\-\-log_output\fR ] 
[\fB\-\-command\fR ] [\fB\-\-help\fR] [\fB\-\-version\fR]
 .SH "DESCRIPTION"
 .B OpenOCD
 is an on\-chip debugging, in\-system programming and boundary\-scan
-testing tool for various ARM and MIPS systems.
+testing tool for various microcontrollers and other embedded devices.
 .PP
-The debugger uses an IEEE 1149\-1 compliant JTAG TAP bus master to access
-on\-chip debug functionality available on ARM based microcontrollers or
-system-on-chip solutions. For MIPS systems the EJTAG interface is supported.
+Various different types of debug adapters as well as transport protocols like
+JTAG and SWD are supported by OpenOCD, please check the \fIopenocd\fR info page
+for the complete list.
 .PP
 User interaction is realized through a telnet command line interface,
 a gdb (the GNU debugger) remote protocol server, and a simplified RPC
 connection that can be used to interface with OpenOCD's Jim Tcl engine.
-.PP
-OpenOCD supports various different types of JTAG interfaces/programmers,
-please check the \fIopenocd\fR info page for the complete list.
 .SH "OPTIONS"
 .TP
 .B "\-f, \-\-file "
@@ -68,8 +65,6 @@ Note that you will need to explicitly invoke
 .I init
 if the command requires access to a target or flash.
 .TP
-.B "\-p, \-\-pipe"
-Use pipes when talking to gdb.
 .TP
 .B "\-h, \-\-help"
 Show a help text and exit.
@@ -82,8 +77,6 @@ Please report any bugs on the mailing list at
 .SH "LICENCE"
 .B OpenOCD
 is covered by the GNU General Public License (GPL), version 2 or later.
-.SH "SEE ALSO"
-.BR jtag (1)
 .PP
 The full documentation for
 .B openocd

-- 

[PATCH]: b5727961ef target: add NXP imx93 and EVK board support

[gerrit]

This is an automated email from Gerrit.

"Peter pan " just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8353

-- gerrit

commit b5727961ef0619018193e44da8f9d668785fe29b
Author: Jiafei Pan 
Date:   Tue Jun 18 12:16:42 2024 +0800

target: add NXP imx93 and EVK board support

Have verified with JLink:
openocd -f interface/jlink.cfg -f board/nxp_imx93-evk.cfg

Change-Id: I9363b67cf56bc8615b06d7b64b75e7fe398e1c45
Signed-off-by: Jiafei Pan 

diff --git a/tcl/board/nxp_imx93-evk.cfg b/tcl/board/nxp_imx93-evk.cfg
new file mode 100644
index 00..7dfbf77ad0
--- /dev/null
+++ b/tcl/board/nxp_imx93-evk.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# configuration file for NXP i.MX93 EVK
+#
+
+# only JTAG supported
+transport select jtag
+
+# set a safe JTAG clock speed, can be overridden
+adapter speed 1000
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 70
+
+
+# board has an i.MX93 with 2 Cortex-A55 cores
+set CHIPNAME imx93
+set CHIPCORES 2
+
+# source SoC configuration
+source [find target/imx93.cfg]
diff --git a/tcl/target/imx93.cfg b/tcl/target/imx93.cfg
new file mode 100644
index 00..b5484f9463
--- /dev/null
+++ b/tcl/target/imx93.cfg
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# configuration file for NXP i.MX93 family of SoCs
+#
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
+   set  _CHIPNAME imx93
+}
+
+if { [info exists CHIPCORES] } {
+set _cores $CHIPCORES
+} else {
+set _cores 1
+}
+
+# CoreSight Debug Access Port
+if { [info exists DAP_TAPID] } {
+set _DAP_TAPID $DAP_TAPID
+} else {
+set _DAP_TAPID 0x0892801d
+}
+
+# the DAP tap
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
+-expected-id $_DAP_TAPID
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.a55
+set _CTINAME $_CHIPNAME.cti
+
+set DBGBASE {0x4081 0x4091}
+set CTIBASE {0x4082 0x4092}
+
+for { set _core 0 } { $_core < $_cores } { incr _core } {
+
+cti create $_CTINAME.$_core -dap $_CHIPNAME.dap -ap-num 1 \
+-baseaddr [lindex $CTIBASE $_core]
+
+set _command "target create $_TARGETNAME.$_core aarch64 -dap 
$_CHIPNAME.dap \
+-dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core -coreid $_core"
+
+eval $_command
+}
+
+# declare the auxiliary Cortex-M33 core on AP #4
+target create ${_CHIPNAME}.m33 cortex_m -dap ${_CHIPNAME}.dap -ap-num 3
+
+# AHB-AP for direct access to soc bus
+target create ${_CHIPNAME}.ahb mem_ap -dap ${_CHIPNAME}.dap -ap-num 0
+
+# default target is A55 core 0
+targets $_TARGETNAME.1

-- 

[PATCH]: a687ea7c7a target: add imx8mp and evk board support

[gerrit]

This is an automated email from Gerrit.

"Peter pan " just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8352

-- gerrit

commit a687ea7c7a41906aab1da4b9dbc79784b1204dfc
Author: Jiafei Pan 
Date:   Tue Jun 18 12:15:21 2024 +0800

target: add imx8mp and evk board support

Have verified with JLink:
openocd -f interface/jlink.cfg -f board/nxp_imx8mp-evk.cfg
-c "gdb_breakpoint_override hard"

Change-Id: I74f8766b8c5334ca5758c2672c283ff2405de4c3
Signed-off-by: Jiafei Pan 

diff --git a/tcl/board/nxp_imx8mp-evk.cfg b/tcl/board/nxp_imx8mp-evk.cfg
new file mode 100644
index 00..1eafb9730d
--- /dev/null
+++ b/tcl/board/nxp_imx8mp-evk.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# configuration file for NXP IMX8M Plus EVK
+#
+
+# only JTAG supported
+transport select jtag
+
+# set a safe JTAG clock speed, can be overridden
+adapter speed 1000
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 70
+
+
+# board has an i.MX8MP with 4 Cortex-A55 cores
+set CHIPNAME imx8mp
+set CHIPCORES 4
+
+# source SoC configuration
+source [find target/imx8mp.cfg]
diff --git a/tcl/target/imx8mp.cfg b/tcl/target/imx8mp.cfg
new file mode 100644
index 00..f259c20bce
--- /dev/null
+++ b/tcl/target/imx8mp.cfg
@@ -0,0 +1,53 @@
+#
+# configuration file for NXP i.MX8M Plus SoCs
+#
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
+   set  _CHIPNAME imx8m
+}
+
+if { [info exists CHIPCORES] } {
+set _cores $CHIPCORES
+} else {
+set _cores 1
+}
+
+# CoreSight Debug Access Port
+if { [info exists DAP_TAPID] } {
+set _DAP_TAPID $DAP_TAPID
+} else {
+set _DAP_TAPID 0x5ba00477
+}
+
+# the DAP tap
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
+-expected-id $_DAP_TAPID
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.a53
+set _CTINAME $_CHIPNAME.cti
+
+set DBGBASE {0x8041 0x8051 0x8061 0x8071}
+set CTIBASE {0x8042 0x8052 0x8062 0x8072}
+
+for { set _core 0 } { $_core < $_cores } { incr _core } {
+
+cti create $_CTINAME.$_core -dap $_CHIPNAME.dap -ap-num 1 \
+-baseaddr [lindex $CTIBASE $_core]
+
+set _command "target create $_TARGETNAME.$_core aarch64 -dap 
$_CHIPNAME.dap \
+-dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core"
+
+eval $_command
+}
+
+# declare the auxiliary Cortex-M7 core on AP #4
+target create ${_CHIPNAME}.m7 cortex_m -dap ${_CHIPNAME}.dap -ap-num 4
+
+# AHB-AP for direct access to soc bus
+target create ${_CHIPNAME}.ahb mem_ap -dap ${_CHIPNAME}.dap -ap-num 0
+
+# default target is A53 core 0
+targets $_TARGETNAME.0

-- 

[PATCH]: 13299c895b server/tcl: Restructure commands

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8344

-- gerrit

commit 13299c895bf5dea1594fc3ddc0062ce9abcba723
Author: Marc Schink 
Date:   Mon Jun 17 09:12:34 2024 +0200

server/tcl: Restructure commands

Use a command group 'tcl' with subcommands instead of individual
commands with 'tcl_' prefix.

The old commands are still available to ensure backwards compatibility,
but are marked as deprecated.

Change-Id: I1efd8a0e2c1403833f8cb656510a54d5ab0b2740
Signed-off-by: Marc Schink 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 306784e512..bae0b79e4a 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2219,7 +2219,7 @@ gdb (with 'set remotetimeout') is recommended. An 
insufficient timeout may
 cause initialization to fail with "Unknown remote qXfer reply: OK".
 @end deffn
 
-@deffn {Config Command} {tcl_port} [number]
+@deffn {Config Command} {tcl port} [number]
 Specify or query the port used for a simplified RPC
 connection that can be used by clients to issue TCL commands and get the
 output from the Tcl engine.
@@ -10559,7 +10559,7 @@ the destination of the trace data:
 @item @option{external} -- configure TPIU/SWO to let user capture trace
 output externally, either with an additional UART or with a logic analyzer 
(default);
 @item @option{-} -- configure TPIU/SWO and debug adapter to gather trace data
-and forward it to @command{tcl_trace} command;
+and forward it to @command{tcl trace} command;
 @item @option{:}@var{port} -- configure TPIU/SWO and debug adapter to gather
 trace data, open a TCP server at port @var{port} and send the trace data to
 each connected client;
@@ -12747,7 +12747,7 @@ OpenOCD provides a simple RPC server that allows to run 
arbitrary Tcl
 commands and receive the results.
 
 To access it, your application needs to connect to a configured TCP port
-(see @command{tcl_port}). Then it can pass any string to the
+(see @command{tcl port}). Then it can pass any string to the
 interpreter terminating it with @code{0x1a} and wait for the return
 value (it will be terminated with @code{0x1a} as well). This can be
 repeated as many times as desired without reopening the connection.
@@ -12773,7 +12773,7 @@ type target_state state [state-name]
 type target_reset mode [reset-mode]
 @end verbatim
 
-@deffn {Command} {tcl_notifications} [on/off]
+@deffn {Command} {tcl notifications} [on/off]
 Toggle output of target notifications to the current Tcl RPC server.
 Only available from the Tcl RPC server.
 Defaults to off.
@@ -12792,7 +12792,7 @@ Target trace data is emitted as a Tcl associative array 
in the following format.
 type target_trace data [trace-data-hex-encoded]
 @end verbatim
 
-@deffn {Command} {tcl_trace} [on/off]
+@deffn {Command} {tcl trace} [on/off]
 Toggle output of target trace data to the current Tcl RPC server.
 Only available from the Tcl RPC server.
 Defaults to off.
diff --git a/src/server/startup.tcl b/src/server/startup.tcl
index 93f718927d..ebfb0562e9 100644
--- a/src/server/startup.tcl
+++ b/src/server/startup.tcl
@@ -95,3 +95,21 @@ proc "gdb_save_tdesc" {} {
echo "DEPRECATED! use 'gdb save_tdesc', not 'gdb_save_tdesc'"
eval gdb save_tdesc
 }
+
+lappend _telnet_autocomplete_skip "tcl_port"
+proc "tcl_port" {args} {
+   echo "DEPRECATED! use 'tcl port' not 'tcl_port'"
+   eval tcl port $args
+}
+
+lappend _telnet_autocomplete_skip "tcl_notifications"
+proc "tcl_notifications" {state} {
+   echo "DEPRECATED! use 'tcl notifications' not 'tcl_notifications'"
+   eval tcl notifications $state
+}
+
+lappend _telnet_autocomplete_skip "tcl_trace"
+proc "tcl_trace" {state} {
+   echo "DEPRECATED! use 'tcl trace' not 'tcl_trace'"
+   eval tcl trace $state
+}
diff --git a/src/server/tcl_server.c b/src/server/tcl_server.c
index 16cbedc76c..aec39ff819 100644
--- a/src/server/tcl_server.c
+++ b/src/server/tcl_server.c
@@ -323,9 +323,9 @@ COMMAND_HANDLER(handle_tcl_trace_command)
}
 }
 
-static const struct command_registration tcl_command_handlers[] = {
+static const struct command_registration tcl_subcommand_handlers[] = {
{
-   .name = "tcl_port",
+   .name = "port",
.handler = handle_tcl_port_command,
.mode = COMMAND_CONFIG,
.help = "Specify port on which to listen "
@@ -334,14 +334,14 @@ static const struct command_registration 
tcl_command_handlers[] = {
.usage = "[port_num]",
},
{
-   .name = "tcl_notifications",
+   .name = "notifications",
.handler = handle_tcl_notifications_command,
.mode = COM

[PATCH]: 4933636c6e tcl: Replace 'tcl_' prefix with 'tcl' command group

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8345

-- gerrit

commit 4933636c6ecc43d9df75408de6c824281b9aa1eb
Author: Marc Schink 
Date:   Mon Jun 17 16:39:10 2024 +0200

tcl: Replace 'tcl_' prefix with 'tcl' command group

Change-Id: Iee1e84a87d07172aa6b0adfb7b85fb465cefb979
Signed-off-by: Marc Schink 

diff --git a/tcl/interface/vdebug.cfg b/tcl/interface/vdebug.cfg
index 116ac8a758..9097c33dac 100644
--- a/tcl/interface/vdebug.cfg
+++ b/tcl/interface/vdebug.cfg
@@ -24,7 +24,7 @@ vdebug server $_VDEBUGHOST:$_VDEBUGPORT
 bindto 0.0.0.0
 #gdb port 
 #telnet_port disabled
-tcl_port disabled
+tcl port disabled
 
 # transaction batching: 0 - no batching, 1 - (default) wr, 2 - rw
 vdebug batching 1
diff --git a/tcl/target/u8500.cfg b/tcl/target/u8500.cfg
index 932ef8c20d..b87d2613a8 100644
--- a/tcl/target/u8500.cfg
+++ b/tcl/target/u8500.cfg
@@ -142,7 +142,7 @@ proc enable_apetap {} {
}
}
 
-tcl_port 
+tcl port 
 telnet_port 
 gdb port 
 

-- 

[PATCH]: f9e5584fb3 rtt: Add support for multiple RTT control block instances

[gerrit]

This is an automated email from Gerrit.

"Grant Ramsay " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8343

-- gerrit

commit f9e5584fb3fc93e47542f83bafb71ec08e7e8175
Author: Grant Ramsay 
Date:   Sun Jun 16 20:27:11 2024 +1200

rtt: Add support for multiple RTT control block instances

This is useful when a device has multiple RTT control blocks, probably on
multiple AMP cores. A new command "rtt select_instance "
allows creating/selecting the RTT instance to be used by other RTT
commands.

Change-Id: If02ebb2ca7075198a32bec6acae35840147ec86b
Signed-off-by: Grant Ramsay 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index e46e6004bc..c9cfcdde85 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -9482,10 +9482,6 @@ This interface is especially of interest for targets 
without
 Serial Wire Output (SWO), such as ARM Cortex-M0, or where semihosting is not
 applicable because of real-time constraints.
 
-@quotation Note
-The current implementation supports only single target devices.
-@end quotation
-
 The data transfer between host and target device is organized through
 unidirectional up/down-channels for target-to-host and host-to-target
 communication, respectively.
@@ -9541,6 +9537,14 @@ Start a TCP server on @var{port} for the channel 
@var{channel}. When
 Stop the TCP sever with port @var{port}.
 @end deffn
 
+@deffn {Command} {rtt select_instance} instance_id
+Select the active RTT instance (not to be confused with RTT channels).
+@var{instance_id} is an integer handle to the active RTT instance.
+Other RTT commands will use the currently selected RTT instance.
+This is useful when a device has multiple RTT control blocks, probably
+on multiple AMP cores. The initial selected instance is 0.
+@end deffn
+
 The following example shows how to setup RTT using the SEGGER RTT 
implementation
 on the target device.
 
@@ -9557,6 +9561,18 @@ In this example, OpenOCD searches the control block with 
the ID "SEGGER RTT"
 starting at 0x2000 for 2048 bytes. The RTT channel 0 is exposed through the
 TCP/IP port 9090.
 
+The following example adds a second RTT instance, seaching for another control
+block at 0x2100 for 2048 bytes. This instances RTT channel 0 is exposed
+through the TCP/IP port 9091.
+
+@example
+rtt select_instance 1
+
+rtt setup 0x2100 2048 "SEGGER RTT1"
+rtt start
+
+rtt server start 9091 0
+@end example
 
 @section Misc Commands
 
diff --git a/src/rtt/rtt.c b/src/rtt/rtt.c
index e31e75410d..dd3bd9b313 100644
--- a/src/rtt/rtt.c
+++ b/src/rtt/rtt.c
@@ -2,6 +2,7 @@
 
 /*
  * Copyright (C) 2016-2020 by Marc Schink 
+ * Copyright (C) 2024 Grant Ramsay 
  */
 
 #ifdef HAVE_CONFIG_H
@@ -19,7 +20,7 @@
 
 #include "rtt.h"
 
-static struct {
+struct rtt {
struct rtt_source source;
/** Control block. */
struct rtt_control ctrl;
@@ -43,49 +44,116 @@ static struct {
size_t sink_list_length;
 
unsigned int polling_interval;
-} rtt;
 
-int rtt_init(void)
+   unsigned int instance_id;
+   struct list_head lh;
+};
+
+/** A list of all created RTT instances (used for cleanup). */
+static LIST_HEAD(rtt_list);
+
+/** The currently selected RTT instance. */
+static struct rtt *selected_instance;
+
+static struct rtt *rtt_new(int instance_id)
 {
-   rtt.sink_list_length = 1;
-   rtt.sink_list = calloc(rtt.sink_list_length,
+   struct rtt *rtt = calloc(1, sizeof(*rtt));
+   if (!rtt)
+   return NULL;
+
+   rtt->sink_list_length = 1;
+   rtt->sink_list = calloc(rtt->sink_list_length,
sizeof(struct rtt_sink_list *));
 
-   if (!rtt.sink_list)
-   return ERROR_FAIL;
+   if (!rtt->sink_list)
+   return NULL;
 
-   rtt.sink_list[0] = NULL;
-   rtt.started = false;
+   rtt->sink_list[0] = NULL;
+   rtt->started = false;
 
-   rtt.polling_interval = 100;
+   rtt->polling_interval = 100;
 
-   return ERROR_OK;
+   rtt->instance_id = instance_id;
+   list_add_tail(>lh, _list);
+
+   return rtt;
+}
+
+static void rtt_free(struct rtt *rtt)
+{
+   list_del(>lh);
+   free(rtt->sink_list);
+   free(rtt);
+}
+
+static struct rtt *rtt_instance_by_id(unsigned int instance_id)
+{
+   struct rtt *rtt;
+
+   list_for_each_entry(rtt, _list, lh) {
+   if (rtt->instance_id == instance_id)
+   return rtt;
+   }
+
+   return NULL;
+}
+
+int rtt_init(void)
+{
+   /* Create and select instance 0 */
+   return rtt_select_instance(0);
 }
 
 int rtt_exit(void)
 {
-   free(rtt.sink_list);
+   struct rtt *rtt, *tmp;
+
+   list_for_each_entry_safe(rtt, tmp, _list, lh) {
+   rtt_free(rtt);
+   }
 
return ERROR_OK;
 }
 
+int rtt_select_instance(unsigned int instance_id)
+{
+  

[PATCH]: 11acc318c1 target/riscv: Check before executing abstract command

[gerrit]

This is an automated email from Gerrit.

"Viraaj Somayajula " just uploaded a new 
patch set to Gerrit, which you can find at 
https://review.openocd.org/c/openocd/+/8342

-- gerrit

commit 11acc318c19a3e06197348b24feef62a96561033
Author: Viraaj Somayajula 
Date:   Sat Jun 15 22:28:27 2024 -0400

target/riscv: Check before executing abstract command

From the riscv debug spec - 0.13.2:
"Before starting an abstract command, a debugger must ensure that
haltreq, resumereq, and ackhavereset are all 0"

Also, when executing ndmreset, there is a chance that the hardware
does not accept ndmreset if ndmactive is 0. When writing ndmactive
and ndmreset together, the hardware may not accept the ndmreset.
To be safe, first set ndmactive to 1 and then assert ndmreset.

Change-Id: I7dc0fbc318c35e554a29095aac69a0e81192e54b
Signed-off-by: Viraaj Somayajula 

diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 2f4a8fe2e6..27fec7e570 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -789,6 +789,23 @@ static int execute_abstract_command(struct target *target, 
uint32_t command)
break;
}
}
+   /* 
+* Before starting an abstract command, a debugger must ensure that 
haltreq, resumereq, and
+* ackhavereset are all 0
+*/
+
+   uint32_t dmcontrol = 0;
+
+   if (dmi_read(target, , DM_DMCONTROL) != ERROR_OK)
+   return ERROR_FAIL;
+
+   if (dmcontrol & (DM_DMCONTROL_HALTREQ | DM_DMCONTROL_RESUMEREQ | 
DM_DMCONTROL_ACKHAVERESET)
+   != 0x0) {
+   dmcontrol = set_field(dmcontrol, DM_DMCONTROL_HALTREQ | 
DM_DMCONTROL_RESUMEREQ
+   | DM_DMCONTROL_ACKHAVERESET, 0);
+   dmi_write(target, DM_DMCONTROL, dmcontrol);
+   }
+
 
if (dmi_write_exec(target, DM_COMMAND, command, false) != ERROR_OK)
return ERROR_FAIL;
@@ -2368,6 +2385,9 @@ static int assert_reset(struct target *target)
uint32_t control = set_hartsel(control_base, r->current_hartid);
control = set_field(control, DM_DMCONTROL_HALTREQ,
target->reset_halt ? 1 : 0);
+   dmi_write(target, DM_DMCONTROL, control);
+
+   /* Assert ndmreset */
control = set_field(control, DM_DMCONTROL_NDMRESET, 1);
dmi_write(target, DM_DMCONTROL, control);
}

-- 

[PATCH]: b8f622666f Remove other '_s' suffix from structs

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8341

-- gerrit

commit b8f622666fc2c6b22047b03ed58a21883f193920
Author: Antonio Borneo 
Date:   Sat Jun 15 17:57:25 2024 +0200

Remove other '_s' suffix from structs

Most of the work is already done by [1].
Remove few more '_s' suffix and also fix some comment referring to
the old name of the struct.

Link: https://review.openocd.org/c/openocd/+/8340
Change-Id: Ifddc401c3b05e62ece3aa7926af1e78f0c4a671e
Signed-off-by: Antonio Borneo 

diff --git a/src/flash/nor/core.h b/src/flash/nor/core.h
index 80911f799c..ff175a1329 100644
--- a/src/flash/nor/core.h
+++ b/src/flash/nor/core.h
@@ -32,18 +32,18 @@ struct flash_sector {
uint32_t size;
/**
 * Indication of erasure status: 0 = not erased, 1 = erased,
-* other = unknown.  Set by @c flash_driver_s::erase_check only.
+* other = unknown.  Set by @c flash_driver::erase_check only.
 *
 * This information must be considered stale immediately.
-* Don't set it in flash_driver_s::erase or a device mass_erase
-* Don't clear it in flash_driver_s::write
+* Don't set it in flash_driver::erase or a device mass_erase
+* Don't clear it in flash_driver::write
 * The flag is not used in a protection block
 */
int is_erased;
/**
 * Indication of protection status: 0 = unprotected/unlocked,
 * 1 = protected/locked, other = unknown.  Set by
-* @c flash_driver_s::protect_check.
+* @c flash_driver::protect_check.
 *
 * This information must be considered stale immediately.
 * A million things could make it stale: power cycle,
@@ -67,7 +67,7 @@ struct flash_sector {
  * a major interface.
  *
  * This structure will be passed as a parameter to the callbacks in the
- * flash_driver_s structure, some of which may modify the contents of
+ * flash_driver structure, some of which may modify the contents of
  * this structure of the area of flash that it defines.  Driver writers
  * may use the @c driver_priv member to store additional data on a
  * per-bank basis, if required.
diff --git a/src/flash/nor/driver.h b/src/flash/nor/driver.h
index 7d6f8c5cc4..211661e214 100644
--- a/src/flash/nor/driver.h
+++ b/src/flash/nor/driver.h
@@ -29,7 +29,7 @@ struct flash_bank;
  * flash bank DRIVERNAME ...parameters...
  * @endcode
  *
- * OpenOCD will search for the driver with a @c flash_driver_s::name
+ * OpenOCD will search for the driver with a @c flash_driver::name
  * that matches @c DRIVERNAME.
  *
  * The flash subsystem calls some of the other drivers routines a using
@@ -170,7 +170,7 @@ struct flash_driver {
/**
 * Check the erasure status of a flash bank.
 * When called, the driver routine must perform the required
-* checks and then set the @c flash_sector_s::is_erased field
+* checks and then set the @c flash_sector::is_erased field
 * for each of the flash banks's sectors.
 *
 * @param bank The bank to check
@@ -182,7 +182,7 @@ struct flash_driver {
 * Determine if the specific bank is "protected" or not.
 * When called, the driver routine must must perform the
 * required protection check(s) and then set the @c
-* flash_sector_s::is_protected field for each of the flash
+* flash_sector::is_protected field for each of the flash
 * bank's sectors.
 *
 * If protection is not implemented, set method to NULL
@@ -204,7 +204,7 @@ struct flash_driver {
int (*info)(struct flash_bank *bank, struct command_invocation *cmd);
 
/**
-* A more gentle flavor of flash_driver_s::probe, performing
+* A more gentle flavor of flash_driver::probe, performing
 * setup with less noise.  Generally, driver routines should test
 * to see if the bank has already been probed; if it has, the
 * driver probably should not perform its probe a second time.
diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c
index 0f3937cfc2..982c9610a4 100644
--- a/src/flash/nor/pic32mx.c
+++ b/src/flash/nor/pic32mx.c
@@ -92,7 +92,7 @@ struct pic32mx_flash_bank {
  * DEVID values as per PIC32MX Flash Programming Specification Rev N
  */
 
-static const struct pic32mx_devs_s {
+static const struct pic32mx_devs {
uint32_t devid;
const char *name;
 } pic32mx_devs[] = {
diff --git a/src/jtag/commands.h b/src/jtag/commands.h
index a1096daa77..825907733f 100644
--- a/src/jtag/commands.h
+++ b/src/jtag/commands.h
@@ -15,7 +15,7 @@
 #define OPENOCD_JTAG_COMMANDS_H
 
 /**
- * The inferred type of a scan_command_s structure, indicating whether
+ * The inferred type of a scan_command structure, indicating whether
  * the command has the host sca

[PATCH]: 607c45132d Remove '_s' suffix from structs

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8340

-- gerrit

commit 607c45132deacf7b7b60e076a5be42e0cf408318
Author: Marc Schink 
Date:   Fri Jun 14 18:12:03 2024 +0200

Remove '_s' suffix from structs

Change-Id: I956acce316e60252b317daa41274403d87f704b8
Signed-off-by: Marc Schink 

diff --git a/src/jtag/drivers/nulink_usb.c b/src/jtag/drivers/nulink_usb.c
index 4fdb857827..66cf25a6d1 100644
--- a/src/jtag/drivers/nulink_usb.c
+++ b/src/jtag/drivers/nulink_usb.c
@@ -34,7 +34,7 @@
 #define NULINK2_USB_PID1  (0x5200)
 #define NULINK2_USB_PID2  (0x5201)
 
-struct nulink_usb_handle_s {
+struct nulink_usb_handle {
hid_device *dev_handle;
uint16_t max_packet_size;
uint8_t usbcmdidx;
@@ -87,7 +87,7 @@ enum nulink_connect {
 
 static int nulink_usb_xfer_rw(void *handle, uint8_t *buf)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
assert(handle);
 
@@ -107,7 +107,7 @@ static int nulink_usb_xfer_rw(void *handle, uint8_t *buf)
 
 static int nulink1_usb_xfer(void *handle, uint8_t *buf, int size)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
assert(handle);
 
@@ -120,7 +120,7 @@ static int nulink1_usb_xfer(void *handle, uint8_t *buf, int 
size)
 
 static int nulink2_usb_xfer(void *handle, uint8_t *buf, int size)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
assert(handle);
 
@@ -133,7 +133,7 @@ static int nulink2_usb_xfer(void *handle, uint8_t *buf, int 
size)
 
 static void nulink1_usb_init_buffer(void *handle, uint32_t size)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
h->cmdidx = 0;
 
@@ -149,7 +149,7 @@ static void nulink1_usb_init_buffer(void *handle, uint32_t 
size)
 
 static void nulink2_usb_init_buffer(void *handle, uint32_t size)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
h->cmdidx = 0;
 
@@ -165,7 +165,7 @@ static void nulink2_usb_init_buffer(void *handle, uint32_t 
size)
 
 static inline int nulink_usb_xfer(void *handle, uint8_t *buf, int size)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
assert(handle);
 
@@ -174,7 +174,7 @@ static inline int nulink_usb_xfer(void *handle, uint8_t 
*buf, int size)
 
 static inline void nulink_usb_init_buffer(void *handle, uint32_t size)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
assert(handle);
 
@@ -183,7 +183,7 @@ static inline void nulink_usb_init_buffer(void *handle, 
uint32_t size)
 
 static int nulink_usb_version(void *handle)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
LOG_DEBUG("nulink_usb_version");
 
@@ -219,7 +219,7 @@ static int nulink_usb_version(void *handle)
 
 static int nulink_usb_idcode(void *handle, uint32_t *idcode)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
LOG_DEBUG("nulink_usb_idcode");
 
@@ -243,7 +243,7 @@ static int nulink_usb_idcode(void *handle, uint32_t *idcode)
 
 static int nulink_usb_write_debug_reg(void *handle, uint32_t addr, uint32_t 
val)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
LOG_DEBUG("nulink_usb_write_debug_reg 0x%08" PRIX32 " 0x%08" PRIX32, 
addr, val);
 
@@ -278,7 +278,7 @@ static int nulink_usb_write_debug_reg(void *handle, 
uint32_t addr, uint32_t val)
 
 static enum target_state nulink_usb_state(void *handle)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
assert(handle);
 
@@ -299,7 +299,7 @@ static enum target_state nulink_usb_state(void *handle)
 
 static int nulink_usb_assert_srst(void *handle, int srst)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
LOG_DEBUG("nulink_usb_assert_srst");
 
@@ -324,7 +324,7 @@ static int nulink_usb_assert_srst(void *handle, int srst)
 
 static int nulink_usb_reset(void *handle)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
LOG_DEBUG("nulink_usb_reset");
 
@@ -349,7 +349,7 @@ static int nulink_usb_reset(void *handle)
 
 static int nulink_usb_run(void *handle)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nulink_usb_handle *h = handle;
 
LOG_DEBUG("nulink_usb_run");
 
@@ -365,7 +365,7 @@ static int nulink_usb_run(void *handle)
 
 static int nulink_usb_halt(void *handle)
 {
-   struct nulink_usb_handle_s *h = handle;
+   struct nul

[PATCH]: 98004abce0 drivers: jtag_vpi: separate "host" and "wire" data structures + cleanup

[gerrit]

This is an automated email from Gerrit.

"Jan Matyas " just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8339

-- gerrit

commit 98004abce0b98abd3a64e03332d8d96225b76f22
Author: Jan Matyas 
Date:   Fri Jun 14 16:52:19 2024 +0200

drivers: jtag_vpi: separate "host" and "wire" data structures + cleanup

In jtag_vpi, use different data structures for the actual
(logical) exchanged information and their physical encoding
while being transmitted in binary packets.

Clearly document the meaning of the packet fields.

While there, clean up the overal code of the jtag_vpi driver
(data types, prints, assertions etc.).

Change-Id: I577966d671a0238524d1ee9cfeecc2489355ae76
Signed-off-by: Jan Matyas 

diff --git a/src/jtag/drivers/jtag_vpi.c b/src/jtag/drivers/jtag_vpi.c
index 9dec0d19df..52cf1bdf9f 100644
--- a/src/jtag/drivers/jtag_vpi.c
+++ b/src/jtag/drivers/jtag_vpi.c
@@ -31,12 +31,14 @@
 #define DEFAULT_SERVER_PORT
 
 #defineXFERT_MAX_SIZE  512
+#define XFERT_MAX_BITS  (XFERT_MAX_SIZE * 8)
+#define VPI_CMD_BUF_SIZE   (4 + XFERT_MAX_SIZE + XFERT_MAX_SIZE + 4 + 4)
 
-#define CMD_RESET  0
-#define CMD_TMS_SEQ1
-#define CMD_SCAN_CHAIN 2
-#define CMD_SCAN_CHAIN_FLIP_TMS3
-#define CMD_STOP_SIMU  4
+#define CMD_RESET  0u
+#define CMD_TMS_SEQ1u
+#define CMD_SCAN_CHAIN 2u
+#define CMD_SCAN_CHAIN_FLIP_TMS3u
+#define CMD_STOP_SIMU  4u
 
 /* jtag_vpi server port and address to connect to */
 static int server_port = DEFAULT_SERVER_PORT;
@@ -48,25 +50,78 @@ static bool stop_sim_on_exit;
 static int sockfd;
 static struct sockaddr_in serv_addr;
 
-/* One jtag_vpi "packet" as sent over a TCP channel. */
-struct vpi_cmd {
-   union {
-   uint32_t cmd;
-   unsigned char cmd_buf[4];
-   };
+/*
+ * One jtag_vpi "packet" in its "wire" format - as sent over a TCP channel.
+ *
+ * Jtag_vpi protocol uses fixed-length and fixed-structure packets
+ * for all command types, and for both commands (CLI -> SRV)
+ * and responses (SRV -> CLI).
+ *
+ * For that reason, some packet fields are "don't care" depending
+ * on the command type and whether it is request or response.
+ */
+struct jtag_vpi_packet {
+   /* CLI -> SRV: Command type (CMD_*). Transmitted in little endian.
+*
+* SRV -> CLI: Don't care.
+*/
+   uint8_t cmd_type[4];
+
+   /* CLI -> SRV: CMD_TMS_SEQ: TMS bit stream.
+ * CMD_SCAN_CHAIN
+* or CMD_SCAN_CHAIN_FLIP_TMS: TDO bit stream.
+* Other commands: Don't care.
+ *
+* SRV -> CLI: Don't care.
+*/
+   uint8_t buffer_out[XFERT_MAX_SIZE];
+
+   /* CLI -> SRV: Don't care.
+ *
+* SRV -> CLI: TDI bit stream in responses to CMD_SCAN_CHAIN
+* or CMD_SCAN_CHAIN_FLIP_TMS.
+*/
+   uint8_t buffer_in[XFERT_MAX_SIZE];
+
+   /* CLI -> SRV: CMD_TMS_SEQ or CMD_SCAN_CHAIN or CMD_SCAN_CHAIN_FLIP_TMS:
+* DIV_ROUND_UP(nb_bits, 8)
+* Note this is redundant information w.r.t. nb_bits.
+* Transmitted in little endian.
+*
+* SRV -> CLI: Don't care.
+*/
+   uint8_t length[4];
+
+   /* CLI -> SRV: CMD_TMS_SEQ or CMD_SCAN_CHAIN or CMD_SCAN_CHAIN_FLIP_TMS:
+* Number of bits stored in buffer_out.
+* Transmitted in little endian.
+*
+* SRV -> CLI: Don't care. Reason: The effective nb_bits is always equal
+* to the nb_bits transmitted in the payload.
+*/
+   uint8_t nb_bits[4];
+};
+
+/**
+ * Data for one jtag_vpi command to be sent
+ */
+struct jtag_vpi_cmd {
+   uint32_t cmd_type;
unsigned char buffer_out[XFERT_MAX_SIZE];
+   uint32_t nb_bits;
+};
+
+/**
+ * Data from one received jtag_vpi response
+ */
+struct jtag_vpi_resp {
+   /* In the response, only the data payload is relevant:
+* Nb_bits is always equal to the command payload and
+* the rest is irrelevant. */
unsigned char buffer_in[XFERT_MAX_SIZE];
-   union {
-   uint32_t length;
-   unsigned char length_buf[4];
-   };
-   union {
-   uint32_t nb_bits;
-   unsigned char nb_bits_buf[4];
-   };
 };
 
-static char *jtag_vpi_cmd_to_str(int cmd_num)
+static char *jtag_vpi_cmd_to_str(unsigned int cmd_num)
 {
switch (cmd_num) {
case CMD_RESET:
@@ -84,49 +139,71 @@ static char *jtag_vpi_cmd_to_str(int cmd_num)
}
 }
 
-static int jtag_vpi_send_cmd(struct vpi_cmd *vpi)
+/* Only certain commands can carry the payload (TMS/TDO bitstream). */
+static bool can_carr

[PATCH]: bf99ba1f73 tcl: Replace 'hla_' prefix with 'hla' command group

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8338

-- gerrit

commit bf99ba1f73fa73e2b24abdc6985d974752e3a2c0
Author: Marc Schink 
Date:   Fri Jun 14 16:37:39 2024 +0200

tcl: Replace 'hla_' prefix with 'hla' command group

Change-Id: I99ec2dc7f300352d091cf9eb807a690901c33307
Signed-off-by: Marc Schink 

diff --git a/tcl/interface/nulink.cfg b/tcl/interface/nulink.cfg
index 2a4bc0b93b..48dc20e241 100644
--- a/tcl/interface/nulink.cfg
+++ b/tcl/interface/nulink.cfg
@@ -5,9 +5,9 @@
 #
 
 adapter driver hla
-hla_layout nulink
-hla_device_desc "Nu-Link"
-hla_vid_pid 0x0416 0x511b 0x0416 0x511c 0x0416 0x511d 0x0416 0x5200 0x0416 
0x5201
+hla layout nulink
+hla device_desc "Nu-Link"
+hla vid_pid 0x0416 0x511b 0x0416 0x511c 0x0416 0x511d 0x0416 0x5200 0x0416 
0x5201
 
 # Only swd is supported
 transport select hla_swd
diff --git a/tcl/interface/stlink.cfg b/tcl/interface/stlink.cfg
index 8578bf2199..9b7f1f9ebf 100644
--- a/tcl/interface/stlink.cfg
+++ b/tcl/interface/stlink.cfg
@@ -6,9 +6,9 @@
 #
 
 adapter driver hla
-hla_layout stlink
-hla_device_desc "ST-LINK"
-hla_vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 
0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754 0x0483 0x3755 
0x0483 0x3757
+hla layout stlink
+hla device_desc "ST-LINK"
+hla vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 
0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754 0x0483 0x3755 
0x0483 0x3757
 
 # Optionally specify the serial number of ST-LINK/V2 usb device.  ST-LINK/V2
 # devices seem to have serial numbers with unreadable characters.  ST-LINK/V2
diff --git a/tcl/interface/ti-icdi.cfg b/tcl/interface/ti-icdi.cfg
index db4e1e0a04..c13d27e8b1 100644
--- a/tcl/interface/ti-icdi.cfg
+++ b/tcl/interface/ti-icdi.cfg
@@ -10,8 +10,8 @@
 #
 
 adapter driver hla
-hla_layout ti-icdi
-hla_vid_pid 0x1cbe 0x00fd
+hla layout ti-icdi
+hla vid_pid 0x1cbe 0x00fd
 
 # Optionally specify the serial number of TI-ICDI devices, for when using
 # multiple devices. Serial numbers can be obtained using lsusb -v

-- 

[PATCH]: a5a998ef88 tcl: Replace 'gdb_' prefix with 'gdb' command group

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8337

-- gerrit

commit a5a998ef88f3b846c5c5f84f90428dc85f02bc3f
Author: Marc Schink 
Date:   Fri Jun 14 16:28:38 2024 +0200

tcl: Replace 'gdb_' prefix with 'gdb' command group

Change-Id: I0490b4c112c1a922bf77a4b37df2a630a8f6cea1
Signed-off-by: Marc Schink 

diff --git a/tcl/board/actux3.cfg b/tcl/board/actux3.cfg
index edb529c889..7c2ce06773 100644
--- a/tcl/board/actux3.cfg
+++ b/tcl/board/actux3.cfg
@@ -50,7 +50,7 @@ reset init
 
 # setup to debug u-boot in flash
 proc uboot_debug {} {
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
 xscale vector_catch 0xFF
 
 xscale vector_table low  1 0xe59ff018
diff --git a/tcl/board/mini2440.cfg b/tcl/board/mini2440.cfg
index 85d9a35b9a..5642cb1ab8 100644
--- a/tcl/board/mini2440.cfg
+++ b/tcl/board/mini2440.cfg
@@ -128,7 +128,7 @@ reset_config trst_and_srst
 # GDB Setup
 #-
 
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
 
 #
 # ARM SPECIFIC
diff --git a/tcl/board/mini6410.cfg b/tcl/board/mini6410.cfg
index 18f9e8d25a..276e7180ea 100644
--- a/tcl/board/mini6410.cfg
+++ b/tcl/board/mini6410.cfg
@@ -95,7 +95,7 @@ adapter srst delay 100
 jtag_ntrst_delay 100
 reset_config trst_and_srst
 
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
 
 targets
 nand device $_CHIPNAME.flash s3c6400 $_CHIPNAME.cpu
diff --git a/tcl/board/or1k_generic.cfg b/tcl/board/or1k_generic.cfg
index 915a0de249..b6cf3a0978 100644
--- a/tcl/board/or1k_generic.cfg
+++ b/tcl/board/or1k_generic.cfg
@@ -22,7 +22,7 @@ poll_period 1
 adapter speed 3000
 
 # Enable the target description feature
-gdb_target_description enable
+gdb target_description enable
 
 # Add a new register in the cpu register list. This register will be
 # included in the generated target descriptor file.
diff --git a/tcl/interface/vdebug.cfg b/tcl/interface/vdebug.cfg
index 7350bb9a91..116ac8a758 100644
--- a/tcl/interface/vdebug.cfg
+++ b/tcl/interface/vdebug.cfg
@@ -22,7 +22,7 @@ vdebug server $_VDEBUGHOST:$_VDEBUGPORT
 
 # example config listen on all interfaces, disable tcl/telnet server
 bindto 0.0.0.0
-#gdb_port 
+#gdb port 
 #telnet_port disabled
 tcl_port disabled
 
diff --git a/tcl/target/esi32xx.cfg b/tcl/target/esi32xx.cfg
index a8b0823dac..d29c636cfa 100644
--- a/tcl/target/esi32xx.cfg
+++ b/tcl/target/esi32xx.cfg
@@ -35,4 +35,4 @@ reset_config none
 # The default linker scripts provided by the eSi-RISC toolchain do not
 # specify attributes on memory regions, which results in incorrect
 # application of software breakpoints by GDB.
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
diff --git a/tcl/target/esp_common.cfg b/tcl/target/esp_common.cfg
index ac8cd6a198..e9a188f9f6 100644
--- a/tcl/target/esp_common.cfg
+++ b/tcl/target/esp_common.cfg
@@ -181,7 +181,7 @@ proc configure_esp_xtensa_default_settings { } {
$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
}
 
-   gdb_breakpoint_override hard
+   gdb breakpoint_override hard
 
if { [info exists _FLASH_VOLTAGE] } {
$_TARGETNAME_0 $_CHIPNAME flashbootstrap $_FLASH_VOLTAGE
diff --git a/tcl/target/omap4430.cfg b/tcl/target/omap4430.cfg
index a448550f67..4bc7fe1bf7 100644
--- a/tcl/target/omap4430.cfg
+++ b/tcl/target/omap4430.cfg
@@ -128,4 +128,4 @@ $_CHIPNAME.m30 configure -event reset-assert { }
 $_CHIPNAME.m31 configure -event reset-assert { }
 
 # Soft breakpoints don't currently work due to broken cache handling
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
diff --git a/tcl/target/omap4460.cfg b/tcl/target/omap4460.cfg
index bbc824b2af..85ba96c51f 100644
--- a/tcl/target/omap4460.cfg
+++ b/tcl/target/omap4460.cfg
@@ -128,4 +128,4 @@ $_CHIPNAME.m30 configure -event reset-assert { }
 $_CHIPNAME.m31 configure -event reset-assert { }
 
 # Soft breakpoints don't currently work due to broken cache handling
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
diff --git a/tcl/target/omapl138.cfg b/tcl/target/omapl138.cfg
index 2d670b98a3..78c456d5c0 100644
--- a/tcl/target/omapl138.cfg
+++ b/tcl/target/omapl138.cfg
@@ -64,5 +64,5 @@ arm7_9 dcc_downloads enable
 etm config $_TARGETNAME 16 normal full etb
 etb config $_TARGETNAME $_CHIPNAME.etb
 
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
 arm7_9 dbgrq enable
diff --git a/tcl/target/rp2040.cfg b/tcl/target/rp2040.cfg
index de76b4e29c..5e78c69310 100644
--- a/tcl/target/rp2040.cfg
+++ b/tcl/target/rp2040.cfg
@@ -96,7 +96,7 @@ if { $_USE_CORE == 1 } {
set _FLASH_TARGET $_TARGETNAME_0
 }
 # Backup the work area. The flash probe runs an algorithm on the target CPU.
-# The flash is probed during gdb connect if gdb_memory_map is enabled (by 
default).
+#

[PATCH]: a3deeed53f server/gdb: Restructure commands

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8336

-- gerrit

commit a3deeed53fe8f1908882ed4eb92187e52c152323
Author: Marc Schink 
Date:   Fri Jun 14 16:19:56 2024 +0200

server/gdb: Restructure commands

Use a command group 'gdb' with subcommands instead of individual
commands with 'gdb_' prefix.

The old commands are still available to ensure backwards compatibility,
but are marked as deprecated.

Change-Id: I037dc58554e589d5710cf46924e0a00f863aa300
Signed-off-by: Marc Schink 

diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 0ded8e4404..7a3972b326 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -3940,7 +3940,7 @@ COMMAND_HANDLER(handle_gdb_sync_command)
 
if (!current_gdb_connection) {
command_print(CMD,
-   "gdb_sync command can only be run from within gdb using 
\"monitor gdb_sync\"");
+   "gdb sync command can only be run from within gdb using 
\"monitor gdb sync\"");
return ERROR_FAIL;
}
 
@@ -4073,9 +4073,9 @@ out:
return retval;
 }
 
-static const struct command_registration gdb_command_handlers[] = {
+static const struct command_registration gdb_subcommand_handlers[] = {
{
-   .name = "gdb_sync",
+   .name = "sync",
.handler = handle_gdb_sync_command,
.mode = COMMAND_ANY,
.help = "next stepi will return immediately allowing "
@@ -4084,7 +4084,7 @@ static const struct command_registration 
gdb_command_handlers[] = {
.usage = ""
},
{
-   .name = "gdb_port",
+   .name = "port",
.handler = handle_gdb_port_command,
.mode = COMMAND_CONFIG,
.help = "Normally gdb listens to a TCP/IP port. Each subsequent 
GDB "
@@ -4097,35 +4097,35 @@ static const struct command_registration 
gdb_command_handlers[] = {
.usage = "[port_num]",
},
{
-   .name = "gdb_memory_map",
+   .name = "memory_map",
.handler = handle_gdb_memory_map_command,
.mode = COMMAND_CONFIG,
.help = "enable or disable memory map",
.usage = "('enable'|'disable')"
},
{
-   .name = "gdb_flash_program",
+   .name = "flash_program",
.handler = handle_gdb_flash_program_command,
.mode = COMMAND_CONFIG,
.help = "enable or disable flash program",
.usage = "('enable'|'disable')"
},
{
-   .name = "gdb_report_data_abort",
+   .name = "report_data_abort",
.handler = handle_gdb_report_data_abort_command,
.mode = COMMAND_CONFIG,
.help = "enable or disable reporting data aborts",
.usage = "('enable'|'disable')"
},
{
-   .name = "gdb_report_register_access_error",
+   .name = "report_register_access_error",
.handler = handle_gdb_report_register_access_error,
.mode = COMMAND_CONFIG,
.help = "enable or disable reporting register access errors",
.usage = "('enable'|'disable')"
},
{
-   .name = "gdb_breakpoint_override",
+   .name = "breakpoint_override",
.handler = handle_gdb_breakpoint_override_command,
.mode = COMMAND_ANY,
.help = "Display or specify type of breakpoint "
@@ -4133,14 +4133,14 @@ static const struct command_registration 
gdb_command_handlers[] = {
.usage = "('hard'|'soft'|'disable')"
},
{
-   .name = "gdb_target_description",
+   .name = "target_description",
.handler = handle_gdb_target_description_command,
.mode = COMMAND_CONFIG,
.help = "enable or disable target description",
.usage = "('enable'|'disable')"
},
{
-   .name = "gdb_save_tdesc",
+   .name = "save_tdesc",
.handler = handle_gdb_save_tdesc_command,
.mode = COMMAND_EXEC,
.help = "Save the target description file",
@@ -4149,6 +4149,17 @@ static const struct command_registration 
gdb_command_handlers[] = {
COMMAND

[PATCH]: 2e6a9f966b jtag/hla: Restructure commands

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8335

-- gerrit

commit 2e6a9f966b3ac8d9b069976c98a3c78148228fb2
Author: Marc Schink 
Date:   Thu Nov 9 11:20:00 2023 +0100

jtag/hla: Restructure commands

Use a command group 'hla' with subcommands instead of individual
commands with 'hla_' prefix.

The old commands are still available to ensure backwards compatibility,
but are marked as deprecated.

Change-Id: I612e3cc080d308735932aea0f11001428eadc570
Signed-off-by: Marc Schink 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 8c9f3ff845..58fbe3db93 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -3199,19 +3199,19 @@ versions of firmware where serial number is reset after 
first use.  Suggest
 using ST firmware update utility to upgrade ST-LINK firmware even if current
 version reported is V2.J21.S4.
 
-@deffn {Config Command} {hla_device_desc} description
+@deffn {Config Command} {hla device_desc} description
 Currently Not Supported.
 @end deffn
 
-@deffn {Config Command} {hla_layout} 
(@option{stlink}|@option{icdi}|@option{nulink})
+@deffn {Config Command} {hla layout} 
(@option{stlink}|@option{icdi}|@option{nulink})
 Specifies the adapter layout to use.
 @end deffn
 
-@deffn {Config Command} {hla_vid_pid} [vid pid]+
+@deffn {Config Command} {hla vid_pid} [vid pid]+
 Pairs of vendor IDs and product IDs of the device.
 @end deffn
 
-@deffn {Config Command} {hla_stlink_backend} (usb | tcp [port])
+@deffn {Config Command} {hla stlink_backend} (usb | tcp [port])
 @emph{ST-Link only:} Choose between 'exclusive' USB communication (the default 
backend) or
 'shared' mode using ST-Link TCP server (the default port is 7184).
 
@@ -3220,7 +3220,7 @@ available from 
@url{https://www.st.com/en/development-tools/st-link-server.html,
 ST-LINK server software module}.
 @end deffn
 
-@deffn {Command} {hla_command} command
+@deffn {Command} {hla command} command
 Execute a custom adapter-specific command. The @var{command} string is
 passed as is to the underlying adapter layout handler.
 @end deffn
diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c
index 9c8d0fadea..28e5c6d53e 100644
--- a/src/jtag/hla/hla_interface.c
+++ b/src/jtag/hla/hla_interface.c
@@ -319,37 +319,37 @@ COMMAND_HANDLER(interface_handle_hla_command)
return ERROR_OK;
 }
 
-static const struct command_registration hl_interface_command_handlers[] = {
+static const struct command_registration hl_interface_subcommand_handlers[] = {
{
-.name = "hla_device_desc",
+.name = "device_desc",
 .handler = _interface_handle_device_desc_command,
 .mode = COMMAND_CONFIG,
 .help = "set the device description of the adapter",
 .usage = "description_string",
 },
{
-.name = "hla_layout",
+.name = "layout",
 .handler = _interface_handle_layout_command,
 .mode = COMMAND_CONFIG,
 .help = "set the layout of the adapter",
 .usage = "layout_name",
 },
{
-.name = "hla_vid_pid",
+.name = "vid_pid",
 .handler = _interface_handle_vid_pid_command,
 .mode = COMMAND_CONFIG,
 .help = "the vendor and product ID of the adapter",
 .usage = "(vid pid)*",
 },
{
-.name = "hla_stlink_backend",
+.name = "stlink_backend",
 .handler = _interface_handle_stlink_backend_command,
 .mode = COMMAND_CONFIG,
 .help = "select which ST-Link backend to use",
 .usage = "usb | tcp [port]",
},
 {
-.name = "hla_command",
+.name = "command",
 .handler = _handle_hla_command,
 .mode = COMMAND_EXEC,
 .help = "execute a custom adapter-specific command",
@@ -358,6 +358,17 @@ static const struct command_registration 
hl_interface_command_handlers[] = {
COMMAND_REGISTRATION_DONE
 };
 
+static const struct command_registration hl_interface_command_handlers[] = {
+   {
+   .name = "hla",
+   .mode = COMMAND_ANY,
+   .help = "perform hla management",
+   .chain = hl_interface_subcommand_handlers,
+   .usage = "",
+   },
+   COMMAND_REGISTRATION_DONE
+};
+
 struct adapter_driver hl_adapter_driver = {
.name = "hla",
.transports = hl_transports,
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index 41db38e4ac..2d8ebf0410 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -1126,6 +1126,36 @@ proc "cmsis_dap_usb" {args} {
eval cmsis-dap usb $args
 }
 
+lappend 

[PATCH]: 0f475cda77 rtos: Use lower case filenames

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8334

-- gerrit

commit 0f475cda7726145457afedfef0045b55075c3cd4
Author: Marc Schink 
Date:   Wed Jun 12 13:34:48 2024 +0200

rtos: Use lower case filenames

Change-Id: I309c7a649e33f516e28037fef2dc6e574d48c000
Signed-off-by: Marc Schink 

diff --git a/src/rtos/Makefile.am b/src/rtos/Makefile.am
index 0796910de8..5267fea248 100644
--- a/src/rtos/Makefile.am
+++ b/src/rtos/Makefile.am
@@ -11,15 +11,15 @@ noinst_LTLIBRARIES += %D%/librtos.la
%D%/rtos_ucos_iii_stackings.c \
%D%/rtos_riot_stackings.c \
%D%/rtos_nuttx_stackings.c \
-   %D%/FreeRTOS.c \
-   %D%/ThreadX.c \
-   %D%/eCos.c \
+   %D%/freertos.c \
+   %D%/threadx.c \
+   %D%/ecos.c \
%D%/linux.c \
%D%/chibios.c \
%D%/chromium-ec.c \
-   %D%/embKernel.c \
+   %D%/embkernel.c \
%D%/mqx.c \
-   %D%/uCOS-III.c \
+   %D%/ucos_iii.c \
%D%/nuttx.c \
%D%/rtkernel.c \
%D%/hwthread.c \
diff --git a/src/rtos/eCos.c b/src/rtos/ecos.c
similarity index 100%
rename from src/rtos/eCos.c
rename to src/rtos/ecos.c
diff --git a/src/rtos/embKernel.c b/src/rtos/embkernel.c
similarity index 100%
rename from src/rtos/embKernel.c
rename to src/rtos/embkernel.c
diff --git a/src/rtos/FreeRTOS.c b/src/rtos/freertos.c
similarity index 100%
rename from src/rtos/FreeRTOS.c
rename to src/rtos/freertos.c
diff --git a/src/rtos/ThreadX.c b/src/rtos/threadx.c
similarity index 100%
rename from src/rtos/ThreadX.c
rename to src/rtos/threadx.c
diff --git a/src/rtos/uCOS-III.c b/src/rtos/ucos_iii.c
similarity index 100%
rename from src/rtos/uCOS-III.c
rename to src/rtos/ucos_iii.c

-- 

[PATCH]: fbdc058cd2 tcl/interface: support for Raspberry Pi 5

[gerrit]

This is an automated email from Gerrit.

"Tomas Vanek " just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8333

-- gerrit

commit fbdc058cd2e518efa009f187bf70f468c801820c
Author: Tomas Vanek 
Date:   Tue Jun 11 16:40:29 2024 +0200

tcl/interface: support for Raspberry Pi 5

Make sure raspberrypi-native.cfg cannot be used on RPi5.

Add raspberrypi5-gpiod.cfg which uses linuxgpiod adapter driver.
Issue a warning if PCIe is in power save mode.

While on it, re-format warnings issued from Tcl to look similar
to LOG_WARNING() output.

Change-Id: If19b0350bd5fff83d9a0c65999e33b161fb6957a
Signed-off-by: Tomas Vanek 

diff --git a/tcl/interface/raspberrypi-native.cfg 
b/tcl/interface/raspberrypi-native.cfg
index 7224723d63..c80f90a146 100644
--- a/tcl/interface/raspberrypi-native.cfg
+++ b/tcl/interface/raspberrypi-native.cfg
@@ -37,9 +37,9 @@ proc get_max_cpu_clock { default } {
return $clock
}
 
-   echo "WARNING: Host CPU clock unknown."
-   echo "WARNING: Using the highest possible value $default kHz as a safe 
default."
-   echo "WARNING: Expect JTAG/SWD clock significantly slower than 
requested."
+   echo "Warn : Host CPU clock unknown."
+   echo "Warn : Using the highest possible value $default kHz as a safe 
default."
+   echo "Warn : Expect JTAG/SWD clock significantly slower than requested."
 
return $default
 }
@@ -56,9 +56,13 @@ if {[string match *bcm2711* $compat]} {
 } elseif {[string match *bcm2835* $compat] || [string match *bcm2708* 
$compat]} {
set clocks_per_timing_loop 6
set speed_offset 32
+} elseif {[string match *bcm2712* $compat]} {
+   echo "Error: Raspberrypi Pi 5 has moved GPIOs to PCIe connected RP1 
chip."
+   echo "Error: Native GPIO handling is not supported, use 
'raspberrypi5-gpiod.cfg'"
+   shutdown
 } else {
set speed_offset 32
-   echo "WARNING: Unknown type of the host SoC. Expect JTAG/SWD clock 
slower than requested."
+   echo "Warn : Unknown type of the host SoC. Expect JTAG/SWD clock slower 
than requested."
 }
 
 set clock [get_max_cpu_clock 200]
diff --git a/tcl/interface/raspberrypi5-gpiod.cfg 
b/tcl/interface/raspberrypi5-gpiod.cfg
new file mode 100644
index 00..ac419b4186
--- /dev/null
+++ b/tcl/interface/raspberrypi5-gpiod.cfg
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Config for Raspberry Pi used as a bitbang adapter.
+# https://www.raspberrypi.com/documentation/computers/raspberry-pi.html
+
+# Raspberry Pi 5 is not compatible with bcm2835gpio native GPIO driver.
+# linuxgpiod driver without configurable adapter speed runs at approximately
+# 800 kHz
+
+adapter driver linuxgpiod
+
+proc read_file { name } {
+   if {[catch {open $name r} fd]} {
+   return ""
+   }
+   set result [read $fd]
+   close $fd
+   return $result
+}
+
+set pcie_aspm [read_file /sys/module/pcie_aspm/parameters/policy]
+# escaping [ ] characters in string match pattern does not work in Jim-Tcl
+if {![string match "**" [string map { "\[" < "\]" > } 
$pcie_aspm]]} {
+   echo "Warn : Switch PCIe power saving off or the first couple of pulses 
gets clocked as fast as 20 MHz"
+   echo "Warn : Issue 'echo performance | sudo tee 
/sys/module/pcie_aspm/parameters/policy'"
+}
+
+source [find interface/raspberrypi-gpio-connector.cfg]

-- 

[PATCH]: d778a8c22c target/cortex_m: workaround Cortex-M7 erratum 3092511

[gerrit]

This is an automated email from Gerrit.

"Tomas Vanek " just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8332

-- gerrit

commit d778a8c22c673e83e713046c14a732700bd87766
Author: Tomas Vanek 
Date:   Mon Jun 10 13:10:44 2024 +0200

target/cortex_m: workaround Cortex-M7 erratum 3092511

When an asynchronous exception occurs at the same time
as a breakpoint event (either hardware breakpoint or software breakpoint),
it is possible for the processor to halt at the beginning of the
exception handler instead of the instruction address pointed
by the breakpoint.

During debug entry in exception handler state and with BKPT bit set
as the only break reason in DFSR, check if there is a breakpoint, which
have triggered the debug halt. If there is no such breakpoint,
resume execution. The processor services the interrupt and
halts again at the correct breakpoint address.

The workaround is not needed during target algo run (debug_execution)
because interrupts are disabled in PRIMASK register.

Also after single step the workaround resume never takes place:
the situation is treated as error.

Link: https://developer.arm.com/documentation/SDEN1068427/latest/
Signed-off-by: Tomas Vanek 
Change-Id: I8b23f39cedd7dccabe7e7066d616fb972b69f769

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index c225b1aa9d..6cb5547d9c 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -797,6 +797,42 @@ static int cortex_m_examine_exception_reason(struct target 
*target)
return retval;
 }
 
+/* Errata 3092511 workaround
+ * Cortex-M7 can halt in an incorrect address when breakpoint
+ * and exception occurs simultaneously */
+static int cortex_m_erratum_check_breakpoint(struct target *target)
+{
+   struct cortex_m_common *cortex_m = target_to_cm(target);
+   struct armv7m_common *armv7m = _m->armv7m;
+   struct arm *arm = >arm;
+
+   uint32_t pc = buf_get_u32(arm->pc->value, 0, 32);
+
+   /* To reduce the workaround processing cost we assume FPB is in sync
+* with OpenOCD breakpoints. If the target app writes to FPB
+* OpenOCD will resume after the break set by app */
+   struct breakpoint *bkpt = breakpoint_find(target, pc);
+   if (bkpt) {
+   LOG_TARGET_DEBUG(target, "Erratum 3092511: breakpoint 
confirmed");
+   return ERROR_OK;
+   }
+   if (pc >= 0xe000u)
+   /* not executable area, do not read instruction @ pc */
+   return ERROR_OK;
+
+   uint16_t insn;
+   int retval = target_read_u16(target, pc, );
+   if (retval != ERROR_OK)
+   return ERROR_OK;/* do not propagate the error, just 
avoid workaround */
+
+   if ((insn & 0xff00) == (ARMV5_T_BKPT(0) & 0xff00)) {
+   LOG_TARGET_DEBUG(target, "Erratum 3092511: breakpoint embedded 
in code confirmed");
+   return ERROR_OK;
+   }
+   LOG_TARGET_DEBUG(target, "Erratum 3092511: breakpoint not found, 
proceed with resume");
+   return ERROR_TARGET_HALTED_DO_RESUME;
+}
+
 static int cortex_m_debug_entry(struct target *target)
 {
uint32_t xpsr;
@@ -883,6 +919,17 @@ static int cortex_m_debug_entry(struct target *target)
secure_state ? "Secure" : "Non-Secure",
target_state_name(target));
 
+   /* Errata 3092511 workaround
+* Cortex-M7 can halt in an incorrect address when breakpoint
+* and exception occurs simultaneously */
+   if (cortex_m->incorrect_halt_erratum
+   && armv7m->exception_number
+   && cortex_m->nvic_dfsr == (DFSR_BKPT | DFSR_HALTED)) {
+   retval = cortex_m_erratum_check_breakpoint(target);
+   if (retval != ERROR_OK)
+   return retval;
+   }
+
if (armv7m->post_debug_entry) {
retval = armv7m->post_debug_entry(target);
if (retval != ERROR_OK)
@@ -956,6 +1003,28 @@ static int cortex_m_poll_one(struct target *target)
if ((prev_target_state == TARGET_RUNNING) || (prev_target_state 
== TARGET_RESET)) {
retval = cortex_m_debug_entry(target);
 
+   /* Errata 3092511 workaround
+* Cortex-M7 can halt in an incorrect address when 
breakpoint
+* and exception occurs simultaneously */
+   if (retval == ERROR_TARGET_HALTED_DO_RESUME) {
+   struct arm *arm = >arm;
+   LOG_TARGET_INFO(target, "Resuming after 
incorrect halt @ PC 0x%08" PRIx32
+   ", ARM Cortex-M7 erratum 3092511",
+   

[PATCH]: 731592f4dd remote_bitbang: fix assertion failure for the cases when connection is abruptly terminated

[gerrit]

This is an automated email from Gerrit.

"Timur Golubovich " just uploaded a new patch 
set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8325

-- gerrit

commit 731592f4dd15ae14667425a4b05011e9cf4ed2d4
Author: Timur Golubovich 
Date:   Fri Jun 7 16:42:16 2024 +0300

remote_bitbang: fix assertion failure for the cases when connection is 
abruptly terminated

Changes affect the function remote_bitbang_fill_buf.
When read_socket returns 0, socket reached EOF and there is
no data to read. But if request was blocking, the caller
expected some data. Such situations should be treated as ERROR.

Change-Id: I02ed484e61fb776c1625f6e36ab14c85891939b2
Signed-off-by: Timur Golubovich 

diff --git a/src/jtag/drivers/remote_bitbang.c 
b/src/jtag/drivers/remote_bitbang.c
index 53d2151fdc..ff89ec5506 100644
--- a/src/jtag/drivers/remote_bitbang.c
+++ b/src/jtag/drivers/remote_bitbang.c
@@ -114,12 +114,18 @@ static int remote_bitbang_fill_buf(enum block_bool block)
contiguous_available_space);
if (first && block == BLOCK)
socket_nonblock(remote_bitbang_fd);
-   first = false;
if (count > 0) {
remote_bitbang_recv_buf_end += count;
if (remote_bitbang_recv_buf_end == 
sizeof(remote_bitbang_recv_buf))
remote_bitbang_recv_buf_end = 0;
} else if (count == 0) {
+   /* When read_socket returns 0, socket reached EOF and 
there is
+* no data to read. But if request was blocking, the 
caller
+* expected some data. Such situations should be 
treated as ERROR. */
+   if (first && block == BLOCK) {
+   LOG_ERROR("remote_bitbang: socket EOF");
+   return ERROR_FAIL;
+   }
return ERROR_OK;
} else if (count < 0) {
 #ifdef _WIN32
@@ -133,6 +139,7 @@ static int remote_bitbang_fill_buf(enum block_bool block)
return ERROR_FAIL;
}
}
+   first = false;
}
 
return ERROR_OK;

-- 

[PATCH]: c95d697f26 flash/nor/nrf5: remove asserts on dereferenced pointers

[gerrit]

This is an automated email from Gerrit.

"Tomas Vanek " just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8324

-- gerrit

commit c95d697f26c78d2204beb9aaa62bc13c811dc929
Author: Tomas Vanek 
Date:   Sat Jun 8 11:59:29 2024 +0200

flash/nor/nrf5: remove asserts on dereferenced pointers

The driver code works reliably, no need to use assert() everywhere.

Signed-off-by: Tomas Vanek 
Change-Id: Idb1942bfd31d370a74610b8a8836bc2e64370557

diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c
index 9cc143c471..c002dc5da1 100644
--- a/src/flash/nor/nrf5.c
+++ b/src/flash/nor/nrf5.c
@@ -345,26 +345,19 @@ const struct flash_driver nrf5_flash, nrf51_flash;
 static bool nrf5_bank_is_probed(const struct flash_bank *bank)
 {
struct nrf5_bank *nbank = bank->driver_priv;
-   assert(nbank);
-
return nbank->probed;
 }
 
 static bool nrf5_chip_is_probed(const struct flash_bank *bank)
 {
struct nrf5_bank *nbank = bank->driver_priv;
-   assert(nbank);
struct nrf5_info *chip = nbank->chip;
-   assert(chip);
-
return chip->chip_probed;
 }
 
 static bool nrf5_bank_is_uicr(const struct nrf5_bank *nbank)
 {
struct nrf5_info *chip = nbank->chip;
-   assert(chip);
-
return nbank == >bank[1];
 }
 
@@ -484,9 +477,7 @@ static int nrf51_protect_check_clenr0(struct flash_bank 
*bank)
uint32_t clenr0;
 
struct nrf5_bank *nbank = bank->driver_priv;
-   assert(nbank);
struct nrf5_info *chip = nbank->chip;
-   assert(chip);
 
res = target_read_u32(chip->target, NRF51_FICR_CLENR0,
  );
@@ -515,9 +506,7 @@ static int nrf51_protect_check_clenr0(struct flash_bank 
*bank)
 static int nrf52_protect_check_bprot(struct flash_bank *bank)
 {
struct nrf5_bank *nbank = bank->driver_priv;
-   assert(nbank);
struct nrf5_info *chip = nbank->chip;
-   assert(chip);
 
static uint32_t nrf5_bprot_offsets[4] = { 0x600, 0x604, 0x610, 0x614 };
uint32_t bprot_reg = 0;
@@ -542,9 +531,7 @@ static int nrf52_protect_check_bprot(struct flash_bank 
*bank)
 static int nrf5_protect_check(struct flash_bank *bank)
 {
struct nrf5_bank *nbank = bank->driver_priv;
-   assert(nbank);
struct nrf5_info *chip = nbank->chip;
-   assert(chip);
 
/* UICR cannot be write protected so just return early */
if (nrf5_bank_is_uicr(nbank))
@@ -568,9 +555,7 @@ static int nrf51_protect_clenr0(struct flash_bank *bank, 
int set, unsigned int f
uint32_t clenr0, ppfc;
 
struct nrf5_bank *nbank = bank->driver_priv;
-   assert(nbank);
struct nrf5_info *chip = nbank->chip;
-   assert(chip);
 
if (first != 0) {
LOG_ERROR("Code region 0 must start at the beginning of the 
bank");
@@ -628,9 +613,7 @@ static int nrf5_protect(struct flash_bank *bank, int set, 
unsigned int first,
unsigned int last)
 {
struct nrf5_bank *nbank = bank->driver_priv;
-   assert(nbank);
struct nrf5_info *chip = nbank->chip;
-   assert(chip);
 
/* UICR cannot be write protected so just bail out early */
if (nrf5_bank_is_uicr(nbank)) {
@@ -715,9 +698,7 @@ static int nrf5_get_chip_type_str(const struct nrf5_info 
*chip, char *buf, unsig
 static int nrf5_info(struct flash_bank *bank, struct command_invocation *cmd)
 {
struct nrf5_bank *nbank = bank->driver_priv;
-   assert(nbank);
struct nrf5_info *chip = nbank->chip;
-   assert(chip);
 
char chip_type_str[256];
if (nrf5_get_chip_type_str(chip, chip_type_str, sizeof(chip_type_str)) 
!= ERROR_OK)
@@ -858,9 +839,7 @@ static int nrf5_probe_chip(struct flash_bank *bank)
int res = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 
struct nrf5_bank *nbank = bank->driver_priv;
-   assert(nbank);
struct nrf5_info *chip = nbank->chip;
-   assert(chip);
struct target *target = chip->target;
 
chip->spec = NULL;
@@ -1018,9 +997,7 @@ static int nrf5_probe_chip(struct flash_bank *bank)
 static int nrf5_setup_bank(struct flash_bank *bank)
 {
struct nrf5_bank *nbank = bank->driver_priv;
-   assert(nbank);
struct nrf5_info *chip = nbank->chip;
-   assert(chip);
 
if (bank->base == chip->map->flash_base) {
unsigned int flash_size_kb = chip->flash_num_sectors * 
chip->flash_page_size / 1024;
@@ -1254,9 +1231,7 @@ static int nrf5_write(struct flash_bank *bank, const 
uint8_t *buffer,
}
 
struct nrf5_bank *nbank = bank->driver_priv;
-   assert(nbank);
struct nrf5_info *chip = nbank->chip;
-   assert(chip);
 
assert(offset % 4 == 0);
assert(count % 4 == 0);
@@ -1316,9 +1291,7 @@ static int nrf5_erase(struct

[PATCH]: 0348bacf53 flash/nor/nrf5: split chip and bank probes

[gerrit]

This is an automated email from Gerrit.

"Tomas Vanek " just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8322

-- gerrit

commit 0348bacf536cb25322b83421f7ac9dad3504c6c5
Author: Tomas Vanek 
Date:   Sat Jun 8 11:33:35 2024 +0200

flash/nor/nrf5: split chip and bank probes

nrf5_auto_probe() always re-probed chip hardware to
get flash geometry.

Introduce nrf5_probe_chip() and move chip related probing to it.
Save all flash parameters needed for bank setup to struct nrf5_info.

Introduce nrf5_setup_bank() and move bank setup code to it.

Call both chip probe and bank setup unconditionally from nrf5_probe():
in case of manual issuing 'flash probe' command, we should refresh actual
values from the device.

Call chip probe and bank setup only if not done before from
nrf5_auto_probe().

Signed-off-by: Tomas Vanek 
Change-Id: Ib090a97fd7a41579b3d4f6e6634a5fdf93836c83

diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c
index 751352117d..9cc143c471 100644
--- a/src/flash/nor/nrf5.c
+++ b/src/flash/nor/nrf5.c
@@ -117,20 +117,24 @@ struct nrf5_map {
 
 struct nrf5_info {
unsigned int refcount;
+   bool chip_probed;
 
struct nrf5_bank {
struct nrf5_info *chip;
bool probed;
} bank[2];
+
struct target *target;
 
-   /* chip identification stored in nrf5_probe() for use in nrf5_info() */
+   /* chip identification stored in nrf5_probe_chip()
+* for use in nrf5_info() and nrf5_setup_bank() */
bool ficr_info_valid;
struct nrf52_ficr_info ficr_info;
const struct nrf5_device_spec *spec;
uint16_t hwid;
enum nrf5_features features;
-   unsigned int flash_size_kb;
+   uint32_t flash_page_size;
+   uint32_t flash_num_sectors;
unsigned int ram_size_kb;
 
const struct nrf5_map *map;
@@ -346,6 +350,16 @@ static bool nrf5_bank_is_probed(const struct flash_bank 
*bank)
return nbank->probed;
 }
 
+static bool nrf5_chip_is_probed(const struct flash_bank *bank)
+{
+   struct nrf5_bank *nbank = bank->driver_priv;
+   assert(nbank);
+   struct nrf5_info *chip = nbank->chip;
+   assert(chip);
+
+   return chip->chip_probed;
+}
+
 static bool nrf5_bank_is_uicr(const struct nrf5_bank *nbank)
 {
struct nrf5_info *chip = nbank->chip;
@@ -709,8 +723,9 @@ static int nrf5_info(struct flash_bank *bank, struct 
command_invocation *cmd)
if (nrf5_get_chip_type_str(chip, chip_type_str, sizeof(chip_type_str)) 
!= ERROR_OK)
return ERROR_FAIL;
 
+   unsigned int flash_size_kb = chip->flash_num_sectors * 
chip->flash_page_size / 1024;
command_print_sameline(cmd, "%s %ukB Flash, %ukB RAM",
-   chip_type_str, chip->flash_size_kb, chip->ram_size_kb);
+   chip_type_str, flash_size_kb, chip->ram_size_kb);
return ERROR_OK;
 }
 
@@ -838,7 +853,7 @@ static int nrf51_get_ram_size(struct target *target, 
uint32_t *ram_size)
return res;
 }
 
-static int nrf5_probe(struct flash_bank *bank)
+static int nrf5_probe_chip(struct flash_bank *bank)
 {
int res = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 
@@ -968,9 +983,8 @@ static int nrf5_probe(struct flash_bank *bank)
}
 
/* The value stored in FICR CODEPAGESIZE is the number of bytes in one 
page of FLASH. */
-   uint32_t flash_page_size;
res = target_read_u32(chip->target, ficr_base + 
ficr_offsets->codepagesize,
-   _page_size);
+   >flash_page_size);
if (res != ERROR_OK) {
LOG_ERROR("Couldn't read code page size");
return res;
@@ -978,69 +992,95 @@ static int nrf5_probe(struct flash_bank *bank)
 
/* Note the register name is misleading,
 * FICR CODESIZE is the number of pages in flash memory, not the number 
of bytes! */
-   uint32_t num_sectors;
res = target_read_u32(chip->target, ficr_base + ficr_offsets->codesize,
-   _sectors);
+   >flash_num_sectors);
if (res != ERROR_OK) {
LOG_ERROR("Couldn't read code memory size");
return res;
}
 
-   chip->flash_size_kb = num_sectors * flash_page_size / 1024;
+   char chip_type_str[256];
+   if (nrf5_get_chip_type_str(chip, chip_type_str, sizeof(chip_type_str)) 
!= ERROR_OK)
+   return ERROR_FAIL;
+
+   unsigned int flash_size_kb = chip->flash_num_sectors * 
chip->flash_page_size / 1024;
+   const bool device_is_unknown = (!chip->spec && !chip->ficr_info_valid);
+   LOG_INFO("%s%s %ukB Flash, %ukB RAM",
+   device_is_unknown ? "Unkn

[PATCH]: 242667023e Fixed situation when fails assert.

[gerrit]

This is an automated email from Gerrit.

"Timur Golubovich " just uploaded a new patch 
set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8321

-- gerrit

commit 242667023e821ae1ca08c8360c090313736aaa02
Author: Timur Golubovich 
Date:   Fri Jun 7 16:42:16 2024 +0300

Fixed situation when fails assert.

Changes affect the function remote_bitbang_fill_buf.
When read_socket returns 0, socket reached EOF and there is
no data to read. But if request was blocking, the caller
expected some data. Such situations should be treated as ERROR.

Change-Id: If76795e5756fd5317897b13389d6bcdaa64eb097
Signed-off-by: Timur Golubovich 

diff --git a/src/jtag/drivers/remote_bitbang.c 
b/src/jtag/drivers/remote_bitbang.c
index 53d2151fdc..ff89ec5506 100644
--- a/src/jtag/drivers/remote_bitbang.c
+++ b/src/jtag/drivers/remote_bitbang.c
@@ -114,12 +114,18 @@ static int remote_bitbang_fill_buf(enum block_bool block)
contiguous_available_space);
if (first && block == BLOCK)
socket_nonblock(remote_bitbang_fd);
-   first = false;
if (count > 0) {
remote_bitbang_recv_buf_end += count;
if (remote_bitbang_recv_buf_end == 
sizeof(remote_bitbang_recv_buf))
remote_bitbang_recv_buf_end = 0;
} else if (count == 0) {
+   /* When read_socket returns 0, socket reached EOF and 
there is
+* no data to read. But if request was blocking, the 
caller
+* expected some data. Such situations should be 
treated as ERROR. */
+   if (first && block == BLOCK) {
+   LOG_ERROR("remote_bitbang: socket EOF");
+   return ERROR_FAIL;
+   }
return ERROR_OK;
} else if (count < 0) {
 #ifdef _WIN32
@@ -133,6 +139,7 @@ static int remote_bitbang_fill_buf(enum block_bool block)
return ERROR_FAIL;
}
}
+   first = false;
}
 
return ERROR_OK;

-- 

[PATCH]: fe4de99539 Fixed situation when fails assert.

[gerrit]

This is an automated email from Gerrit.

"Timur Golubovich " just uploaded a new patch 
set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8320

-- gerrit

commit fe4de99539d8cc36eec4b8943388fbfd13bb234c
Author: Timur Golubovich 
Date:   Fri Jun 7 16:42:16 2024 +0300

Fixed situation when fails assert.

Changes affect the function remote_bitbang_fill_buf.
When read_socket returns 0, socket reached EOF and there is
no data to read. But if request was blocking, the caller
expected some data. Such situations should be treated as ERROR.

Change-Id: I0c4f723ed274213f5c39ae768581b5106eb29fb8

Change-Id: I1d84e740fccbb2718dfba4cf2ff470a4d4a8207e
Signed-off-by: Timur Golubovich 

diff --git a/src/jtag/drivers/remote_bitbang.c 
b/src/jtag/drivers/remote_bitbang.c
index 53d2151fdc..ff89ec5506 100644
--- a/src/jtag/drivers/remote_bitbang.c
+++ b/src/jtag/drivers/remote_bitbang.c
@@ -114,12 +114,18 @@ static int remote_bitbang_fill_buf(enum block_bool block)
contiguous_available_space);
if (first && block == BLOCK)
socket_nonblock(remote_bitbang_fd);
-   first = false;
if (count > 0) {
remote_bitbang_recv_buf_end += count;
if (remote_bitbang_recv_buf_end == 
sizeof(remote_bitbang_recv_buf))
remote_bitbang_recv_buf_end = 0;
} else if (count == 0) {
+   /* When read_socket returns 0, socket reached EOF and 
there is
+* no data to read. But if request was blocking, the 
caller
+* expected some data. Such situations should be 
treated as ERROR. */
+   if (first && block == BLOCK) {
+   LOG_ERROR("remote_bitbang: socket EOF");
+   return ERROR_FAIL;
+   }
return ERROR_OK;
} else if (count < 0) {
 #ifdef _WIN32
@@ -133,6 +139,7 @@ static int remote_bitbang_fill_buf(enum block_bool block)
return ERROR_FAIL;
}
}
+   first = false;
}
 
return ERROR_OK;

-- 

[PATCH]: 53e4c479ce target: arm_adi_v5: add more CoreSight P/N

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8319

-- gerrit

commit 53e4c479ce52ec5bd5e4d6e328b963cca0377443
Author: Antonio Borneo 
Date:   Fri Jun 7 14:42:58 2024 +0200

target: arm_adi_v5: add more CoreSight P/N

Add part numbers for:
- Cortex-A65AE,
- Cortex-M52,
- Cortex-M55,
- Cortex-R52+,
- STAR-MC1.

Change-Id: I6282768896dd727e803a071139816494470744f1
Signed-off-by: Antonio Borneo 

diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 9129acecf9..8a97d7a524 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1453,11 +1453,13 @@ static const struct dap_part_nums {
{ ARM_ID, 0x4af, "Cortex-A15 ROM", "(ROM Table)", },
{ ARM_ID, 0x4b5, "Cortex-R5 ROM",  "(ROM Table)", },
{ ARM_ID, 0x4b8, "Cortex-R52 ROM", "(ROM Table)", },
+   { ARM_ID, 0x4bd, "Cortex-R52+ ROM","(ROM Table)", },
{ ARM_ID, 0x4c0, "Cortex-M0+ ROM", "(ROM Table)", },
{ ARM_ID, 0x4c3, "Cortex-M3 ROM",  "(ROM Table)", },
{ ARM_ID, 0x4c4, "Cortex-M4 ROM",  "(ROM Table)", },
{ ARM_ID, 0x4c7, "Cortex-M7 PPB ROM",  "(Private Peripheral Bus 
ROM Table)", },
{ ARM_ID, 0x4c8, "Cortex-M7 ROM",  "(ROM Table)", },
+   { ARM_ID, 0x4c9, "STAR ROM",   "(ROM Table)", },
{ ARM_ID, 0x4e0, "Cortex-A35 ROM", "(v7 Memory Map ROM 
Table)", },
{ ARM_ID, 0x4e4, "Cortex-A76 ROM", "(ROM Table)", },
{ ARM_ID, 0x906, "CoreSight CTI",  "(Cross Trigger)", },
@@ -1499,6 +1501,7 @@ static const struct dap_part_nums {
{ ARM_ID, 0x9ae, "Cortex-A17 PMU", "(Performance Monitor 
Unit)", },
{ ARM_ID, 0x9af, "Cortex-A15 PMU", "(Performance Monitor 
Unit)", },
{ ARM_ID, 0x9b6, "Cortex-R52 PMU/CTI/ETM", "(Performance Monitor 
Unit/Cross Trigger/ETM)", },
+   { ARM_ID, 0x9bb, "Cortex-R52+ PMU/CTI/ETM","(Performance Monitor 
Unit/Cross Trigger/ETM)", },
{ ARM_ID, 0x9b7, "Cortex-R7 PMU",  "(Performance Monitor 
Unit)", },
{ ARM_ID, 0x9d3, "Cortex-A53 PMU", "(Performance Monitor 
Unit)", },
{ ARM_ID, 0x9d7, "Cortex-A57 PMU", "(Performance Monitor 
Unit)", },
@@ -1533,6 +1536,10 @@ static const struct dap_part_nums {
{ ARM_ID, 0xd0b, "Cortex-A76 Debug",   "(Debug Unit)", },
{ ARM_ID, 0xd0c, "Neoverse N1","(Debug Unit)", },
{ ARM_ID, 0xd13, "Cortex-R52 Debug",   "(Debug Unit)", },
+   { ARM_ID, 0xd16, "Cortex-R52+ Debug",  "(Debug Unit)", },
+   { ARM_ID, 0xd21, "STAR Debug", "(Debug Unit)", },
+   { ARM_ID, 0xd22, "Cortex-M55 Debug",   "(Debug Unit)", },
+   { ARM_ID, 0xd43, "Cortex-A65AE Debug", "(Debug Unit)", },
{ ARM_ID, 0xd49, "Neoverse N2","(Debug Unit)", },
{ 0x017,  0x120, "TI SDTI","(System Debug Trace 
Interface)", }, /* from OMAP3 memmap */
{ 0x017,  0x343, "TI DAPCTL",  "", }, /* from OMAP3 
memmap */
@@ -1552,6 +1559,9 @@ static const struct dap_part_nums {
{ 0x1eb,  0x211, "Tegra 210 ROM",  "(ROM Table)", },
{ 0x1eb,  0x302, "Denver Debug",   "(Debug Unit)", },
{ 0x1eb,  0x402, "Denver PMU", "(Performance Monitor 
Unit)", },
+   { 0x575,  0x132, "STAR SCS",   "(System Control 
Space)", },
+   { 0x575,  0x4d2, "Cortex-M52 ROM", "(ROM Table)", },
+   { 0x575,  0xd24, "Cortex-M52 Debug",   "(Debug Unit)", },
 };
 
 static const struct dap_part_nums *pidr_to_part_num(unsigned int designer_id, 
unsigned int part_num)

-- 

[PATCH]: b5cb394ad0 target: cortex_m: replace 'implementor' with 'implementer'

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8318

-- gerrit

commit b5cb394ad0e831afe90af07554b6c4607e47d62d
Author: Antonio Borneo 
Date:   Tue Jun 4 11:50:19 2024 +0200

target: cortex_m: replace 'implementor' with 'implementer'

ARM documentation for Cortex-M reports the field 'implementer' in
the register CPUID.
OpenOCD used the miss-spelled 'implementor'. Fix it!

Change-Id: I854d223971ae7a49346e1f7491c2c0415f5e2c1d
Signed-off-by: Antonio Borneo 

diff --git a/src/target/arm.h b/src/target/arm.h
index 999dc9ae7f..0de322a5a1 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -58,12 +58,12 @@ enum arm_arch {
ARM_ARCH_V8M,
 };
 
-/** Known ARM implementor IDs */
-enum arm_implementor {
-   ARM_IMPLEMENTOR_ARM = 0x41,
-   ARM_IMPLEMENTOR_INFINEON = 0x49,
-   ARM_IMPLEMENTOR_ARM_CHINA = 0x63,
-   ARM_IMPLEMENTOR_REALTEK = 0x72,
+/** Known ARM implementer IDs */
+enum arm_implementer {
+   ARM_IMPLEMENTER_ARM = 0x41,
+   ARM_IMPLEMENTER_INFINEON = 0x49,
+   ARM_IMPLEMENTER_ARM_CHINA = 0x63,
+   ARM_IMPLEMENTER_REALTEK = 0x72,
 };
 
 /**
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 8c0b5f3368..921d52abf7 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2539,8 +2539,8 @@ int cortex_m_examine(struct target *target)
if (retval != ERROR_OK)
return retval;
 
-   /* Inspect implementor/part to look for recognized cores  */
-   unsigned int impl_part = cpuid & (ARM_CPUID_IMPLEMENTOR_MASK | 
ARM_CPUID_PARTNO_MASK);
+   /* Inspect implementer/part to look for recognized cores  */
+   unsigned int impl_part = cpuid & (ARM_CPUID_IMPLEMENTER_MASK | 
ARM_CPUID_PARTNO_MASK);
 
for (unsigned int n = 0; n < ARRAY_SIZE(cortex_m_parts); n++) {
if (impl_part == cortex_m_parts[n].impl_part) {
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index d2a9712901..eda2d1b481 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -31,36 +31,36 @@
 
 #define CPUID  0xE000ED00
 
-#define ARM_CPUID_IMPLEMENTOR_POS  24
-#define ARM_CPUID_IMPLEMENTOR_MASK (0xFF << ARM_CPUID_IMPLEMENTOR_POS)
+#define ARM_CPUID_IMPLEMENTER_POS  24
+#define ARM_CPUID_IMPLEMENTER_MASK (0xFF << ARM_CPUID_IMPLEMENTER_POS)
 #define ARM_CPUID_PARTNO_POS   4
 #define ARM_CPUID_PARTNO_MASK  (0xFFF << ARM_CPUID_PARTNO_POS)
 
-#define ARM_MAKE_CPUID(impl, partno)   impl) << ARM_CPUID_IMPLEMENTOR_POS) 
& ARM_CPUID_IMPLEMENTOR_MASK) | \
+#define ARM_MAKE_CPUID(impl, partno)   impl) << ARM_CPUID_IMPLEMENTER_POS) 
& ARM_CPUID_IMPLEMENTER_MASK) | \
(((partno) << ARM_CPUID_PARTNO_POS)  & ARM_CPUID_PARTNO_MASK))
 
 /** Known Arm Cortex masked CPU Ids
- * This includes the implementor and part number, but _not_ the revision or
+ * This includes the implementer and part number, but _not_ the revision or
  * patch fields.
  */
 enum cortex_m_impl_part {
CORTEX_M_PARTNO_INVALID,
-   STAR_MC1_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM_CHINA, 0x132),
-   CORTEX_M0_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC20),
-   CORTEX_M1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC21),
-   CORTEX_M3_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC23),
-   CORTEX_M4_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC24),
-   CORTEX_M7_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC27),
-   CORTEX_M0P_PARTNO= ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC60),
-   CORTEX_M23_PARTNO= ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD20),
-   CORTEX_M33_PARTNO= ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
-   CORTEX_M35P_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
-   CORTEX_M52_PARTNO= ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM_CHINA, 0xD24),
-   CORTEX_M55_PARTNO= ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
-   CORTEX_M85_PARTNO= ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD23),
-   INFINEON_SLX2_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_INFINEON, 0xDB0),
-   REALTEK_M200_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd20),
-   REALTEK_M300_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd22),
+   STAR_MC1_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM_CHINA, 0x132),
+   CORTEX_M0_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC20),
+   CORTEX_M1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC21),
+   CORTEX_M3_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC23),
+   CORTEX_M4_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC24),
+   CORTEX_M7_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC27),
+   CORTEX_M0P_PARTNO= 

[PATCH]: 22e405a2b9 target: cortex_m: add detection for Cortex-M52

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8317

-- gerrit

commit 22e405a2b9485dd34f65586dad5159e8714c476b
Author: Antonio Borneo 
Date:   Tue Jun 4 11:11:25 2024 +0200

target: cortex_m: add detection for Cortex-M52

Add Cortex-M52 to the list of known Cortex-M implementations to
allow detection of the core.
Values checked against the ARM document "Arm China Cortex®-M52
Processor Technical Reference Manual" 102776_0002_06_en.

Reported-by: Joseph Yiu 
Change-Id: Id0bde8a0476f76799b7274835db9690f975e2dd6
Signed-off-by: Antonio Borneo 

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index c225b1aa9d..8c0b5f3368 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -99,6 +99,12 @@ static const struct cortex_m_part_info cortex_m_parts[] = {
.arch = ARM_ARCH_V8M,
.flags = CORTEX_M_F_HAS_FPV5,
},
+   {
+   .impl_part = CORTEX_M52_PARTNO,
+   .name = "Cortex-M52",
+   .arch = ARM_ARCH_V8M,
+   .flags = CORTEX_M_F_HAS_FPV5,
+   },
{
.impl_part = CORTEX_M55_PARTNO,
.name = "Cortex-M55",
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index aabdb90c9e..d2a9712901 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -55,6 +55,7 @@ enum cortex_m_impl_part {
CORTEX_M23_PARTNO= ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD20),
CORTEX_M33_PARTNO= ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
CORTEX_M35P_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
+   CORTEX_M52_PARTNO= ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM_CHINA, 0xD24),
CORTEX_M55_PARTNO= ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
CORTEX_M85_PARTNO= ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD23),
INFINEON_SLX2_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_INFINEON, 0xDB0),

-- 

[PATCH]: ba8faf2478 target: cortex_m: fix detection of STAR-MC1 device

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8316

-- gerrit

commit ba8faf2478abe61c6b965e3027864afb34db6984
Author: Antonio Borneo 
Date:   Tue Jun 4 10:30:20 2024 +0200

target: cortex_m: fix detection of STAR-MC1 device

The detection of Cortex-M STAR-MC1 was introduced with [1], at a
time when OpenOCD was only checking the field PartNo of the CPUID
register.
Later-on [2], OpenOCD extended the check to the field implementer
of CPUID register. The value for ARM (0x41) implementer was used
to all the Cortex-M, but no feedback for STAR-MC1 was available. A
comment reporting the possible mismatch was added.

As reported on OpenOCD mailing-list, the tecnical reference manual
for STAR-MC1 is now available [3] and it reports the implementer
as ARM China (0x63) [3].

Fix the STAR-MC1 implementer accordingly.

Reported-by: Joseph Yiu 
Change-Id: I8ed1064a847b73065528ee7032be967b5c58b431
Signed-off-by: Antonio Borneo 
Link: [1] 7dc4be3157d6 ("target/arm: Add support with identify STAR-MC1")
Fixes: [2] 05ee88915520 ("target/cortex_m: check core implementor field")
Link: [3] 
https://www.armchina.com/download/Documents/Application-Notes/Technical-Reference-Manual?infoId=160

diff --git a/src/target/arm.h b/src/target/arm.h
index 48b5c6..999dc9ae7f 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -62,6 +62,7 @@ enum arm_arch {
 enum arm_implementor {
ARM_IMPLEMENTOR_ARM = 0x41,
ARM_IMPLEMENTOR_INFINEON = 0x49,
+   ARM_IMPLEMENTOR_ARM_CHINA = 0x63,
ARM_IMPLEMENTOR_REALTEK = 0x72,
 };
 
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index a585b786b9..aabdb90c9e 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -45,7 +45,7 @@
  */
 enum cortex_m_impl_part {
CORTEX_M_PARTNO_INVALID,
-   STAR_MC1_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0x132), /* 
FIXME - confirm implementor! */
+   STAR_MC1_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM_CHINA, 0x132),
CORTEX_M0_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC20),
CORTEX_M1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC21),
CORTEX_M3_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC23),

-- 

[PATCH]: 8e7a7638e6 binarybuffer: Fix str_to_buf() parsing function

[gerrit]

This is an automated email from Gerrit.

"Jan Matyas " just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8315

-- gerrit

commit 8e7a7638e6801dfe0391e32bcd8655d9af964291
Author: Jan Matyas 
Date:   Mon Jun 3 10:23:02 2024 +0200

binarybuffer: Fix str_to_buf() parsing function

The function str_to_buf() was too benevolent and did
not perform sufficient error checking on the input
string being parsed. Especially:

- Invalid numbers were silently ignored.
- Out-of-range nubmers were silently truncated.

The following commands that use str_to_buf()
were affected:

- reg (when writing a register value)
- set_reg
- jtag drscan

This pull request fixes that by:

- Rewriting str_to_buf() to add the missing checks.
- Adding function command_parse_str_to_buf() which can
  be used in command handlers. It parses the input
  numbers and provides user-readable error messages
  in case of parsing errors.

Examples:

jtag drscan 10 huh10

- Old behavior: The string "huh10" is silently
  converted to 10 and the command is then executed.
  No warning error or warning is shown to the user.
- New behavior: Error message is shown:
  "Number huh10 (base-10) contains an invalid digit"

reg pc 0x123456789

- Old behavior: The register value is silently
  truncated to 0x23456789 and the command is performed.
- New behavior: Error message is shown to the user:
  "Number 0x123456789 exceeds 32 bits"

Change-Id: I079e19cd153aec853a3c2eb66953024b8542d0f4
Signed-off-by: Jan Matyas 

diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c
index 5f38b43ae1..b5bace2c9d 100644
--- a/src/helper/binarybuffer.c
+++ b/src/helper/binarybuffer.c
@@ -102,7 +102,6 @@ bool buf_cmp_mask(const void *_buf1, const void *_buf2,
return buf_cmp_trailing(buf1[last], buf2[last], mask[last], trailing);
 }
 
-
 void *buf_set_ones(void *_buf, unsigned size)
 {
uint8_t *buf = _buf;
@@ -206,34 +205,55 @@ char *buf_to_hex_str(const void *_buf, unsigned buf_len)
return str;
 }
 
-/** identify radix, and skip radix-prefix (0, 0x or 0X) */
-static void str_radix_guess(const char **_str, unsigned *_str_len,
-   unsigned *_radix)
+/** Identify radix, and skip the radix-prefix (0, 0x or 0X) */
+static void str_radix_guess(const char **_str, unsigned int *_str_len,
+   unsigned int *_radix)
 {
+   assert(_str);
+   assert(_str_len);
+   assert(_radix);
+
unsigned radix = *_radix;
-   if (radix != 0)
-   return;
+   assert(radix == 0 || radix == 8 || radix == 10 || radix == 16);
+
const char *str = *_str;
unsigned str_len = *_str_len;
-   if (str[0] == '0' && (str[1] == 'x' || str[1] == 'X')) {
+
+   const bool has_hex_prefix = (str[0] == '0') && (str[1] == 'x' || str[1] 
== 'X');
+   const bool has_oct_prefix = (str[0] == '0') && (str_len != 1);
+
+   if (has_hex_prefix && (radix == 16 || radix == 0)) {
+   /* OK, detected HEX number, strip the prefix */
radix = 16;
str += 2;
str_len -= 2;
-   } else if ((str[0] == '0') && (str_len != 1)) {
+   } else if (has_oct_prefix && (radix == 8 || radix == 0)) {
+   /* OK, detected an octal number, strip the prefix */
radix = 8;
str += 1;
str_len -= 1;
-   } else
+   } else if (radix == 0) {
+   /* Assume decadic number */
radix = 10;
+   }
+
*_str = str;
*_str_len = str_len;
*_radix = radix;
 }
 
-int str_to_buf(const char *str, unsigned str_len,
-   void *_buf, unsigned buf_len, unsigned radix)
+int str_to_buf(const char *str, void *_buf, unsigned int buf_len,
+   unsigned int radix, unsigned int *_detected_radix)
 {
+   assert(radix == 0 || radix == 8 || radix == 10 || radix == 16);
+
+   unsigned int str_len = strlen(str);
+
str_radix_guess(, _len, );
+   assert(radix != 0);
+
+   if (_detected_radix)
+   *_detected_radix = radix;
 
float factor;
if (radix == 16)
@@ -243,41 +263,70 @@ int str_to_buf(const char *str, unsigned str_len,
else if (radix == 8)
factor = 0.375; /* log(8) / log(256) = 0.375 */
else
-   return 0;
+   assert(false);
 
-   /* copy to zero-terminated buffer */
-   char *charbuf = strndup(str, str_len);
+   const unsigned int b256_len = ceil_f_to_u32(str_len * factor);
+   uint8_t *b256_buf = NULL;
 
-   /* number of digits in base-256 notation */
-   unsigned b256_len = ceil_f_to_u32(str_len * factor);
-   uint8_t *b256_buf = calloc(b256_len, 1);
+/*

[PATCH]: 7e35164103 target: Do not use LOG_USER() for error messages

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8314

-- gerrit

commit 7e3516410337f54a822e38be30bb2ca02350bbe3
Author: Marc Schink 
Date:   Sun Jun 2 14:39:36 2024 +0100

target: Do not use LOG_USER() for error messages

Use LOG_TARGET_ERROR() to print the error messages and additionally add
a reference to the related target.

Change-Id: I06722f3911ef4034fdd05dc9b0e2571b01b657a4
Signed-off-by: Marc Schink 

diff --git a/src/target/target.c b/src/target/target.c
index efc168903b..8ef4bf2cc6 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -2997,14 +2997,14 @@ static int handle_target(void *priv)
target_call_event_callbacks(target, 
TARGET_EVENT_GDB_HALT);
}
if (target->backoff.times > 0) {
-   LOG_USER("Polling target %s failed, trying to 
reexamine", target_name(target));
+   LOG_TARGET_ERROR(target, "Polling failed, 
trying to reexamine");
target_reset_examined(target);
retval = target_examine_one(target);
/* Target examination could have failed due to 
unstable connection,
 * but we set the examined flag anyway to 
repoll it later */
if (retval != ERROR_OK) {
target_set_examined(target);
-   LOG_USER("Examination failed, GDB will 
be halted. Polling again in %dms",
+   LOG_TARGET_ERROR(target, "Examination 
failed, GDB will be halted. Polling again in %dms",
 target->backoff.times * 
polling_interval);
return retval;
}
@@ -4691,9 +4691,8 @@ void target_handle_event(struct target *target, enum 
target_event e)
 
if (retval != JIM_OK) {
Jim_MakeErrorMessage(teap->interp);
-   LOG_USER("Error executing event %s on target 
%s:\n%s",
+   LOG_TARGET_ERROR(target, "Execution of event %s 
failed:\n%s",
  target_event_name(e),
- target_name(target),
  
Jim_GetString(Jim_GetResult(teap->interp), NULL));
/* clean both error code and stacktrace before 
return */
Jim_Eval(teap->interp, "error \"\" \"\"");

-- 

[PATCH]: 8e18ee8b20 server/gdb: Use LOG_TARGET_xxx() to show target name

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8313

-- gerrit

commit 8e18ee8b2090b93e57f7c5f6cdd535a49df59264
Author: Marc Schink 
Date:   Sun Jun 2 12:20:36 2024 +0100

server/gdb: Use LOG_TARGET_xxx() to show target name

The output "gdb port disabled" is confusing without reference to the
target. Use LOG_TARGET_INFO() to output the target name.

While at it, use LOG_TARGET_xxx() for all log statements where the
target name is already used.

Change-Id: I70b134145837db623e008a4a6c0be0008d9a0d87
Signed-off-by: Marc Schink 

diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 5052bf43b2..92a9869056 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -1067,15 +1067,15 @@ static int gdb_new_connection(struct connection 
*connection)
target_state_name(target));
 
if (!target_was_examined(target)) {
-   LOG_ERROR("Target %s not examined yet, refuse gdb connection 
%d!",
- target_name(target), 
gdb_connection->unique_index);
+   LOG_TARGET_ERROR(target, "Target not examined yet, refuse gdb 
connection %d!",
+ gdb_connection->unique_index);
return ERROR_TARGET_NOT_EXAMINED;
}
gdb_actual_connections++;
 
if (target->state != TARGET_HALTED)
-   LOG_WARNING("GDB connection %d on target %s not halted",
-   gdb_actual_connections, 
target_name(target));
+   LOG_TARGET_WARNING(target, "GDB connection %d not halted",
+   gdb_actual_connections);
 
/* DANGER! If we fail subsequently, we must remove this handler,
 * otherwise we occasionally see crashes as the timer can invoke the
@@ -1102,9 +1102,8 @@ static int gdb_connection_closed(struct connection 
*connection)
log_remove_callback(gdb_log_callback, connection);
 
gdb_actual_connections--;
-   LOG_DEBUG("{%d} GDB Close, Target: %s, state: %s, 
gdb_actual_connections=%d",
+   LOG_TARGET_DEBUG(target, "{%d} GDB Close, state: %s, 
gdb_actual_connections=%d",
gdb_connection->unique_index,
-   target_name(target),
target_state_name(target),
gdb_actual_connections);
 
@@ -2344,7 +2343,7 @@ static int smp_reg_list_noread(struct target *target,
}
}
if (!found) {
-   LOG_DEBUG("[%s] %s not found in 
combined list", target_name(target), a->name);
+   LOG_TARGET_DEBUG(target, "%s not found 
in combined list", a->name);
if (local_list_size >= 
combined_allocated) {
combined_allocated *= 2;
local_list = 
realloc(local_list, combined_allocated * sizeof(struct reg *));
@@ -2392,9 +2391,8 @@ static int smp_reg_list_noread(struct target *target,
}
}
if (!found) {
-   LOG_WARNING("Register %s does not exist in %s, 
which is part of an SMP group where "
-   "this register does exist.",
-   a->name, target_name(head->target));
+   LOG_TARGET_WARNING(head->target, "Register %s 
does not exist, which is part of an SMP group where "
+   "this register does exist.", 
a->name);
}
}
free(reg_list);
@@ -3006,17 +3004,17 @@ static bool gdb_handle_vcont_packet(struct connection 
*connection, const char *p
/* simple case, a continue packet */
if (parse[0] == 'c') {
gdb_running_type = 'c';
-   LOG_DEBUG("target %s continue", target_name(target));
+   LOG_TARGET_DEBUG(target, "target continue");
gdb_connection->output_flag = GDB_OUTPUT_ALL;
retval = target_resume(target, 1, 0, 0, 0);
if (retval == ERROR_TARGET_NOT_HALTED)
-   LOG_INFO("target %s was not halted when resume was 
requested", target_name(target));
+   LOG_TARGET_INFO(target, "target was not halted when 
resume was requested");
 
/* poll target in an attempt to make its internal state 
consistent */
if (retval !=

[PATCH]: 8f253e5ca0 configure: show adapter Xilinx XVC/PCIe in the configuration summary

[gerrit]

This is an automated email from Gerrit.

"R. Diez " just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8312

-- gerrit

commit 8f253e5ca0ccf78e78e7a8fa822b7539336d0cdb
Author: R. Diez 
Date:   Sat Jun 1 21:20:31 2024 +0200

configure: show adapter Xilinx XVC/PCIe in the configuration summary

Adapter Xilinx XVC/PCIe was not appearing in the configuration summary
because of the wrong variable name: build_xlnx_pcie_xvc
instead of enable_xlnx_pcie_xvc.

Change-Id: I69ea92f550052b9ce55ce32597ac446a15a87388
Signed-off-by: R. Diez 

diff --git a/configure.ac b/configure.ac
index becc531b0d..aff6f218b3 100644
--- a/configure.ac
+++ b/configure.ac
@@ -104,12 +104,18 @@ AS_IF([test -x "$srcdir/guess-rev.sh"], [
 AC_MSG_RESULT([$build_release])
 
 # Adapter drivers
-# 1st column -- configure option
-# 2nd column -- description
-# 3rd column -- symbol used for both config.h and automake
+# 1st column -- Basename for the configure option generated with AC_ARG_ENABLE.
+#   For example, "buspirate" generates options 
"--enable-buspirate[=yes/no]"
+#   and "--disable-buspirate".
+# 2nd column -- Description for the configure option. For example, "Bus Pirate"
+#   generates "Enable building support for the Bus Pirate (default 
is auto)".
+# 3rd column -- Basename for the config.h and Automake symbols.
+#   For example, basename "BUS_PIRATE" generates 
"BUILD_BUS_PIRATE" with AC_DEFINE
+#   for config.h and "BUS_PIRATE" with AM_CONDITIONAL for Automake.
 m4_define([ADAPTER_ARG], [m4_argn([1], $1)])
 m4_define([ADAPTER_DESC], [m4_argn([2], $1)])
 m4_define([ADAPTER_SYM], [m4_argn([3], $1)])
+# AC_ARG_ENABLE uses prefix "enable_" to name the corresponding option 
variable.
 m4_define([ADAPTER_VAR], [enable_[]ADAPTER_ARG($1)])
 m4_define([ADAPTER_OPT], [m4_translit(ADAPTER_ARG($1), [_], [-])])
 
@@ -267,7 +273,7 @@ AC_ARG_ADAPTERS([
   LIBJAYLINK_ADAPTERS
   ],[auto])
 
-AC_ARG_ADAPTERS([DUMMY_ADAPTER],[no])
+AC_ARG_ADAPTERS([DUMMY_ADAPTER, PCIE_ADAPTERS],[no])
 
 AC_ARG_ENABLE([parport],
   AS_HELP_STRING([--enable-parport], [Enable building the pc parallel port 
driver]),
@@ -340,10 +346,6 @@ AC_ARG_ENABLE([sysfsgpio],
   AS_HELP_STRING([--enable-sysfsgpio], [Enable building support for 
programming driven via sysfs gpios.]),
   [build_sysfsgpio=$enableval], [build_sysfsgpio=no])
 
-AC_ARG_ENABLE([xlnx_pcie_xvc],
-  AS_HELP_STRING([--enable-xlnx-pcie-xvc], [Enable building support for Xilinx 
XVC/PCIe.]),
-  [build_xlnx_pcie_xvc=$enableval], [build_xlnx_pcie_xvc=no])
-
 AS_CASE([$host_os],
   [linux*], [],
   [
@@ -355,9 +357,9 @@ AS_CASE([$host_os],
   AC_MSG_ERROR([linuxgpiod is only available on linux])
 ])
 
-AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [
-  AC_MSG_ERROR([xlnx_pcie_xvc is only available on linux])
-])
+AS_IF([test "x$enable_xlnx_pcie_xvc" = "xyes"], [
+ AC_MSG_ERROR([xlnx_pcie_xvc is only available on linux])
+   ])
 
 AS_CASE([$host_os], [freebsd*], [],
 [
@@ -610,13 +612,6 @@ AS_IF([test "x$build_sysfsgpio" = "xyes"], [
   AC_DEFINE([BUILD_SYSFSGPIO], [0], [0 if you don't want SysfsGPIO driver.])
 ])
 
-AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [
-  build_xlnx_pcie_xvc=yes
-  AC_DEFINE([BUILD_XLNX_PCIE_XVC], [1], [1 if you want the Xilinx XVC/PCIe 
driver.])
-], [
-  AC_DEFINE([BUILD_XLNX_PCIE_XVC], [0], [0 if you don't want Xilinx XVC/PCIe 
driver.])
-])
-
 PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [
use_libusb1=yes
AC_DEFINE([HAVE_LIBUSB1], [1], [Define if you have libusb-1.x])
@@ -678,11 +673,11 @@ PKG_CHECK_MODULES([LIBGPIOD], [libgpiod < 2.0], [
 PKG_CHECK_MODULES([LIBJAYLINK], [libjaylink >= 0.2],
[use_libjaylink=yes], [use_libjaylink=no])
 
-# Arg $1: The adapter name, used to derive option and variable names for the 
adapter.
-# Arg $2: Whether the adapter can be enabled, for example, because
-# its prerequisites are installed in the system.
+# Arg $1: An array of adapter triplets, used to derive option and variable 
names for each adapter.
+# Arg $2: Whether the adapters can be enabled, for example, because
+# their prerequisites are installed in the system.
 # Arg $3: What prerequisites are missing, to be shown in an error message
-# if the adapter was requested but cannot be enabled.
+# if an adapter was requested but cannot be enabled.
 m4_define([PROCESS_ADAPTERS], [
   m4_foreach([adapter], [$1], [
AS_IF([test $2], [
@@ -709,7 +704,7 @@ PROCESS_ADAPTERS([LIBFTDI_ADAPTERS], ["x$use_libftdi" = 
"xyes"], [libftdi])
 PROCESS_ADAPTERS([LIBFTDI_USB1_ADAPTERS], ["x$use_libftdi" = "xyes" -a 
"x$use_libusb1&q

[PATCH]: 671edc2d92 flash/nor/tcl: Fix memory leak of flash bank name

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8303

-- gerrit

commit 671edc2d92a4f8dafc7a87eaa7247b7b18c5a994
Author: Marc Schink 
Date:   Sat Jun 1 10:41:29 2024 +0200

flash/nor/tcl: Fix memory leak of flash bank name

Change-Id: I54cd1ee479a0570ae849a71be47c82eebd1ae454
Signed-off-by: Marc Schink 

diff --git a/src/flash/nor/tcl.c b/src/flash/nor/tcl.c
index 720fb60a1b..6ac932be7f 100644
--- a/src/flash/nor/tcl.c
+++ b/src/flash/nor/tcl.c
@@ -1298,6 +1298,7 @@ COMMAND_HANDLER(handle_flash_bank_command)
if (retval != ERROR_OK) {
LOG_ERROR("'%s' driver rejected flash bank at " TARGET_ADDR_FMT
"; usage: %s", driver_name, c->base, 
driver->usage);
+   free(c->name);
free(c);
return retval;
}

-- 

[PATCH]: 10904dec8b atsamv: add support for user signature partition write

[gerrit]

This is an automated email from Gerrit.

"Michal Lenc " just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8302

-- gerrit

commit 10904dec8b59995e1fdfb02e0fe88f1f9a2e8705
Author: Michal Lenc 
Date:   Fri May 31 11:27:38 2024 +0200

atsamv: add support for user signature partition write

Embedded flash also has a user signature area. This is a 512
bytes large page whose data are not erased by asserting ERASE pin or by
software ERASE command. It may be used to store configuration, keys,
trimming values etc.

This commit adds option to clear and write this area from OpenOCD.

Change-Id: If870aa85938b9cccd94f958dd1f3d93dbdf779f0
Signed-off-by: Michal Lenc 

diff --git a/src/flash/nor/atsamv.c b/src/flash/nor/atsamv.c
index 24c432cba3..6d812eb827 100644
--- a/src/flash/nor/atsamv.c
+++ b/src/flash/nor/atsamv.c
@@ -23,6 +23,7 @@
 #endif
 
 #include "imp.h"
+#include 
 #include 
 
 #define REG_NAME_WIDTH  (12)
@@ -40,6 +41,10 @@
 #define SAMV_EFC_FCMD_SFB(0xB) /* (EFC) Set Fuse Bit */
 #define SAMV_EFC_FCMD_CFB(0xC) /* (EFC) Clear Fuse Bit */
 #define SAMV_EFC_FCMD_GFB(0xD) /* (EFC) Get Fuse Bit */
+#define SAMV_EFC_FCMD_WUS(0x12)/* (EFC) Write User Signature */
+#define SAMV_EFC_FCMD_EUS(0x13)/* (EFC) Erase User Signature */
+#define SAMV_EFC_FCMD_STU(0x14)/* (EFC) Start Read User Signature */
+#define SAMV_EFC_FCMD_SPUS   (0x15)/* (EFC) Stop Read User Signature */
 
 #define OFFSET_EFC_FMR0
 #define OFFSET_EFC_FCR4
@@ -230,6 +235,50 @@ static int samv_set_gpnvm(struct target *target, unsigned 
gpnvm)
return r;
 }
 
+static int samv_erase_user_signature(struct target *target)
+{
+   int r;
+
+   r = samv_efc_perform_command(target, SAMV_EFC_FCMD_EUS, 0, NULL);
+   if (r != ERROR_OK)
+   LOG_ERROR("error performing user signature write");
+
+   return r;
+}
+
+static int samv_set_user_signature(struct target *target,
+   const uint8_t *buffer, ssize_t size)
+{
+   const uint32_t addr = SAMV_FLASH_BASE;
+   int r;
+
+   if (size > SAMV_PAGE_SIZE)
+   return ERROR_FAIL;
+
+   /* We need to erase user signature before writing it. This is not 
described
+* in the datasheet, but the results are not correct unless erase is 
done
+* prior to write operation.
+*/
+   r = samv_erase_user_signature(target);
+   if (r != ERROR_OK) {
+   LOG_ERROR("error performing user signature erase");
+   return r;
+   }
+
+   ssize_t write_size = (size + sizeof(uint32_t) - 1) / sizeof(uint32_t);
+   r = target_write_memory(target, addr, sizeof(uint32_t), write_size, 
buffer);
+   if (r != ERROR_OK) {
+   LOG_ERROR("failed to buffer page at 0x%08x", (unsigned 
int)addr);
+   return r;
+   }
+
+   r = samv_efc_perform_command(target, SAMV_EFC_FCMD_WUS, 0, NULL);
+   if (r != ERROR_OK)
+   LOG_ERROR("error performing user signature write");
+
+   return r;
+}
+
 static int samv_flash_unlock(struct target *target,
unsigned start_sector, unsigned end_sector)
 {
@@ -660,6 +709,64 @@ showall:
return r;
 }
 
+COMMAND_HANDLER(samv_handle_user_signature_command)
+{
+   struct flash_bank *bank = get_flash_bank_by_num_noprobe(0);
+   if (!bank)
+   return ERROR_FAIL;
+   struct samv_flash_bank *samv_info = bank->driver_priv;
+   struct target *target = bank->target;
+
+   if (target->state != TARGET_HALTED) {
+   LOG_ERROR("target not halted");
+   return ERROR_TARGET_NOT_HALTED;
+   }
+
+   FILE *fp;
+   ssize_t retval;
+   uint8_t buffer[SAMV_PAGE_SIZE];
+   int r;
+   if (!samv_info->probed) {
+   r = samv_auto_probe(bank);
+   if (r != ERROR_OK)
+   return r;
+   }
+
+   switch (CMD_ARGC) {
+   case 0:
+   command_print(CMD, "[('clr'|'set [filename]')]");
+   break;
+   case 1:
+   if (!strcmp(CMD_ARGV[0], "clr")) {
+   samv_erase_user_signature(target);
+   } else {
+   command_print(CMD, "[('clr'|'set 
[filename]')]");
+   }
+   break;
+   case 2:
+   if (!strcmp(CMD_ARGV[0], "set")) {
+   fp = open_file_from_path(CMD_ARGV[1], "r");
+   if (fp == NULL) {
+   r = ERROR_FAIL;
+   break;
+   

[PATCH]: 2a27638064 fix GCC's `-Wcalloc-transposed-args` warning

[gerrit]

This is an automated email from Gerrit.

"Evgeniy Naydanov " just uploaded a new patch 
set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8301

-- gerrit

commit 2a27638064736569f74be62f2734a6d38c70c9d4
Author: Evgeniy Naydanov 
Date:   Mon May 27 14:54:05 2024 +0300

fix GCC's `-Wcalloc-transposed-args` warning

GCC 14.1.0 warns about calls to `calloc()` with element size as the
first argument.
Please see: 
https://gcc.gnu.org/onlinedocs/gcc-14.1.0/gcc/Warning-Options.html#index-Wcalloc-transposed-args

Change-Id: I7d44a74a003ee6ec49d165f91727972478214587
Signed-off-by: Evgeniy Naydanov 

diff --git a/src/flash/nor/ambiqmicro.c b/src/flash/nor/ambiqmicro.c
index 2b458bc8fd..bb893778ce 100644
--- a/src/flash/nor/ambiqmicro.c
+++ b/src/flash/nor/ambiqmicro.c
@@ -124,7 +124,7 @@ FLASH_BANK_COMMAND_HANDLER(ambiqmicro_flash_bank_command)
if (CMD_ARGC < 6)
return ERROR_COMMAND_SYNTAX_ERROR;
 
-   ambiqmicro_info = calloc(sizeof(struct ambiqmicro_flash_bank), 1);
+   ambiqmicro_info = calloc(1, sizeof(struct ambiqmicro_flash_bank));
 
bank->driver_priv = ambiqmicro_info;
 
diff --git a/src/flash/nor/at91sam7.c b/src/flash/nor/at91sam7.c
index 6879a1bf23..86c80765fc 100644
--- a/src/flash/nor/at91sam7.c
+++ b/src/flash/nor/at91sam7.c
@@ -560,7 +560,7 @@ static int at91sam7_read_part_info(struct flash_bank *bank)
if (bnk > 0) {
if (!t_bank->next) {
/* create a new flash bank element */
-   struct flash_bank *fb = calloc(sizeof(struct 
flash_bank), 1);
+   struct flash_bank *fb = calloc(1, sizeof(struct 
flash_bank));
if (!fb) {
LOG_ERROR("No memory for flash bank");
return ERROR_FAIL;
@@ -748,7 +748,7 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command)
if (bnk > 0) {
if (!t_bank->next) {
/* create a new bank element */
-   struct flash_bank *fb = calloc(sizeof(struct 
flash_bank), 1);
+   struct flash_bank *fb = calloc(1, sizeof(struct 
flash_bank));
if (!fb) {
LOG_ERROR("No memory for flash bank");
return ERROR_FAIL;
diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c
index e8074e35bb..fee36444e6 100644
--- a/src/flash/nor/kinetis.c
+++ b/src/flash/nor/kinetis.c
@@ -930,7 +930,7 @@ FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
k_chip = kinetis_get_chip(target);
 
if (!k_chip) {
-   k_chip = calloc(sizeof(struct kinetis_chip), 1);
+   k_chip = calloc(1, sizeof(struct kinetis_chip));
if (!k_chip) {
LOG_ERROR("No memory");
return ERROR_FAIL;
@@ -1031,7 +1031,7 @@ static int kinetis_create_missing_banks(struct 
kinetis_chip *k_chip)
 bank_idx - k_chip->num_pflash_blocks);
}
 
-   bank = calloc(sizeof(struct flash_bank), 1);
+   bank = calloc(1, sizeof(struct flash_bank));
if (!bank)
return ERROR_FAIL;
 
diff --git a/src/flash/nor/max32xxx.c b/src/flash/nor/max32xxx.c
index 51d6ae271a..59a14af8b8 100644
--- a/src/flash/nor/max32xxx.c
+++ b/src/flash/nor/max32xxx.c
@@ -87,7 +87,7 @@ FLASH_BANK_COMMAND_HANDLER(max32xxx_flash_bank_command)
return ERROR_FLASH_BANK_INVALID;
}
 
-   info = calloc(sizeof(struct max32xxx_flash_bank), 1);
+   info = calloc(1, sizeof(struct max32xxx_flash_bank));
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], info->flash_size);
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[6], info->flc_base);
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[7], info->sector_size);
diff --git a/src/flash/nor/msp432.c b/src/flash/nor/msp432.c
index 5e2935d02b..b5e2b0bf86 100644
--- a/src/flash/nor/msp432.c
+++ b/src/flash/nor/msp432.c
@@ -937,7 +937,7 @@ static int msp432_probe(struct flash_bank *bank)
 
if (is_main && MSP432P4 == msp432_bank->family_type) {
/* Create the info flash bank needed by MSP432P4 variants */
-   struct flash_bank *info = calloc(sizeof(struct flash_bank), 1);
+   struct flash_bank *info = calloc(1, sizeof(struct flash_bank));
if (!info)
return ERROR_FAIL;
 
diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c
index 972686e3f3..eab6244d43 100644
--- a/src/flash/nor/stellaris.c
+++ b/src/flash/nor/stellaris.c
@@ -453,7 +453,7 @@ FLASH_BANK_COMMAND_HANDL

[PATCH]: 68fbf3c261 target/arm_tpiu_swo: Fix memory leak on error

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8300

-- gerrit

commit 68fbf3c26106efbac396ee57d0238b37cce764b5
Author: Antonio Borneo 
Date:   Sun May 26 12:38:43 2024 +0200

target/arm_tpiu_swo: Fix memory leak on error

In case of fail to allocate 'obj->name', the memory allocated for
'obj->out_filename' is not freed, thus leaking.

Since 'obj' is allocated with calloc(), thus zeroed, switch to use
the common error exit path for both allocations of 'obj->name' and
'obj->out_filename'.

Fixes: 2506ccb50915 ("target/arm_tpiu_swo: Fix division by zero")
Change-Id: I412f66ddd7bf7d260cee495324058482b26ff0c5
Signed-off-by: Antonio Borneo 

diff --git a/src/target/arm_tpiu_swo.c b/src/target/arm_tpiu_swo.c
index b5a4882011..55a9778447 100644
--- a/src/target/arm_tpiu_swo.c
+++ b/src/target/arm_tpiu_swo.c
@@ -965,8 +965,7 @@ static int jim_arm_tpiu_swo_create(Jim_Interp *interp, int 
argc, Jim_Obj *const
obj->out_filename = strdup("external");
if (!obj->out_filename) {
LOG_ERROR("Out of memory");
-   free(obj);
-   return JIM_ERR;
+   goto err_exit;
}
 
Jim_Obj *n;
@@ -974,8 +973,7 @@ static int jim_arm_tpiu_swo_create(Jim_Interp *interp, int 
argc, Jim_Obj *const
obj->name = strdup(Jim_GetString(n, NULL));
if (!obj->name) {
LOG_ERROR("Out of memory");
-   free(obj);
-   return JIM_ERR;
+   goto err_exit;
}
 
/* Do the rest as "configure" options */

-- 

[PATCH]: 25eb58c7e9 doc: Minimally describe the BSCAN tunnel interface.

[gerrit]

This is an automated email from Gerrit.

"Bernhard Rosenkränzer " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8297

-- gerrit

commit 25eb58c7e9c19024ab0abde460789b00ee336e9a
Author: Tim Newsome 
Date:   Mon Sep 21 14:10:27 2020 -0700

doc: Minimally describe the BSCAN tunnel interface.

Add minimal documentation for the BSCAN tunnel interface.
This is based on Tim Newsome 's work on
the RISC-V fork.

Change-Id: I5e0cd6972cb90649670249765e9bb30c2847eea6
Signed-off-by: Tim Newsome 
Signed-off-by: Bernhard Rosenkränzer 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 55e6e76808..7b76360762 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -11280,8 +11280,22 @@ and DBUS registers, respectively.
 @end deffn
 
 @deffn {Command} {riscv use_bscan_tunnel} value
-Enable or disable use of a BSCAN tunnel to reach DM.  Supply the width of
-the DM transport TAP's instruction register to enable.  Supply a value of 0 to 
disable.
+Enable or disable use of a BSCAN tunnel to reach the Debug Module. Supply the
+width of the DM transport TAP's instruction register to enable. Supply a
+value of 0 to disable.
+
+This BSCAN tunnel interface is specific to SiFive IP. Anybody may implement
+it, but currently there is no good documentation on it. In a nutshell, this
+feature scans USER4 into a Xilinx TAP to select the tunnel device (assuming
+hardware is present and it is hooked up to the Xilinx USER4 IR) and
+encapsulates a tunneled scan directive into a DR scan into the Xilinx TAP. A
+tunneled DR scan consists of:
+@enumerate
+@item 1 bit that selects IR when 0, or DR when 1
+@item 7 bits that encode the width of the desired tunneled scan
+@item A width+1 stream of bits for the tunneled TDI. The plus one is because 
there is a one-clock skew between TDI of Xilinx chain and TDO from tunneled 
chain.
+@item 3 bits of zero that the tunnel uses to go back to idle state.
+@end enumerate
 @end deffn
 
 @deffn {Command} {riscv set_ebreakm} on|off

-- 

[PATCH]: 5bb9894c0d tcl/board: Add config for NXP FRDM-KV31F

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8299

-- gerrit

commit 5bb9894c0d4916461da00457d71b52bfb7b8efc2
Author: Marc Schink 
Date:   Sat May 25 18:57:10 2024 +0200

tcl/board: Add config for NXP FRDM-KV31F

Change-Id: I4d7cd1bcadd8159e4830107c2788708aef02add0
Signed-off-by: Marc Schink 

diff --git a/tcl/board/nxp/frdm-kv31f-jlink.cfg 
b/tcl/board/nxp/frdm-kv31f-jlink.cfg
new file mode 100644
index 00..e55a01cd70
--- /dev/null
+++ b/tcl/board/nxp/frdm-kv31f-jlink.cfg
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Configuration file for NXP FRDM-KV31F development boards.
+#
+# This configuration file is only for FRDM-KV31F development boards with the
+# SEGGER J-Link OpenSDA firmware, see:
+# 
https://www.segger.com/products/debug-probes/j-link/models/other-j-links/opensda-sda-v2/
+
+source [find interface/jlink.cfg]
+
+# Set working area size to 32 KiB.
+set WORKAREASIZE 0x8000
+
+# Set the chip name.
+set CHIPNAME kv31f
+
+transport select swd
+
+source [find target/kx.cfg]
+
+reset_config srst_only

-- 

[PATCH]: 42de5cb52c tcl/board: Add config for NXP FRDM-KV11Z

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8298

-- gerrit

commit 42de5cb52c9458257520f7762bc9eca010d8dd31
Author: Marc Schink 
Date:   Sat May 25 18:55:23 2024 +0200

tcl/board: Add config for NXP FRDM-KV11Z

Change-Id: I9cd497a085f8f9c7854ae3b96e60a73b3b050d0e
Signed-off-by: Marc Schink 

diff --git a/tcl/board/nxp/frdm-kv11z-jlink.cfg 
b/tcl/board/nxp/frdm-kv11z-jlink.cfg
new file mode 100644
index 00..725a37b9e6
--- /dev/null
+++ b/tcl/board/nxp/frdm-kv11z-jlink.cfg
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Configuration file for NXP FRDM-KV11Z development boards.
+#
+# This configuration file is only for FRDM-KV11Z development boards with the
+# SEGGER J-Link OpenSDA firmware, see:
+# 
https://www.segger.com/products/debug-probes/j-link/models/other-j-links/opensda-sda-v2/
+
+source [find interface/jlink.cfg]
+
+# Set working area size to 16 KiB.
+set WORKAREASIZE 0x4000
+
+# Set the chip name.
+set CHIPNAME kv11z
+
+transport select swd
+
+source [find target/kx.cfg]
+
+reset_config srst_only

-- 

[PATCH]: d28e368f1e target/riscv: support for smp group manipulation

[gerrit]

This is an automated email from Gerrit.

"Bernhard Rosenkränzer " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8296

-- gerrit

commit d28e368f1eca0d25a87ed6e699d1f5a09dcadf16
Author: Parshintsev Anatoly 
Date:   Thu Jun 22 19:28:52 2023 +0300

target/riscv: support for smp group manipulation

this functionality allows to query if a target belongs to some smp group
and to dynamically turn on/off smp-specific behavior

Change-Id: I67bafb1817c621a38ae4a2f55e12e4143e992c4e
Signed-off-by: Parshintsev Anatoly 
Signed-off-by: Bernhard Rosenkränzer 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 55e6e76808..676392f50f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -11279,6 +11279,18 @@ When utilizing version 0.11 of the RISC-V Debug 
Specification,
 and DBUS registers, respectively.
 @end deffn
 
+@deffn {Command} {riscv smp} [on|off]
+Display, enable or disable SMP handling mode. This command is needed only if
+user wants to temporary @b{disable} SMP handling for an existing SMP group
+(see @code{aarch64 smp} for additional information). To define an SMP
+group the command @code{target smp} should be used.
+@end deffn
+
+@deffn {Command} {riscv smp_gdb} [core_id]
+Display/set the current core displayed in GDB. This is needed only if
+@code{riscv smp} was used.
+@end deffn
+
 @deffn {Command} {riscv use_bscan_tunnel} value
 Enable or disable use of a BSCAN tunnel to reach DM.  Supply the width of
 the DM transport TAP's instruction register to enable.  Supply a value of 0 to 
disable.
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 9cd4922d20..511a3c6c32 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -3049,6 +3049,9 @@ static const struct command_registration 
riscv_command_handlers[] = {
.usage = "",
.chain = semihosting_common_handlers
},
+   {
+   .chain = smp_command_handlers
+   },
COMMAND_REGISTRATION_DONE
 };
 

-- 

[PATCH]: 85c2b3aab9 target/riscv: hide_csrs configuration option

[gerrit]

This is an automated email from Gerrit.

"Bernhard Rosenkränzer " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8295

-- gerrit

commit 85c2b3aab9946e9bc0d2667dfd22089ef1024a12
Author: Anatoly Parshintsev <114445139+aap...@users.noreply.github.com>
Date:   Wed Feb 15 20:53:37 2023 +0300

target/riscv: hide_csrs configuration option

This option allows users to mark certain CSRs as hidden so they could be
expluded from *reg* output and target.xml

This is based on the work by Anatoly Parshintsev 
<114445139+aap...@users.noreply.github.com>
and Jan Matyas <50193733+janmatcoda...@users.noreply.github.com> in the
RISC-V fork of OpenOCD.

Change-Id: I8b4a166c933e7de752b193a855afe24ac51356de
Signed-off-by: Bernhard Rosenkränzer 
Signed-off-by: Anatoly Parshintsev 
<114445139+aap...@users.noreply.github.com>
Co-authored-by: Jan Matyas <50193733+janmatcoda...@users.noreply.github.com>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 55e6e76808..ad79c98399 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -11207,10 +11207,28 @@ $_TARGETNAME expose_custom 32=myregister
 @end example
 @end deffn
 
+<<<<<<< HEAD
 @deffn {Command} {riscv info}
 Displays some information OpenOCD detected about the target.
 @end deffn
 
+@deffn {Config Command} {riscv hide_csrs} n[-m] [,n1[-m1]] [...]
+The RISC-V Specification defines many CSRs, and we may want to avoid showing
+each CSR to the user, as they may not be relevant to the task at hand. For
+example, we may choose not to show trigger or PMU registers for simple
+debugging scenarios. This command allows to mark individual registers or
+register ranges (inclusive) as "hidden". Such hidden registers won't be
+displayed in GDB or @code{reg} command output.
+
+@example
+
+# Hide range of RISC-V CSRs
+# CSR_TSELECT - 1952 and CSR_TDATA1 - 1953
+$_TARGETNAME riscv hide_csrs 1952-1953
+
+@end example
+@end deffn
+
 @deffn {Command} {riscv reset_delays} [wait]
 OpenOCD learns how many Run-Test/Idle cycles are required between scans to 
avoid
 encountering the target being busy. This command resets those learned values
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 9cd4922d20..b5bdeaafcf 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -502,6 +502,11 @@ static void riscv_deinit_target(struct target *target)
return;
 
range_list_t *entry, *tmp;
+   list_for_each_entry_safe(entry, tmp, >hide_csr, list) {
+   free(entry->name);
+   free(entry);
+   }
+
list_for_each_entry_safe(entry, tmp, >expose_csr, list) {
free(entry->name);
free(entry);
@@ -2592,6 +2597,26 @@ COMMAND_HANDLER(riscv_set_expose_custom)
return ret;
 }
 
+COMMAND_HANDLER(riscv_hide_csrs)
+{
+   if (CMD_ARGC == 0) {
+   LOG_ERROR("Command expects parameters");
+   return ERROR_COMMAND_SYNTAX_ERROR;
+   }
+
+   struct target *target = get_current_target(CMD_CTX);
+   RISCV_INFO(info);
+   int ret = ERROR_OK;
+
+   for (unsigned int i = 0; i < CMD_ARGC; i++) {
+   ret = parse_ranges(>hide_csr, CMD_ARGV[i], "csr", 0xfff);
+   if (ret != ERROR_OK)
+   break;
+   }
+
+   return ret;
+}
+
 COMMAND_HANDLER(riscv_authdata_read)
 {
unsigned int index = 0;
@@ -2918,6 +2943,16 @@ static const struct command_registration 
riscv_exec_command_handlers[] = {
"expose. custom0 is accessed as abstract register 
number 0xc000, "
"etc. This must be executed before `init`."
},
+   {
+   .name = "hide_csrs",
+   .handler = riscv_hide_csrs,
+   .mode = COMMAND_CONFIG,
+   .usage = "{n0|n-m0}[,n1|n-m1]..",
+   .help = "Configure a list of inclusive ranges for CSRs to hide 
from gdb. "
+   "Hidden registers are still available, but are not 
listed in "
+   "gdb target description and `reg` command output. "
+   "This must be executed before `init`."
+   },
{
.name = "authdata_read",
.handler = riscv_authdata_read,
@@ -3141,6 +3176,7 @@ static void riscv_info_init(struct target *target, struct 
riscv_info *r)
 
INIT_LIST_HEAD(>expose_csr);
INIT_LIST_HEAD(>expose_custom);
+   INIT_LIST_HEAD(>hide_csr);
 }
 
 static int riscv_resume_go_all_harts(struct target *target)
@@ -4350,6 +4386,14 @@ int riscv_init_registers(struct target *target)
r->exist = true;
  

[PATCH]: 45a8bbad04 jtag/drivers/ftdi: Use command_print instead of LOG_USER for get_signal

[gerrit]

This is an automated email from Gerrit.

"Mark Featherston " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8294

-- gerrit

commit 45a8bbad042640702da238721640d465520330fe
Author: Mark Featherston 
Date:   Thu May 23 13:24:32 2024 -0700

jtag/drivers/ftdi: Use command_print instead of LOG_USER for get_signal

LOG_USER only outputs to user interfaces, but leaves no way to get the
FTDI inputs over the RPC interface. Switch to command_print so this
string goes to both logs and the RPC interface.

Change-Id: I99024194b6687b88d354ef278aa25f372c862c22
Signed-off-by: Mark Featherston 

diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index 58f83af592..ea0dd9d5ab 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -860,7 +860,7 @@ COMMAND_HANDLER(ftdi_handle_get_signal_command)
if (ret != ERROR_OK)
return ret;
 
-   LOG_USER("Signal %s = %#06x", sig->name, sig_data);
+   command_print(CMD, "Signal %s = %#06x", sig->name, sig_data);
 
return ERROR_OK;
 }

-- 

[PATCH]: a7983d35b3 target: reset examine after assert_reset

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8293

-- gerrit

commit a7983d35b3087b8d2f50427f1a1f3af418cbefdc
Author: Antonio Borneo 
Date:   Mon Apr 8 17:42:52 2024 +0200

target: reset examine after assert_reset

For some target, the API assert_reset() checks if the target has
been examined, with target_was_examined(), to perform conditional
operations like:
- assert adapter's srst;
- write some register to catch the reset vector;
- invalidate the register cache.

Targets created with -defer-examine gets the examine flag reset
right before entering in their assert_reset(), disrupting the
actions above.

For targets created with -defer-examine, move the reset examine
after the assert_reset().

Change-Id: If96e7876dcace8905165115292deb93a3e45cb36
Signed-off-by: Antonio Borneo 

diff --git a/src/target/target.c b/src/target/target.c
index 5168305dee..243f077800 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -5365,17 +5365,19 @@ COMMAND_HANDLER(handle_target_reset)
return ERROR_FAIL;
}
 
-   if (target->defer_examine)
-   target_reset_examined(target);
-
/* determine if we should halt or not. */
target->reset_halt = (a != 0);
/* When this happens - all workareas are invalid. */
target_free_all_working_areas_restore(target, 0);
 
/* do the assert */
-   if (n->value == NVP_ASSERT)
-   return target->type->assert_reset(target);
+   if (n->value == NVP_ASSERT) {
+   int retval = target->type->assert_reset(target);
+   if (target->defer_examine)
+   target_reset_examined(target);
+   return retval;
+   }
+
return target->type->deassert_reset(target);
 }
 

-- 

[PATCH]: 976eb393d5 contrib: Drop 'coresight-trace.txt'

[gerrit]

This is an automated email from Gerrit.

"zapb " just uploaded a new patch set to Gerrit, which you can 
find at https://review.openocd.org/c/openocd/+/8292

-- gerrit

commit 976eb393d51bfacf1aa58fd7c66f50c536c4385e
Author: Marc Schink 
Date:   Mon May 20 11:32:19 2024 +0200

contrib: Drop 'coresight-trace.txt'

This document is outdated and has broken text formatting. It also
provides no useful information to users nor developers, at worst it
causes confusion. For that reason, drop this file.

Change-Id: Id5ee1f6e74d1a641c60d897f114bb97f5fd48e5b
Signed-off-by: Marc Schink 

diff --git a/contrib/coresight-trace.txt b/contrib/coresight-trace.txt
deleted file mode 100644
index 517119b6f6..00
--- a/contrib/coresight-trace.txt
+++ /dev/null
@@ -1,68 +0,0 @@
-+OpenOCD and CoreSight Tracing
-+
-Many recent ARM chips  (Using e..g. Cortex-M3 and
-Cortex-M4 cores) support CoreSight debug/trace.
-This note sketches an approach currently planned for those cores
-with OpenOCD.
-
- This tracing data can help debug and tune ARM software, but not
-all cores support tracing.  Some support more extensive tracing
-other cores with trace support +should be able to use the same
-approach and maybe some of the same analysis code.
-
-+the Cortex-M3 is assumed here to be the
-+core in use, for simplicity and to reflect current OpenOCD users.
-
-
-This note summarizes a software model to generate, collect, and
-analyze such trace data .  That is not fully implemented as of early
-January 2011, +and thus is not *yet* usable.
-+
-+
-+Some microcontroller cores support a low pin-count Single-wire trace,
-with a mode where +trace data is emitted (usually to a UART.  To use
-this mode, +SWD must be in use.
-+At this writing, OpenOCD SWD support is not yet complete either.
-
-(There are also multi-wire trace ports requiring more complex debug
-adapters than OpenOCD currently supports, and offering richer data.
-+
-+
-+* ENABLING involves activating  SWD and (single wire) trace.
-+
-+current expectations are that OpenOCD itself will handle enabling;
-activating single wire trace involves a debug adapter interaction, and
-collecting that trace data requires particular (re)wiring.
-+
-+* CONFIGURATION involves setting up ITM  and/or ETM modules to emit the
-+desired data from the Cortex core.  (This might include dumping
-+event counters printf-style messages; code profiling; and more.  Not all
-+cores offer the same trace capabilities.
-+
-+current expectations are that Tcl scripts will be used to configure these
-+modules for the desired tracing, by direct writes to registers.  In some
-+cases (as with RTOS event tracking and similar messaging, this might
-+be  augmented or replaced by user code running on the ARM core.
-+
-+COLLECTION involves reading that trace data, probably through UART, and
-+saving it in a useful format to analyse  For now, deferred analysis modes
-are assumed, not than real-time or interactive ones.
-+
-+
-+current expectations are to to dump data in text using contrib/itmdump.c
-+or derived tools, and to post-process it into reports.  Such reports might
-+include program messaging (such as application data streams via ITM, maybe
-+using printf type messaging; code coverage analysis or so forth.  Recent
-+versions of CMSIS software reserve some ITM codespace for RTOS  event
-tracing and include ITM messaging support.
-Clearly some of that data would be valuable for interactive debugging.
-+
-+Should someone get ambitious, GUI reports should be possible.  GNU tools
-+for simpler reports like gprof may be simpler to support at first.
-+In any case, OpenOCD is not currently GUI-oriented.  Accordingly, we now
-+expect any such graphics to come from postprocessing.
-
- measurements for RTOS event timings should also be easy to collect.
-+Examples include context and message switch times, as well as times
-for application interactions.
-+

-- 

[PATCH]: b54eda6eb8 target: Add -no-autoincr option to mdX, mwX and {read, write}_memory

[gerrit]

This is an automated email from Gerrit.

"Bernhard Rosenkränzer " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8290

-- gerrit

commit b54eda6eb8119852e900b467ec3a9eb03d53d2f3
Author: Bernhard Rosenkränzer 
Date:   Sun May 19 23:27:32 2024 +0200

target: Add -no-autoincr option to mdX, mwX and {read,write}_memory

This is the third in a series of 4 patches replacing
https://review.openocd.org/c/openocd/+/8259

Change-Id: I9a543b87ae568a8a014dbf4f17e504dccfa46e0a
Signed-off-by: Bernhard Rosenkränzer 
Cc: Antonio Borneo 

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 55e6e76808..2eccabedc7 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -9152,11 +9152,12 @@ get_reg @{pc sp@}
 @end example
 @end deffn
 
-@deffn {Command} {write_memory} address width data ['phys']
+@deffn {Command} {write_memory} [-no-autoincr] address width data ['phys']
 This function provides an efficient way to write to the target memory from a 
Tcl
 script.
 
 @itemize
+@item @option{-no-autoincr} if specified, the address is not auto-incremented 
after writing the contents.
 @item @var{address} ... target memory address
 @item @var{width} ... memory access bit size, can be 8, 16, 32 or 64
 @item @var{data} ... Tcl list with the elements to write
@@ -9171,12 +9172,13 @@ write_memory 0x2000 32 @{0xdeadbeef 0x00230500@}
 @end example
 @end deffn
 
-@deffn {Command} {read_memory} address width count ['phys']
+@deffn {Command} {read_memory} [-no-autoincr] address width count ['phys']
 This function provides an efficient way to read the target memory from a Tcl
 script.
 A Tcl list containing the requested memory elements is returned by this 
function.
 
 @itemize
+@item @option{-no-autoincr} if specified, the address is not auto-incremented 
after reading the contents.
 @item @var{address} ... target memory address
 @item @var{width} ... memory access bit size, can be 8, 16, 32 or 64
 @item @var{count} ... number of elements to read
@@ -9326,10 +9328,10 @@ Please use their TARGET object siblings to avoid making 
assumptions
 about what TAP is the current target, or about MMU configuration.
 @end enumerate
 
-@deffn {Command} {mdd} [phys] addr [count]
-@deffnx {Command} {mdw} [phys] addr [count]
-@deffnx {Command} {mdh} [phys] addr [count]
-@deffnx {Command} {mdb} [phys] addr [count]
+@deffn {Command} {mdd} [-no-autoincr] [phys] addr [count]
+@deffnx {Command} {mdw} [-no-autoincr] [phys] addr [count]
+@deffnx {Command} {mdh} [-no-autoincr] [phys] addr [count]
+@deffnx {Command} {mdb} [-no-autoincr] [phys] addr [count]
 Display contents of address @var{addr}, as
 64-bit doublewords (@command{mdd}),
 32-bit words (@command{mdw}), 16-bit halfwords (@command{mdh}),
@@ -9341,12 +9343,14 @@ Otherwise, or if the optional @var{phys} flag is 
specified,
 If @var{count} is specified, displays that many units.
 (If you want to process the data instead of displaying it,
 see the @code{read_memory} primitives.)
+If @option{-no-autoincr} is specified, the address is not
+auto-incremented after reading the contents.
 @end deffn
 
-@deffn {Command} {mwd} [phys] addr doubleword [count]
-@deffnx {Command} {mww} [phys] addr word [count]
-@deffnx {Command} {mwh} [phys] addr halfword [count]
-@deffnx {Command} {mwb} [phys] addr byte [count]
+@deffn {Command} {mwd} [-no-autoincr] [phys] addr doubleword [count]
+@deffnx {Command} {mww} [-no-autoincr] [phys] addr word [count]
+@deffnx {Command} {mwh} [-no-autoincr] [phys] addr halfword [count]
+@deffnx {Command} {mwb} [-no-autoincr] [phys] addr byte [count]
 Writes the specified @var{doubleword} (64 bits), @var{word} (32 bits),
 @var{halfword} (16 bits), or @var{byte} (8-bit) value,
 at the specified address @var{addr}.
@@ -9355,6 +9359,8 @@ When the current target has an MMU which is present and 
active,
 Otherwise, or if the optional @var{phys} flag is specified,
 @var{addr} is interpreted as a physical address.
 If @var{count} is specified, fills that many units of consecutive address.
+If @option{-no-autoincr} is specified, the address is not
+auto-incremented after writing the contents.
 @end deffn
 
 @anchor{imageaccess}
diff --git a/src/target/target.c b/src/target/target.c
index c4ae6a216e..ffddc013d9 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -3497,6 +3497,12 @@ COMMAND_HANDLER(handle_md_command)
if (CMD_ARGC < 1)
return ERROR_COMMAND_SYNTAX_ERROR;
 
+   bool autoincr = strcmp(CMD_ARGV[0], "-no-autoincr");
+   if (!autoincr) {
+   CMD_ARGC--;
+   CMD_ARGV++;
+   }
+
unsigned size = 0;
switch (CMD_NAME[2]) {
case 'd':
@@ -3521,9 +3527,16 @@ COMMAND_HANDLER(handle_md_command)
if (physical) {
CMD_ARGC--;
CMD_ARGV++;
-   fn = target_read_phys_memory;
-   } else
-   fn = target_read_memory;
+

[PATCH]: 3f9f339e3b target: Add `addr_autoincr` parameter to {read, write}_{phys, }_memory

[gerrit]

This is an automated email from Gerrit.

"Bernhard Rosenkränzer " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8288

-- gerrit

commit 3f9f339e3b4ae4f207018a824b9fdb0216fbf468
Author: Bernhard Rosenkränzer 
Date:   Sat May 18 16:41:23 2024 +0200

target: Add `addr_autoincr` parameter to {read,write}_{phys,}_memory

Add addr_autoincr to allow repeated read/writes of the same
memory area, replacing the `riscv repeat_read` command from the RISC-V
fork.

This is the first in a series of 4 patches replacing
https://review.openocd.org/c/openocd/+/8259

Change-Id: Ifcd5f5a822d0022a3a143a69fc80dc69d49df668
Signed-off-by: Bernhard Rosenkränzer 
Cc: Antonio Borneo 

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 6a70b2ddf8..d5bc1509f3 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -2485,10 +2485,13 @@ static int aarch64_read_cpu_memory(struct target 
*target,
 
 static int aarch64_read_phys_memory(struct target *target,
target_addr_t address, uint32_t size,
-   uint32_t count, uint8_t *buffer)
+   uint32_t count, uint8_t *buffer, bool addr_autoincr)
 {
int retval = ERROR_COMMAND_SYNTAX_ERROR;
 
+   if (addr_autoincr == ADDR_NO_AUTOINCR)
+   return ERROR_TARGET_NOAUTOINCR_NOT_SUPPORTED;
+
if (count && buffer) {
/* read memory through APB-AP */
retval = aarch64_mmu_modify(target, 0);
@@ -2500,11 +2503,14 @@ static int aarch64_read_phys_memory(struct target 
*target,
 }
 
 static int aarch64_read_memory(struct target *target, target_addr_t address,
-   uint32_t size, uint32_t count, uint8_t *buffer)
+   uint32_t size, uint32_t count, uint8_t *buffer, bool addr_autoincr)
 {
int mmu_enabled = 0;
int retval;
 
+   if (addr_autoincr == ADDR_NO_AUTOINCR)
+   return ERROR_TARGET_NOAUTOINCR_NOT_SUPPORTED;
+
/* determine if MMU was enabled on target stop */
retval = aarch64_mmu(target, _enabled);
if (retval != ERROR_OK)
@@ -2521,10 +2527,13 @@ static int aarch64_read_memory(struct target *target, 
target_addr_t address,
 
 static int aarch64_write_phys_memory(struct target *target,
target_addr_t address, uint32_t size,
-   uint32_t count, const uint8_t *buffer)
+   uint32_t count, const uint8_t *buffer, bool addr_autoincr)
 {
int retval = ERROR_COMMAND_SYNTAX_ERROR;
 
+   if (addr_autoincr == ADDR_NO_AUTOINCR)
+   return ERROR_TARGET_NOAUTOINCR_NOT_SUPPORTED;
+
if (count && buffer) {
/* write memory through APB-AP */
retval = aarch64_mmu_modify(target, 0);
@@ -2537,11 +2546,14 @@ static int aarch64_write_phys_memory(struct target 
*target,
 }
 
 static int aarch64_write_memory(struct target *target, target_addr_t address,
-   uint32_t size, uint32_t count, const uint8_t *buffer)
+   uint32_t size, uint32_t count, const uint8_t *buffer, bool 
addr_autoincr)
 {
int mmu_enabled = 0;
int retval;
 
+   if (addr_autoincr == ADDR_NO_AUTOINCR)
+   return ERROR_TARGET_NOAUTOINCR_NOT_SUPPORTED;
+
/* determine if MMU was enabled on target stop */
retval = aarch64_mmu(target, _enabled);
if (retval != ERROR_OK)
diff --git a/src/target/arc_mem.c b/src/target/arc_mem.c
index 3264b663b6..4742a3cc05 100644
--- a/src/target/arc_mem.c
+++ b/src/target/arc_mem.c
@@ -153,11 +153,14 @@ static int arc_mem_write_block8(struct target *target, 
uint32_t addr,
 
 /* - Exported functions  */
 int arc_mem_write(struct target *target, target_addr_t address, uint32_t size,
-   uint32_t count, const uint8_t *buffer)
+   uint32_t count, const uint8_t *buffer, bool addr_autoincr)
 {
int retval = ERROR_OK;
void *tunnel = NULL;
 
+   if (addr_autoincr == ADDR_NO_AUTOINCR)
+   return ERROR_TARGET_NOAUTOINCR_NOT_SUPPORTED;
+
LOG_DEBUG("address: 0x%08" TARGET_PRIxADDR ", size: %" PRIu32 ", count: 
%" PRIu32,
address, size, count);
 
@@ -235,13 +238,15 @@ static int arc_mem_read_block(struct target *target, 
target_addr_t addr,
 }
 
 int arc_mem_read(struct target *target, target_addr_t address, uint32_t size,
-   uint32_t count, uint8_t *buffer)
+   uint32_t count, uint8_t *buffer, bool addr_autoincr)
 {
int retval = ERROR_OK;
void *tunnel_he;
uint8_t *tunnel_te;
uint32_t words_to_read, bytes_to_read;
 
+   if (addr_autoincr == ADDR_NO_AUTOINCR)
+   return ERROR_TARGET_NOAUTOINCR_NOT_SUPPORTED;
 
LOG_DEBUG("Read memory: addr=0x%08" TARGET_PRIxADDR ", size=%" PRIu32
", count=%" PRIu32, address, size, count);
diff --git a/src/target/arc_mem.h b/src/target/arc

[PATCH]: 00ca39fb1c target: Add *_no_addrincr() functions

[gerrit]

This is an automated email from Gerrit.

"Bernhard Rosenkränzer " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8289

-- gerrit

commit 00ca39fb1ca4bd5a7b359f8742409ecadee515da
Author: Bernhard Rosenkränzer 
Date:   Sat May 18 18:44:01 2024 +0200

target: Add *_no_addrincr() functions

Add target_read_memory_no_addrincr(),
target_read_phys_memory_no_addrincr(),
target_write_memory_no_addrincr(),
target_write_phys_memory_no_addrincr()

This is the second in a series of 4 patches replacing
https://review.openocd.org/c/openocd/+/8259

Change-Id: Ie154060b7f627b6e17fcc23f6e5cf36ba1b22322
Signed-off-by: Bernhard Rosenkränzer 
Cc: Antonio Borneo 

diff --git a/src/target/target.c b/src/target/target.c
index 5b8c57aca5..c4ae6a216e 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -1248,6 +1248,29 @@ int target_read_memory(struct target *target,
return target->type->read_memory(target, address, size, count, buffer, 
ADDR_AUTOINCR);
 }
 
+int target_read_memory_no_addrincr(struct target *target,
+   target_addr_t address, uint32_t size, uint32_t count, uint8_t 
*buffer)
+{
+   if (!target_was_examined(target)) {
+   LOG_ERROR("Target not examined yet");
+   return ERROR_FAIL;
+   }
+   if (!target->type->read_memory) {
+   LOG_ERROR("Target %s doesn't support read_memory", 
target_name(target));
+   return ERROR_FAIL;
+   }
+   int ret = target->type->read_memory(target, address, size, count, 
buffer, ADDR_NO_AUTOINCR);
+   if (ret == ERROR_TARGET_NOAUTOINCR_NOT_SUPPORTED) {
+   LOG_DEBUG("Target %s doesn't support read_memory without 
address auto-increment, simulating", target_name(target));
+   for(uint32_t i = 0; i < count; i++) {
+   ret = target->type->read_memory(target, address, size, 
1, buffer, ADDR_AUTOINCR);
+   if (ret != ERROR_OK)
+   return ret;
+   }
+   }
+   return ret;
+}
+
 int target_read_phys_memory(struct target *target,
target_addr_t address, uint32_t size, uint32_t count, uint8_t 
*buffer)
 {
@@ -1262,6 +1285,29 @@ int target_read_phys_memory(struct target *target,
return target->type->read_phys_memory(target, address, size, count, 
buffer, ADDR_AUTOINCR);
 }
 
+int target_read_phys_memory_no_addrincr(struct target *target,
+   target_addr_t address, uint32_t size, uint32_t count, uint8_t 
*buffer)
+{
+   if (!target_was_examined(target)) {
+   LOG_ERROR("Target not examined yet");
+   return ERROR_FAIL;
+   }
+   if (!target->type->read_phys_memory) {
+   LOG_ERROR("Target %s doesn't support read_phys_memory", 
target_name(target));
+   return ERROR_FAIL;
+   }
+   int ret = target->type->read_phys_memory(target, address, size, count, 
buffer, ADDR_NO_AUTOINCR);
+   if (ret == ERROR_TARGET_NOAUTOINCR_NOT_SUPPORTED) {
+   LOG_DEBUG("Target %s doesn't support read_phys_memory without 
address auto-increment, simulating", target_name(target));
+   for(uint32_t i = 0; i < count; i++) {
+   ret = target->type->read_phys_memory(target, address, 
size, 1, buffer, ADDR_AUTOINCR);
+   if (ret != ERROR_OK)
+   return ret;
+   }
+   }
+   return ret;
+}
+
 int target_write_memory(struct target *target,
target_addr_t address, uint32_t size, uint32_t count, const 
uint8_t *buffer)
 {
@@ -1276,6 +1322,29 @@ int target_write_memory(struct target *target,
return target->type->write_memory(target, address, size, count, buffer, 
ADDR_AUTOINCR);
 }
 
+int target_write_memory_no_addrincr(struct target *target,
+   target_addr_t address, uint32_t size, uint32_t count, const 
uint8_t *buffer)
+{
+   if (!target_was_examined(target)) {
+   LOG_ERROR("Target not examined yet");
+   return ERROR_FAIL;
+   }
+   if (!target->type->write_memory) {
+   LOG_ERROR("Target %s doesn't support write_memory", 
target_name(target));
+   return ERROR_FAIL;
+   }
+   int ret = target->type->write_memory(target, address, size, count, 
buffer, ADDR_NO_AUTOINCR);
+   if (ret == ERROR_TARGET_NOAUTOINCR_NOT_SUPPORTED) {
+   LOG_DEBUG("Target %s doesn't support write_memory without 
address auto-increment, simulating", target_name(target));
+   for(uint32_t i = 0; i < count; i++) {
+   ret = target->type->write_memory(target, address, size, 
1, buffer, ADDR_AUTOINCR

[PATCH]: 3ac703659d target/riscv: Implement read_memory without auto-increment

[gerrit]

This is an automated email from Gerrit.

"Bernhard Rosenkränzer " just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8291

-- gerrit

commit 3ac703659d5a107f1f40384513aa7075457ff5b3
Author: Bernhard Rosenkränzer 
Date:   Mon May 20 01:05:51 2024 +0200

target/riscv: Implement read_memory without auto-increment

Adjust the riscv internal read_memory to use the same parameters as
generic target read_memory, implement non-autoincrement for riscv-013.

This is the 4th in a series of 4 patches replacing
https://review.openocd.org/c/openocd/+/8259

Change-Id: Ic602656f120006c40aec8d932ff0d130b85ab1f6
Signed-off-by: Bernhard Rosenkränzer 
Cc: Antonio Borneo 

diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c
index 1fe79f1c03..583114c24a 100644
--- a/src/target/riscv/riscv-011.c
+++ b/src/target/riscv/riscv-011.c
@@ -1985,12 +1985,10 @@ static int deassert_reset(struct target *target)
 }
 
 static int read_memory(struct target *target, target_addr_t address,
-   uint32_t size, uint32_t count, uint8_t *buffer, uint32_t 
increment)
+   uint32_t size, uint32_t count, uint8_t *buffer, bool 
addr_autoincr)
 {
-   if (increment != size) {
-   LOG_ERROR("read_memory with custom increment not implemented");
-   return ERROR_NOT_IMPLEMENTED;
-   }
+   if (!addr_autoincr)
+   return ERROR_TARGET_NOAUTOINCR_NOT_SUPPORTED;
 
jtag_add_ir_scan(target->tap, _dbus, TAP_IDLE);
 
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 666174a020..d41a6a7323 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -62,7 +62,7 @@ static int register_read_direct(struct target *target, 
uint64_t *value, uint32_t
 static int register_write_direct(struct target *target, unsigned number,
uint64_t value);
 static int read_memory(struct target *target, target_addr_t address,
-   uint32_t size, uint32_t count, uint8_t *buffer, uint32_t 
increment);
+   uint32_t size, uint32_t count, uint8_t *buffer, bool 
addr_autoincr);
 static int write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer, bool 
addr_autoincr);
 
@@ -1222,7 +1222,7 @@ static int scratch_read64(struct target *target, 
scratch_mem_t *scratch,
case SPACE_DMI_RAM:
{
uint8_t buffer[8] = {0};
-   if (read_memory(target, scratch->debug_address, 
4, 2, buffer, 4) != ERROR_OK)
+   if (read_memory(target, scratch->debug_address, 
4, 2, buffer, ADDR_AUTOINCR) != ERROR_OK)
return ERROR_FAIL;
*value = buffer[0] |
(((uint64_t) buffer[1]) << 8) |
@@ -3530,7 +3530,7 @@ static int read_memory_progbuf(struct target *target, 
target_addr_t address,
 }
 
 static int read_memory(struct target *target, target_addr_t address,
-   uint32_t size, uint32_t count, uint8_t *buffer, uint32_t 
increment)
+   uint32_t size, uint32_t count, uint8_t *buffer, bool 
addr_autoincr)
 {
if (count == 0)
return ERROR_OK;
@@ -3555,26 +3555,26 @@ static int read_memory(struct target *target, 
target_addr_t address,
if (mem_should_skip_progbuf(target, address, size, 
true, _result))
continue;
 
-   ret = read_memory_progbuf(target, address, size, count, 
buffer, increment);
+   ret = read_memory_progbuf(target, address, size, count, 
buffer, addr_autoincr ? size : 0);
 
if (ret != ERROR_OK)
progbuf_result = "failed";
} else if (method == RISCV_MEM_ACCESS_SYSBUS) {
-   if (mem_should_skip_sysbus(target, address, size, 
increment, true, _result))
+   if (mem_should_skip_sysbus(target, address, size, 
addr_autoincr ? size : 0, true, _result))
continue;
 
if (get_field(info->sbcs, DM_SBCS_SBVERSION) == 0)
-   ret = read_memory_bus_v0(target, address, size, 
count, buffer, increment);
+   ret = read_memory_bus_v0(target, address, size, 
count, buffer, addr_autoincr ? size : 0);
else if (get_field(info->sbcs, DM_SBCS_SBVERSION) == 1)
-   ret = read_memory_bus_v1(target, address, size, 
count, buffer, increment);
+   ret = read_memory_bus_v1(target, address, size, 
count, buffer, addr_autoincr ? size : 0);
 
if (ret != ERRO

[PATCH]: 29c5c39c6f src/flash/nor/spi.c: add XIAO RP support

[gerrit]

This is an automated email from Gerrit.

"Jan Cumps " just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8287

-- gerrit

commit 29c5c39c6fbef303062e08bcd191076bb3bded70
Author: jcu...@gmail.com 
Date:   Sun May 19 17:14:46 2024 +0200

src/flash/nor/spi.c: add XIAO RP  support

Add new flash driver for internal flash of xiao rp2040.
It uses the GIGADEVICEGD25Q16CEIG flash chip

Change-Id: I83a9bf3eb191501807aa1305c37628264486da61
Signed-off-by: jcu...@gmail.com 

diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c
index bf654f9f6b..0ac3febc77 100644
--- a/src/flash/nor/spi.c
+++ b/src/flash/nor/spi.c
@@ -184,6 +184,7 @@ const struct flash_device flash_devices[] = {
FLASH_ID("xtx xt25q64b",0x03, 0x0b, 0x02, 0xd8, 0xc7, 
0x0017600b, 0x100, 0x1, 0x80),
FLASH_ID("xtx xt25q128b",   0x03, 0x0b, 0x02, 0xd8, 0xc7, 
0x0018600b, 0x100, 0x1, 0x100),
FLASH_ID("zetta zd25q16",   0x03, 0x00, 0x02, 0xd8, 0xc7, 
0x001560ba, 0x100, 0x1, 0x20),
+   FLASH_ID("pu p32q32",   0x03, 0xeb, 0x02, 0xd8, 0xc7, 
0x00156085, 0x100, 0x1, 0x400),
 
/* FRAM, no erase commands, no write page or sectors */
 

-- 

[PATCH]: 66028468c7 src/flash/nor/spi.c: add XIAO RP support

[gerrit]

This is an automated email from Gerrit.

"Jan Cumps " just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8286

-- gerrit

commit 66028468c72b1aeeaaa5aa9e5fa3d647a2ff5f2c
Author: jcu...@gmail.com 
Date:   Sun May 19 16:25:45 2024 +0200

src/flash/nor/spi.c: add XIAO RP  support

Add new flash driver for internal flash of xiao rp2040. It uses the 
GIGADEVICEGD25Q16CEIG flash chip

Change-Id: Ia30e824d5cd56e15e0a869be146c846ce6f2d458
Signed-off-by: jcu...@gmail.com 

diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c
index bf654f9f6b..d82b9077db 100644
--- a/src/flash/nor/spi.c
+++ b/src/flash/nor/spi.c
@@ -184,6 +184,7 @@ const struct flash_device flash_devices[] = {
FLASH_ID("xtx xt25q64b",0x03, 0x0b, 0x02, 0xd8, 0xc7, 
0x0017600b, 0x100, 0x1, 0x80),
FLASH_ID("xtx xt25q128b",   0x03, 0x0b, 0x02, 0xd8, 0xc7, 
0x0018600b, 0x100, 0x1, 0x100),
FLASH_ID("zetta zd25q16",   0x03, 0x00, 0x02, 0xd8, 0xc7, 
0x001560ba, 0x100, 0x1, 0x20),
+FLASH_ID("pu p32q32",   0x03, 0xeb, 0x02, 0xd8, 0xc7, 
0x00156085, 0x100, 0x1, 0x40),
 
/* FRAM, no erase commands, no write page or sectors */
 

-- 

[PATCH]: f2c30d1280 target/cortex_m: allow poll quickly get out of TARGET_RESET state

[gerrit]

This is an automated email from Gerrit.

"Tomas Vanek " just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8285

-- gerrit

commit f2c30d128044a76fc44631eb45aaa83a4d723907
Author: Tomas Vanek 
Date:   Fri May 17 21:27:24 2024 +0200

target/cortex_m: allow poll quickly get out of TARGET_RESET state

cortex_m_poll_one() detects reset testing S_RESET_ST sticky bit.
If the signal comes unexpectedly, poll must return TARGET_RESET state.

On the contrary in case of polling inside of an OpenOCD reset command,
TARGET_RESET has been has already been set and we need to get out of
it as quickly as possible.

The original code needs 2 polls: the first clears S_RESET_ST
and keeps TARGET_RESET state, the current TARGET_RUNNING or TARGET_HALTED
is reflected as late as the second poll is done.

Change the logic to keep in TARGET_RESET only when necessary.

See also [1]

Link: [1] 8284: tcl/target: ti_cc3220sf: Use halt for CC3320SF targets | 
https://review.openocd.org/c/openocd/+/8284
Fixes: https://sourceforge.net/p/openocd/tickets/360/
Signed-off-by: Tomas Vanek 
Change-Id: I759461e5f89ca48a6e16e4b4101570260421dba1

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index c225b1aa9d..7f62a6de2d 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -931,8 +931,12 @@ static int cortex_m_poll_one(struct target *target)
if (target->state != TARGET_RESET) {
target->state = TARGET_RESET;
LOG_TARGET_INFO(target, "external reset detected");
+   /* In case of an unexpected S_RESET_ST set TARGET_RESET 
state
+* and keep it until the next poll to allow its 
detection */
+   return ERROR_OK;
}
-   return ERROR_OK;
+   /* S_RESET_ST was expected (in a reset command). Continue 
processing
+* to quickly get out of TARGET_RESET state */
}
 
if (target->state == TARGET_RESET) {

--