[Openocd-development] STM32F2 flash size detected wrong
Hello!
I just started working with a custom PCB STM32F2, and while I got most
things to work (including flash and verify), OpenOCD seems to detect the
size of flash on my chip wrong.
OpenOCD ("poll") reports 1024KB, when the chip is a STM32F205RET6, with
512KB flash.
The flash size I believe is detected by the driver.
Would something bad happen if I go ahead with it, as long as I stay
below 512KB? The linker script also has 512KB coded in.
Thanks!
Matthew
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Re: [Openocd-development] SRST TRST have to be buffered?
Thanks! That's good to know. I didn't realize that the STM32 can reset itself, too. That would be problematic. I suppose if I never use low power mode, I can omit both resets. Matthew On 7/22/2011 12:12 PM, Andreas Fritiofson wrote: On Fri, Jul 8, 2011 at 1:19 AM, Matthew Lai <mailto:cyberf...@wecheer.com>> wrote: Hello! I'm trying to embed a FT2232D based programmer into my board with a STM32 (Cortex-M3 MCU). I want the programmer to be compatible with jtagkey, so I looked at schematics of compaible designs. I noticed that while the JTAG signals (TCK, TDI, TDO, TMS) are only buffered when translation is necessary, the SRST and TRST signals are always tri-state buffered, with OE going into the FTDI chip. Is there a reason for that? Can I omit the buffers? Maybe you've already got the answers you needed, but a clarification may be in order: It's important that SRST is open-drain because it is a bidirectional signal. The STM32 drives it low when it is reset internally. If it's driven high, reset may not work and the chip may possibly even take damage. Also, I heard it's possible to omit the TRST signal and only keep the SRST signal, because system reset will also reset the TAP controller. Is that true? Are there problems with that? TAP or debug logic is not reset by SRST, but you can skip TRST anyway because TAP reset can be achieved by clocking in a pattern on TMS, which OpenOCD does if no TRST is available. I'm not aware of any problems, we have made several STM32 designs without TRST. Even the SRST is optional, it can be asserted via debug logic, but it's good to have because it may be the only way to reset the chip (other than POR) if you're stuck in low power mode (JTAG unresponsive). /Andreas ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] SRST TRST have to be buffered?
Ah! I see. I guess it's fine as long as OpenOCD either tristates or drive high the reset lines when it's not doing anything. Is that the case? Thanks! Matthew On 7/8/2011 9:51 AM, Phil Fong wrote: ** I'm trying to embed a FT2232D based programmer into my board with a STM32 (Cortex-M3 MCU). I want the programmer to be compatible with jtagkey, so I looked at schematics of compaible designs. I noticed that while the JTAG signals (TCK, TDI, TDO, TMS) are only buffered when translation is necessary, the SRST and TRST signals are always tri-state buffered, with OE going into the FTDI chip. Is there a reason for that? Can I omit the buffers? Since you are embedding the JTAG interface with the target, you can tell if buffering is needed. We just went through a similar exercise and you can pretty much hook everything up directly and use the FTDI MiniModule layout (see commit from Rodrigo Rosa) if you target circuit is right. Also, I heard it's possible to omit the TRST signal and only keep the SRST signal, because system reset will also reset the TAP controller. Is that true? Are there problems with that? TRST is optional since you can reset the JTAG TAP state machine with clocking TCK which TMS=1. SRST might be needed for other reasons. For example some chips need it as part of some kind of flash / code protection enable/disable. Phil ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] SRST TRST have to be buffered?
I see. Thanks for the clarifications! I understand the purposes of the buffers much better now. Matthew On 7/8/2011 12:50 AM, Laurent Gauch wrote: Hello! I'm trying to embed a FT2232D based programmer into my board with a STM32 (Cortex-M3 MCU). I want the programmer to be compatible with jtagkey, so I looked at schematics of compaible designs. I noticed that while the JTAG signals (TCK, TDI, TDO, TMS) are only buffered when translation is necessary, the SRST and TRST signals are always tri-state buffered, with OE going into the FTDI chip. Is there a reason for that? Can I omit the buffers? On the JTAGkey http://www.amontec.com/jtagkey.shtml , the output buffers have 3 basic functions: - remove any pull-down or pull-up from the internal of JTAGkey (The pull-up and pull-down value must be controlled by the target board and not by the emultator) - pass from 8mA output to 32mA output driver (JTAGkey and JTAGkey-2 are tested to support more than 12 daisy-chain devices on the same JTAG Chain) - possibility to tristate the JTAG port at any time - provide an ultra large IO voltage tolerance from 1.5V to 5V ;-) The Amontec JTAGkey was designed to be the most generic USB JTAG adapter as possible. Also, the Amontec JTAGkey has the advantage to provide a full control of the TRST and SRST line. In fact, the TRST and SRST of the Amontec JTAGkey can be configured as push-pull buffer and as open-drain buffer. Note, SRST can be monitored from the JTAGkey Layout. Also, I heard it's possible to omit the TRST signal and only keep the SRST signal, because system reset will also reset the TAP controller. Is that true? Are there problems with that? TRST and SRST are optional, and their usage will depend on what is the target need. So you can try to customize the Amontec JTAGkey Layout for your need, or you can use it as it is. The advantage of using the original Amontec JTAGkey Layout is you make to sure have a full compatibility with software supporting JTAGkey ! Regards, Laurent http://www.amontec.com/jtagkey.shtml Amontec JTAGkey-2 High-speed USB JTAG Adapter with RTCK feature. Many thanks! Matthew ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] SRST TRST have to be buffered?
Hello! I'm trying to embed a FT2232D based programmer into my board with a STM32 (Cortex-M3 MCU). I want the programmer to be compatible with jtagkey, so I looked at schematics of compaible designs. I noticed that while the JTAG signals (TCK, TDI, TDO, TMS) are only buffered when translation is necessary, the SRST and TRST signals are always tri-state buffered, with OE going into the FTDI chip. Is there a reason for that? Can I omit the buffers? Also, I heard it's possible to omit the TRST signal and only keep the SRST signal, because system reset will also reset the TAP controller. Is that true? Are there problems with that? Many thanks! Matthew ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
