[Openocd-development] Clock setup script for STM32F107

2011-10-09 Thread Simon Barner 
Dear list,

I have already posted the attached script some weeks ago.

It enables the PLL of the STM32F107 and thus configures
the MCU to run at 72 MHz which allows for higher JTAG speeds.

Since this should be useful for everybody, I would like to
contribute it to OpenOCD. However, I am not sure how to integrate
it. One idea is to conditionally call it from scripts/target
/stm32f1x.cfg. Comments and alternative suggestions are highly
appreciated.

Regards,
 Simon
# Enable PLL2 and PLL (as in CMSIS system_stm32f10x.c)
# and clock system with 72 Mhz
#
# Set JTAG clock to 6 MHz   
$_TARGETNAME configure -event reset-init {
# RCC_CR reset value: 0x??83
# RCC_CR - RCC_CR_HSEON
mww 0x40021000 0x10083
sleep 10

# FLASH_ACR reset value: 0x30
# FLASH_ACR - FLASH_ACR_PRFTBE, FLASH_ACR_LATENCY_2
mww 0x40022000 0x32

# RCC_CFGR reset value: 0x0
# RCC_CFGR - RCC_CFGR_HPRE_DIV1, RCC_CFGR_PPRE2_DIV1, 
RCC_CFGR_PPRE1_DIV2
mww 0x40021004 0x400

# RCC_CFGR2 reset value: 0x0
# RCC_CFGR2 - RCC_CFGR2_PREDIV2_DIV5, RCC_CFGR2_PLL2MUL8,
#  RCC_CFGR2_PREDIV1SRC_PLL2, RCC_CFGR2_PREDIV1_DIV5
mww 0x4002102c 0x10644

# RCC_CR - RCC_CR_PLL2ON
mww 0x40021000 0x4010083
sleep 10

# RCC_CFGR - PLLCLK = PREDIV1 * 9 = 72 MHz
mww 0x40021004 0x1d0400

# RCC_CR - RCC_CR_PLLON
mww 0x40021000 0x5010083
sleep 10

# RCC_CR - RCC_CFGR_SW_PLL
mww 0x40021004 0x1d0402
sleep 10

adapter_khz 6000
}
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[Openocd-development] arm-jtag-ew fixes: Rebased patches

2011-09-22 Thread Simon Barner 
Dear list,

I finally found some time to rebase my patches and to split
them into smaller pieces (as suggested by Øyvind Harboe).

Please refer to the commit messages for the purpose
of the individual patches.

I would really appreciate if you could review them and
consider them for inclusion into the OpenOCD main branch.

If the patches are not in the expected format, or if you
have further suggestions, please don't hesitate to contact me.

Best regards,
 Simon
From 990646d220fdd85fd59f2c86c20fc16c8fc8e825 Mon Sep 17 00:00:00 2001
From: Simon Barner bar...@gmx.de
Date: Fri, 16 Sep 2011 21:06:02 +0200
Subject: - Fix setting interface speed (1/2):CMD_SET_TCK_FREQUENCY
 message length is 5, not 4
- Ticket: #34

---
 src/jtag/drivers/arm-jtag-ew.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c
index 44eaeff..f39730f 100644
--- a/src/jtag/drivers/arm-jtag-ew.c
+++ b/src/jtag/drivers/arm-jtag-ew.c
@@ -186,7 +186,7 @@ static int armjtagew_speed(int speed)
 usb_out_buffer[0] = CMD_SET_TCK_FREQUENCY;
buf_set_u32(usb_out_buffer + 1, 0, 32, speed);
 
-result = armjtagew_usb_message(armjtagew_handle, 4, 4);
+result = armjtagew_usb_message(armjtagew_handle, 5, 4);
 
 if (result  0)
 {
-- 
1.7.5.1

From 9c8d710a63ced3e6cdd1df851fe1125e58d45e8b Mon Sep 17 00:00:00 2001
From: Simon Barner bar...@gmx.de
Date: Fri, 16 Sep 2011 21:08:10 +0200
Subject: - Fix setting interface speed (2/2)   Interface expects speed in Hz,
 not kHz
- Ticket #34

---
 src/jtag/drivers/arm-jtag-ew.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c
index f39730f..bf60c77 100644
--- a/src/jtag/drivers/arm-jtag-ew.c
+++ b/src/jtag/drivers/arm-jtag-ew.c
@@ -184,7 +184,7 @@ static int armjtagew_speed(int speed)
 
 
 usb_out_buffer[0] = CMD_SET_TCK_FREQUENCY;
-   buf_set_u32(usb_out_buffer + 1, 0, 32, speed);
+   buf_set_u32(usb_out_buffer + 1, 0, 32, speed*1000);
 
 result = armjtagew_usb_message(armjtagew_handle, 5, 4);
 
@@ -196,7 +196,7 @@ static int armjtagew_speed(int speed)
 
usb_out_buffer[0] = CMD_GET_TCK_FREQUENCY;
 result = armjtagew_usb_message(armjtagew_handle, 1, 4);
-   speed_real = (int)buf_get_u32(usb_in_buffer,0,32);
+   speed_real = (int)buf_get_u32(usb_in_buffer,0,32) / 1000;
if (result  0)
{
 LOG_ERROR(ARM-JTAG-EW getting speed failed (%d), result);
-- 
1.7.5.1

From e96b8edd16d0eabd6a74464ea9e41a4f3c9c5889 Mon Sep 17 00:00:00 2001
From: Simon Barner bar...@gmx.de
Date: Fri, 16 Sep 2011 21:10:23 +0200
Subject: - Provide armjtagew_speed_div() in order to fix interactive use of
 `adapter_khz'

---
 src/jtag/drivers/arm-jtag-ew.c |9 +
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c
index bf60c77..2d6a400 100644
--- a/src/jtag/drivers/arm-jtag-ew.c
+++ b/src/jtag/drivers/arm-jtag-ew.c
@@ -218,6 +218,14 @@ static int armjtagew_khz(int khz, int *jtag_speed)
return ERROR_OK;
 }
 
+static int armjtagew_speed_div(int speed, int* khz)
+{
+   *khz = speed;
+
+   return ERROR_OK;
+}
+
+
 static int armjtagew_init(void)
 {
int check_cnt;
@@ -518,6 +526,7 @@ struct jtag_interface armjtagew_interface = {
 
.execute_queue = armjtagew_execute_queue,
.speed = armjtagew_speed,
+   .speed_div = armjtagew_speed_div,
.khz = armjtagew_khz,
.init = armjtagew_init,
.quit = armjtagew_quit,
-- 
1.7.5.1

From 875a487be67f867b2e289efa8cfea79c45103b4b Mon Sep 17 00:00:00 2001
From: Simon Barner bar...@gmx.de
Date: Fri, 16 Sep 2011 21:11:40 +0200
Subject: - Declare interface as `jtag_only'

---
 src/jtag/drivers/arm-jtag-ew.c |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c
index 2d6a400..7c19423 100644
--- a/src/jtag/drivers/arm-jtag-ew.c
+++ b/src/jtag/drivers/arm-jtag-ew.c
@@ -523,7 +523,8 @@ static const struct command_registration 
armjtagew_command_handlers[] = {
 struct jtag_interface armjtagew_interface = {
.name = arm-jtag-ew,
.commands = armjtagew_command_handlers,
-
+   .transports = jtag_only,
+
.execute_queue = armjtagew_execute_queue,
.speed = armjtagew_speed,
.speed_div = armjtagew_speed_div,
-- 
1.7.5.1

From 1db210c2452e33d4d3a397d3898ced4d16521b3b Mon Sep 17 00:00:00 2001
From: Simon Barner bar...@gmx.de
Date: Fri, 16 Sep 2011 21:12:47 +0200
Subject: - Emit a warning if interface firmware version != 1.6

---
 src/jtag/drivers/arm-jtag-ew.c |5 +
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c
index 7c19423..f936219 100644
--- a/src/jtag/drivers/arm-jtag-ew.c
+++ b/src/jtag/drivers/arm-jtag-ew.c

Re: [Openocd-development] Bugfix release (was: FreeRTOS bug fixes)

2011-08-24 Thread Simon Barner 
Dear Jean-Christophe,

On 24.08.2011 16:12, Jean-Christophe PLAGNIOL-VILLARD wrote:
 On 19:54 Tue 23 Aug , Øyvind Harboe wrote:
 Do we need a bugfix release?
 yes I've a bug on the usb in cross comp when integrate openocd in buildroot
 
 so I'll prepare a bugfix release within 1 or 2weeks

 When is the next release?
 I'm traveling right now so give me few days to prepare the next release plan
 

 If someone needs a bugfix badly, then there is always git...
 no for distribution point of view we need bug fix release

I do not want to nag, but I would be very happy to see my fixes for the
ARM-JTAG-EW interfaces included in this bug fix release. This code has
been used successfully now for several weeks.

What would be the best way to submit them?

- The mailing list?
 -
https://lists.berlios.de/pipermail/openocd-development/2011-August/020514.html
 -
https://lists.berlios.de/pipermail/openocd-development/2011-August/020515.html

- The bug tracker? There are also tickets for the issues address be the
above patches, but the latest version of the patches are in the above
postings.

Thanks in advance,

Best regards,
 Simon
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[Openocd-development] [patch] ARM-JTAG-EW fixes 1/2

2011-08-10 Thread Simon Barner 
- Fix setting interface speed:
  - CMD_SET_TCK_FREQUENCY message length is 5, not 4
  - Interface expects speed in Hz, not kHz
- Provide armjtagew_speed_div() in order to fix interactive use
  of `adapter_khz'
- Declare interface as `jtag_only'
- Emit a warning if interface firmware version != 1.6
- In armjtagew_init(), set initial JTAG speed to 32 kHz (before TAP
  initialization). This prevents rare communication errors during
  startup.
- Ticket: #34
---
 src/jtag/drivers/arm-jtag-ew.c |   28 +++-
 1 files changed, 23 insertions(+), 5 deletions(-)


diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c
index 44eaeff..20f7c99 100644
--- a/src/jtag/drivers/arm-jtag-ew.c
+++ b/src/jtag/drivers/arm-jtag-ew.c
@@ -184,9 +184,9 @@ static int armjtagew_speed(int speed)
 
 
 usb_out_buffer[0] = CMD_SET_TCK_FREQUENCY;
-	buf_set_u32(usb_out_buffer + 1, 0, 32, speed);
+	buf_set_u32(usb_out_buffer + 1, 0, 32, speed*1000);
 
-result = armjtagew_usb_message(armjtagew_handle, 4, 4);
+result = armjtagew_usb_message(armjtagew_handle, 5, 4);
 
 if (result  0)
 {
@@ -196,7 +196,7 @@ static int armjtagew_speed(int speed)
 
 	usb_out_buffer[0] = CMD_GET_TCK_FREQUENCY;
 result = armjtagew_usb_message(armjtagew_handle, 1, 4);
-	speed_real = (int)buf_get_u32(usb_in_buffer,0,32);
+	speed_real = (int)buf_get_u32(usb_in_buffer,0,32) / 1000;
 	if (result  0)
 	{
 LOG_ERROR(ARM-JTAG-EW getting speed failed (%d), result);
@@ -204,7 +204,7 @@ static int armjtagew_speed(int speed)
 	}
 	else
 	{
-	LOG_INFO(Requested speed %dkHz, emulator reported %dkHz., speed, speed_real);
+		LOG_INFO(Requested speed %dkHz, emulator reported %dkHz., speed, speed_real);
 	}
 
 return ERROR_OK;
@@ -218,6 +218,14 @@ static int armjtagew_khz(int khz, int *jtag_speed)
 	return ERROR_OK;
 }
 
+static int armjtagew_speed_div(int speed, int* khz)
+{
+	*khz = speed;
+
+	return ERROR_OK;
+}
+
+
 static int armjtagew_init(void)
 {
 	int check_cnt;
@@ -248,6 +256,9 @@ static int armjtagew_init(void)
 		LOG_INFO(ARM-JTAG-EW initial read failed, don't worry);
 	}
 
+	// Initial JTAG speed (for reset and initialization): 32 kHz
+	armjtagew_speed(32);
+
 	LOG_INFO(ARM-JTAG-EW JTAG Interface ready);
 
 	armjtagew_reset(0, 0);
@@ -488,6 +499,11 @@ static int armjtagew_get_version_info(void)
 			usb_in_buffer[1], usb_in_buffer[0], \
 			isgraph(usb_in_buffer[2]) ? usb_in_buffer[2] : 'X', \
 			sn, auxinfo);
+	
+	if (1 != usb_in_buffer[1] || 6 != usb_in_buffer[0])
+	{
+		LOG_WARNING(ARM-JTAG-EW firmware version %d.%d is untested with this version of OpenOCD. You might experience unexpected behavior., usb_in_buffer[1], usb_in_buffer[0]);
+	}
 	return ERROR_OK;
 }
 
@@ -515,9 +531,11 @@ static const struct command_registration armjtagew_command_handlers[] = {
 struct jtag_interface armjtagew_interface = {
 	.name = arm-jtag-ew,
 	.commands = armjtagew_command_handlers,
-
+	.transports = jtag_only,
+	
 	.execute_queue = armjtagew_execute_queue,
 	.speed = armjtagew_speed,
+	.speed_div = armjtagew_speed_div,
 	.khz = armjtagew_khz,
 	.init = armjtagew_init,
 	.quit = armjtagew_quit,

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[Openocd-development] Clock setup for STM32F107

2011-08-04 Thread Simon Barner 
Hi,

inspired by this post, I created a reset-init script that initializes
the system clock for the STM32F107 (connectivity line) and sets the JTAG
speed to 6 MHz.

https://lists.berlios.de/pipermail/openocd-development/2010-October/016709.html

Currently, I source it in my custom configuration script, but it would
be nice to have this included into to the OpenOCD distribution.

source [find interface/arm-jtag-ew.cfg]
source [find board/olimex_stm32_h107.cfg]
source [find stm32f10x_cl_72MHz.cfg]

init
reset init

This JTAG speed yields flash programming at 13.6 kb/s, and stepping is
also pretty smooth.

Some further benchmarks (OpenOCD compiled without any additional logging):

@ 32 KHz: 1.9 kb/s
@ 64 KHz: 3.4 kb/s
@ 125 KHz: 5.6 kb/s
@ 250 KHz: 8.1 kb/s
@ 500 KHz: 10.2 kb/s
@ 1MHz: 11.8 kb/s
@ 2MHz: 12.9 kb/s
@ 4MHz: 13.4 kb/s
@ 6MHz: 13.6 kb/s

Next, I will try out the async. write patch mentioned here:
https://lists.berlios.de/pipermail/openocd-development/2011-July/020261.html
(and related posts).

Best regards,
 Simon
# Enable PLL2 and PLL (as in CMSIS system_stm32f10x.c)
# and clock system with 72 Mhz
#
# Set JTAG clock to 6 MHz   
$_TARGETNAME configure -event reset-init {
# RCC_CR reset value: 0x??83
# RCC_CR - RCC_CR_HSEON
mww 0x40021000 0x10083
sleep 10

# FLASH_ACR reset value: 0x30
# FLASH_ACR - FLASH_ACR_PRFTBE, FLASH_ACR_LATENCY_2
mww 0x40022000 0x32

# RCC_CFGR reset value: 0x0
# RCC_CFGR - RCC_CFGR_HPRE_DIV1, RCC_CFGR_PPRE2_DIV1, 
RCC_CFGR_PPRE1_DIV2
mww 0x40021004 0x400

# RCC_CFGR2 reset value: 0x0
# RCC_CFGR2 - RCC_CFGR2_PREDIV2_DIV5, RCC_CFGR2_PLL2MUL8,
#  RCC_CFGR2_PREDIV1SRC_PLL2, RCC_CFGR2_PREDIV1_DIV5
mww 0x4002102c 0x10644

# RCC_CR - RCC_CR_PLL2ON
mww 0x40021000 0x4010083
sleep 10

# RCC_CFGR - PLLCLK = PREDIV1 * 9 = 72 MHz
mww 0x40021004 0x1d0400

# RCC_CR - RCC_CR_PLLON
mww 0x40021000 0x5010083
sleep 10

# RCC_CR - RCC_CFGR_SW_PLL
mww 0x40021004 0x1d0402
sleep 10

adapter_khz 6000
}
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Re: [Openocd-development] Clock setup for STM32F107

2011-08-04 Thread Simon Barner 
On 04.08.2011 09:30, Simon Barner wrote:
 Some further benchmarks (OpenOCD compiled without any additional logging):
 
 @ 32 KHz: 1.9 kb/s
 @ 64 KHz: 3.4 kb/s
 @ 125 KHz: 5.6 kb/s
 @ 250 KHz: 8.1 kb/s
 @ 500 KHz: 10.2 kb/s
 @ 1MHz: 11.8 kb/s
 @ 2MHz: 12.9 kb/s
 @ 4MHz: 13.4 kb/s
 @ 6MHz: 13.6 kb/s

Note that I used the following command to program my (47kb) image:
flash write_image erase image.bin 0x800 bin

However, when I explicitly erase the flash before, I yield even higher
speeds:

flash erase_address 0x800 0x4
 erased address 0x0800 (length 262144) in 0.044003s (5817.785 KiB/s)

flash write_image image.bin 0x800 bin
 wrote 47984 bytes from file image.bin in 2.623150s (17.864 KiB/s)

Simon
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Re: [Openocd-development] Clock setup for STM32F107

2011-08-04 Thread Simon Barner 
Andreas,
list,

On 04.08.2011 09:46, Simon Barner wrote:
 On 04.08.2011 09:30, Simon Barner wrote:
 Some further benchmarks (OpenOCD compiled without any additional logging):

 @ 32 KHz: 1.9 kb/s
 @ 64 KHz: 3.4 kb/s
 @ 125 KHz: 5.6 kb/s
 @ 250 KHz: 8.1 kb/s
 @ 500 KHz: 10.2 kb/s
 @ 1MHz: 11.8 kb/s
 @ 2MHz: 12.9 kb/s
 @ 4MHz: 13.4 kb/s
 @ 6MHz: 13.6 kb/s
 
 Note that I used the following command to program my (47kb) image:
 flash write_image erase image.bin 0x800 bin
 
 However, when I explicitly erase the flash before, I yield even higher
 speeds:
 
 flash erase_address 0x800 0x4
  erased address 0x0800 (length 262144) in 0.044003s (5817.785 KiB/s)
 
 flash write_image image.bin 0x800 bin
  wrote 47984 bytes from file image.bin in 2.623150s (17.864 KiB/s)

 Next, I will try out the async. write patch mentioned here:
 https://lists.berlios.de/pipermail/openocd-development/2011-
 July/020261.html (and related posts).

I applied the patches 1/5 - 5/5 against my fixed ARM-JTAG-EW driver
and yield now (STM32F107, JTAG @ 6 MHz). Also, debugging the target
seems to work decently.

flash erase_address 0x0800 0x4
 erased address 0x0800 (length 262144) in 0.063400s (4037.855 KiB/s)

flash write_image image.bin 0x0800 bin
 wrote 47984 bytes from image.bin in 1.778403s (26.349 KiB/s)

Here, the performance penalty of auto-erase becomes even more visible.

monitor flash write_image erase image.bin 0x0800 bin
 wrote 49152 bytes from file image.bin in 2.932805s (16.367 KiB/s)

Or, could it be the case the time required for the explicit erase is
reported to low?

One more question: In the above patch (5/5), there is a change to the
flash loader in the contrib directory. As far as I understand, this
Cortex-Code is not used in the above programming method. Could you
please point me to some documentation how to use it or briefly explain
what it is good for?

Best regards,
 Simon

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Re: [Openocd-development] Last call before release / Olimex ARM-JTAG-EW patches

2011-08-03 Thread Simon Barner 
Dear Jean-Christophe,

  I'm going to create the 0.5.0 release

  If any patch are still pending ping the patch or send a e-mail with a
  link to it

  as announce before I've delay the release a little as we have the linux 
 kerne
  merge windows this days

  if nothing new I'll relase it tomorrow morning China time
 
 Only yesterday I was able to fix the issues with my Olimex ARM-JTAG-EW
 as described in tickets #34 and #35.
 
 I will clean up my (non-intrusive) patches, and send them to you within
 the next hours. I would really appreciate to get them into 0.5.0 since
 we are using this interface in a production environment.

As announced before, here are two patches that address the above tickets:

#34: 0001-JTAG-speed.patch

There where two distinct problems: The message length for set speed
messages is 5, not 4. This part of the patch fixes the usb_bulk_read
failures reported in the ticket.

Additionally, the device expects the speed in Hz, not kHz. I figured
this out be sniffing the USB traffic generated by IAR EWARM (using
Olimex' JLINK emulation driver). Since the default speed in the target
configuration file is 1000 kHz, this resulted in an effective speed of
1 kHz. This was probably the reason for the additional errors (JTAG
chain timeout (?), as in private email from Dimitar Dimitrov, the
original author of the driver and a former Olimex employee).

The patch also contains further minor improvements (see commit log).

#35: 0002-gdb.patch

As it turned out, this bug was only triggered when OpenOCD was compiled
with verbose logging (including USB and JTAG communcation). This can be
addressed by adding a keep_alive() call in the most expensive logging
function. Please note that this code is not compiled in release mode, so
this does not degrade the default performance.

Speaking of performance: Flashing now works with ~10 kBytes / s @ 1MHz
JTAG speed. I am not sure if this is great, but it is much better than
before (when the set speed command) was a NO-OP).

I also have some more findings from my analysis the USB traffic of the
IAR EWARM traffic, but I will discuss this at later point in with
Dimitar before since I am not sure what those commands are acutually doing.

Please let me know if you need more feedback. I would really appreciate
to get these fixes into 0.5.0.

Btw. If the are some testers who also own this interface, just let me
know and I can provide you with a build that includes my patches.

Best regards,
 Simon
From 87b05f377b94c3ad5773a5909f92708fbf0d1c62 Mon Sep 17 00:00:00 2001
From: Simon Barner bar...@gmx.de
Date: Wed, 3 Aug 2011 08:22:35 +0200
Subject: [PATCH 1/2] bar...@gmx.de

---
 src/jtag/drivers/arm-jtag-ew.c |   28 +++-
 1 files changed, 23 insertions(+), 5 deletions(-)

diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c
index 44eaeff..20f7c99 100644
--- a/src/jtag/drivers/arm-jtag-ew.c
+++ b/src/jtag/drivers/arm-jtag-ew.c
@@ -184,9 +184,9 @@ static int armjtagew_speed(int speed)
 
 
 usb_out_buffer[0] = CMD_SET_TCK_FREQUENCY;
-   buf_set_u32(usb_out_buffer + 1, 0, 32, speed);
+   buf_set_u32(usb_out_buffer + 1, 0, 32, speed*1000);
 
-result = armjtagew_usb_message(armjtagew_handle, 4, 4);
+result = armjtagew_usb_message(armjtagew_handle, 5, 4);
 
 if (result  0)
 {
@@ -196,7 +196,7 @@ static int armjtagew_speed(int speed)
 
usb_out_buffer[0] = CMD_GET_TCK_FREQUENCY;
 result = armjtagew_usb_message(armjtagew_handle, 1, 4);
-   speed_real = (int)buf_get_u32(usb_in_buffer,0,32);
+   speed_real = (int)buf_get_u32(usb_in_buffer,0,32) / 1000;
if (result  0)
{
 LOG_ERROR(ARM-JTAG-EW getting speed failed (%d), result);
@@ -204,7 +204,7 @@ static int armjtagew_speed(int speed)
}
else
{
-   LOG_INFO(Requested speed %dkHz, emulator reported %dkHz., speed, 
speed_real);
+   LOG_INFO(Requested speed %dkHz, emulator reported %dkHz., 
speed, speed_real);
}
 
 return ERROR_OK;
@@ -218,6 +218,14 @@ static int armjtagew_khz(int khz, int *jtag_speed)
return ERROR_OK;
 }
 
+static int armjtagew_speed_div(int speed, int* khz)
+{
+   *khz = speed;
+
+   return ERROR_OK;
+}
+
+
 static int armjtagew_init(void)
 {
int check_cnt;
@@ -248,6 +256,9 @@ static int armjtagew_init(void)
LOG_INFO(ARM-JTAG-EW initial read failed, don't worry);
}
 
+   // Initial JTAG speed (for reset and initialization): 32 kHz
+   armjtagew_speed(32);
+
LOG_INFO(ARM-JTAG-EW JTAG Interface ready);
 
armjtagew_reset(0, 0);
@@ -488,6 +499,11 @@ static int armjtagew_get_version_info(void)
usb_in_buffer[1], usb_in_buffer[0], \
isgraph(usb_in_buffer[2]) ? usb_in_buffer[2] : 'X', \
sn, auxinfo);
+   
+   if (1 != usb_in_buffer[1] || 6 != usb_in_buffer[0

Re: [Openocd-development] OpenOCD ticket 34 / usb_bulk_read failed

2011-07-20 Thread Simon Barner 
Hi,

 I can see one change that the referred commit introduced
 to the ARM-JTAG-EW driver. It is that a speed setting in
 the init script now actually is executed. Any such setting
 was previously silently ignored.
 
 Do you mean the following in jtag/core.c?
 
 +   retval = jtag-speed(jtag_speed_var);
 +   if (retval != ERROR_OK)
 +   return retval;
 

 The log shows that it is the speed setting that result in
 the crash.

I did some further investigations and noticed the following:

When setting the speed in armjtagew_speed(), the length of
the outgoing message is obviously 5 not 4 (command + 4 bytes
of length information). Getting this right, fixes the error
when establishing the JTAG connection.

However, when I try to upload an image (size ~50kb), the upload fails
with the following error (full log as attachment to the ticket).

Debug: 46257 35631 arm-jtag-ew.c:815 armjtagew_usb_read():
armjtagew_usb_read, result = -116
Error: 46258 35631 arm-jtag-ew.c:775 armjtagew_usb_message():
usb_bulk_read failed (requested=1631, result=-116)
Error: 46259 35631 arm-jtag-ew.c:717 armjtagew_tap_execute():
armjtagew_tap_execute, wrong result -1, expected 1627

However, when the CMD_SET_TCK_FREQUENCY command is not executed, *and*
the subsequent CMD_GET_TCK_FREQUENCY, everything works fine (see patch).

The reported JTAG speed is 5867kHz most of the time, sometimes also
weird speeds are reported (including negativ ones), so there seems to be
a problem with this command, too.

The actual speed seems to be slower since flashing the 50kb takes about 80s.

The tests where performed using an Olimex ARM-JTAG-EW, firmware version
1.0.6.0, Olimex drivers (=libusb-win32-1.2.2.0), HEAD version of OpenOCD
built against libusb-win32-1.2.2.0 on Windows 7/x64.

My suggestion is to commit the attached workaround for the 0.5.0 release
in order to unbreak the ARM-JTAG-EW, and to investigate on the source of
the problems in a second step.

Best regards,
 Simon

diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c
index 44eaeff..9f6717a 100644
--- a/src/jtag/drivers/arm-jtag-ew.c
+++ b/src/jtag/drivers/arm-jtag-ew.c
@@ -182,17 +182,27 @@ static int armjtagew_speed(int speed)
 int result;
 int speed_real;
 
-
+   /* TODO: Setting the jtag speed leads to subsequent usb_bulk_read
+*   errors. See ticket #34.
+*
+*   For now, make this a NOP in order to fix the arm-jtag-ew.
+*
+*   Note, that while the read-out of the current speed leads to
+*   unreliable results, it seems to be necessary for a working
+*   initialization of the device.
+*/
+#if 0
 usb_out_buffer[0] = CMD_SET_TCK_FREQUENCY;
buf_set_u32(usb_out_buffer + 1, 0, 32, speed);
 
-result = armjtagew_usb_message(armjtagew_handle, 4, 4);
+result = armjtagew_usb_message(armjtagew_handle, 5, 4);
 
 if (result  0)
 {
 LOG_ERROR(ARM-JTAG-EW setting speed failed (%d), result);
 return ERROR_JTAG_DEVICE_ERROR;
 }
+#endif
 
usb_out_buffer[0] = CMD_GET_TCK_FREQUENCY;
 result = armjtagew_usb_message(armjtagew_handle, 1, 4);
@@ -204,7 +214,8 @@ static int armjtagew_speed(int speed)
}
else
{
-   LOG_INFO(Requested speed %dkHz, emulator reported %dkHz., speed, 
speed_real);
+   //  LOG_INFO(Requested speed %dkHz, emulator reported %dkHz., 
speed, speed_real);
+   LOG_INFO(Setting the speed currently disabled for arm-jtag-ew. 
Current speed: %dkHz., speed_real);
}
 
 return ERROR_OK;

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Re: [Openocd-development] ARM-JTAG-EW set JTAG speed (was: OpenOCD ticket 34 / usb_bulk_read failed)

2011-07-20 Thread Simon Barner 
Hi,

 This shows that my commit only revealed an existing bug in the
 ARM-JTAG-EW speed setting function.

Yes.

 
 The bug was introduced in an earlier version or has been there
 from the beginning. Do a bisect to find out.

According to the Git history, the relevant code did not change
since the initial import. So, either

- the implementation was wrong from the every beginning
- the ARM-JTAG-EW interface firmware has changed the protocol.

 
 I do not own an ARM-JTAG-EW interface, so this is all support
 I can give.

Thanks you very much, anyways, you helped to find a workaround (see my
other email).

Simon
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Re: [Openocd-development] OpenOCD ticket 34 / usb_bulk_read failed

2011-07-20 Thread Simon Barner 
On 20.07.2011 11:26, Spencer Oliver wrote:

 My suggestion is to commit the attached workaround for the 0.5.0 release
 in order to unbreak the ARM-JTAG-EW, and to investigate on the source of
 the problems in a second step.

 
 I am not keen on committing hacks unless it is the last resort.

I fully agree. Maybe my formulation was a bit misleading. I would also
be much happier with a fully working driver, but if no solution can
be found before the release, I would prefer to have the workaround/hack.

 Does anyone else have one of these dongles that can test the patch?
 
 Or look into the problem.

Maybe the original author of the driver can have a look at this (Cc:'ed)?

Thanks,
Simon
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Re: [Openocd-development] OpenOCD ticket 34 / usb_bulk_read failed

2011-07-19 Thread Simon Barner 
Hi Jonas,

 I can see one change that the referred commit introduced
 to the ARM-JTAG-EW driver. It is that a speed setting in
 the init script now actually is executed. Any such setting
 was previously silently ignored.

Do you mean the following in jtag/core.c?

+   retval = jtag-speed(jtag_speed_var);
+   if (retval != ERROR_OK)
+   return retval;

 
 The log shows that it is the speed setting that result in
 the crash.
 
 Do you know if a speed setting after init worked before
 the commit?
 If not, please try to execute adapter_khz 1000 at the telnet
 prompt with the OpenOCD build of the version before this
 commit.

I just tested it with the last version from before the commit, and this
also results in the same error. You can find the log as an attachment to
the ticket.

Simon
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[Openocd-development] OpenOCD ticket 34 / usb_bulk_read failed

2011-07-18 Thread Simon Barner 
Hi,

I just could track down the following OpenOCD bug

https://sourceforge.net/apps/trac/openocd/ticket/34

to the following commit:

http://openocd.git.sourceforge.net/git/gitweb.cgi?p=openocd/openocd;a=commitdiff;h=e3f3f60a02abfd836c555e84b997de778177bc83

Do you have any clue what could be going wrong here?

Any hints or patches I could try out are very much welcome.

Thank you very much in advance,
 Simon
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