From: Spencer Oliver
Signed-off-by: Spencer Oliver
---
tcl/board/hitex_stm32-performancestick.cfg |2 +-
tcl/board/olimex_stm32_h103.cfg|2 +-
tcl/board/olimex_stm32_h107.cfg|2 +-
tcl/board/stm32100b_eval.cfg |2 +-
tcl/board/stm3210b_eval.cfg|2 +-
tcl/board/stm3210c_eval.cfg|2 +-
tcl/board/stm3210e_eval.cfg|2 +-
tcl/board/stm3220g_eval.cfg|2 +-
tcl/target/stm32.cfg | 75
tcl/target/stm32f1x.cfg| 75
tcl/target/stm32f2x.cfg| 61 ++
tcl/target/stm32f2xxx.cfg | 61 --
tcl/target/stm32xl.cfg |4 +-
13 files changed, 146 insertions(+), 146 deletions(-)
delete mode 100644 tcl/target/stm32.cfg
create mode 100644 tcl/target/stm32f1x.cfg
create mode 100644 tcl/target/stm32f2x.cfg
delete mode 100644 tcl/target/stm32f2xxx.cfg
diff --git a/tcl/board/hitex_stm32-performancestick.cfg
b/tcl/board/hitex_stm32-performancestick.cfg
index 515f7e0..0ec4076 100644
--- a/tcl/board/hitex_stm32-performancestick.cfg
+++ b/tcl/board/hitex_stm32-performancestick.cfg
@@ -5,7 +5,7 @@ reset_config trst_and_srst
source [find interface/stm32-stick.cfg]
set CHIPNAME stm32_hitex
-source [find target/stm32.cfg]
+source [find target/stm32f1x.cfg]
# configure str750 connected to jtag chain
# FIXME -- source [find target/str750.cfg] after cleaning that up
diff --git a/tcl/board/olimex_stm32_h103.cfg b/tcl/board/olimex_stm32_h103.cfg
index 98b0b65..ec03034 100644
--- a/tcl/board/olimex_stm32_h103.cfg
+++ b/tcl/board/olimex_stm32_h103.cfg
@@ -4,4 +4,4 @@
# Work-area size (RAM size) = 20kB for STM32F103RB device
set WORKAREASIZE 0x5000
-source [find target/stm32.cfg]
+source [find target/stm32f1x.cfg]
diff --git a/tcl/board/olimex_stm32_h107.cfg b/tcl/board/olimex_stm32_h107.cfg
index c21e19b..1d34a23 100644
--- a/tcl/board/olimex_stm32_h107.cfg
+++ b/tcl/board/olimex_stm32_h107.cfg
@@ -5,4 +5,4 @@
# Work-area size (RAM size) = 64kB for STM32F107VC device
set WORKAREASIZE 0x1
-source [find target/stm32.cfg]
+source [find target/stm32f1x.cfg]
diff --git a/tcl/board/stm32100b_eval.cfg b/tcl/board/stm32100b_eval.cfg
index e04b612..41153e5 100644
--- a/tcl/board/stm32100b_eval.cfg
+++ b/tcl/board/stm32100b_eval.cfg
@@ -4,4 +4,4 @@
# The chip has only 8KB sram
set WORKAREASIZE 0x2000
-source [find target/stm32.cfg]
+source [find target/stm32f1x.cfg]
diff --git a/tcl/board/stm3210b_eval.cfg b/tcl/board/stm3210b_eval.cfg
index 70798c1..ff3f777 100644
--- a/tcl/board/stm3210b_eval.cfg
+++ b/tcl/board/stm3210b_eval.cfg
@@ -4,4 +4,4 @@
# increase working area to 32KB for faster flash programming
set WORKAREASIZE 0x8000
-source [find target/stm32.cfg]
+source [find target/stm32f1x.cfg]
diff --git a/tcl/board/stm3210c_eval.cfg b/tcl/board/stm3210c_eval.cfg
index 27684f0..e069c04 100644
--- a/tcl/board/stm3210c_eval.cfg
+++ b/tcl/board/stm3210c_eval.cfg
@@ -4,4 +4,4 @@
# increase working area to 32KB for faster flash programming
set WORKAREASIZE 0x8000
-source [find target/stm32.cfg]
+source [find target/stm32f1x.cfg]
diff --git a/tcl/board/stm3210e_eval.cfg b/tcl/board/stm3210e_eval.cfg
index 786d027..91807ce 100644
--- a/tcl/board/stm3210e_eval.cfg
+++ b/tcl/board/stm3210e_eval.cfg
@@ -4,7 +4,7 @@
# increase working area to 32KB for faster flash programming
set WORKAREASIZE 0x8000
-source [find target/stm32.cfg]
+source [find target/stm32f1x.cfg]
#
# configure FSMC Bank 1 (NOR/PSRAM Bank 2) NOR flash
diff --git a/tcl/board/stm3220g_eval.cfg b/tcl/board/stm3220g_eval.cfg
index e836f0e..48b57c1 100644
--- a/tcl/board/stm3220g_eval.cfg
+++ b/tcl/board/stm3220g_eval.cfg
@@ -8,4 +8,4 @@ set WORKAREASIZE 0x2
# chip name
set CHIPNAME STM32F207IGT6
-source [find target/stm32f2xxx.cfg]
+source [find target/stm32f2x.cfg]
diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg
deleted file mode 100644
index 9879c04..000
--- a/tcl/target/stm32.cfg
+++ /dev/null
@@ -1,75 +0,0 @@
-# script for stm32
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME stm32
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-# Work-area is a space in RAM used for flash programming
-# By default use 16kB
-if { [info exists WORKAREASIZE] } {
- set _WORKAREASIZE $WORKAREASIZE
-} else {
- set _WORKAREASIZE 0x4000
-}
-
-# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG =
1MHz
-adapter_khz 1000
-
-adapter_nsrst_delay 100
-jtag_ntrst_delay 100
-
-#jtag scan chain
-if { [info exists CPUTAPID ] } {
- set _CPUTAPID $CPUTAPID
-} else {
- # See STM Document RM0008
- # Section 26.6.3
- set _CPUTAPID 0x3ba00477
-}
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irma
