The examine() method has some conceptual breakage. Cope with it by manually splitting out the run-once parts from the after-each-reset parts ... this gets rid of memory leaks and speeds up resets after the first one. --- This passes in light testing, and it looks like the after-each-reset logic is still prepared to reinit the debug port. But ... please keep an eye out for more subtle problems that might crop up.
src/target/cortex_a8.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -1362,7 +1362,7 @@ static int cortex_a8_handle_target_reque * Cortex-A8 target information and configuration */ -static int cortex_a8_examine(struct target *target) +static int cortex_a8_examine_first(struct target *target) { struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target); struct armv7a_common *armv7a = &cortex_a8->armv7a_common; @@ -1447,10 +1447,21 @@ static int cortex_a8_examine(struct targ LOG_DEBUG("Configured %i hw breakpoint pairs and %i hw watchpoint pairs", cortex_a8->brp_num , cortex_a8->wrp_num); - /* Configure core debug access */ - cortex_a8_init_debug_access(target); - target_set_examined(target); + return ERROR_OK; +} + +static int cortex_a8_examine(struct target *target) +{ + int retval = ERROR_OK; + + /* don't re-probe hardware after each reset */ + if (!target_was_examined(target)) + retval = cortex_a8_examine_first(target); + + /* Configure core debug access */ + if (retval == ERROR_OK) + retval = cortex_a8_init_debug_access(target); return retval; } _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development