Hi
As a device driver guy, I care about interrrupt, on Solaris (Nevada_94 for
example) there is a intrd (/usr/lib/intrd)which was triggered to do something
during my heavy IO run.
23:26:51.891 ++/var/adm/messages: Aug 28 23:26:48 sfx4600 intrd[669]:
Optimizing interrupt assignments
23:26:51.891 ++/var/adm/messages: Aug 28 23:26:48 sfx4600 intrd[669]: Interrupt
assignments optimized
However, mpstat does not show any interrupt distribution, perf in vdbench is
not improved at all.
There is a related US patent (US 2007/0043347 A1) by Ethan Solomita, Sunay
Tripathi and Jerry Chu.
#
# mpstat 10
CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl
0 284 8 60 533 160 780 11 50 561 20463 11 0 86
1 194 6 34 256 12 8996 30 381 22333 11 0 86
2 340 17 57 230 79 1005 12 57 691 30184 6 0 90
3 278 17 64 1642 11 52 661 28924 3 0 92
CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl
00 09 368 162 1230320 10 0 0 100
10 00710 1270310430 0 0 100
25 0067 27 711310450 0 0 100
30 00451 830200230 0 0 100
CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl
00 05 366 161 1090210 20 0 0 100
10 00560 1010210420 0 0 100
22 00523 930200300 0 0 100
30 00391 720110340 0 0 100
CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl
0 14 25 373 161 1120310 1980 0 0 100
11 00655 1030210390 0 0 100
24 00605 1040210310 0 0 100
30 00381 700100340 0 0 100
CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl
00 07 368 163 1000220100 0 0 100
10 00620 1080220380 0 0 100
22 00638 1010210360 0 0 100
30 00371 670100290 0 0 100
CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl
00 06 365 161 950220120 0 0 100
10 00590 1020220320 0 0 100
20 00635 1050210310 0 0 100
30 03391 710110340 0 0 100
CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl
0 357 1 391 2790 179 20683 933 261 33500 200716 41 0 52
1 254 1 322 1579 1030 602 53 72 55360 6430 42 0 58
2 1791 0 202 26626 20656 911 539 33110 188466 35 0 59
3 740 0 201 27121 20878 963 521 33060 183036 33 0 61
CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl
00 0 27 5383 176 54801 2271 210 83500 52619 15 85 0 0
10 06 2695 2666 138 13 12 99010 1130 100 0 0
2 43 04 107316 55332 4310 761 83240 48689 15 82 0 2
30 0 20 106851 56071 4394 753 84130 49171 15 83 0 2
CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl
00 0 20 8583 165 55643 3600 94 79480 52248 15 85 0 0
13 00 2797 2770 178 16 15 82600 1420 100 0 0
2 42 0 17 14872 11 56646 6201 564 79860 48621 15 83 0 2
3 18 06 148111 56568 5948 560 80000 48901 16 83 0 2
CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl
09 0 20 9972 174 55426 4560 97 76670 51057 17 83 0 0
10 00 2975 2959 400 26 19 79050 3340 100 0 0
21 02 153414 56767 6176 550 78810 48641 16 82 0 2
30 00 157541 57430 6455 550 79050 49024 15 83 0 2
CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl
00 0 34 9416 175 55902 4018 77 79220 52174 16 84 0 0
10 01 2840 2738 215 17 14 78000 1750 100 0 0
21 0 231 153543 57429 6005 521 80990 49924 15 84 0 2
30 0 16 157671 57634 6274 520 80620 49822 15 84 0 2
CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl
00 0 23 9166 177 56211 3884 45 80680 52606