[OpenWrt-Devel] [PATCH 2/2] tools: findutils: fix compilation with glibc 2.28
Add a temporary workaround to compile with glibc 2.28
as some constants were removed and others made private
Signed-off-by: Luis Araneda
---
.../110-glibc-change-work-around.patch| 104 ++
1 file changed, 104 insertions(+)
create mode 100644 tools/findutils/patches/110-glibc-change-work-around.patch
diff --git a/tools/findutils/patches/110-glibc-change-work-around.patch
b/tools/findutils/patches/110-glibc-change-work-around.patch
new file mode 100644
index 00..91b69274c8
--- /dev/null
+++ b/tools/findutils/patches/110-glibc-change-work-around.patch
@@ -0,0 +1,104 @@
+Subject: Workaround change in glibc
+
+Temporary workaround to compile with glibc 2.28, which
+deprecated some constants
+
+Based on the workaround made for the tools/m4 package
+
+--- a/gl/lib/stdio-impl.h
b/gl/lib/stdio-impl.h
+@@ -18,6 +18,12 @@
+the same implementation of stdio extension API, except that some fields
+have different naming conventions, or their access requires some casts. */
+
++/* Glibc 2.28 made _IO_IN_BACKUP private. For now, work around this
++ problem by defining it ourselves. FIXME: Do not rely on glibc
++ internals. */
++#if !defined _IO_IN_BACKUP && defined _IO_EOF_SEEN
++# define _IO_IN_BACKUP 0x100
++#endif
+
+ /* BSD stdio derived implementations. */
+
+--- a/gl/lib/freadahead.c
b/gl/lib/freadahead.c
+@@ -25,7 +25,7 @@
+ size_t
+ freadahead (FILE *fp)
+ {
+-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+ if (fp->_IO_write_ptr > fp->_IO_write_base)
+ return 0;
+ return (fp->_IO_read_end - fp->_IO_read_ptr)
+--- a/gl/lib/fseeko.c
b/gl/lib/fseeko.c
+@@ -47,7 +47,7 @@ fseeko (FILE *fp, off_t offset, int when
+ #endif
+
+ /* These tests are based on fpurge.c. */
+-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+ if (fp->_IO_read_end == fp->_IO_read_ptr
+ && fp->_IO_write_ptr == fp->_IO_write_base
+ && fp->_IO_save_base == NULL)
+@@ -123,7 +123,7 @@ fseeko (FILE *fp, off_t offset, int when
+ return -1;
+ }
+
+-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+ fp->_flags &= ~_IO_EOF_SEEN;
+ fp->_offset = pos;
+ #elif defined __sferror || defined __DragonFly__ || defined __ANDROID__
+--- a/gl/lib/fflush.c
b/gl/lib/fflush.c
+@@ -33,7 +33,7 @@
+ #undef fflush
+
+
+-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+
+ /* Clear the stream's ungetc buffer, preserving the value of ftello (fp). */
+ static void
+@@ -72,7 +72,7 @@ clear_ungetc_buffer (FILE *fp)
+
+ #endif
+
+-#if ! (defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */)
++#if ! (defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */)
+
+ # if (defined __sferror || defined __DragonFly__ || defined __ANDROID__) &&
defined __SNPT
+ /* FreeBSD, NetBSD, OpenBSD, DragonFly, Mac OS X, Cygwin, Android */
+@@ -148,7 +148,7 @@ rpl_fflush (FILE *stream)
+ if (stream == NULL || ! freading (stream))
+ return fflush (stream);
+
+-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+
+ clear_ungetc_buffer_preserving_position (stream);
+
+--- a/gl/lib/freading.c
b/gl/lib/freading.c
+@@ -31,7 +31,7 @@ freading (FILE *fp)
+ /* Most systems provide FILE as a struct and the necessary bitmask in
+ , because they need it for implementing getc() and putc() as
+ fast macros. */
+-# if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++# if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+ return ((fp->_flags & _IO_NO_WRITES) != 0
+ || ((fp->_flags & (_IO_NO_READS | _IO_CURRENTLY_PUTTING)) == 0
+ && fp->_IO_read_base != NULL));
+--- a/gl/lib/fpurge.c
b/gl/lib/fpurge.c
+@@ -62,7 +62,7 @@ fpurge (FILE *fp)
+ /* Most systems provide FILE as a struct and the necessary bitmask in
+ , because they need it for implementing getc() and putc() as
+ fast macros. */
+-# if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++# if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+ fp->_IO_read_end = fp->_IO_read_ptr;
+ fp->_IO_write_ptr = fp->_IO_write_base;
+ /* Avoid
[OpenWrt-Devel] [PATCH 1/2] tools: m4: fix compilation with glibc 2.28
Add a temporary workaround to compile with glibc 2.28
as some constants were removed and others made private
Signed-off-by: Luis Araneda
---
.../010-glibc-change-work-around.patch| 118 ++
1 file changed, 118 insertions(+)
create mode 100644 tools/m4/patches/010-glibc-change-work-around.patch
diff --git a/tools/m4/patches/010-glibc-change-work-around.patch
b/tools/m4/patches/010-glibc-change-work-around.patch
new file mode 100644
index 00..0ef6216965
--- /dev/null
+++ b/tools/m4/patches/010-glibc-change-work-around.patch
@@ -0,0 +1,118 @@
+Subject: Workaround change in glibc
+
+Temporary workaround to compile with glibc 2.28, which
+deprecated some constants
+
+Taken from the rpms/m4 Fedora repository, commit 814d5921
+(Work around change in glibc)
+
+Original filename: m4-1.4.18-glibc-change-work-around.patch
+
+--- a/lib/stdio-impl.h
b/lib/stdio-impl.h
+@@ -18,6 +18,12 @@
+the same implementation of stdio extension API, except that some fields
+have different naming conventions, or their access requires some casts. */
+
++/* Glibc 2.28 made _IO_IN_BACKUP private. For now, work around this
++ problem by defining it ourselves. FIXME: Do not rely on glibc
++ internals. */
++#if !defined _IO_IN_BACKUP && defined _IO_EOF_SEEN
++# define _IO_IN_BACKUP 0x100
++#endif
+
+ /* BSD stdio derived implementations. */
+
+--- a/lib/fflush.c
b/lib/fflush.c
+@@ -33,7 +33,7 @@
+ #undef fflush
+
+
+-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+
+ /* Clear the stream's ungetc buffer, preserving the value of ftello (fp). */
+ static void
+@@ -72,7 +72,7 @@ clear_ungetc_buffer (FILE *fp)
+
+ #endif
+
+-#if ! (defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */)
++#if ! (defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */)
+
+ # if (defined __sferror || defined __DragonFly__ || defined __ANDROID__) &&
defined __SNPT
+ /* FreeBSD, NetBSD, OpenBSD, DragonFly, Mac OS X, Cygwin, Android */
+@@ -148,7 +148,7 @@ rpl_fflush (FILE *stream)
+ if (stream == NULL || ! freading (stream))
+ return fflush (stream);
+
+-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+
+ clear_ungetc_buffer_preserving_position (stream);
+
+--- a/lib/fpending.c
b/lib/fpending.c
+@@ -32,7 +32,7 @@ __fpending (FILE *fp)
+ /* Most systems provide FILE as a struct and the necessary bitmask in
+ , because they need it for implementing getc() and putc() as
+ fast macros. */
+-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+ return fp->_IO_write_ptr - fp->_IO_write_base;
+ #elif defined __sferror || defined __DragonFly__ || defined __ANDROID__
+ /* FreeBSD, NetBSD, OpenBSD, DragonFly, Mac OS X, Cygwin, Android */
+--- a/lib/fpurge.c
b/lib/fpurge.c
+@@ -62,7 +62,7 @@ fpurge (FILE *fp)
+ /* Most systems provide FILE as a struct and the necessary bitmask in
+ , because they need it for implementing getc() and putc() as
+ fast macros. */
+-# if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++# if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+ fp->_IO_read_end = fp->_IO_read_ptr;
+ fp->_IO_write_ptr = fp->_IO_write_base;
+ /* Avoid memory leak when there is an active ungetc buffer. */
+--- a/lib/freadahead.c
b/lib/freadahead.c
+@@ -25,7 +25,7 @@
+ size_t
+ freadahead (FILE *fp)
+ {
+-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+ if (fp->_IO_write_ptr > fp->_IO_write_base)
+ return 0;
+ return (fp->_IO_read_end - fp->_IO_read_ptr)
+--- a/lib/freading.c
b/lib/freading.c
+@@ -31,7 +31,7 @@ freading (FILE *fp)
+ /* Most systems provide FILE as a struct and the necessary bitmask in
+ , because they need it for implementing getc() and putc() as
+ fast macros. */
+-# if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS,
Haiku, Linux libc5 */
++# if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku,
Linux libc5 */
+ return ((fp->_flags & _IO_NO_WRITES) != 0
+ || ((fp->_flags & (_IO_NO_READS | _IO_CURRENTLY_PUTTING)) == 0
+ && fp->_IO_read_base != NULL));
+--- a/lib/fseeko.c
b/lib/fseeko.c
+@@ -47,7 +47,7 @@ fseeko (FILE *fp, off_t offset, int when
+ #endif
+
+ /* These tests are based on fpurge.c. */
+-#if defined
[OpenWrt-Devel] [PATCH 0/2] tools: fix compilation with glibc 2.28
This series add a temporary workaround to fix compilation of packages m4 and findutils using glibc 2.28, which deprecated some constants by removing the file "libio.h" Tested on an Intel Core i7-4500U running Arch Linux (x64) with glibc 2.28-1 Luis Araneda (2): tools: m4: fix compilation with glibc 2.28 tools: findutils: fix compilation with glibc 2.28 .../110-glibc-change-work-around.patch| 104 +++ .../010-glibc-change-work-around.patch| 118 ++ 2 files changed, 222 insertions(+) create mode 100644 tools/findutils/patches/110-glibc-change-work-around.patch create mode 100644 tools/m4/patches/010-glibc-change-work-around.patch -- 2.18.0 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] ucert
Hi John, On Wed, Aug 08, 2018 at 08:07:01PM +0200, John Crispin wrote: > Hi All, > > $magic feature, please elaborate, kthxbye ucert [1] is a way to allow trust delegation and revocation on top of usign/signify intended for sysupgrade images. Functionality to make use of ucert to automatically sign generated images and verify them on the target has recently been added to OpenWrt (image signatures are verified if present, they are not mandatory unless $REQUIRE_IMAGE_SIGNATURE is set to '1'). Background: During battlemesh in Porto we decided upon sysupgrade image metadata and also had a vague idea how signing sysupgrade images would be implemented in the same fashion as image metadata. However, when @aparcar came up with the sysupgrade-image-server [2] we quickly realised that simply using usign won't be sufficient or at least it felt a bit fishy to have an eternal irrevokable private key on a machine processing complex input from anonymous users of The Internet. Hence, in this year's wireless meshup we discussed how the most simple way to delegate (and limit and possibly revoke) keys to those automated build servers could work. After mapping out the basic idea, WIO [3] agreed to sponsor the initial development of ucert. Apart from sysupgrade images, ucert may also be used for other payloads in situations where using X.509/ASN.1 or relying on TLS isn't feasible, such as config distribution/provisioning. For example on low-cost routers (eg. devices with only 4MB flash): Using opkg (even to just update the openwrt-keyring) or stroring ca-certificates for X.509 or using GnuPG would be utopic on those boxes. If you or anyone got any questions regarding ucert, always feel free to contact me! Cheers Daniel [1]: https://git.openwrt.org/?p=project/ucert.git;a=blob;f=README.md [2]: https://github.com/aparcar/attendedsysupgrade-server [3]: http://wiowireless.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH v2] ath79: add support for OCEDO Koala
This commit adds support for the OCEDO Koala
SOC:Qualcomm QCA9558 (Scorpion)
RAM:128MB
FLASH: 16MiB
WLAN1: QCA9558 2.4 GHz 802.11bgn 3x3
WLAN2: QCA9880 5 GHz 802.11nac 3x3
INPUT: RESET button
LED:Power, LAN, WiFi 2.4, WiFi 5, SYS
Serial: Header Next to Black metal shield
Pinout is 3.3V - GND - TX - RX (Arrow Pad is 3.3V)
The Serial setting is 115200-8-N-1.
Tested and working:
- Ethernet
- 2.4 GHz WiFi
- 5 GHz WiFi
- TFTP boot from ramdisk image
- Installation via ramdisk image
- OpenWRT sysupgrade
- Buttons
- LEDs
Installation seems to be possible only through booting an OpenWRT
ramdisk image.
Hold down the reset button while powering on the device. It will load a
ramdisk image named 'koala-uImage-initramfs-lzma.bin' from 192.168.100.8.
Note: depending on the present software, the device might also try to
pull a file called 'koala-uimage-factory'. Only the name differs, it
is still used as a ramdisk image.
Wait for the ramdisk image to boot. OpenWRT can be written to the flash
via sysupgrade or mtd.
Due to the flip-flop bootloader which we not (yet) support, you need to
set the partition the bootloader is selecting. It is possible from the
initramfs image with
> fw_setenv bootcmd run bootcmd_1
Afterwards you can reboot the device.
Signed-off-by: David Bauer
---
package/boot/uboot-envtools/files/ath79 | 1 +
.../ath79/base-files/etc/board.d/02_network | 1 +
.../etc/hotplug.d/firmware/11-ath10k-caldata | 4 +
.../linux/ath79/dts/qca9558_ocedo_koala.dts | 169 ++
target/linux/ath79/image/generic.mk | 10 ++
5 files changed, 185 insertions(+)
create mode 100644 target/linux/ath79/dts/qca9558_ocedo_koala.dts
diff --git a/package/boot/uboot-envtools/files/ath79
b/package/boot/uboot-envtools/files/ath79
index 4d9d2e8fe0..aa0bf4514f 100644
--- a/package/boot/uboot-envtools/files/ath79
+++ b/package/boot/uboot-envtools/files/ath79
@@ -14,6 +14,7 @@ board=$(board_name)
case "$board" in
glinet,ar300m|\
+ocedo,koala|\
ocedo,raccoon|\
openmesh,om5p-ac-v2)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1" "0x1"
diff --git a/target/linux/ath79/base-files/etc/board.d/02_network
b/target/linux/ath79/base-files/etc/board.d/02_network
index 9ec78ece23..413b4a4160 100755
--- a/target/linux/ath79/base-files/etc/board.d/02_network
+++ b/target/linux/ath79/base-files/etc/board.d/02_network
@@ -10,6 +10,7 @@ ath79_setup_interfaces()
case "$board" in
avm,fritz300e|\
+ ocedo,koala|\
ocedo,raccoon|\
pcs,cap324|\
tplink,re450-v2|\
diff --git
a/target/linux/ath79/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
b/target/linux/ath79/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
index 038573f3e8..57d9744af2 100644
--- a/target/linux/ath79/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
+++ b/target/linux/ath79/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
@@ -87,6 +87,10 @@ board=$(board_name)
case "$FIRMWARE" in
"ath10k/cal-pci-:00:00.0.bin")
case $board in
+ ocedo,koala)
+ ath10kcal_extract "art" 20480 2116
+ ath10kcal_patch_mac $(mtd_get_mac_binary art 12)
+ ;;
openmesh,om5p-ac-v2)
ath10kcal_extract "ART" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat
/sys/class/net/eth0/address) +16)
diff --git a/target/linux/ath79/dts/qca9558_ocedo_koala.dts
b/target/linux/ath79/dts/qca9558_ocedo_koala.dts
new file mode 100644
index 00..6020e469a3
--- /dev/null
+++ b/target/linux/ath79/dts/qca9558_ocedo_koala.dts
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include
+#include
+
+#include "qca9557.dtsi"
+
+/ {
+ compatible = "ocedo,koala", "qca,qca9557";
+ model = "OCEDO Koala";
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8";
+ };
+
+ aliases {
+ led-status =
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power {
+ label = "koala:green:power";
+ gpios = < 22 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ wifi2 {
+ label = "koala:yellow:wlan2";
+ gpios = < 23 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1tpt";
+ default-state = "off";
+ };
+
+ wifi5 {
+ label = "koala:red:wlan58";
+ gpios = < 13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0tpt";
+ default-state = "off";
+ };
+
+ system: system {
+ label = "koala:blue:sys";
+ gpios = < 19 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
[OpenWrt-Devel] ucert
Hi All, $magic feature, please elaborate, kthxbye John ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] Merged: Change the sigb buffer to be the same size as thefread
Merged into project/ucert.git, branch master at http://git.openwrt.org/?p=project/ucert.git. Thank you! ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] Change the sigb buffer to be the same size as the fread
Signed-off-by: Damien Mascord --- ucert.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ucert.c b/ucert.c index 53a1a05..569b31d 100644 --- a/ucert.c +++ b/ucert.c @@ -414,7 +414,7 @@ static int cert_issue(const char *certfile, const char *pubkeyfile, const char * void *c; FILE *pkf, *sigf; char pkb[512]; - char sigb[512]; + char sigb[1024]; char fname[256], sfname[256]; char pkfp[17]; char tmpdir[] = "/tmp/ucert-XX"; -- 2.16.4 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] net: dsa: rtl8366rb: Support port 4 (WAN)
On Wed, Aug 08, 2018 at 02:38:55PM +0200, Linus Walleij wrote: > The totally undocumented IO mode needs to be set to enumerator > 0 to enable port 4 also known as WAN in most configurations, > for ordinary traffic. The 3 bits in the register come up as > 010 after reset, but need to be set to 000. > > The Realtek source code contains a name for these bits, but > no explanation of what the 8 different IO modes may be. Hi Linus I'm guessing this is MII, RMII, GMII, RGMII etc. If it is, using phy-mode would be good. But that can wait until we actually know. > Set it to zero for the time being and drop a comment so > people know what is going on if they run into trouble. This > "mode zero" works fine with the D-Link DIR-685 with > RTL8366RB. > > Signed-off-by: Linus Walleij Reviewed-by: Andrew Lunn Andrew ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] net: dsa: rtl8366rb: Support port 4 (WAN)
The totally undocumented IO mode needs to be set to enumerator 0 to enable port 4 also known as WAN in most configurations, for ordinary traffic. The 3 bits in the register come up as 010 after reset, but need to be set to 000. The Realtek source code contains a name for these bits, but no explanation of what the 8 different IO modes may be. Set it to zero for the time being and drop a comment so people know what is going on if they run into trouble. This "mode zero" works fine with the D-Link DIR-685 with RTL8366RB. Signed-off-by: Linus Walleij --- drivers/net/dsa/rtl8366rb.c | 30 ++ 1 file changed, 30 insertions(+) diff --git a/drivers/net/dsa/rtl8366rb.c b/drivers/net/dsa/rtl8366rb.c index 1e55b9bf8b56..a4d5049df692 100644 --- a/drivers/net/dsa/rtl8366rb.c +++ b/drivers/net/dsa/rtl8366rb.c @@ -48,6 +48,23 @@ #define RTL8366RB_SSCR20x0004 #define RTL8366RB_SSCR2_DROP_UNKNOWN_DABIT(0) +/* Port Mode Control registers */ +#define RTL8366RB_PMC0 0x0005 +#define RTL8366RB_PMC0_SPI BIT(0) +#define RTL8366RB_PMC0_EN_AUTOLOAD BIT(1) +#define RTL8366RB_PMC0_PROBE BIT(2) +#define RTL8366RB_PMC0_DIS_BISRBIT(3) +#define RTL8366RB_PMC0_ADCTEST BIT(4) +#define RTL8366RB_PMC0_SRAM_DIAG BIT(5) +#define RTL8366RB_PMC0_EN_SCAN BIT(6) +#define RTL8366RB_PMC0_P4_IOMODE_SHIFT 7 +#define RTL8366RB_PMC0_P4_IOMODE_MASK GENMASK(9, 7) +#define RTL8366RB_PMC0_P5_IOMODE_SHIFT 10 +#define RTL8366RB_PMC0_P5_IOMODE_MASK GENMASK(12, 10) +#define RTL8366RB_PMC0_SDSMODE_SHIFT 13 +#define RTL8366RB_PMC0_SDSMODE_MASKGENMASK(15, 13) +#define RTL8366RB_PMC1 0x0006 + /* Port Mirror Control Register */ #define RTL8366RB_PMCR 0x0007 #define RTL8366RB_PMCR_SOURCE_PORT(a) (a) @@ -860,6 +877,19 @@ static int rtl8366rb_setup(struct dsa_switch *ds) if (ret) return ret; + /* Port 4 setup: this enables Port 4, usually the WAN port, +* common PHY IO mode is apparently mode 0, and this is not what +* the port is initialized to. There is no explanation of the +* IO modes in the Realtek source code, if your WAN port is +* connected to something exotic such as fiber, then this might +* be worth experimenting with. +*/ + ret = regmap_update_bits(smi->map, RTL8366RB_PMC0, +RTL8366RB_PMC0_P4_IOMODE_MASK, +0 << RTL8366RB_PMC0_P4_IOMODE_SHIFT); + if (ret) + return ret; + /* Discard VLAN tagged packets if the port is not a member of * the VLAN with which the packets is associated. */ -- 2.17.1 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH 1/4] uboot-envtools: add ath79 target
On 2018-08-06 10:21 AM, David Bauer wrote: > This adds uci entries for all ath79 devices for which this already was > the case on ar71xx. Additionally we add the OCEDO Koala as there was no > support in OpenWRT yet. Can you rebase (and add boards added since the commit this is based on) against latest master? Quite a few ath79 boards have been added since then and I don't see them in this patch (and most of them are previously in ar71xx). Regards, Daniel > > Signed-off-by: David Bauer > --- > package/boot/uboot-envtools/files/ath79 | 26 + > 1 file changed, 26 insertions(+) > create mode 100644 package/boot/uboot-envtools/files/ath79 > > diff --git a/package/boot/uboot-envtools/files/ath79 > b/package/boot/uboot-envtools/files/ath79 > new file mode 100644 > index 00..4d9d2e8fe0 > --- /dev/null > +++ b/package/boot/uboot-envtools/files/ath79 > @@ -0,0 +1,26 @@ > +#!/bin/sh > +# > +# Copyright (C) 2011-2014 OpenWrt.org > +# > + > +[ -e /etc/config/ubootenv ] && exit 0 > + > +touch /etc/config/ubootenv > + > +. /lib/uboot-envtools.sh > +. /lib/functions.sh > + > +board=$(board_name) > + > +case "$board" in > +glinet,ar300m|\ > +ocedo,raccoon|\ > +openmesh,om5p-ac-v2) > + ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1" "0x1" > + ;; > +esac > + > +config_load ubootenv > +config_foreach ubootenv_add_app_config ubootenv > + > +exit 0 > ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH 3/4] kernel: allow device-tree configuration of at803x
On 06/08/18 16:21, David Bauer wrote:
This commit adds the ability to configure specific functions of the
at803x series ethernet-PHYs, which were previously configured
exclusively with the help of platform-data, via device-tree.
This is needed to fully support existing boards of the ar71xx platform.
Signed-off-by: David Bauer
---
...phy-at803x-allow-to-configure-via-dt.patch | 49 +++
1 file changed, 49 insertions(+)
create mode 100644
target/linux/generic/pending-4.14/736-net-phy-at803x-allow-to-configure-via-dt.patch
diff --git
a/target/linux/generic/pending-4.14/736-net-phy-at803x-allow-to-configure-via-dt.patch
b/target/linux/generic/pending-4.14/736-net-phy-at803x-allow-to-configure-via-dt.patch
new file mode 100644
index 00..daff25b633
--- /dev/null
+++
b/target/linux/generic/pending-4.14/736-net-phy-at803x-allow-to-configure-via-dt.patch
@@ -0,0 +1,49 @@
+Index: linux-4.14.60/drivers/net/phy/at803x.c
+===
+--- linux-4.14.60.orig/drivers/net/phy/at803x.c
linux-4.14.60/drivers/net/phy/at803x.c
+@@ -354,6 +354,14 @@ static int at803x_config_init(struct phy
+ AT803X_DEBUG_TX_CLK_DLY_EN, 0);
+ }
+
++#ifdef CONFIG_OF_MDIO
the ifdef seems superfluous and again this should be part of the
at803x_priv struct. however looking at the current code it seems that
the patchery is inconsistent and the driver is pretty messy. we should
consider cleaning this up and consolidating the driver patches and move
them to generic/
John
++ if (phydev->mdio.dev.of_node &&
++ of_property_read_bool(phydev->mdio.dev.of_node,
++"at803x-disable-smarteee")) {
++ at803x_disable_smarteee(phydev);
++ }
++#endif
++
+ return 0;
+ }
+
+@@ -392,6 +400,7 @@ static void at803x_link_change_notify(st
+ {
+ struct at803x_priv *priv = phydev->priv;
+ struct at803x_platform_data *pdata;
++ u8 fixup_rgmii_tx_delay = 0;
+ pdata = dev_get_platdata(>mdio.dev);
+
+ /*
+@@ -421,8 +430,19 @@ static void at803x_link_change_notify(st
+ } else {
+ priv->phy_reset = false;
+ }
+- if (pdata && pdata->fixup_rgmii_tx_delay &&
+- phydev->speed != priv->prev_speed) {
++
++ if (pdata && pdata->fixup_rgmii_tx_delay)
++ fixup_rgmii_tx_delay = 1;
++
++#ifdef CONFIG_OF_MDIO
++ if (phydev->mdio.dev.of_node &&
++ of_property_read_bool(phydev->mdio.dev.of_node,
++"at803x-fixup-rgmii-tx-delay")) {
++ fixup_rgmii_tx_delay = 1;
++ }
++#endif
++
++ if (fixup_rgmii_tx_delay && phydev->speed != priv->prev_speed) {
+ switch (phydev->speed) {
+ case SPEED_10:
+ case SPEED_100:
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Re: [OpenWrt-Devel] [PATCH 2/2] ar71xx: allow to override at803x sgmii aneg status
On 06/08/18 16:15, David Bauer wrote:
When checking the outcome of the PHY autonegotiation status, at803x
currently returns false in case the SGMII side is not established.
Due to a hardware-bug, ag71xx needs to fixup the SoCs SGMII side, which
it can't as it is not aware of the link-establishment.
This commit allows to ignore the SGMII side autonegotiation status to
allow ag71xx to do the fixup work.
Signed-off-by: David Bauer
comment inline ...
---
.../files/arch/mips/ath79/mach-fritz450e.c| 1 +
...at803x-add-sgmii-aneg-override-pdata.patch | 42 +++
2 files changed, 43 insertions(+)
create mode 100644
target/linux/ar71xx/patches-4.9/903-at803x-add-sgmii-aneg-override-pdata.patch
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-fritz450e.c
b/target/linux/ar71xx/files/arch/mips/ath79/mach-fritz450e.c
index e48ddd65e7..4e99834d27 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-fritz450e.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-fritz450e.c
@@ -122,6 +122,7 @@ static struct gpio_keys_button fritz450E_gpio_keys[]
__initdata = {
static struct at803x_platform_data fritz450E_at803x_data = {
.disable_smarteee = 1,
.has_reset_gpio = 1,
+ .override_sgmii_aneg = 1,
.reset_gpio = FRITZ450E_GPIO_PHY_RESET,
};
diff --git a/target/linux/ar71xx/patches-4.9/903-at803x-add-sgmii-aneg-override-pdata.patch b/target/linux/ar71xx/patches-4.9/903-at803x-add-sgmii-aneg-override-pdata.patch
new file mode 100644
index 00..9c922d155d
--- /dev/null
+++
b/target/linux/ar71xx/patches-4.9/903-at803x-add-sgmii-aneg-override-pdata.patch
@@ -0,0 +1,42 @@
+Index: linux-4.9.111/drivers/net/phy/at803x.c
+===
+--- linux-4.9.111.orig/drivers/net/phy/at803x.c
linux-4.9.111/drivers/net/phy/at803x.c
+@@ -461,12 +461,15 @@ static void at803x_link_change_notify(st
+
+ static int at803x_aneg_done(struct phy_device *phydev)
+ {
++ struct at803x_platform_data *pdata;
+ int ccr;
+
+ int aneg_done = genphy_aneg_done(phydev);
+ if (aneg_done != BMSR_ANEGCOMPLETE)
+ return aneg_done;
+
++ pdata = dev_get_platdata(>mdio.dev);
++
use ath803_priv here and not pdata
John
+ /*
+* in SGMII mode, if copper side autoneg is successful,
+* also check SGMII side autoneg result
+@@ -481,7 +484,8 @@ static int at803x_aneg_done(struct phy_d
+ /* check if the SGMII link is OK. */
+ if (!(phy_read(phydev, AT803X_PSSR) & AT803X_PSSR_MR_AN_COMPLETE)) {
+ pr_warn("803x_aneg_done: SGMII link is not ok\n");
+- aneg_done = 0;
++ if (!pdata || !pdata->override_sgmii_aneg)
++ aneg_done = 0;
+ }
+ /* switch back to copper page */
+ phy_write(phydev, AT803X_REG_CHIP_CONFIG, ccr | AT803X_BT_BX_REG_SEL);
+Index: linux-4.9.111/include/linux/platform_data/phy-at803x.h
+===
+--- linux-4.9.111.orig/include/linux/platform_data/phy-at803x.h
linux-4.9.111/include/linux/platform_data/phy-at803x.h
+@@ -7,6 +7,7 @@ struct at803x_platform_data {
+ int enable_rgmii_rx_delay:1;
+ int fixup_rgmii_tx_delay:1;
+ int has_reset_gpio:1;
++ int override_sgmii_aneg:1;
+ int reset_gpio;
+ };
+
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Re: [OpenWrt-Devel] [PATCH 1/2] ar71xx: fix QCA955X SGMII link loss
On 06/08/18 16:15, David Bauer wrote:
The QCA955X is affected by a hardware bug which causes link-loss of the
SGMII link between SoC and PHY. This happens on change of link-state or
speed.
It is not really known what causes this bug. It definitely occurs when
using a AR8033 Gigabit Ethernet PHY.
Qualcomm solves this Bug in a similar fashion. We need to apply the fix
on a per-device base via platform-data as performing the fixup work will
break connectivity in case the SGMII interface is connected to a Switch.
This bug was first proposed to be fixed by Sven Eckelmann in 2016.
https://patchwork.ozlabs.org/patch/604782/
nitpick inline
Based-on-patch-by: Sven Eckelmann
Signed-off-by: David Bauer
---
.../files/arch/mips/ath79/mach-fritz450e.c| 1 +
.../include/asm/mach-ath79/ag71xx_platform.h | 1 +
.../net/ethernet/atheros/ag71xx/ag71xx.h | 2 +
.../net/ethernet/atheros/ag71xx/ag71xx_main.c | 79 +++
.../940-qca955x-add-more-registers.patch | 44 +++
5 files changed, 127 insertions(+)
create mode 100644
target/linux/ar71xx/patches-4.9/940-qca955x-add-more-registers.patch
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-fritz450e.c
b/target/linux/ar71xx/files/arch/mips/ath79/mach-fritz450e.c
index ee0a185304..e48ddd65e7 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-fritz450e.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-fritz450e.c
@@ -155,6 +155,7 @@ static void __init fritz450E_setup(void) {
ath79_eth0_data.mii_bus_dev = _mdio1_device.dev;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.phy_mask = BIT(FRITZ450E_PHY_ADDRESS);
+ ath79_eth0_data.enable_sgmii_fixup = 1;
ath79_eth0_pll_data.pll_1000 = 0x0300;
ath79_eth0_pll_data.pll_100 = 0x0101;
ath79_eth0_pll_data.pll_10 = 0x1313;
diff --git
a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
index c4c3a6d44c..e476d57e45 100644
---
a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
+++
b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
@@ -37,6 +37,7 @@ struct ag71xx_platform_data {
u8 is_ar724x:1;
u8 has_ar8216:1;
u8 use_flow_control:1;
+ u8 enable_sgmii_fixup:1;
u8 disable_inline_checksum_engine:1;
struct ag71xx_switch_platform_data *switch_data;
diff --git
a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
index 77ee5b36ec..2d9a865043 100644
--- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
+++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
@@ -66,6 +66,8 @@
#define AG71XX_TX_RING_SIZE_MAX 128
#define AG71XX_RX_RING_SIZE_MAX 256
+#define QCA955X_SGMII_LINK_WAR_MAX_TRY 10
+
#ifdef CONFIG_AG71XX_DEBUG
#define DBG(fmt, args...) pr_debug(fmt, ## args)
#else
diff --git
a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
index 54ec8e67b3..d89579298f 100644
---
a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
+++
b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
@@ -31,6 +31,7 @@ MODULE_PARM_DESC(msg_level, "Message level
(-1=defaults,0=none,...,16=all)");
#define ETH_SWITCH_HEADER_LEN 2
static int ag71xx_tx_packets(struct ag71xx *ag, bool flush);
+static void ag71xx_qca955x_sgmii_init(void);
static inline unsigned int ag71xx_max_frame_len(unsigned int mtu)
{
@@ -610,6 +611,9 @@ __ag71xx_link_adjust(struct ag71xx *ag, bool update)
if (update && pdata->set_speed)
pdata->set_speed(ag->speed);
+ if (update && pdata->enable_sgmii_fixup)
+ ag71xx_qca955x_sgmii_init();
+
ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
@@ -913,6 +917,81 @@ static void ag71xx_tx_timeout(struct net_device *dev)
schedule_delayed_work(>restart_work, 1);
}
+static void ag71xx_bit_set(void __iomem *reg, u32 bit)
+{
+ u32 val = __raw_readl(reg) | bit;
+ __raw_writel(val, reg);
+ __raw_readl(reg);
+}
+
+static void ag71xx_bit_clear(void __iomem *reg, u32 bit)
+{
+ u32 val = __raw_readl(reg) & ~bit;
+ __raw_writel(val, reg);
+ __raw_readl(reg);
+}
+
+static void ag71xx_qca955x_sgmii_init()
+{
+ void __iomem *gmac_base;
+ u32 mr_an_status, sgmii_status;
+ u8 tries = 0;
+
+ gmac_base = ioremap_nocache(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
+
+
