[OpenWrt-Devel] [PATCH] [ar71xx] Add 16MB Flash version for Embedded Wireless Dorin Platform
Tested-by: Embedded Wireless GmbH www.embeddedwireless.de Signed-off-by: Embedded Wireless GmbH --- diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/02_network b/target/linux/ar71xx/base-files/etc/uci-defaults/02_network index fd38ffa..9a1a285 100755 --- a/target/linux/ar71xx/base-files/etc/uci-defaults/02_network +++ b/target/linux/ar71xx/base-files/etc/uci-defaults/02_network @@ -311,9 +311,10 @@ wzr-hp-g450h) ;; ew-dorin) - ucidef_set_interface_lan "eth0" + ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2" ucidef_add_switch "switch0" "1" "1" - ucidef_add_switch_vlan "switch0" "1" "0 1 2 3" + ucidef_add_switch_vlan "switch0" "1" "0t 1 2" + ucidef_add_switch_vlan "switch0" "2" "0t 3" ;; ew-dorin-router) diff --git a/target/linux/ar71xx/image/Makefile b/target/linux/ar71xx/image/Makefile index 73a0ae2..b2b1706 100644 --- a/target/linux/ar71xx/image/Makefile +++ b/target/linux/ar71xx/image/Makefile @@ -223,6 +223,7 @@ db120_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1 cameo_ap94_mtdlayout=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,6208k(firmware),64k(caldata)ro,1600k(unknown)ro,64k@0x7f(caldata_copy) cameo_ap94_mtdlayout_fat=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,7808k(firmware),64k(caldata)ro,64k@0x66(caldata_orig),6208k@0x5(firmware_orig) ew-dorin_mtdlayout_4M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),3712k(firmware),64k(art) +ew-dorin_mtdlayout_16M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),16000k(firmware),64k(art) dlrtdev_mtdlayout=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,6208k(firmware),64k(caldata)ro,640k(certs),960k(unknown)ro,64k@0x7f(caldata_copy) dlrtdev_mtdlayout_fat=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,7168k(firmware),640k(certs),64k(caldata)ro,64k@0x66(caldata_orig),6208k@0x5(firmware_orig) dragino2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,16000k(firmware),64k(config)ro,64k(art)ro @@ -926,6 +927,7 @@ $(eval $(call SingleProfile,AthLzma,64k,DB120,db120,DB120,ttyS0,115200,$$(db120_ $(eval $(call SingleProfile,AthLzma,64k,DRAGINO2,dragino2,DRAGINO2,ttyATH0,115200,$$(dragino2_mtdlayout),KRuImage,65536)) $(eval $(call SingleProfile,AthLzma,64k,EWDORINAP,ew-dorin,EW-DORIN,ttyATH0,115200,$$(ew-dorin_mtdlayout_4M),KRuImage,65536)) $(eval $(call SingleProfile,AthLzma,64k,EWDORINRT,ew-dorin-router,EW-DORIN-ROUTER,ttyATH0,115200,$$(ew-dorin_mtdlayout_4M),KRuImage,65536)) +$(eval $(call SingleProfile,AthLzma,64k,EWDORIN16M,ew-dorin-16M,EW-DORIN,ttyATH0,115200,$$(ew-dorin_mtdlayout_16M),KRuImage,65536)) $(eval $(call SingleProfile,AthLzma,64k,HORNETUBx2,hornet-ub-x2,HORNET-UB,ttyATH0,115200,$$(alfa_mtdlayout_16M),KRuImage,65536)) $(eval $(call SingleProfile,AthLzma,64k,PB92,pb92,PB92,ttyS0,115200,$$(pb92_mtdlayout),KRuImage)) $(eval $(call SingleProfile,AthLzma,64k,WLR8100,wlr8100,WLR8100,ttyS0,115200,$$(wlr8100_mtdlayout),KRuImage)) @@ -1088,7 +1090,7 @@ $(eval $(call SingleProfile,ZyXEL,64k,NBG_460N_550N_550NH,nbg460n_550n_550nh,NBG $(eval $(call MultiProfile,AP121,AP121_2M AP121_4M)) $(eval $(call MultiProfile,AP136,AP136_010 AP136_020)) -$(eval $(call MultiProfile,EWDORIN, EWDORINAP EWDORINRT)) +$(eval $(call MultiProfile,EWDORIN, EWDORINAP EWDORINRT EWDORIN16M)) $(eval $(call MultiProfile,OPENMESH,OM2P MR600)) $(eval $(call MultiProfile,TEW652BRP,TEW652BRP_FW TEW652BRP_RECOVERY)) $(eval $(call MultiProfile,TLMR11U,TLMR11UV1 TLMR11UV2)) ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] [ar71xx] Add support for Atheros AP132 Reference Board
Add support for Qualcomm Atheros QCA9556 SoC and the AP132 Reference Board. Tested-by: Embedded Wireless GmbH www.embeddedwireless.de Signed-off-by: Embedded Wireless GmbH --- Index: target/linux/ar71xx/files/arch/mips/ath79/mach-ap132.c === --- target/linux/ar71xx/files/arch/mips/ath79/mach-ap132.c (revision 0) +++ target/linux/ar71xx/files/arch/mips/ath79/mach-ap132.c (revision 0) @@ -0,0 +1,189 @@ +/* + * Atheros AP132 reference board support + * + * Copyright (c) 2012 Qualcomm Atheros + * Copyright (c) 2012 Gabor Juhos + * Copyright (c) 2013 Embedded Wireless GmbH + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include +#include + +#include + +#include "common.h" +#include "dev-ap9x-pci.h" +#include "dev-gpio-buttons.h" +#include "dev-eth.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define AP132_GPIO_LED_USB 4 +#define AP132_GPIO_LED_WLAN_5G 12 +#define AP132_GPIO_LED_WLAN_2G 13 +#define AP132_GPIO_LED_STATUS_RED 14 +#define AP132_GPIO_LED_WPS_RED 15 + +#define AP132_GPIO_BTN_WPS 16 + +#define AP132_KEYS_POLL_INTERVAL 20 /* msecs */ +#define AP132_KEYS_DEBOUNCE_INTERVAL (3 * AP132_KEYS_POLL_INTERVAL) + +#define AP132_MAC0_OFFSET 0 +#define AP132_WMAC_CALDATA_OFFSET 0x1000 + +static struct gpio_led ap132_leds_gpio[] __initdata = { + { + .name = "ap132:red:status", + .gpio = AP132_GPIO_LED_STATUS_RED, + .active_low = 1, + }, + { + .name = "ap132:red:wps", + .gpio = AP132_GPIO_LED_WPS_RED, + .active_low = 1, + }, + { + .name = "ap132:red:wlan-2g", + .gpio = AP132_GPIO_LED_WLAN_2G, + .active_low = 1, + }, + { + .name = "ap132:red:usb", + .gpio = AP132_GPIO_LED_USB, + .active_low = 1, + } +}; + +static struct gpio_keys_button ap132_gpio_keys[] __initdata = { + { + .desc = "WPS button", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = AP132_KEYS_DEBOUNCE_INTERVAL, + .gpio = AP132_GPIO_BTN_WPS, + .active_low = 1, + }, +}; + +static struct ar8327_pad_cfg ap132_ar8327_pad0_cfg; + +static struct ar8327_platform_data ap132_ar8327_data = { + .pad0_cfg = &ap132_ar8327_pad0_cfg, + .port0_cfg = { + .force_link = 1, + .speed = AR8327_PORT_SPEED_1000, + .duplex = 1, + .txpause = 1, + .rxpause = 1, + }, +}; + +static struct mdio_board_info ap132_mdio1_info[] = { + { + .bus_id = "ag71xx-mdio.1", + .phy_addr = 0, + .platform_data = &ap132_ar8327_data, + }, +}; + +static void __init ap132_mdio_setup(void) +{ + void __iomem *base; + u32 t; + +#define GPIO_IN_ENABLE3_ADDRESS 0x0050 +#define GPIO_IN_ENABLE3_MII_GE1_MDI_MASK 0x00ff +#define GPIO_IN_ENABLE3_MII_GE1_MDI_LSB 16 +#define GPIO_IN_ENABLE3_MII_GE1_MDI_SET(x) (((x) << GPIO_IN_ENABLE3_MII_GE1_MDI_LSB) & GPIO_IN_ENABLE3_MII_GE1_MDI_MASK) +#define GPIO_OUT_FUNCTION4_ADDRESS 0x003c +#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK 0xff00 +#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB24 +#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK) +#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK 0xff00 +