2014-10-13 19:48 GMT+04:00 Sergey Korolew d...@bittu.org.ru:
Hello !
1. Watchdog timer always decrement until zero, it cant be stopped at all.
SR Yep, same for AR2315+ SoCs. And if interrupt acknowledged by writing
SR one to ISR, then the timer starts counting again from 0x and
SR generates another one interrupt.
Not for ar531x, timer does not overlapping zero on those devices even
if ISR flag cleared, and, actually, produce next interrupt.
So, setting timer to 0x does not harm both platforms.
What do you mean, when you say that 0x does not harm?
SR Hardware reset doesn't work on AR2315 since hw bug and cause freeze if
SR issued by watchdog. See details in AR2315 reset routine in
SR arch/mips/ar231x/ar2315.c
I tested hw reset on ar531x, and it works. Are you tested it ?
AR2313 and AR2317 SoCs are reset fine by watchdog, but AR2315 and
AR2316 SoCs just hung.
Comments in ar2315_restart function are about different situation,
not watchdog reset.
SR I would like to propose use different device id strings (e.g.
SR ar2315-watchdog and ar5312-watchdog) to distinguish SoCs models. This
SR would help to solve several issues:
SR - twisted registers (passing adjacent registers via different
SR resources seems a bit odd),
Why ? +4-4 address play looks worse for me :) Who cares how registers
placed in address map, if we can use two pointers for them ? :)
Passing all registers as one block, make /proc/iomem look nicer :)
SR - possibility of hardware reset,
SR - detection of watchdog clock frequency, since according to Axel Gembe
SR patch DWL-2100AP's watchdog timer ticks at 48MHz.
Well, interrupt generated each 96 second on my DWL-2100AP, 0x/96
resulting in 44Mhz clock.
I tested several boards: DWL-2100AP (AR2313), FON2202 (AR2315),
LiteStation2 (AR2316), DIR-300 (AR2317) and got the following results:
Board BogoMIPS Min Max Mean Stdev
DWL-2100AP 179.60 47.782 49.353 47.866 0.189
FON2202 182.68 42.200 42.268 42.227 0.014
LS2 182.68 22.229 42.375 42.265 0.019
DIR-300 182.68 42.220 43.466 42.278 0.145
40 MHz - 107 seconds timeout
48 Mhz - 89 seconds
60 sec limit should be enough.
For me watchdog routines should be as simple as possible,
without bells and whistles because of their life-critical
status.
Totally agree with you. And my proposal applies only to driver
initialization, and not to its main code.
I will send my driver version as soon as it be ready.
--
BR,
Sergey
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