[issue43131] MMAP duplicate reads and writes on ARM64 platform

[Paul Swirhun]

Paul Swirhun  added the comment:

A workaround is using memoryview (as reported here: 
https://stackoverflow.com/questions/53492716/python-writing-to-memory-in-a-single-operation).
 This results in only 1 transaction on the bus for some reason.

import os, mmap
fd = os.open("/dev/mem", os.O_RDWR | os.O_SYNC)
mapping = mmap.mmap(fd, 4096, flags=mmap.MAP_SHARED, prot=(mmap.PROT_READ | 
mmap.PROT_WRITE), offset=0x8000)
mv = memoryview(mapping)
mv_as_int32 = mv.cast('I')  # Note "I" works as intended, "L" still results in 
duplicate writes; "LL" is not an option
mv_as_int32[0x0 // 4] = 0xDEADBEEF  # this works; results in 1 write issued on 
the AXI bus

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[issue43131] MMAP duplicate reads and writes on ARM64 platform

[Paul Swirhun]

New submission from Paul Swirhun :

mmap (example, as used in python-periphery) duplicates writes, compared to 
devmem and a c-periphery on an ARM64 platform (Zynq/Petalinux/Yocto). There are 
various other reports of duplicated writes using mmap suggesting it is a bug. 
Example:

fd = os.open("/dev/mem", os.O_RDWR | os.O_SYNC)
mapping = mmap.mmap(fd, 4096, flags=mmap.MAP_SHARED, prot=(mmap.PROT_READ | 
mmap.PROT_WRITE), offset=0x8000)
mapping.write(bytearray([0x0,]* 4))  # results in 2 writes, should be 1
mapping.write(bytearray([0x0,]* 8))  # results in 4 writes, should be 1-2 
depending on bus width (32b vs 64b)
# OR:
mapping[0:4] = struct.pack("=L", 0x0)  # results in 2 writes, should be 1

--
components: Library (Lib)
messages: 386501
nosy: psswirhun
priority: normal
severity: normal
status: open
title: MMAP duplicate reads and writes on ARM64 platform
versions: Python 3.7

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