Hi, This series is the result of a code audit of the DeviceClass::reset() method uses, having Markus following explanation in mind [1]:
"Propagating reset from the root of the qtree to the leaves won't reach a bus-less device, because the qtree contains only the devices that plug into a qbus." Which is a resumed of what Peter said earlier in the thread [2]. I'm still confused by the TYPE_APIC (and its KVM version), see [3]. [1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg801374.html [2] https://www.mail-archive.com/qemu-devel@nongnu.org/msg800917.html [3] https://www.mail-archive.com/qemu-devel@nongnu.org/msg801379.html Philippe Mathieu-Daudé (5): hw/ppc/spapr_iommu: Register machine reset handler hw/pcmcia/microdrive: Register machine reset handler hw/block/nand: Register machine reset handler hw/pci-host/raven: Manually reset the OR_IRQ device hw/arm/armsse: Manually reset the OR_IRQ devices hw/arm/armsse.c | 4 ++++ hw/block/nand.c | 14 ++++++++++++++ hw/pci-host/prep.c | 10 ++++++++++ hw/pcmcia/pcmcia.c | 25 +++++++++++++++++++++++++ hw/ppc/spapr_iommu.c | 10 ++++++++++ 5 files changed, 63 insertions(+) -- 2.26.3