Re: [PATCH 1/9] hw/riscv/sifive_e: Fix inheritance of SiFiveEState
Am 21. September 2022 04:55:02 UTC schrieb Markus Armbruster : >Bernhard Beschow writes: > >> Am 20. September 2022 11:36:47 UTC schrieb Markus Armbruster >> : >>>Alistair Francis writes: >>> On Tue, Sep 20, 2022 at 9:18 AM Bernhard Beschow wrote: > > SiFiveEState inherits from SysBusDevice while it's TypeInfo claims it to > inherit from TYPE_MACHINE. This is an inconsistency which can cause > undefined behavior such as memory corruption. > > Change SiFiveEState to inherit from MachineState since it is registered > as a machine. > > Signed-off-by: Bernhard Beschow Reviewed-by: Alistair Francis >>> >>>To the SiFive maintainers: since this is a bug fix, let's merge it right >>>away. >> >> I could repost this particular patch with the three new tags (incl. Fixes) >> if desired. > >Can't hurt, and could help the maintainers. [X] Done. Best regards, Bernhard
Re: [PATCH 1/9] hw/riscv/sifive_e: Fix inheritance of SiFiveEState
Bernhard Beschow writes: > Am 20. September 2022 11:36:47 UTC schrieb Markus Armbruster > : >>Alistair Francis writes: >> >>> On Tue, Sep 20, 2022 at 9:18 AM Bernhard Beschow wrote: SiFiveEState inherits from SysBusDevice while it's TypeInfo claims it to inherit from TYPE_MACHINE. This is an inconsistency which can cause undefined behavior such as memory corruption. Change SiFiveEState to inherit from MachineState since it is registered as a machine. Signed-off-by: Bernhard Beschow >>> >>> Reviewed-by: Alistair Francis >> >>To the SiFive maintainers: since this is a bug fix, let's merge it right >>away. > > I could repost this particular patch with the three new tags (incl. Fixes) if > desired. Can't hurt, and could help the maintainers.
Re: [PATCH 1/9] hw/riscv/sifive_e: Fix inheritance of SiFiveEState
Am 20. September 2022 11:36:47 UTC schrieb Markus Armbruster : >Alistair Francis writes: > >> On Tue, Sep 20, 2022 at 9:18 AM Bernhard Beschow wrote: >>> >>> SiFiveEState inherits from SysBusDevice while it's TypeInfo claims it to >>> inherit from TYPE_MACHINE. This is an inconsistency which can cause >>> undefined behavior such as memory corruption. >>> >>> Change SiFiveEState to inherit from MachineState since it is registered >>> as a machine. >>> >>> Signed-off-by: Bernhard Beschow >> >> Reviewed-by: Alistair Francis > >To the SiFive maintainers: since this is a bug fix, let's merge it right >away. I could repost this particular patch with the three new tags (incl. Fixes) if desired. Best regards, Bernhard >
Re: [PATCH 1/9] hw/riscv/sifive_e: Fix inheritance of SiFiveEState
Alistair Francis writes: > On Tue, Sep 20, 2022 at 9:18 AM Bernhard Beschow wrote: >> >> SiFiveEState inherits from SysBusDevice while it's TypeInfo claims it to >> inherit from TYPE_MACHINE. This is an inconsistency which can cause >> undefined behavior such as memory corruption. >> >> Change SiFiveEState to inherit from MachineState since it is registered >> as a machine. >> >> Signed-off-by: Bernhard Beschow > > Reviewed-by: Alistair Francis To the SiFive maintainers: since this is a bug fix, let's merge it right away.
Re: [PATCH 1/9] hw/riscv/sifive_e: Fix inheritance of SiFiveEState
On 20/9/22 01:17, Bernhard Beschow wrote:
SiFiveEState inherits from SysBusDevice while it's TypeInfo claims it to
inherit from TYPE_MACHINE. This is an inconsistency which can cause
undefined behavior such as memory corruption.
Change SiFiveEState to inherit from MachineState since it is registered
as a machine.
Signed-off-by: Bernhard Beschow
---
include/hw/riscv/sifive_e.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
index 83604da805..d738745925 100644
--- a/include/hw/riscv/sifive_e.h
+++ b/include/hw/riscv/sifive_e.h
@@ -22,6 +22,7 @@
#include "hw/riscv/riscv_hart.h"
#include "hw/riscv/sifive_cpu.h"
#include "hw/gpio/sifive_gpio.h"
+#include "hw/boards.h"
#define TYPE_RISCV_E_SOC "riscv.sifive.e.soc"
#define RISCV_E_SOC(obj) \
@@ -41,7 +42,7 @@ typedef struct SiFiveESoCState {
typedef struct SiFiveEState {
/*< private >*/
-SysBusDevice parent_obj;
+MachineState parent_obj;
Ouch.
Fixes: 0869490b1c ("riscv: sifive_e: Manually define the machine")
Reviewed-by: Philippe Mathieu-Daudé
Re: [PATCH 1/9] hw/riscv/sifive_e: Fix inheritance of SiFiveEState
On Tue, Sep 20, 2022 at 9:18 AM Bernhard Beschow wrote:
>
> SiFiveEState inherits from SysBusDevice while it's TypeInfo claims it to
> inherit from TYPE_MACHINE. This is an inconsistency which can cause
> undefined behavior such as memory corruption.
>
> Change SiFiveEState to inherit from MachineState since it is registered
> as a machine.
>
> Signed-off-by: Bernhard Beschow
Reviewed-by: Alistair Francis
Alistair
> ---
> include/hw/riscv/sifive_e.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
> index 83604da805..d738745925 100644
> --- a/include/hw/riscv/sifive_e.h
> +++ b/include/hw/riscv/sifive_e.h
> @@ -22,6 +22,7 @@
> #include "hw/riscv/riscv_hart.h"
> #include "hw/riscv/sifive_cpu.h"
> #include "hw/gpio/sifive_gpio.h"
> +#include "hw/boards.h"
>
> #define TYPE_RISCV_E_SOC "riscv.sifive.e.soc"
> #define RISCV_E_SOC(obj) \
> @@ -41,7 +42,7 @@ typedef struct SiFiveESoCState {
>
> typedef struct SiFiveEState {
> /*< private >*/
> -SysBusDevice parent_obj;
> +MachineState parent_obj;
>
> /*< public >*/
> SiFiveESoCState soc;
> --
> 2.37.3
>
>
[PATCH 1/9] hw/riscv/sifive_e: Fix inheritance of SiFiveEState
SiFiveEState inherits from SysBusDevice while it's TypeInfo claims it to
inherit from TYPE_MACHINE. This is an inconsistency which can cause
undefined behavior such as memory corruption.
Change SiFiveEState to inherit from MachineState since it is registered
as a machine.
Signed-off-by: Bernhard Beschow
---
include/hw/riscv/sifive_e.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
index 83604da805..d738745925 100644
--- a/include/hw/riscv/sifive_e.h
+++ b/include/hw/riscv/sifive_e.h
@@ -22,6 +22,7 @@
#include "hw/riscv/riscv_hart.h"
#include "hw/riscv/sifive_cpu.h"
#include "hw/gpio/sifive_gpio.h"
+#include "hw/boards.h"
#define TYPE_RISCV_E_SOC "riscv.sifive.e.soc"
#define RISCV_E_SOC(obj) \
@@ -41,7 +42,7 @@ typedef struct SiFiveESoCState {
typedef struct SiFiveEState {
/*< private >*/
-SysBusDevice parent_obj;
+MachineState parent_obj;
/*< public >*/
SiFiveESoCState soc;
--
2.37.3
