Re: [PATCH 2/9] tests/qtest: Restrict xlnx-can-test to TCG builds

2021-02-05 Thread Philippe Mathieu-Daudé 
On 2/5/21 5:57 PM, Peter Maydell wrote:
> On Fri, 5 Feb 2021 at 14:43, Philippe Mathieu-Daudé  wrote:
>>
>> The Xilinx CAN controller test is uses the ZCU102 board which is
>> based on a ZynqMP SoC. In the default configuration - used by this
>> test - this SoC creates 2 Cortex R5F cores. Such cores are not
>> v8A archicture, thus can not be run under KVM. Therefore restrict
>> this test to TCG.
>>
>> Signed-off-by: Philippe Mathieu-Daudé 
>> ---
>> Cc: Alistair Francis 
>> Cc: "Edgar E. Iglesias" 
>> Cc: Vikram Garhwal 
>> ---
>>  tests/qtest/meson.build | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
>> index c83bc211b6a..d8ebd5bf98e 100644
>> --- a/tests/qtest/meson.build
>> +++ b/tests/qtest/meson.build
>> @@ -159,10 +159,10 @@
>>(cpu != 'arm' ? ['bios-tables-test'] : []) +  
>> \
>>(config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? 
>> ['tpm-tis-device-test'] : []) +\
>>(config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? 
>> ['tpm-tis-device-swtpm-test'] : []) +  \
>> +  (config_all.has_key('CONFIG_TCG') ? ['xlnx-can-test'] : []) +  \
>>['arm-cpu-features',
>> 'numa-test',
>> 'boot-serial-test',
>> -   'xlnx-can-test',
>> 'migration-test']
> 
> The implementation in hw/net/can/meson.build is conditioned on
> CONFIG_XLNX_ZYNQMP -- does it work to use that here too?

Yes. Thanks, clever idea :)

Re: [PATCH 2/9] tests/qtest: Restrict xlnx-can-test to TCG builds

2021-02-05 Thread Peter Maydell 
On Fri, 5 Feb 2021 at 14:43, Philippe Mathieu-Daudé  wrote:
>
> The Xilinx CAN controller test is uses the ZCU102 board which is
> based on a ZynqMP SoC. In the default configuration - used by this
> test - this SoC creates 2 Cortex R5F cores. Such cores are not
> v8A archicture, thus can not be run under KVM. Therefore restrict
> this test to TCG.
>
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
> Cc: Alistair Francis 
> Cc: "Edgar E. Iglesias" 
> Cc: Vikram Garhwal 
> ---
>  tests/qtest/meson.build | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
> index c83bc211b6a..d8ebd5bf98e 100644
> --- a/tests/qtest/meson.build
> +++ b/tests/qtest/meson.build
> @@ -159,10 +159,10 @@
>(cpu != 'arm' ? ['bios-tables-test'] : []) +   
>\
>(config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? 
> ['tpm-tis-device-test'] : []) +\
>(config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? 
> ['tpm-tis-device-swtpm-test'] : []) +  \
> +  (config_all.has_key('CONFIG_TCG') ? ['xlnx-can-test'] : []) +  \
>['arm-cpu-features',
> 'numa-test',
> 'boot-serial-test',
> -   'xlnx-can-test',
> 'migration-test']

The implementation in hw/net/can/meson.build is conditioned on
CONFIG_XLNX_ZYNQMP -- does it work to use that here too?

thanks
-- PMM

Re: [PATCH 2/9] tests/qtest: Restrict xlnx-can-test to TCG builds

2021-02-05 Thread Alistair Francis 
On Fri, Feb 5, 2021 at 6:45 AM Philippe Mathieu-Daudé  wrote:
>
> The Xilinx CAN controller test is uses the ZCU102 board which is
> based on a ZynqMP SoC. In the default configuration - used by this
> test - this SoC creates 2 Cortex R5F cores. Such cores are not
> v8A archicture, thus can not be run under KVM. Therefore restrict
> this test to TCG.
>
> Signed-off-by: Philippe Mathieu-Daudé 

Reviewed-by: Alistair Francis 

Alistair

> ---
> Cc: Alistair Francis 
> Cc: "Edgar E. Iglesias" 
> Cc: Vikram Garhwal 
> ---
>  tests/qtest/meson.build | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
> index c83bc211b6a..d8ebd5bf98e 100644
> --- a/tests/qtest/meson.build
> +++ b/tests/qtest/meson.build
> @@ -159,10 +159,10 @@
>(cpu != 'arm' ? ['bios-tables-test'] : []) +   
>\
>(config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? 
> ['tpm-tis-device-test'] : []) +\
>(config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? 
> ['tpm-tis-device-swtpm-test'] : []) +  \
> +  (config_all.has_key('CONFIG_TCG') ? ['xlnx-can-test'] : []) +  \
>['arm-cpu-features',
> 'numa-test',
> 'boot-serial-test',
> -   'xlnx-can-test',
> 'migration-test']
>
>  qtests_s390x = \
> --
> 2.26.2
>
>

[PATCH 2/9] tests/qtest: Restrict xlnx-can-test to TCG builds

2021-02-05 Thread Philippe Mathieu-Daudé 
The Xilinx CAN controller test is uses the ZCU102 board which is
based on a ZynqMP SoC. In the default configuration - used by this
test - this SoC creates 2 Cortex R5F cores. Such cores are not
v8A archicture, thus can not be run under KVM. Therefore restrict
this test to TCG.

Signed-off-by: Philippe Mathieu-Daudé 
---
Cc: Alistair Francis 
Cc: "Edgar E. Iglesias" 
Cc: Vikram Garhwal 
---
 tests/qtest/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
index c83bc211b6a..d8ebd5bf98e 100644
--- a/tests/qtest/meson.build
+++ b/tests/qtest/meson.build
@@ -159,10 +159,10 @@
   (cpu != 'arm' ? ['bios-tables-test'] : []) + 
 \
   (config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? 
['tpm-tis-device-test'] : []) +\
   (config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? 
['tpm-tis-device-swtpm-test'] : []) +  \
+  (config_all.has_key('CONFIG_TCG') ? ['xlnx-can-test'] : []) +  \
   ['arm-cpu-features',
'numa-test',
'boot-serial-test',
-   'xlnx-can-test',
'migration-test']
 
 qtests_s390x = \
-- 
2.26.2