[Qemu-commits] [qemu/qemu] 7c09a7: Update VERSION for v7.2.0-rc2
Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 7c09a7f6ae1770d15535980d15dffdb23f4d9786 https://github.com/qemu/qemu/commit/7c09a7f6ae1770d15535980d15dffdb23f4d9786 Author: Stefan Hajnoczi Date: 2022-11-22 (Tue, 22 Nov 2022) Changed paths: M VERSION Log Message: --- Update VERSION for v7.2.0-rc2 Signed-off-by: Stefan Hajnoczi
[Qemu-commits] [qemu/qemu]
Branch: refs/tags/v7.2.0-rc2 Home: https://github.com/qemu/qemu
[Qemu-commits] [qemu/qemu] 7c09a7: Update VERSION for v7.2.0-rc2
Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 7c09a7f6ae1770d15535980d15dffdb23f4d9786 https://github.com/qemu/qemu/commit/7c09a7f6ae1770d15535980d15dffdb23f4d9786 Author: Stefan Hajnoczi Date: 2022-11-22 (Tue, 22 Nov 2022) Changed paths: M VERSION Log Message: --- Update VERSION for v7.2.0-rc2 Signed-off-by: Stefan Hajnoczi
[Qemu-commits] [qemu/qemu] 26ba00: target/arm: Don't do two-stage lookup if stage 2 i...
Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 26ba00cf58e9f21b08fff4c691ce7e9bb21dd123 https://github.com/qemu/qemu/commit/26ba00cf58e9f21b08fff4c691ce7e9bb21dd123 Author: Peter Maydell Date: 2022-11-22 (Tue, 22 Nov 2022) Changed paths: M target/arm/ptw.c Log Message: --- target/arm: Don't do two-stage lookup if stage 2 is disabled In get_phys_addr_with_struct(), we call get_phys_addr_twostage() if the CPU supports EL2. However, we don't check here that stage 2 is actually enabled. Instead we only check that inside get_phys_addr_twostage() to skip stage 2 translation. This means that even if stage 2 is disabled we still tell the stage 1 lookup to do its page table walks via stage 2. This works by luck for normal CPU accesses, but it breaks for debug accesses, which are used by the disassembler and also by semihosting file reads and writes, because the debug case takes a different code path inside S1_ptw_translate(). This means that setups that use semihosting for file loads are broken (a regression since 7.1, introduced in recent ptw refactoring), and that sometimes disassembly in debug logs reports "unable to read memory" rather than showing the guest insns. Fix the bug by hoisting the "is stage 2 enabled?" check up to get_phys_addr_with_struct(), so that we handle S2 disabled the same way we do the "no EL2" case, with a simple single stage lookup. Reported-by: Jens Wiklander Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell Message-id: 20221121212404.1450382-1-peter.mayd...@linaro.org Commit: 15f8f4671afd22491ce99d28a296514717fead4f https://github.com/qemu/qemu/commit/15f8f4671afd22491ce99d28a296514717fead4f Author: Ard Biesheuvel Date: 2022-11-22 (Tue, 22 Nov 2022) Changed paths: M target/arm/ptw.c Log Message: --- target/arm: Use signed quantity to represent VMSAv8-64 translation level The LPA2 extension implements 52-bit virtual addressing for 4k and 16k translation granules, and for the former, this means an additional level of translation is needed. This means we start counting at -1 instead of 0 when doing a walk, and so 'level' is now a signed quantity, and should be typed as such. So turn it from uint32_t into int32_t. This avoids a level of -1 getting misinterpreted as being >= 3, and terminating a page table walk prematurely with a bogus output address. Cc: Peter Maydell Cc: Philippe Mathieu-Daudé Cc: Richard Henderson Signed-off-by: Ard Biesheuvel Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell Commit: 80e99f293e22868f50163f98276e0273e0237add https://github.com/qemu/qemu/commit/80e99f293e22868f50163f98276e0273e0237add Author: Stefan Hajnoczi Date: 2022-11-22 (Tue, 22 Nov 2022) Changed paths: M target/arm/ptw.c Log Message: --- Merge tag 'pull-target-arm-20221122' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm: * Fix broken 5-level pagetable handling * Fix debug accesses when EL2 is present # -BEGIN PGP SIGNATURE- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmN8+tgZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3t+mD/sGzXb5BjKl0JeREHAh6swI # niodZz0hf67UYITIQJMBu8KiFjAowk726qkwSOJyjQ7ot1N/zy6z3X8SbHLBF8qe # xHJwVIvDADRKQ4j9y9chVof0Bg8+6274kFwcl/FR/gTFxQex+jzNmk6RzV1D5n3D # gSKYVT1DJmr/qiWdoNxfuOPsbF44+ADskyeSLKmhN7SgK3JRDSfOTYb0AwIzm4Ue # CL3rfNBkAsF6j9ygWHH0uff7ztWLZiCY1l+zXtOzzwZbrxMdSK6TCHgliNJ/9F/i # D1vLr0A+J82ubADOHsTq5dE4tyYUkz/JQLCaoQWul7q08nz4i5XLFxBFUzll+H55 # yHCIzgbt2DOVICW2bzJR9fqI11cyeXY+ftRHVcA17mBKKXLEMg2ziIQ2yw0cugdD # eaCcOLXgpLpMgCfFLDFOhZb9j0Q0TNEiKu9ZOVJrMDj5uT4HwctJ0PnPlHxaz6pC # d9CdT1+J/omN8HYvZmBF1t9y3Y1dVKO9cOEFwcT2nTOqfLXirlKH7BeP9rdH96xi # jSvixFrliUTjFGyW6AK8VoqXIx7rYK5OlWWdTnZhhERdjbVGkbPgc3O9ZYH9dJKO # lUGmXZAguMbruXjDjGijNOSY1Vf/aTfbjCoOi3NoDbDQqAh8UjXUvUWbdjKo9uF+ # CtY6fnorIekqT2mYWNfkfQ== # =Oh+/ # -END PGP SIGNATURE- # gpg: Signature made Tue 22 Nov 2022 11:37:44 EST # gpg:using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg:issuer "peter.mayd...@linaro.org" # gpg: Good signature from "Peter Maydell " [full] # gpg: aka "Peter Maydell " [full] # gpg: aka "Peter Maydell " [full] # gpg: aka "Peter Maydell " [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20221122' of https://git.linaro.org/people/pmaydell/qemu-arm: target/arm: Use signed quantity to represent VMSAv8-64 translation level target/arm: Don't do two-stage lookup if stage 2 is disabled Signed-off-by: Stefan Hajnoczi Compare: https://github.com/qemu/qemu/compare/16a550bdc0e4...80e99f293e22
[Qemu-commits] [qemu/qemu] 26ba00: target/arm: Don't do two-stage lookup if stage 2 i...
Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 26ba00cf58e9f21b08fff4c691ce7e9bb21dd123 https://github.com/qemu/qemu/commit/26ba00cf58e9f21b08fff4c691ce7e9bb21dd123 Author: Peter Maydell Date: 2022-11-22 (Tue, 22 Nov 2022) Changed paths: M target/arm/ptw.c Log Message: --- target/arm: Don't do two-stage lookup if stage 2 is disabled In get_phys_addr_with_struct(), we call get_phys_addr_twostage() if the CPU supports EL2. However, we don't check here that stage 2 is actually enabled. Instead we only check that inside get_phys_addr_twostage() to skip stage 2 translation. This means that even if stage 2 is disabled we still tell the stage 1 lookup to do its page table walks via stage 2. This works by luck for normal CPU accesses, but it breaks for debug accesses, which are used by the disassembler and also by semihosting file reads and writes, because the debug case takes a different code path inside S1_ptw_translate(). This means that setups that use semihosting for file loads are broken (a regression since 7.1, introduced in recent ptw refactoring), and that sometimes disassembly in debug logs reports "unable to read memory" rather than showing the guest insns. Fix the bug by hoisting the "is stage 2 enabled?" check up to get_phys_addr_with_struct(), so that we handle S2 disabled the same way we do the "no EL2" case, with a simple single stage lookup. Reported-by: Jens Wiklander Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell Message-id: 20221121212404.1450382-1-peter.mayd...@linaro.org Commit: 15f8f4671afd22491ce99d28a296514717fead4f https://github.com/qemu/qemu/commit/15f8f4671afd22491ce99d28a296514717fead4f Author: Ard Biesheuvel Date: 2022-11-22 (Tue, 22 Nov 2022) Changed paths: M target/arm/ptw.c Log Message: --- target/arm: Use signed quantity to represent VMSAv8-64 translation level The LPA2 extension implements 52-bit virtual addressing for 4k and 16k translation granules, and for the former, this means an additional level of translation is needed. This means we start counting at -1 instead of 0 when doing a walk, and so 'level' is now a signed quantity, and should be typed as such. So turn it from uint32_t into int32_t. This avoids a level of -1 getting misinterpreted as being >= 3, and terminating a page table walk prematurely with a bogus output address. Cc: Peter Maydell Cc: Philippe Mathieu-Daudé Cc: Richard Henderson Signed-off-by: Ard Biesheuvel Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell Commit: 80e99f293e22868f50163f98276e0273e0237add https://github.com/qemu/qemu/commit/80e99f293e22868f50163f98276e0273e0237add Author: Stefan Hajnoczi Date: 2022-11-22 (Tue, 22 Nov 2022) Changed paths: M target/arm/ptw.c Log Message: --- Merge tag 'pull-target-arm-20221122' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm: * Fix broken 5-level pagetable handling * Fix debug accesses when EL2 is present # -BEGIN PGP SIGNATURE- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmN8+tgZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3t+mD/sGzXb5BjKl0JeREHAh6swI # niodZz0hf67UYITIQJMBu8KiFjAowk726qkwSOJyjQ7ot1N/zy6z3X8SbHLBF8qe # xHJwVIvDADRKQ4j9y9chVof0Bg8+6274kFwcl/FR/gTFxQex+jzNmk6RzV1D5n3D # gSKYVT1DJmr/qiWdoNxfuOPsbF44+ADskyeSLKmhN7SgK3JRDSfOTYb0AwIzm4Ue # CL3rfNBkAsF6j9ygWHH0uff7ztWLZiCY1l+zXtOzzwZbrxMdSK6TCHgliNJ/9F/i # D1vLr0A+J82ubADOHsTq5dE4tyYUkz/JQLCaoQWul7q08nz4i5XLFxBFUzll+H55 # yHCIzgbt2DOVICW2bzJR9fqI11cyeXY+ftRHVcA17mBKKXLEMg2ziIQ2yw0cugdD # eaCcOLXgpLpMgCfFLDFOhZb9j0Q0TNEiKu9ZOVJrMDj5uT4HwctJ0PnPlHxaz6pC # d9CdT1+J/omN8HYvZmBF1t9y3Y1dVKO9cOEFwcT2nTOqfLXirlKH7BeP9rdH96xi # jSvixFrliUTjFGyW6AK8VoqXIx7rYK5OlWWdTnZhhERdjbVGkbPgc3O9ZYH9dJKO # lUGmXZAguMbruXjDjGijNOSY1Vf/aTfbjCoOi3NoDbDQqAh8UjXUvUWbdjKo9uF+ # CtY6fnorIekqT2mYWNfkfQ== # =Oh+/ # -END PGP SIGNATURE- # gpg: Signature made Tue 22 Nov 2022 11:37:44 EST # gpg:using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg:issuer "peter.mayd...@linaro.org" # gpg: Good signature from "Peter Maydell " [full] # gpg: aka "Peter Maydell " [full] # gpg: aka "Peter Maydell " [full] # gpg: aka "Peter Maydell " [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20221122' of https://git.linaro.org/people/pmaydell/qemu-arm: target/arm: Use signed quantity to represent VMSAv8-64 translation level target/arm: Don't do two-stage lookup if stage 2 is disabled Signed-off-by: Stefan Hajnoczi Compare: https://github.com/qemu/qemu/compare/16a550bdc0e4...80e99f293e22
[Qemu-commits] [qemu/qemu] 47fdc8: Run docker probe only if docker or podman are avai...
tio/vhost-user-i2c.c M hw/virtio/vhost-user-rng.c M hw/virtio/vhost-vsock-common.c M hw/virtio/virtio.c M net/vhost-vdpa.c M tests/avocado/acpi-bits.py M tests/data/acpi/pc/DSDT M tests/data/acpi/pc/DSDT.acpierst M tests/data/acpi/pc/DSDT.acpihmat M tests/data/acpi/pc/DSDT.bridge M tests/data/acpi/pc/DSDT.cphp M tests/data/acpi/pc/DSDT.dimmpxm M tests/data/acpi/pc/DSDT.hpbridge M tests/data/acpi/pc/DSDT.hpbrroot M tests/data/acpi/pc/DSDT.ipmikcs M tests/data/acpi/pc/DSDT.memhp M tests/data/acpi/pc/DSDT.nohpet M tests/data/acpi/pc/DSDT.numamem M tests/data/acpi/pc/DSDT.roothp M tests/data/acpi/q35/DSDT M tests/data/acpi/q35/DSDT.acpierst M tests/data/acpi/q35/DSDT.acpihmat M tests/data/acpi/q35/DSDT.acpihmat-noinitiator M tests/data/acpi/q35/DSDT.applesmc M tests/data/acpi/q35/DSDT.bridge M tests/data/acpi/q35/DSDT.core-count2 M tests/data/acpi/q35/DSDT.cphp M tests/data/acpi/q35/DSDT.cxl M tests/data/acpi/q35/DSDT.dimmpxm M tests/data/acpi/q35/DSDT.ipmibt M tests/data/acpi/q35/DSDT.ipmismbus M tests/data/acpi/q35/DSDT.ivrs M tests/data/acpi/q35/DSDT.memhp M tests/data/acpi/q35/DSDT.mmio64 M tests/data/acpi/q35/DSDT.multi-bridge M tests/data/acpi/q35/DSDT.nohpet M tests/data/acpi/q35/DSDT.numamem M tests/data/acpi/q35/DSDT.pvpanic-isa M tests/data/acpi/q35/DSDT.tis.tpm12 M tests/data/acpi/q35/DSDT.tis.tpm2 M tests/data/acpi/q35/DSDT.viot M tests/data/acpi/q35/DSDT.xapic Log Message: --- Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging pc,virtio: regression, test fixes fixes regressions: virtio error message triggered by seabios failure in vhost due to VIRTIO_F_RING_RESET broken keyboard under seabios some biosbits test fixes there's still a known regression with migration and vsock, not fixed yet. Signed-off-by: Michael S. Tsirkin # -BEGIN PGP SIGNATURE- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmN8os4PHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpw+UH/2JOoxqzkkq4QyV5PzmjsiyyMbrBqFSOTro2 # 98k9MwxNWHIk6fi3FVIz+LX1EdwDbMl44IHQ88xo7k39V7ThvVvLfjaQySSeoCfE # 04++AvkOQ/O8W7sob17r2iPWIHKPIndq8uB652T89o1I/nhmFMsUkdRWmVQ3XsDk # DnPZxjBQnKY0oSvBd7SmSI3C+eA4lF1tht50ZxmOshLx4OSjK/maFVpIyLsUGTMn # 6OMxKffDjfvw5z94+pGN1RQm9xu7OwtFZyUnH16xoQUmWSXjzcYXUZ3buTY+eAyJ # I5j9ox27Cqn1wGcypUiTCKLIExEMBfvNY4ovyRa1xvW+MXluVyE= # =bF2U # -END PGP SIGNATURE- # gpg: Signature made Tue 22 Nov 2022 05:22:06 EST # gpg:using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg:issuer "m...@redhat.com" # gpg: Good signature from "Michael S. Tsirkin " [full] # gpg: aka "Michael S. Tsirkin " [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: virtio: disable error for out of spec queue-enable acpi/tests/avocado/bits: keep the work directory when BITS_DEBUG is set in env tests/avocado: configure acpi-bits to use avocado timeout MAINTAINERS: add mst to list of biosbits maintainers tests: acpi: x86: update expected DSDT after moving PRQx fields in _SB scope acpi: x86: move RPQx field back to _SB scope tests: acpi: whitelist DSDT before moving PRQx to _SB scope vhost: mask VIRTIO_F_RING_RESET for vhost and vhost-user devices Signed-off-by: Stefan Hajnoczi Commit: 16a550bdc0e49fcda0e6a6c55d648700ad33c8a4 https://github.com/qemu/qemu/commit/16a550bdc0e49fcda0e6a6c55d648700ad33c8a4 Author: Stefan Hajnoczi Date: 2022-11-22 (Tue, 22 Nov 2022) Changed paths: M hw/loongarch/acpi-build.c M hw/loongarch/virt.c Log Message: --- Merge tag 'pull-loongarch-20221122' of https://gitlab.com/gaosong/qemu into staging LoongArch pull for 7.2-rc2 # -BEGIN PGP SIGNATURE- # # iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCY3zJLQAKCRBAov/yOSY+ # 3wHkBADTgirzsosyvVGza6nHD1QTEK6ZqnvYB0wCoxKBt1btvzLoKO5gbe7S3Pq4 # obFurS+5QclwIuLR6ZkihNGMBL+uq6XZryUGG3pU8h1XZigdduiEk7l7YGF+N+hz # /7ESJGHzCTiXyTTXBNgLJEJYfUYdV+kWbXkIQuJGT+kdlzUifA== # =Uod8 # -END PGP SIGNATURE- # gpg: Signature made Tue 22 Nov 2022 08:05:49 EST # gpg:using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao " [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20221122' of https://gitlab.com/gaosong/qemu: hw/loongarch: Replace the value of uart info with macro hw/loongarch: Fix setprop_sized method in fdt rtc node. hw/loongarch: Add default stdout uart in fdt Signed-off-by: Stefan Hajnoczi Compare: https://github.com/qemu/qemu/compare/6d71357a3b65...16a550bdc0e4
[Qemu-commits] [qemu/qemu] 47fdc8: Run docker probe only if docker or podman are avai...
tio/vhost-user-i2c.c M hw/virtio/vhost-user-rng.c M hw/virtio/vhost-vsock-common.c M hw/virtio/virtio.c M net/vhost-vdpa.c M tests/avocado/acpi-bits.py M tests/data/acpi/pc/DSDT M tests/data/acpi/pc/DSDT.acpierst M tests/data/acpi/pc/DSDT.acpihmat M tests/data/acpi/pc/DSDT.bridge M tests/data/acpi/pc/DSDT.cphp M tests/data/acpi/pc/DSDT.dimmpxm M tests/data/acpi/pc/DSDT.hpbridge M tests/data/acpi/pc/DSDT.hpbrroot M tests/data/acpi/pc/DSDT.ipmikcs M tests/data/acpi/pc/DSDT.memhp M tests/data/acpi/pc/DSDT.nohpet M tests/data/acpi/pc/DSDT.numamem M tests/data/acpi/pc/DSDT.roothp M tests/data/acpi/q35/DSDT M tests/data/acpi/q35/DSDT.acpierst M tests/data/acpi/q35/DSDT.acpihmat M tests/data/acpi/q35/DSDT.acpihmat-noinitiator M tests/data/acpi/q35/DSDT.applesmc M tests/data/acpi/q35/DSDT.bridge M tests/data/acpi/q35/DSDT.core-count2 M tests/data/acpi/q35/DSDT.cphp M tests/data/acpi/q35/DSDT.cxl M tests/data/acpi/q35/DSDT.dimmpxm M tests/data/acpi/q35/DSDT.ipmibt M tests/data/acpi/q35/DSDT.ipmismbus M tests/data/acpi/q35/DSDT.ivrs M tests/data/acpi/q35/DSDT.memhp M tests/data/acpi/q35/DSDT.mmio64 M tests/data/acpi/q35/DSDT.multi-bridge M tests/data/acpi/q35/DSDT.nohpet M tests/data/acpi/q35/DSDT.numamem M tests/data/acpi/q35/DSDT.pvpanic-isa M tests/data/acpi/q35/DSDT.tis.tpm12 M tests/data/acpi/q35/DSDT.tis.tpm2 M tests/data/acpi/q35/DSDT.viot M tests/data/acpi/q35/DSDT.xapic Log Message: --- Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging pc,virtio: regression, test fixes fixes regressions: virtio error message triggered by seabios failure in vhost due to VIRTIO_F_RING_RESET broken keyboard under seabios some biosbits test fixes there's still a known regression with migration and vsock, not fixed yet. Signed-off-by: Michael S. Tsirkin # -BEGIN PGP SIGNATURE- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmN8os4PHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpw+UH/2JOoxqzkkq4QyV5PzmjsiyyMbrBqFSOTro2 # 98k9MwxNWHIk6fi3FVIz+LX1EdwDbMl44IHQ88xo7k39V7ThvVvLfjaQySSeoCfE # 04++AvkOQ/O8W7sob17r2iPWIHKPIndq8uB652T89o1I/nhmFMsUkdRWmVQ3XsDk # DnPZxjBQnKY0oSvBd7SmSI3C+eA4lF1tht50ZxmOshLx4OSjK/maFVpIyLsUGTMn # 6OMxKffDjfvw5z94+pGN1RQm9xu7OwtFZyUnH16xoQUmWSXjzcYXUZ3buTY+eAyJ # I5j9ox27Cqn1wGcypUiTCKLIExEMBfvNY4ovyRa1xvW+MXluVyE= # =bF2U # -END PGP SIGNATURE- # gpg: Signature made Tue 22 Nov 2022 05:22:06 EST # gpg:using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg:issuer "m...@redhat.com" # gpg: Good signature from "Michael S. Tsirkin " [full] # gpg: aka "Michael S. Tsirkin " [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: virtio: disable error for out of spec queue-enable acpi/tests/avocado/bits: keep the work directory when BITS_DEBUG is set in env tests/avocado: configure acpi-bits to use avocado timeout MAINTAINERS: add mst to list of biosbits maintainers tests: acpi: x86: update expected DSDT after moving PRQx fields in _SB scope acpi: x86: move RPQx field back to _SB scope tests: acpi: whitelist DSDT before moving PRQx to _SB scope vhost: mask VIRTIO_F_RING_RESET for vhost and vhost-user devices Signed-off-by: Stefan Hajnoczi Commit: 16a550bdc0e49fcda0e6a6c55d648700ad33c8a4 https://github.com/qemu/qemu/commit/16a550bdc0e49fcda0e6a6c55d648700ad33c8a4 Author: Stefan Hajnoczi Date: 2022-11-22 (Tue, 22 Nov 2022) Changed paths: M hw/loongarch/acpi-build.c M hw/loongarch/virt.c Log Message: --- Merge tag 'pull-loongarch-20221122' of https://gitlab.com/gaosong/qemu into staging LoongArch pull for 7.2-rc2 # -BEGIN PGP SIGNATURE- # # iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCY3zJLQAKCRBAov/yOSY+ # 3wHkBADTgirzsosyvVGza6nHD1QTEK6ZqnvYB0wCoxKBt1btvzLoKO5gbe7S3Pq4 # obFurS+5QclwIuLR6ZkihNGMBL+uq6XZryUGG3pU8h1XZigdduiEk7l7YGF+N+hz # /7ESJGHzCTiXyTTXBNgLJEJYfUYdV+kWbXkIQuJGT+kdlzUifA== # =Uod8 # -END PGP SIGNATURE- # gpg: Signature made Tue 22 Nov 2022 08:05:49 EST # gpg:using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao " [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20221122' of https://gitlab.com/gaosong/qemu: hw/loongarch: Replace the value of uart info with macro hw/loongarch: Fix setprop_sized method in fdt rtc node. hw/loongarch: Add default stdout uart in fdt Signed-off-by: Stefan Hajnoczi Compare: https://github.com/qemu/qemu/compare/6d71357a3b65...16a550bdc0e4
