[Qemu-devel] [PATCH 8/8] Mips improvements

2006-05-14 Thread Thiemo Seufer
Hello All,

this patch uses symbolic constants instead of magic numbers for the
TLB handling.


Thiemo


Index: qemu-work/target-mips/cpu.h
===
--- qemu-work.orig/target-mips/cpu.h2006-05-15 01:32:21.0 +0100
+++ qemu-work/target-mips/cpu.h 2006-05-15 01:32:33.0 +0100
@@ -52,7 +52,7 @@
 uint32_t fcsr;
 #endif
 #if defined(MIPS_USES_R4K_TLB)
-tlb_t tlb[16];
+tlb_t tlb[MIPS_TLB_NB];
 #endif
 uint32_t CP0_index;
 uint32_t CP0_random;
Index: qemu-work/target-mips/helper.c
===
--- qemu-work.orig/target-mips/helper.c 2006-05-15 01:32:21.0 +0100
+++ qemu-work/target-mips/helper.c  2006-05-15 01:34:23.0 +0100
@@ -28,53 +28,56 @@
 #include "cpu.h"
 #include "exec-all.h"
 
+enum {
+TLBRET_DIRTY = -4,
+TLBRET_INVALID = -3,
+TLBRET_NOMATCH = -2,
+TLBRET_BADADDR = -1,
+TLBRET_MATCH = 0
+};
+
 /* MIPS32 4K MMU emulation */
 #ifdef MIPS_USES_R4K_TLB
 static int map_address (CPUState *env, target_ulong *physical, int *prot,
 target_ulong address, int rw, int access_type)
 {
+target_ulong tag = address & (TARGET_PAGE_MASK << 1);
+uint8_t ASID = env->CP0_EntryHi & 0xFF;
 tlb_t *tlb;
-target_ulong tag;
-uint8_t ASID;
 int i, n;
-int ret;
 
-ret = -2;
-tag = address & 0xE000;
-ASID = env->CP0_EntryHi & 0xFF;
 for (i = 0; i < MIPS_TLB_NB; i++) {
 tlb = &env->tlb[i];
 /* Check ASID, virtual page number & size */
 if ((tlb->G == 1 || tlb->ASID == ASID) &&
 tlb->VPN == tag && address < tlb->end2) {
 /* TLB match */
-n = (address >> 12) & 1;
+n = (address >> TARGET_PAGE_BITS) & 1;
 /* Check access rights */
-   if (!(n ? tlb->V1 : tlb->V0))
-return -3;
-   if (rw == 0 || (n ? tlb->D1 : tlb->D0)) {
-*physical = tlb->PFN[n] | (address & 0xFFF);
+   if (!(n ? tlb->V1 : tlb->V0))
+return TLBRET_INVALID;
+   if (rw == 0 || (n ? tlb->D1 : tlb->D0)) {
+*physical = tlb->PFN[n] | (address & ~TARGET_PAGE_MASK);
 *prot = PAGE_READ;
 if (n ? tlb->D1 : tlb->D0)
 *prot |= PAGE_WRITE;
-return 0;
+return TLBRET_MATCH;
 }
-return -4;
+return TLBRET_DIRTY;
 }
 }
-
-return ret;
+return TLBRET_NOMATCH;
 }
 #endif
 
-int get_physical_address (CPUState *env, target_ulong *physical, int *prot,
-  target_ulong address, int rw, int access_type)
+static int get_physical_address (CPUState *env, target_ulong *physical,
+int *prot, target_ulong address,
+int rw, int access_type)
 {
-int user_mode;
-int ret;
-
 /* User mode can only access useg */
-user_mode = (env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM;
+int user_mode = (env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM;
+int ret = TLBRET_MATCH;
+
 #if 0
 if (logfile) {
 fprintf(logfile, "user mode %d h %08x\n",
@@ -82,8 +85,7 @@
 }
 #endif
 if (user_mode && address > 0x7FFFUL)
-return -1;
-ret = 0;
+return TLBRET_BADADDR;
 if (address < 0x8000UL) {
 if (!(env->hflags & MIPS_HFLAG_ERL)) {
 #ifdef MIPS_USES_R4K_TLB
@@ -181,7 +183,7 @@
 access_type = ACCESS_INT;
 if (env->user_mode_only) {
 /* user mode only emulation */
-ret = -2;
+ret = TLBRET_NOMATCH;
 goto do_fault;
 }
 ret = get_physical_address(env, &physical, &prot,
@@ -190,14 +192,15 @@
 fprintf(logfile, "%s address=%08x ret %d physical %08x prot %d\n",
 __func__, address, ret, physical, prot);
 }
-if (ret == 0) {
-   ret = tlb_set_page(env, address & ~0xFFF, physical & ~0xFFF, prot,
-  is_user, is_softmmu);
+if (ret == TLBRET_MATCH) {
+   ret = tlb_set_page(env, address & TARGET_PAGE_MASK,
+  physical & TARGET_PAGE_MASK, prot,
+  is_user, is_softmmu);
 } else if (ret < 0) {
 do_fault:
 switch (ret) {
 default:
-case -1:
+case TLBRET_BADADDR:
 /* Reference to kernel address from user mode or supervisor mode */
 /* Reference to supervisor address from user mode */
 if (rw)
@@ -205,7 +208,7 @@
 else
 exception = EXCP_AdEL;
 break;
-case -2:
+case TLBRET_NOMATCH:
 /* No TLB match for a mapped address */
 if (rw)
 exception = EXCP_TLBS;
@@ -213,14 +216,14 @@
 exception = EXCP_TLBL;
 error_code = 1;
 break;
-case -3:
+

[Qemu-devel] [PATCH 6/8] Mips improvements

2006-05-14 Thread Thiemo Seufer
Hello All,

this patch takes the mtc0 operations out of line. It does this even
for relatively large functions, a followup patch in this set moves
them back. I didn't change the presumably broken interrupt handling
in mtc0_status, since a) it doesn't fail for me, and b) it would
inflate the patch set even further.


Thiemo


Index: qemu-work/target-mips/exec.h
===
--- qemu-work.orig/target-mips/exec.h   2006-05-15 01:30:34.0 +0100
+++ qemu-work/target-mips/exec.h2006-05-15 01:30:41.0 +0100
@@ -61,7 +61,8 @@
 #endif
 void do_mfc0_random(void);
 void do_mfc0_count(void);
-void do_mtc0(int reg, int sel);
+void do_mtc0_status_debug(uint32_t old, uint32_t val);
+void do_mtc0_status_irqraise_debug(void);
 void do_tlbwi (void);
 void do_tlbwr (void);
 void do_tlbp (void);
Index: qemu-work/target-mips/op.c
===
--- qemu-work.orig/target-mips/op.c 2006-05-15 01:30:34.0 +0100
+++ qemu-work/target-mips/op.c  2006-05-15 01:30:41.0 +0100
@@ -714,12 +714,189 @@
 RETURN();
 }
 
-void op_mtc0 (void)
+void op_mtc0_index (void)
 {
-CALL_FROM_TB2(do_mtc0, PARAM1, PARAM2);
+env->CP0_index = (env->CP0_index & 0x8000) | (T0 & 0x000F);
 RETURN();
 }
 
+void op_mtc0_entrylo0 (void)
+{
+env->CP0_EntryLo0 = T0 & 0x3FFF;
+RETURN();
+}
+
+void op_mtc0_entrylo1 (void)
+{
+env->CP0_EntryLo1 = T0 & 0x3FFF;
+RETURN();
+}
+
+void op_mtc0_context (void)
+{
+env->CP0_Context = (env->CP0_Context & 0xFF80) | (T0 & 0x0070);
+RETURN();
+}
+
+void op_mtc0_pagemask (void)
+{
+env->CP0_PageMask = T0 & 0x01FFE000;
+RETURN();
+}
+
+void op_mtc0_wired (void)
+{
+env->CP0_Wired = T0 & 0x000F;
+RETURN();
+}
+
+void op_mtc0_count (void)
+{
+CALL_FROM_TB2(cpu_mips_store_count, env, T0);
+RETURN();
+}
+
+void op_mtc0_entryhi (void)
+{
+uint32_t old, val;
+
+val = T0 & 0xE0FF;
+old = env->CP0_EntryHi;
+env->CP0_EntryHi = val;
+/* If the ASID changes, flush qemu's TLB.  */
+if ((old & 0xFF) != (val & 0xFF))
+CALL_FROM_TB2(tlb_flush, env, 1);
+RETURN();
+}
+
+void op_mtc0_compare (void)
+{
+CALL_FROM_TB2(cpu_mips_store_compare, env, T0);
+RETURN();
+}
+
+void op_mtc0_status (void)
+{
+uint32_t val, old, mask;
+
+val = T0 & 0xFA78FF01;
+old = env->CP0_Status;
+if (T0 & (1 << CP0St_UM))
+env->hflags |= MIPS_HFLAG_UM;
+else
+env->hflags &= ~MIPS_HFLAG_UM;
+if (T0 & (1 << CP0St_ERL))
+env->hflags |= MIPS_HFLAG_ERL;
+else
+env->hflags &= ~MIPS_HFLAG_ERL;
+if (T0 & (1 << CP0St_EXL))
+env->hflags |= MIPS_HFLAG_EXL;
+else
+env->hflags &= ~MIPS_HFLAG_EXL;
+env->CP0_Status = val;
+/* If we unmasked an asserted IRQ, raise it */
+mask = 0xFF00;
+if (loglevel & CPU_LOG_TB_IN_ASM)
+   CALL_FROM_TB2(do_mtc0_status_debug, old, val);
+if ((val & (1 << CP0St_IE)) && !(old & (1 << CP0St_IE)) &&
+!(env->hflags & MIPS_HFLAG_EXL) &&
+!(env->hflags & MIPS_HFLAG_ERL) &&
+!(env->hflags & MIPS_HFLAG_DM) &&
+(env->CP0_Status & env->CP0_Cause & mask)) {
+env->interrupt_request |= CPU_INTERRUPT_HARD;
+   if (logfile)
+   CALL_FROM_TB0(do_mtc0_status_irqraise_debug);
+} else if (!(val & (1 << CP0St_IE)) && (old & (1 << CP0St_IE))) {
+env->interrupt_request &= ~CPU_INTERRUPT_HARD;
+}
+RETURN();
+}
+
+void op_mtc0_cause (void)
+{
+uint32_t val, old;
+
+val = (env->CP0_Cause & 0xB000F87C) | (T0 & 0x000C00300);
+old = env->CP0_Cause;
+env->CP0_Cause = val;
+#if 0
+{
+int i, mask;
+
+   /* Check if we ever asserted a software IRQ */
+for (i = 0; i < 2; i++) {
+mask = 0x100 << i;
+if ((val & mask) & !(old & mask))
+CALL_FROM_TB1(mips_set_irq, i);
+}
+}
+#endif
+RETURN();
+}
+
+void op_mtc0_epc (void)
+{
+env->CP0_EPC = T0;
+RETURN();
+}
+
+void op_mtc0_config0 (void)
+{
+#if defined(MIPS_USES_R4K_TLB)
+env->CP0_Config0 = (env->CP0_Config0 & 0x8017FF80) | (T0 & 0x7E01);
+#else
+env->CP0_Config0 = (env->CP0_Config0 & 0xFE17FF80) | (T0 & 0x0001);
+#endif
+RETURN();
+}
+
+void op_mtc0_watchlo (void)
+{
+env->CP0_WatchLo = T0;
+RETURN();
+}
+
+void op_mtc0_watchhi (void)
+{
+env->CP0_WatchHi = T0 & 0x40FF0FF8;
+RETURN();
+}
+
+void op_mtc0_debug (void)
+{
+env->CP0_Debug = (env->CP0_Debug & 0x8C03FC1F) | (T0 & 0x13300120);
+if (T0 & (1 << CP0DB_DM))
+env->hflags |= MIPS_HFLAG_DM;
+else
+env->hflags &= ~MIPS_HFLAG_DM;
+RETURN();
+}
+
+void op_mtc0_depc (void)
+{
+env->CP0_DEPC = T0;
+RETURN();
+}
+
+void op_mtc0_taglo (void)
+{
+env->CP0_TagLo = T0 & 0xFCF6;
+RETURN();
+}
+
+void op_mtc0_errorepc (void)
+{
+env->CP0_Error

[Qemu-devel] [PATCH 5/8] Mips improvements

2006-05-14 Thread Thiemo Seufer
Hello All,

this patch splits the mfc0 operations in TB-inlined functions.


Thiemo


Index: qemu-work/target-mips/exec.h
===
--- qemu-work.orig/target-mips/exec.h   2006-05-07 23:49:06.0 +0100
+++ qemu-work/target-mips/exec.h2006-05-07 23:49:09.0 +0100
@@ -59,7 +59,8 @@
 void do_msub (void);
 void do_msubu (void);
 #endif
-void do_mfc0(int reg, int sel);
+void do_mfc0_random(void);
+void do_mfc0_count(void);
 void do_mtc0(int reg, int sel);
 void do_tlbwi (void);
 void do_tlbwr (void);
Index: qemu-work/target-mips/op.c
===
--- qemu-work.orig/target-mips/op.c 2006-05-07 22:59:28.0 +0100
+++ qemu-work/target-mips/op.c  2006-05-07 23:49:09.0 +0100
@@ -550,9 +550,167 @@
 }
 
 /* CP0 functions */
-void op_mfc0 (void)
+void op_mfc0_index (void)
 {
-CALL_FROM_TB2(do_mfc0, PARAM1, PARAM2);
+T0 = env->CP0_index;
+RETURN();
+}
+
+void op_mfc0_random (void)
+{
+CALL_FROM_TB0(do_mfc0_random);
+RETURN();
+}
+
+void op_mfc0_entrylo0 (void)
+{
+T0 = env->CP0_EntryLo0;
+RETURN();
+}
+
+void op_mfc0_entrylo1 (void)
+{
+T0 = env->CP0_EntryLo1;
+RETURN();
+}
+
+void op_mfc0_context (void)
+{
+T0 = env->CP0_Context;
+RETURN();
+}
+
+void op_mfc0_pagemask (void)
+{
+T0 = env->CP0_PageMask;
+RETURN();
+}
+
+void op_mfc0_wired (void)
+{
+T0 = env->CP0_Wired;
+RETURN();
+}
+
+void op_mfc0_badvaddr (void)
+{
+T0 = env->CP0_BadVAddr;
+RETURN();
+}
+
+void op_mfc0_count (void)
+{
+CALL_FROM_TB0(do_mfc0_count);
+RETURN();
+}
+
+void op_mfc0_entryhi (void)
+{
+T0 = env->CP0_EntryHi;
+RETURN();
+}
+
+void op_mfc0_compare (void)
+{
+T0 = env->CP0_Compare;
+RETURN();
+}
+
+void op_mfc0_status (void)
+{
+T0 = env->CP0_Status;
+if (env->hflags & MIPS_HFLAG_UM)
+T0 |= (1 << CP0St_UM);
+if (env->hflags & MIPS_HFLAG_ERL)
+T0 |= (1 << CP0St_ERL);
+if (env->hflags & MIPS_HFLAG_EXL)
+T0 |= (1 << CP0St_EXL);
+RETURN();
+}
+
+void op_mfc0_cause (void)
+{
+T0 = env->CP0_Cause;
+RETURN();
+}
+
+void op_mfc0_epc (void)
+{
+T0 = env->CP0_EPC;
+RETURN();
+}
+
+void op_mfc0_prid (void)
+{
+T0 = env->CP0_PRid;
+RETURN();
+}
+
+void op_mfc0_config0 (void)
+{
+T0 = env->CP0_Config0;
+RETURN();
+}
+
+void op_mfc0_config1 (void)
+{
+T0 = env->CP0_Config1;
+RETURN();
+}
+
+void op_mfc0_lladdr (void)
+{
+T0 = env->CP0_LLAddr >> 4;
+RETURN();
+}
+
+void op_mfc0_watchlo (void)
+{
+T0 = env->CP0_WatchLo;
+RETURN();
+}
+
+void op_mfc0_watchhi (void)
+{
+T0 = env->CP0_WatchHi;
+RETURN();
+}
+
+void op_mfc0_debug (void)
+{
+T0 = env->CP0_Debug;
+if (env->hflags & MIPS_HFLAG_DM)
+T0 |= 1 << CP0DB_DM;
+RETURN();
+}
+
+void op_mfc0_depc (void)
+{
+T0 = env->CP0_DEPC;
+RETURN();
+}
+
+void op_mfc0_taglo (void)
+{
+T0 = env->CP0_TagLo;
+RETURN();
+}
+
+void op_mfc0_datalo (void)
+{
+T0 = env->CP0_DataLo;
+RETURN();
+}
+
+void op_mfc0_errorepc (void)
+{
+T0 = env->CP0_ErrorEPC;
+RETURN();
+}
+
+void op_mfc0_desave (void)
+{
+T0 = env->CP0_DESAVE;
 RETURN();
 }
 
Index: qemu-work/target-mips/op_helper.c
===
--- qemu-work.orig/target-mips/op_helper.c  2006-05-07 23:49:08.0 
+0100
+++ qemu-work/target-mips/op_helper.c   2006-05-07 23:49:09.0 +0100
@@ -131,10 +131,16 @@
 #endif
 
 #if defined(CONFIG_USER_ONLY) 
-void do_mfc0 (int reg, int sel)
+void do_mfc0_random (void)
 {
-cpu_abort(env, "mfc0 reg=%d sel=%d\n", reg, sel);
+cpu_abort(env, "mfc0 random\n");
 }
+
+void do_mfc0_count (void)
+{
+cpu_abort(env, "mfc0 count\n");
+}
+
 void do_mtc0 (int reg, int sel)
 {
 cpu_abort(env, "mtc0 reg=%d sel=%d\n", reg, sel);
@@ -159,156 +165,18 @@
 {
 cpu_abort(env, "tlbr\n");
 }
+
 #else
 
 /* CP0 helpers */
-void do_mfc0 (int reg, int sel)
+void do_mfc0_random (void)
 {
-const unsigned char *rn;
+T0 = cpu_mips_get_random(env);
+}
 
-if (sel != 0 && reg != 16 && reg != 28) {
-rn = "invalid";
-goto print;
-}
-switch (reg) {
-case 0:
-T0 = env->CP0_index;
-rn = "Index";
-break;
-case 1:
-T0 = cpu_mips_get_random(env);
-rn = "Random";
-break;
-case 2:
-T0 = env->CP0_EntryLo0;
-rn = "EntryLo0";
-break;
-case 3:
-T0 = env->CP0_EntryLo1;
-rn = "EntryLo1";
-break;
-case 4:
-T0 = env->CP0_Context;
-rn = "Context";
-break;
-case 5:
-T0 = env->CP0_PageMask;
-rn = "PageMask";
-break;
-case 6:
-T0 = env->CP0_Wired;
-rn = "Wired";
-break;
-case 8:
-T0 = env->CP0_BadVAddr;
-rn = "BadVaddr";
-break;
-case 9:
- 

[Qemu-devel] [PATCH 4/8] Mips improvements

2006-05-14 Thread Thiemo Seufer
Hello All,

This patch fixes wrong bitmasks for CP0_Context and CP0_EntryHi.


Thiemo


Index: qemu-work/target-mips/helper.c
===
--- qemu-work.orig/target-mips/helper.c 2006-05-07 23:41:39.0 +0100
+++ qemu-work/target-mips/helper.c  2006-05-07 23:43:38.0 +0100
@@ -231,7 +231,7 @@
 env->CP0_Context = (env->CP0_Context & 0xff80) |
   ((address >> 9) &   0x0070);
 env->CP0_EntryHi =
-(env->CP0_EntryHi & 0xFF) | (address & 0xF000);
+(env->CP0_EntryHi & 0xFF) | (address & 0xE000);
 env->exception_index = exception;
 env->error_code = error_code;
 ret = 1;
Index: qemu-work/target-mips/op_helper.c
===
--- qemu-work.orig/target-mips/op_helper.c  2006-05-07 23:41:39.0 
+0100
+++ qemu-work/target-mips/op_helper.c   2006-05-07 23:43:38.0 +0100
@@ -342,7 +342,7 @@
 rn = "EntryLo1";
 break;
 case 4:
-val = (env->CP0_Context & 0xFF00) | (T0 & 0x00F0);
+val = (env->CP0_Context & 0xFF80) | (T0 & 0x0070);
 old = env->CP0_Context;
 env->CP0_Context = val;
 rn = "Context";
@@ -366,7 +366,7 @@
 rn = "Count";
 break;
 case 10:
-val = T0 & 0xF0FF;
+val = T0 & 0xE0FF;
 old = env->CP0_EntryHi;
 env->CP0_EntryHi = val;
/* If the ASID changes, flush qemu's TLB.  */


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel] [PATCH 3/8] Mips improvements

2006-05-14 Thread Thiemo Seufer
Hello All,

this is a general code cleanup, it simplifies some expressions and
gets rid of a few magic constants.


Thiemo


Index: qemu-work/target-mips/helper.c
===
--- qemu-work.orig/target-mips/helper.c 2006-05-07 23:38:48.0 +0100
+++ qemu-work/target-mips/helper.c  2006-05-07 23:39:19.0 +0100
@@ -40,8 +40,8 @@
 int ret;
 
 ret = -2;
-tag = (address & 0xE000);
-ASID = env->CP0_EntryHi & 0x00FF;
+tag = address & 0xE000;
+ASID = env->CP0_EntryHi & 0xFF;
 for (i = 0; i < MIPS_TLB_NB; i++) {
 tlb = &env->tlb[i];
 /* Check ASID, virtual page number & size */
@@ -74,7 +74,7 @@
 int ret;
 
 /* User mode can only access useg */
-user_mode = ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM) ? 1 : 0;
+user_mode = (env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM;
 #if 0
 if (logfile) {
 fprintf(logfile, "user mode %d h %08x\n",
@@ -231,7 +231,7 @@
 env->CP0_Context = (env->CP0_Context & 0xff80) |
   ((address >> 9) &   0x0070);
 env->CP0_EntryHi =
-(env->CP0_EntryHi & 0x00FF) | (address & 0xF000);
+(env->CP0_EntryHi & 0xFF) | (address & 0xF000);
 env->exception_index = exception;
 env->error_code = error_code;
 ret = 1;
Index: qemu-work/target-mips/op_helper.c
===
--- qemu-work.orig/target-mips/op_helper.c  2006-05-07 22:59:29.0 
+0100
+++ qemu-work/target-mips/op_helper.c   2006-05-07 23:41:05.0 +0100
@@ -330,13 +330,13 @@
 rn = "Index";
 break;
 case 2:
-val = T0 & 0x03FFF;
+val = T0 & 0x3FFF;
 old = env->CP0_EntryLo0;
 env->CP0_EntryLo0 = val;
 rn = "EntryLo0";
 break;
 case 3:
-val = T0 & 0x03FFF;
+val = T0 & 0x3FFF;
 old = env->CP0_EntryLo1;
 env->CP0_EntryLo1 = val;
 rn = "EntryLo1";
@@ -403,20 +403,17 @@
 old, val, env->CP0_Cause, old & mask, val & mask,
 env->CP0_Cause & mask);
 }
-#if 1
 if ((val & (1 << CP0St_IE)) && !(old & (1 << CP0St_IE)) &&
 !(env->hflags & MIPS_HFLAG_EXL) &&
 !(env->hflags & MIPS_HFLAG_ERL) &&
-!(env->hflags & MIPS_HFLAG_DM) && 
+!(env->hflags & MIPS_HFLAG_DM) &&
 (env->CP0_Status & env->CP0_Cause & mask)) {
 if (logfile)
 fprintf(logfile, "Raise pending IRQs\n");
 env->interrupt_request |= CPU_INTERRUPT_HARD;
-do_raise_exception(EXCP_EXT_INTERRUPT);
-} else if (!(val & 0x0001) && (old & 0x0001)) {
+} else if (!(val & (1 << CP0St_IE)) && (old & (1 << CP0St_IE))) {
 env->interrupt_request &= ~CPU_INTERRUPT_HARD;
 }
-#endif
 rn = "Status";
 break;
 case 13:
@@ -605,9 +602,9 @@
 uint8_t ASID;
 int i;
 
-tag = (env->CP0_EntryHi & 0xE000);
-ASID = env->CP0_EntryHi & 0x00FF;
-for (i = 0; i < MIPS_TLB_NB; i++) {
+tag = env->CP0_EntryHi & 0xE000;
+ASID = env->CP0_EntryHi & 0xFF;
+for (i = 0; i < MIPS_TLB_NB; i++) {
 tlb = &env->tlb[i];
 /* Check ASID, virtual page number & size */
 if ((tlb->G == 1 || tlb->ASID == ASID) && tlb->VPN == tag) {
Index: qemu-work/target-mips/translate.c
===
--- qemu-work.orig/target-mips/translate.c  2006-05-07 22:59:29.0 
+0100
+++ qemu-work/target-mips/translate.c   2006-05-07 23:39:19.0 +0100
@@ -1614,7 +1614,7 @@
 #if defined(CONFIG_USER_ONLY)
 ctx.mem_idx = 0;
 #else
-ctx.mem_idx = (ctx.hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM ? 0 : 1;
+ctx.mem_idx = !((ctx.hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM);
 #endif
 ctx.CP0_Status = env->CP0_Status;
 #ifdef DEBUG_DISAS


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel] [PATCH 2/8] Mips improvements

2006-05-14 Thread Thiemo Seufer
Hello All,

this patch enables disassembly of all instructions the mips
disassembler knows about.


Thiemo


Index: qemu-work/mips-dis.c
===
--- qemu-work.orig/mips-dis.c   2006-05-15 01:13:13.0 +0100
+++ qemu-work/mips-dis.c2006-05-15 01:20:23.0 +0100
@@ -528,6 +528,7 @@
ISA/ASE bitmask to test against; and CPU is the CPU specific ISA to
test, or zero if no CPU specific ISA test is desired.  */
 
+#if 0
 #define OPCODE_IS_MEMBER(insn, isa, cpu)   \
 (((insn)->membership & isa) != 0   \
  || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0)\
@@ -543,6 +544,10 @@
  || (cpu == CPU_VR5400 && ((insn)->membership & INSN_5400) != 0)   \
  || (cpu == CPU_VR5500 && ((insn)->membership & INSN_5500) != 0)   \
  || 0) /* Please keep this term for easier source merging.  */
+#else
+#define OPCODE_IS_MEMBER(insn, isa, cpu)   \
+(1 != 0)
+#endif
 
 /* This is a list of macro expanded instructions.
 


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel] [PATCH 1/8] Mips improvements

2006-05-14 Thread Thiemo Seufer
Hello All,

this is the first (and most trivial) part of my MIPS-related patchset.
It adds an explanatory comment and removes some bits of dead code.


Thiemo


Index: cpu-exec.c
===
--- cpu-exec.c.orig 2006-05-15 01:13:14.0 +0100
+++ cpu-exec.c  2006-05-15 01:18:21.0 +0100
@@ -561,6 +561,8 @@
 #elif defined(TARGET_SH4)
/* X */
 #endif
+   /* Don't use the cached interupt_request value,
+  do_interrupt may have updated the EXITTB flag. */
 if (env->interrupt_request & CPU_INTERRUPT_EXITTB) {
 env->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
 /* ensure that no TB jump will be modified as
Index: target-mips/helper.c
===
--- target-mips/helper.c.orig   2006-05-15 01:13:14.0 +0100
+++ target-mips/helper.c2006-05-15 01:18:21.0 +0100
@@ -219,7 +219,6 @@
 exception = EXCP_TLBS;
 else
 exception = EXCP_TLBL;
-error_code = 0;
 break;
 case -4:
 /* TLB match but 'D' bit is cleared */
@@ -350,7 +349,6 @@
 cause = 4;
 goto set_EPC;
 case EXCP_TLBL:
-case EXCP_TLBF:
 cause = 2;
 if (env->error_code == 1 && !(env->hflags & MIPS_HFLAG_EXL))
 offset = 0x000;


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


RE: [Qemu-devel] patch for ne2000.c

2006-05-14 Thread Han, Zhu
Hi, Fabrice!
For your first comment, I have to say it's not a bug in the current OS. It's 
caused by the difference between ne2000's emulation and the real hardware 
detail. When the receive buffer is full and the receiving side has acknowledged 
the ENISR_RX signal, the hardware should raise the ENISR_OVER signal. But for 
the sake of simplicity, ne2000 don't implement ENISR_OVER semantic. And we 
really don't need any ENISR_OVER signal because we needn't do any recovery job. 
So, this is a workaround and the simplest way for this problem!

Best Regards, 
hanzhu
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Fabrice Bellard
Sent: 2006年5月12日 5:52
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] patch for ne2000.c

OK for (2).

For (1) It would be good to find the exact behaviour of the NE2000 card.
Maybe ENISR_RX remain set as long are there are packets in the buffer ?
Otherwise your fix is a workaround to correct a bug in the OS driver...

Fabrice.

Han, Zhu wrote:
> Any comments for this patch?
> 
> Best Regards, 
> hanzhu
> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Han, Zhu
> Sent: 2006年5月9日 12:27
> To: qemu-devel@nongnu.org
> Subject: [Qemu-devel] patch for ne2000.c
> 
> Hi, All!
> 
> I'm a developer working on xen project! It's well known that xen has
> adopted a lot of codes and features from QEMU, especially the Device
> Mode Part!
> 
> I fix a bug for ne2000 device emulation code in XEN and I expect it to
> be a potential bug for QEMU, either! Because you are all device mode
> experts, I submit this patch to you at first in order to ask you to
> review my patch. 
> 
> Several notes:
> 1) Because XEN use event driven mechanism in the main_loop(), irq may be
> missed due to the rather high speed and large file! For example, the
> ne2000_receive will filled up with the buffer and set up the ENISR_RX
> signal, however, the driver could ack and clear the ENISR_RX signal due
> to it could only handle a certain amount of packets once in it's
> interrupt handling routine!  The consequence for this specific steps is
> the netcard buffer is full but it never resend the ENISR_RX signal, at
> the last, the netcard will be halted! This problem could be rather rare
> for QEMU. Anyway, it's a potential bug.
> 2) Many of the ne2000 spec said we should set boundary register should
> be set to indicate the last receive buffer page the host has read, and
> the driver in linux follows this guideline. So, we boundary == index,
> the buffer for the netcard is full and we can't write any packets into
> this buffer. This minor fix could prevent the ne2000 emulated card from
> overflow and destroying the previous received packet page! This problem
> could also be rare for QEMU since it could happen only under extreme
> circumstance! 
> 
> Any feedbacks and comments will be appreciated! 
> 
> --- qemu-snapshot-2006-05-07_23\hw\ne2000.c   Mon May 08 16:13:49 2006
> +++ ./ne2000.cMon May 08 16:57:33 2006
> @@ -159,9 +159,19 @@
>  }
>  }
>  
> +static int ne2000_buffer_full(NE2000State *s);
>  static void ne2000_update_irq(NE2000State *s)
>  {
>  int isr;
> +
> +if(ne2000_buffer_full(s)
> +&& !(s->isr & ENISR_RX)){
> + /* The freeing space is not enough, tell the ne2k driver
> +  * to fetch these packets!
> +  */
> +s->isr |= ENISR_RX;
> +}
> +
>  isr = (s->isr & s->imr) & 0x7f;
>  #if defined(DEBUG_NE2000)
>  printf("NE2000: Set IRQ line %d to %d (%02x %02x)\n",
> @@ -206,7 +216,10 @@
>  
>  index = s->curpag << 8;
>  boundary = s->boundary << 8;
> -if (index < boundary)
> +if (index <= boundary)
> + /* when index == boundary, we should assume 
> +  * the buffer is full instead of empty!
> +  */
>  avail = boundary - index;
>  else
>  avail = (s->stop - s->start) - (index - boundary);
> 
> Best Regards, 
> hanzhu
> 
> 
> ___
> Qemu-devel mailing list
> Qemu-devel@nongnu.org
> http://lists.nongnu.org/mailman/listinfo/qemu-devel
> 
> 



___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel] qemu/pc-bios vgabios-cirrus.bin vgabios.bin vga...

2006-05-14 Thread Fabrice Bellard
CVSROOT:/sources/qemu
Module name:qemu
Branch: 
Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/14 21:03:52

Modified files:
pc-bios: vgabios-cirrus.bin vgabios.bin vgabios.diff 

Log message:
clear screen when changing graphic mode in Cirrus VGA BIOS (aka win2k 
mode change bug)

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/pc-bios/vgabios-cirrus.bin.diff?tr1=1.6&tr2=1.7&r1=text&r2=text
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/pc-bios/vgabios.bin.diff?tr1=1.5&tr2=1.6&r1=text&r2=text
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/pc-bios/vgabios.diff.diff?tr1=1.2&tr2=1.3&r1=text&r2=text


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


Re: [Qemu-devel] [PATCH] VLAN and Tap for win32

2006-05-14 Thread Fabrice Bellard

Kazu wrote:

Hi,

VLAN and Tap patches for win32 are updated. I added handling for wait
objects.

http://www.h7.dion.ne.jp/~qemu-win/download/qemu-0.8.1-vlan.patch


I don't undertand this patch: the connect() is meant to be non blocking 
so the 'socket_wait_event' just after is not correct. The wait for the 
connection must be done inside the QEMU main loop as it is done on the 
Unix target (connect() on Unix in non blocking mode usually return 
EINPROGRESS and we can wait for the connection using select()).



http://www.h7.dion.ne.jp/~qemu-win/download/qemu-0.8.1-tap.patch


OK for this one. Suppressing all the remaning polling in the win32 
version would be good. In particular, it would be good to be able to 
wait for network events while waiting for other events.


Regards,

Fabrice.


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel] qemu/hw ne2000.c

2006-05-14 Thread Fabrice Bellard
CVSROOT:/sources/qemu
Module name:qemu
Branch: 
Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/14 18:41:52

Modified files:
hw : ne2000.c 

Log message:
ne2000 buffer fulness fix (Han Zhu)

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/hw/ne2000.c.diff?tr1=1.19&tr2=1.20&r1=text&r2=text


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


Re: Fw: [Qemu-devel] MIPS: UART access w/o -kernel option

2006-05-14 Thread Fabrice Bellard

Alexander Voropay wrote:


I'm thinking about adding a new MIPS platform to the Qemu:
http://www.linux-mips.org/wiki/Mips_Malta

The Malta is very popular reference platform for the MIPS development.
There is a special Linux MIPS/Malta kernel. Montavista and many
other companies are offering a MIPS Malta distributives with
pre-compiled kernels. There is a NetBSD port to the Malta.
VxWorks/Malta exists, e.t.c.

The Malta architecture is very similar to the current Qemu MIPS
machine but the ISA addresses are different. Additionally, it
has a PCI subsystem, so it should be possible to use existent
Qemu PCI devices in the future. Malta has an standart PC ISA
devices (inside the PIIX4 chip). The Qemu contains all necessary
parts to introduce a new platform (except Galileo PCI).

Fabrice, is it difficult to add a new MIPS Malta platform
to the MIPS Qemu ? Could you add at least a framework
for this platform (CLI options, initial .c files) ?
P.S.The MIPS BIOS/kernel donload code should be reusable
for the any MIPS platforms.


Adding the Malta machine support would be very interesting. You can just 
copy the file mips_r4k.c to malta.c and modify it to add the missing parts.


Fabrice.


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


Re: [Qemu-devel][PATCH]Get machine name from name of executable

2006-05-14 Thread Fabrice Bellard
I don't understand your problem : the '-M' option is used to select the 
machine. Your "ar7" machine must be added as a new machine. The 
endianness must be selected inside the machine code. If the machine can 
be launched with the two endiannesses, then you can just add two 
machines names.


Fabrice.

Stefan Weil wrote:

Hi,

ok, I think this plan is a good one. It might even be possible to run 
several different machines by
starting a single QEMU emulation process. But you need some mechanism to 
tell QEMU which machine(s) to run.
Of course, you could add new command line options. MIPS, for example, 
could select endianness
automatically in user mode (from ELF format), but not in system mode 
when running a complete system
with a firmware loader. So you need some way to tell QEMU that this is a 
MIPS CPU with a certain kind
of endianness (the real CPU has a hardware input pin for this, we need 
something which replaces this

hardware input pin).

Did you think about using configuration files (XML, YAML, or any other 
format) with machine descriptions
(CPU, CPU variant, endianness, network hardware, serial ports, other 
hardware features which are

compiled into the code or configured via command line options today)?

Regards
Stefan

Fabrice Bellard schrieb:


Hi,

The long term plan for qemu is to have a single executable for all 
machines. If you make a single executable for mips and mipsel, it is 
better to select the endianness in the code of the machine itself when 
initializing the CPU.


Regards,

Fabrice.





___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel






___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel] qemu vnc.c vnchextile.h

2006-05-14 Thread Fabrice Bellard
CVSROOT:/sources/qemu
Module name:qemu
Branch: 
Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/14 18:11:49

Modified files:
.  : vnc.c vnchextile.h 

Log message:
support for all VNC pixel formats

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/vnc.c.diff?tr1=1.5&tr2=1.6&r1=text&r2=text
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/vnchextile.h.diff?tr1=1.1&tr2=1.2&r1=text&r2=text


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel] SuSE 10.1 + GCC 3.3.6

2006-05-14 Thread Christian Bourque

Hi!

I get this error when trying to compile QEMU 0.8.1 (or CVS version)
under SuSE 10.1 and GCC 3.3.6:

-
In file included from /home/cbourque/download/qemu/usb-linux.c:29:
/usr/include/linux/usbdevice_fs.h:49: error: variable or field
`__user' declared void
/usr/include/linux/usbdevice_fs.h:49: error: syntax error before '*' token
/usr/include/linux/usbdevice_fs.h:56: error: variable or field
`__user' declared void
/usr/include/linux/usbdevice_fs.h:56: error: syntax error before '*' token
/usr/include/linux/usbdevice_fs.h:66: error: variable or field
`__user' declared void
/usr/include/linux/usbdevice_fs.h:66: error: syntax error before '*' token
/usr/include/linux/usbdevice_fs.h:100: error: variable or field
`__user' declared void
/usr/include/linux/usbdevice_fs.h:100: error: syntax error before '*' token
/usr/include/linux/usbdevice_fs.h:109: error: syntax error before '}' token
/usr/include/linux/usbdevice_fs.h:116: error: variable or field
`__user' declared void
/usr/include/linux/usbdevice_fs.h:116: error: syntax error before '*' token
/home/cbourque/download/qemu/usb-linux.c: In function `usb_host_handle_control':
/home/cbourque/download/qemu/usb-linux.c:91: error: invalid
application of `sizeof' to an incomplete type
/home/cbourque/download/qemu/usb-linux.c: In function `usb_host_handle_data':
/home/cbourque/download/qemu/usb-linux.c:110: error: storage size of
`bt' isn't known
/home/cbourque/download/qemu/usb-linux.c:121: error: invalid
application of `sizeof' to an incomplete type
/home/cbourque/download/qemu/usb-linux.c:110: warning: unused variable `bt'
/home/cbourque/download/qemu/usb-linux.c: In function `usb_host_device_open':
/home/cbourque/download/qemu/usb-linux.c:185: error: storage size of
`ctrl' isn't known
/home/cbourque/download/qemu/usb-linux.c:188: error: invalid
application of `sizeof' to an incomplete type
/home/cbourque/download/qemu/usb-linux.c:185: warning: unused variable `ctrl'
make[1]: *** [usb-linux.o] Error 1
-

Has anyone else experienced the same problem?

Thanks

Christian


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel] [Patch] Publish VNC display with zeroconf

2006-05-14 Thread Oliver Gerlich
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

Hi,

here's a little gimmick for VNC support :-)

The patch makes Qemu publish its VNC display via zeroconf if it is
called with -vnc option. The patch uses the avahi-publish helper app for
this, which comes with the Avahi suite (eg. in Debian and Ubuntu it's in
the avahi-utils package). If avahi-publish is not installed, this patch
won't do anything.

With the patch applied, you can use the service-discovery-applet under
Gnome to see all Qemu instances which use VNC. Under KDE, Krdc offers a
list of all zeroconf-published VNC displays (choose "DNS-SD" from the
listbox in the upper left corner in Krdc).


Regards,
Oliver
-BEGIN PGP SIGNATURE-
Version: GnuPG v1.4.3 (GNU/Linux)

iD8DBQFEZ0X5TFOM6DcNJ6cRApiCAJ0dSa115JeNvXu9PfND5R+E4TqyeQCgvDlK
ROoGXIBo2gVLK104J2uKz1M=
=8tDu
-END PGP SIGNATURE-
--- qemu-0.8.1/vnc.c2006-05-03 22:32:58.0 +0200
+++ qemu-0.8.1-avahi/vnc.c  2006-05-14 16:21:05.0 +0200
@@ -64,6 +64,11 @@
 size_t read_handler_expect;
 };
 
+#ifndef _WIN32
+#include 
+pid_t mdns_publish_pid = 0;
+#endif
+
 /* TODO
1) Get the queue working for IO.
2) there is some weirdness when using the -S option (the screen is grey
@@ -852,6 +857,71 @@
 }
 }
 
+#ifndef _WIN32
+static void vnc_unpublish_mdns(void)
+{
+if (mdns_publish_pid != 0)
+{
+kill(mdns_publish_pid, SIGTERM);
+}
+return;
+}
+#endif
+
+/// Publish VNC display via mdns/zeroconf using the Avahi suite.
+/// See RFC 2782 and avahi-publish(1) for more info.
+void vnc_publish_mdns(int port)
+{
+#ifndef _WIN32
+// Execute avahi helper program in a child process.
+pid_t childPid = fork();
+switch(childPid)
+{
+case -1:
+// fork() failed; ignore this.
+break;
+
+case 0:
+{
+// New child process.
+char name[250];
+char portString[10];
+char *argv[10];
+int i = 0;
+
+sprintf(name, "QEMU instance on port %d", port);
+sprintf(portString, "%d", port);
+
+argv[i++] = "avahi-publish"; // avahi-publish is a helper program 
from Avahi that publishes DNS-SD records.
+argv[i++] = "-s";// Flag: publish a service.
+argv[i++] = name;// Name of the service
+argv[i++] = "_rfb._tcp"; // Service type (see 
http://www.dns-sd.org/ServiceTypes.html)
+argv[i++] = portString;  // TCP port
+argv[i++] = NULL;
+
+// Close stdout/stderr to suppress output from avahi-publish
+close(STDOUT_FILENO);
+close(STDERR_FILENO);
+
+// Execute avahi-publish
+execvp(argv[0], argv);
+
+// This point might be reached, eg. if avahi-publish is not 
installed.
+exit(0);
+break;
+}
+
+default:
+// Parent process. Record child pid and set exit handler.
+mdns_publish_pid = childPid;
+atexit(vnc_unpublish_mdns);
+break;
+}
+#endif
+
+return;
+}
+
 void vnc_display_init(DisplayState *ds, int display)
 {
 struct sockaddr_in addr;
@@ -918,4 +988,6 @@
 memset(vs->dirty_row, 0xFF, sizeof(vs->dirty_row));
 
 vnc_dpy_resize(vs->ds, 640, 400);
+
+vnc_publish_mdns(5900 + display);
 }
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel] qemu/hw pc.c

2006-05-14 Thread Paul Brook
CVSROOT:/sources/qemu
Module name:qemu
Branch: 
Changes by: Paul Brook <[EMAIL PROTECTED]>  06/05/14 13:44:07

Modified files:
hw : pc.c 

Log message:
Avoid compiler warning.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/hw/pc.c.diff?tr1=1.55&tr2=1.56&r1=text&r2=text


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


Re: [Qemu-devel][PATCH]Get machine name from name of executable

2006-05-14 Thread Stefan Weil

Hi,

ok, I think this plan is a good one. It might even be possible to run 
several different machines by
starting a single QEMU emulation process. But you need some mechanism to 
tell QEMU which machine(s) to run.
Of course, you could add new command line options. MIPS, for example, 
could select endianness
automatically in user mode (from ELF format), but not in system mode 
when running a complete system
with a firmware loader. So you need some way to tell QEMU that this is a 
MIPS CPU with a certain kind
of endianness (the real CPU has a hardware input pin for this, we need 
something which replaces this

hardware input pin).

Did you think about using configuration files (XML, YAML, or any other 
format) with machine descriptions
(CPU, CPU variant, endianness, network hardware, serial ports, other 
hardware features which are

compiled into the code or configured via command line options today)?

Regards
Stefan

Fabrice Bellard schrieb:


Hi,

The long term plan for qemu is to have a single executable for all 
machines. If you make a single executable for mips and mipsel, it is 
better to select the endianness in the code of the machine itself when 
initializing the CPU.


Regards,

Fabrice.




___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


Re: [Qemu-devel] w98se slow with kqemu, apparently some systems only

2006-05-14 Thread Mikhail Ramendik
В сообщении от 14 мая 2006 16:45 Brad Campbell написал(a):

> Do you have the idle driver loaded in win98 as per the qemu docs?
> Otherwise it will use 100% cpu, where as NT based systems know how to hlt
> the processor

Thanks, I have done so now. 

The situation has improved, the speed with kqemu and without kqemu is now 
approximately the same; but it is still much worse than what was reported by 
the person for whom kqemu actually works.

For me, with this driver, the bootup to the logon prompt takes about 15 sec, 
and after the logon button is pressed, it takes about 12 sec more to get to 
the desktop (and be able to work, not look at the hourglass). This does not 
change whether -no-kqemu is used. For the person for whom it works, with the 
same image - without the driver! - bootup took 6 sec to logon prompt, then 3 
sec to desktop.

In fact the very first Windows bootup after the install, where it probably did 
hardware detection, took nearly an hour. (kqemu was enabled).

-- 
Yours, Mikhail Ramendik



___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


Re: [Qemu-devel] w98se slow with kqemu, apparently some systems only

2006-05-14 Thread Brad Campbell

Mikhail Ramendik wrote:
I wrote: 


There seems to be an issue with guest Windows 98 SE on qemu 0.8.1 and kqemu
1.3.0pre7, on a Linux host.

Windows 98 SE is visibly very slow; and when qemu is run with -no-kqemu, it
is actually faster.


I forgot to mention that the CPU use as per "top" is constantly at 100%, 
almost all of it by qemu, with over 60% in "system"; 

With guest NT4 (which is fast) the CPU use is near zero when the NT system is 
idle.



Do you have the idle driver loaded in win98 as per the qemu docs?
Otherwise it will use 100% cpu, where as NT based systems know how to hlt the 
processor


--
"Human beings, who are almost unique in having the ability
to learn from the experience of others, are also remarkable
for their apparent disinclination to do so." -- Douglas Adams


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


Re: [Qemu-devel] w98se slow with kqemu, apparently some systems only

2006-05-14 Thread Mikhail Ramendik
I wrote: 

> There seems to be an issue with guest Windows 98 SE on qemu 0.8.1 and kqemu
> 1.3.0pre7, on a Linux host.
>
> Windows 98 SE is visibly very slow; and when qemu is run with -no-kqemu, it
> is actually faster.

I forgot to mention that the CPU use as per "top" is constantly at 100%, 
almost all of it by qemu, with over 60% in "system"; 

With guest NT4 (which is fast) the CPU use is near zero when the NT system is 
idle.

-- 
Yours, Mikhail Ramendik



___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel] w98se slow with kqemu, apparently some systems only

2006-05-14 Thread Mikhail Ramendik
Hello,

There seems to be an issue with guest Windows 98 SE on qemu 0.8.1 and kqemu 
1.3.0pre7, on a Linux host. 

Windows 98 SE is visibly very slow; and when qemu is run with -no-kqemu, it is 
actually faster.

I have this issue on two different systems:

- Intel Celeron 2400 CPU, 512M RAM, RH9-derived, kernel 2.6.11 with some 
patches including -ck
- AMD Duron 650 CPU, 256M RAM, Debian sarge, vanilla kernel 2.6.15 (run with 
-m 64)

On the Intel system I also installed NT 4.0 (in a different image) and it is 
fast with kqemu. (It has mouse problems - invisible wall, erratic behaviour, 
all intermittent - but I know this issue is quite different and patches 
exist).

This same issue was also reported on the user forum: 
http://qemu.dad-answers.com/viewtopic.php?t=1476

However, other people on IRC have reported that Win98SE is fast for them. In 
fact I have transferred my Win98SE image to another person, who runs qemu CVS 
and kqemu 1.3.0pre7 on Ubunto dapper; he reported that it runs fast.

This seems to be an issue on some systems only, but I could not isolate the 
key setup difference. I would be most interested in helping to pinpoint the 
problem. I am ready to run any tests/patches, and I have an archive of 
various old Windows systems (backups...) that I can try on request; I can 
also pull CVS if necessary.

-- 
Yours, Mikhail Ramendik



___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


Re: [Qemu-devel][PATCH]Makefile targets for new documentation formats

2006-05-14 Thread Paul Brook
On Sunday 14 May 2006 12:00, Stefan Weil wrote:
> The patch enhances the Makefile with new targets
> (and ignores these targets and intermediate files for CVS):
>
> make info - create documentation in info format
> make dvi  - create documentation in dvi format
>
> It also fixes some minor issues in Makefile:
>
> * Missing config-host.mak still allows calling make,
>  e.g. for make distclean.

I consider this to be a feature. Most packages don't even generate a Makefile 
until after you've run configure.

I've applied the other bits, with the addition of a "html" target.

Paul


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel] qemu .cvsignore Makefile

2006-05-14 Thread Paul Brook
CVSROOT:/sources/qemu
Module name:qemu
Branch: 
Changes by: Paul Brook <[EMAIL PROTECTED]>  06/05/14 12:07:54

Modified files:
.  : .cvsignore Makefile 

Log message:
Add doc, html, dvi and .PHONY Makefile targets.
Add resulting files to .cvsignore.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/.cvsignore.diff?tr1=1.13&tr2=1.14&r1=text&r2=text
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/Makefile.diff?tr1=1.101&tr2=1.102&r1=text&r2=text


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


Re: [Qemu-devel][PATCH]Get machine name from name of executable

2006-05-14 Thread Fabrice Bellard

Hi,

The long term plan for qemu is to have a single executable for all 
machines. If you make a single executable for mips and mipsel, it is 
better to select the endianness in the code of the machine itself when 
initializing the CPU.


Regards,

Fabrice.


Stefan Weil wrote:

Today, QEMU allows machine selection using command line option -M.
Without this option, it will always take the first machine
for the given target architecture.

With my patch, QEMU first parses the name of the executable.
The string after the last '-' is interpreted as machine name.
If this machine does not exist, the first machine is taken,
so the new QEMU remains compatible with the old behaviour.

With this patch, an installation might link e.g. qemu-system-arm
to qemu-system-arm-integratorcp926, and running 
qemu-system-arm-integratorcp926

will automatically select machine integratorcp926.

My goal is a MIPS emulation which supports big and little endian mode
in the same executable (like the real hardware). qemu-system-mipsel
would be a symbolic link to qemu-system-mips and enable little endian mode.

I propose another code modification: instead of registration of all 
machines

in vl.c, vl.c might call a target procedure which does this registration.
So if MIPS, ARM or other targets add machines, vl.c would not change.
Example: vl.c calls qemu_register_mips_machines() which calls
qemu_register_machine(&mips_machine).

Regards,
Stefan


--- vl.c3 May 2006 22:02:44 -1.185
+++ vl.c12 May 2006 20:19:15 -
@@ -4252,7 +4254,7 @@
return 0;
}

-QEMUMachine *find_machine(const char *name)
+static QEMUMachine *find_machine(const char *name)
{
QEMUMachine *m;

@@ -5075,7 +5077,14 @@
mallopt(M_MMAP_THRESHOLD, 4096 * 1024);
#endif
register_machines();
+machine = 0;
+optarg = strrchr(argv[0], '-');
+if (optarg != 0) {
+machine = find_machine(optarg + 1);
+}
+if (!machine) {
machine = first_machine;
+}
initrd_filename = NULL;
for(i = 0; i < MAX_FD; i++)
fd_filename[i] = NULL;



___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel






___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


Re: [Qemu-devel][PATCH]Get machine name from name of executable

2006-05-14 Thread Thiemo Seufer
Stefan Weil wrote:
> Today, QEMU allows machine selection using command line option -M.
> Without this option, it will always take the first machine
> for the given target architecture.
> 
> With my patch, QEMU first parses the name of the executable.
> The string after the last '-' is interpreted as machine name.
> If this machine does not exist, the first machine is taken,
> so the new QEMU remains compatible with the old behaviour.
> 
> With this patch, an installation might link e.g. qemu-system-arm
> to qemu-system-arm-integratorcp926, and running 
> qemu-system-arm-integratorcp926
> will automatically select machine integratorcp926.
> 
> My goal is a MIPS emulation which supports big and little endian mode
> in the same executable (like the real hardware). qemu-system-mipsel
> would be a symbolic link to qemu-system-mips and enable little endian mode.

A similiar approach was abandoned years ago in the case of GNU
ls/dir/vdir due to continuous trouble on non-posix systems, and the
potential of unexpected results with this aproach. (E.g. what happens
if somebody adds a symlink qemu-default -> qemu-system-mipsel).


Thiemo


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel] qemu ./configure linux-user/main.c linux-user/q...

2006-05-14 Thread Paul Brook
CVSROOT:/sources/qemu
Module name:qemu
Branch: 
Changes by: Paul Brook <[EMAIL PROTECTED]>  06/05/14 11:30:38

Modified files:
.  : configure 
linux-user : main.c qemu.h syscall.c 

Log message:
Teach usermode emulation how to lie about uname -r.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/configure.diff?tr1=1.101&tr2=1.102&r1=text&r2=text
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/linux-user/main.c.diff?tr1=1.82&tr2=1.83&r1=text&r2=text
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/linux-user/qemu.h.diff?tr1=1.25&tr2=1.26&r1=text&r2=text
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/linux-user/syscall.c.diff?tr1=1.70&tr2=1.71&r1=text&r2=text


___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel][PATCH]Minor spelling fixes

2006-05-14 Thread Stefan Weil

Here is a collection of some minor patches.
They only fix spelling in comments.

Regards
Stefan


Index: cpu-exec.c
===
RCS file: /sources/qemu/qemu/cpu-exec.c,v
retrieving revision 1.78
diff -u -b -B -u -r1.78 cpu-exec.c
--- cpu-exec.c27 Apr 2006 21:05:14 -1.78
+++ cpu-exec.c14 May 2006 10:42:48 -
@@ -386,7 +386,7 @@
break;
} else if (env->user_mode_only) {
/* if user mode only, we simulate a fake exception
-   which will be hanlded outside the cpu execution
+   which will be handled outside the cpu execution
   loop */
#if defined(TARGET_I386)
do_interrupt_user(env->exception_index,
Index: hw/ne2000.c
===
RCS file: /sources/qemu/qemu/hw/ne2000.c,v
retrieving revision 1.19
diff -u -b -B -u -r1.19 ne2000.c
--- hw/ne2000.c4 Feb 2006 22:15:28 -1.19
+++ hw/ne2000.c14 May 2006 10:42:54 -
@@ -312,7 +312,7 @@
}
s->curpag = next >> 8;

-/* now we can signal we have receive something */
+/* now we can signal we have received something */
s->isr |= ENISR_RX;
ne2000_update_irq(s);
}
Index: hw/smc91c111.c
===
RCS file: /sources/qemu/qemu/hw/smc91c111.c,v
retrieving revision 1.3
diff -u -b -B -u -r1.3 smc91c111.c
--- hw/smc91c111.c4 Feb 2006 22:15:28 -1.3
+++ hw/smc91c111.c14 May 2006 10:42:55 -
@@ -615,7 +615,7 @@

if ((s->rcr & RCR_RXEN) == 0 || (s->rcr & RCR_SOFT_RST))
return;
-/* Short packets are padded with zeros.  Recieveing a packet
+/* Short packets are padded with zeros.  Receiving a packet
   < 64 bytes long is considered an error condition.  */
if (size < 64)
packetsize = 64;
Index: hw/unin_pci.c
===
RCS file: /sources/qemu/qemu/hw/unin_pci.c,v
retrieving revision 1.1
diff -u -b -B -u -r1.1 unin_pci.c
--- hw/unin_pci.c13 May 2006 16:11:23 -1.1
+++ hw/unin_pci.c14 May 2006 10:42:55 -
@@ -176,7 +176,7 @@
d->config[0x0E] = 0x00; // header_type
d->config[0x34] = 0x00; // capabilities_pointer

-#if 0 // XXX: not activated as PPC BIOS doesn't handle mutiple buses 
properly
+#if 0 // XXX: not activated as PPC BIOS doesn't handle multiple busses 
properly

/* pci-to-pci bridge */
d = pci_register_device("Uni-north bridge", sizeof(PCIDevice), 0, 
13 << 3,

NULL, NULL);
Index: target-mips/translate.c
===
RCS file: /sources/qemu/qemu/target-mips/translate.c,v
retrieving revision 1.12
diff -u -b -B -u -r1.12 translate.c
--- target-mips/translate.c23 Apr 2006 15:21:24 -1.12
+++ target-mips/translate.c14 May 2006 10:42:56 -
@@ -173,7 +173,7 @@
};

enum {
-/* Mutiply & xxx operations */
+/* Multiply & xxx operations */
OPC_MADD = 0x00 | EXT_SPECIAL2,
OPC_MADDU= 0x01 | EXT_SPECIAL2,
OPC_MUL  = 0x02 | EXT_SPECIAL2,
Index: target-sh4/README.sh4
===
RCS file: /sources/qemu/qemu/target-sh4/README.sh4,v
retrieving revision 1.1
diff -u -b -B -u -r1.1 README.sh4
--- target-sh4/README.sh427 Apr 2006 21:32:09 -1.1
+++ target-sh4/README.sh414 May 2006 10:42:57 -
@@ -113,7 +113,7 @@
Files
-

-File names are harcoded at this time. The bootloader must be stored in
+File names are hardcoded at this time. The bootloader must be stored in
shix_bios.bin in the current directory. The initial Linux image must
be stored in shix_linux_nand.bin in the current directory in NAND
format. Test files can be obtained from



___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel][PATCH]Makefile targets for new documentation formats

2006-05-14 Thread Stefan Weil

The patch enhances the Makefile with new targets
(and ignores these targets and intermediate files for CVS):

make info - create documentation in info format
make dvi  - create documentation in dvi format

It also fixes some minor issues in Makefile:

* Missing config-host.mak still allows calling make,
e.g. for make distclean.

* Added .PHONY for GNU make.

Regards
Stefan

diff -u -b -B -u -r1.13 .cvsignore
--- .cvsignore30 Apr 2006 21:33:34 -1.13
+++ .cvsignore14 May 2006 10:42:47 -
@@ -11,6 +11,8 @@
ppc-user
qemu-doc.html
qemu-tech.html
+qemu-doc.info
+qemu-tech.info
qemu.1
qemu.pod
qemu-img.1
@@ -25,5 +27,16 @@
mipsel-softmmu
mips-user
mipsel-user
+.gdbinit
sh4-user
sh4-softmmu
+*.aux
+*.cp
+*.dvi
+*.fn
+*.ky
+*.log
+*.pg
+*.toc
+*.tp
+*.vr
Index: Makefile
===
RCS file: /sources/qemu/qemu/Makefile,v
retrieving revision 1.101
diff -u -b -B -u -r1.101 Makefile
--- Makefile13 May 2006 16:54:03 -1.101
+++ Makefile14 May 2006 10:42:47 -
@@ -1,4 +1,8 @@
-include config-host.mak
+# Makefile for QEMU.
+
+-include config-host.mak
+
+.PHONY:all clean distclean dvi info install install-doc tar tarbin 
speed test test2


CFLAGS=-Wall -O2 -g -fno-strict-aliasing -I.
ifdef CONFIG_DARWIN
@@ -41,6 +45,8 @@

distclean: clean
   rm -f config-host.mak config-host.h $(DOCS)
+rm -f qemu-doc.{aux,cp,dvi,fn,info,ky,log,pg,toc,tp,vr}
+rm -f qemu-tech.{aux,cp,dvi,fn,info,ky,log,pg,toc,tp,vr}
   for d in $(TARGET_DIRS); do \
   rm -rf $$d || exit 1 ; \
   done
@@ -97,6 +103,10 @@
%.dvi: %.texi
   texi2dvi $<

+info:qemu-doc.info qemu-tech.info
+
+dvi:qemu-doc.dvi qemu-tech.dvi
+
qemu.1: qemu-doc.texi
   $(SRC_PATH)/texi2pod.pl $< qemu.pod
   pod2man --section=1 --center=" " --release=" " qemu.pod > $@




___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


[Qemu-devel][PATCH]Get machine name from name of executable

2006-05-14 Thread Stefan Weil

Today, QEMU allows machine selection using command line option -M.
Without this option, it will always take the first machine
for the given target architecture.

With my patch, QEMU first parses the name of the executable.
The string after the last '-' is interpreted as machine name.
If this machine does not exist, the first machine is taken,
so the new QEMU remains compatible with the old behaviour.

With this patch, an installation might link e.g. qemu-system-arm
to qemu-system-arm-integratorcp926, and running 
qemu-system-arm-integratorcp926

will automatically select machine integratorcp926.

My goal is a MIPS emulation which supports big and little endian mode
in the same executable (like the real hardware). qemu-system-mipsel
would be a symbolic link to qemu-system-mips and enable little endian mode.

I propose another code modification: instead of registration of all machines
in vl.c, vl.c might call a target procedure which does this registration.
So if MIPS, ARM or other targets add machines, vl.c would not change.
Example: vl.c calls qemu_register_mips_machines() which calls
qemu_register_machine(&mips_machine).

Regards,
Stefan


--- vl.c3 May 2006 22:02:44 -1.185
+++ vl.c12 May 2006 20:19:15 -
@@ -4252,7 +4254,7 @@
return 0;
}

-QEMUMachine *find_machine(const char *name)
+static QEMUMachine *find_machine(const char *name)
{
QEMUMachine *m;

@@ -5075,7 +5077,14 @@
mallopt(M_MMAP_THRESHOLD, 4096 * 1024);
#endif
register_machines();
+machine = 0;
+optarg = strrchr(argv[0], '-');
+if (optarg != 0) {
+machine = find_machine(optarg + 1);
+}
+if (!machine) {
machine = first_machine;
+}
initrd_filename = NULL;
for(i = 0; i < MAX_FD; i++)
fd_filename[i] = NULL;



___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel


Re: [Qemu-devel] Qemu

2006-05-14 Thread Kevin F. Quinn
On Sat, 13 May 2006 20:08:47 -0500
"wayne tempel" <[EMAIL PROTECTED]> wrote:

> I have versions 0.7.2 and 0.8.1
> installed on my computer. It was working just fine, but now it's not.
> Do I need to uninstall the 0.7.2 version? It keeps telling me Qemu
> acceleration layer is not activated.

If you've updated your kernel since installing Qemu, you'll need to
re-install the kernel module. Check whether

  /lib/modules/`uname -r`/misc/kqemu.ko

exists and is loaded before you run Qemu:

  lsmod | grep kqemu

should show it loaded. I'd remove 0.7.2 if you're successfully using
0.8.1.

-- 
Kevin F. Quinn


signature.asc
Description: PGP signature
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel