[Qemu-devel] [PATCH] ds1225y nvram: Fix some bugs [v2]
Attached files fixes some problems with nvram emulation:
- whole nvram was erased in some conditions
- fix out of range accesses
- improve reading speed by keeping contents in memory
Changelog v1 to v2
- rename capacity to chip_size
- write nvram contents during initialization only the first time
Thanks Aurelien for your comments.
Hervé
Index: hw/ds1225y.c
===
RCS file: /sources/qemu/qemu/hw/ds1225y.c,v
retrieving revision 1.4
diff -u -r1.4 hw/ds1225y.c
--- hw/ds1225y.c13 Mar 2008 01:19:15 - 1.4
+++ hw/ds1225y.c13 Mar 2008 07:41:15 -
@@ -1,8 +1,8 @@
/*
* QEMU NVRAM emulation for DS1225Y chip
- *
- * Copyright (c) 2007 Hervé Poussineau
- *
+ *
+ * Copyright (c) 2007-2008 Hervé Poussineau
+ *
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the Software), to
deal
* in the Software without restriction, including without limitation the rights
@@ -26,98 +26,169 @@
#include mips.h
#include nvram.h
-typedef enum
-{
-none = 0,
-readmode,
-writemode,
-} nvram_open_mode;
+//#define DEBUG_NVRAM
-struct ds1225y_t
+typedef struct ds1225y_t
{
target_phys_addr_t mem_base;
-uint32_t capacity;
-const char *filename;
+uint32_t chip_size;
QEMUFile *file;
-nvram_open_mode open_mode;
-};
+uint8_t *contents;
+uint8_t protection;
+} ds1225y_t;
-static int ds1225y_set_to_mode(ds1225y_t *NVRAM, nvram_open_mode mode, const
char *filemode)
-{
-if (NVRAM-open_mode != mode)
-{
-if (NVRAM-file)
-qemu_fclose(NVRAM-file);
-NVRAM-file = qemu_fopen(NVRAM-filename, filemode);
-NVRAM-open_mode = mode;
-}
-return (NVRAM-file != NULL);
-}
static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)
{
-ds1225y_t *NVRAM = opaque;
+ds1225y_t *s = opaque;
int64_t pos;
+uint32_t val;
+
+pos = addr - s-mem_base;
+if (pos = s-chip_size)
+pos -= s-chip_size;
+
+val = s-contents[pos];
+
+#ifdef DEBUG_NVRAM
+printf(nvram: read 0x%x at TARGET_FMT_lx \n, val, addr);
+#endif
+return val;
+}
-pos = addr - NVRAM-mem_base;
-if (addr = NVRAM-capacity)
-addr -= NVRAM-capacity;
+static uint32_t nvram_readw (void *opaque, target_phys_addr_t addr)
+{
+uint32_t v;
+v = nvram_readb(opaque, addr);
+v |= nvram_readb(opaque, addr + 1) 8;
+return v;
+}
-if (!ds1225y_set_to_mode(NVRAM, readmode, rb))
-return 0;
-qemu_fseek(NVRAM-file, pos, SEEK_SET);
-return (uint32_t)qemu_get_byte(NVRAM-file);
+static uint32_t nvram_readl (void *opaque, target_phys_addr_t addr)
+{
+uint32_t v;
+v = nvram_readb(opaque, addr);
+v |= nvram_readb(opaque, addr + 1) 8;
+v |= nvram_readb(opaque, addr + 2) 16;
+v |= nvram_readb(opaque, addr + 3) 24;
+return v;
}
-static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t
value)
+static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t val)
{
-ds1225y_t *NVRAM = opaque;
+ds1225y_t *s = opaque;
int64_t pos;
-pos = addr - NVRAM-mem_base;
-if (ds1225y_set_to_mode(NVRAM, writemode, wb))
-{
-qemu_fseek(NVRAM-file, pos, SEEK_SET);
-qemu_put_byte(NVRAM-file, (int)value);
+#ifdef DEBUG_NVRAM
+printf(nvram: write 0x%x at TARGET_FMT_lx \n, val, addr);
+#endif
+
+pos = addr - s-mem_base;
+s-contents[pos] = val 0xff;
+if (s-file) {
+qemu_fseek(s-file, pos, SEEK_SET);
+qemu_put_byte(s-file, (int)val);
+qemu_fflush(s-file);
+}
+}
+
+static void nvram_writew (void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+nvram_writeb(opaque, addr, val 0xff);
+nvram_writeb(opaque, addr + 1, (val 8) 0xff);
+}
+
+static void nvram_writel (void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+nvram_writeb(opaque, addr, val 0xff);
+nvram_writeb(opaque, addr + 1, (val 8) 0xff);
+nvram_writeb(opaque, addr + 2, (val 16) 0xff);
+nvram_writeb(opaque, addr + 3, (val 24) 0xff);
+}
+
+static void nvram_writeb_protected (void *opaque, target_phys_addr_t addr,
uint32_t val)
+{
+ds1225y_t *s = opaque;
+
+if (s-protection != 7) {
+#ifdef DEBUG_NVRAM
+printf(nvram: prevent write of 0x%x at TARGET_FMT_lx \n, val, addr);
+#endif
+return;
}
+
+nvram_writeb(opaque, addr - s-chip_size, val);
+}
+
+static void nvram_writew_protected (void *opaque, target_phys_addr_t addr,
uint32_t val)
+{
+nvram_writeb_protected(opaque, addr, val 0xff);
+nvram_writeb_protected(opaque, addr + 1, (val 8) 0xff);
+}
+
+static void nvram_writel_protected (void *opaque, target_phys_addr_t addr,
uint32_t val)
+{
+nvram_writeb_protected(opaque, addr, val 0xff);
+nvram_writeb_protected(opaque, addr + 1, (val 8) 0xff);
+nvram_writeb_protected(opaque, addr + 2,
[Qemu-devel] [PATCH] Fix floppy controller issues v4
Hi,
Attached patch fixes some issues in the floppy disk controller:
- Enhance reset support (external and software)
- Use MAX_FD constant when possible
- Support up to 4 drives if MAX_FD is set to 4
- Fix DOR register, which should be writable at any time
- Let MSR return 0x20 when non-DMA transfer is happening
- Don't assume caller wants to read whole track at once
- Add seek to next sector when in non-DMA mode
- Fix non-DMA write, which was stopping after only 1 byte
- Better handling of status0/status1/status2
- Fix floppy drive in BeOS (FD_CMD_READ_SECTOR/FD_CMD_WRITE_SECTOR)
- Remove sun4m quirk on DOR and IRQ handling
Credits to Stuart Brady to help me to debug some issues...
Changelog v1 to v2:
- Fix non-DMA write, which was stopping after only 1 byte
Changelog v2 to v3:
- Update to current CVS
Changelog v3 to v4:
- Store state in floppy registers instead of another variables
- Better handling of status0/status1/status2
- Fix floppy drive in BeOS (FD_CMD_READ_SECTOR/FD_CMD_WRITE_SECTOR)
- Remove sun4m quirk on DOR and IRQ handling
To Blue Swirl, floppy disk is now read (I can see FD_CMD_READ commands),
but filesystem is still not recognized.
It seems that it tries 3 differents reads, 4 times. Maybe to try to
recognize 3 filesystems?
Hervé
Index: hw/fdc.c
===
RCS file: /sources/qemu/qemu/hw/fdc.c,v
retrieving revision 1.38
diff -u -r1.38 hw/fdc.c
--- hw/fdc.c29 Feb 2008 19:24:00 - 1.38
+++ hw/fdc.c13 Mar 2008 09:13:19 -
@@ -2,6 +2,7 @@
* QEMU Floppy disk emulator (Intel 82078)
*
* Copyright (c) 2003, 2007 Jocelyn Mayer
+ * Copyright (c) 2008 Hervé Poussineau
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the Software), to
deal
@@ -21,10 +22,7 @@
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
-/*
- * The controller is used in Sun4m systems in a slightly different
- * way. There are changes in DOR register and DMA is not available.
- */
+
#include hw.h
#include fdc.h
#include block.h
@@ -48,6 +46,8 @@
//
/* Floppy drive emulation */
+#define SELECT_FD(fdctrl, drive) ((fdctrl)-dor = ((fdctrl)-dor
~FD_DOR_SELMASK) | ((drive) FD_DOR_SELMASK))
+
/* Will always be a fixed parameter for us */
#define FD_SECTOR_LEN 512
#define FD_SECTOR_SC 2 /* Sector size code */
@@ -68,10 +68,6 @@
FDRIVE_DRV_NONE = 0x03, /* No drive connected */
} fdrive_type_t;
-typedef enum fdrive_flags_t {
-FDRIVE_MOTOR_ON = 0x01, /* motor on/off */
-} fdrive_flags_t;
-
typedef enum fdisk_flags_t {
FDISK_DBL_SIDES = 0x01,
} fdisk_flags_t;
@@ -80,7 +76,6 @@
BlockDriverState *bs;
/* Drive status */
fdrive_type_t drive;
-fdrive_flags_t drflags;
uint8_t perpendicular;/* 2.88 MB access mode*/
/* Position */
uint8_t head;
@@ -102,7 +97,6 @@
/* Drive */
drv-bs = bs;
drv-drive = FDRIVE_DRV_NONE;
-drv-drflags = 0;
drv-perpendicular = 0;
/* Disk */
drv-last_sect = 0;
@@ -121,6 +115,13 @@
return _fd_sector(drv-head, drv-track, drv-sect, drv-last_sect);
}
+/* Seek to a new position:
+ * returns 0 if already on right track
+ * returns 1 if track changed
+ * returns 2 if track is invalid
+ * returns 3 if sector is invalid
+ * returns 4 if seek is disabled
+ */
static int fd_seek (fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
int enable_seek)
{
@@ -144,14 +145,16 @@
}
sector = _fd_sector(head, track, sect, drv-last_sect);
ret = 0;
-if (sector != fd_sector(drv)) {
#if 0
-if (!enable_seek) {
-FLOPPY_ERROR(no implicit seek %d %02x %02x (max=%d %02x %02x)\n,
- head, track, sect, 1, drv-max_track, drv-last_sect);
-return 4;
-}
+if (!enable_seek (head != drv-head || track != drv-track)) {
+FLOPPY_ERROR(no implicit seek %d %02x %02x (current=%d %02x %02x,
max=%d %02x %02x)\n,
+ head, track, sect,
+ drv-head, drv-track, drv-sect,
+ 1, drv-max_track, drv-last_sect);
+return 4;
+}
#endif
+if (sector != fd_sector(drv)) {
drv-head = head;
if (drv-track != track)
ret = 1;
@@ -295,24 +298,6 @@
}
}
-/* Motor control */
-static void fd_start (fdrive_t *drv)
-{
-drv-drflags |= FDRIVE_MOTOR_ON;
-}
-
-static void fd_stop (fdrive_t *drv)
-{
-drv-drflags = ~FDRIVE_MOTOR_ON;
-}
-
-/* Re-initialise a drives (motor off, repositioned) */
-static void fd_reset (fdrive_t *drv)
-{
-fd_stop(drv);
-fd_recalibrate(drv);
-}
-
//
/* Intel 82078 floppy disk controller emulation */
@@ -320,7
[Qemu-devel] [PATCH] ds1225y nvram: Fix some bugs [v3]
Hi,
Attached files fixes some problems with nvram emulation:
- whole nvram was erased in some conditions
- fix out of range accesses
- improve reading speed by keeping contents in memory
Changelog v1 to v2
- rename capacity to chip_size
- write nvram contents during initialization only the first time
Changelog v2 to v3
- write nvram contents at each initialization, because 'wb' mode
cleans the file
Thanks Aurelien for your comments.
Hervé
Index: hw/ds1225y.c
===
RCS file: /sources/qemu/qemu/hw/ds1225y.c,v
retrieving revision 1.4
diff -u -r1.4 hw/ds1225y.c
--- hw/ds1225y.c13 Mar 2008 01:19:15 - 1.4
+++ hw/ds1225y.c13 Mar 2008 07:41:15 -
@@ -1,8 +1,8 @@
/*
* QEMU NVRAM emulation for DS1225Y chip
- *
- * Copyright (c) 2007 Hervé Poussineau
- *
+ *
+ * Copyright (c) 2007-2008 Hervé Poussineau
+ *
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the Software), to
deal
* in the Software without restriction, including without limitation the rights
@@ -26,98 +26,169 @@
#include mips.h
#include nvram.h
-typedef enum
-{
-none = 0,
-readmode,
-writemode,
-} nvram_open_mode;
+//#define DEBUG_NVRAM
-struct ds1225y_t
+typedef struct ds1225y_t
{
target_phys_addr_t mem_base;
-uint32_t capacity;
-const char *filename;
+uint32_t chip_size;
QEMUFile *file;
-nvram_open_mode open_mode;
-};
+uint8_t *contents;
+uint8_t protection;
+} ds1225y_t;
-static int ds1225y_set_to_mode(ds1225y_t *NVRAM, nvram_open_mode mode, const
char *filemode)
-{
-if (NVRAM-open_mode != mode)
-{
-if (NVRAM-file)
-qemu_fclose(NVRAM-file);
-NVRAM-file = qemu_fopen(NVRAM-filename, filemode);
-NVRAM-open_mode = mode;
-}
-return (NVRAM-file != NULL);
-}
static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)
{
-ds1225y_t *NVRAM = opaque;
+ds1225y_t *s = opaque;
int64_t pos;
+uint32_t val;
+
+pos = addr - s-mem_base;
+if (pos = s-chip_size)
+pos -= s-chip_size;
+
+val = s-contents[pos];
+
+#ifdef DEBUG_NVRAM
+printf(nvram: read 0x%x at TARGET_FMT_lx \n, val, addr);
+#endif
+return val;
+}
-pos = addr - NVRAM-mem_base;
-if (addr = NVRAM-capacity)
-addr -= NVRAM-capacity;
+static uint32_t nvram_readw (void *opaque, target_phys_addr_t addr)
+{
+uint32_t v;
+v = nvram_readb(opaque, addr);
+v |= nvram_readb(opaque, addr + 1) 8;
+return v;
+}
-if (!ds1225y_set_to_mode(NVRAM, readmode, rb))
-return 0;
-qemu_fseek(NVRAM-file, pos, SEEK_SET);
-return (uint32_t)qemu_get_byte(NVRAM-file);
+static uint32_t nvram_readl (void *opaque, target_phys_addr_t addr)
+{
+uint32_t v;
+v = nvram_readb(opaque, addr);
+v |= nvram_readb(opaque, addr + 1) 8;
+v |= nvram_readb(opaque, addr + 2) 16;
+v |= nvram_readb(opaque, addr + 3) 24;
+return v;
}
-static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t
value)
+static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t val)
{
-ds1225y_t *NVRAM = opaque;
+ds1225y_t *s = opaque;
int64_t pos;
-pos = addr - NVRAM-mem_base;
-if (ds1225y_set_to_mode(NVRAM, writemode, wb))
-{
-qemu_fseek(NVRAM-file, pos, SEEK_SET);
-qemu_put_byte(NVRAM-file, (int)value);
+#ifdef DEBUG_NVRAM
+printf(nvram: write 0x%x at TARGET_FMT_lx \n, val, addr);
+#endif
+
+pos = addr - s-mem_base;
+s-contents[pos] = val 0xff;
+if (s-file) {
+qemu_fseek(s-file, pos, SEEK_SET);
+qemu_put_byte(s-file, (int)val);
+qemu_fflush(s-file);
+}
+}
+
+static void nvram_writew (void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+nvram_writeb(opaque, addr, val 0xff);
+nvram_writeb(opaque, addr + 1, (val 8) 0xff);
+}
+
+static void nvram_writel (void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+nvram_writeb(opaque, addr, val 0xff);
+nvram_writeb(opaque, addr + 1, (val 8) 0xff);
+nvram_writeb(opaque, addr + 2, (val 16) 0xff);
+nvram_writeb(opaque, addr + 3, (val 24) 0xff);
+}
+
+static void nvram_writeb_protected (void *opaque, target_phys_addr_t addr,
uint32_t val)
+{
+ds1225y_t *s = opaque;
+
+if (s-protection != 7) {
+#ifdef DEBUG_NVRAM
+printf(nvram: prevent write of 0x%x at TARGET_FMT_lx \n, val, addr);
+#endif
+return;
}
+
+nvram_writeb(opaque, addr - s-chip_size, val);
+}
+
+static void nvram_writew_protected (void *opaque, target_phys_addr_t addr,
uint32_t val)
+{
+nvram_writeb_protected(opaque, addr, val 0xff);
+nvram_writeb_protected(opaque, addr + 1, (val 8) 0xff);
+}
+
+static void nvram_writel_protected (void *opaque, target_phys_addr_t addr,
uint32_t val)
+{
+nvram_writeb_protected(opaque, addr, val 0xff);
+
[Qemu-devel] Re: [PATCH] CFI: Fix AMD erase support
No review?
On 16:57 Sun 24 Feb , Jean-Christophe PLAGNIOL-VILLARD wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD [EMAIL PROTECTED]
diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index b3a8a8e..c360179 100644
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -275,7 +275,7 @@ static void pflash_write (pflash_t *pfl, target_ulong
offset, uint32_t value,
if (cmd == 0xd0) { /* confirm */
pfl-wcycle = 1;
pfl-status |= 0x80;
-} if (cmd == 0xff) { /* read array mode */
+} else if (cmd == 0xff) { /* read array mode */
goto reset_flash;
} else
goto error_flash;
--
1.5.4
[Qemu-devel] qemu/hw e1000.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Aurelien Jarno aurel3208/03/13 19:18:27 Modified files: hw : e1000.c Log message: e1000: fix endianness issues This patch fixes endianness issues in the e1000 nic emulation, which currently only works on little endian hosts with little endian targets. Byte swapping does not depend on host endianness, so this patch remove the use of cpu_to_le32 and le32_to_cpu functions. It depends on the path from the CPU to the device, which is currently and *wrongly* implemented in Qemu as a byteswap on big endian targets. This patch does the same as in other devices emulation as all the currently implemented targets work with this implementation. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/hw/e1000.c?cvsroot=qemur1=1.4r2=1.5
[Qemu-devel] qemu cpu-all.h target-ppc/op.c target-ppc/op_he...
CVSROOT:/sources/qemu Module name:qemu Changes by: Aurelien Jarno aurel3208/03/13 19:19:16 Modified files: . : cpu-all.h target-ppc : op.c op_helper.c op_helper.h op_helper_mem.h op_mem.h Log message: Use float32/64 instead of float/double The patch below uses the float32 and float64 types instead of the float and double types in the PPC code. This doesn't change anything when using softfloat-native as the types are the same, but that helps compiling the PPC target with softfloat. It also defines a new union CPU_FloatU in addition to CPU_DoubleU, and use them instead of identical unions that are defined in numerous places. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/cpu-all.h?cvsroot=qemur1=1.84r2=1.85 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op.c?cvsroot=qemur1=1.69r2=1.70 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemur1=1.74r2=1.75 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.h?cvsroot=qemur1=1.30r2=1.31 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper_mem.h?cvsroot=qemur1=1.16r2=1.17 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_mem.h?cvsroot=qemur1=1.27r2=1.28
[Qemu-devel] qemu/target-ppc op_helper.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Aurelien Jarno aurel3208/03/13 19:20:00 Modified files: target-ppc : op_helper.c Log message: Math functions helper for CONFIG_SOFTFLOAT=yes The patch below adds isfinite() and isnormal() functions which can work with float64 type, used when CONFIG_SOFTFLOAT=yes. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemur1=1.75r2=1.76
[Qemu-devel] qemu sdl.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Aurelien Jarno aurel3208/03/13 19:20:19 Modified files: . : sdl.c Log message: SDL mouse events smoothness (Samuel Thibault) CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/sdl.c?cvsroot=qemur1=1.46r2=1.47
[Qemu-devel] qemu console.h sdl.c vl.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Aurelien Jarno aurel3208/03/13 19:20:33 Modified files: . : console.h sdl.c vl.c Log message: Slowdown SDL while minimized When SDL is invisible/minimized, there is no need to keep calling the VGA refresh 33 times per second. This patch reduces in that case the rate to 2 times per second, which should be responsive enough for the un-minimizing event. (Samuel Thibault) CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/console.h?cvsroot=qemur1=1.2r2=1.3 http://cvs.savannah.gnu.org/viewcvs/qemu/sdl.c?cvsroot=qemur1=1.47r2=1.48 http://cvs.savannah.gnu.org/viewcvs/qemu/vl.c?cvsroot=qemur1=1.410r2=1.411
[Qemu-devel] qemu/hw ds1225y.c mips.h
CVSROOT:/sources/qemu Module name:qemu Changes by: Aurelien Jarno aurel3208/03/13 19:23:00 Modified files: hw : ds1225y.c mips.h Log message: ds1225y nvram: Fix some bugs - whole nvram was erased in some conditions - fix out of range accesses - improve reading speed by keeping contents in memory - rename capacity to chip_size (Hervé Poussineau) CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/hw/ds1225y.c?cvsroot=qemur1=1.4r2=1.5 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/mips.h?cvsroot=qemur1=1.1r2=1.2
Re: [Qemu-devel] [PATCH] fix SDL mouse events processing
On Wed, Mar 05, 2008 at 01:54:53PM +, Samuel Thibault wrote: Here is a revamped patch: This fixes SDL mouse events processing: - GetRelativeMouseState() always returns the last position, so when the polling loop gets several mouse events in one go, we would send useless 'no move' events, let's avoid that. - So as to make sure we don't miss any mouse click / double click, we should not use GetRelativeMouseState() to get the button state, but rather keep records of the button state ourselves (I've requested SDL developers to provide it directly in the event in SDL 1.3). - bev-state doesn't contain the button state but whether the event is a press or a release. Use bev-button instead. This patch does not apply anymore. Could you please to redo it against the current CVS? -- .''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' [EMAIL PROTECTED] | [EMAIL PROTECTED] `-people.debian.org/~aurel32 | www.aurel32.net
[Qemu-devel] CVS build error
Pulling todays CVS (including Aurelien Jaron's recent commits), I've not been able to build. ./configure --prefix=/usr --enable-ac97 --enable-alsa --disable-vnc-tls --disable-linux-user --disable-gcc-check --target-list=i386-softmmu make [...] gcc -Wall -O2 -g -fno-strict-aliasing -fno-reorder-blocks -fno-gcse -fno-tree-ch -fno-optimize-sibling-calls -fno-crossjumping -fno-align-labels -fno-align-jumps -fno-align-functions -mpreferred-stack-boundary=2 -fomit-frame-pointer -m32 -I. -I.. -I/root/qemu/target-i386 -I/root/qemu -MMD -MP -DNEED_CPU_H -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -I/root/qemu/tcg -I/root/qemu/tcg/i386 -I/root/qemu/fpu -DHAS_AUDIO -DHAS_AUDIO_CHOICE -I/root/qemu/slirp -c -o op.o /root/qemu/target-i386/op.c /root/qemu/target-i386/ops_template_mem.h: In function 'op_cmpxchgb_kernel_T0_T1_EAX_cc': ../softmmu_header.h:170: error: can't find a register in class 'Q_REGS' while reloading 'asm' make[1]: *** [op.o] Error 1 make[1]: Leaving directory `/root/qemu/i386-softmmu' make: *** [subdir-i386-softmmu] Error 2 gcc --version gcc (GCC) 4.1.2 (Gentoo 4.1.2 p1.0.2) system is 32-bit i686 Is this on my end, or just the current state of things? thanks -Rick
[Qemu-devel] qemu/target-sparc cpu.h op.c translate.c
CVSROOT:/cvsroot/qemu Module name:qemu Changes by: Blue Swirl blueswir1 08/03/13 20:45:31 Modified files: target-sparc : cpu.h op.c translate.c Log message: Convert condition code changing versions of add, sub, logic, and div to TCG CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-sparc/cpu.h?cvsroot=qemur1=1.66r2=1.67 http://cvs.savannah.gnu.org/viewcvs/qemu/target-sparc/op.c?cvsroot=qemur1=1.56r2=1.57 http://cvs.savannah.gnu.org/viewcvs/qemu/target-sparc/translate.c?cvsroot=qemur1=1.101r2=1.102
[Qemu-devel] qemu/tcg tcg-op.h
CVSROOT:/cvsroot/qemu Module name:qemu Changes by: Blue Swirl blueswir1 08/03/13 20:46:42 Modified files: tcg: tcg-op.h Log message: Add tcg_const_tl CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/tcg/tcg-op.h?cvsroot=qemur1=1.8r2=1.9
Re: [Qemu-devel] CVS build error
gcc (GCC) 4.1.2 (Gentoo 4.1.2 p1.0.2) Which part of gcc 4.x is not supported didn't you understand? Paul
[Qemu-devel] qemu/target-sparc translate.c
CVSROOT:/cvsroot/qemu Module name:qemu Changes by: Blue Swirl blueswir1 08/03/13 20:47:53 Modified files: target-sparc : translate.c Log message: Use tcg_const_tl for zero constant CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-sparc/translate.c?cvsroot=qemur1=1.102r2=1.103
Re: [Qemu-devel] CVS build error
On Thu, Mar 13, 2008 at 4:47 PM, Paul Brook [EMAIL PROTECTED] wrote: gcc (GCC) 4.1.2 (Gentoo 4.1.2 p1.0.2) Which part of gcc 4.x is not supported didn't you understand? Paul Apparently, we should make configure fail horribly if gcc4 is found even if disable-gcc-check is enabled.
Re: [Qemu-devel] CVS build error
Hi, On Thu, 13 Mar 2008, Ben Taylor wrote: On Thu, Mar 13, 2008 at 4:47 PM, Paul Brook [EMAIL PROTECTED] wrote: gcc (GCC) 4.1.2 (Gentoo 4.1.2 p1.0.2) Which part of gcc 4.x is not supported didn't you understand? Apparently, we should make configure fail horribly if gcc4 is found even if disable-gcc-check is enabled. No, we should educate people so we do not have to clutter our source code with unnecessary messages. I mean, it says what it should say, really. Really. Hth, Dscho
Re: [Qemu-devel] CVS build error
On Thursday 13 March 2008 04:27:29 pm Ben Taylor wrote: On Thu, Mar 13, 2008 at 4:47 PM, Paul Brook [EMAIL PROTECTED] wrote: gcc (GCC) 4.1.2 (Gentoo 4.1.2 p1.0.2) Which part of gcc 4.x is not supported didn't you understand? Paul Apparently, we should make configure fail horribly if gcc4 is found even if disable-gcc-check is enabled. It's quite interesting - the arrogant and presumptuous assertions that are made. On a different system (x86_64) - my everyday-use laptop, actually - I have only gcc 4.1.2. If you're familiar with Gentoo, you'll know what this means: gcc-config -l [1] x86_64-pc-linux-gnu-4.1.2 * On this laptop, I run qemu cvs, configured as such: ./configure --prefix=/usr --enable-ac97 --enable-alsa --disable-vnc-tls --disable-linux-user --disable-gcc-check --target-list=x86_64-softmmu and build with no problems. I run it every single day. in fact, it is running right now. It runs ms and linux guests without problem. Not supported? Okay, fine. But don't tell me it can't work. The fact of the matter is that I use it daily. Make configure fail horribly? Well, that seems a bit counter-productive, don't you think?
Re: [Qemu-devel] CVS build error
Hi, On Thu, 13 Mar 2008, Rick Vernam wrote: [gcc4] Not supported? Okay, fine. But don't tell me it can't work. The fact of the matter is that I use it daily. Make configure fail horribly? Well, that seems a bit counter-productive, don't you think? If you would only have researched a _little_ bit, you would have found out that x86, by far the most common platform at the moment, which you should have known before stating what you stated, does _not_ work with gcc4. So all you said is just bull. Ciao, Dscho
Re: [Qemu-devel] [PATCH] fix SDL mouse events processing
Aurelien Jarno, le Thu 13 Mar 2008 20:50:51 +0100, a écrit : On Wed, Mar 05, 2008 at 01:54:53PM +, Samuel Thibault wrote: This fixes SDL mouse events processing: - GetRelativeMouseState() always returns the last position, so when the polling loop gets several mouse events in one go, we would send useless 'no move' events, let's avoid that. - So as to make sure we don't miss any mouse click / double click, we should not use GetRelativeMouseState() to get the button state, but rather keep records of the button state ourselves (I've requested SDL developers to provide it directly in the event in SDL 1.3). - bev-state doesn't contain the button state but whether the event is a press or a release. Use bev-button instead. This patch does not apply anymore. Could you please to redo it against the current CVS? Mmm, well, it actually is conflicting with the mouse smoothness patch: the question is: after the 30ms period, if we got several mouse motion events, should we merge them into a single one for the guest, or should we provide all of them (hence making the cursor looking more smooth, but requiring more treatments from the guest)? Samuel
[Qemu-devel] qemu Makefile.target cpu-exec.c translate-all.c...
CVSROOT:/sources/qemu Module name:qemu Changes by: Edgar E. Iglesias edgar_igl 08/03/14 01:04:24 Modified files: . : Makefile.target cpu-exec.c translate-all.c hw : etraxfs.c etraxfs_timer.c etraxfs_ser.c target-cris: helper.c Added files: hw : etraxfs_pic.c Log message: * Add a model of the ETRAX interrupt controller. * Clean up the interrupt handling a bit. * Connect some NOR flash to the test board. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/Makefile.target?cvsroot=qemur1=1.248r2=1.249 http://cvs.savannah.gnu.org/viewcvs/qemu/cpu-exec.c?cvsroot=qemur1=1.133r2=1.134 http://cvs.savannah.gnu.org/viewcvs/qemu/translate-all.c?cvsroot=qemur1=1.27r2=1.28 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/etraxfs.c?cvsroot=qemur1=1.5r2=1.6 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/etraxfs_timer.c?cvsroot=qemur1=1.3r2=1.4 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/etraxfs_ser.c?cvsroot=qemur1=1.3r2=1.4 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/etraxfs_pic.c?cvsroot=qemurev=1.1 http://cvs.savannah.gnu.org/viewcvs/qemu/target-cris/helper.c?cvsroot=qemur1=1.5r2=1.6
[Qemu-devel] qemu/target-cris mmu.c mmu.h cpu.h op.c op_help...
CVSROOT:/sources/qemu Module name:qemu Changes by: Edgar E. Iglesias edgar_igl 08/03/14 01:08:09 Modified files: target-cris: mmu.c mmu.h cpu.h op.c op_helper.c Added files: target-cris: helper.h Log message: Model more parts of the ETRAX mmu (still alot missing). CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-cris/mmu.c?cvsroot=qemur1=1.3r2=1.4 http://cvs.savannah.gnu.org/viewcvs/qemu/target-cris/mmu.h?cvsroot=qemur1=1.2r2=1.3 http://cvs.savannah.gnu.org/viewcvs/qemu/target-cris/cpu.h?cvsroot=qemur1=1.4r2=1.5 http://cvs.savannah.gnu.org/viewcvs/qemu/target-cris/op.c?cvsroot=qemur1=1.6r2=1.7 http://cvs.savannah.gnu.org/viewcvs/qemu/target-cris/op_helper.c?cvsroot=qemur1=1.4r2=1.5 http://cvs.savannah.gnu.org/viewcvs/qemu/target-cris/helper.h?cvsroot=qemurev=1.1
[Qemu-devel] qemu/target-cris translate.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Edgar E. Iglesias edgar_igl 08/03/14 01:11:25 Modified files: target-cris: translate.c Log message: A first small step to convert the CRIS translator to TCG. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-cris/translate.c?cvsroot=qemur1=1.7r2=1.8
[Qemu-devel] qemu/hw etraxfs.c etraxfs_pic.c etraxfs_ser.c e...
CVSROOT:/sources/qemu Module name:qemu Changes by: Edgar E. Iglesias edgar_igl 08/03/14 01:50:49 Modified files: hw : etraxfs.c etraxfs_pic.c etraxfs_ser.c etraxfs_timer.c Log message: Made the etrax timers and serial-ports base address relocatable. Use target_phys_addr_t instead of target_ulong. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/hw/etraxfs.c?cvsroot=qemur1=1.6r2=1.7 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/etraxfs_pic.c?cvsroot=qemur1=1.1r2=1.2 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/etraxfs_ser.c?cvsroot=qemur1=1.4r2=1.5 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/etraxfs_timer.c?cvsroot=qemur1=1.4r2=1.5
