Re: [Qemu-devel] [PATCH] configure: Fix CONFIG_QEMU_HELPERDIR generation
On Sun, Oct 21, 2012 at 10:58:37PM +0400, Michael Tokarev wrote:
On 19.10.2012 23:33, Aurelien Jarno wrote:
On Wed, Oct 17, 2012 at 07:09:25PM +0200, Jan Kiszka wrote:
We need to evaluate $libexecdir in configure, otherwise we literally end
up with ${prefix}/libexec instead of the absolute path as
CONFIG_QEMU_HELPERDIR.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
configure |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/configure b/configure
index 353d788..e3a1780 100755
--- a/configure
+++ b/configure
@@ -3227,7 +3227,7 @@ echo qemu_confdir=$qemu_confdir $config_host_mak
echo qemu_datadir=$qemu_datadir $config_host_mak
echo qemu_docdir=$qemu_docdir $config_host_mak
echo qemu_localstatedir=$local_statedir $config_host_mak
-echo CONFIG_QEMU_HELPERDIR=\$libexecdir\ $config_host_mak
+echo CONFIG_QEMU_HELPERDIR=\`eval echo $libexecdir`\
$config_host_mak
Somehow I missed this patch, and especially missed this
case when testing initial change.
And I think this is a wrong approach too.
This should be defined as qemu_helperdir variable instead of
CONFIG_QEMU_HELPERDIR, just like all other qemu_*dirs around,
and scripts/create_config will take care of it by expanding
the variable and providing CONFIG_QEMU_HELPERDIR #define.
Something like the attached.
This is indeed a better way to fix the issue. I have applied the
attached patch.
Thanks,
/mjt
From 58de50012972699e6bb1362ba39e3326d8f65152 Mon Sep 17 00:00:00 2001
From: Michael Tokarev m...@tls.msk.ru
Date: Sun, 21 Oct 2012 22:52:54 +0400
Subject: [PATCH] fix CONFIG_QEMU_HELPERDIR generation again
commit 38f419f35225 fixed a breakage with CONFIG_QEMU_HELPERDIR
which has been introduced by 8bf188aa18ef7a8. But while techinically
that fix has been correct, all other similar variables are handled
differently. Make it consistent, and let scripts/create_config
expand and capitalize the variable properly like for all other
qemu_*dir variables.
Signed-off-by: Michael Tokarev m...@tls.msk.ru
---
configure |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index 9f33c7d..fa5657f 100755
--- a/configure
+++ b/configure
@@ -3200,7 +3200,7 @@ echo qemu_confdir=$qemu_confdir $config_host_mak
echo qemu_datadir=$qemu_datadir $config_host_mak
echo qemu_docdir=$qemu_docdir $config_host_mak
echo qemu_localstatedir=$local_statedir $config_host_mak
-echo CONFIG_QEMU_HELPERDIR=\`eval echo $libexecdir`\ $config_host_mak
+echo qemu_helperdir=$libexecdir $config_host_mak
echo ARCH=$ARCH $config_host_mak
if test $debug_tcg = yes ; then
--
1.7.10.4
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurel...@aurel32.net http://www.aurel32.net
Re: [Qemu-devel] [PATCH v1 3/7] pflash_cfi0x: QOMified
On Fri, Oct 19, 2012 at 8:24 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 19 October 2012 07:40, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
QOMified the pflash_cfi0x so machine models can connect them up in custom
ways.
Kept the pflash_cfi0x_register functions as is. They can still be used to
create a flash straight onto system memory.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
Thanks -- more QOMification is always nice.
---
hw/pflash_cfi01.c | 142 +
hw/pflash_cfi02.c | 154
-
2 files changed, 224 insertions(+), 72 deletions(-)
diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index ebc8a57..65cd619 100644
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -42,6 +42,7 @@
#include qemu-timer.h
#include exec-memory.h
#include host-utils.h
+#include sysbus.h
#define PFLASH_BUG(fmt, ...) \
do { \
@@ -60,21 +61,37 @@ do { \
#endif
struct pflash_t {
+SysBusDevice busdev;
BlockDriverState *bs;
-target_phys_addr_t sector_len;
-int width;
+uint32_t nb_blocs;
+/* FIXME: get rid of target_phys_addr_t usage */
+union {
+target_phys_addr_t sector_len;
+uint32_t sector_len_u32;
+};
I think we should just fix this not to use target_phys_addr_t.
Option 1:
* declare sector_len as uint64_t
* fix the printf format in the DPRINTFs of it
Done
Option 2:
* declare sector_len as uint32_t
* fix the printf formats
* add casts to ensure 64 bit arithmetic when it is used in these exprs:
offset = ~(pfl-sector_len - 1);
total_len = pfl-sector_len * pfl-nb_blocs;
Option 1 is slightly easier and I don't see any particular disadvantage
in having the sector length be a 64 bit property.
+uint8_t width;
+uint8_t be;
int wcycle; /* if 0, the flash is read normally */
int bypass;
int ro;
uint8_t cmd;
uint8_t status;
-uint16_t ident[4];
+union {
+uint16_t ident[4];
+struct {
+uint16_t ident0;
+uint16_t ident1;
+uint16_t ident2;
+uint16_t ident3;
+};
+};
the ident[] array is only used in one or two places so I would
suggest just fixing those to use ident0..ident3 and dropping
the union.
OK
uint8_t cfi_len;
uint8_t cfi_table[0x52];
target_phys_addr_t counter;
unsigned int writeblock_size;
QEMUTimer *timer;
MemoryRegion mem;
+char *name;
can this take a 'const' qualifier?
No because DEFINE_PROP_STRING expects it to be non-const.
void *storage;
};
@@ -541,19 +558,13 @@ static const MemoryRegionOps pflash_cfi01_ops_le = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-pflash_t *pflash_cfi01_register(target_phys_addr_t base,
-DeviceState *qdev, const char *name,
-target_phys_addr_t size,
-BlockDriverState *bs, uint32_t sector_len,
-int nb_blocs, int width,
-uint16_t id0, uint16_t id1,
-uint16_t id2, uint16_t id3, int be)
+static int pflash_cfi01_init(SysBusDevice *dev)
{
-pflash_t *pfl;
+pflash_t *pfl = FROM_SYSBUS(typeof(*pfl), dev);
target_phys_addr_t total_len;
int ret;
-total_len = sector_len * nb_blocs;
+total_len = pfl-sector_len * pfl-nb_blocs;
/* XXX: to be fixed */
#if 0
@@ -562,27 +573,26 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t
base,
return NULL;
#endif
-pfl = g_malloc0(sizeof(pflash_t));
-
+if (!pfl-name) {
+static int next;
+pfl-name = g_strdup_printf(pflash.cfi01.%d, next++);
+}
Since all the callers do actually pass in a non-NULL name, you could
just say it was mandatory, and avoid this bit of code. That would
save wondering when to free the name...
OK
memory_region_init_rom_device(
-pfl-mem, be ? pflash_cfi01_ops_be : pflash_cfi01_ops_le, pfl,
-name, size);
-vmstate_register_ram(pfl-mem, qdev);
+pfl-mem, pfl-be ? pflash_cfi01_ops_be : pflash_cfi01_ops_le,
pfl,
+pfl-name, total_len);
+vmstate_register_ram(pfl-mem, DEVICE(pfl));
pfl-storage = memory_region_get_ram_ptr(pfl-mem);
-memory_region_add_subregion(get_system_memory(), base, pfl-mem);
+sysbus_init_mmio(dev, pfl-mem);
-pfl-bs = bs;
if (pfl-bs) {
/* read the initial flash content */
ret = bdrv_read(pfl-bs, 0, pfl-storage, total_len 9);
+
if (ret 0) {
-memory_region_del_subregion(get_system_memory(), pfl-mem);
-vmstate_unregister_ram(pfl-mem, qdev);
+vmstate_unregister_ram(pfl-mem, DEVICE(pfl));
Re: [Qemu-devel] [PATCH v1 7/7] nand: Reset addressing after READSTATUS.
On Fri, Oct 19, 2012 at 10:18 PM, Edgar E. Iglesias
edgar.igles...@gmail.com wrote:
On Fri, Oct 19, 2012 at 12:59:49PM +0100, Peter Maydell wrote:
On 19 October 2012 07:40, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
From: Edgar E. Iglesias edgar.igles...@gmail.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@gmail.com
---
hw/nand.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/hw/nand.c b/hw/nand.c
index 01f3ada..f931d0c 100644
--- a/hw/nand.c
+++ b/hw/nand.c
@@ -478,6 +478,12 @@ void nand_setio(DeviceState *dev, uint32_t value)
int i;
NANDFlashState *s = (NANDFlashState *) dev;
if (!s-ce s-cle) {
+if (s-cmd == NAND_CMD_READSTATUS) {
+s-addr = 0;
+s-addrlen = 0;
+s-iolen = 0;
+}
+
I find the NAND chip datasheets remarkably hard to interpret, but
I'm not convinced this patch is the right thing. Can you provide
some rationale/justification, please? (ideally with reference to
datasheets...)
This is patch is quite old (several years). At the time modern linux kernels
stopped working with our nand model in some cases. Some patch to our
nand model broke something. I recall trying to make some sense out of
it and this was the closest I got..
I don't know what the state it is today nor do I remember the exact
circumstances on which the bug was trigged. Maybe Peter C has more
info?
Not really. Im fairly lost as well on the data-sheet front but AFAICT
what actually happens here is an undefined behaviour. Ill have to dig
deeper on my tests to see if its a problem. Could just be a hangover
from an ancient kernel bug and this patch is unneeded.
Regards,
Peter
Cheers,
Edgar
[Qemu-devel] [PATCH v2 0/6] QOMify pflash_cfi0x + PL353 for Xilinx Zynq
This series adds the PL353 to Xilinx Zynq with both NAND and pflashes attached. Had to QOMify the pflash_cfi0x devices to get them working with PL35x in the least hackish way. Regression tested pflash_cfi_01 using petalogix-ml605 and pflash_cfi_02 tested using zynq. Further testing by clients of the pflash would be appreciated. The pl35x is setup as a generalisation of all the pl35x family (i.e. it implements all of PL351-pl354). Once we get to actually implementing some of the register ops of this SRAM interface we could add this to vexpress for its PL354. The PL35x is incomplete (see the FIXME:s) at the moment but im pushing for this now as the more conterversial QOM-entangled aspects of this device model are encapsulated by this series. The device does also fully work for Linux. Changlog: Changed from v1: Address PMM and Paolos Reviews (P3). Fixed a compile error in in pflash when debug was turned on (P6) Removed NAND READ_STATUS address reset patch (fomerly P6) Peter Crosthwaite (6): pflash_cfi0x: remove unused base field pflash_cfi01: remove unused total_len field pflash_cfi0x: QOMified hw: Model of Primecell pl35x mem controller xilinx_zynq: add pl353 pflash_cfi01: Fix debug mode printfery default-configs/arm-softmmu.mak |1 + hw/Makefile.objs|1 + hw/pflash_cfi01.c | 149 ++-- hw/pflash_cfi02.c | 162 +++-- hw/pl35x.c | 299 +++ hw/xilinx_zynq.c| 50 ++- 6 files changed, 560 insertions(+), 102 deletions(-) create mode 100644 hw/pl35x.c
[Qemu-devel] [PATCH v2 1/6] pflash_cfi0x: remove unused base field
This field is completely unused. The base address should also be abstracted
away from the device anyway. Removed.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
---
hw/pflash_cfi01.c |2 --
hw/pflash_cfi02.c |4 +---
2 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index 3b437da..4f3f5f0 100644
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -61,7 +61,6 @@ do { \
struct pflash_t {
BlockDriverState *bs;
-target_phys_addr_t base;
target_phys_addr_t sector_len;
target_phys_addr_t total_len;
int width;
@@ -594,7 +593,6 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base,
}
pfl-timer = qemu_new_timer_ns(vm_clock, pflash_timer, pfl);
-pfl-base = base;
pfl-sector_len = sector_len;
pfl-total_len = total_len;
pfl-width = width;
diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c
index 39337ec..43fb3a4 100644
--- a/hw/pflash_cfi02.c
+++ b/hw/pflash_cfi02.c
@@ -56,7 +56,6 @@ do { \
struct pflash_t {
BlockDriverState *bs;
-target_phys_addr_t base;
uint32_t sector_len;
uint32_t chip_len;
int mappings;
@@ -602,7 +601,6 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base,
name, size);
vmstate_register_ram(pfl-orig_mem, qdev);
pfl-storage = memory_region_get_ram_ptr(pfl-orig_mem);
-pfl-base = base;
pfl-chip_len = chip_len;
pfl-mappings = nb_mappings;
pfl-bs = bs;
@@ -618,7 +616,7 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base,
pflash_setup_mappings(pfl);
pfl-rom_mode = 1;
-memory_region_add_subregion(get_system_memory(), pfl-base, pfl-mem);
+memory_region_add_subregion(get_system_memory(), base, pfl-mem);
if (pfl-bs) {
pfl-ro = bdrv_is_read_only(pfl-bs);
--
1.7.0.4
[Qemu-devel] [PATCH v2 3/6] pflash_cfi0x: QOMified
QOMified the pflash_cfi0x so machine models can connect them up in custom ways.
Kept the pflash_cfi0x_register functions as is. They can still be used to
create a flash straight onto system memory.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
changed from v1:
Removed union usages (PMM review)
Changed target_phys_addr type for sector_len to uint64 (Pao + PMM review)
Made property names nicer (Pao + PMM review)
Set name strings properly
hw/pflash_cfi01.c | 142 +--
hw/pflash_cfi02.c | 160 +---
2 files changed, 215 insertions(+), 87 deletions(-)
diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index ebc8a57..6164a97 100644
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -42,6 +42,7 @@
#include qemu-timer.h
#include exec-memory.h
#include host-utils.h
+#include sysbus.h
#define PFLASH_BUG(fmt, ...) \
do { \
@@ -60,21 +61,29 @@ do { \
#endif
struct pflash_t {
+SysBusDevice busdev;
BlockDriverState *bs;
-target_phys_addr_t sector_len;
-int width;
+uint32_t nb_blocs;
+/* FIXME: get rid of target_phys_addr_t usage */
+uint64_t sector_len;
+uint8_t width;
+uint8_t be;
int wcycle; /* if 0, the flash is read normally */
int bypass;
int ro;
uint8_t cmd;
uint8_t status;
-uint16_t ident[4];
+uint16_t ident0;
+uint16_t ident1;
+uint16_t ident2;
+uint16_t ident3;
uint8_t cfi_len;
uint8_t cfi_table[0x52];
target_phys_addr_t counter;
unsigned int writeblock_size;
QEMUTimer *timer;
MemoryRegion mem;
+char *name;
void *storage;
};
@@ -166,11 +175,11 @@ static uint32_t pflash_read (pflash_t *pfl,
target_phys_addr_t offset,
case 0x90:
switch (boff) {
case 0:
-ret = pfl-ident[0] 8 | pfl-ident[1];
+ret = pfl-ident0 8 | pfl-ident1;
DPRINTF(%s: Manufacturer Code %04x\n, __func__, ret);
break;
case 1:
-ret = pfl-ident[2] 8 | pfl-ident[3];
+ret = pfl-ident2 8 | pfl-ident3;
DPRINTF(%s: Device ID Code %04x\n, __func__, ret);
break;
default:
@@ -277,9 +286,8 @@ static void pflash_write(pflash_t *pfl, target_phys_addr_t
offset,
p = pfl-storage;
offset = ~(pfl-sector_len - 1);
-DPRINTF(%s: block erase at TARGET_FMT_plx bytes
-TARGET_FMT_plx \n,
-__func__, offset, pfl-sector_len);
+DPRINTF(%s: block erase at TARGET_FMT_plx bytes %x\n,
+__func__, offset, (unsigned)pfl-sector_len);
if (!pfl-ro) {
memset(p + offset, 0xff, pfl-sector_len);
@@ -541,19 +549,13 @@ static const MemoryRegionOps pflash_cfi01_ops_le = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-pflash_t *pflash_cfi01_register(target_phys_addr_t base,
-DeviceState *qdev, const char *name,
-target_phys_addr_t size,
-BlockDriverState *bs, uint32_t sector_len,
-int nb_blocs, int width,
-uint16_t id0, uint16_t id1,
-uint16_t id2, uint16_t id3, int be)
+static int pflash_cfi01_init(SysBusDevice *dev)
{
-pflash_t *pfl;
-target_phys_addr_t total_len;
+pflash_t *pfl = FROM_SYSBUS(typeof(*pfl), dev);
+uint64_t total_len;
int ret;
-total_len = sector_len * nb_blocs;
+total_len = pfl-sector_len * pfl-nb_blocs;
/* XXX: to be fixed */
#if 0
@@ -562,27 +564,22 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base,
return NULL;
#endif
-pfl = g_malloc0(sizeof(pflash_t));
-
memory_region_init_rom_device(
-pfl-mem, be ? pflash_cfi01_ops_be : pflash_cfi01_ops_le, pfl,
-name, size);
-vmstate_register_ram(pfl-mem, qdev);
+pfl-mem, pfl-be ? pflash_cfi01_ops_be : pflash_cfi01_ops_le, pfl,
+pfl-name, total_len);
+vmstate_register_ram(pfl-mem, DEVICE(pfl));
pfl-storage = memory_region_get_ram_ptr(pfl-mem);
-memory_region_add_subregion(get_system_memory(), base, pfl-mem);
+sysbus_init_mmio(dev, pfl-mem);
-pfl-bs = bs;
if (pfl-bs) {
/* read the initial flash content */
ret = bdrv_read(pfl-bs, 0, pfl-storage, total_len 9);
+
if (ret 0) {
-memory_region_del_subregion(get_system_memory(), pfl-mem);
-vmstate_unregister_ram(pfl-mem, qdev);
+vmstate_unregister_ram(pfl-mem, DEVICE(pfl));
memory_region_destroy(pfl-mem);
-g_free(pfl);
-return NULL;
+return 1;
}
-bdrv_attach_dev_nofail(pfl-bs, pfl);
}
if (pfl-bs) {
@@ -592,15 +589,9 @@ pflash_t
[Qemu-devel] [PATCH v2 5/6] xilinx_zynq: add pl353
Add the pl353 memory controller with both NAND and parallel flashes
attached.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
changed from v1:
fixed property names (see patch 3)
hw/xilinx_zynq.c | 50 ++
1 files changed, 42 insertions(+), 8 deletions(-)
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index c55dafb..7261693 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -123,14 +123,48 @@ static void zynq_init(QEMUMachineInitArgs *args)
vmstate_register_ram_global(ocm_ram);
memory_region_add_subregion(address_space_mem, 0xFFFC, ocm_ram);
-DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0);
-
-/* AMD */
-pflash_cfi02_register(0xe200, NULL, zynq.pflash, FLASH_SIZE,
- dinfo ? dinfo-bdrv : NULL, FLASH_SECTOR_SIZE,
- FLASH_SIZE/FLASH_SECTOR_SIZE, 1,
- 1, 0x0066, 0x0022, 0x, 0x, 0x0555, 0x2aa,
- 0);
+/* pl353 */
+dev = qdev_create(NULL, arm.pl35x);
+/* FIXME: handle this somewhere central */
+object_property_add_child(container_get(qdev_get_machine(), /unattached),
+ pl353, OBJECT(dev), NULL);
+qdev_prop_set_uint8(dev, x, 3);
+{
+DriveInfo *dinfo = drive_get_next(IF_PFLASH);
+BlockDriverState *bs = dinfo ? dinfo-bdrv : NULL;
+DeviceState *att_dev = qdev_create(NULL, cfi.pflash02);
+Error *errp = NULL;
+
+if (bs qdev_prop_set_drive(att_dev, drive, bs)) {
+abort();
+}
+qdev_prop_set_uint32(att_dev, num-blocks,
+ FLASH_SIZE/FLASH_SECTOR_SIZE);
+qdev_prop_set_uint32(att_dev, sector-length, FLASH_SECTOR_SIZE);
+qdev_prop_set_uint8(att_dev, width, 1);
+qdev_prop_set_uint8(att_dev, mappings, 1);
+qdev_prop_set_uint8(att_dev, big-endian, 0);
+qdev_prop_set_uint16(att_dev, id0, 0x0066);
+qdev_prop_set_uint16(att_dev, id1, 0x0022);
+qdev_prop_set_uint16(att_dev, id2, 0x);
+qdev_prop_set_uint16(att_dev, id3, 0x);
+qdev_prop_set_uint16(att_dev, unlock-addr0, 0x0aaa);
+qdev_prop_set_uint16(att_dev, unlock-addr1, 0x0555);
+qdev_prop_set_string(att_dev, name, pl353.pflash);
+qdev_init_nofail(att_dev);
+object_property_set_link(OBJECT(dev), OBJECT(att_dev), dev0, errp);
+assert_no_error(errp);
+
+dinfo = drive_get_next(IF_PFLASH);
+att_dev = nand_init(dinfo ? dinfo-bdrv : NULL, NAND_MFR_STMICRO,
0xaa);
+object_property_set_link(OBJECT(dev), OBJECT(att_dev), dev1, errp);
+assert_no_error(errp);
+}
+qdev_init_nofail(dev);
+busdev = sysbus_from_qdev(dev);
+sysbus_mmio_map(busdev, 0, 0xe000e000);
+sysbus_mmio_map(busdev, 1, 0xe200);
+sysbus_mmio_map(busdev, 2, 0xe100);
dev = qdev_create(NULL, xilinx,zynq_slcr);
qdev_init_nofail(dev);
--
1.7.0.4
[Qemu-devel] [PATCH v2 6/6] pflash_cfi01: Fix debug mode printfery
This DPRINTF was throwing a warning due to a missing cast. Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com --- hw/pflash_cfi01.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c index 6164a97..90c111d 100644 --- a/hw/pflash_cfi01.c +++ b/hw/pflash_cfi01.c @@ -183,7 +183,8 @@ static uint32_t pflash_read (pflash_t *pfl, target_phys_addr_t offset, DPRINTF(%s: Device ID Code %04x\n, __func__, ret); break; default: -DPRINTF(%s: Read Device Information boff=%x\n, __func__, boff); +DPRINTF(%s: Read Device Information boff=%x\n, __func__, +(unsigned)boff); ret = 0; break; } -- 1.7.0.4
[Qemu-devel] [PATCH v2 2/6] pflash_cfi01: remove unused total_len field
This field is completely unused.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
---
hw/pflash_cfi01.c |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index 4f3f5f0..ebc8a57 100644
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -62,7 +62,6 @@ do { \
struct pflash_t {
BlockDriverState *bs;
target_phys_addr_t sector_len;
-target_phys_addr_t total_len;
int width;
int wcycle; /* if 0, the flash is read normally */
int bypass;
@@ -594,7 +593,6 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base,
pfl-timer = qemu_new_timer_ns(vm_clock, pflash_timer, pfl);
pfl-sector_len = sector_len;
-pfl-total_len = total_len;
pfl-width = width;
pfl-wcycle = 0;
pfl-cmd = 0;
--
1.7.0.4
[Qemu-devel] [PATCH v2 4/6] hw: Model of Primecell pl35x mem controller
Initial device model for the pl35x series of memory controllers. The SRAM
interface is just implemented as a passthrough using memory regions. NAND
interfaces are modelled.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
changed since v1:
use sysbus_mmio_get_region() for SRAM mappings (PMM Review)
fixed header comment s/pl353/pl35x
fixed complie warnings in debug mode (-DPL35X_DEBUG)
default-configs/arm-softmmu.mak |1 +
hw/Makefile.objs|1 +
hw/pl35x.c | 299 +++
3 files changed, 301 insertions(+), 0 deletions(-)
create mode 100644 hw/pl35x.c
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2f1a5c9..b24bf68 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -41,6 +41,7 @@ CONFIG_PL110=y
CONFIG_PL181=y
CONFIG_PL190=y
CONFIG_PL310=y
+CONFIG_PL35X=y
CONFIG_CADENCE=y
CONFIG_XGMAC=y
diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index 854faa9..502f139 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -88,6 +88,7 @@ common-obj-$(CONFIG_PL110) += pl110.o
common-obj-$(CONFIG_PL181) += pl181.o
common-obj-$(CONFIG_PL190) += pl190.o
common-obj-$(CONFIG_PL310) += arm_l2x0.o
+common-obj-$(CONFIG_PL35X) += pl35x.o
common-obj-$(CONFIG_VERSATILE_PCI) += versatile_pci.o
common-obj-$(CONFIG_VERSATILE_I2C) += versatile_i2c.o
common-obj-$(CONFIG_CADENCE) += cadence_uart.o
diff --git a/hw/pl35x.c b/hw/pl35x.c
new file mode 100644
index 000..0f8c5ed
--- /dev/null
+++ b/hw/pl35x.c
@@ -0,0 +1,299 @@
+/*
+ * QEMU model of Primcell PL35X family of memory controllers
+ *
+ * Copyright (c) 2012 Xilinx Inc.
+ * Copyright (c) 2012 Peter Crosthwaite peter.crosthwa...@xilinx.com.
+ * Copyright (c) 2011 Edgar E. Iglesias.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include hw.h
+#include qemu-timer.h
+#include sysbus.h
+#include sysemu.h
+#include flash.h
+
+#ifdef PL35X_ERR_DEBUG
+#define DB_PRINT(...) do { \
+fprintf(stderr, : %s: , __func__); \
+fprintf(stderr, ## __VA_ARGS__); \
+} while (0);
+#else
+#define DB_PRINT(...)
+#endif
+
+typedef struct PL35xItf {
+MemoryRegion mm;
+DeviceState *dev;
+uint8_t nand_pending_addr_cycles;
+} PL35xItf;
+
+typedef struct PL35xState {
+SysBusDevice busdev;
+MemoryRegion mmio;
+
+/* FIXME: add support for multiple chip selects/interface */
+
+PL35xItf itf[2];
+
+/* FIXME: add Interrupt support */
+
+/* FIXME: add ECC support */
+
+uint8_t x; /* the x in pl35x */
+} PL35xState;
+
+static uint64_t pl35x_read(void *opaque, target_phys_addr_t addr,
+ unsigned int size)
+{
+PL35xState *s = opaque;
+uint32_t r = 0;
+int rdy;
+
+addr = 2;
+switch (addr) {
+case 0x0:
+if (s-itf[0].dev object_dynamic_cast(OBJECT(s-itf[0].dev),
+ nand)) {
+nand_getpins(s-itf[0].dev, rdy);
+r |= (!!rdy) 5;
+}
+if (s-itf[1].dev object_dynamic_cast(OBJECT(s-itf[1].dev),
+ nand)) {
+nand_getpins(s-itf[1].dev, rdy);
+r |= (!!rdy) 6;
+}
+break;
+default:
+DB_PRINT(Unimplemented SMC read access reg= TARGET_FMT_plx \n,
+ addr * 4);
+break;
+}
+return r;
+}
+
+static void pl35x_write(void *opaque, target_phys_addr_t addr, uint64_t
value64,
+ unsigned int size)
+{
+DB_PRINT(addr=%x v=%x\n, (unsigned)addr, (unsigned)value64);
+addr = 2;
+/* FIXME: implement */
+DB_PRINT(Unimplemented SMC write access reg= TARGET_FMT_plx \n,
+ addr * 4);
+}
+
+static const MemoryRegionOps pl35x_ops = {
+.read = pl35x_read,
+.write = pl35x_write,
+.endianness = DEVICE_NATIVE_ENDIAN,
+.valid = {
+
Re: [Qemu-devel] [PATCH V13 4/6] rename qcow2-cache.c to block-cache.c
On Thu, Oct 18, 2012 at 05:51:33PM +0800, Dong Xu Wang wrote: diff --git a/block/qcow2.h b/block/qcow2.h index b4eb654..cb6fd7a 100644 --- a/block/qcow2.h +++ b/block/qcow2.h @@ -27,6 +27,7 @@ #include aes.h #include qemu-coroutine.h +#include block-cache.h Since block-cache.h is being included from qcow2.h you can drop the block-cache.h includes you added to qcow2-cluster.c and qcow2-refcount.c. Stefan
Re: [Qemu-devel] [PATCH V13 4/6] rename qcow2-cache.c to block-cache.c
On Mon, Oct 22, 2012 at 4:22 PM, Stefan Hajnoczi stefa...@gmail.com wrote: On Thu, Oct 18, 2012 at 05:51:33PM +0800, Dong Xu Wang wrote: diff --git a/block/qcow2.h b/block/qcow2.h index b4eb654..cb6fd7a 100644 --- a/block/qcow2.h +++ b/block/qcow2.h @@ -27,6 +27,7 @@ #include aes.h #include qemu-coroutine.h +#include block-cache.h Since block-cache.h is being included from qcow2.h you can drop the block-cache.h includes you added to qcow2-cluster.c and qcow2-refcount.c. Okay, thank you Stefan. Stefan
Re: [Qemu-devel] [RFC PATCH v3 06/19] Implement -dimm command line option
Hi, On Thu, Oct 18, 2012 at 02:33:02PM +0200, Avi Kivity wrote: On 10/18/2012 11:27 AM, Vasilis Liaskovitis wrote: On Wed, Oct 17, 2012 at 12:03:51PM +0200, Avi Kivity wrote: On 10/17/2012 11:19 AM, Vasilis Liaskovitis wrote: I don't think so, but probably there's a limit of DIMMs that real controllers have, something like 8 max. In the case of i440fx specifically, do you mean that we should model the DRB (Dram row boundary registers in section 3.2.19 of the i440fx spec) ? The i440fx DRB registers only supports up to 8 DRAM rows (let's say 1 row maps 1-1 to a DimmDevice for this discussion) and only supports up to 2GB of memory afaict (bit 31 and above is ignored). I 'd rather not model this part of the i440fx - having only 8 DIMMs seems too restrictive. The rest of the patchset supports up to 255 DIMMs so it would be a waste imho to model an old pc memory controller that only supports 8 DIMMs. There was also an old discussion about i440fx modeling here: https://lists.nongnu.org/archive/html/qemu-devel/2011-07/msg02705.html the general direction was that i440fx is too old and we don't want to precisely emulate the DRB registers, since they lack flexibility. Possible solutions: 1) is there a newer and more flexible chipset that we could model? Look for q35 on this list. thanks, I 'll take a look. It sounds like the other options below are more straightforward now, but let me know if you prefer q35 integration as a priority. At least validate that what you're doing fits with how q35 works. In terms of pmc modeling, the q35 page http://wiki.qemu.org/Features/Q35 mentions: Refactor i440fx to create i440fx-pmc class ich9: model ICH9 Super I/O chip ich9: make i440fx-pmc a generic PCNorthBridge class and add support for ich9 northbridge is this still the plan? There was an old patchset creating i440fx-pmc here: http://lists.gnu.org/archive/html/qemu-devel/2012-01/msg03501.html but I am not sure if it has been dropped or worked on. v3 of the q35 patchset doesn't include a pmc I think. It would be good to know what the current plan regarding pmc modeling (for both q35 and i440fx) is. thanks, - Vasilis
Re: [Qemu-devel] [PATCH v3 12/16] qemu-iotests: add mirroring test case
Am 20.10.2012 15:47, schrieb Paolo Bonzini:
Il 19/10/2012 18:19, Kevin Wolf ha scritto:
Am 18.10.2012 16:49, schrieb Paolo Bonzini:
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
v2-v3: new testcases test_cancel_after_ready and
test_medium_not_found, removed obsolete workaround
for os.remove failure. Fixed copyright header.
tests/qemu-iotests/041 | 364
+
tests/qemu-iotests/041.out | 5 +
tests/qemu-iotests/group | 1 +
3 file modificati, 370 inserzioni(+)
create mode 100755 tests/qemu-iotests/041
create mode 100644 tests/qemu-iotests/041.out
diff --git a/tests/qemu-iotests/041 b/tests/qemu-iotests/041
new file mode 100755
index 000..ce99b00
--- /dev/null
+++ b/tests/qemu-iotests/041
@@ -0,0 +1,364 @@
+#!/usr/bin/env python
+#
+# Tests for image mirroring.
+#
+# Copyright (C) 2012 Red Hat, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see http://www.gnu.org/licenses/.
+#
+
+import time
+import os
+import iotests
+from iotests import qemu_img, qemu_io
+import struct
+
+backing_img = os.path.join(iotests.test_dir, 'backing.img')
+target_backing_img = os.path.join(iotests.test_dir, 'target-backing.img')
+test_img = os.path.join(iotests.test_dir, 'test.img')
+target_img = os.path.join(iotests.test_dir, 'target.img')
+
+class ImageMirroringTestCase(iotests.QMPTestCase):
+'''Abstract base class for image mirroring test cases'''
+
+def assert_no_active_mirrors(self):
+result = self.vm.qmp('query-block-jobs')
+self.assert_qmp(result, 'return', [])
+
+def cancel_and_wait(self, drive='drive0', wait_ready=True):
+'''Cancel a block job and wait for it to finish'''
+if wait_ready:
+ready = False
+while not ready:
+for event in self.vm.get_qmp_events(wait=True):
+if event['event'] == 'BLOCK_JOB_READY':
+self.assert_qmp(event, 'data/type', 'mirror')
+self.assert_qmp(event, 'data/device', drive)
+ready = True
+
+result = self.vm.qmp('block-job-cancel', device=drive,
+ force=not wait_ready)
+self.assert_qmp(result, 'return', {})
+
+cancelled = False
+while not cancelled:
+for event in self.vm.get_qmp_events(wait=True):
+if event['event'] == 'BLOCK_JOB_COMPLETED' or \
+ event['event'] == 'BLOCK_JOB_CANCELLED':
+self.assert_qmp(event, 'data/type', 'mirror')
+self.assert_qmp(event, 'data/device', drive)
+if wait_ready:
+self.assertEquals(event['event'],
'BLOCK_JOB_COMPLETED')
+self.assert_qmp(event, 'data/offset',
self.image_len)
+self.assert_qmp(event, 'data/len', self.image_len)
+cancelled = True
+
+self.assert_no_active_mirrors()
+
+def complete_and_wait(self, drive='drive0', wait_ready=True):
+'''Complete a block job and wait for it to finish'''
+if wait_ready:
+ready = False
+while not ready:
+for event in self.vm.get_qmp_events(wait=True):
+if event['event'] == 'BLOCK_JOB_READY':
+self.assert_qmp(event, 'data/type', 'mirror')
+self.assert_qmp(event, 'data/device', drive)
+ready = True
+
+result = self.vm.qmp('block-job-complete', device=drive)
+self.assert_qmp(result, 'return', {})
+
+completed = False
+while not completed:
+for event in self.vm.get_qmp_events(wait=True):
+if event['event'] == 'BLOCK_JOB_COMPLETED':
+self.assert_qmp(event, 'data/type', 'mirror')
+self.assert_qmp(event, 'data/device', drive)
+self.assert_qmp_absent(event, 'data/error')
+self.assert_qmp(event, 'data/offset', self.image_len)
+self.assert_qmp(event, 'data/len', self.image_len)
+completed = True
+
+self.assert_no_active_mirrors()
+
+def create_image(self, name, size):
+file = open(name,
Re: [Qemu-devel] [PATCH v3 00/26] q35 qemu support
On Mon, Oct 22, 2012 at 07:58:32AM +0200, Gerd Hoffmann wrote: Hi, Would it make sense to temporarily rename the machine type e.g. pc-q35-experimental to stress it's not fully supported? I don't think this is needed as piix will continue to be the default. Well q35 is not yet 100% ready. I'm looking for some way in which we can signal libvirt and other users when it's ready, while merging some bits to reduce the maintainance load of maintaining a q35 fork. It will also cause trouble with libvirt when pc-q35-experimental goes away some day. cheers, Gerd The point was to hide it from libvirt. libvirt should support pc-q35 not pc-q35-experimental, then it will not cause trouble. -- MST
Re: [Qemu-devel] [PATCH V13 5/6] add-cow file format core code.
On Thu, Oct 18, 2012 at 05:51:34PM +0800, Dong Xu Wang wrote:
+static void add_cow_header_cpu_to_le(const AddCowHeader *cpu, AddCowHeader
*le)
+{
+le-magic = cpu_to_le64(cpu-magic);
+le-version = cpu_to_le32(cpu-version);
+
+le-backing_filename_offset =
cpu_to_le32(cpu-backing_filename_offset);
+le-backing_filename_size =
cpu_to_le32(cpu-backing_filename_size);
+
+le-image_filename_offset =
cpu_to_le32(cpu-image_filename_offset);
+le-image_filename_size = cpu_to_le32(cpu-image_filename_size);
+
+le-cluster_bits= cpu_to_le32(cpu-cluster_bits);
+le-features= cpu_to_le64(cpu-features);
+le-optional_features = cpu_to_le64(cpu-optional_features);
+le-header_pages_size = cpu_to_le32(cpu-header_pages_size);
+memcpy(le-backing_fmt, cpu-backing_fmt, sizeof(cpu-backing_fmt));
+memcpy(le-image_fmt, cpu-image_fmt, sizeof(cpu-image_fmt));
Minor style issue: sizeof(le-backing_fmt) is safer than
sizeof(cpu-image_fmt) in case the types change or this code is
copy-pasted elsewhere. Always use the size of the destination buffer.
+}
+
+static int add_cow_probe(const uint8_t *buf, int buf_size, const char
*filename)
+{
+const AddCowHeader *header = (const AddCowHeader *)buf;
+
In case .bdrv_probe() is exposed in a future stand-alone block libary
like libqblock.so where we cannot make assumptions about buf_size:
if (buf_size sizeof(*header)) {
return 0;
}
+ret = bdrv_file_open(bs, filename, BDRV_O_RDWR);
+if (ret 0) {
+return ret;
+}
+snprintf(header.backing_fmt, sizeof(header.backing_fmt),
+ %s, backing_fmt ? backing_fmt : );
+snprintf(header.image_fmt, sizeof(header.image_fmt),
+ %s, image_format ? image_format : raw);
+add_cow_header_cpu_to_le(header, le_header);
+ret = bdrv_pwrite(bs, 0, le_header, sizeof(le_header));
+if (ret 0) {
+bdrv_delete(bs);
+return ret;
+}
Once...
+if (ret 0) {
+bdrv_delete(bs);
+return ret;
+}
...twice. This can be dropped.
+
+if (backing_filename) {
+ret = bdrv_pwrite(bs, header.backing_filename_offset,
+ backing_filename, header.backing_filename_size);
+if (ret 0) {
+bdrv_delete(bs);
+return ret;
+}
+}
+
+ret = bdrv_pwrite(bs, header.image_filename_offset,
+ image_filename, header.image_filename_size);
+if (ret 0) {
+bdrv_delete(bs);
+return ret;
+}
I suggest writing the image filename before the backing filename so it's
easier to implement .bdrv_change_backing_file() in the future.
+
+ret = bdrv_open(bs, filename, BDRV_O_RDWR | BDRV_O_NO_FLUSH, drv);
Forgot to bdrv_close(bs) before opening as add-cow.
+if ((s-header.features ADD_COW_F_ALL_ALLOCATED) == 0) {
+ret = bdrv_read_string(bs-file, sizeof(s-header),
+ sizeof(bs-backing_format) - 1,
+ bs-backing_format,
+ sizeof(bs-backing_format));
This looks wrong:
1. The header contains the backing format field, we've already read it.
Now we just need to put a NUL-terminated string into
bs-backing_format. No need for bdrv_read_string().
2. offset = sizeof(s-header) does not make sense because the
backing_format field is part of the header.
3. n = sizeof(bs-backing_format) - 1 should be the size of the header
backing_format field, not the destination buffer.
I'm wondering if I missed something or why add-cow files open
successfully in your testing, because I think this line of code would
cause it to use a junk bs-backing_format.
+s-image_hd = bdrv_new();
+if (path_has_protocol(image_filename)) {
image_filename[] is uninitialized. Did you mean tmp_name?
+pstrcpy(image_filename, sizeof(image_filename), tmp_name);
+} else {
+path_combine(image_filename, sizeof(image_filename),
+ bs-filename, tmp_name);
+}
+
+ret = bdrv_open(s-image_hd, image_filename, flags, NULL);
What about header-image_format?
+if (ret 0) {
+bdrv_delete(s-image_hd);
+goto fail;
+}
+
+bs-total_sectors = bdrv_getlength(s-image_hd) 9;
/ BDRV_SECTOR_SIZE
+s-cluster_size = 1 s-header.cluster_bits;
+sector_per_byte = SECTORS_PER_CLUSTER * 8;
SECTORS_PER_CLUSTER does not take s-cluster_size into account.
The add_cow_open() issues should have been visible during
development/testing (backing_format, unitialized image_filename[],
unused header-image_format, SECTORS_PER_CLUSTER). It looks like not
much testing of image creation options has been done. I'll review more
of this series in the next version, please test more.
Stefan
Re: [Qemu-devel] [patch v4 08/16] QemuThread: make QemuThread as tls to store extra info
On 2012-10-22 11:23, Liu Ping Fan wrote:
If mmio dispatch out of big lock, some function's calling context (ie,
holding big lock or not) are different. We need to trace these info in
runtime, and use tls to store them.
By this method, we can avoid to require big lock recursive.
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
cpus.c |1 +
qemu-thread-posix.c |7 +++
qemu-thread-posix.h |2 ++
qemu-thread.h |1 +
vl.c|6 ++
5 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/cpus.c b/cpus.c
index e476a3c..4cd7f85 100644
--- a/cpus.c
+++ b/cpus.c
@@ -735,6 +735,7 @@ static void *qemu_kvm_cpu_thread_fn(void *arg)
CPUState *cpu = ENV_GET_CPU(env);
int r;
+pthread_setspecific(qemu_thread_key, cpu-thread);
qemu_mutex_lock(qemu_global_mutex);
qemu_thread_get_self(cpu-thread);
env-thread_id = qemu_get_thread_id();
diff --git a/qemu-thread-posix.c b/qemu-thread-posix.c
index 8fbabda..f448fcb 100644
--- a/qemu-thread-posix.c
+++ b/qemu-thread-posix.c
@@ -19,6 +19,8 @@
#include string.h
#include qemu-thread.h
+pthread_key_t qemu_thread_key;
+
static void error_exit(int err, const char *msg)
{
fprintf(stderr, qemu: %s: %s\n, msg, strerror(err));
@@ -151,6 +153,11 @@ void qemu_thread_get_self(QemuThread *thread)
thread-thread = pthread_self();
}
+void qemu_thread_key_create(void)
+{
+pthread_key_create(qemu_thread_key, NULL);
+}
+
bool qemu_thread_is_self(QemuThread *thread)
{
return pthread_equal(pthread_self(), thread-thread);
diff --git a/qemu-thread-posix.h b/qemu-thread-posix.h
index ee4618e..2607b1c 100644
--- a/qemu-thread-posix.h
+++ b/qemu-thread-posix.h
@@ -14,4 +14,6 @@ struct QemuThread {
pthread_t thread;
};
+extern pthread_key_t qemu_thread_key;
+
#endif
diff --git a/qemu-thread.h b/qemu-thread.h
index 05fdaaf..4a6427d 100644
--- a/qemu-thread.h
+++ b/qemu-thread.h
@@ -46,4 +46,5 @@ void qemu_thread_get_self(QemuThread *thread);
bool qemu_thread_is_self(QemuThread *thread);
void qemu_thread_exit(void *retval);
+void qemu_thread_key_create(void);
#endif
diff --git a/vl.c b/vl.c
index 7c577fa..442479a 100644
--- a/vl.c
+++ b/vl.c
@@ -149,6 +149,7 @@ int main(int argc, char **argv)
#include qemu-options.h
#include qmp-commands.h
#include main-loop.h
+#include qemu-thread.h
#ifdef CONFIG_VIRTFS
#include fsdev/qemu-fsdev.h
#endif
@@ -2342,6 +2343,7 @@ int qemu_init_main_loop(void)
return main_loop_init();
}
+
int main(int argc, char **argv, char **envp)
{
int i;
@@ -3483,6 +3485,10 @@ int main(int argc, char **argv, char **envp)
exit(1);
}
+qemu_thread_key_create();
+QemuThread *ioctx = g_malloc0(sizeof(QemuThread));
+pthread_setspecific(qemu_thread_key, ioctx);
+
os_set_line_buffering();
if (init_timer_alarm() 0) {
Can't we enhance qemu-tls.h to work via pthread_setspecific in case
__thread is not working and use that abstraction (DECLARE/DEFINE_TLS)
directly?
Also, the above breaks win32, doesn't it?
Jan
--
Siemens AG, Corporate Technology, CT RTC ITP SDP-DE
Corporate Competence Center Embedded Linux
Re: [Qemu-devel] [PULL v3 00/23] Integrate DMA into the memory API
On 10/15/2012 03:16 PM, Avi Kivity wrote: On 10/11/2012 11:01 PM, Anthony Liguori wrote: This conflicts with a recent pull from Stefano in xen-all.c. The difference doesn't look that awful but since I don't have a xen test setup, I'm not confident in resolving it myself. Can you rebase and fixup? Rebased tree in the same place: git://git.kernel.org/pub/scm/virt/kvm/qemu-kvm.git memory/dma Anthony, or Blue, can you pull please? The neighbours are starting to complain about the smell. -- error compiling committee.c: too many arguments to function
[Qemu-devel] [Bug 739785] Re: qemu-i386 user mode on ARMv5 host fails (bash: fork: Invalid argument)
Interesting stuff. With 0.14 and 1.2 wineserver will run if you say wineserver -d2 -f -p for example. I believe it is forking when you run plain old wineserver because it really is getting an invalid argument. I am running Wine 1.1.14 and Qemu 0.14 and I can run many apps. I cannot run a NeoBook app.. Runtime error 216 at 004040E6 Any idea why? =) If you run Wine 1.1.14 and the latest qemu from master as of tonight.. wineserver will load with wine-pthread but when wine-pthread runs you get connection reset by peer by wine-pthread. Just an FYI Wine 1.1.4 was taken from Fedora Cora 9 -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/739785 Title: qemu-i386 user mode on ARMv5 host fails (bash: fork: Invalid argument) Status in QEMU: New Bug description: Good time of day everybody, I have been trying to make usermode qemu on ARM with plugapps (archlinux) with archlinux i386 chroot to work. 1. I installed arch linux in a virtuabox and created a chroot for it with mkarchroot. Transferred it to my pogo plug into /i386/ 2. I comiled qemu-i386 static and put it into /i386/usr/bin/ ./configure --static --disable-blobs --disable-system --target-list=i386-linux-user make 3. I also compiled linux kernel 2.6.38 with CONFIG_BINFMT_MISC=y and installed it. uname -a Linux Plugbox 2.6.38 #4 PREEMPT Fri Mar 18 22:19:10 CDT 2011 armv5tel Feroceon 88FR131 rev 1 (v5l) Marvell SheevaPlug Reference Board GNU/Linux 4. Added the following options into /etc/rc.local /sbin/modprobe binfmt_misc /bin/mount binfmt_misc -t binfmt_misc /proc/sys/fs/binfmt_misc echo ':qemu-i386:M::\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x03\x00:\xff\xff\xff\xff\xff\xfe\xfe\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfb\xff\xff\xff:/usr/bin/qemu-i386:' /proc/sys/fs/binfmt_misc/register 5. Also copied ld-linux.so.3 (actually ld-2.13.so because ld- linux.so.3 is a link to that file) from /lib/ to /i386/lib/ 6.Now i chroot into /i386 and I get this: [root@Plugbox i386]# chroot . [II aI hnve ao n@P /]# pacman -Suy bash: fork: Invalid argument 7.I also downloaded linux-user-test-0.3 from qemu website and ran the test: [root@Plugbox linux-user-test-0.3]# make ./qemu-linux-user.sh [qemu-i386] ../qemu-0.14.0/i386-linux-user/qemu-i386 -L ./gnemul/qemu-i386 i386/ls -l dummyfile BUG IN DYNAMIC LINKER ld.so: dl-version.c: 210: _dl_check_map_versions: Assertion `needed != ((void *)0)' failed! make: *** [test] Error 127 To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/739785/+subscriptions
Re: [Qemu-devel] [patch v4 05/16] memory: introduce ref, unref interface for MemoryRegionOps
On 10/22/2012 11:23 AM, Liu Ping Fan wrote:
This pair of interface help to decide when dispatching, whether
we can pin mr without big lock or not.
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
memory.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/memory.h b/memory.h
index bd1bbae..9039411 100644
--- a/memory.h
+++ b/memory.h
@@ -25,6 +25,7 @@
#include iorange.h
#include ioport.h
#include int128.h
+#include qemu/object.h
Unneeded.
typedef struct MemoryRegionOps MemoryRegionOps;
typedef struct MemoryRegion MemoryRegion;
@@ -66,6 +67,8 @@ struct MemoryRegionOps {
target_phys_addr_t addr,
uint64_t data,
unsigned size);
+int (*ref)(MemoryRegion *mr);
+void (*unref)(MemoryRegion *mr);
Why return an int? Should succeed unconditionally. Please fold into 7
(along with 6).
--
error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [PATCHv5] Align PCI capabilities in pci_find_space
On Sat, Oct 20, 2012 at 04:01:12PM -0500, Matt Renzelmann wrote:
The current implementation of pci_find_space does not correctly align
PCI capabilities in the PCI configuration space. It also does not
support PCI-Express devices. This patch fixes these issues.
Thanks to Alex Williamson for feedback.
Signed-off-by: Matt Renzelmann m...@cs.wisc.edu
---
Re-sending to add CC Michael S. Tsirkin m...@redhat.com. Thanks
Andreas for pointing out my mistake.
hw/pci.c | 36
1 files changed, 28 insertions(+), 8 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index 2ca6ff6..4b617f6 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1644,19 +1644,39 @@ PCIDevice *pci_create_simple(PCIBus *bus, int devfn,
const char *name)
return pci_create_simple_multifunction(bus, devfn, false, name);
}
-static int pci_find_space(PCIDevice *pdev, uint8_t size)
+static int pci_find_space(PCIDevice *pdev, uint32_t start,
+ uint32_t end, uint32_t size)
{
-int config_size = pci_config_size(pdev);
-int offset = PCI_CONFIG_HEADER_SIZE;
+int offset = start;
int i;
-for (i = PCI_CONFIG_HEADER_SIZE; i config_size; ++i)
-if (pdev-used[i])
-offset = i + 1;
-else if (i - offset + 1 == size)
+uint32_t *dword_used = pdev-used[start];
+
+assert(pci_config_size(pdev) = end);
+assert(!(start 0x3));
+
+/* This approach ensures the capability is dword-aligned, as
+ required by the PCI and PCI-E specifications */
+for (i = start; i end; i += 4, dword_used++) {
+if (*dword_used) {
+offset = i + 4;
+} else if (i - offset + 4 = size) {
return offset;
+}
+}
+
return 0;
}
I agree ability to get misaligned capabilities is a bug. Thanks for
reorting this. But it seems easier to fix just by aligning size. See
patch below.
+static int pci_find_legacy_space(PCIDevice *pdev, uint8_t size) {
+return pci_find_space(pdev, PCI_CONFIG_HEADER_SIZE,
+ PCI_CONFIG_SPACE_SIZE, size);
+}
I think it makes more sense to make pci_find_space imply
legacy and add a new API for express. This is exactly what patches
that Jason Baron posted do, so I'll apply them instead.
+
+static int pci_find_express_space(PCIDevice *pdev, uint16_t size) {
+return pci_find_space(pdev, PCI_CONFIG_SPACE_SIZE,
+ PCIE_CONFIG_SPACE_SIZE, size);
+}
+
This is dead code I think, it's probably not a good idea to
add yet at this stage.
static uint8_t pci_find_capability_list(PCIDevice *pdev, uint8_t cap_id,
uint8_t *prev_p)
{
@@ -1844,7 +1864,7 @@ int pci_add_capability(PCIDevice *pdev, uint8_t cap_id,
int i, overlapping_cap;
if (!offset) {
-offset = pci_find_space(pdev, size);
+offset = pci_find_legacy_space(pdev, size);
if (!offset) {
return -ENOSPC;
}
Below is what I applied. Thanks for the report!
---
pci: make each capability DWORD aligned
PCI spec (see e.g. 6.7 Capabilities List in spec rev 3.0)
requires that each capability is DWORD aligned.
Ensure this when allocating space by rounding size up to 4.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
Reported-by: Matt Renzelmann m...@cs.wisc.edu
diff --git a/hw/pci.c b/hw/pci.c
index 6a66b32..28fdb19 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1883,7 +1883,7 @@ int pci_add_capability(PCIDevice *pdev, uint8_t cap_id,
config[PCI_CAP_LIST_NEXT] = pdev-config[PCI_CAPABILITY_LIST];
pdev-config[PCI_CAPABILITY_LIST] = offset;
pdev-config[PCI_STATUS] |= PCI_STATUS_CAP_LIST;
-memset(pdev-used + offset, 0xFF, size);
+memset(pdev-used + offset, 0xFF, QEMU_ALIGN_UP(size, 4));
/* Make capability read-only by default */
memset(pdev-wmask + offset, 0, size);
/* Check capability by default */
@@ -1903,7 +1903,7 @@ void pci_del_capability(PCIDevice *pdev, uint8_t cap_id,
uint8_t size)
memset(pdev-w1cmask + offset, 0, size);
/* Clear cmask as device-specific registers can't be checked */
memset(pdev-cmask + offset, 0, size);
-memset(pdev-used + offset, 0, size);
+memset(pdev-used + offset, 0, QEMU_ALIGN_UP(size, 4));
if (!pdev-config[PCI_CAPABILITY_LIST])
pdev-config[PCI_STATUS] = ~PCI_STATUS_CAP_LIST;
Re: [Qemu-devel] [PATCH v3 01/26] blockdev: Introduce a default machine blockdev interface field, QEMUMachine-mach_if
On Fri, Oct 19, 2012 at 04:43:26PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
The current QEMUMachine definition has a 'use_scsi' field to indicate if a
machine type should use scsi by default. However, Q35 wants to use ahci by
default. Thus, introdue a new field in the QEMUMachine defintion, mach_if.
This field should be initialized by the machine type to the default interface
type which it wants to use (IF_SCSI, IF_AHCI, etc.). If no mach_if is defined,
or it is set to 'IF_DEFAULT' or 'IF_NONE', we currently assume IF_IDE.
Please use 'static inline int get_mach_if(int mach_if)', when accesssing the
new mach_if field.
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Jason Baron jba...@redhat.com
Kevin, could you review/ack this patch pls?
---
blockdev.c |4 ++--
blockdev.h | 19 +++
hw/boards.h |2 +-
hw/device-hotplug.c |2 +-
hw/highbank.c |2 +-
hw/leon3.c |2 +-
hw/mips_jazz.c |4 ++--
hw/pc_sysfw.c |2 +-
hw/puv3.c |2 +-
hw/realview.c |6 +++---
hw/spapr.c |2 +-
hw/sun4m.c | 24
hw/versatilepb.c|4 ++--
hw/vexpress.c |4 ++--
hw/xilinx_zynq.c|2 +-
vl.c| 20 +++-
16 files changed, 61 insertions(+), 40 deletions(-)
diff --git a/blockdev.c b/blockdev.c
index 99828ad..c9a49c8 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -275,7 +275,7 @@ static bool do_check_io_limits(BlockIOLimit *io_limits)
return true;
}
-DriveInfo *drive_init(QemuOpts *opts, int default_to_scsi)
+DriveInfo *drive_init(QemuOpts *opts, int mach_if)
{
const char *buf;
const char *file = NULL;
@@ -325,7 +325,7 @@ DriveInfo *drive_init(QemuOpts *opts, int default_to_scsi)
return NULL;
}
} else {
-type = default_to_scsi ? IF_SCSI : IF_IDE;
+type = get_mach_if(mach_if);
}
max_devs = if_max_devs[type];
diff --git a/blockdev.h b/blockdev.h
index 5f27b64..8b126ad 100644
--- a/blockdev.h
+++ b/blockdev.h
@@ -40,6 +40,22 @@ struct DriveInfo {
int refcount;
};
+/*
+ * Each qemu machine type defines a mach_if field for its default
+ * interface type. If its unspecified, we set it to IF_IDE.
+ */
+static inline int get_mach_if(int mach_if)
+{
+assert(mach_if IF_COUNT);
+assert(mach_if = IF_DEFAULT);
+
+if ((mach_if == IF_NONE) || (mach_if == IF_DEFAULT)) {
+return IF_IDE;
+}
+
+return mach_if;
+}
+
DriveInfo *drive_get(BlockInterfaceType type, int bus, int unit);
DriveInfo *drive_get_by_index(BlockInterfaceType type, int index);
int drive_get_max_bus(BlockInterfaceType type);
@@ -61,4 +77,7 @@ void qmp_change_blockdev(const char *device, const char
*filename,
bool has_format, const char *format, Error **errp);
void do_commit(Monitor *mon, const QDict *qdict);
int do_drive_del(Monitor *mon, const QDict *qdict, QObject **ret_data);
+
+
+
#endif
diff --git a/hw/boards.h b/hw/boards.h
index a2e0a54..969fd67 100644
--- a/hw/boards.h
+++ b/hw/boards.h
@@ -20,7 +20,7 @@ typedef struct QEMUMachine {
const char *desc;
QEMUMachineInitFunc *init;
QEMUMachineResetFunc *reset;
-int use_scsi;
+int mach_if;
int max_cpus;
unsigned int no_serial:1,
no_parallel:1,
diff --git a/hw/device-hotplug.c b/hw/device-hotplug.c
index eec0fe3..33302f9 100644
--- a/hw/device-hotplug.c
+++ b/hw/device-hotplug.c
@@ -39,7 +39,7 @@ DriveInfo *add_init_drive(const char *optstr)
if (!opts)
return NULL;
-dinfo = drive_init(opts, current_machine-use_scsi);
+dinfo = drive_init(opts, current_machine-mach_if);
if (!dinfo) {
qemu_opts_del(opts);
return NULL;
diff --git a/hw/highbank.c b/hw/highbank.c
index 11aa131..35cef06 100644
--- a/hw/highbank.c
+++ b/hw/highbank.c
@@ -324,7 +324,7 @@ static QEMUMachine highbank_machine = {
.name = highbank,
.desc = Calxeda Highbank (ECX-1000),
.init = highbank_init,
-.use_scsi = 1,
+.mach_if = IF_SCSI,
.max_cpus = 4,
};
diff --git a/hw/leon3.c b/hw/leon3.c
index 7a9729d..cf9dcf8 100644
--- a/hw/leon3.c
+++ b/hw/leon3.c
@@ -214,7 +214,7 @@ static QEMUMachine leon3_generic_machine = {
.name = leon3_generic,
.desc = Leon-3 generic,
.init = leon3_generic_hw_init,
-.use_scsi = 0,
+.mach_if = IF_DEFAULT,
};
static void leon3_machine_init(void)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index db927f1..1c7a725 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -325,14 +325,14 @@ static QEMUMachine mips_magnum_machine = {
.name = magnum,
.desc = MIPS Magnum,
.init = mips_magnum_init,
-.use_scsi = 1,
+.mach_if = IF_SCSI,
Re: [Qemu-devel] [PATCH v3 02/26] blockdev: Introduce IF_AHCI
On Fri, Oct 19, 2012 at 04:43:27PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
Introduce IF_AHCI so that q35 can differentiate between ide and ahci disks.
This allows q35 to specify its default disk type. It also allows q35 to
differentiate between ahci and ide disks, such that -drive if=ide does not
result in the creating of an ahci disk. This is important, since we don't want
to have the meaning of if=ide changing once q35 is introduced. Thus, its
important for this to be applied before we introduce q35.
This patch also adds:
pci_ahci_create_devs(PCIDevice *pci_dev, DriveInfo **hd_table)
Which provides a convient way of attaching ahci drives to an
ahci controller.
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Jason Baron jba...@redhat.com
---
Kevin, could you review/ack this patch pls?
blockdev.c| 13 -
blockdev.h|2 ++
hw/ide.h |6 ++
hw/ide/ahci.c | 18 ++
hw/ide/core.c | 23 ++-
5 files changed, 56 insertions(+), 6 deletions(-)
diff --git a/blockdev.c b/blockdev.c
index c9a49c8..b684348 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -33,6 +33,7 @@ static const char *const if_name[IF_COUNT] = {
[IF_SD] = sd,
[IF_VIRTIO] = virtio,
[IF_XEN] = xen,
+[IF_AHCI] = ahci,
};
static const int if_max_devs[IF_COUNT] = {
@@ -52,8 +53,17 @@ static const int if_max_devs[IF_COUNT] = {
*/
[IF_IDE] = 2,
[IF_SCSI] = 7,
+[IF_AHCI] = 6,
};
+int get_if_max_devs(BlockInterfaceType if_type)
+{
+assert(if_type IF_COUNT);
+assert(if_type = IF_DEFAULT);
+
+return if_max_devs[if_type];
+}
+
/*
* We automatically delete the drive when a device using it gets
* unplugged. Questionable feature, but we can't just drop it.
@@ -518,7 +528,7 @@ DriveInfo *drive_init(QemuOpts *opts, int mach_if)
} else {
/* no id supplied - create one */
dinfo-id = g_malloc0(32);
-if (type == IF_IDE || type == IF_SCSI)
+if (type == IF_IDE || type == IF_SCSI || type == IF_AHCI)
mediastr = (media == MEDIA_CDROM) ? -cd : -hd;
if (max_devs)
snprintf(dinfo-id, 32, %s%i%s%i,
@@ -550,6 +560,7 @@ DriveInfo *drive_init(QemuOpts *opts, int mach_if)
switch(type) {
case IF_IDE:
+case IF_AHCI:
case IF_SCSI:
case IF_XEN:
case IF_NONE:
diff --git a/blockdev.h b/blockdev.h
index 8b126ad..bbd1017 100644
--- a/blockdev.h
+++ b/blockdev.h
@@ -21,6 +21,7 @@ typedef enum {
IF_DEFAULT = -1,/* for use with drive_add() only */
IF_NONE,
IF_IDE, IF_SCSI, IF_FLOPPY, IF_PFLASH, IF_MTD, IF_SD, IF_VIRTIO, IF_XEN,
+IF_AHCI,
IF_COUNT
} BlockInterfaceType;
@@ -56,6 +57,7 @@ static inline int get_mach_if(int mach_if)
return mach_if;
}
+int get_if_max_devs(BlockInterfaceType if_type);
DriveInfo *drive_get(BlockInterfaceType type, int bus, int unit);
DriveInfo *drive_get_by_index(BlockInterfaceType type, int index);
int drive_get_max_bus(BlockInterfaceType type);
diff --git a/hw/ide.h b/hw/ide.h
index 2db4079..0b7e000 100644
--- a/hw/ide.h
+++ b/hw/ide.h
@@ -4,6 +4,7 @@
#include isa.h
#include pci.h
#include memory.h
+#include blockdev.h
#define MAX_IDE_DEVS 2
@@ -34,6 +35,11 @@ int ide_get_geometry(BusState *bus, int unit,
int ide_get_bios_chs_trans(BusState *bus, int unit);
/* ide/core.c */
+void ata_drive_get(DriveInfo **hd, int max_bus, BlockInterfaceType type);
void ide_drive_get(DriveInfo **hd, int max_bus);
+void ahci_drive_get(DriveInfo **hd, int max_bus);
+
+/* ide/ahci.c */
+void pci_ahci_create_devs(PCIDevice *pci_dev, DriveInfo **hd_table);
#endif /* HW_IDE_H */
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 68671bc..824b86f 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -26,6 +26,7 @@
#include hw/pc.h
#include hw/pci.h
#include hw/sysbus.h
+#include blockdev.h
#include monitor.h
#include dma.h
@@ -1260,3 +1261,20 @@ static void sysbus_ahci_register_types(void)
}
type_init(sysbus_ahci_register_types)
+
+void pci_ahci_create_devs(PCIDevice *pci_dev, DriveInfo **hd_table)
+{
+struct AHCIPCIState *dev = DO_UPCAST(struct AHCIPCIState, card, pci_dev);
+int i;
+DriveInfo *drive;
+
+for (i = 0; i dev-ahci.ports; i++) {
+if (hd_table[i] == NULL) {
+continue;
+}
+drive = hd_table[i];
+assert(drive-type == IF_AHCI);
+ide_create_drive(dev-ahci.dev[i].port, 0,
+ hd_table[i]);
+}
+}
diff --git a/hw/ide/core.c b/hw/ide/core.c
index d683a8c..044da3c 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -2341,16 +2341,29 @@ const VMStateDescription vmstate_ide_bus = {
}
};
-void ide_drive_get(DriveInfo **hd, int max_bus)
+void ata_drive_get(DriveInfo **hd, int max_bus,
Re: [Qemu-devel] [PATCH v3 03/26] pci: pci capability must be in PCI space
On Fri, Oct 19, 2012 at 04:43:28PM -0400, Jason Baron wrote:
From: Isaku Yamahata yamah...@valinux.co.jp
pci capability must be in PCI space.
It can't lay in PCIe extended config space.
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Signed-off-by: Jason Baron jba...@redhat.com
Applied, thanks!
---
hw/pci.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index 2ca6ff6..b1b105d 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1644,16 +1644,16 @@ PCIDevice *pci_create_simple(PCIBus *bus, int devfn,
const char *name)
return pci_create_simple_multifunction(bus, devfn, false, name);
}
-static int pci_find_space(PCIDevice *pdev, uint8_t size)
+static uint8_t pci_find_space(PCIDevice *pdev, uint8_t size)
{
-int config_size = pci_config_size(pdev);
int offset = PCI_CONFIG_HEADER_SIZE;
int i;
-for (i = PCI_CONFIG_HEADER_SIZE; i config_size; ++i)
+for (i = PCI_CONFIG_HEADER_SIZE; i PCI_CONFIG_SPACE_SIZE; ++i) {
if (pdev-used[i])
offset = i + 1;
else if (i - offset + 1 == size)
return offset;
+}
return 0;
}
--
1.7.1
Re: [Qemu-devel] [PATCH v3 08/26] pci_ids: add intel 82801BA pci-to-pci bridge id
On Fri, Oct 19, 2012 at 04:43:31PM -0400, Jason Baron wrote: From: Isaku Yamahata yamah...@valinux.co.jp Adds pci id constants which will be used by q35. Reviewed-by: Paolo Bonzini pbonz...@redhat.com Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp Signed-off-by: Jason Baron jba...@redhat.com Applied, thanks --- hw/pci_ids.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/hw/pci_ids.h b/hw/pci_ids.h index 301bf1c..c1c8a56 100644 --- a/hw/pci_ids.h +++ b/hw/pci_ids.h @@ -104,6 +104,7 @@ #define PCI_DEVICE_ID_INTEL_823780x0484 #define PCI_DEVICE_ID_INTEL_824410x1237 #define PCI_DEVICE_ID_INTEL_82801AA_50x2415 +#define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e #define PCI_DEVICE_ID_INTEL_82801D 0x24CD #define PCI_DEVICE_ID_INTEL_ESB_90x25ab #define PCI_DEVICE_ID_INTEL_82371SB_00x7000 -- 1.7.1
Re: [Qemu-devel] [PATCH v3 04/26] pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzle
On Fri, Oct 19, 2012 at 04:43:28PM -0400, Jason Baron wrote:
From: Isaku Yamahata yamah...@valinux.co.jp
Introduce pci_swizzle_map_irq_fn() for interrupt pin swizzle which is
standardized. PCI bridge swizzle is common logic, by introducing
this function duplicated swizzle logic will be avoided later.
[jba...@redhat.com: drop opaque argument]
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Signed-off-by: Jason Baron jba...@redhat.com
Applied, thanks.
---
hw/pci.c | 18 ++
hw/pci.h |2 ++
2 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index b1b105d..0bcb45e 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1121,6 +1121,24 @@ void pci_device_set_intx_routing_notifier(PCIDevice
*dev,
dev-intx_routing_notifier = notifier;
}
+/*
+ * PCI-to-PCI bridge specification
+ * 9.1: Interrupt routing. Table 9-1
+ *
+ * the PCI Express Base Specification, Revision 2.1
+ * 2.2.8.1: INTx interrutp signaling - Rules
+ * the Implementation Note
+ * Table 2-20
+ */
+/*
+ * 0 = pin = 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD
+ * 0-origin unlike PCI interrupt pin register.
+ */
+int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin)
+{
+return (pin + PCI_SLOT(pci_dev-devfn)) % PCI_NUM_PINS;
+}
+
/***/
/* monitor info on PCI */
diff --git a/hw/pci.h b/hw/pci.h
index d50d26c..c3c9065 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -316,6 +316,8 @@ void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq,
pci_map_irq_fn map_irq,
void *irq_opaque, int nirq);
int pci_bus_get_irq_level(PCIBus *bus, int irq_num);
void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug, DeviceState *dev);
+/* 0 = pin = 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */
+int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin);
PCIBus *pci_register_bus(DeviceState *parent, const char *name,
pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
void *irq_opaque,
--
1.7.1
Re: [Qemu-devel] [PATCH v3 09/26] pci: Add class 0xc05 as 'SMBus'
On Fri, Oct 19, 2012 at 04:43:31PM -0400, Jason Baron wrote:
From: Jan Kiszka jan.kis...@siemens.com
[jba...@redhat.com: add PCI_CLASS_SERIAL_SMBUS definition]
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
Signed-off-by: Jason Baron jba...@redhat.com
Applied, thanks.
---
hw/pci.c |1 +
hw/pci_ids.h |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index 0bcb45e..b7acae3 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1203,6 +1203,7 @@ static const pci_class_desc pci_class_descriptions[] =
{ 0x0c02, SSA controller, ssa},
{ 0x0c03, USB controller, usb},
{ 0x0c04, Fibre channel controller, fibre-channel},
+{ 0x0c05, SMBus},
{ 0, NULL}
};
diff --git a/hw/pci_ids.h b/hw/pci_ids.h
index c1c8a56..26c1d5f 100644
--- a/hw/pci_ids.h
+++ b/hw/pci_ids.h
@@ -31,6 +31,7 @@
#define PCI_CLASS_SYSTEM_OTHER 0x0880
#define PCI_CLASS_SERIAL_USB 0x0c03
+#define PCI_CLASS_SERIAL_SMBUS 0x0c05
#define PCI_CLASS_BRIDGE_HOST0x0600
#define PCI_CLASS_BRIDGE_ISA 0x0601
--
1.7.1
Re: [Qemu-devel] [PATCH v3 10/26] pcie: pass pcie window size to pcie_host_mmcfg_update()
On Fri, Oct 19, 2012 at 04:43:32PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
This allows q35 to pass/set the size of the pcie window in its update routine.
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Jason Baron jba...@redhat.com
Applied, thanks.
---
hw/pcie_host.c | 21 -
hw/pcie_host.h |8 +---
2 files changed, 17 insertions(+), 12 deletions(-)
diff --git a/hw/pcie_host.c b/hw/pcie_host.c
index 28bbe72..e2fd276 100644
--- a/hw/pcie_host.c
+++ b/hw/pcie_host.c
@@ -107,14 +107,9 @@ static const MemoryRegionOps pcie_mmcfg_ops = {
/* pcie_host::base_addr == PCIE_BASE_ADDR_UNMAPPED when it isn't mapped. */
#define PCIE_BASE_ADDR_UNMAPPED ((target_phys_addr_t)-1ULL)
-int pcie_host_init(PCIExpressHost *e, uint32_t size)
+int pcie_host_init(PCIExpressHost *e)
{
-assert(!(size (size - 1))); /* power of 2 */
-assert(size = PCIE_MMCFG_SIZE_MIN);
-assert(size = PCIE_MMCFG_SIZE_MAX);
e-base_addr = PCIE_BASE_ADDR_UNMAPPED;
-e-size = size;
-memory_region_init_io(e-mmio, pcie_mmcfg_ops, e, pcie-mmcfg,
e-size);
return 0;
}
@@ -123,22 +118,30 @@ void pcie_host_mmcfg_unmap(PCIExpressHost *e)
{
if (e-base_addr != PCIE_BASE_ADDR_UNMAPPED) {
memory_region_del_subregion(get_system_memory(), e-mmio);
+memory_region_destroy(e-mmio);
e-base_addr = PCIE_BASE_ADDR_UNMAPPED;
}
}
-void pcie_host_mmcfg_map(PCIExpressHost *e, target_phys_addr_t addr)
+void pcie_host_mmcfg_map(PCIExpressHost *e, target_phys_addr_t addr,
+ uint32_t size)
{
+assert(!(size (size - 1))); /* power of 2 */
+assert(size = PCIE_MMCFG_SIZE_MIN);
+assert(size = PCIE_MMCFG_SIZE_MAX);
+e-size = size;
+memory_region_init_io(e-mmio, pcie_mmcfg_ops, e, pcie-mmcfg,
e-size);
e-base_addr = addr;
memory_region_add_subregion(get_system_memory(), e-base_addr, e-mmio);
}
void pcie_host_mmcfg_update(PCIExpressHost *e,
int enable,
-target_phys_addr_t addr)
+target_phys_addr_t addr,
+uint32_t size)
{
pcie_host_mmcfg_unmap(e);
if (enable) {
-pcie_host_mmcfg_map(e, addr);
+pcie_host_mmcfg_map(e, addr, size);
}
}
diff --git a/hw/pcie_host.h b/hw/pcie_host.h
index 0074508..2faa54e 100644
--- a/hw/pcie_host.h
+++ b/hw/pcie_host.h
@@ -39,11 +39,13 @@ struct PCIExpressHost {
MemoryRegion mmio;
};
-int pcie_host_init(PCIExpressHost *e, uint32_t size);
+int pcie_host_init(PCIExpressHost *e);
void pcie_host_mmcfg_unmap(PCIExpressHost *e);
-void pcie_host_mmcfg_map(PCIExpressHost *e, target_phys_addr_t addr);
+void pcie_host_mmcfg_map(PCIExpressHost *e, target_phys_addr_t addr,
+ uint32_t size);
void pcie_host_mmcfg_update(PCIExpressHost *e,
int enable,
-target_phys_addr_t addr);
+target_phys_addr_t addr,
+uint32_t size);
#endif /* PCIE_HOST_H */
--
1.7.1
Re: [Qemu-devel] [PATCH v3 11/26] pcie: Convert PCIExpressHost to use the QOM.
On Fri, Oct 19, 2012 at 04:43:33PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
Let's use PCIExpressHost with QOM.
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Acked-by: Andreas Färber afaer...@suse.de
Signed-off-by: Jason Baron jba...@redhat.com
Applied, thanks.
---
hw/pcie_host.c | 14 ++
hw/pcie_host.h |4
2 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/hw/pcie_host.c b/hw/pcie_host.c
index e2fd276..027ba05 100644
--- a/hw/pcie_host.c
+++ b/hw/pcie_host.c
@@ -145,3 +145,17 @@ void pcie_host_mmcfg_update(PCIExpressHost *e,
pcie_host_mmcfg_map(e, addr, size);
}
}
+
+static const TypeInfo pcie_host_type_info = {
+.name = TYPE_PCIE_HOST_BRIDGE,
+.parent = TYPE_PCI_HOST_BRIDGE,
+.abstract = true,
+.instance_size = sizeof(PCIExpressHost),
+};
+
+static void pcie_host_register_types(void)
+{
+type_register_static(pcie_host_type_info);
+}
+
+type_init(pcie_host_register_types)
diff --git a/hw/pcie_host.h b/hw/pcie_host.h
index 2faa54e..2494c71 100644
--- a/hw/pcie_host.h
+++ b/hw/pcie_host.h
@@ -24,6 +24,10 @@
#include pci_host.h
#include memory.h
+#define TYPE_PCIE_HOST_BRIDGE pcie-host-bridge
+#define PCIE_HOST_BRIDGE(obj) \
+OBJECT_CHECK(PCIExpressHost, (obj), TYPE_PCIE_HOST_BRIDGE)
+
struct PCIExpressHost {
PCIHostState pci;
--
1.7.1
Re: [Qemu-devel] [PATCH v3 07/26] pc/piix_pci: factor out smram/pam logic
On Fri, Oct 19, 2012 at 04:43:30PM -0400, Jason Baron wrote:
From: Isaku Yamahata yamah...@valinux.co.jp
Factor out smram/pam logic for later use.
Which will be used by q35 too.
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
[jba...@redhat.com: changes for updated memory API]
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Signed-off-by: Jason Baron jba...@redhat.com
Applied, thanks.
---
hw/i386/Makefile.objs |1 +
hw/pam.c | 120
+
hw/pam.h | 98
hw/piix_pci.c | 65 --
4 files changed, 229 insertions(+), 55 deletions(-)
create mode 100644 hw/pam.c
create mode 100644 hw/pam.h
diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
index 8c764bb..2f0c172 100644
--- a/hw/i386/Makefile.objs
+++ b/hw/i386/Makefile.objs
@@ -6,6 +6,7 @@ obj-y += pci-hotplug.o smbios.o wdt_ib700.o
obj-y += debugcon.o multiboot.o
obj-y += pc_piix.o
obj-y += pc_sysfw.o
+obj-y += pam.o
obj-$(CONFIG_XEN) += xen_platform.o xen_apic.o
obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen-host-pci-device.o
obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o
xen_pt_msi.o
diff --git a/hw/pam.c b/hw/pam.c
new file mode 100644
index 000..9ec5861
--- /dev/null
+++ b/hw/pam.c
@@ -0,0 +1,120 @@
+/*
+ * QEMU i440FX/PIIX3 PCI Bridge Emulation
+ *
+ * Copyright (c) 2006 Fabrice Bellard
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the
rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * Split out from piix_pci.c
+ * Copyright (c) 2011 Isaku Yamahata yamahata at valinux co jp
+ *VA Linux Systems Japan K.K.
+ * Copyright (c) 2012 Jason Baron jba...@redhat.com
+ *
+ */
+
+#include sysemu.h
+#include pam.h
+
+void smram_update(MemoryRegion *smram_region, uint8_t smram,
+ uint8_t smm_enabled)
+{
+bool smram_enabled;
+
+smram_enabled = ((smm_enabled (smram SMRAM_G_SMRAME)) ||
+(smram SMRAM_D_OPEN));
+memory_region_set_enabled(smram_region, !smram_enabled);
+}
+
+void smram_set_smm(uint8_t *host_smm_enabled, int smm, uint8_t smram,
+ MemoryRegion *smram_region)
+{
+uint8_t smm_enabled = (smm != 0);
+if (*host_smm_enabled != smm_enabled) {
+*host_smm_enabled = smm_enabled;
+smram_update(smram_region, smram, *host_smm_enabled);
+}
+}
+
+static void pam_update_seg(PAMMemoryRegion *mem, uint32_t start, uint32_t
size,
+ MemoryRegion *ram_memory,
+ MemoryRegion *pci_address_space,
+ MemoryRegion *system_memory, uint8_t attr)
+{
+if (mem-initialized) {
+memory_region_del_subregion(system_memory, mem-mem);
+memory_region_destroy(mem-mem);
+}
+
+switch (attr) {
+case PAM_ATTR_WE | PAM_ATTR_RE:
+/* RAM */
+memory_region_init_alias(mem-mem, pam-ram, ram_memory,
+ start, size);
+break;
+case PAM_ATTR_RE:
+/* ROM (XXX: not quite correct) */
+memory_region_init_alias(mem-mem, pam-rom, ram_memory,
+ start, size);
+memory_region_set_readonly(mem-mem, true);
+break;
+case PAM_ATTR_WE:
+case 0:
+/* XXX: should distinguish read/write cases */
+memory_region_init_alias(mem-mem, pam-pci, pci_address_space,
+ start, size);
+break;
+default:
+abort();
+break;
+}
+memory_region_add_subregion_overlap(system_memory, start, mem-mem, 1);
+mem-initialized = true;
+
+}
+
+static uint8_t pam_attr(uint8_t val, int hi)
+{
+return (val ((!!hi) * 4)) PAM_ATTR_MASK;
+}
+
+void pam_update(PAMMemoryRegion *mem, int idx, uint8_t val,
+
Re: [Qemu-devel] [PATCH v3 12/26] ich9: Add acpi support and definitions
On Fri, Oct 19, 2012 at 04:43:33PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
Lay the groundwork for subsequent ich9 support.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Signed-off-by: Jason Baron jba...@redhat.com
Applied with one exception, see below.
---
hw/acpi_ich9.c| 315
+
hw/acpi_ich9.h| 47
hw/i386/Makefile.objs |1 +
hw/ich9.h | 207
hw/pci_ids.h | 12 ++
5 files changed, 582 insertions(+), 0 deletions(-)
create mode 100644 hw/acpi_ich9.c
create mode 100644 hw/acpi_ich9.h
create mode 100644 hw/ich9.h
diff --git a/hw/acpi_ich9.c b/hw/acpi_ich9.c
new file mode 100644
index 000..c45921c
--- /dev/null
+++ b/hw/acpi_ich9.c
@@ -0,0 +1,315 @@
+/*
+ * ACPI implementation
+ *
+ * Copyright (c) 2006 Fabrice Bellard
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License version 2 as published by the Free Software Foundation.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
http://www.gnu.org/licenses/
+ */
+/*
+ * Copyright (c) 2009 Isaku Yamahata yamahata at valinux co jp
+ * VA Linux Systems Japan K.K.
+ * Copyright (C) 2012 Jason Baron jba...@redhat.com
+ *
+ * This is based on acpi.c.
+ */
+#include hw.h
+#include pc.h
+#include pci.h
+#include qemu-timer.h
+#include sysemu.h
+#include acpi.h
+
+#include ich9.h
+
+//#define DEBUG
+
+#ifdef DEBUG
+#define ICH9_DEBUG(fmt, ...) \
+do { printf(%s fmt, __func__, ## __VA_ARGS__); } while (0)
+#else
+#define ICH9_DEBUG(fmt, ...)do { } while (0)
+#endif
+
+static void pm_ioport_write_fallback(void *opaque, uint32_t addr, int len,
+ uint32_t val);
+static uint32_t pm_ioport_read_fallback(void *opaque, uint32_t addr, int
len);
+
+static void pm_update_sci(ICH9LPCPMRegs *pm)
+{
+int sci_level, pm1a_sts;
+
+pm1a_sts = acpi_pm1_evt_get_sts(pm-acpi_regs);
+
+sci_level = (((pm1a_sts pm-acpi_regs.pm1.evt.en)
+ (ACPI_BITMASK_RT_CLOCK_ENABLE |
+ ACPI_BITMASK_POWER_BUTTON_ENABLE |
+ ACPI_BITMASK_GLOBAL_LOCK_ENABLE |
+ ACPI_BITMASK_TIMER_ENABLE)) != 0);
+qemu_set_irq(pm-irq, sci_level);
+
+/* schedule a timer interruption if needed */
+acpi_pm_tmr_update(pm-acpi_regs,
+ (pm-acpi_regs.pm1.evt.en
ACPI_BITMASK_TIMER_ENABLE)
+ !(pm1a_sts ACPI_BITMASK_TIMER_STATUS));
+}
+
+static void ich9_pm_update_sci_fn(ACPIREGS *regs)
+{
+ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
+pm_update_sci(pm);
+}
+
+static void pm_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
+{
+ICH9LPCPMRegs *pm = opaque;
+
+switch (addr ICH9_PMIO_MASK) {
+case ICH9_PMIO_GPE0_STS ... (ICH9_PMIO_GPE0_STS + ICH9_PMIO_GPE0_LEN -
1):
+acpi_gpe_ioport_writeb(pm-acpi_regs, addr, val);
+break;
+default:
+break;
+}
+
+ICH9_DEBUG(port=0x%04x val=0x%04x\n, addr, val);
+}
+
+static uint32_t pm_ioport_readb(void *opaque, uint32_t addr)
+{
+ICH9LPCPMRegs *pm = opaque;
+uint32_t val = 0;
+
+switch (addr ICH9_PMIO_MASK) {
+case ICH9_PMIO_GPE0_STS ... (ICH9_PMIO_GPE0_STS + ICH9_PMIO_GPE0_LEN -
1):
+val = acpi_gpe_ioport_readb(pm-acpi_regs, addr);
+break;
+default:
+val = 0;
+break;
+}
+ICH9_DEBUG(port=0x%04x val=0x%04x\n, addr, val);
+return val;
+}
+
+static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
+{
+ICH9LPCPMRegs *pm = opaque;
+
+switch (addr ICH9_PMIO_MASK) {
+case ICH9_PMIO_PM1_STS:
+acpi_pm1_evt_write_sts(pm-acpi_regs, val);
+pm_update_sci(pm);
+break;
+case ICH9_PMIO_PM1_EN:
+pm-acpi_regs.pm1.evt.en = val;
+pm_update_sci(pm);
+break;
+case ICH9_PMIO_PM1_CNT:
+acpi_pm1_cnt_write(pm-acpi_regs, val, 0);
+break;
+default:
+pm_ioport_write_fallback(opaque, addr, 2, val);
+break;
+}
+ICH9_DEBUG(port=0x%04x val=0x%04x\n, addr, val);
+}
+
+static uint32_t pm_ioport_readw(void *opaque, uint32_t addr)
+{
+ICH9LPCPMRegs *pm = opaque;
+uint32_t val;
+
+switch (addr ICH9_PMIO_MASK) {
+case ICH9_PMIO_PM1_STS:
+val = acpi_pm1_evt_get_sts(pm-acpi_regs);
+
Re: [Qemu-devel] [PATCHv3] qemu: enable PV EOI for qemu 1.3
Am 18.10.2012 17:01, schrieb Michael S. Tsirkin: Enable KVM PV EOI by default. You can still disable it with -kvm_pv_eoi cpu flag. To avoid breaking cross-version migration, enable only for qemu 1.3 (or in the future, newer) machine type. Signed-off-by: Michael S. Tsirkin m...@redhat.com Thanks for updating, Reviewed-by: Andreas Färber afaer...@suse.de The commit message is not so telling whether there are any downsides (security implications?) to enabling this by default if supported, so I'll leave it to Anthony to ack/apply this. Regards, Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [PATCH v3 13/26] ich9: Add the lpc chip
On Fri, Oct 19, 2012 at 04:43:34PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
Add support for the ich9 LPC chip.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Signed-off-by: Jason Baron jba...@redhat.com
Applied, thanks.
---
hw/i386/Makefile.objs |2 +-
hw/lpc_ich9.c | 523
+
2 files changed, 524 insertions(+), 1 deletions(-)
create mode 100644 hw/lpc_ich9.c
diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
index ba3744d..caf8982 100644
--- a/hw/i386/Makefile.objs
+++ b/hw/i386/Makefile.objs
@@ -7,7 +7,7 @@ obj-y += debugcon.o multiboot.o
obj-y += pc_piix.o
obj-y += pc_sysfw.o
obj-y += pam.o
-obj-y += acpi_ich9.o
+obj-y += acpi_ich9.o lpc_ich9.o
obj-$(CONFIG_XEN) += xen_platform.o xen_apic.o
obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen-host-pci-device.o
obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o
xen_pt_msi.o
diff --git a/hw/lpc_ich9.c b/hw/lpc_ich9.c
new file mode 100644
index 000..d9fd9de
--- /dev/null
+++ b/hw/lpc_ich9.c
@@ -0,0 +1,523 @@
+/*
+ * Copyright (c) 2006 Fabrice Bellard
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the
rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+/*
+ * QEMU ICH9 Emulation
+ *
+ * Copyright (c) 2009, 2010, 2011
+ *Isaku Yamahata yamahata at valinux co jp
+ *VA Linux Systems Japan K.K.
+ * Copyright (C) 2012 Jason Baron jba...@redhat.com
+ *
+ * This is based on piix_pci.c, but heavily modified.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
http://www.gnu.org/licenses/
+ */
+
+#include qemu-common.h
+#include hw.h
+#include range.h
+#include isa.h
+#include sysbus.h
+#include pc.h
+#include apm.h
+#include ioapic.h
+#include pci.h
+#include pcie_host.h
+#include pci_bridge.h
+#include ich9.h
+#include acpi.h
+#include acpi_ich9.h
+#include pam.h
+#include pci_internals.h
+#include exec-memory.h
+
+static int ich9_lpc_sci_irq(ICH9LPCState *lpc);
+
+/*/
+/* ICH9 LPC PCI to ISA bridge */
+
+static void ich9_lpc_reset(DeviceState *qdev);
+
+/* chipset configuration register
+ * to access chipset configuration registers, pci_[sg]et_{byte, word, long}
+ * are used.
+ * Although it's not pci configuration space, it's little endian as Intel.
+ */
+
+static void ich9_cc_update_ir(uint8_t irr[PCI_NUM_PINS], uint16_t ir)
+{
+int intx;
+for (intx = 0; intx PCI_NUM_PINS; intx++) {
+irr[intx] = (ir (intx * ICH9_CC_DIR_SHIFT)) ICH9_CC_DIR_MASK;
+}
+}
+
+static void ich9_cc_update(ICH9LPCState *lpc)
+{
+int slot;
+int pci_intx;
+
+const int reg_offsets[] = {
+ICH9_CC_D25IR,
+ICH9_CC_D26IR,
+ICH9_CC_D27IR,
+ICH9_CC_D28IR,
+ICH9_CC_D29IR,
+ICH9_CC_D30IR,
+ICH9_CC_D31IR,
+};
+const int *offset;
+
+/* D{25 - 31}IR, but D30IR is read only to 0. */
+for (slot = 25, offset = reg_offsets; slot 32; slot++, offset++) {
+if (slot == 30) {
+continue;
+}
+ich9_cc_update_ir(lpc-irr[slot],
+ pci_get_word(lpc-chip_config + *offset));
+}
+
+/*
+ * D30: DMI2PCI bridge
Re: [Qemu-devel] [PATCH v3 14/26] ich9: Add smbus
On Fri, Oct 19, 2012 at 04:43:35PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
Add support for the ich9 smbus chip.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Signed-off-by: Jason Baron jba...@redhat.com
Applied, thanks.
---
hw/i386/Makefile.objs |2 +-
hw/smbus_ich9.c | 159
+
2 files changed, 160 insertions(+), 1 deletions(-)
create mode 100644 hw/smbus_ich9.c
diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
index caf8982..693bd18 100644
--- a/hw/i386/Makefile.objs
+++ b/hw/i386/Makefile.objs
@@ -7,7 +7,7 @@ obj-y += debugcon.o multiboot.o
obj-y += pc_piix.o
obj-y += pc_sysfw.o
obj-y += pam.o
-obj-y += acpi_ich9.o lpc_ich9.o
+obj-y += acpi_ich9.o lpc_ich9.o smbus_ich9.o
obj-$(CONFIG_XEN) += xen_platform.o xen_apic.o
obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen-host-pci-device.o
obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o
xen_pt_msi.o
diff --git a/hw/smbus_ich9.c b/hw/smbus_ich9.c
new file mode 100644
index 000..8c2cd44
--- /dev/null
+++ b/hw/smbus_ich9.c
@@ -0,0 +1,159 @@
+/*
+ * ACPI implementation
+ *
+ * Copyright (c) 2006 Fabrice Bellard
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License version 2 as published by the Free Software Foundation.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
http://www.gnu.org/licenses/
+ */
+/*
+ * Copyright (c) 2009 Isaku Yamahata yamahata at valinux co jp
+ * VA Linux Systems Japan K.K.
+ * Copyright (C) 2012 Jason Baron jba...@redhat.com
+ *
+ * This is based on acpi.c, but heavily rewritten.
+ */
+#include hw.h
+#include pc.h
+#include pm_smbus.h
+#include pci.h
+#include sysemu.h
+#include i2c.h
+#include smbus.h
+
+#include ich9.h
+
+#define TYPE_ICH9_SMB_DEVICE ICH9 SMB
+#define ICH9_SMB_DEVICE(obj) \
+ OBJECT_CHECK(ICH9SMBState, (obj), TYPE_ICH9_SMB_DEVICE)
+
+typedef struct ICH9SMBState {
+PCIDevice dev;
+
+PMSMBus smb;
+MemoryRegion mem_bar;
+} ICH9SMBState;
+
+static const VMStateDescription vmstate_ich9_smbus = {
+.name = ich9_smb,
+.version_id = 1,
+.minimum_version_id = 1,
+.minimum_version_id_old = 1,
+.fields = (VMStateField[]) {
+VMSTATE_PCI_DEVICE(dev, struct ICH9SMBState),
+VMSTATE_END_OF_LIST()
+}
+};
+
+static void ich9_smb_ioport_writeb(void *opaque, target_phys_addr_t addr,
+ uint64_t val, unsigned size)
+{
+ICH9SMBState *s = opaque;
+uint8_t hostc = s-dev.config[ICH9_SMB_HOSTC];
+
+if ((hostc ICH9_SMB_HOSTC_HST_EN) !(hostc ICH9_SMB_HOSTC_I2C_EN))
{
+uint64_t offset = addr -
s-dev.io_regions[ICH9_SMB_SMB_BASE_BAR].addr;
+smb_ioport_writeb(s-smb, offset, val);
+}
+}
+
+static uint64_t ich9_smb_ioport_readb(void *opaque, target_phys_addr_t addr,
+ unsigned size)
+{
+ICH9SMBState *s = opaque;
+uint8_t hostc = s-dev.config[ICH9_SMB_HOSTC];
+
+if ((hostc ICH9_SMB_HOSTC_HST_EN) !(hostc ICH9_SMB_HOSTC_I2C_EN))
{
+uint64_t offset = addr -
s-dev.io_regions[ICH9_SMB_SMB_BASE_BAR].addr;
+return smb_ioport_readb(s-smb, offset);
+}
+
+return 0xff;
+}
+
+static const MemoryRegionOps lpc_smb_mmio_ops = {
+.read = ich9_smb_ioport_readb,
+.write = ich9_smb_ioport_writeb,
+.endianness = DEVICE_LITTLE_ENDIAN,
+.impl = {
+.min_access_size = 1,
+.max_access_size = 1,
+},
+};
+
+static int ich9_smbus_initfn(PCIDevice *d)
+{
+ICH9SMBState *s = ICH9_SMB_DEVICE(d);
+
+/* TODO? D31IP.SMIP in chipset configuration space */
+pci_config_set_interrupt_pin(d-config, 0x01); /* interrupt pin 1 */
+
+pci_set_byte(d-config + ICH9_SMB_HOSTC, 0);
+
+/*
+ * update parameters based on
+ * paralell_hds[0]
+ * serial_hds[0]
+ * serial_hds[0]
+ * fdc
+ *
+ * Is there any OS that depends on them?
+ */
+
+/* TODO smb_io_base */
+pci_set_byte(d-config + ICH9_SMB_HOSTC, 0);
+/* TODO bar0, bar1: 64bit BAR support*/
+
+memory_region_init_io(s-mem_bar, lpc_smb_mmio_ops, s,
ich9-smbus-bar,
+ICH9_SMB_SMB_BASE_SIZE);
+pci_register_bar(d, ICH9_SMB_SMB_BASE_BAR, PCI_BASE_ADDRESS_SPACE_IO,
+s-mem_bar);
+pm_smbus_init(d-qdev, s-smb);
+return 0;
+}
+
+static void ich9_smb_class_init(ObjectClass
[Qemu-devel] [PULL] Memory core fixes
Please pull a few memory core fixes from: git://git.kernel.org/pub/scm/virt/kvm/qemu-kvm.git memory/urgent Fixing ioeventfds on big endian systems, and potential use-after-free (not really exploitable with the current code, but still). Alexander Graf (1): memory: Make eventfd adhere to device endianness Avi Kivity (2): i440fx: avoid destroying memory regions within a transaction memory: abort if a memory region is destroyed during a transaction hw/piix_pci.c | 69 +++-- memory.c | 3 +++ 2 files changed, 38 insertions(+), 34 deletions(-) -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [PATCH v3 12/26] ich9: Add acpi support and definitions
On Fri, Oct 19, 2012 at 04:43:33PM -0400, Jason Baron wrote: From: Jason Baron jba...@redhat.com Lay the groundwork for subsequent ich9 support. Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp Signed-off-by: Jason Baron jba...@redhat.com --- hw/acpi_ich9.c| 315 + hw/acpi_ich9.h| 47 hw/i386/Makefile.objs |1 + hw/ich9.h | 207 hw/pci_ids.h | 12 ++ 5 files changed, 582 insertions(+), 0 deletions(-) create mode 100644 hw/acpi_ich9.c create mode 100644 hw/acpi_ich9.h create mode 100644 hw/ich9.h diff --git a/hw/acpi_ich9.c b/hw/acpi_ich9.c new file mode 100644 index 000..c45921c --- /dev/null +++ b/hw/acpi_ich9.c @@ -0,0 +1,315 @@ +/* + * ACPI implementation + * + * Copyright (c) 2006 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License version 2 as published by the Free Software Foundation. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see http://www.gnu.org/licenses/ + */ +/* + * Copyright (c) 2009 Isaku Yamahata yamahata at valinux co jp + * VA Linux Systems Japan K.K. + * Copyright (C) 2012 Jason Baron jba...@redhat.com + * + * This is based on acpi.c. + */ Anthony, acpi.c header says: * Contributions after 2012-01-13 are licensed under the terms of the * GNU GPL, version 2 or (at your option) any later version. I am guessing it would be hard to guess which parts of this patch are original and which are derivative. -- MST
Re: [Qemu-devel] [PATCH v3 13/26] ich9: Add the lpc chip
On Fri, Oct 19, 2012 at 04:43:34PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
Add support for the ich9 LPC chip.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Signed-off-by: Jason Baron jba...@redhat.com
---
hw/i386/Makefile.objs |2 +-
hw/lpc_ich9.c | 523
+
2 files changed, 524 insertions(+), 1 deletions(-)
create mode 100644 hw/lpc_ich9.c
diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
index ba3744d..caf8982 100644
--- a/hw/i386/Makefile.objs
+++ b/hw/i386/Makefile.objs
@@ -7,7 +7,7 @@ obj-y += debugcon.o multiboot.o
obj-y += pc_piix.o
obj-y += pc_sysfw.o
obj-y += pam.o
-obj-y += acpi_ich9.o
+obj-y += acpi_ich9.o lpc_ich9.o
obj-$(CONFIG_XEN) += xen_platform.o xen_apic.o
obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen-host-pci-device.o
obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o
xen_pt_msi.o
diff --git a/hw/lpc_ich9.c b/hw/lpc_ich9.c
new file mode 100644
index 000..d9fd9de
--- /dev/null
+++ b/hw/lpc_ich9.c
@@ -0,0 +1,523 @@
+/*
+ * Copyright (c) 2006 Fabrice Bellard
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the
rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
Above is confusing until one notices the below this is based on piix_pci.c
and looks at that file.
I think it's best to just use copyright Fabrice selected for all of this file.
Jason, Isaku, could you please both respond whether it's OK with
you both?
+/*
+ * QEMU ICH9 Emulation
+ *
+ * Copyright (c) 2009, 2010, 2011
+ *Isaku Yamahata yamahata at valinux co jp
+ *VA Linux Systems Japan K.K.
+ * Copyright (C) 2012 Jason Baron jba...@redhat.com
+ *
+ * This is based on piix_pci.c, but heavily modified.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
http://www.gnu.org/licenses/
+ */
+
+#include qemu-common.h
+#include hw.h
+#include range.h
+#include isa.h
+#include sysbus.h
+#include pc.h
+#include apm.h
+#include ioapic.h
+#include pci.h
+#include pcie_host.h
+#include pci_bridge.h
+#include ich9.h
+#include acpi.h
+#include acpi_ich9.h
+#include pam.h
+#include pci_internals.h
+#include exec-memory.h
+
+static int ich9_lpc_sci_irq(ICH9LPCState *lpc);
+
+/*/
+/* ICH9 LPC PCI to ISA bridge */
+
+static void ich9_lpc_reset(DeviceState *qdev);
+
+/* chipset configuration register
+ * to access chipset configuration registers, pci_[sg]et_{byte, word, long}
+ * are used.
+ * Although it's not pci configuration space, it's little endian as Intel.
+ */
+
+static void ich9_cc_update_ir(uint8_t irr[PCI_NUM_PINS], uint16_t ir)
+{
+int intx;
+for (intx = 0; intx PCI_NUM_PINS; intx++) {
+irr[intx] = (ir (intx * ICH9_CC_DIR_SHIFT)) ICH9_CC_DIR_MASK;
+}
+}
+
+static void ich9_cc_update(ICH9LPCState *lpc)
+{
+int slot;
+int pci_intx;
+
+const int reg_offsets[] = {
+ICH9_CC_D25IR,
+ICH9_CC_D26IR,
+ICH9_CC_D27IR,
+ICH9_CC_D28IR,
+ICH9_CC_D29IR,
+ICH9_CC_D30IR,
+ICH9_CC_D31IR,
+};
+const int *offset;
+
+/* D{25 - 31}IR, but D30IR is read only to 0. */
+for (slot = 25, offset = reg_offsets; slot 32; slot++,
Re: [Qemu-devel] [patch v4 09/16] memory: introduce mmio request pending to anti nested DMA
On 10/22/2012 11:23 AM, Liu Ping Fan wrote:
Rejecting the nested mmio request which does not aim at RAM, so we
can avoid the potential deadlock caused by the random lock sequence
of two device's local lock.
I can't say I like this but it's better than anything else we have.
}
+int get_context_type(void)
+{
+QemuThread *t = pthread_getspecific(qemu_thread_key);
+return t-context_type;
+}
+
+void set_context_type(int type)
+{
+QemuThread *t = pthread_getspecific(qemu_thread_key);
+t-context_type = type;
+}
Please define an enum so we know what it means.
+
static void *qemu_kvm_cpu_thread_fn(void *arg)
{
CPUArchState *env = arg;
@@ -736,6 +748,8 @@ static void *qemu_kvm_cpu_thread_fn(void *arg)
int r;
pthread_setspecific(qemu_thread_key, cpu-thread);
+set_context_type(0);
+
Setting this for every thread means we're going to miss some.
@@ -3500,7 +3502,8 @@ void cpu_physical_memory_rw(target_phys_addr_t addr,
uint8_t *buf,
qemu_mutex_lock(mem_map_lock);
safe_ref = phys_page_lookup(page, obj_mrs);
qemu_mutex_unlock(mem_map_lock);
-if (safe_ref == 0) {
+
+if (safe_ref == 0 context == 1) {
qemu_mutex_lock_iothread();
qemu_mutex_lock(mem_map_lock);
/* At the 2nd try, mem map can change, so need to judge it again
*/
@@ -3511,7 +3514,9 @@ void cpu_physical_memory_rw(target_phys_addr_t addr,
uint8_t *buf,
}
}
section = obj_mrs;
-
+if (context == 1) {
+nested_dma = thread-mmio_request_pending++ 1 ? 1 : 0;
+}
if (is_write) {
if (!memory_region_is_ram(section-mr)) {
target_phys_addr_t addr1;
@@ -3521,17 +3526,23 @@ void cpu_physical_memory_rw(target_phys_addr_t addr,
uint8_t *buf,
if (l = 4 ((addr1 3) == 0)) {
/* 32 bit write access */
val = ldl_p(buf);
-io_mem_write(section-mr, addr1, val, 4);
+if (!nested_dma) {
+io_mem_write(section-mr, addr1, val, 4);
+}
l = 4;
} else if (l = 2 ((addr1 1) == 0)) {
/* 16 bit write access */
val = lduw_p(buf);
-io_mem_write(section-mr, addr1, val, 2);
+if (!nested_dma) {
+io_mem_write(section-mr, addr1, val, 2);
+}
l = 2;
} else {
/* 8 bit write access */
val = ldub_p(buf);
-io_mem_write(section-mr, addr1, val, 1);
+if (!nested_dma) {
+io_mem_write(section-mr, addr1, val, 1);
+}
l = 1;
}
We need to abort on nested_dma so we know something bad happened and we
have to fix it.
@@ -12,6 +12,9 @@ struct QemuCond {
struct QemuThread {
pthread_t thread;
+/* 0 clean; 1 mmio; 2 io */
+int context_type;
+int mmio_request_pending;
};
QemuThread is at a too low level of abstraction. It's just a wrapper
around the host threading facilities, it shouldn't add anything else.
--
error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [patch v4 10/16] memory: introduce lock ops for MemoryRegionOps
On 10/22/2012 11:23 AM, Liu Ping Fan wrote:
This can help memory core to use mr's fine lock to mmio dispatch.
diff --git a/memory.c b/memory.c
index d528d1f..86d5623 100644
--- a/memory.c
+++ b/memory.c
@@ -1505,13 +1505,27 @@ void set_system_io_map(MemoryRegion *mr)
uint64_t io_mem_read(MemoryRegion *mr, target_phys_addr_t addr, unsigned
size)
{
-return memory_region_dispatch_read(mr, addr, size);
+uint64_t ret;
+if (mr-ops-lock) {
+mr-ops-lock(mr);
+}
+ret = memory_region_dispatch_read(mr, addr, size);
+if (mr-ops-lock) {
+mr-ops-unlock(mr);
+}
+return ret;
}
void io_mem_write(MemoryRegion *mr, target_phys_addr_t addr,
uint64_t val, unsigned size)
{
+if (mr-ops-lock) {
+mr-ops-lock(mr);
+}
memory_region_dispatch_write(mr, addr, val, size);
+if (mr-ops-lock) {
+mr-ops-unlock(mr);
+}
}
typedef struct MemoryRegionList MemoryRegionList;
diff --git a/memory.h b/memory.h
index 9039411..5d00066 100644
--- a/memory.h
+++ b/memory.h
@@ -69,6 +69,8 @@ struct MemoryRegionOps {
unsigned size);
int (*ref)(MemoryRegion *mr);
void (*unref)(MemoryRegion *mr);
+void (*lock)(MemoryRegion *mr);
+void (*unlock)(MemoryRegion *mr);
enum device_endian endianness;
/* Guest-visible constraints: */
Is this really needed? Can't read/write callbacks lock and unlock
themselves?
--
error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [patch v4 11/16] vcpu: push mmio dispatcher out of big lock
On 10/22/2012 11:23 AM, Liu Ping Fan wrote: Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com --- kvm-all.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/kvm-all.c b/kvm-all.c index b3fa597..3d7ae18 100644 --- a/kvm-all.c +++ b/kvm-all.c @@ -1562,12 +1562,15 @@ int kvm_cpu_exec(CPUArchState *env) break; case KVM_EXIT_MMIO: DPRINTF(handle_mmio\n); +qemu_mutex_unlock_iothread(); set_context_type(1); cpu_physical_memory_rw(run-mmio.phys_addr, run-mmio.data, run-mmio.len, run-mmio.is_write); set_context_type(0); +qemu_mutex_lock_iothread(); + ret = 0; break; case KVM_EXIT_IRQ_WINDOW_OPEN: This is fine for now, but of course later we'll have to remove the lock completely and apply it for the other exits (and other processing, when needed). -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [patch v4 11/16] vcpu: push mmio dispatcher out of big lock
On 2012-10-22 12:31, Avi Kivity wrote: On 10/22/2012 11:23 AM, Liu Ping Fan wrote: Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com --- kvm-all.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/kvm-all.c b/kvm-all.c index b3fa597..3d7ae18 100644 --- a/kvm-all.c +++ b/kvm-all.c @@ -1562,12 +1562,15 @@ int kvm_cpu_exec(CPUArchState *env) break; case KVM_EXIT_MMIO: DPRINTF(handle_mmio\n); +qemu_mutex_unlock_iothread(); set_context_type(1); cpu_physical_memory_rw(run-mmio.phys_addr, run-mmio.data, run-mmio.len, run-mmio.is_write); set_context_type(0); +qemu_mutex_lock_iothread(); + ret = 0; break; case KVM_EXIT_IRQ_WINDOW_OPEN: This is fine for now, but of course later we'll have to remove the lock completely and apply it for the other exits (and other processing, when needed). I think we can do this already, I posted a patch some time ago. Jan -- Siemens AG, Corporate Technology, CT RTC ITP SDP-DE Corporate Competence Center Embedded Linux
Re: [Qemu-devel] [PATCH v3 00/26] q35 qemu support
On 10/22/12 12:08, Michael S. Tsirkin wrote: On Mon, Oct 22, 2012 at 07:58:32AM +0200, Gerd Hoffmann wrote: Hi, Would it make sense to temporarily rename the machine type e.g. pc-q35-experimental to stress it's not fully supported? I don't think this is needed as piix will continue to be the default. Well q35 is not yet 100% ready. I know. The point was to hide it from libvirt. libvirt should support pc-q35 not pc-q35-experimental, then it will not cause trouble. You'll not going to hide it that way. Libvirt will just 'qemu -M ?' where q35 will show up even if you rename it to be postfixed -experimental. But as long as 'pc' continues to be the default the causal user will never ever notice q35 is there, at least not with virt-manager (dunno about boxes) as there is simply no gui way to pick the machine type. You'll have to explicitly virsh edit $guest to switch it to q35. So I'm not sure what you are worryed about. But in any case this needs discussion with the libvirt folks to make sure it will actually work as intended. /me tends to think a experimental bit in machine_info (which is then printed by 'qemu -M ?' and the QOM-version of that) is more useful than playing tricks with the name. cheers, Gerd
Re: [Qemu-devel] [patch v4 12/16] e1000: apply fine lock on e1000
On 10/22/2012 11:23 AM, Liu Ping Fan wrote:
Use local lock to protect e1000. When calling the system function,
dropping the fine lock before acquiring the big lock. This will
introduce broken device state, which need extra effort to fix.
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
hw/e1000.c | 24 +++-
1 files changed, 23 insertions(+), 1 deletions(-)
diff --git a/hw/e1000.c b/hw/e1000.c
index ae8a6c5..5eddab5 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -85,6 +85,7 @@ typedef struct E1000State_st {
NICConf conf;
MemoryRegion mmio;
MemoryRegion io;
+QemuMutex e1000_lock;
Can call it 'lock'.
uint32_t mac_reg[0x8000];
uint16_t phy_reg[0x20];
@@ -223,13 +224,27 @@ static const uint32_t mac_reg_init[] = {
static void
set_interrupt_cause(E1000State *s, int index, uint32_t val)
{
+QemuThread *t;
+
if (val (E1000_DEVID = E1000_DEV_ID_82547EI_MOBILE)) {
/* Only for 8257x */
val |= E1000_ICR_INT_ASSERTED;
}
s-mac_reg[ICR] = val;
s-mac_reg[ICS] = val;
-qemu_set_irq(s-dev.irq[0], (s-mac_reg[IMS] s-mac_reg[ICR]) != 0);
+
+t = pthread_getspecific(qemu_thread_key);
+if (t-context_type == 1) {
+qemu_mutex_unlock(s-e1000_lock);
+qemu_mutex_lock_iothread();
+}
+if (DEVICE(s)-state DEV_STATE_STOPPING) {
+qemu_set_irq(s-dev.irq[0], (s-mac_reg[IMS] s-mac_reg[ICR]) !=
0);
+}
+if (t-context_type == 1) {
+qemu_mutex_unlock_iothread();
+qemu_mutex_lock(s-e1000_lock);
+}
}
This is way too complicated for device model authors. There's no way to
get it correct.
If mmio dispatch needs to call a non-thread-safe subsystem, it must
acquire the big lock:
Something like
e1000_mmio_read()
{
if (index NREADOPS macreg_readops[index]){
macreg_lockops[index].lock(s);
ret = macreg_readops[index](s, index);
macreg_lockops[index].unlock(s);
}
DBGOUT(UNKNOWN, MMIO unknown read addr=0x%08x\n, index2);
}
Where .lock() either locks just the local lock, or both locks. As
subsystems are converted to be thread safe, we can remove this.
--
error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [PATCH v2 1/1] atapi: make change media detection for guests easier
Ping, still not reviewed or applied
On Thu, 2012-10-04 at 16:16 +0200, Pavel Hrdina wrote:
If you have a guest with a media in the cdrom and you change it,
the windows and the linux guests cannot properly recognize this
media change.
For this purpose we have to pretend for some time (2s), that we
don't have any media inserted.
v2: disable debug messages
Signed-off-by: Pavel Hrdina phrd...@redhat.com
---
hw/ide/atapi.c| 25 -
hw/ide/core.c | 1 +
hw/ide/internal.h | 1 +
3 files changed, 22 insertions(+), 5 deletions(-)
diff --git a/hw/ide/atapi.c b/hw/ide/atapi.c
index 685cbaa..1f20f10 100644
--- a/hw/ide/atapi.c
+++ b/hw/ide/atapi.c
@@ -73,7 +73,7 @@ static void lba_to_msf(uint8_t *buf, int lba)
static inline int media_present(IDEState *s)
{
-return !s-tray_open s-nb_sectors 0;
+return !s-tray_open s-nb_sectors 0 s-cdrom_changed_timer ==
NULL;
}
/* XXX: DVDs that could fit on a CD will be reported as a CD */
@@ -504,7 +504,7 @@ static unsigned int event_status_media(IDEState *s,
media_status = 0;
if (s-tray_open) {
media_status = MS_TRAY_OPEN;
-} else if (bdrv_is_inserted(s-bs)) {
+} else if (media_present(s)) {
media_status = MS_MEDIA_PRESENT;
}
@@ -1091,6 +1091,14 @@ static const struct {
/* [1] handler detects and reports not ready condition itself */
};
+static void cdrom_changed_timer_cb(void *opaque)
+{
+IDEState *s = opaque;
+qemu_del_timer(s-cdrom_changed_timer);
+qemu_free_timer(s-cdrom_changed_timer);
+s-cdrom_changed_timer = NULL;
+}
+
void ide_atapi_cmd(IDEState *s)
{
uint8_t *buf;
@@ -1125,11 +1133,18 @@ void ide_atapi_cmd(IDEState *s)
* states rely on this behavior.
*/
if (!s-tray_open bdrv_is_inserted(s-bs) s-cdrom_changed) {
-ide_atapi_cmd_error(s, NOT_READY, ASC_MEDIUM_NOT_PRESENT);
+ide_atapi_cmd_error(s, UNIT_ATTENTION, ASC_MEDIUM_MAY_HAVE_CHANGED);
s-cdrom_changed = 0;
-s-sense_key = UNIT_ATTENTION;
-s-asc = ASC_MEDIUM_MAY_HAVE_CHANGED;
+
+if (s-cdrom_changed_timer) {
+cdrom_changed_timer_cb(s);
+}
+s-cdrom_changed_timer = qemu_new_timer_ms(vm_clock,
+ cdrom_changed_timer_cb,
s);
+qemu_mod_timer(s-cdrom_changed_timer,
+ qemu_get_clock_ms(vm_clock) + 2000);
+
return;
}
diff --git a/hw/ide/core.c b/hw/ide/core.c
index d6fb69c..caf30c8 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -1861,6 +1861,7 @@ static void ide_reset(IDEState *s)
s-sense_key = 0;
s-asc = 0;
s-cdrom_changed = 0;
+s-cdrom_changed_timer = NULL;
s-packet_transfer_size = 0;
s-elementary_transfer_size = 0;
s-io_buffer_index = 0;
diff --git a/hw/ide/internal.h b/hw/ide/internal.h
index bf7d313..307ed82 100644
--- a/hw/ide/internal.h
+++ b/hw/ide/internal.h
@@ -382,6 +382,7 @@ struct IDEState {
bool tray_open;
bool tray_locked;
uint8_t cdrom_changed;
+QEMUTimer *cdrom_changed_timer;
int packet_transfer_size;
int elementary_transfer_size;
int io_buffer_index;
Re: [Qemu-devel] [patch v4 13/16] e1000: add busy flag to anti broken device state
On 10/22/2012 11:23 AM, Liu Ping Fan wrote: The broken device state is caused by releasing local lock before acquiring big lock. To fix this issue, we have two choice: 1.use busy flag to protect the state The drawback is that we will introduce independent busy flag for each independent device's logic unit. 2.reload the device's state The drawback is if the call chain is too deep, the action to reload will touch each layer. Also the reloading means to recaculate the intermediate result based on device's regs. This patch adopt the solution 1 to fix the issue. Doesn't the nested mmio patch detect this? -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [PATCH 1/6] qdev: rework device properties.
On (Wed) 17 Oct 2012 [17:14:14], Eduardo Habkost wrote: On Wed, Jul 15, 2009 at 01:43:31PM +0200, Gerd Hoffmann wrote: [...] diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c new file mode 100644 index 000..8b0d0ff --- /dev/null +++ b/hw/qdev-properties.c @@ -0,0 +1,246 @@ Gerd, could you clarify what's the copyright/license of this file? (I mean, at least the copyright/license of the initial version of the file you wrote, below). I am CCing all other authors that touched the file (according to git logs), so they can clarify what's the license they assumed for the file and their contributions. GPLv2+ Amit
Re: [Qemu-devel] [RFC PATCH v3 06/19] Implement -dimm command line option
On 10/19/2012 07:48 PM, Blue Swirl wrote: DIMMs would be allowed to be hotplugged in the generic mem-controller scheme only (unless it makes sense to allow hotplug in the remaining pmc DRBs and start using the generic scheme once we run out of emulated DRBs) 440fx seems a lost cause, so we can go wild and just implement pv dimms. Maybe. But what would be a PV DIMM? Do we need any DIMM-like granularity at all, instead the guest could be told to use a list of RAM regions with arbitrary start and end addresses? Guests are likely to support something that has the same constraints as real hardware. If we allow non-power-of-two DIMMs, we might find that guests don't support them well. Isn't ballooning also related? It is related in that it is also a memory hotplug technology. But ballooning is subtractive and fine-grained where classic hotplug is additive and coarse grained. We can use both together, but I don't think any work is needed at the qemu level. For q35 I'd like to stay within the spec. That may not last forever when machines have terabytes of memory. At least there's work for chipset implementers. Or we can do PV-DIMMs for q35 too. -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [Bug 1066055] Re: Network performance regression with vde_switch
On (Tue) 16 Oct 2012 [09:48:09], Stefan Hajnoczi wrote:
On Mon, Oct 15, 2012 at 09:46:06PM -, Edivaldo de Araujo Pereira wrote:
Hi Stefan,
Thank you, very much for taking the time to help me, and excuse me for
not seeing your answer early...
I've run the procedure you pointed me out, and the result is:
0d8d7690850eb0cf2b2b60933cf47669a6b6f18f is the first bad commit
commit 0d8d7690850eb0cf2b2b60933cf47669a6b6f18f
Author: Amit Shah amit.s...@redhat.com
Date: Tue Sep 25 00:05:15 2012 +0530
virtio: Introduce virtqueue_get_avail_bytes()
The current virtqueue_avail_bytes() is oddly named, and checks if a
particular number of bytes are available in a vq. A better API is to
fetch the number of bytes available in the vq, and let the caller do
what's interesting with the numbers.
Introduce virtqueue_get_avail_bytes(), which returns the number of bytes
for buffers marked for both, in as well as out. virtqueue_avail_bytes()
is made a wrapper over this new function.
Signed-off-by: Amit Shah amit.s...@redhat.com
Signed-off-by: Michael S. Tsirkin m...@redhat.com
:04 04 1a58b06a228651cf844621d9ee2f49b525e36c93
e09ea66ce7f6874921670b6aeab5bea921a5227d M hw
I tried to revert that patch in the latest version, but it obviously
didnt work; I'm trying to figure out the problem, but I don't know very
well the souce code, so I think it's going to take some time. For now,
it's all I could do.
After git-bisect(1) completes it is good to sanity-check the result by
manually testing 0d8d7690850eb0cf2b2b60933cf47669a6b6f18f^ (the commit
just before the bad commit) and 0d8d7690850eb0cf2b2b60933cf47669a6b6f18f
(the bad commit).
This will verify that the commit indeed introduces the regression. I
suggest doing this just to be sure that you've found the bad commit.
Regarding this commit, I notice two things:
1. We will now loop over all vring descriptors because we calculate the
total in/out length instead of returning early as soon as we see
there is enough space. Maybe this makes a difference, although I'm a
little surprised you see such a huge regression.
2. The comparision semantics have changed from:
(in_total += vring_desc_len(desc_pa, i)) = in_bytes
to:
(in_bytes in_bytes in_total)
Notice that virtqueue_avail_bytes() now returns 0 when in_bytes ==
in_total. Previously, it would return 1. Perhaps we are starving or
delaying I/O due to this comparison change. You can easily change
'' to '=' to see if it fixes the issue.
Hi Edivaldo,
Can you try the following patch, that will confirm if it's the
descriptor walk or the botched compare that's causing the regression.
Thanks,
diff --git a/hw/virtio.c b/hw/virtio.c
index 6821092..bb08ed8 100644
--- a/hw/virtio.c
+++ b/hw/virtio.c
@@ -406,8 +406,8 @@ int virtqueue_avail_bytes(VirtQueue *vq, unsigned int
in_bytes,
unsigned int in_total, out_total;
virtqueue_get_avail_bytes(vq, in_total, out_total);
-if ((in_bytes in_bytes in_total)
-|| (out_bytes out_bytes out_total)) {
+if ((in_bytes in_bytes = in_total)
+|| (out_bytes out_bytes = out_total)) {
return 1;
}
return 0;
Amit
Re: [Qemu-devel] 1.1.1 - 1.1.2 migrate /managedsave issue
On 10/22/2012 09:04 AM, Philipp Hahn wrote: Hello Doug, On Saturday 20 October 2012 00:46:43 Doug Goldstein wrote: I'm using libvirt 0.10.2 and I had qemu-kvm 1.1.1 running all my VMs. ... I had upgraded to qemu-kvm 1.1.2 ... qemu: warning: error while loading state for instance 0x0 of device 'ram' load of migration failed That error can be from many things. For me it was that the PXE-ROM images for the network cards were updated as well. Their size changed over the next power-of-two size, so kvm needed to allocate less/more memory and changed some PCI configuration registers, where the size of the ROM region is stored. On loading the saved state those sizes were compared and failed to validate. KVM then aborts loading the saved state with that little helpful message. So you might want to check, if your case is similar to mine. I diagnosed that using gdb to single step kvm until I found hw/pci.c#get_pci_config_device() returning -EINVAL. Seems reasonable. Doug, please verify to see if it's the same issue or another one. Juan, how can we fix this? It's clear that the option ROM size has to be fixed and not change whenever the blob is updated. This will fix it for future releases. But what to do about the ones in the field? -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [PATCH v3 01/26] blockdev: Introduce a default machine blockdev interface field, QEMUMachine-mach_if
Am 22.10.2012 12:47, schrieb Michael S. Tsirkin:
On Fri, Oct 19, 2012 at 04:43:26PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
The current QEMUMachine definition has a 'use_scsi' field to indicate if a
machine type should use scsi by default. However, Q35 wants to use ahci by
default. Thus, introdue a new field in the QEMUMachine defintion, mach_if.
This field should be initialized by the machine type to the default interface
type which it wants to use (IF_SCSI, IF_AHCI, etc.). If no mach_if is
defined,
or it is set to 'IF_DEFAULT' or 'IF_NONE', we currently assume IF_IDE.
Is this default mechanism necessary? Can't we make sure that each
machine does define its preferred interface, and doesn't define it as
IF_DEFAULT (which would be the same as an explicit IF_IDE anyway)?
Also, 'mach_if' isn't a very descriptive name. Something like
'default_drive_if' would be better.
Please use 'static inline int get_mach_if(int mach_if)', when accesssing the
new mach_if field.
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Jason Baron jba...@redhat.com
Kevin, could you review/ack this patch pls?
---
blockdev.c |4 ++--
blockdev.h | 19 +++
hw/boards.h |2 +-
hw/device-hotplug.c |2 +-
hw/highbank.c |2 +-
hw/leon3.c |2 +-
hw/mips_jazz.c |4 ++--
hw/pc_sysfw.c |2 +-
hw/puv3.c |2 +-
hw/realview.c |6 +++---
hw/spapr.c |2 +-
hw/sun4m.c | 24
hw/versatilepb.c|4 ++--
hw/vexpress.c |4 ++--
hw/xilinx_zynq.c|2 +-
vl.c| 20 +++-
16 files changed, 61 insertions(+), 40 deletions(-)
diff --git a/blockdev.c b/blockdev.c
index 99828ad..c9a49c8 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -275,7 +275,7 @@ static bool do_check_io_limits(BlockIOLimit *io_limits)
return true;
}
-DriveInfo *drive_init(QemuOpts *opts, int default_to_scsi)
+DriveInfo *drive_init(QemuOpts *opts, int mach_if)
BlockInterfaceType, not int.
{
const char *buf;
const char *file = NULL;
@@ -325,7 +325,7 @@ DriveInfo *drive_init(QemuOpts *opts, int
default_to_scsi)
return NULL;
}
} else {
-type = default_to_scsi ? IF_SCSI : IF_IDE;
+type = get_mach_if(mach_if);
}
max_devs = if_max_devs[type];
diff --git a/blockdev.h b/blockdev.h
index 5f27b64..8b126ad 100644
--- a/blockdev.h
+++ b/blockdev.h
@@ -40,6 +40,22 @@ struct DriveInfo {
int refcount;
};
+/*
+ * Each qemu machine type defines a mach_if field for its default
+ * interface type. If its unspecified, we set it to IF_IDE.
+ */
+static inline int get_mach_if(int mach_if)
+{
+assert(mach_if IF_COUNT);
+assert(mach_if = IF_DEFAULT);
+
+if ((mach_if == IF_NONE) || (mach_if == IF_DEFAULT)) {
+return IF_IDE;
+}
+
+return mach_if;
+}
+
DriveInfo *drive_get(BlockInterfaceType type, int bus, int unit);
DriveInfo *drive_get_by_index(BlockInterfaceType type, int index);
int drive_get_max_bus(BlockInterfaceType type);
@@ -61,4 +77,7 @@ void qmp_change_blockdev(const char *device, const char
*filename,
bool has_format, const char *format, Error **errp);
void do_commit(Monitor *mon, const QDict *qdict);
int do_drive_del(Monitor *mon, const QDict *qdict, QObject **ret_data);
+
+
+
#endif
diff --git a/hw/boards.h b/hw/boards.h
index a2e0a54..969fd67 100644
--- a/hw/boards.h
+++ b/hw/boards.h
@@ -20,7 +20,7 @@ typedef struct QEMUMachine {
const char *desc;
QEMUMachineInitFunc *init;
QEMUMachineResetFunc *reset;
-int use_scsi;
+int mach_if;
Same here.
Kevin
Re: [Qemu-devel] [PATCH v3 02/26] blockdev: Introduce IF_AHCI
Am 22.10.2012 12:48, schrieb Michael S. Tsirkin:
On Fri, Oct 19, 2012 at 04:43:27PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
Introduce IF_AHCI so that q35 can differentiate between ide and ahci disks.
This allows q35 to specify its default disk type. It also allows q35 to
differentiate between ahci and ide disks, such that -drive if=ide does not
result in the creating of an ahci disk. This is important, since we don't
want
to have the meaning of if=ide changing once q35 is introduced. Thus, its
important for this to be applied before we introduce q35.
This patch also adds:
pci_ahci_create_devs(PCIDevice *pci_dev, DriveInfo **hd_table)
Which provides a convient way of attaching ahci drives to an
ahci controller.
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Jason Baron jba...@redhat.com
---
Kevin, could you review/ack this patch pls?
blockdev.c| 13 -
blockdev.h|2 ++
hw/ide.h |6 ++
hw/ide/ahci.c | 18 ++
hw/ide/core.c | 23 ++-
5 files changed, 56 insertions(+), 6 deletions(-)
diff --git a/blockdev.c b/blockdev.c
index c9a49c8..b684348 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -33,6 +33,7 @@ static const char *const if_name[IF_COUNT] = {
[IF_SD] = sd,
[IF_VIRTIO] = virtio,
[IF_XEN] = xen,
+[IF_AHCI] = ahci,
};
static const int if_max_devs[IF_COUNT] = {
@@ -52,8 +53,17 @@ static const int if_max_devs[IF_COUNT] = {
*/
[IF_IDE] = 2,
[IF_SCSI] = 7,
+[IF_AHCI] = 6,
};
What are the implications of this if we decided to add another AHCI
controller which had a different number of ports? I suspect that a
controller with less than 6 ports breaks when you add more drives than a
single controller can handle, and one with more than 6 ports doesn't use
up all of its ports before it adds another controller.
Markus?
+int get_if_max_devs(BlockInterfaceType if_type)
+{
+assert(if_type IF_COUNT);
+assert(if_type = IF_DEFAULT);
+
+return if_max_devs[if_type];
+}
if_max_devs has a specific obvious meaning within blockdev.c, but
outside it's not as obvious. So this function could use a rename.
/*
* We automatically delete the drive when a device using it gets
* unplugged. Questionable feature, but we can't just drop it.
@@ -518,7 +528,7 @@ DriveInfo *drive_init(QemuOpts *opts, int mach_if)
} else {
/* no id supplied - create one */
dinfo-id = g_malloc0(32);
-if (type == IF_IDE || type == IF_SCSI)
+if (type == IF_IDE || type == IF_SCSI || type == IF_AHCI)
mediastr = (media == MEDIA_CDROM) ? -cd : -hd;
if (max_devs)
snprintf(dinfo-id, 32, %s%i%s%i,
@@ -550,6 +560,7 @@ DriveInfo *drive_init(QemuOpts *opts, int mach_if)
switch(type) {
case IF_IDE:
+case IF_AHCI:
case IF_SCSI:
case IF_XEN:
case IF_NONE:
diff --git a/blockdev.h b/blockdev.h
index 8b126ad..bbd1017 100644
--- a/blockdev.h
+++ b/blockdev.h
@@ -21,6 +21,7 @@ typedef enum {
IF_DEFAULT = -1,/* for use with drive_add() only */
IF_NONE,
IF_IDE, IF_SCSI, IF_FLOPPY, IF_PFLASH, IF_MTD, IF_SD, IF_VIRTIO, IF_XEN,
+IF_AHCI,
IF_COUNT
} BlockInterfaceType;
@@ -56,6 +57,7 @@ static inline int get_mach_if(int mach_if)
return mach_if;
}
+int get_if_max_devs(BlockInterfaceType if_type);
DriveInfo *drive_get(BlockInterfaceType type, int bus, int unit);
DriveInfo *drive_get_by_index(BlockInterfaceType type, int index);
int drive_get_max_bus(BlockInterfaceType type);
diff --git a/hw/ide.h b/hw/ide.h
index 2db4079..0b7e000 100644
--- a/hw/ide.h
+++ b/hw/ide.h
@@ -4,6 +4,7 @@
#include isa.h
#include pci.h
#include memory.h
+#include blockdev.h
#define MAX_IDE_DEVS2
@@ -34,6 +35,11 @@ int ide_get_geometry(BusState *bus, int unit,
int ide_get_bios_chs_trans(BusState *bus, int unit);
/* ide/core.c */
+void ata_drive_get(DriveInfo **hd, int max_bus, BlockInterfaceType type);
void ide_drive_get(DriveInfo **hd, int max_bus);
+void ahci_drive_get(DriveInfo **hd, int max_bus);
+
+/* ide/ahci.c */
+void pci_ahci_create_devs(PCIDevice *pci_dev, DriveInfo **hd_table);
#endif /* HW_IDE_H */
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 68671bc..824b86f 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -26,6 +26,7 @@
#include hw/pc.h
#include hw/pci.h
#include hw/sysbus.h
+#include blockdev.h
#include monitor.h
#include dma.h
@@ -1260,3 +1261,20 @@ static void sysbus_ahci_register_types(void)
}
type_init(sysbus_ahci_register_types)
+
+void pci_ahci_create_devs(PCIDevice *pci_dev, DriveInfo **hd_table)
+{
+struct AHCIPCIState *dev = DO_UPCAST(struct AHCIPCIState, card,
pci_dev);
+int i;
+DriveInfo *drive;
+
+for (i = 0; i dev-ahci.ports; i++) {
+if
[Qemu-devel] [PATCH] update-linux-headers.sh: Handle new kernel uapi/ directories
Recent kernels have moved to keeping the userspace headers in uapi/ subdirectories. This breaks the detection of whether an architecture has KVM support in the kernel because kvm.h has moved in the kernel source tree. Update the check to support both the old and new locations. Signed-off-by: Peter Maydell peter.mayd...@linaro.org --- This would otherwise cause us to ignore the architectures which have moved over to uapi/ (which for QEMU's purposes means everything but x86...) scripts/update-linux-headers.sh |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh index 67be2ef..4c7b566 100755 --- a/scripts/update-linux-headers.sh +++ b/scripts/update-linux-headers.sh @@ -34,7 +34,8 @@ ARCHLIST=$(cd $linux/arch echo *) for arch in $ARCHLIST; do # Discard anything which isn't a KVM-supporting architecture -if ! [ -e $linux/arch/$arch/include/asm/kvm.h ]; then +if ! [ -e $linux/arch/$arch/include/asm/kvm.h ] +! [ -e $linux/arch/$arch/include/uapi/asm/kvm.h ] ; then continue fi -- 1.7.9.5
Re: [Qemu-devel] [PATCH v2 1/1] atapi: make change media detection for guests easier
Am 04.10.2012 16:16, schrieb Pavel Hrdina: If you have a guest with a media in the cdrom and you change it, the windows and the linux guests cannot properly recognize this media change. For this purpose we have to pretend for some time (2s), that we don't have any media inserted. This used to work with the existing code, by exposing an intermediate no medium state for exactly one request. Do you know since when this is broken? Is it a qemu regression, or does it happen only with newer Windows and Linux versions? If possible at all, I'd prefer not to use a timer here. Also I'm relatively sure that your code will break when migrating during the 2s of no medium. Kevin
Re: [Qemu-devel] [PATCHv3] qemu: enable PV EOI for qemu 1.3
On Mon, Oct 22, 2012 at 12:06:42PM +0200, Andreas Färber wrote: Am 18.10.2012 17:01, schrieb Michael S. Tsirkin: Enable KVM PV EOI by default. You can still disable it with -kvm_pv_eoi cpu flag. To avoid breaking cross-version migration, enable only for qemu 1.3 (or in the future, newer) machine type. Signed-off-by: Michael S. Tsirkin m...@redhat.com Thanks for updating, Reviewed-by: Andreas Färber afaer...@suse.de The commit message is not so telling whether there are any downsides (security implications?) to enabling this by default if supported, I don't think there could be security downsides because all this does is tell guest about the feature in a convenient way. A well behaved guest doesn't use a feature unless it's listed but that's irrelevant for security. so I'll leave it to Anthony to ack/apply this. Regards, Andreas It used to be enabled. It was turned off in ef8621b1a3b199c348606c0a11a77d8e8bf135f1 because it affected migration format and doing that just before the release seemed too risky. -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [PATCH v3 00/26] q35 qemu support
On Mon, Oct 22, 2012 at 12:37:39PM +0200, Gerd Hoffmann wrote: On 10/22/12 12:08, Michael S. Tsirkin wrote: On Mon, Oct 22, 2012 at 07:58:32AM +0200, Gerd Hoffmann wrote: Hi, Would it make sense to temporarily rename the machine type e.g. pc-q35-experimental to stress it's not fully supported? I don't think this is needed as piix will continue to be the default. Well q35 is not yet 100% ready. I know. The point was to hide it from libvirt. libvirt should support pc-q35 not pc-q35-experimental, then it will not cause trouble. You'll not going to hide it that way. Libvirt will just 'qemu -M ?' where q35 will show up even if you rename it to be postfixed -experimental. But as long as 'pc' continues to be the default the causal user will never ever notice q35 is there, at least not with virt-manager (dunno about boxes) as there is simply no gui way to pick the machine type. You'll have to explicitly virsh edit $guest to switch it to q35. So I'm not sure what you are worryed about. I worry about need to maintain bug for bug compatibility on the unlikely chance that the work to complete it gets delayed and we release it in an unready state. But in any case this needs discussion with the libvirt folks to make sure it will actually work as intended. /me tends to think a experimental bit in machine_info (which is then printed by 'qemu -M ?' and the QOM-version of that) is more useful than playing tricks with the name. cheers, Gerd I agree it's best to ask libvirt folks what's the right way to hide a machine type from it. Add a flag so it's not listed in -M ? ? Jason, do you know? -- MST
Re: [Qemu-devel] [PATCHv3] qemu: enable PV EOI for qemu 1.3
On Mon, Oct 22, 2012 at 03:12:00PM +0200, Michael S. Tsirkin wrote: On Mon, Oct 22, 2012 at 12:06:42PM +0200, Andreas Färber wrote: Am 18.10.2012 17:01, schrieb Michael S. Tsirkin: Enable KVM PV EOI by default. You can still disable it with -kvm_pv_eoi cpu flag. To avoid breaking cross-version migration, enable only for qemu 1.3 (or in the future, newer) machine type. Signed-off-by: Michael S. Tsirkin m...@redhat.com Thanks for updating, Reviewed-by: Andreas Färber afaer...@suse.de The commit message is not so telling whether there are any downsides (security implications?) to enabling this by default if supported, I don't think there could be security downsides because all this does is tell guest about the feature in a convenient way. A well behaved guest doesn't use a feature unless it's listed but that's irrelevant for security. True. It could be relevant if the host kernel did check the CPUID bits before letting the guest read or write the PV EOI MSR, but that's not the case. so I'll leave it to Anthony to ack/apply this. Regards, Andreas It used to be enabled. It was turned off in ef8621b1a3b199c348606c0a11a77d8e8bf135f1 because it affected migration format and doing that just before the release seemed too risky. -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg -- Eduardo
Re: [Qemu-devel] [PATCHv3] qemu: enable PV EOI for qemu 1.3
On Thu, Oct 18, 2012 at 05:01:27PM +0200, Michael S. Tsirkin wrote:
Enable KVM PV EOI by default. You can still disable it with
-kvm_pv_eoi cpu flag. To avoid breaking cross-version migration,
enable only for qemu 1.3 (or in the future, newer) machine type.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
Reviewed-by: Eduardo Habkost ehabk...@redhat.com
---
Changes from v2:
Address comments by Andreas:
whitespace fixes and moving function around
Changes from v1:
Address comments by Eduardo:
use include instead of duplicate definition
reduce ifdef spagetti in code using features mask
rename init from _pv_eoi to _1_3 to enable adding
more stuff in this version
hw/pc_piix.c | 15 ++-
target-i386/cpu.c | 33 -
target-i386/cpu.h | 2 ++
3 files changed, 36 insertions(+), 14 deletions(-)
diff --git a/hw/pc_piix.c b/hw/pc_piix.c
index 82364ab..be69dbd 100644
--- a/hw/pc_piix.c
+++ b/hw/pc_piix.c
@@ -43,6 +43,7 @@
#include xen.h
#include memory.h
#include exec-memory.h
+#include cpu.h
#ifdef CONFIG_XEN
# include xen/hvm/hvm_info_table.h
#endif
@@ -301,6 +302,18 @@ static void pc_init_pci(ram_addr_t ram_size,
initrd_filename, cpu_model, 1, 1);
}
+static void pc_init_pci_1_3(ram_addr_t ram_size,
+const char *boot_device,
+const char *kernel_filename,
+const char *kernel_cmdline,
+const char *initrd_filename,
+const char *cpu_model)
+{
+enable_kvm_pv_eoi();
+pc_init_pci(ram_size, boot_device, kernel_filename,
+kernel_cmdline, initrd_filename, cpu_model);
+}
+
static void pc_init_pci_no_kvmclock(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
@@ -353,7 +366,7 @@ static QEMUMachine pc_machine_v1_3 = {
.name = pc-1.3,
.alias = pc,
.desc = Standard PC,
-.init = pc_init_pci,
+.init = pc_init_pci_1_3,
.max_cpus = 255,
.is_default = 1,
};
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index f3708e6..0f77449 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -124,6 +124,25 @@ typedef struct model_features_t {
int check_cpuid = 0;
int enforce_cpuid = 0;
+#if defined(CONFIG_KVM)
+static uint32_t kvm_default_features = (1 KVM_FEATURE_CLOCKSOURCE) |
+(1 KVM_FEATURE_NOP_IO_DELAY) |
+(1 KVM_FEATURE_MMU_OP) |
+(1 KVM_FEATURE_CLOCKSOURCE2) |
+(1 KVM_FEATURE_ASYNC_PF) |
+(1 KVM_FEATURE_STEAL_TIME) |
+(1 KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
+static const uint32_t kvm_pv_eoi_features = (0x1 KVM_FEATURE_PV_EOI);
+#else
+static uint32_t kvm_default_features = 0;
+static const uint32_t kvm_pv_eoi_features = 0;
+#endif
+
+void enable_kvm_pv_eoi(void)
+{
+kvm_default_features |= kvm_pv_eoi_features;
+}
+
void host_cpuid(uint32_t function, uint32_t count,
uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
{
@@ -1107,7 +1126,7 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def,
const char *cpu_model)
/* Features to be added*/
uint32_t plus_features = 0, plus_ext_features = 0;
uint32_t plus_ext2_features = 0, plus_ext3_features = 0;
-uint32_t plus_kvm_features = 0, plus_svm_features = 0;
+uint32_t plus_kvm_features = kvm_default_features, plus_svm_features = 0;
uint32_t plus_7_0_ebx_features = 0;
/* Features to be removed */
uint32_t minus_features = 0, minus_ext_features = 0;
@@ -1127,18 +1146,6 @@ static int cpu_x86_find_by_name(x86_def_t
*x86_cpu_def, const char *cpu_model)
memcpy(x86_cpu_def, def, sizeof(*def));
}
-#if defined(CONFIG_KVM)
-plus_kvm_features = (1 KVM_FEATURE_CLOCKSOURCE) |
-(1 KVM_FEATURE_NOP_IO_DELAY) |
-(1 KVM_FEATURE_MMU_OP) |
-(1 KVM_FEATURE_CLOCKSOURCE2) |
-(1 KVM_FEATURE_ASYNC_PF) |
-(1 KVM_FEATURE_STEAL_TIME) |
-(1 KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
-#else
-plus_kvm_features = 0;
-#endif
-
add_flagname_to_bitmaps(hypervisor, plus_features,
plus_ext_features, plus_ext2_features, plus_ext3_features,
plus_kvm_features, plus_svm_features, plus_7_0_ebx_features);
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 871c270..de33303 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1188,4 +1188,6 @@ void do_smm_enter(CPUX86State *env1);
void cpu_report_tpr_access(CPUX86State *env, TPRAccess access);
+void enable_kvm_pv_eoi(void);
+
#endif /* CPU_I386_H */
--
MST
--
Eduardo
Re: [Qemu-devel] [PATCH v3 05/26] pc, pc_piix: split out pc nic initialization
On Fri, Oct 19, 2012 at 04:43:29PM -0400, Jason Baron wrote:
From: Isaku Yamahata yamah...@valinux.co.jp
Factor out pc nic initialization.
This simplifies the pc initialization and will reduce the code
duplication of q35 pc initialization.
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Signed-off-by: Jason Baron jba...@redhat.com
Anthony could you pls review/ack this patch?
---
hw/pc.c | 15 +++
hw/pc.h |1 +
hw/pc_piix.c |9 +
3 files changed, 17 insertions(+), 8 deletions(-)
diff --git a/hw/pc.c b/hw/pc.c
index 6c0722d..2c60ff6 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -1100,6 +1100,21 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq
*gsi,
*floppy = fdctrl_init_isa(isa_bus, fd);
}
+void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus)
+{
+int i;
+
+for (i = 0; i nb_nics; i++) {
+NICInfo *nd = nd_table[i];
+
+if (!pci_bus || (nd-model strcmp(nd-model, ne2k_isa) == 0)) {
+pc_init_ne2k_isa(isa_bus, nd);
+} else {
+pci_nic_init_nofail(nd, e1000, NULL);
+}
+}
+}
+
void pc_pci_device_init(PCIBus *pci_bus)
{
int max_bus;
diff --git a/hw/pc.h b/hw/pc.h
index 9923d96..62d14e3 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -125,6 +125,7 @@ void pc_cmos_init(ram_addr_t ram_size, ram_addr_t
above_4g_mem_size,
const char *boot_device,
ISADevice *floppy, BusState *ide0, BusState *ide1,
ISADevice *s);
+void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_pci_device_init(PCIBus *pci_bus);
typedef void (*cpu_set_smm_t)(int smm, void *arg);
diff --git a/hw/pc_piix.c b/hw/pc_piix.c
index 82364ab..705211a 100644
--- a/hw/pc_piix.c
+++ b/hw/pc_piix.c
@@ -233,14 +233,7 @@ static void pc_init1(MemoryRegion *system_memory,
/* init basic PC hardware */
pc_basic_device_init(isa_bus, gsi, rtc_state, floppy, xen_enabled());
-for(i = 0; i nb_nics; i++) {
-NICInfo *nd = nd_table[i];
-
-if (!pci_enabled || (nd-model strcmp(nd-model, ne2k_isa) ==
0))
-pc_init_ne2k_isa(isa_bus, nd);
-else
-pci_nic_init_nofail(nd, e1000, NULL);
-}
+pc_nic_init(isa_bus, pci_bus);
ide_drive_get(hd, MAX_IDE_BUS);
if (pci_enabled) {
--
1.7.1
Re: [Qemu-devel] [PATCH v3 06/26] pc: Move ioapic_init() from pc_piix.c to pc.c
On Fri, Oct 19, 2012 at 04:43:29PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
Move ioapic_init from pc_piix.c to pc.c, to make it a common function.
Rename ioapic_init - ioapic_init_gsi.
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Jason Baron jba...@redhat.com
Anthony, could you pls review/ack this patch?
---
hw/pc.c | 24
hw/pc.h |2 ++
hw/pc_piix.c | 25 +
3 files changed, 27 insertions(+), 24 deletions(-)
diff --git a/hw/pc.c b/hw/pc.c
index 2c60ff6..dd79d14 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -1125,3 +1125,27 @@ void pc_pci_device_init(PCIBus *pci_bus)
pci_create_simple(pci_bus, -1, lsi53c895a);
}
}
+
+void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name)
+{
+DeviceState *dev;
+SysBusDevice *d;
+unsigned int i;
+
+if (kvm_irqchip_in_kernel()) {
+dev = qdev_create(NULL, kvm-ioapic);
+} else {
+dev = qdev_create(NULL, ioapic);
+}
+if (parent_name) {
+object_property_add_child(object_resolve_path(parent_name, NULL),
+ ioapic, OBJECT(dev), NULL);
+}
+qdev_init_nofail(dev);
+d = sysbus_from_qdev(dev);
+sysbus_mmio_map(d, 0, 0xfec0);
+
+for (i = 0; i IOAPIC_NUM_PINS; i++) {
+gsi_state-ioapic_irq[i] = qdev_get_gpio_in(dev, i);
+}
+}
diff --git a/hw/pc.h b/hw/pc.h
index 62d14e3..01c0759 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -131,6 +131,8 @@ void pc_pci_device_init(PCIBus *pci_bus);
typedef void (*cpu_set_smm_t)(int smm, void *arg);
void cpu_smm_register(cpu_set_smm_t callback, void *arg);
+void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
+
/* acpi.c */
extern int acpi_enabled;
extern char *acpi_tables;
diff --git a/hw/pc_piix.c b/hw/pc_piix.c
index 705211a..34c7513 100644
--- a/hw/pc_piix.c
+++ b/hw/pc_piix.c
@@ -94,29 +94,6 @@ static void kvm_piix3_gsi_handler(void *opaque, int n, int
level)
}
}
-static void ioapic_init(GSIState *gsi_state)
-{
-DeviceState *dev;
-SysBusDevice *d;
-unsigned int i;
-
-if (kvm_irqchip_in_kernel()) {
-dev = qdev_create(NULL, kvm-ioapic);
-} else {
-dev = qdev_create(NULL, ioapic);
-}
-/* FIXME: this should be under the piix3. */
-object_property_add_child(object_resolve_path(i440fx, NULL),
- ioapic, OBJECT(dev), NULL);
-qdev_init_nofail(dev);
-d = sysbus_from_qdev(dev);
-sysbus_mmio_map(d, 0, 0xfec0);
-
-for (i = 0; i IOAPIC_NUM_PINS; i++) {
-gsi_state-ioapic_irq[i] = qdev_get_gpio_in(dev, i);
-}
-}
-
/* PC hardware initialisation */
static void pc_init1(MemoryRegion *system_memory,
MemoryRegion *system_io,
@@ -220,7 +197,7 @@ static void pc_init1(MemoryRegion *system_memory,
gsi_state-i8259_irq[i] = i8259[i];
}
if (pci_enabled) {
-ioapic_init(gsi_state);
+ioapic_init_gsi(gsi_state, i440fx);
}
pc_register_ferr_irq(gsi[13]);
--
1.7.1
Re: [Qemu-devel] buildbot failure in qemu on block_mingw32
Am 20.10.2012 03:04, schrieb q...@buildbot.b1-systems.de: The Buildbot has detected a new failure on builder block_mingw32 while building qemu. Full details are available at: http://buildbot.b1-systems.de/qemu/builders/block_mingw32/builds/359 Buildbot URL: http://buildbot.b1-systems.de/qemu/ Buildslave for this Build: kraxel_rhel61 Build Reason: The Nightly scheduler named 'nightly_block' triggered this build Build Source Stamp: [branch block] HEAD Blamelist: BUILD FAILED: failed compile sincerely, -The Buildbot This one is for you, Corey: CCvl.o In file included from /usr/i686-pc-mingw32/sys-root/mingw/include/glib-2.0/glib/gthread.h:36, from /usr/i686-pc-mingw32/sys-root/mingw/include/glib-2.0/glib/gasyncqueue.h:34, from /usr/i686-pc-mingw32/sys-root/mingw/include/glib-2.0/glib.h:34, from qemu-common.h:41, from bitmap.h:15, from vl.c:31: /usr/i686-pc-mingw32/sys-root/mingw/include/glib-2.0/glib/gutils.h:290: warning: redundant redeclaration of 'atexit' /usr/i686-pc-mingw32/sys-root/mingw/include/stdlib.h:371: note: previous declaration of 'atexit' was here vl.c: In function 'parse_add_fd': vl.c:819: warning: implicit declaration of function 'fcntl' vl.c:819: warning: nested extern declaration of 'fcntl' vl.c:819: error: 'F_GETFD' undeclared (first use in this function) vl.c:819: error: (Each undeclared identifier is reported only once vl.c:819: error: for each function it appears in.) vl.c:820: error: 'FD_CLOEXEC' undeclared (first use in this function) make: *** [vl.o] Error 1 Kevin
Re: [Qemu-devel] [PATCH v3 00/26] q35 qemu support
On Fri, Oct 19, 2012 at 04:43:25PM -0400, Jason Baron wrote: Hi, Qemu bits for q35 support, I'm posting the seabios changes separately. The patches require '-M pc_q35' and -L 'seabios dir with q35 changes' on the qemu command line. Hopefully, we can make it the default for x86 at some future point when we feel comfortable with it. Some patches have multiple copyright sections. I realize this is because you copied code from other files but think it would be better to simply keep the original license in this case, just extending list of copyright holders. -- MST
Re: [Qemu-devel] [PATCH 11/12] include core qdev code into *-user, too
On Tue, 16 Oct 2012 16:08:42 -0300
Eduardo Habkost ehabk...@redhat.com wrote:
[...]
diff --git a/qom/qdev-properties.c b/qom/qdev-properties.c
new file mode 100644
index 000..2e82cb9
--- /dev/null
+++ b/qom/qdev-properties.c
[...]
+void qdev_prop_set_globals(DeviceState *dev)
+{
+ObjectClass *class = object_get_class(OBJECT(dev));
+
+do {
+GlobalProperty *prop;
+QTAILQ_FOREACH(prop, global_props, next) {
+if (strcmp(object_class_get_name(class), prop-driver) != 0) {
+continue;
+}
+if (qdev_prop_parse(dev, prop-property, prop-value) != 0) {
+exit(1);
+}
+}
+class = object_class_get_parent(class);
+} while (class);
+}
+
^^^ git complains whitespace line at EOF
Re: [Qemu-devel] [PULL v3 00/23] Integrate DMA into the memory API
On 22 October 2012 10:35, Avi Kivity a...@redhat.com wrote: On 10/15/2012 03:16 PM, Avi Kivity wrote: Rebased tree in the same place: git://git.kernel.org/pub/scm/virt/kvm/qemu-kvm.git memory/dma Anthony, or Blue, can you pull please? The neighbours are starting to complain about the smell. Yes, please -- there's a patch in my nearly-ready-to-post v3 KVM-ARM RFC series which will want these changes... -- PMM
Re: [Qemu-devel] [PATCH 11/12] include core qdev code into *-user, too
On Mon, Oct 22, 2012 at 02:36:01PM +0200, Igor Mammedov wrote:
On Tue, 16 Oct 2012 16:08:42 -0300
Eduardo Habkost ehabk...@redhat.com wrote:
[...]
diff --git a/qom/qdev-properties.c b/qom/qdev-properties.c
new file mode 100644
index 000..2e82cb9
--- /dev/null
+++ b/qom/qdev-properties.c
[...]
+void qdev_prop_set_globals(DeviceState *dev)
+{
+ObjectClass *class = object_get_class(OBJECT(dev));
+
+do {
+GlobalProperty *prop;
+QTAILQ_FOREACH(prop, global_props, next) {
+if (strcmp(object_class_get_name(class), prop-driver) != 0) {
+continue;
+}
+if (qdev_prop_parse(dev, prop-property, prop-value) != 0) {
+exit(1);
+}
+}
+class = object_class_get_parent(class);
+} while (class);
+}
+
^^^ git complains whitespace line at EOF
I will fix it on the next version. Thanks.
--
Eduardo
Re: [Qemu-devel] [PATCH v3 16/26] ich9: Add i82801b11 dmi-to-pci bridge
On Fri, Oct 19, 2012 at 04:43:36PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
Add the dmi-to-pci i82801b11 bridge chip. This is the pci bridge chip
that q35 uses on its host bus for PCI bus arbitration.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Signed-off-by: Jason Baron jba...@redhat.com
Applied, after removing the use of the PCI_CLASS_BRDIGE_PCI_INF_SUB.
I also note that subtractive decoding isn't really supported.
Added a comment to this end.
---
hw/Makefile.objs |1 +
hw/i82801b11.c | 125
++
2 files changed, 126 insertions(+), 0 deletions(-)
create mode 100644 hw/i82801b11.c
diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index 854faa9..ef444d8 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -9,6 +9,7 @@ common-obj-$(CONFIG_PCI) += shpc.o
common-obj-$(CONFIG_PCI) += slotid_cap.o
common-obj-$(CONFIG_PCI) += pci_host.o pcie_host.o
common-obj-$(CONFIG_PCI) += ioh3420.o xio3130_upstream.o xio3130_downstream.o
+common-obj-$(CONFIG_PCI) += i82801b11.o
common-obj-y += watchdog.o
common-obj-$(CONFIG_ISA_MMIO) += isa_mmio.o
common-obj-$(CONFIG_ECC) += ecc.o
diff --git a/hw/i82801b11.c b/hw/i82801b11.c
new file mode 100644
index 000..3d1f996
--- /dev/null
+++ b/hw/i82801b11.c
@@ -0,0 +1,125 @@
+/*
+ * Copyright (c) 2006 Fabrice Bellard
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the
rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+/*
+ * QEMU i82801b11 dmi-to-pci Bridge Emulation
+ *
+ * Copyright (c) 2009, 2010, 2011
+ *Isaku Yamahata yamahata at valinux co jp
+ *VA Linux Systems Japan K.K.
+ * Copyright (C) 2012 Jason Baron jba...@redhat.com
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
http://www.gnu.org/licenses/
+ */
+
+#include pci.h
+#include ich9.h
+
+
+/*/
+/* ICH9 DMI-to-PCI bridge */
+#define I82801ba_SSVID_OFFSET 0x50
+#define I82801ba_SSVID_SVID 0
+#define I82801ba_SSVID_SSID 0
+
+typedef struct I82801b11Bridge {
+PCIBridge br;
+} I82801b11Bridge;
+
+static int i82801b11_bridge_initfn(PCIDevice *d)
+{
+int rc;
+
+rc = pci_bridge_initfn(d);
+if (rc 0) {
+return rc;
+}
+
+rc = pci_bridge_ssvid_init(d, I82801ba_SSVID_OFFSET,
+ I82801ba_SSVID_SVID, I82801ba_SSVID_SSID);
+if (rc 0) {
+goto err_bridge;
+}
+pci_config_set_prog_interface(d-config, PCI_CLASS_BRDIGE_PCI_INF_SUB);
+return 0;
+
+err_bridge:
+pci_bridge_exitfn(d);
+
+return rc;
+}
+
+static void i82801b11_bridge_class_init(ObjectClass *klass, void *data)
+{
+PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+k-is_bridge = 1;
+k-vendor_id = PCI_VENDOR_ID_INTEL;
+k-device_id = PCI_DEVICE_ID_INTEL_82801BA_11;
+k-revision = ICH9_D2P_A2_REVISION;
+k-init = i82801b11_bridge_initfn;
+}
+
+static const TypeInfo i82801b11_bridge_info = {
+.name = i82801b11-bridge,
+.parent= TYPE_PCI_DEVICE,
+.instance_size = sizeof(I82801b11Bridge),
+.class_init= i82801b11_bridge_class_init,
+};
+
+PCIBus *ich9_d2pbr_init(PCIBus *bus, int devfn, int sec_bus)
+{
+PCIDevice
Re: [Qemu-devel] [PATCH v3 14/23] memory: manage coalesced mmio via a MemoryListener
On 9 October 2012 17:32, Avi Kivity a...@redhat.com wrote:
Instead of calling a global function on coalesced mmio changes, which
routes the call to kvm if enabled, add coalesced mmio hooks to
MemoryListener and make kvm use that instead.
-int kvm_coalesce_mmio_region(target_phys_addr_t start, ram_addr_t size)
+static void kvm_coalesce_mmio_region(MemoryListener *listener,
+ MemoryRegionSection *secion,
+ target_phys_addr_t start, ram_addr_t
size)
{
+void (*coalesced_mmio_add)(MemoryListener *listener, MemoryRegionSection
*section,
+ target_phys_addr_t addr, target_phys_addr_t
len);
These disagree about the type of the 'size/len' parameter, which means
this doesn't compile on 32-bit systems where target_phys_addr_t is 64
bits but ram_addr_t is 32 bits:
/home/petmay01/git/qemu/kvm-all.c:818:5: error: initialization from
incompatible pointer type [-Werror]
/home/petmay01/git/qemu/kvm-all.c:818:5: error: (near initialization
for ‘kvm_memory_listener.coalesced_mmio_add’) [-Werror]
/home/petmay01/git/qemu/kvm-all.c:819:5: error: initialization from
incompatible pointer type [-Werror]
/home/petmay01/git/qemu/kvm-all.c:819:5: error: (near initialization
for ‘kvm_memory_listener.coalesced_mmio_del’) [-Werror]
-- PMM
Re: [Qemu-devel] [PATCH v3 14/23] memory: manage coalesced mmio via a MemoryListener
On 10/22/2012 02:57 PM, Peter Maydell wrote:
On 9 October 2012 17:32, Avi Kivity a...@redhat.com wrote:
Instead of calling a global function on coalesced mmio changes, which
routes the call to kvm if enabled, add coalesced mmio hooks to
MemoryListener and make kvm use that instead.
-int kvm_coalesce_mmio_region(target_phys_addr_t start, ram_addr_t size)
+static void kvm_coalesce_mmio_region(MemoryListener *listener,
+ MemoryRegionSection *secion,
+ target_phys_addr_t start, ram_addr_t
size)
{
+void (*coalesced_mmio_add)(MemoryListener *listener,
MemoryRegionSection *section,
+ target_phys_addr_t addr, target_phys_addr_t
len);
These disagree about the type of the 'size/len' parameter, which means
this doesn't compile on 32-bit systems where target_phys_addr_t is 64
bits but ram_addr_t is 32 bits:
/home/petmay01/git/qemu/kvm-all.c:818:5: error: initialization from
incompatible pointer type [-Werror]
/home/petmay01/git/qemu/kvm-all.c:818:5: error: (near initialization
for ‘kvm_memory_listener.coalesced_mmio_add’) [-Werror]
/home/petmay01/git/qemu/kvm-all.c:819:5: error: initialization from
incompatible pointer type [-Werror]
/home/petmay01/git/qemu/kvm-all.c:819:5: error: (near initialization
for ‘kvm_memory_listener.coalesced_mmio_del’) [-Werror]
Thanks, fixed and re-pushed.
New HEAD is 1c380f9460522f.
--
error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [PATCH v3 17/26] Add i21154 bridge chip.
On Fri, Oct 19, 2012 at 04:43:37PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
This adds support for the DECchip 21154 PCI bridge.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Signed-off-by: Jason Baron jba...@redhat.com
---
hw/Makefile.objs |2 +-
hw/i21154.c | 113
++
hw/i21154.h |9
3 files changed, 123 insertions(+), 1 deletions(-)
create mode 100644 hw/i21154.c
create mode 100644 hw/i21154.h
diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index ef444d8..eb18a55 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -9,7 +9,7 @@ common-obj-$(CONFIG_PCI) += shpc.o
common-obj-$(CONFIG_PCI) += slotid_cap.o
common-obj-$(CONFIG_PCI) += pci_host.o pcie_host.o
common-obj-$(CONFIG_PCI) += ioh3420.o xio3130_upstream.o xio3130_downstream.o
-common-obj-$(CONFIG_PCI) += i82801b11.o
+common-obj-$(CONFIG_PCI) += i82801b11.o i21154.o
common-obj-y += watchdog.o
common-obj-$(CONFIG_ISA_MMIO) += isa_mmio.o
common-obj-$(CONFIG_ECC) += ecc.o
diff --git a/hw/i21154.c b/hw/i21154.c
new file mode 100644
index 000..93faa59
--- /dev/null
+++ b/hw/i21154.c
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2006 Fabrice Bellard
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the
rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+/*
+ * QEMU i21154 PCI Bridge Emulation
+ *
+ * Copyright (c) 2009, 2010, 2011
+ *Isaku Yamahata yamahata at valinux co jp
+ *VA Linux Systems Japan K.K.
+ * Copyright (C) 2012 Jason Baron jba...@redhat.com
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
http://www.gnu.org/licenses/
+ */
+
+#include i21154.h
+#include pci_ids.h
+#include pci.h
+#include pci_bridge.h
+#include pci_internals.h
+
+/* i21154 pci bridge*/
+
+typedef struct I21154Bridge {
+PCIBridge br;
+} I21154Bridge;
+
+static int i21154_bridge_initfn(PCIDevice *d)
+{
+int rc;
+
+rc = pci_bridge_initfn(d);
+if (rc 0) {
+return rc;
+}
+
+return 0;
+}
+
+#define I21154_REV0x05
+#define I21154_PI 0x00
_PI seems unused
+
+static void i21154_bridge_class_init(ObjectClass *klass, void *data)
+{
+PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+k-is_bridge = 1;
+k-vendor_id = PCI_VENDOR_ID_DEC;
+k-device_id = PCI_DEVICE_ID_DEC_21154;
+k-revision = I21154_REV;
+k-init = i21154_bridge_initfn;
+}
+
+static const TypeInfo i21154_bridge_info = {
+.name = i21154-bridge,
+.parent= TYPE_PCI_DEVICE,
+.instance_size = sizeof(I21154Bridge),
+.class_init= i21154_bridge_class_init,
+};
+
+PCIBridge *i21154_init(PCIBus *bus, int devfn, const char *bus_name,
+ bool multifunction)
+{
+PCIDevice *d;
+PCIBridge *br;
+DeviceState *qdev;
+
+d = pci_create_multifunction(bus, devfn, multifunction, i21154-bridge);
+if (!d) {
+return NULL;
+}
+br = DO_UPCAST(PCIBridge, dev, d);
+qdev = br-dev.qdev;
+
+pci_bridge_map_irq(br, bus_name, pci_swizzle_map_irq_fn);
+qdev_init_nofail(qdev);
+
+return br;
+}
+
+static void i21154_register(void)
+{
+type_register_static(i21154_bridge_info);
+}
+type_init(i21154_register);
Re: [Qemu-devel] [PATCH v3 00/26] q35 qemu support
On 10/22/2012 07:16 AM, Michael S. Tsirkin wrote: I worry about need to maintain bug for bug compatibility on the unlikely chance that the work to complete it gets delayed and we release it in an unready state. But in any case this needs discussion with the libvirt folks to make sure it will actually work as intended. /me tends to think a experimental bit in machine_info (which is then printed by 'qemu -M ?' and the QOM-version of that) is more useful than playing tricks with the name. cheers, Gerd I agree it's best to ask libvirt folks what's the right way to hide a machine type from it. Add a flag so it's not listed in -M ? ? For qemu 1.3, libvirt will NOT be reading '-M ?', but instead calling the 'query-machines' QMP command. If you want a machine to be avoided by libvirt, then perhaps it is best to augment the MachineInfo QMP datatype to add an optional field that says whether a particular machine type is stable enough for libvirt's use. -- Eric Blake ebl...@redhat.com+1-919-301-3266 Libvirt virtualization library http://libvirt.org signature.asc Description: OpenPGP digital signature
Re: [Qemu-devel] [PATCH v3 19/26] q35: Fix non-PCI IRQ processing in ich9_lpc_update_apic
On Fri, Oct 19, 2012 at 04:43:38PM -0400, Jason Baron wrote:
From: Jan Kiszka jan.kis...@siemens.com
Avoid passing a non-PCI IRQ to ich9_gsi_to_pirq. It's wrong and triggers
an assertion.
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
Signed-off-by: Jason Baron jba...@redhat.com
Thanks, applied.
---
hw/lpc_ich9.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/lpc_ich9.c b/hw/lpc_ich9.c
index d9fd9de..a47d7a9 100644
--- a/hw/lpc_ich9.c
+++ b/hw/lpc_ich9.c
@@ -264,9 +264,11 @@ static int ich9_gsi_to_pirq(int gsi)
static void ich9_lpc_update_apic(ICH9LPCState *lpc, int gsi)
{
-int level;
+int level = 0;
-level = pci_bus_get_irq_level(lpc-d.bus, ich9_gsi_to_pirq(gsi));
+if (gsi = ICH9_LPC_PIC_NUM_PINS) {
+level |= pci_bus_get_irq_level(lpc-d.bus, ich9_gsi_to_pirq(gsi));
+}
if (gsi == ich9_lpc_sci_irq(lpc)) {
level |= lpc-sci_level;
}
--
1.7.1
Re: [Qemu-devel] [PATCH v3 24/26] q35: add acpi-based pci hotplug.
On Fri, Oct 19, 2012 at 04:43:41PM -0400, Jason Baron wrote:
From: Jason Baron jba...@redhat.com
Add piix style acpi hotplug to q35.
piix style is an understatement. This is exactly the same
interface probably to enable the same bios code to
run on both piix and q35.
If true let's not duplicate code: please factor relevant
functionality out of piix and reuse.
You might be able to reuse migration support as well:
it seems broken currently so this needs a TODO.
Signed-off-by: Jason Baron jba...@redhat.com
---
hw/acpi_ich9.c | 172
+++-
hw/acpi_ich9.h | 10 +++
2 files changed, 181 insertions(+), 1 deletions(-)
diff --git a/hw/acpi_ich9.c b/hw/acpi_ich9.c
index 61034d3..d5f25c9 100644
--- a/hw/acpi_ich9.c
+++ b/hw/acpi_ich9.c
@@ -41,6 +41,13 @@ do { printf(%s fmt, __func__, ## __VA_ARGS__); } while
(0)
#define ICH9_DEBUG(fmt, ...)do { } while (0)
#endif
+#define PCI_UP_BASE 0xae00
+#define PCI_DOWN_BASE 0xae04
+#define PCI_EJ_BASE 0xae08
+#define PCI_RMV_BASE 0xae0c
+#define ICH9_PCI_HOTPLUG_STATUS 2
+
+
static void pm_ioport_write_fallback(void *opaque, uint32_t addr, int len,
uint32_t val);
static uint32_t pm_ioport_read_fallback(void *opaque, uint32_t addr, int
len);
@@ -55,7 +62,10 @@ static void pm_update_sci(ICH9LPCPMRegs *pm)
(ACPI_BITMASK_RT_CLOCK_ENABLE |
ACPI_BITMASK_POWER_BUTTON_ENABLE |
ACPI_BITMASK_GLOBAL_LOCK_ENABLE |
- ACPI_BITMASK_TIMER_ENABLE)) != 0);
+ ACPI_BITMASK_TIMER_ENABLE)) != 0) ||
+ (((pm-acpi_regs.gpe.sts[0] pm-acpi_regs.gpe.en[0])
+ ICH9_PCI_HOTPLUG_STATUS) != 0);
+
qemu_set_irq(pm-irq, sci_level);
/* schedule a timer interruption if needed */
@@ -77,6 +87,7 @@ static void pm_ioport_writeb(void *opaque, uint32_t addr,
uint32_t val)
switch (addr ICH9_PMIO_MASK) {
case ICH9_PMIO_GPE0_STS ... (ICH9_PMIO_GPE0_STS + ICH9_PMIO_GPE0_LEN -
1):
acpi_gpe_ioport_writeb(pm-acpi_regs, addr, val);
+pm_update_sci(pm);
break;
default:
break;
@@ -283,6 +294,65 @@ const VMStateDescription vmstate_ich9_pm = {
}
};
+static void acpi_ich9_eject_slot(ICH9LPCPMRegs *opaque, unsigned slots)
+{
+BusChild *kid, *next;
+ICH9LPCPMRegs *pm = opaque;
+ICH9LPCState *lpc = container_of(pm, ICH9LPCState, pm);
+PCIDevice *s = PCI_DEVICE(lpc);
+BusState *bus = qdev_get_parent_bus(s-qdev);
+int slot = ffs(slots) - 1;
+bool slot_free = true;
+
+/* Mark request as complete */
+pm-pci0_status.down = ~(1U slot);
+
+QTAILQ_FOREACH_SAFE(kid, bus-children, sibling, next) {
+DeviceState *qdev = kid-child;
+PCIDevice *dev = PCI_DEVICE(qdev);
+PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
+if (PCI_SLOT(dev-devfn) == slot) {
+if (pc-no_hotplug) {
+slot_free = false;
+} else {
+qdev_free(qdev);
+}
+}
+}
+if (slot_free) {
+pm-pci0_slot_device_present = ~(1U slot);
+}
+}
+
+static void acpi_ich9_update_hotplug(ICH9LPCPMRegs *pm)
+{
+ICH9LPCState *lpc = container_of(pm, ICH9LPCState, pm);
+PCIDevice *dev = PCI_DEVICE(lpc);
+BusState *bus = qdev_get_parent_bus(dev-qdev);
+BusChild *kid, *next;
+
+/* Execute any pending removes during reset */
+while (pm-pci0_status.down) {
+acpi_ich9_eject_slot(pm, pm-pci0_status.down);
+}
+
+pm-pci0_hotplug_enable = ~0;
+pm-pci0_slot_device_present = 0;
+
+QTAILQ_FOREACH_SAFE(kid, bus-children, sibling, next) {
+DeviceState *qdev = kid-child;
+PCIDevice *pdev = PCI_DEVICE(qdev);
+PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(pdev);
+int slot = PCI_SLOT(pdev-devfn);
+
+if (pc-no_hotplug) {
+pm-pci0_hotplug_enable = ~(1U slot);
+}
+
+pm-pci0_slot_device_present |= (1U slot);
+}
+}
+
static void pm_reset(void *opaque)
{
ICH9LPCPMRegs *pm = opaque;
@@ -300,6 +370,7 @@ static void pm_reset(void *opaque)
}
pm_update_sci(pm);
+acpi_ich9_update_hotplug(pm);
}
static void pm_powerdown_req(Notifier *n, void *opaque)
@@ -309,6 +380,104 @@ static void pm_powerdown_req(Notifier *n, void *opaque)
acpi_pm1_evt_power_down(pm-acpi_regs);
}
+static uint32_t pci_up_read(void *opaque, uint32_t addr)
+{
+ICH9LPCPMRegs *pm = opaque;
+uint32_t val;
+
+/* Manufacture an up value to cause a device check on any hotplug
+ * slot with a device. Extra device checks are harmless. */
+val = pm-pci0_slot_device_present pm-pci0_hotplug_enable;
+
+ICH9_DEBUG(pci_up_read %x\n, val);
+return val;
+}
+
+static uint32_t pci_down_read(void *opaque,
Re: [Qemu-devel] [PATCH v3 00/26] q35 qemu support
On Mon, Oct 22, 2012 at 07:00:56AM -0600, Eric Blake wrote: On 10/22/2012 07:16 AM, Michael S. Tsirkin wrote: I worry about need to maintain bug for bug compatibility on the unlikely chance that the work to complete it gets delayed and we release it in an unready state. But in any case this needs discussion with the libvirt folks to make sure it will actually work as intended. /me tends to think a experimental bit in machine_info (which is then printed by 'qemu -M ?' and the QOM-version of that) is more useful than playing tricks with the name. cheers, Gerd I agree it's best to ask libvirt folks what's the right way to hide a machine type from it. Add a flag so it's not listed in -M ? ? For qemu 1.3, libvirt will NOT be reading '-M ?', but instead calling the 'query-machines' QMP command. If you want a machine to be avoided by libvirt, then perhaps it is best to augment the MachineInfo QMP datatype to add an optional field that says whether a particular machine type is stable enough for libvirt's use. Or just hide this machine type from the query-machines command? -- Eric Blake ebl...@redhat.com+1-919-301-3266 Libvirt virtualization library http://libvirt.org
Re: [Qemu-devel] [PATCH v3 17/26] Add i21154 bridge chip.
Am 19.10.2012 22:43, schrieb Jason Baron: From: Jason Baron jba...@redhat.com This adds support for the DECchip 21154 PCI bridge. Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp Signed-off-by: Jason Baron jba...@redhat.com --- hw/Makefile.objs |2 +- hw/i21154.c | 113 ++ hw/i21154.h |9 3 files changed, 123 insertions(+), 1 deletions(-) create mode 100644 hw/i21154.c create mode 100644 hw/i21154.h Why is this creating a new file and not reusing dec_pci.c? We shouldn't have two parallel implementations of the same chip. Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
[Qemu-devel] qemu - libvirt interaction broken
Hi, Commit 585f60368f23e6603cf86cfdaeceb89d1169f4b8 appearently breaks the libvirt feature detection, my guests fail to start with this message: error: Failed to start domain fedora-org-virtio error: internal error qemu does not support SGA Running libvirt-0.10.2-2.el6.x86_64 cheers, Gerd
[Qemu-devel] KVM call agenda for 2012-10-23
Hi Please send in any agenda topics you are interested in. Later, Juan.
Re: [Qemu-devel] [Bug 1066055] Re: Network performance regression with vde_switch
Dear Amit,
On a suggestion of Stefan, I've already tested the modification in you patch,
and it didn't work; but for confirmation I tested it once again, on the latest
snapshot; same result, that is, it didn't work; the problem is still there.
I didn't take enough time to uderstand the code, so unfortunately I fear there
is not much I could do to solve the problem, apart from trying your
suggestions. But I'll try to spend a little more time on it, until we find a
solution.
Thank you very much.
Edivaldo
--- Em seg, 22/10/12, Amit Shah amit.s...@redhat.com escreveu:
De: Amit Shah amit.s...@redhat.com
Assunto: Re: [Qemu-devel] [Bug 1066055] Re: Network performance regression
with vde_switch
Para: Stefan Hajnoczi stefa...@gmail.com
Cc: Bug 1066055 1066...@bugs.launchpad.net, qemu-devel@nongnu.org,
edivaldoapere...@yahoo.com.br
Data: Segunda-feira, 22 de Outubro de 2012, 4:18
On (Tue) 16 Oct 2012 [09:48:09],
Stefan Hajnoczi wrote:
On Mon, Oct 15, 2012 at 09:46:06PM -, Edivaldo de
Araujo Pereira wrote:
Hi Stefan,
Thank you, very much for taking the time to help
me, and excuse me for
not seeing your answer early...
I've run the procedure you pointed me out, and the
result is:
0d8d7690850eb0cf2b2b60933cf47669a6b6f18f is the
first bad commit
commit 0d8d7690850eb0cf2b2b60933cf47669a6b6f18f
Author: Amit Shah amit.s...@redhat.com
Date: Tue Sep 25 00:05:15 2012
+0530
virtio: Introduce
virtqueue_get_avail_bytes()
The current
virtqueue_avail_bytes() is oddly named, and checks if a
particular number of bytes
are available in a vq. A better API is to
fetch the number of bytes
available in the vq, and let the caller do
what's interesting with
the numbers.
Introduce
virtqueue_get_avail_bytes(), which returns the number of
bytes
for buffers marked for
both, in as well as out. virtqueue_avail_bytes()
is made a wrapper over
this new function.
Signed-off-by: Amit Shah
amit.s...@redhat.com
Signed-off-by: Michael S.
Tsirkin m...@redhat.com
:04 04
1a58b06a228651cf844621d9ee2f49b525e36c93
e09ea66ce7f6874921670b6aeab5bea921a5227d M
hw
I tried to revert that patch in the latest
version, but it obviously
didnt work; I'm trying to figure out the problem,
but I don't know very
well the souce code, so I think it's going to take
some time. For now,
it's all I could do.
After git-bisect(1) completes it is good to
sanity-check the result by
manually testing
0d8d7690850eb0cf2b2b60933cf47669a6b6f18f^ (the commit
just before the bad commit) and
0d8d7690850eb0cf2b2b60933cf47669a6b6f18f
(the bad commit).
This will verify that the commit indeed introduces the
regression. I
suggest doing this just to be sure that you've found
the bad commit.
Regarding this commit, I notice two things:
1. We will now loop over all vring descriptors because
we calculate the
total in/out length instead of returning
early as soon as we see
there is enough space. Maybe this
makes a difference, although I'm a
little surprised you see such a huge
regression.
2. The comparision semantics have changed from:
(in_total +=
vring_desc_len(desc_pa, i)) = in_bytes
to:
(in_bytes in_bytes
in_total)
Notice that virtqueue_avail_bytes() now
returns 0 when in_bytes ==
in_total. Previously, it would
return 1. Perhaps we are starving or
delaying I/O due to this comparison
change. You can easily change
'' to '=' to see if it fixes the
issue.
Hi Edivaldo,
Can you try the following patch, that will confirm if it's
the
descriptor walk or the botched compare that's causing the
regression.
Thanks,
diff --git a/hw/virtio.c b/hw/virtio.c
index 6821092..bb08ed8 100644
--- a/hw/virtio.c
+++ b/hw/virtio.c
@@ -406,8 +406,8 @@ int virtqueue_avail_bytes(VirtQueue *vq,
unsigned int in_bytes,
unsigned int in_total, out_total;
virtqueue_get_avail_bytes(vq,
in_total, out_total);
- if ((in_bytes in_bytes
in_total)
- || (out_bytes
out_bytes out_total)) {
+ if ((in_bytes in_bytes =
in_total)
+ || (out_bytes
out_bytes = out_total)) {
return 1;
}
return 0;
Amit
Re: [Qemu-devel] qemu - libvirt interaction broken
On 22 October 2012 14:28, Gerd Hoffmann kra...@redhat.com wrote: Commit 585f60368f23e6603cf86cfdaeceb89d1169f4b8 appearently breaks the libvirt feature detection, my guests fail to start with this message: error: Failed to start domain fedora-org-virtio error: internal error qemu does not support SGA Running libvirt-0.10.2-2.el6.x86_64 Yeah, this is the commit that means you need an updated libvirt from this point on (and in particular for qemu-1.3). -- PMM
[Qemu-devel] [PATCH] main: Hide F_GETFD and FD_CLOEXEC use for _WIN32
Signed-off-by: Corey Bryant cor...@linux.vnet.ibm.com
---
vl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/vl.c b/vl.c
index 200d849..94c667d 100644
--- a/vl.c
+++ b/vl.c
@@ -812,11 +812,13 @@ static int parse_add_fd(QemuOpts *opts, void *opaque)
return -1;
}
+#ifndef _WIN32
if (fcntl(fd, F_GETFD) FD_CLOEXEC) {
qerror_report(ERROR_CLASS_GENERIC_ERROR,
fd is not valid or already in use);
return -1;
}
+#endif
if (fdset_id 0) {
qerror_report(ERROR_CLASS_GENERIC_ERROR,
--
1.7.11.4
Re: [Qemu-devel] buildbot failure in qemu on block_mingw32
On 10/22/2012 08:30 AM, Kevin Wolf wrote: Am 20.10.2012 03:04, schrieb q...@buildbot.b1-systems.de: The Buildbot has detected a new failure on builder block_mingw32 while building qemu. Full details are available at: http://buildbot.b1-systems.de/qemu/builders/block_mingw32/builds/359 Buildbot URL: http://buildbot.b1-systems.de/qemu/ Buildslave for this Build: kraxel_rhel61 Build Reason: The Nightly scheduler named 'nightly_block' triggered this build Build Source Stamp: [branch block] HEAD Blamelist: BUILD FAILED: failed compile sincerely, -The Buildbot This one is for you, Corey: CCvl.o In file included from /usr/i686-pc-mingw32/sys-root/mingw/include/glib-2.0/glib/gthread.h:36, from /usr/i686-pc-mingw32/sys-root/mingw/include/glib-2.0/glib/gasyncqueue.h:34, from /usr/i686-pc-mingw32/sys-root/mingw/include/glib-2.0/glib.h:34, from qemu-common.h:41, from bitmap.h:15, from vl.c:31: /usr/i686-pc-mingw32/sys-root/mingw/include/glib-2.0/glib/gutils.h:290: warning: redundant redeclaration of 'atexit' /usr/i686-pc-mingw32/sys-root/mingw/include/stdlib.h:371: note: previous declaration of 'atexit' was here vl.c: In function 'parse_add_fd': vl.c:819: warning: implicit declaration of function 'fcntl' vl.c:819: warning: nested extern declaration of 'fcntl' vl.c:819: error: 'F_GETFD' undeclared (first use in this function) vl.c:819: error: (Each undeclared identifier is reported only once vl.c:819: error: for each function it appears in.) vl.c:820: error: 'FD_CLOEXEC' undeclared (first use in this function) make: *** [vl.o] Error 1 Kevin I just sent a patch for this. See subject: [PATCH] main: Hide F_GETFD and FD_CLOEXEC use for _WIN32 -- Regards, Corey Bryant
Re: [Qemu-devel] [PATCH v3 00/26] q35 qemu support
On 10/22/2012 08:23 AM, Michael S. Tsirkin wrote: On Mon, Oct 22, 2012 at 07:00:56AM -0600, Eric Blake wrote: On 10/22/2012 07:16 AM, Michael S. Tsirkin wrote: I worry about need to maintain bug for bug compatibility on the unlikely chance that the work to complete it gets delayed and we release it in an unready state. But in any case this needs discussion with the libvirt folks to make sure it will actually work as intended. /me tends to think a experimental bit in machine_info (which is then printed by 'qemu -M ?' and the QOM-version of that) is more useful than playing tricks with the name. cheers, Gerd I agree it's best to ask libvirt folks what's the right way to hide a machine type from it. Add a flag so it's not listed in -M ? ? For qemu 1.3, libvirt will NOT be reading '-M ?', but instead calling the 'query-machines' QMP command. If you want a machine to be avoided by libvirt, then perhaps it is best to augment the MachineInfo QMP datatype to add an optional field that says whether a particular machine type is stable enough for libvirt's use. Or just hide this machine type from the query-machines command? That would probably work, as well. -- Eric Blake ebl...@redhat.com+1-919-301-3266 Libvirt virtualization library http://libvirt.org signature.asc Description: OpenPGP digital signature
Re: [Qemu-devel] [PATCH 1/5] qemu-char: Add new char backend CircularMemCharDriver
On 10/21/2012 10:47 AM, Lei Li wrote:
Signed-off-by: Lei Li li...@linux.vnet.ibm.com
---
qemu-char.c | 72
+++
1 files changed, 72 insertions(+), 0 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
index b082bae..b174da1 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -2588,6 +2588,78 @@ size_t qemu_chr_mem_osize(const CharDriverState *chr)
return d-outbuf_size;
}
+/*/
+/*CircularMemoryr chardev*/
s/CircularMemoryr/CircularMemory/
+static int cirmem_chr_write(CharDriverState *chr, const uint8_t *buf, int
len)
+{
+CirMemCharDriver *d = chr-opaque;
+int i;
+
+if (len 0) {
+return -1;
+}
+
+/* The size should be a power of 2. */
Shouldn't you enforce that, then?
--
Eric Blake ebl...@redhat.com+1-919-301-3266
Libvirt virtualization library http://libvirt.org
signature.asc
Description: OpenPGP digital signature
[Qemu-devel] [PATCH] cadence_uart: enable tx/rx on reset
Change the cadence_uart such that tx/rx is enabled on reset. Assuming
both are enabled makes debugging early Linux kernel bootup a little bit
easier.
Signed-off-by: Josh Cartwright josh.cartwri...@ni.com
---
I've used this patch mostly for my own testing, but it may be of general
use. On a real system, I would expect the bootloader to leave the uart
in an enabled state, but I'm not using a bootloader for my testing :).
hw/cadence_uart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/cadence_uart.c b/hw/cadence_uart.c
index f8afc4e..2fb21a6 100644
--- a/hw/cadence_uart.c
+++ b/hw/cadence_uart.c
@@ -421,7 +421,7 @@ static const MemoryRegionOps uart_ops = {
static void cadence_uart_reset(UartState *s)
{
-s-r[R_CR] = 0x0128;
+s-r[R_CR] = UART_CR_RX_EN | UART_CR_TX_EN | UART_CR_STOPBRK;
s-r[R_IMR] = 0;
s-r[R_CISR] = 0;
s-r[R_RTRIG] = 0x0020;
--
1.7.12.4
Re: [Qemu-devel] [PATCH v2 3/6] pflash_cfi0x: QOMified
On 22 October 2012 08:19, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
QOMified the pflash_cfi0x so machine models can connect them up in custom
ways.
Kept the pflash_cfi0x_register functions as is. They can still be used to
create a flash straight onto system memory.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -42,6 +42,7 @@
#include qemu-timer.h
#include exec-memory.h
#include host-utils.h
+#include sysbus.h
#define PFLASH_BUG(fmt, ...) \
do { \
@@ -60,21 +61,29 @@ do { \
#endif
struct pflash_t {
+SysBusDevice busdev;
BlockDriverState *bs;
-target_phys_addr_t sector_len;
-int width;
+uint32_t nb_blocs;
+/* FIXME: get rid of target_phys_addr_t usage */
This comment is no longer necessary. If you delete it then
you can mark the next version as
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
-- PMM
[Qemu-devel] [PATCH v5] qemu-config: Add new -add-fd command line option
From: Corey Bryant cor...@linux.vnet.ibm.com
This option can be used for passing file descriptors on the
command line. It mirrors the existing add-fd QMP command which
allows an fd to be passed to QEMU via SCM_RIGHTS and added to an
fd set.
This can be combined with commands such as -drive to link file
descriptors in an fd set to a drive:
qemu-kvm -add-fd fd=3,set=2,opaque=rdwr:/path/to/file
-add-fd fd=4,set=2,opaque=rdonly:/path/to/file
-drive file=/dev/fdset/2,index=0,media=disk
This example adds dups of fds 3 and 4, and the accompanying opaque
strings to the fd set with ID=2. qemu_open() already knows how
to handle a filename of this format. qemu_open() searches the
corresponding fd set for an fd and when it finds a match, QEMU
goes on to use a dup of that fd just like it would have used an
fd that it opened itself.
Signed-off-by: Corey Bryant cor...@linux.vnet.ibm.com
Reviewed-by: Eric Blake ebl...@redhat.com
Signed-off-by: Kevin Wolf kw...@redhat.com
---
Sorry, Corey, hope you're okay with me taking over your patch... Your patch was
against the unmodified version while I already did some changes after the v4
review, so it didn't apply.
This version just completely disables fd passing on Windows as I don't think
it works there anyway. Gives you a nice error message instead of a silently
ignored -add-fd option.
Also added the missing break for case QEMU_OPTION_add_fd.
qemu-config.c | 22 +
qemu-options.hx | 36 +
vl.c| 94 +++
3 files changed, 152 insertions(+), 0 deletions(-)
diff --git a/qemu-config.c b/qemu-config.c
index cd1ec21..601237d 100644
--- a/qemu-config.c
+++ b/qemu-config.c
@@ -653,6 +653,27 @@ QemuOptsList qemu_boot_opts = {
},
};
+static QemuOptsList qemu_add_fd_opts = {
+.name = add-fd,
+.head = QTAILQ_HEAD_INITIALIZER(qemu_add_fd_opts.head),
+.desc = {
+{
+.name = fd,
+.type = QEMU_OPT_NUMBER,
+.help = file descriptor of which a duplicate is added to fd set,
+},{
+.name = set,
+.type = QEMU_OPT_NUMBER,
+.help = ID of the fd set to add fd to,
+},{
+.name = opaque,
+.type = QEMU_OPT_STRING,
+.help = free-form string used to describe fd,
+},
+{ /* end of list */ }
+},
+};
+
static QemuOptsList *vm_config_groups[32] = {
qemu_drive_opts,
qemu_chardev_opts,
@@ -669,6 +690,7 @@ static QemuOptsList *vm_config_groups[32] = {
qemu_boot_opts,
qemu_iscsi_opts,
qemu_sandbox_opts,
+qemu_add_fd_opts,
NULL,
};
diff --git a/qemu-options.hx b/qemu-options.hx
index 46f0539..a67a255 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -253,6 +253,14 @@ qemu-system-i386 -drive file=file,index=2,media=disk
qemu-system-i386 -drive file=file,index=3,media=disk
@end example
+You can open an image using pre-opened file descriptors from an fd set:
+@example
+qemu-system-i386
+-add-fd fd=3,set=2,opaque=rdwr:/path/to/file
+-add-fd fd=4,set=2,opaque=rdonly:/path/to/file
+-drive file=/dev/fdset/2,index=0,media=disk
+@end example
+
You can connect a CDROM to the slave of ide0:
@example
qemu-system-i386 -drive file=file,if=ide,index=1,media=cdrom
@@ -285,6 +293,34 @@ qemu-system-i386 -hda a -hdb b
@end example
ETEXI
+DEF(add-fd, HAS_ARG, QEMU_OPTION_add_fd,
+-add-fd fd=fd,set=set[,opaque=opaque]\n
+Add 'fd' to fd 'set'\n, QEMU_ARCH_ALL)
+STEXI
+@item -add-fd fd=@var{fd},set=@var{set}[,opaque=@var{opaque}]
+@findex -add-fd
+
+Add a file descriptor to an fd set. Valid options are:
+
+@table @option
+@item fd=@var{fd}
+This option defines the file descriptor of which a duplicate is added to fd
set.
+The file descriptor cannot be stdin, stdout, or stderr.
+@item set=@var{set}
+This option defines the ID of the fd set to add the file descriptor to.
+@item opaque=@var{opaque}
+This option defines a free-form string that can be used to describe @var{fd}.
+@end table
+
+You can open an image using pre-opened file descriptors from an fd set:
+@example
+qemu-system-i386
+-add-fd fd=3,set=2,opaque=rdwr:/path/to/file
+-add-fd fd=4,set=2,opaque=rdonly:/path/to/file
+-drive file=/dev/fdset/2,index=0,media=disk
+@end example
+ETEXI
+
DEF(set, HAS_ARG, QEMU_OPTION_set,
-set group.id.arg=value\n
set arg parameter for item id of type group\n
diff --git a/vl.c b/vl.c
index ee3c43a..b870caf 100644
--- a/vl.c
+++ b/vl.c
@@ -790,6 +790,78 @@ static int parse_sandbox(QemuOpts *opts, void *opaque)
return 0;
}
+#ifndef _WIN32
+static int parse_add_fd(QemuOpts *opts, void *opaque)
+{
+int fd, dupfd, flags;
+int64_t fdset_id;
+const char *fd_opaque = NULL;
+
+fd = qemu_opt_get_number(opts, fd, -1);
+fdset_id = qemu_opt_get_number(opts, set, -1);
+fd_opaque = qemu_opt_get(opts, opaque);
+
+if
Re: [Qemu-devel] [PATCH v3 00/26] q35 qemu support
On 22.10.2012, at 16:03, Eric Blake wrote: On 10/22/2012 08:23 AM, Michael S. Tsirkin wrote: On Mon, Oct 22, 2012 at 07:00:56AM -0600, Eric Blake wrote: On 10/22/2012 07:16 AM, Michael S. Tsirkin wrote: I worry about need to maintain bug for bug compatibility on the unlikely chance that the work to complete it gets delayed and we release it in an unready state. But in any case this needs discussion with the libvirt folks to make sure it will actually work as intended. /me tends to think a experimental bit in machine_info (which is then printed by 'qemu -M ?' and the QOM-version of that) is more useful than playing tricks with the name. cheers, Gerd I agree it's best to ask libvirt folks what's the right way to hide a machine type from it. Add a flag so it's not listed in -M ? ? For qemu 1.3, libvirt will NOT be reading '-M ?', but instead calling the 'query-machines' QMP command. If you want a machine to be avoided by libvirt, then perhaps it is best to augment the MachineInfo QMP datatype to add an optional field that says whether a particular machine type is stable enough for libvirt's use. Or just hide this machine type from the query-machines command? That would probably work, as well. You would still want the testing from users behind libvirt, so hiding is not good. Hiding by default with an experimental tag would probably be the best. Alex
Re: [Qemu-devel] [PATCH] Call MADV_HUGEPAGE for guest RAM allocations
On Sun, 21 Oct 2012 05:46:25 +0200 Aurelien Jarno aurel...@aurel32.net wrote: On Mon, Oct 15, 2012 at 03:57:54PM -0300, Luiz Capitulino wrote: On Fri, 5 Oct 2012 16:47:57 -0300 Luiz Capitulino lcapitul...@redhat.com wrote: This makes it possible for QEMU to use transparent huge pages (THP) when transparent_hugepage/enabled=madvise. Otherwise THP is only used when it's enabled system wide. Signed-off-by: Luiz Capitulino lcapitul...@redhat.com ping? --- exec.c | 1 + osdep.h | 5 + 2 files changed, 6 insertions(+) diff --git a/exec.c b/exec.c index 1114a09..7504909 100644 --- a/exec.c +++ b/exec.c @@ -2584,6 +2584,7 @@ ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host, cpu_physical_memory_set_dirty_range(new_block-offset, size, 0xff); qemu_ram_setup_dump(new_block-host, size); +qemu_madvise(new_block-host, size, QEMU_MADV_HUGEPAGE); if (kvm_enabled()) kvm_setup_guest_memory(new_block-host, size); diff --git a/osdep.h b/osdep.h index cb213e0..c5fd3d9 100644 --- a/osdep.h +++ b/osdep.h @@ -108,6 +108,11 @@ void qemu_vfree(void *ptr); #else #define QEMU_MADV_DONTDUMP QEMU_MADV_INVALID #endif +#ifdef MADV_HUGEPAGE +#define QEMU_MADV_HUGEPAGE MADV_HUGEPAGE +#else +#define QEMU_MADV_HUGEPAGE QEMU_MADV_INVALID +#endif #elif defined(CONFIG_POSIX_MADVISE) I don't know this part of QEMU very well, so I tried to compare with how it was done for KSM. I found two main differences: - In the case of -mem-path QEMU doesn't try to mark the pages as mergeable. As I wasn't completely sure that I could mark hugetlbfs areas as mergeable, I skipped them. Also, _iirc_ I based my patch on a RHEL patch by Andrea that did the same thing. Needless to say, but it's trivial to also mark hugetlbfs as mergeable if we want to. Now, marking hugetlbfs areas as HUGEPAGE seems definitely wrong. But would be nice if any of the CC'ed people could clarify these details. - An option (-machine mem-merge=false/true) is provided to enable KSM, defaulting to true. I am not sure if it makes sense for hugepages, but providing a mem-huge=false/true defaulting to true might be a good idea. I thought about doing that, but went with a simpler version to get the discussion started...
[Qemu-devel] [PATCH 04/37] target-i386: filter out not TCG features if running without kvm at realize time
Signed-off-by: Igor Mammedov imamm...@redhat.com
Reviewed-by: Eduardo Habkost ehabk...@redhat.com
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
---
target-i386/cpu.c | 25 ++---
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 2d01705..53b58c0 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1413,17 +1413,7 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
env-cpuid_ext2_features |= (def-features CPUID_EXT2_AMD_ALIASES);
}
-if (!kvm_enabled()) {
-env-cpuid_features = TCG_FEATURES;
-env-cpuid_ext_features = TCG_EXT_FEATURES;
-env-cpuid_ext2_features = (TCG_EXT2_FEATURES
-#ifdef TARGET_X86_64
-| CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
-#endif
-);
-env-cpuid_ext3_features = TCG_EXT3_FEATURES;
-env-cpuid_svm_features = TCG_SVM_FEATURES;
-}
+
object_property_set_str(OBJECT(cpu), def-model_id, model-id, error);
out:
@@ -1882,6 +1872,19 @@ static void mce_init(X86CPU *cpu)
void x86_cpu_realize(Object *obj, Error **errp)
{
X86CPU *cpu = X86_CPU(obj);
+CPUX86State *env = cpu-env;
+
+if (!kvm_enabled()) {
+env-cpuid_features = TCG_FEATURES;
+env-cpuid_ext_features = TCG_EXT_FEATURES;
+env-cpuid_ext2_features = (TCG_EXT2_FEATURES
+#ifdef TARGET_X86_64
+| CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
+#endif
+);
+env-cpuid_ext3_features = TCG_EXT3_FEATURES;
+env-cpuid_svm_features = TCG_SVM_FEATURES;
+}
#ifndef CONFIG_USER_ONLY
qemu_register_reset(x86_cpu_machine_reset_cb, cpu);
--
1.7.11.7
[Qemu-devel] [PATCH 00/37 v5] target-i386: convert CPU features into properties
v5: - Use static properties instead of dynamic ones - Compile in KVM CPUID features only if CONFIG_KVM is defined - Add f-kvm_steal_tm and f-kvmclock_stable CPUID feature names - Some qdev hacking to: - allow iterate over Property[] before object instance exists - find a static bit property definition by specifying bit number and field's offset - Replace error_set() with error_setg() where patches touch it. git tree for testing: https://github.com/imammedo/qemu/tree/x86-cpu-properties.v5 Depends on CPU as Device series: http://lists.nongnu.org/archive/html/qemu-devel/2012-10/msg02776.html Reference to a previous version: http://lists.gnu.org/archive/html/qemu-devel/2012-10/msg00210.html Igor Mammedov (37): target-i386: return Error from cpu_x86_find_by_name() target-i386: cpu_x86_register(): report error from property setter target-i386: if x86_cpu_realize() failed report error and do cleanup target-i386: filter out not TCG features if running without kvm at realize time target-i386: move out CPU features initialization in separate func add visitor for parsing hz[KMG] input string target-i386: use visit_type_hz to parse tsc_freq property value target-i386: define static properties for cpuid features qdev: export qdev_prop_find() and allow it to be used with DeviceClass instead of Object target-i386: parse cpu_model string into set of stringified properties target-i386: introduce vendor-override static property target-i386: convert xlevel to static property target-i386: convert level to static property target-i386: postpone cpuid_level update to realize time target-i386: set default value of hypervisor feature using static property target-i386: set kvm CPUID default feature values using static properties target-i386: make 'f-kvmclock' compatible with legacy behaviour target-i386: add stubs for hyperv_(vapic_recommended|relaxed_timing_enabled|get_spinlock_retries)() qdev: add DEFINE_ABSTRACT_PROP() helper target-i386: convert 'hv_spinlocks' to static property target-i386: convert 'hv_relaxed' to static property target-i386: convert 'hv_vapic' to static property target-i386: convert 'check' and 'enforce' to static properties target-i386: use define for cpuid vendor string size target-i386: replace uint32_t vendor fields by vendor string in x86_def_t target-i386: convert vendor property to static property target-i386: convert tsc-frequency to static property target-i386: convert model-id to static property target-i386: convert stepping to static property target-i386: convert model to static property target-i386: convert family to static property target-i386: use static properties for setting cpuid features qdev: QDEV_PROP_FOREACH and QDEV_CLASS_FOREACH qdev: introduce QDEV_FIND_PROP_FROM_BIT and qdev_prop_find_bit() target-i386: use static properties in check_features_against_host() to print CPUID feature names target-i386: use static properties to list CPUID features target-i386: cleanup cpu_x86_find_by_name(), only fill x86_def_t in it hw/qdev-properties.h| 26 +- qapi/qapi-visit-core.c | 11 + qapi/qapi-visit-core.h |2 + qapi/string-input-visitor.c | 22 + qom/qdev-core.c | 10 +- qom/qdev-properties.c | 50 +- target-i386/cpu.c | 1667 +++ target-i386/cpu.h | 12 +- target-i386/helper.c|9 +- target-i386/hyperv.h|9 +- 10 files changed, 992 insertions(+), 826 deletions(-) -- 1.7.11.7
[Qemu-devel] [PATCH 06/37] add visitor for parsing hz[KMG] input string
Signed-off-by: Igor Mammedov imamm...@redhat.com
Acked-by: Andreas Färber afaer...@suse.de
---
v2:
* replaced _hz suffix for frequency visitor by _freq suffix
suggested-by: Andreas Färber
* fixed typo extra space spotted-by: Andreas Färber
* initialize val, due to a silly CentOS6 compiler warning, that
breakes build when -Werror is set. suggested-by: Don Slutz
---
qapi/qapi-visit-core.c | 11 +++
qapi/qapi-visit-core.h | 2 ++
qapi/string-input-visitor.c | 22 ++
3 files changed, 35 insertions(+)
diff --git a/qapi/qapi-visit-core.c b/qapi/qapi-visit-core.c
index 7a82b63..5c8705e 100644
--- a/qapi/qapi-visit-core.c
+++ b/qapi/qapi-visit-core.c
@@ -311,3 +311,14 @@ void input_type_enum(Visitor *v, int *obj, const char
*strings[],
g_free(enum_str);
*obj = value;
}
+
+void visit_type_freq(Visitor *v, int64_t *obj, const char *name, Error **errp)
+{
+if (!error_is_set(errp)) {
+if (v-type_freq) {
+v-type_freq(v, obj, name, errp);
+} else {
+v-type_int(v, obj, name, errp);
+}
+}
+}
diff --git a/qapi/qapi-visit-core.h b/qapi/qapi-visit-core.h
index 60aceda..e5e7dd7 100644
--- a/qapi/qapi-visit-core.h
+++ b/qapi/qapi-visit-core.h
@@ -62,6 +62,7 @@ struct Visitor
void (*type_int64)(Visitor *v, int64_t *obj, const char *name, Error
**errp);
/* visit_type_size() falls back to (*type_uint64)() if type_size is unset
*/
void (*type_size)(Visitor *v, uint64_t *obj, const char *name, Error
**errp);
+void (*type_freq)(Visitor *v, int64_t *obj, const char *name, Error
**errp);
};
void visit_start_handle(Visitor *v, void **obj, const char *kind,
@@ -91,5 +92,6 @@ void visit_type_size(Visitor *v, uint64_t *obj, const char
*name, Error **errp);
void visit_type_bool(Visitor *v, bool *obj, const char *name, Error **errp);
void visit_type_str(Visitor *v, char **obj, const char *name, Error **errp);
void visit_type_number(Visitor *v, double *obj, const char *name, Error
**errp);
+void visit_type_freq(Visitor *v, int64_t *obj, const char *name, Error **errp);
#endif
diff --git a/qapi/string-input-visitor.c b/qapi/string-input-visitor.c
index 497eb9a..74fe395 100644
--- a/qapi/string-input-visitor.c
+++ b/qapi/string-input-visitor.c
@@ -110,6 +110,27 @@ static void parse_start_optional(Visitor *v, bool *present,
*present = true;
}
+static void parse_type_freq(Visitor *v, int64_t *obj, const char *name,
+Error **errp)
+{
+StringInputVisitor *siv = DO_UPCAST(StringInputVisitor, visitor, v);
+char *endp = (char *) siv-string;
+long long val = 0;
+
+errno = 0;
+if (siv-string) {
+val = strtosz_suffix_unit(siv-string, endp,
+ STRTOSZ_DEFSUFFIX_B, 1000);
+}
+if (!siv-string || val == -1 || *endp) {
+error_set(errp, QERR_INVALID_PARAMETER_VALUE, name,
+ a value representable as a non-negative int64);
+return;
+}
+
+*obj = val;
+}
+
Visitor *string_input_get_visitor(StringInputVisitor *v)
{
return v-visitor;
@@ -132,6 +153,7 @@ StringInputVisitor *string_input_visitor_new(const char
*str)
v-visitor.type_str = parse_type_str;
v-visitor.type_number = parse_type_number;
v-visitor.start_optional = parse_start_optional;
+v-visitor.type_freq = parse_type_freq;
v-string = str;
return v;
--
1.7.11.7
[Qemu-devel] [PATCH 13/37] target-i386: convert level to static property
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 20 +---
1 file changed, 1 insertion(+), 19 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index c9d8dbc..951d12b 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -220,6 +220,7 @@ static Property cpu_x86_properties[] = {
DEFINE_PROP_BIT(f-smap, X86CPU, env.cpuid_7_0_ebx_features, 20, false),
DEFINE_PROP_BIT(vendor-override, X86CPU, env.cpuid_vendor_override, 0,
false),
DEFINE_PROP_UINT32(xlevel, X86CPU, env.cpuid_xlevel, 0),
+DEFINE_PROP_UINT32(level, X86CPU, env.cpuid_level, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -1068,22 +1069,6 @@ static void x86_cpuid_version_set_stepping(Object *obj,
Visitor *v,
env-cpuid_version |= value 0xf;
}
-static void x86_cpuid_get_level(Object *obj, Visitor *v, void *opaque,
-const char *name, Error **errp)
-{
-X86CPU *cpu = X86_CPU(obj);
-
-visit_type_uint32(v, cpu-env.cpuid_level, name, errp);
-}
-
-static void x86_cpuid_set_level(Object *obj, Visitor *v, void *opaque,
-const char *name, Error **errp)
-{
-X86CPU *cpu = X86_CPU(obj);
-
-visit_type_uint32(v, cpu-env.cpuid_level, name, errp);
-}
-
static char *x86_cpuid_get_vendor(Object *obj, Error **errp)
{
X86CPU *cpu = X86_CPU(obj);
@@ -2093,9 +2078,6 @@ static void x86_cpu_initfn(Object *obj)
object_property_add(obj, stepping, int,
x86_cpuid_version_get_stepping,
x86_cpuid_version_set_stepping, NULL, NULL, NULL);
-object_property_add(obj, level, int,
-x86_cpuid_get_level,
-x86_cpuid_set_level, NULL, NULL, NULL);
object_property_add_str(obj, vendor,
x86_cpuid_get_vendor,
x86_cpuid_set_vendor, NULL);
--
1.7.11.7
[Qemu-devel] [PATCH 08/37] target-i386: define static properties for cpuid features
- static properties names of CPUID features are changed to have f- prefix,
so that it would be easy to distinguish them from other properties.
- use X86CPU as a type to count of offset correctly, because env field isn't
starting at CPUstate begining, but located after it.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 112 ++
1 file changed, 112 insertions(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 63ea74b..dbf2be7 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -33,6 +33,7 @@
#include hyperv.h
#include hw/hw.h
+#include hw/qdev-properties.h
#if defined(CONFIG_KVM)
#include linux/kvm_para.h
#endif
@@ -111,6 +112,115 @@ static const char *cpuid_7_0_ebx_feature_name[] = {
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
};
+static Property cpu_x86_properties[] = {
+DEFINE_PROP_BIT(f-fpu, X86CPU, env.cpuid_features, 0, false),
+DEFINE_PROP_BIT(f-vme, X86CPU, env.cpuid_features, 1, false),
+DEFINE_PROP_BIT(f-de, X86CPU, env.cpuid_features, 2, false),
+DEFINE_PROP_BIT(f-pse, X86CPU, env.cpuid_features, 3, false),
+DEFINE_PROP_BIT(f-tsc, X86CPU, env.cpuid_features, 4, false),
+DEFINE_PROP_BIT(f-msr, X86CPU, env.cpuid_features, 5, false),
+DEFINE_PROP_BIT(f-pae, X86CPU, env.cpuid_features, 6, false),
+DEFINE_PROP_BIT(f-mce, X86CPU, env.cpuid_features, 7, false),
+DEFINE_PROP_BIT(f-cx8, X86CPU, env.cpuid_features, 8, false),
+DEFINE_PROP_BIT(f-apic, X86CPU, env.cpuid_features, 9, false),
+DEFINE_PROP_BIT(f-sep, X86CPU, env.cpuid_features, 11, false),
+DEFINE_PROP_BIT(f-mtrr, X86CPU, env.cpuid_features, 12, false),
+DEFINE_PROP_BIT(f-pge, X86CPU, env.cpuid_features, 13, false),
+DEFINE_PROP_BIT(f-mca, X86CPU, env.cpuid_features, 14, false),
+DEFINE_PROP_BIT(f-cmov, X86CPU, env.cpuid_features, 15, false),
+DEFINE_PROP_BIT(f-pat, X86CPU, env.cpuid_features, 16, false),
+DEFINE_PROP_BIT(f-pse36, X86CPU, env.cpuid_features, 17, false),
+DEFINE_PROP_BIT(f-pn /* Intel psn */, X86CPU, env.cpuid_features, 18,
false),
+DEFINE_PROP_BIT(f-clflush /* Intel clfsh */, X86CPU, env.cpuid_features,
19, false),
+DEFINE_PROP_BIT(f-ds /* Intel dts */, X86CPU, env.cpuid_features, 21,
false),
+DEFINE_PROP_BIT(f-acpi, X86CPU, env.cpuid_features, 22, false),
+DEFINE_PROP_BIT(f-mmx, X86CPU, env.cpuid_features, 23, false),
+DEFINE_PROP_BIT(f-fxsr, X86CPU, env.cpuid_features, 24, false),
+DEFINE_PROP_BIT(f-sse, X86CPU, env.cpuid_features, 25, false),
+DEFINE_PROP_BIT(f-sse2, X86CPU, env.cpuid_features, 26, false),
+DEFINE_PROP_BIT(f-ss, X86CPU, env.cpuid_features, 27, false),
+DEFINE_PROP_BIT(f-ht /* Intel htt */, X86CPU, env.cpuid_features, 28,
false),
+DEFINE_PROP_BIT(f-tm, X86CPU, env.cpuid_features, 29, false),
+DEFINE_PROP_BIT(f-ia64, X86CPU, env.cpuid_features, 30, false),
+DEFINE_PROP_BIT(f-pbe, X86CPU, env.cpuid_features, 31, false),
+DEFINE_PROP_BIT(f-pni /* Intel,AMD sse3 */, X86CPU,
env.cpuid_ext_features, 0, false),
+DEFINE_PROP_BIT(f-sse3 /* Intel,AMD sse3 */, X86CPU,
env.cpuid_ext_features, 0, false),
+DEFINE_PROP_BIT(f-pclmulqdq, X86CPU, env.cpuid_ext_features, 1, false),
+DEFINE_PROP_BIT(f-pclmuldq, X86CPU, env.cpuid_ext_features, 1, false),
+DEFINE_PROP_BIT(f-dtes64, X86CPU, env.cpuid_ext_features, 2, false),
+DEFINE_PROP_BIT(f-monitor, X86CPU, env.cpuid_ext_features, 3, false),
+DEFINE_PROP_BIT(f-ds_cpl, X86CPU, env.cpuid_ext_features, 4, false),
+DEFINE_PROP_BIT(f-vmx, X86CPU, env.cpuid_ext_features, 5, false),
+DEFINE_PROP_BIT(f-smx, X86CPU, env.cpuid_ext_features, 6, false),
+DEFINE_PROP_BIT(f-est, X86CPU, env.cpuid_ext_features, 7, false),
+DEFINE_PROP_BIT(f-tm2, X86CPU, env.cpuid_ext_features, 8, false),
+DEFINE_PROP_BIT(f-ssse3, X86CPU, env.cpuid_ext_features, 9, false),
+DEFINE_PROP_BIT(f-cid, X86CPU, env.cpuid_ext_features, 10, false),
+DEFINE_PROP_BIT(f-fma, X86CPU, env.cpuid_ext_features, 12, false),
+DEFINE_PROP_BIT(f-cx16, X86CPU, env.cpuid_ext_features, 13, false),
+DEFINE_PROP_BIT(f-xtpr, X86CPU, env.cpuid_ext_features, 14, false),
+DEFINE_PROP_BIT(f-pdcm, X86CPU, env.cpuid_ext_features, 15, false),
+DEFINE_PROP_BIT(f-pcid, X86CPU, env.cpuid_ext_features, 17, false),
+DEFINE_PROP_BIT(f-dca, X86CPU, env.cpuid_ext_features, 18, false),
+DEFINE_PROP_BIT(f-sse4.1, X86CPU, env.cpuid_ext_features, 19, false),
+DEFINE_PROP_BIT(f-sse4.2, X86CPU, env.cpuid_ext_features, 20, false),
+DEFINE_PROP_BIT(f-sse4_1, X86CPU, env.cpuid_ext_features, 19, false),
+DEFINE_PROP_BIT(f-sse4_2, X86CPU, env.cpuid_ext_features, 20, false),
+DEFINE_PROP_BIT(f-x2apic, X86CPU, env.cpuid_ext_features, 21, false),
+DEFINE_PROP_BIT(f-movbe, X86CPU, env.cpuid_ext_features, 22, false),
+DEFINE_PROP_BIT(f-popcnt, X86CPU, env.cpuid_ext_features, 23, false),
+
[Qemu-devel] [PATCH 25/37] target-i386: replace uint32_t vendor fields by vendor string in x86_def_t
Vendor property setter takes string as vendor value but cpudefs
use uint32_t vendor[123] fields to define vendor value. It makes it
difficult to unify and use property setter for values from cpudefs.
Simplify code by using vendor property setter, vendor[123] fields
are converted into vendor[13] array to keep its value. And vendor
property setter is used to access/set value on CPU.
Signed-off-by: Igor Mammedov imamm...@redhat.com
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
---
[ehabkost: rebase on top of my unduplicate-features branch]
[ehabkost: fix the new CPU models to use the string .vendor field, too,
on the CPU model array]
[ehabkost: keep CPUID_VENDOR_AMD_[123] #defines, as they are used
in the AMD CPU feature alias handling]
---
target-i386/cpu.c | 92 +++
target-i386/cpu.h | 6 ++--
2 files changed, 27 insertions(+), 71 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index ec128c6..09c354c 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -545,7 +545,7 @@ typedef struct x86_def_t {
struct x86_def_t *next;
const char *name;
uint32_t level;
-uint32_t vendor1, vendor2, vendor3;
+char vendor[CPUID_VENDOR_SZ + 1];
int family;
int model;
int stepping;
@@ -610,9 +610,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = qemu64,
.level = 4,
-.vendor1 = CPUID_VENDOR_AMD_1,
-.vendor2 = CPUID_VENDOR_AMD_2,
-.vendor3 = CPUID_VENDOR_AMD_3,
+.vendor = CPUID_VENDOR_AMD,
.family = 6,
.model = 2,
.stepping = 3,
@@ -629,9 +627,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = phenom,
.level = 5,
-.vendor1 = CPUID_VENDOR_AMD_1,
-.vendor2 = CPUID_VENDOR_AMD_2,
-.vendor3 = CPUID_VENDOR_AMD_3,
+.vendor = CPUID_VENDOR_AMD,
.family = 16,
.model = 2,
.stepping = 3,
@@ -675,9 +671,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = kvm64,
.level = 5,
-.vendor1 = CPUID_VENDOR_INTEL_1,
-.vendor2 = CPUID_VENDOR_INTEL_2,
-.vendor3 = CPUID_VENDOR_INTEL_3,
+.vendor = CPUID_VENDOR_INTEL,
.family = 15,
.model = 6,
.stepping = 1,
@@ -776,9 +770,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = athlon,
.level = 2,
-.vendor1 = CPUID_VENDOR_AMD_1,
-.vendor2 = CPUID_VENDOR_AMD_2,
-.vendor3 = CPUID_VENDOR_AMD_3,
+.vendor = CPUID_VENDOR_AMD,
.family = 6,
.model = 2,
.stepping = 3,
@@ -810,9 +802,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = Conroe,
.level = 2,
-.vendor1 = CPUID_VENDOR_INTEL_1,
-.vendor2 = CPUID_VENDOR_INTEL_2,
-.vendor3 = CPUID_VENDOR_INTEL_3,
+.vendor = CPUID_VENDOR_INTEL,
.family = 6,
.model = 2,
.stepping = 3,
@@ -830,9 +820,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = Penryn,
.level = 2,
-.vendor1 = CPUID_VENDOR_INTEL_1,
-.vendor2 = CPUID_VENDOR_INTEL_2,
-.vendor3 = CPUID_VENDOR_INTEL_3,
+.vendor = CPUID_VENDOR_INTEL,
.family = 6,
.model = 2,
.stepping = 3,
@@ -851,9 +839,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = Nehalem,
.level = 2,
-.vendor1 = CPUID_VENDOR_INTEL_1,
-.vendor2 = CPUID_VENDOR_INTEL_2,
-.vendor3 = CPUID_VENDOR_INTEL_3,
+.vendor = CPUID_VENDOR_INTEL,
.family = 6,
.model = 2,
.stepping = 3,
@@ -872,9 +858,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = Westmere,
.level = 11,
-.vendor1 = CPUID_VENDOR_INTEL_1,
-.vendor2 = CPUID_VENDOR_INTEL_2,
-.vendor3 = CPUID_VENDOR_INTEL_3,
+.vendor = CPUID_VENDOR_INTEL,
.family = 6,
.model = 44,
.stepping = 1,
@@ -894,9 +878,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = SandyBridge,
.level = 0xd,
-.vendor1 = CPUID_VENDOR_INTEL_1,
-.vendor2 = CPUID_VENDOR_INTEL_2,
-.vendor3 = CPUID_VENDOR_INTEL_3,
+.vendor = CPUID_VENDOR_INTEL,
.family = 6,
.model = 42,
.stepping = 1,
@@ -919,9 +901,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = Opteron_G1,
.level = 5,
-.vendor1 = CPUID_VENDOR_AMD_1,
-.vendor2 = CPUID_VENDOR_AMD_2,
-.vendor3 = CPUID_VENDOR_AMD_3,
+.vendor = CPUID_VENDOR_AMD,
.family = 15,
.model = 6,
.stepping = 1,
@@ -943,9 +923,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = Opteron_G2,
.level = 5,
-.vendor1 = CPUID_VENDOR_AMD_1,
-.vendor2 = CPUID_VENDOR_AMD_2,
-.vendor3 = CPUID_VENDOR_AMD_3,
+.vendor =
[Qemu-devel] [PATCH 24/37] target-i386: use define for cpuid vendor string size
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 6 +++---
target-i386/cpu.h | 2 ++
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 061ee01..ec128c6 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1265,13 +1265,13 @@ static char *x86_cpuid_get_vendor(Object *obj, Error
**errp)
char *value;
int i;
-value = (char *)g_malloc(12 + 1);
+value = (char *)g_malloc(CPUID_VENDOR_SZ + 1);
for (i = 0; i 4; i++) {
value[i] = env-cpuid_vendor1 (8 * i);
value[i + 4] = env-cpuid_vendor2 (8 * i);
value[i + 8] = env-cpuid_vendor3 (8 * i);
}
-value[12] = '\0';
+value[CPUID_VENDOR_SZ] = '\0';
return value;
}
@@ -1282,7 +1282,7 @@ static void x86_cpuid_set_vendor(Object *obj, const char
*value,
CPUX86State *env = cpu-env;
int i;
-if (strlen(value) != 12) {
+if (strlen(value) != CPUID_VENDOR_SZ) {
error_set(errp, QERR_PROPERTY_VALUE_BAD, ,
vendor, value);
return;
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 69f8691..4296e66 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -488,6 +488,8 @@
#define CPUID_7_0_EBX_SMEP (1 7)
#define CPUID_7_0_EBX_SMAP (1 20)
+#define CPUID_VENDOR_SZ 12
+
#define CPUID_VENDOR_INTEL_1 0x756e6547 /* Genu */
#define CPUID_VENDOR_INTEL_2 0x49656e69 /* ineI */
#define CPUID_VENDOR_INTEL_3 0x6c65746e /* ntel */
--
1.7.11.7
Re: [Qemu-devel] [PATCH v5] qemu-config: Add new -add-fd command line option
On 10/22/2012 10:36 AM, Kevin Wolf wrote:
From: Corey Bryant cor...@linux.vnet.ibm.com
This option can be used for passing file descriptors on the
command line. It mirrors the existing add-fd QMP command which
allows an fd to be passed to QEMU via SCM_RIGHTS and added to an
fd set.
This can be combined with commands such as -drive to link file
descriptors in an fd set to a drive:
qemu-kvm -add-fd fd=3,set=2,opaque=rdwr:/path/to/file
-add-fd fd=4,set=2,opaque=rdonly:/path/to/file
-drive file=/dev/fdset/2,index=0,media=disk
This example adds dups of fds 3 and 4, and the accompanying opaque
strings to the fd set with ID=2. qemu_open() already knows how
to handle a filename of this format. qemu_open() searches the
corresponding fd set for an fd and when it finds a match, QEMU
goes on to use a dup of that fd just like it would have used an
fd that it opened itself.
Signed-off-by: Corey Bryant cor...@linux.vnet.ibm.com
Reviewed-by: Eric Blake ebl...@redhat.com
Signed-off-by: Kevin Wolf kw...@redhat.com
---
Sorry, Corey, hope you're okay with me taking over your patch... Your patch was
against the unmodified version while I already did some changes after the v4
review, so it didn't apply.
That's fine. Thanks for the hand.
This version just completely disables fd passing on Windows as I don't think
it works there anyway. Gives you a nice error message instead of a silently
ignored -add-fd option.
Also added the missing break for case QEMU_OPTION_add_fd.
qemu-config.c | 22 +
qemu-options.hx | 36 +
vl.c| 94 +++
3 files changed, 152 insertions(+), 0 deletions(-)
diff --git a/qemu-config.c b/qemu-config.c
index cd1ec21..601237d 100644
--- a/qemu-config.c
+++ b/qemu-config.c
@@ -653,6 +653,27 @@ QemuOptsList qemu_boot_opts = {
},
};
+static QemuOptsList qemu_add_fd_opts = {
+.name = add-fd,
+.head = QTAILQ_HEAD_INITIALIZER(qemu_add_fd_opts.head),
+.desc = {
+{
+.name = fd,
+.type = QEMU_OPT_NUMBER,
+.help = file descriptor of which a duplicate is added to fd set,
+},{
+.name = set,
+.type = QEMU_OPT_NUMBER,
+.help = ID of the fd set to add fd to,
+},{
+.name = opaque,
+.type = QEMU_OPT_STRING,
+.help = free-form string used to describe fd,
+},
+{ /* end of list */ }
+},
+};
+
static QemuOptsList *vm_config_groups[32] = {
qemu_drive_opts,
qemu_chardev_opts,
@@ -669,6 +690,7 @@ static QemuOptsList *vm_config_groups[32] = {
qemu_boot_opts,
qemu_iscsi_opts,
qemu_sandbox_opts,
+qemu_add_fd_opts,
NULL,
};
diff --git a/qemu-options.hx b/qemu-options.hx
index 46f0539..a67a255 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -253,6 +253,14 @@ qemu-system-i386 -drive file=file,index=2,media=disk
qemu-system-i386 -drive file=file,index=3,media=disk
@end example
+You can open an image using pre-opened file descriptors from an fd set:
+@example
+qemu-system-i386
+-add-fd fd=3,set=2,opaque=rdwr:/path/to/file
+-add-fd fd=4,set=2,opaque=rdonly:/path/to/file
+-drive file=/dev/fdset/2,index=0,media=disk
+@end example
+
You can connect a CDROM to the slave of ide0:
@example
qemu-system-i386 -drive file=file,if=ide,index=1,media=cdrom
@@ -285,6 +293,34 @@ qemu-system-i386 -hda a -hdb b
@end example
ETEXI
+DEF(add-fd, HAS_ARG, QEMU_OPTION_add_fd,
+-add-fd fd=fd,set=set[,opaque=opaque]\n
+Add 'fd' to fd 'set'\n, QEMU_ARCH_ALL)
+STEXI
+@item -add-fd fd=@var{fd},set=@var{set}[,opaque=@var{opaque}]
+@findex -add-fd
+
+Add a file descriptor to an fd set. Valid options are:
+
+@table @option
+@item fd=@var{fd}
+This option defines the file descriptor of which a duplicate is added to fd
set.
+The file descriptor cannot be stdin, stdout, or stderr.
+@item set=@var{set}
+This option defines the ID of the fd set to add the file descriptor to.
+@item opaque=@var{opaque}
+This option defines a free-form string that can be used to describe @var{fd}.
+@end table
+
+You can open an image using pre-opened file descriptors from an fd set:
+@example
+qemu-system-i386
+-add-fd fd=3,set=2,opaque=rdwr:/path/to/file
+-add-fd fd=4,set=2,opaque=rdonly:/path/to/file
+-drive file=/dev/fdset/2,index=0,media=disk
+@end example
+ETEXI
+
DEF(set, HAS_ARG, QEMU_OPTION_set,
-set group.id.arg=value\n
set arg parameter for item id of type group\n
diff --git a/vl.c b/vl.c
index ee3c43a..b870caf 100644
--- a/vl.c
+++ b/vl.c
@@ -790,6 +790,78 @@ static int parse_sandbox(QemuOpts *opts, void *opaque)
return 0;
}
+#ifndef _WIN32
+static int parse_add_fd(QemuOpts *opts, void *opaque)
+{
+int fd, dupfd, flags;
+int64_t fdset_id;
+const char *fd_opaque = NULL;
+
+fd = qemu_opt_get_number(opts, fd, -1);
[Qemu-devel] [PATCH 09/37] qdev: export qdev_prop_find() and allow it to be used with DeviceClass instead of Object
Operating on DeviceClass instead of DEVICE will allow to find static properties
before DEVICE instance is created. It will be used later in
compat_normalize_cpu_model()
to convert legacy CPUID features into corresponding static properties.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/qdev-properties.h | 4 +++-
qom/qdev-properties.c | 16 +---
2 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/hw/qdev-properties.h b/hw/qdev-properties.h
index ddcf774..b2f7142 100644
--- a/hw/qdev-properties.h
+++ b/hw/qdev-properties.h
@@ -98,7 +98,7 @@ extern PropertyInfo qdev_prop_pci_host_devaddr;
{}
/* Set properties between creation and init. */
-void *qdev_get_prop_ptr(DeviceState *dev, Property *prop);
+void *qdev_get_prop_ptr(DeviceState *dev, const Property *prop);
int qdev_prop_parse(DeviceState *dev, const char *name, const char *value);
void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value);
void qdev_prop_set_uint8(DeviceState *dev, const char *name, uint8_t value);
@@ -128,4 +128,6 @@ void error_set_from_qdev_prop_error(Error **errp, int ret,
DeviceState *dev,
*/
void qdev_property_add_static(DeviceState *dev, Property *prop, Error **errp);
+const Property *qdev_prop_find(const DeviceClass *dc, const char *name);
+
#endif
diff --git a/qom/qdev-properties.c b/qom/qdev-properties.c
index 2e82cb9..cc37479 100644
--- a/qom/qdev-properties.c
+++ b/qom/qdev-properties.c
@@ -6,7 +6,7 @@
#include net/hub.h
#include qapi/qapi-visit-core.h
-void *qdev_get_prop_ptr(DeviceState *dev, Property *prop)
+void *qdev_get_prop_ptr(DeviceState *dev, const Property *prop)
{
void *ptr = dev;
ptr += prop-offset;
@@ -784,13 +784,13 @@ static Property *qdev_prop_walk(Property *props, const
char *name)
return NULL;
}
-static Property *qdev_prop_find(DeviceState *dev, const char *name)
+const Property *qdev_prop_find(const DeviceClass *dc, const char *name)
{
ObjectClass *class;
Property *prop;
/* device properties */
-class = object_get_class(OBJECT(dev));
+class = OBJECT_CLASS(dc);
do {
prop = qdev_prop_walk(DEVICE_CLASS(class)-props, name);
if (prop) {
@@ -907,10 +907,11 @@ void qdev_prop_set_macaddr(DeviceState *dev, const char
*name, uint8_t *value)
void qdev_prop_set_enum(DeviceState *dev, const char *name, int value)
{
-Property *prop;
+const Property *prop;
Error *errp = NULL;
+DeviceClass *dc = DEVICE_CLASS(object_get_class(OBJECT(dev)));
-prop = qdev_prop_find(dev, name);
+prop = qdev_prop_find(dc, name);
object_property_set_str(OBJECT(dev), prop-info-enum_table[value],
name, errp);
assert_no_error(errp);
@@ -918,10 +919,11 @@ void qdev_prop_set_enum(DeviceState *dev, const char
*name, int value)
void qdev_prop_set_ptr(DeviceState *dev, const char *name, void *value)
{
-Property *prop;
+const Property *prop;
void **ptr;
+DeviceClass *dc = DEVICE_CLASS(object_get_class(OBJECT(dev)));
-prop = qdev_prop_find(dev, name);
+prop = qdev_prop_find(dc, name);
assert(prop prop-info == qdev_prop_ptr);
ptr = qdev_get_prop_ptr(dev, prop);
*ptr = value;
--
1.7.11.7
[Qemu-devel] [PATCH 27/37] target-i386: convert tsc-frequency to static property
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
* in addition use error_setg() instead of error_set()
---
target-i386/cpu.c | 75 ++-
1 file changed, 41 insertions(+), 34 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index a1790aa..8d3f4cc 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -351,6 +351,46 @@ PropertyInfo qdev_prop_vendor = {
#define DEFINE_PROP_VENDOR(_n, _s, _f)
\
DEFINE_PROP(_n, _s, _f, qdev_prop_vendor, uint32_t)
+static void x86_cpuid_get_tsc_freq(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+X86CPU *cpu = X86_CPU(obj);
+int64_t value;
+
+value = cpu-env.tsc_khz * 1000;
+visit_type_int(v, value, name, errp);
+}
+
+static void x86_cpuid_set_tsc_freq(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+X86CPU *cpu = X86_CPU(obj);
+const int64_t min = 0;
+const int64_t max = INT64_MAX;
+int64_t value;
+
+visit_type_freq(v, value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+if (value min || value max) {
+error_setg(errp, Property %s.%s doesn't take value % PRId64 (min
+ imum: % PRId64 , maximum: % PRId64,
+ object_get_typename(obj), name, value, min, max);
+return;
+}
+
+cpu-env.tsc_khz = value / 1000;
+}
+
+PropertyInfo qdev_prop_tsc_freq = {
+.name = int32,
+.get = x86_cpuid_get_tsc_freq,
+.set = x86_cpuid_set_tsc_freq,
+};
+#define DEFINE_PROP_TSC_FREQ(_n, _s, _f)
\
+DEFINE_PROP(_n, _s, _f, qdev_prop_tsc_freq, int32_t)
+
static Property cpu_x86_properties[] = {
DEFINE_PROP_BIT(f-fpu, X86CPU, env.cpuid_features, 0, false),
DEFINE_PROP_BIT(f-vme, X86CPU, env.cpuid_features, 1, false),
@@ -471,6 +511,7 @@ static Property cpu_x86_properties[] = {
DEFINE_PROP_CHECK(check),
DEFINE_PROP_ENFORCE(enforce),
DEFINE_PROP_VENDOR(vendor, X86CPU, env.cpuid_vendor1),
+DEFINE_PROP_TSC_FREQ(tsc-frequency, X86CPU, env.tsc_khz),
DEFINE_PROP_END_OF_LIST(),
};
@@ -1329,37 +1370,6 @@ static void x86_cpuid_set_model_id(Object *obj, const
char *model_id,
}
}
-static void x86_cpuid_get_tsc_freq(Object *obj, Visitor *v, void *opaque,
- const char *name, Error **errp)
-{
-X86CPU *cpu = X86_CPU(obj);
-int64_t value;
-
-value = cpu-env.tsc_khz * 1000;
-visit_type_int(v, value, name, errp);
-}
-
-static void x86_cpuid_set_tsc_freq(Object *obj, Visitor *v, void *opaque,
- const char *name, Error **errp)
-{
-X86CPU *cpu = X86_CPU(obj);
-const int64_t min = 0;
-const int64_t max = INT64_MAX;
-int64_t value;
-
-visit_type_freq(v, value, name, errp);
-if (error_is_set(errp)) {
-return;
-}
-if (value min || value max) {
-error_set(errp, QERR_PROPERTY_VALUE_OUT_OF_RANGE, ,
- name ? name : null, value, min, max);
-return;
-}
-
-cpu-env.tsc_khz = value / 1000;
-}
-
static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
{
CPUX86State *env = cpu-env;
@@ -2236,9 +2246,6 @@ static void x86_cpu_initfn(Object *obj)
object_property_add_str(obj, model-id,
x86_cpuid_get_model_id,
x86_cpuid_set_model_id, NULL);
-object_property_add(obj, tsc-frequency, int,
-x86_cpuid_get_tsc_freq,
-x86_cpuid_set_tsc_freq, NULL, NULL, NULL);
env-cpuid_apic_id = env-cpu_index;
--
1.7.11.7
Re: [Qemu-devel] [PATCH v2] hmp: fix info cpus for sparc targets
On Fri, 19 Oct 2012 23:19:19 +0200
Aurelien Jarno aurel...@aurel32.net wrote:
On sparc targets, info cpus returns this kind of output:
| info cpus
| * CPU #0: pc=0x00424d18pc=0x00424d18npc=0x00424d1c
thread_id=19460
pc is printed twice, there is no space between pc, pc and npc.
With this patch, pc is not printed anymore when has_npc is set. In addition
the space is printed before pc/nip/npc/PC instead of after the colon so that
multiple prints are possible. This result on the following kind of input on
sparc targets:
| info cpus
| * CPU #0: pc=0x00424d18 npc=0x00424d1c thread_id=19460
Cc: Luiz Capitulino lcapitul...@redhat.com
Cc: Markus Armbruster arm...@redhat.com
Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Aurelien Jarno aurel...@aurel32.net
I've applied this one to the qmp branch. If you want to merge it yourself
feel free to add:
Acked-by: Luiz Capitulino lcapitul...@redhat.com
---
hmp.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
Changes v1 - v2: strategy change, has_npc doesn't imply has_pc anymore.
diff --git a/hmp.c b/hmp.c
index 70bdec2..296adc3 100644
--- a/hmp.c
+++ b/hmp.c
@@ -233,20 +233,19 @@ void hmp_info_cpus(Monitor *mon)
active = '*';
}
-monitor_printf(mon, %c CPU #% PRId64 : , active,
cpu-value-CPU);
+monitor_printf(mon, %c CPU #% PRId64 :, active, cpu-value-CPU);
if (cpu-value-has_pc) {
-monitor_printf(mon, pc=0x%016 PRIx64, cpu-value-pc);
+monitor_printf(mon, pc=0x%016 PRIx64, cpu-value-pc);
}
if (cpu-value-has_nip) {
-monitor_printf(mon, nip=0x%016 PRIx64, cpu-value-nip);
+monitor_printf(mon, nip=0x%016 PRIx64, cpu-value-nip);
}
if (cpu-value-has_npc) {
-monitor_printf(mon, pc=0x%016 PRIx64, cpu-value-pc);
-monitor_printf(mon, npc=0x%016 PRIx64, cpu-value-npc);
+monitor_printf(mon, npc=0x%016 PRIx64, cpu-value-npc);
}
if (cpu-value-has_PC) {
-monitor_printf(mon, PC=0x%016 PRIx64, cpu-value-PC);
+monitor_printf(mon, PC=0x%016 PRIx64, cpu-value-PC);
}
if (cpu-value-halted) {
[Qemu-devel] [PATCH 23/37] target-i386: convert 'check' and 'enforce' to static properties
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
v2:
* restore original behavior, check features against host before
they might be filtered out by TCG masks. spotted-by: Eduardo Habkost
v3:
* use static properties instead of feature name arrays
* since check is becoming regular boolean property it would be
possible to turn it off while enforce=on, set check_cpuid=true
if enforce=on after all properties set at realize time.
---
target-i386/cpu.c | 85 +++
1 file changed, 73 insertions(+), 12 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 44cbf9c..061ee01 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -237,6 +237,62 @@ PropertyInfo qdev_prop_hv_vapic = {
#define DEFINE_PROP_HV_VAPIC(_n)
\
DEFINE_ABSTRACT_PROP(_n, qdev_prop_hv_vapic)
+static bool check_cpuid;
+
+static void x86_cpuid_get_check(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+visit_type_bool(v, check_cpuid, name, errp);
+}
+
+static void x86_cpuid_set_check(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value;
+
+visit_type_bool(v, value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+check_cpuid = value;
+}
+
+PropertyInfo qdev_prop_check = {
+.name = bool,
+.get = x86_cpuid_get_check,
+.set = x86_cpuid_set_check,
+};
+#define DEFINE_PROP_CHECK(_n) \
+DEFINE_ABSTRACT_PROP(_n, qdev_prop_check)
+
+static bool enforce_cpuid;
+
+static void x86_cpuid_get_enforce(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+visit_type_bool(v, enforce_cpuid, name, errp);
+}
+
+static void x86_cpuid_set_enforce(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value;
+
+visit_type_bool(v, value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+enforce_cpuid = value;
+}
+
+PropertyInfo qdev_prop_enforce = {
+.name = boolean,
+.get = x86_cpuid_get_enforce,
+.set = x86_cpuid_set_enforce,
+};
+#define DEFINE_PROP_ENFORCE(_n)
\
+DEFINE_ABSTRACT_PROP(_n, qdev_prop_enforce)
+
static Property cpu_x86_properties[] = {
DEFINE_PROP_BIT(f-fpu, X86CPU, env.cpuid_features, 0, false),
DEFINE_PROP_BIT(f-vme, X86CPU, env.cpuid_features, 1, false),
@@ -354,6 +410,8 @@ static Property cpu_x86_properties[] = {
DEFINE_PROP_HV_SPINLOCKS(hv_spinlocks),
DEFINE_PROP_HV_RELAXED(hv_relaxed),
DEFINE_PROP_HV_VAPIC(hv_vapic),
+DEFINE_PROP_CHECK(check),
+DEFINE_PROP_ENFORCE(enforce),
DEFINE_PROP_END_OF_LIST(),
};
@@ -367,9 +425,6 @@ typedef struct model_features_t {
uint32_t cpuid;
} model_features_t;
-int check_cpuid = 0;
-int enforce_cpuid = 0;
-
void host_cpuid(uint32_t function, uint32_t count,
uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
{
@@ -1064,19 +1119,20 @@ static int unavailable_host_feature(struct
model_features_t *f, uint32_t mask)
* their way to the guest. Note: ft[].check_feat ideally should be
* specified via a guest_def field to suppress report of extraneous flags.
*/
-static int check_features_against_host(x86_def_t *guest_def)
+static int check_features_against_host(X86CPU *cpu)
{
+CPUX86State *env = cpu-env;
x86_def_t host_def;
uint32_t mask;
int rv, i;
struct model_features_t ft[] = {
-{guest_def-features, host_def.features,
+{env-cpuid_features, host_def.features,
~0, feature_name, 0x},
-{guest_def-ext_features, host_def.ext_features,
+{env-cpuid_ext_features, host_def.ext_features,
~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x0001},
-{guest_def-ext2_features, host_def.ext2_features,
+{env-cpuid_ext2_features, host_def.ext2_features,
~PPRO_FEATURES, ext2_feature_name, 0x8000},
-{guest_def-ext3_features, host_def.ext3_features,
+{env-cpuid_ext3_features, host_def.ext3_features,
~CPUID_EXT3_SVM, ext3_feature_name, 0x8001}};
cpu_x86_fill_host(host_def);
@@ -1594,10 +1650,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t
*x86_cpu_def,
x86_cpu_def-kvm_features = ~minus_kvm_features;
x86_cpu_def-svm_features = ~minus_svm_features;
x86_cpu_def-cpuid_7_0_ebx_features = ~minus_7_0_ebx_features;
-if (check_cpuid) {
-if (check_features_against_host(x86_cpu_def) enforce_cpuid)
-goto error;
-}
g_free(s);
return 0;
@@ -2159,6 +2211,15 @@ void x86_cpu_realize(Object *obj, Error **errp)
env-cpuid_level = 7;
}
+if (enforce_cpuid) {
+
[Qemu-devel] [patch v4 03/16] hotplug: introduce qdev_unplug_complete() to remove device from views
When device unplug has been ack by guest, we first remove it from memory
to prevent incoming access from dispatcher. Then we isolate it from
device composition tree
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
hw/qdev.c | 26 ++
hw/qdev.h |3 ++-
2 files changed, 28 insertions(+), 1 deletions(-)
diff --git a/hw/qdev.c b/hw/qdev.c
index b5a52ac..73df046 100644
--- a/hw/qdev.c
+++ b/hw/qdev.c
@@ -104,6 +104,14 @@ void qdev_set_parent_bus(DeviceState *dev, BusState *bus)
bus_add_child(bus, dev);
}
+static void qdev_unset_parent(DeviceState *dev)
+{
+BusState *b = dev-parent_bus;
+
+object_unparent(OBJECT(dev));
+bus_remove_child(b, dev);
+}
+
/* Create a new device. This only initializes the device state structure
and allows properties to be set. qdev_init should be called to
initialize the actual device emulation. */
@@ -193,6 +201,24 @@ void qdev_set_legacy_instance_id(DeviceState *dev, int
alias_id,
dev-alias_required_for_version = required_for_version;
}
+static int qdev_unmap(DeviceState *dev)
+{
+DeviceClass *dc = DEVICE_GET_CLASS(dev);
+if (dc-unmap) {
+dc-unmap(dev);
+}
+return 0;
+}
+
+void qdev_unplug_complete(DeviceState *dev, Error **errp)
+{
+/* isolate from mem view */
+qdev_unmap(dev);
+/* isolate from device tree */
+qdev_unset_parent(dev);
+object_unref(OBJECT(dev));
+}
+
void qdev_unplug(DeviceState *dev, Error **errp)
{
DeviceClass *dc = DEVICE_GET_CLASS(dev);
diff --git a/hw/qdev.h b/hw/qdev.h
index d699194..aeae29e 100644
--- a/hw/qdev.h
+++ b/hw/qdev.h
@@ -47,7 +47,7 @@ typedef struct DeviceClass {
/* callbacks */
void (*reset)(DeviceState *dev);
-
+void (*unmap)(DeviceState *dev);
/* device state */
const VMStateDescription *vmsd;
@@ -161,6 +161,7 @@ void qdev_init_nofail(DeviceState *dev);
void qdev_set_legacy_instance_id(DeviceState *dev, int alias_id,
int required_for_version);
void qdev_unplug(DeviceState *dev, Error **errp);
+void qdev_unplug_complete(DeviceState *dev, Error **errp);
void qdev_free(DeviceState *dev);
int qdev_simple_unplug_cb(DeviceState *dev);
void qdev_machine_creation_done(void);
--
1.7.4.4
[Qemu-devel] [patch v4 08/16] QemuThread: make QemuThread as tls to store extra info
If mmio dispatch out of big lock, some function's calling context (ie,
holding big lock or not) are different. We need to trace these info in
runtime, and use tls to store them.
By this method, we can avoid to require big lock recursive.
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
cpus.c |1 +
qemu-thread-posix.c |7 +++
qemu-thread-posix.h |2 ++
qemu-thread.h |1 +
vl.c|6 ++
5 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/cpus.c b/cpus.c
index e476a3c..4cd7f85 100644
--- a/cpus.c
+++ b/cpus.c
@@ -735,6 +735,7 @@ static void *qemu_kvm_cpu_thread_fn(void *arg)
CPUState *cpu = ENV_GET_CPU(env);
int r;
+pthread_setspecific(qemu_thread_key, cpu-thread);
qemu_mutex_lock(qemu_global_mutex);
qemu_thread_get_self(cpu-thread);
env-thread_id = qemu_get_thread_id();
diff --git a/qemu-thread-posix.c b/qemu-thread-posix.c
index 8fbabda..f448fcb 100644
--- a/qemu-thread-posix.c
+++ b/qemu-thread-posix.c
@@ -19,6 +19,8 @@
#include string.h
#include qemu-thread.h
+pthread_key_t qemu_thread_key;
+
static void error_exit(int err, const char *msg)
{
fprintf(stderr, qemu: %s: %s\n, msg, strerror(err));
@@ -151,6 +153,11 @@ void qemu_thread_get_self(QemuThread *thread)
thread-thread = pthread_self();
}
+void qemu_thread_key_create(void)
+{
+pthread_key_create(qemu_thread_key, NULL);
+}
+
bool qemu_thread_is_self(QemuThread *thread)
{
return pthread_equal(pthread_self(), thread-thread);
diff --git a/qemu-thread-posix.h b/qemu-thread-posix.h
index ee4618e..2607b1c 100644
--- a/qemu-thread-posix.h
+++ b/qemu-thread-posix.h
@@ -14,4 +14,6 @@ struct QemuThread {
pthread_t thread;
};
+extern pthread_key_t qemu_thread_key;
+
#endif
diff --git a/qemu-thread.h b/qemu-thread.h
index 05fdaaf..4a6427d 100644
--- a/qemu-thread.h
+++ b/qemu-thread.h
@@ -46,4 +46,5 @@ void qemu_thread_get_self(QemuThread *thread);
bool qemu_thread_is_self(QemuThread *thread);
void qemu_thread_exit(void *retval);
+void qemu_thread_key_create(void);
#endif
diff --git a/vl.c b/vl.c
index 7c577fa..442479a 100644
--- a/vl.c
+++ b/vl.c
@@ -149,6 +149,7 @@ int main(int argc, char **argv)
#include qemu-options.h
#include qmp-commands.h
#include main-loop.h
+#include qemu-thread.h
#ifdef CONFIG_VIRTFS
#include fsdev/qemu-fsdev.h
#endif
@@ -2342,6 +2343,7 @@ int qemu_init_main_loop(void)
return main_loop_init();
}
+
int main(int argc, char **argv, char **envp)
{
int i;
@@ -3483,6 +3485,10 @@ int main(int argc, char **argv, char **envp)
exit(1);
}
+qemu_thread_key_create();
+QemuThread *ioctx = g_malloc0(sizeof(QemuThread));
+pthread_setspecific(qemu_thread_key, ioctx);
+
os_set_line_buffering();
if (init_timer_alarm() 0) {
--
1.7.4.4
