[Qemu-devel] [PATCH v2 03/30] net/pcnet-pci: QOM Upcast Sweep
From: Peter Crosthwaite
Define and use standard QOM cast macro. Remove usages of DO_UPCAST
and direct -> style upcasting.
Signed-off-by: Peter Crosthwaite
---
hw/net/pcnet-pci.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c
index 9df2b87..b1afbf4 100644
--- a/hw/net/pcnet-pci.c
+++ b/hw/net/pcnet-pci.c
@@ -43,6 +43,10 @@
//#define PCNET_DEBUG_TMD
//#define PCNET_DEBUG_MATCH
+#define TYPE_PCI_PC_NET "pcnet"
+
+#define PCI_PC_NET(obj) \
+ OBJECT_CHECK(PCIPCNetState, (obj), TYPE_PCI_PC_NET)
typedef struct {
PCIDevice pci_dev;
@@ -273,7 +277,7 @@ static void pci_pcnet_cleanup(NetClientState *nc)
static void pci_pcnet_uninit(PCIDevice *dev)
{
-PCIPCNetState *d = DO_UPCAST(PCIPCNetState, pci_dev, dev);
+PCIPCNetState *d = PCI_PC_NET(dev);
memory_region_destroy(&d->state.mmio);
memory_region_destroy(&d->io_bar);
@@ -293,7 +297,7 @@ static NetClientInfo net_pci_pcnet_info = {
static int pci_pcnet_init(PCIDevice *pci_dev)
{
-PCIPCNetState *d = DO_UPCAST(PCIPCNetState, pci_dev, pci_dev);
+PCIPCNetState *d = PCI_PC_NET(pci_dev);
PCNetState *s = &d->state;
uint8_t *pci_conf;
@@ -329,12 +333,12 @@ static int pci_pcnet_init(PCIDevice *pci_dev)
s->phys_mem_write = pci_physical_memory_write;
s->dma_opaque = pci_dev;
-return pcnet_common_init(&pci_dev->qdev, s, &net_pci_pcnet_info);
+return pcnet_common_init(DEVICE(pci_dev), s, &net_pci_pcnet_info);
}
static void pci_reset(DeviceState *dev)
{
-PCIPCNetState *d = DO_UPCAST(PCIPCNetState, pci_dev.qdev, dev);
+PCIPCNetState *d = PCI_PC_NET(dev);
pcnet_h_reset(&d->state);
}
@@ -362,7 +366,7 @@ static void pcnet_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo pcnet_info = {
-.name = "pcnet",
+.name = TYPE_PCI_PC_NET,
.parent= TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIPCNetState),
.class_init= pcnet_class_init,
--
1.8.3.rc1.44.gb387c77.dirty
[Qemu-devel] [PATCH v2 02/30] net/rtl8139: QOM Upcast Sweep
From: Peter Crosthwaite
Define and use standard QOM cast macro. Remove usages of DO_UPCAST
and direct -> style upcasting.
Signed-off-by: Peter Crosthwaite
---
hw/net/rtl8139.c | 26 ++
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c
index 7993f9f..955d35e 100644
--- a/hw/net/rtl8139.c
+++ b/hw/net/rtl8139.c
@@ -92,6 +92,11 @@ static inline GCC_FMT_ATTR(1, 2) int DPRINTF(const char
*fmt, ...)
}
#endif
+#define TYPE_RTL8139 "rtl8139"
+
+#define RTL8139(obj) \
+ OBJECT_CHECK(RTL8139State, (obj), TYPE_RTL8139)
+
/* Symbolic offsets to registers. */
enum RTL8139_registers {
MAC0 = 0,/* Ethernet hardware address. */
@@ -1197,7 +1202,7 @@ static void rtl8139_reset_rxring(RTL8139State *s,
uint32_t bufferSize)
static void rtl8139_reset(DeviceState *d)
{
-RTL8139State *s = container_of(d, RTL8139State, dev.qdev);
+RTL8139State *s = RTL8139(d);
int i;
/* restore MAC address */
@@ -1364,6 +1369,8 @@ static const VMStateDescription vmstate_tally_counters = {
static void rtl8139_ChipCmd_write(RTL8139State *s, uint32_t val)
{
+DeviceState *d = DEVICE(s);
+
val &= 0xff;
DPRINTF("ChipCmd write val=0x%08x\n", val);
@@ -1371,7 +1378,7 @@ static void rtl8139_ChipCmd_write(RTL8139State *s,
uint32_t val)
if (val & CmdReset)
{
DPRINTF("ChipCmd reset\n");
-rtl8139_reset(&s->dev.qdev);
+rtl8139_reset(d);
}
if (val & CmdRxEnb)
{
@@ -1525,6 +1532,8 @@ static uint32_t rtl8139_BasicModeStatus_read(RTL8139State
*s)
static void rtl8139_Cfg9346_write(RTL8139State *s, uint32_t val)
{
+DeviceState *d = DEVICE(s);
+
val &= 0xff;
DPRINTF("Cfg9346 write val=0x%02x\n", val);
@@ -1544,7 +1553,7 @@ static void rtl8139_Cfg9346_write(RTL8139State *s,
uint32_t val)
} else if (opmode == 0x40) {
/* Reset. */
val = 0;
-rtl8139_reset(&s->dev.qdev);
+rtl8139_reset(d);
}
s->Cfg9346 = val;
@@ -3439,7 +3448,7 @@ static void rtl8139_cleanup(NetClientState *nc)
static void pci_rtl8139_uninit(PCIDevice *dev)
{
-RTL8139State *s = DO_UPCAST(RTL8139State, dev, dev);
+RTL8139State *s = RTL8139(dev);
memory_region_destroy(&s->bar_io);
memory_region_destroy(&s->bar_mem);
@@ -3477,7 +3486,8 @@ static NetClientInfo net_rtl8139_info = {
static int pci_rtl8139_init(PCIDevice *dev)
{
-RTL8139State * s = DO_UPCAST(RTL8139State, dev, dev);
+RTL8139State *s = RTL8139(dev);
+DeviceState *d = DEVICE(dev);
uint8_t *pci_conf;
pci_conf = s->dev.config;
@@ -3505,7 +3515,7 @@ static int pci_rtl8139_init(PCIDevice *dev)
s->eeprom.contents[9] = s->conf.macaddr.a[4] | s->conf.macaddr.a[5] << 8;
s->nic = qemu_new_nic(&net_rtl8139_info, &s->conf,
- object_get_typename(OBJECT(dev)), dev->qdev.id, s);
+ object_get_typename(OBJECT(dev)), d->id, s);
qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a);
s->cplus_txbuffer = NULL;
@@ -3516,7 +3526,7 @@ static int pci_rtl8139_init(PCIDevice *dev)
s->timer = qemu_new_timer_ns(vm_clock, rtl8139_timer, s);
rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock));
-add_boot_device_path(s->conf.bootindex, &dev->qdev, "/ethernet-phy@0");
+add_boot_device_path(s->conf.bootindex, d, "/ethernet-phy@0");
return 0;
}
@@ -3544,7 +3554,7 @@ static void rtl8139_class_init(ObjectClass *klass, void
*data)
}
static const TypeInfo rtl8139_info = {
-.name = "rtl8139",
+.name = TYPE_RTL8139,
.parent= TYPE_PCI_DEVICE,
.instance_size = sizeof(RTL8139State),
.class_init= rtl8139_class_init,
--
1.8.3.rc1.44.gb387c77.dirty
[Qemu-devel] [PATCH v2 01/30] net/e1000: QOM Upcast Sweep
From: Peter Crosthwaite
Define and use standard QOM cast macro. Remove usages of DO_UPCAST
and direct -> style upcasting.
Signed-off-by: Peter Crosthwaite
---
hw/net/e1000.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/hw/net/e1000.c b/hw/net/e1000.c
index e6f46f0..27c4221 100644
--- a/hw/net/e1000.c
+++ b/hw/net/e1000.c
@@ -138,6 +138,11 @@ typedef struct E1000State_st {
uint32_t compat_flags;
} E1000State;
+#define TYPE_E1000 "e1000"
+
+#define E1000(obj) \
+OBJECT_CHECK(E1000State, (obj), TYPE_E1000)
+
#definedefreg(x) x = (E1000_##x>>2)
enum {
defreg(CTRL), defreg(EECD), defreg(EERD), defreg(GPRC),
@@ -1296,7 +1301,7 @@ e1000_cleanup(NetClientState *nc)
static void
pci_e1000_uninit(PCIDevice *dev)
{
-E1000State *d = DO_UPCAST(E1000State, dev, dev);
+E1000State *d = E1000(dev);
qemu_del_timer(d->autoneg_timer);
qemu_free_timer(d->autoneg_timer);
@@ -1316,7 +1321,8 @@ static NetClientInfo net_e1000_info = {
static int pci_e1000_init(PCIDevice *pci_dev)
{
-E1000State *d = DO_UPCAST(E1000State, dev, pci_dev);
+DeviceState *dev = DEVICE(pci_dev);
+E1000State *d = E1000(pci_dev);
uint8_t *pci_conf;
uint16_t checksum = 0;
int i;
@@ -1347,11 +1353,11 @@ static int pci_e1000_init(PCIDevice *pci_dev)
d->eeprom_data[EEPROM_CHECKSUM_REG] = checksum;
d->nic = qemu_new_nic(&net_e1000_info, &d->conf,
- object_get_typename(OBJECT(d)), d->dev.qdev.id, d);
+ object_get_typename(OBJECT(d)), dev->id, d);
qemu_format_nic_info_str(qemu_get_queue(d->nic), macaddr);
-add_boot_device_path(d->conf.bootindex, &pci_dev->qdev, "/ethernet-phy@0");
+add_boot_device_path(d->conf.bootindex, dev, "/ethernet-phy@0");
d->autoneg_timer = qemu_new_timer_ms(vm_clock, e1000_autoneg_timer, d);
@@ -1360,7 +1366,7 @@ static int pci_e1000_init(PCIDevice *pci_dev)
static void qdev_e1000_reset(DeviceState *dev)
{
-E1000State *d = DO_UPCAST(E1000State, dev.qdev, dev);
+E1000State *d = E1000(dev);
e1000_reset(d);
}
@@ -1390,7 +1396,7 @@ static void e1000_class_init(ObjectClass *klass, void
*data)
}
static const TypeInfo e1000_info = {
-.name = "e1000",
+.name = TYPE_E1000,
.parent= TYPE_PCI_DEVICE,
.instance_size = sizeof(E1000State),
.class_init= e1000_class_init,
--
1.8.3.rc1.44.gb387c77.dirty
[Qemu-devel] [PATCH v2 00/30] PCI: Cleanup legacy casts in device land
From: Peter Crosthwaite There are a number of different cast implementations from various stages of QEMU development out in device model land. This series cleans up the ones involving TYPE_PCI_DEVICE to consistently use proper QOM casts for both up and down casts. Some were easy, some needed QOM cast macros which are added as appropriate. Following the recent discussion RE performance consequences of QOM casts, im interested in any reports of possible performance regressions here, although I am hoping that Anthony current efforts to improve QOM casting efficiency make this a non-issue. Changed since V1: Removed hunks which macroified VMSD names Dropped virtio/virtio.pci patch Rebased Peter Crosthwaite (30): net/e1000: QOM Upcast Sweep net/rtl8139: QOM Upcast Sweep net/pcnet-pci: QOM Upcast Sweep usb/hcd-xhci: QOM Upcast Sweep scsi/lsi53c895a: QOM Upcast Sweep scsi/megasas: QOM Upcast Sweep scsi/esp-pci: QOM Upcast Sweep ide/ich: QOM Upcast Sweep ide/piix: QOM casting sweep acpi/piix4: QOM Upcast Sweep misc/pci-testdev: QOM Upcast Sweep virtio/vmware_vga: QOM casting sweep misc/ivshmem: QOM Upcast Sweep xen/xen_platform: QOM casting sweep isa/*: QOM casting sweep pci/*: QOM casting sweep pci-bridge/pci_bridge_dev: Don't use DO_UPCAST pci-bridge/*: substitute ->qdev casts with DEVICE() pci/pci_bridge: substitute ->qdev casts with DEVICE() misc/vfio: substitute ->qdev casts with DEVICE() net/eepro100: substitute ->qdev casts with DEVICE() net/ne2000: substitute ->qdev casts with DEVICE() usb/*: substitute ->qdev casts with DEVICE() watchdog/wdt_i6300esb: substitute ->qdev casts with DEVICE() scsi/vmw_pvscsi: substitute ->qdev casts with DEVICE() i2c/smbus_ich9: substitute ->qdev casts with DEVICE() ide/cmd646: substitute ->qdev casts with DEVICE() ide/via: substitute ->qdev casts with DEVICE() pci-host/*: substitute ->qdev casts with DEVICE() i386/*: substitute ->qdev casts with DEVICE() hw/acpi/piix4.c| 31 +-- hw/display/vmware_vga.c| 13 - hw/i2c/smbus_ich9.c| 2 +- hw/i386/kvm/pci-assign.c | 21 - hw/i386/pc.c | 3 ++- hw/i386/pc_piix.c | 4 ++-- hw/i386/pc_q35.c | 4 ++-- hw/ide/ahci.h | 5 + hw/ide/cmd646.c| 8 hw/ide/ich.c | 10 +- hw/ide/piix.c | 8 hw/ide/via.c | 4 ++-- hw/isa/i82378.c| 8 hw/isa/lpc_ich9.c | 6 +++--- hw/misc/ivshmem.c | 18 +++--- hw/misc/pci-testdev.c | 11 --- hw/misc/vfio.c | 4 ++-- hw/net/e1000.c | 18 -- hw/net/eepro100.c | 14 -- hw/net/ne2000.c| 6 -- hw/net/pcnet-pci.c | 14 +- hw/net/rtl8139.c | 26 ++ hw/pci-bridge/dec.c| 2 +- hw/pci-bridge/i82801b11.c | 2 +- hw/pci-bridge/ioh3420.c| 2 +- hw/pci-bridge/pci_bridge_dev.c | 2 +- hw/pci-bridge/xio3130_downstream.c | 2 +- hw/pci-bridge/xio3130_upstream.c | 2 +- hw/pci-host/apb.c | 4 ++-- hw/pci-host/q35.c | 4 ++-- hw/pci/pci-hotplug.c | 18 ++ hw/pci/pci.c | 17 + hw/pci/pci_bridge.c| 7 --- hw/pci/pcie.c | 4 ++-- hw/pci/shpc.c | 8 hw/scsi/esp-pci.c | 14 +- hw/scsi/lsi53c895a.c | 26 -- hw/scsi/megasas.c | 15 ++- hw/scsi/vmw_pvscsi.c | 2 +- hw/usb/hcd-ehci-pci.c | 13 - hw/usb/hcd-ohci.c | 2 +- hw/usb/hcd-uhci.c | 2 +- hw/usb/hcd-xhci.c | 19 +-- hw/watchdog/wdt_i6300esb.c | 2 +- hw/xen/xen_platform.c | 28 45 files changed, 258 insertions(+), 177 deletions(-) -- 1.8.3.rc1.44.gb387c77.dirty
[Qemu-devel] [PATCH 4/9] usb/hcd-ehci: Replace PORTSC macros with variables
From: Kuo-Jung Su
Replace PORTSC macros with variables which could then be
configured in ehci__class_init(...)
Signed-off-by: Kuo-Jung Su
Signed-off-by: Andreas Färber
Signed-off-by: Gerd Hoffmann
---
hw/usb/hcd-ehci-pci.c|2 ++
hw/usb/hcd-ehci-sysbus.c |6 ++
hw/usb/hcd-ehci.c| 22 ++
hw/usb/hcd-ehci.h| 12 ++--
4 files changed, 28 insertions(+), 14 deletions(-)
diff --git a/hw/usb/hcd-ehci-pci.c b/hw/usb/hcd-ehci-pci.c
index 509867d..5d229bc 100644
--- a/hw/usb/hcd-ehci-pci.c
+++ b/hw/usb/hcd-ehci-pci.c
@@ -78,6 +78,8 @@ static void usb_ehci_pci_init(Object *obj)
s->capsbase = 0x00;
s->opregbase = 0x20;
+s->portscbase = 0x44;
+s->portnr = NB_PORTS;
usb_ehci_init(s, DEVICE(obj));
}
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
index 68667b5..bad9ca6 100644
--- a/hw/usb/hcd-ehci-sysbus.c
+++ b/hw/usb/hcd-ehci-sysbus.c
@@ -51,6 +51,8 @@ static void ehci_sysbus_init(Object *obj)
s->capsbase = sec->capsbase;
s->opregbase = sec->opregbase;
+s->portscbase = sec->portscbase;
+s->portnr = sec->portnr;
s->as = &address_space_memory;
usb_ehci_init(s, DEVICE(obj));
@@ -60,6 +62,10 @@ static void ehci_sysbus_init(Object *obj)
static void ehci_sysbus_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(klass);
+
+sec->portscbase = 0x44;
+sec->portnr = NB_PORTS;
dc->realize = usb_ehci_sysbus_realize;
dc->vmsd = &vmstate_ehci_sysbus;
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index 546032a..16d6356 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -995,7 +995,7 @@ static uint64_t ehci_port_read(void *ptr, hwaddr addr,
uint32_t val;
val = s->portsc[addr >> 2];
-trace_usb_ehci_portsc_read(addr + PORTSC_BEGIN, addr >> 2, val);
+trace_usb_ehci_portsc_read(addr + s->portscbase, addr >> 2, val);
return val;
}
@@ -1036,7 +1036,7 @@ static void ehci_port_write(void *ptr, hwaddr addr,
uint32_t old = *portsc;
USBDevice *dev = s->ports[port].dev;
-trace_usb_ehci_portsc_write(addr + PORTSC_BEGIN, addr >> 2, val);
+trace_usb_ehci_portsc_write(addr + s->portscbase, addr >> 2, val);
/* Clear rwc bits */
*portsc &= ~(val & PORTSC_RWC_MASK);
@@ -1069,7 +1069,7 @@ static void ehci_port_write(void *ptr, hwaddr addr,
*portsc &= ~PORTSC_RO_MASK;
*portsc |= val;
-trace_usb_ehci_portsc_change(addr + PORTSC_BEGIN, addr >> 2, *portsc, old);
+trace_usb_ehci_portsc_change(addr + s->portscbase, addr >> 2, *portsc,
old);
}
static void ehci_opreg_write(void *ptr, hwaddr addr,
@@ -2512,8 +2512,14 @@ void usb_ehci_realize(EHCIState *s, DeviceState *dev,
Error **errp)
{
int i;
+if (s->portnr > NB_PORTS) {
+error_setg(errp, "Too many ports! Max. port number is %d.",
+ NB_PORTS);
+return;
+}
+
usb_bus_new(&s->bus, &ehci_bus_ops, dev);
-for (i = 0; i < NB_PORTS; i++) {
+for (i = 0; i < s->portnr; i++) {
usb_register_port(&s->bus, &s->ports[i], s, i, &ehci_port_ops,
USB_SPEED_MASK_HIGH);
s->ports[i].dev = 0;
@@ -2533,7 +2539,7 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
s->caps[0x01] = 0x00;
s->caps[0x02] = 0x00;
s->caps[0x03] = 0x01;/* HC version */
-s->caps[0x04] = NB_PORTS;/* Number of downstream ports */
+s->caps[0x04] = s->portnr; /* Number of downstream ports */
s->caps[0x05] = 0x00;/* No companion ports at present */
s->caps[0x06] = 0x00;
s->caps[0x07] = 0x00;
@@ -2549,13 +2555,13 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
memory_region_init_io(&s->mem_caps, &ehci_mmio_caps_ops, s,
"capabilities", CAPA_SIZE);
memory_region_init_io(&s->mem_opreg, &ehci_mmio_opreg_ops, s,
- "operational", PORTSC_BEGIN);
+ "operational", s->portscbase);
memory_region_init_io(&s->mem_ports, &ehci_mmio_port_ops, s,
- "ports", PORTSC_END - PORTSC_BEGIN);
+ "ports", 4 * s->portnr);
memory_region_add_subregion(&s->mem, s->capsbase, &s->mem_caps);
memory_region_add_subregion(&s->mem, s->opregbase, &s->mem_opreg);
-memory_region_add_subregion(&s->mem, s->opregbase + PORTSC_BEGIN,
+memory_region_add_subregion(&s->mem, s->opregbase + s->portscbase,
&s->mem_ports);
}
diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h
index 2c03e8f..1fb9483 100644
--- a/hw/usb/hcd-ehci.h
+++ b/hw/usb/hcd-ehci.h
@@ -40,11 +40,7 @@
#define MMIO_SIZE0x1000
#define CAPA_SIZE0x10
-#define PORTSC 0x0044
-#define PORTSC_BEGIN PORTSC
-#define PORTSC_END (PORTSC + 4 * NB_PORTS)
-
-#define NB_PORTS 6/* Nu
[Qemu-devel] [PATCH 2/9] usb/hcd-ehci: Split off instance_init from realize
From: Andreas Färber
This makes the mem MemoryRegion available to derived instance_inits.
Keep the bus in realize for now since naming breaks in instance_init.
Signed-off-by: Andreas Färber
Signed-off-by: Gerd Hoffmann
---
hw/usb/hcd-ehci-pci.c| 19 ++-
hw/usb/hcd-ehci-sysbus.c | 16 +---
hw/usb/hcd-ehci.c| 28
hw/usb/hcd-ehci.h|1 +
4 files changed, 44 insertions(+), 20 deletions(-)
diff --git a/hw/usb/hcd-ehci-pci.c b/hw/usb/hcd-ehci-pci.c
index b352f73..509867d 100644
--- a/hw/usb/hcd-ehci-pci.c
+++ b/hw/usb/hcd-ehci-pci.c
@@ -60,20 +60,28 @@ static int usb_ehci_pci_initfn(PCIDevice *dev)
pci_conf[0x6e] = 0x00;
pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */
-s->caps[0x09] = 0x68;/* EECP */
-
s->irq = dev->irq[3];
s->as = pci_get_address_space(dev);
-s->capsbase = 0x00;
-s->opregbase = 0x20;
-
usb_ehci_realize(s, DEVICE(dev), NULL);
pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
return 0;
}
+static void usb_ehci_pci_init(Object *obj)
+{
+EHCIPCIState *i = PCI_EHCI(obj);
+EHCIState *s = &i->ehci;
+
+s->caps[0x09] = 0x68;/* EECP */
+
+s->capsbase = 0x00;
+s->opregbase = 0x20;
+
+usb_ehci_init(s, DEVICE(obj));
+}
+
static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr,
uint32_t val, int l)
{
@@ -122,6 +130,7 @@ static const TypeInfo ehci_pci_type_info = {
.name = TYPE_PCI_EHCI,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(EHCIPCIState),
+.instance_init = usb_ehci_pci_init,
.abstract = true,
.class_init = ehci_class_init,
};
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
index 3179e6f..e450137 100644
--- a/hw/usb/hcd-ehci-sysbus.c
+++ b/hw/usb/hcd-ehci-sysbus.c
@@ -36,15 +36,24 @@ static void usb_ehci_sysbus_realize(DeviceState *dev, Error
**errp)
{
SysBusDevice *d = SYS_BUS_DEVICE(dev);
EHCISysBusState *i = SYS_BUS_EHCI(dev);
-SysBusEHCIClass *sec = SYS_BUS_EHCI_GET_CLASS(dev);
+EHCIState *s = &i->ehci;
+
+usb_ehci_realize(s, dev, errp);
+sysbus_init_irq(d, &s->irq);
+}
+
+static void ehci_sysbus_init(Object *obj)
+{
+SysBusDevice *d = SYS_BUS_DEVICE(obj);
+EHCISysBusState *i = SYS_BUS_EHCI(obj);
+SysBusEHCIClass *sec = SYS_BUS_EHCI_GET_CLASS(obj);
EHCIState *s = &i->ehci;
s->capsbase = sec->capsbase;
s->opregbase = sec->opregbase;
s->as = &address_space_memory;
-usb_ehci_realize(s, dev, errp);
-sysbus_init_irq(d, &s->irq);
+usb_ehci_init(s, DEVICE(obj));
sysbus_init_mmio(d, &s->mem);
}
@@ -61,6 +70,7 @@ static const TypeInfo ehci_type_info = {
.name = TYPE_SYS_BUS_EHCI,
.parent= TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(EHCISysBusState),
+.instance_init = ehci_sysbus_init,
.abstract = true,
.class_init= ehci_sysbus_class_init,
.class_size= sizeof(SysBusEHCIClass),
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index ea0379b..546032a 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -2512,6 +2512,22 @@ void usb_ehci_realize(EHCIState *s, DeviceState *dev,
Error **errp)
{
int i;
+usb_bus_new(&s->bus, &ehci_bus_ops, dev);
+for (i = 0; i < NB_PORTS; i++) {
+usb_register_port(&s->bus, &s->ports[i], s, i, &ehci_port_ops,
+ USB_SPEED_MASK_HIGH);
+s->ports[i].dev = 0;
+}
+
+s->frame_timer = qemu_new_timer_ns(vm_clock, ehci_frame_timer, s);
+s->async_bh = qemu_bh_new(ehci_frame_timer, s);
+
+qemu_register_reset(ehci_reset, s);
+qemu_add_vm_change_state_handler(usb_ehci_vm_state_change, s);
+}
+
+void usb_ehci_init(EHCIState *s, DeviceState *dev)
+{
/* 2.2 host controller interface version */
s->caps[0x00] = (uint8_t)(s->opregbase - s->capsbase);
s->caps[0x01] = 0x00;
@@ -2525,22 +2541,10 @@ void usb_ehci_realize(EHCIState *s, DeviceState *dev,
Error **errp)
s->caps[0x0a] = 0x00;
s->caps[0x0b] = 0x00;
-usb_bus_new(&s->bus, &ehci_bus_ops, dev);
-for(i = 0; i < NB_PORTS; i++) {
-usb_register_port(&s->bus, &s->ports[i], s, i, &ehci_port_ops,
- USB_SPEED_MASK_HIGH);
-s->ports[i].dev = 0;
-}
-
-s->frame_timer = qemu_new_timer_ns(vm_clock, ehci_frame_timer, s);
-s->async_bh = qemu_bh_new(ehci_frame_timer, s);
QTAILQ_INIT(&s->aqueues);
QTAILQ_INIT(&s->pqueues);
usb_packet_init(&s->ipacket);
-qemu_register_reset(ehci_reset, s);
-qemu_add_vm_change_state_handler(usb_ehci_vm_state_change, s);
-
memory_region_init(&s->mem, "ehci", MMIO_SIZE);
memory_region_init_io(&s->mem_caps, &ehci_mmio_caps_ops, s,
"capabilities", CAPA_SIZE);
diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h
index 15c7630..7a93957 100644
--- a/hw/usb/hcd-ehci.h
+
[Qemu-devel] [PATCH 8/9] usb: add serial bus property
This patch adds a serial property for all usb devices, which can be
used to set the serial number of a usb device (as listed by lsusb -v)
to a specific value. Applies to emulated devices only.
Signed-off-by: Gerd Hoffmann
---
hw/usb/bus.c |1 +
hw/usb/desc.c|6 ++
hw/usb/dev-hid.c |3 +++
hw/usb/dev-storage.c | 13 +++--
include/hw/usb.h |1 +
5 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/hw/usb/bus.c b/hw/usb/bus.c
index d1827be..f83d1de 100644
--- a/hw/usb/bus.c
+++ b/hw/usb/bus.c
@@ -13,6 +13,7 @@ static int usb_qdev_exit(DeviceState *qdev);
static Property usb_props[] = {
DEFINE_PROP_STRING("port", USBDevice, port_path),
+DEFINE_PROP_STRING("serial", USBDevice, serial),
DEFINE_PROP_BIT("full-path", USBDevice, flags,
USB_DEV_FLAG_FULL_PATH, true),
DEFINE_PROP_END_OF_LIST()
diff --git a/hw/usb/desc.c b/hw/usb/desc.c
index fce303e..bf6c522 100644
--- a/hw/usb/desc.c
+++ b/hw/usb/desc.c
@@ -566,6 +566,12 @@ void usb_desc_create_serial(USBDevice *dev)
char *path;
int dst;
+if (dev->serial) {
+/* 'serial' usb bus property has priority if present */
+usb_desc_set_string(dev, index, dev->serial);
+return;
+}
+
assert(index != 0 && desc->str[index] != NULL);
dst = snprintf(serial, sizeof(serial), "%s", desc->str[index]);
path = qdev_get_dev_path(hcd);
diff --git a/hw/usb/dev-hid.c b/hw/usb/dev-hid.c
index b48899d..31f3cde 100644
--- a/hw/usb/dev-hid.c
+++ b/hw/usb/dev-hid.c
@@ -560,6 +560,9 @@ static int usb_hid_initfn(USBDevice *dev, int kind)
{
USBHIDState *us = DO_UPCAST(USBHIDState, dev, dev);
+if (dev->serial) {
+usb_desc_set_string(dev, STR_SERIALNUMBER, dev->serial);
+}
usb_desc_init(dev);
us->intr = usb_ep_get(dev, USB_TOKEN_IN, 1);
hid_init(&us->hid, kind, usb_hid_changed);
diff --git a/hw/usb/dev-storage.c b/hw/usb/dev-storage.c
index 1073901..fe914ab 100644
--- a/hw/usb/dev-storage.c
+++ b/hw/usb/dev-storage.c
@@ -58,7 +58,6 @@ typedef struct {
USBPacket *packet;
/* usb-storage only */
BlockConf conf;
-char *serial;
uint32_t removable;
} MSDState;
@@ -602,7 +601,7 @@ static int usb_msd_initfn_storage(USBDevice *dev)
return -1;
}
-blkconf_serial(&s->conf, &s->serial);
+blkconf_serial(&s->conf, &dev->serial);
/*
* Hack alert: this pretends to be a block device, but it's really
@@ -616,16 +615,11 @@ static int usb_msd_initfn_storage(USBDevice *dev)
bdrv_detach_dev(bs, &s->dev.qdev);
s->conf.bs = NULL;
-if (s->serial) {
-usb_desc_set_string(dev, STR_SERIALNUMBER, s->serial);
-} else {
-usb_desc_create_serial(dev);
-}
-
+usb_desc_create_serial(dev);
usb_desc_init(dev);
scsi_bus_new(&s->bus, &s->dev.qdev, &usb_msd_scsi_info_storage, NULL);
scsi_dev = scsi_bus_legacy_add_drive(&s->bus, bs, 0, !!s->removable,
-s->conf.bootindex, s->serial);
+s->conf.bootindex, dev->serial);
if (!scsi_dev) {
return -1;
}
@@ -734,7 +728,6 @@ static const VMStateDescription vmstate_usb_msd = {
static Property msd_properties[] = {
DEFINE_BLOCK_PROPERTIES(MSDState, conf),
-DEFINE_PROP_STRING("serial", MSDState, serial),
DEFINE_PROP_BIT("removable", MSDState, removable, 0, false),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/include/hw/usb.h b/include/hw/usb.h
index 4d9d05e..901b0da 100644
--- a/include/hw/usb.h
+++ b/include/hw/usb.h
@@ -205,6 +205,7 @@ struct USBDevice {
DeviceState qdev;
USBPort *port;
char *port_path;
+char *serial;
void *opaque;
uint32_t flags;
--
1.7.9.7
[Qemu-devel] [PATCH 9/9] usb: fix serial number for hid devices
commit 7b074a22dab4bdda9864b933f1bc811a3db42845 changed the serial
number of hid devices. Add compat properties to keep the old serial
number for qemu 0.12 and older.
Signed-off-by: Gerd Hoffmann
---
hw/i386/pc_piix.c | 12
1 file changed, 12 insertions(+)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 97362f2..7972443 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -622,6 +622,18 @@ static QEMUMachine pc_machine_v0_13 = {
.driver = "virtio-serial-pci",\
.property = "vectors",\
.value= stringify(0),\
+},{\
+.driver = "usb-mouse",\
+.property = "serial",\
+.value= "1",\
+},{\
+.driver = "usb-tablet",\
+.property = "serial",\
+.value= "1",\
+},{\
+.driver = "usb-kbd",\
+.property = "serial",\
+.value= "1",\
}
static QEMUMachine pc_machine_v0_12 = {
--
1.7.9.7
[Qemu-devel] [PATCH 5/9] usb/hcd-ehci: Add Faraday FUSBH200 support
From: Kuo-Jung Su
Add Faraday FUSBH200 support, which is slightly different from EHCI spec.
(Or maybe simply a bad/wrong implementation...)
Signed-off-by: Kuo-Jung Su
Signed-off-by: Andreas Färber
Signed-off-by: Gerd Hoffmann
---
hw/usb/hcd-ehci-sysbus.c | 75 ++
hw/usb/hcd-ehci.h| 12
2 files changed, 87 insertions(+)
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
index bad9ca6..e7d4f74 100644
--- a/hw/usb/hcd-ehci-sysbus.c
+++ b/hw/usb/hcd-ehci-sysbus.c
@@ -124,12 +124,87 @@ static const TypeInfo ehci_tegra2_type_info = {
.class_init= ehci_tegra2_class_init,
};
+/*
+ * Faraday FUSBH200 USB 2.0 EHCI
+ */
+
+/**
+ * FUSBH200EHCIRegs:
+ * @FUSBH200_REG_EOF_ASTR: EOF/Async. Sleep Timer Register
+ * @FUSBH200_REG_BMCSR: Bus Monitor Control/Status Register
+ */
+enum FUSBH200EHCIRegs {
+FUSBH200_REG_EOF_ASTR = 0x34,
+FUSBH200_REG_BMCSR= 0x40,
+};
+
+static uint64_t fusbh200_ehci_read(void *opaque, hwaddr addr, unsigned size)
+{
+EHCIState *s = opaque;
+hwaddr off = s->opregbase + s->portscbase + 4 * s->portnr + addr;
+
+switch (off) {
+case FUSBH200_REG_EOF_ASTR:
+return 0x0041;
+case FUSBH200_REG_BMCSR:
+/* High-Speed, VBUS valid, interrupt level-high active */
+return (2 << 9) | (1 << 8) | (1 << 3);
+}
+
+return 0;
+}
+
+static void fusbh200_ehci_write(void *opaque, hwaddr addr, uint64_t val,
+unsigned size)
+{
+}
+
+static const MemoryRegionOps fusbh200_ehci_mmio_ops = {
+.read = fusbh200_ehci_read,
+.write = fusbh200_ehci_write,
+.valid.min_access_size = 4,
+.valid.max_access_size = 4,
+.endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static void fusbh200_ehci_init(Object *obj)
+{
+EHCISysBusState *i = SYS_BUS_EHCI(obj);
+FUSBH200EHCIState *f = FUSBH200_EHCI(obj);
+EHCIState *s = &i->ehci;
+
+memory_region_init_io(&f->mem_vendor, &fusbh200_ehci_mmio_ops, s,
+ "fusbh200", 0x4c);
+memory_region_add_subregion(&s->mem,
+s->opregbase + s->portscbase + 4 * s->portnr,
+&f->mem_vendor);
+}
+
+static void fusbh200_ehci_class_init(ObjectClass *oc, void *data)
+{
+SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc);
+
+sec->capsbase = 0x0;
+sec->opregbase = 0x10;
+sec->portscbase = 0x20;
+sec->portnr = 1;
+}
+
+static const TypeInfo ehci_fusbh200_type_info = {
+.name = TYPE_FUSBH200_EHCI,
+.parent= TYPE_SYS_BUS_EHCI,
+.instance_size = sizeof(FUSBH200EHCIState),
+.instance_init = fusbh200_ehci_init,
+.class_init= fusbh200_ehci_class_init,
+};
+
static void ehci_sysbus_register_types(void)
{
type_register_static(&ehci_type_info);
type_register_static(&ehci_xlnx_type_info);
type_register_static(&ehci_exynos4210_type_info);
type_register_static(&ehci_tegra2_type_info);
+type_register_static(&ehci_fusbh200_type_info);
}
type_init(ehci_sysbus_register_types)
diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h
index 1fb9483..15a28e8 100644
--- a/hw/usb/hcd-ehci.h
+++ b/hw/usb/hcd-ehci.h
@@ -338,6 +338,7 @@ typedef struct EHCIPCIState {
#define TYPE_SYS_BUS_EHCI "sysbus-ehci-usb"
#define TYPE_EXYNOS4210_EHCI "exynos4210-ehci-usb"
#define TYPE_TEGRA2_EHCI "tegra2-ehci-usb"
+#define TYPE_FUSBH200_EHCI "fusbh200-ehci-usb"
#define SYS_BUS_EHCI(obj) \
OBJECT_CHECK(EHCISysBusState, (obj), TYPE_SYS_BUS_EHCI)
@@ -365,4 +366,15 @@ typedef struct SysBusEHCIClass {
uint16_t portnr;
} SysBusEHCIClass;
+#define FUSBH200_EHCI(obj) \
+OBJECT_CHECK(FUSBH200EHCIState, (obj), TYPE_FUSBH200_EHCI)
+
+typedef struct FUSBH200EHCIState {
+/*< private >*/
+EHCISysBusState parent_obj;
+/*< public >*/
+
+MemoryRegion mem_vendor;
+} FUSBH200EHCIState;
+
#endif
--
1.7.9.7
[Qemu-devel] [PATCH 7/9] usb-host-libusb: set USB_DEV_FLAG_IS_HOST
... like host-{linux,bsd}.c do.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Gerd Hoffmann
---
hw/usb/host-libusb.c |1 +
1 file changed, 1 insertion(+)
diff --git a/hw/usb/host-libusb.c b/hw/usb/host-libusb.c
index 0c12b0f..e2f3cc8 100644
--- a/hw/usb/host-libusb.c
+++ b/hw/usb/host-libusb.c
@@ -895,6 +895,7 @@ static int usb_host_initfn(USBDevice *udev)
USBHostDevice *s = USB_HOST_DEVICE(udev);
loglevel = s->loglevel;
+udev->flags |= (1 << USB_DEV_FLAG_IS_HOST);
udev->auto_attach = 0;
QTAILQ_INIT(&s->requests);
QTAILQ_INIT(&s->isorings);
--
1.7.9.7
[Qemu-devel] [PATCH 6/9] usb/host-libusb: Fix building with libusb git master code
From: Hans de Goede
The next libusb release will deprecate libusb_get_port_path, and since
we compile with -Werror, this breaks the build.
Signed-off-by: Hans de Goede
Signed-off-by: Gerd Hoffmann
---
hw/usb/host-libusb.c |4
1 file changed, 4 insertions(+)
diff --git a/hw/usb/host-libusb.c b/hw/usb/host-libusb.c
index 3a582c5..0c12b0f 100644
--- a/hw/usb/host-libusb.c
+++ b/hw/usb/host-libusb.c
@@ -241,7 +241,11 @@ static int usb_host_get_port(libusb_device *dev, char
*port, size_t len)
size_t off;
int rc, i;
+#if LIBUSBX_API_VERSION >= 0x01000102
+rc = libusb_get_port_numbers(dev, path, 7);
+#else
rc = libusb_get_port_path(ctx, dev, path, 7);
+#endif
if (rc < 0) {
return 0;
}
--
1.7.9.7
[Qemu-devel] [PATCH 3/9] usb/hcd-ehci: Add Tegra2 SysBus EHCI device
From: Andreas Färber
This prepares an EHCI device for the Nvidia Tegra2 SoC family.
Values based on patch by Vincent Palatin and verified against TRM v01p.
Cc: Vincent Palatin
Signed-off-by: Andreas Färber
Signed-off-by: Gerd Hoffmann
---
hw/usb/hcd-ehci-sysbus.c | 15 +++
hw/usb/hcd-ehci.h|1 +
2 files changed, 16 insertions(+)
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
index e450137..68667b5 100644
--- a/hw/usb/hcd-ehci-sysbus.c
+++ b/hw/usb/hcd-ehci-sysbus.c
@@ -104,11 +104,26 @@ static const TypeInfo ehci_exynos4210_type_info = {
.class_init= ehci_exynos4210_class_init,
};
+static void ehci_tegra2_class_init(ObjectClass *oc, void *data)
+{
+SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc);
+
+sec->capsbase = 0x100;
+sec->opregbase = 0x140;
+}
+
+static const TypeInfo ehci_tegra2_type_info = {
+.name = TYPE_TEGRA2_EHCI,
+.parent= TYPE_SYS_BUS_EHCI,
+.class_init= ehci_tegra2_class_init,
+};
+
static void ehci_sysbus_register_types(void)
{
type_register_static(&ehci_type_info);
type_register_static(&ehci_xlnx_type_info);
type_register_static(&ehci_exynos4210_type_info);
+type_register_static(&ehci_tegra2_type_info);
}
type_init(ehci_sysbus_register_types)
diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h
index 7a93957..2c03e8f 100644
--- a/hw/usb/hcd-ehci.h
+++ b/hw/usb/hcd-ehci.h
@@ -339,6 +339,7 @@ typedef struct EHCIPCIState {
#define TYPE_SYS_BUS_EHCI "sysbus-ehci-usb"
#define TYPE_EXYNOS4210_EHCI "exynos4210-ehci-usb"
+#define TYPE_TEGRA2_EHCI "tegra2-ehci-usb"
#define SYS_BUS_EHCI(obj) \
OBJECT_CHECK(EHCISysBusState, (obj), TYPE_SYS_BUS_EHCI)
--
1.7.9.7
[Qemu-devel] [PATCH 1/9] usb/hcd-ehci-sysbus: Convert to QOM realize
From: Andreas Färber
The SysBus qdev initfn merely calls SysBusDeviceClass::init, so we can
replace it with a realizefn already. This avoids getting into any initfn
ambiguity with the upcoming Faraday EHCI implementation.
Rename internal usb_ehci_initfn() to usb_ehci_realize() to allow to
return Errors from common initialization code as well.
Signed-off-by: Andreas Färber
Signed-off-by: Gerd Hoffmann
---
hw/usb/hcd-ehci-pci.c|2 +-
hw/usb/hcd-ehci-sysbus.c | 13 ++---
hw/usb/hcd-ehci.c|2 +-
hw/usb/hcd-ehci.h|2 +-
4 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/hw/usb/hcd-ehci-pci.c b/hw/usb/hcd-ehci-pci.c
index f1b5f5d..b352f73 100644
--- a/hw/usb/hcd-ehci-pci.c
+++ b/hw/usb/hcd-ehci-pci.c
@@ -68,7 +68,7 @@ static int usb_ehci_pci_initfn(PCIDevice *dev)
s->capsbase = 0x00;
s->opregbase = 0x20;
-usb_ehci_initfn(s, DEVICE(dev));
+usb_ehci_realize(s, DEVICE(dev), NULL);
pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
return 0;
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
index f9e4fd3..3179e6f 100644
--- a/hw/usb/hcd-ehci-sysbus.c
+++ b/hw/usb/hcd-ehci-sysbus.c
@@ -32,8 +32,9 @@ static Property ehci_sysbus_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
-static int usb_ehci_sysbus_initfn(SysBusDevice *dev)
+static void usb_ehci_sysbus_realize(DeviceState *dev, Error **errp)
{
+SysBusDevice *d = SYS_BUS_DEVICE(dev);
EHCISysBusState *i = SYS_BUS_EHCI(dev);
SysBusEHCIClass *sec = SYS_BUS_EHCI_GET_CLASS(dev);
EHCIState *s = &i->ehci;
@@ -42,18 +43,16 @@ static int usb_ehci_sysbus_initfn(SysBusDevice *dev)
s->opregbase = sec->opregbase;
s->as = &address_space_memory;
-usb_ehci_initfn(s, DEVICE(dev));
-sysbus_init_irq(dev, &s->irq);
-sysbus_init_mmio(dev, &s->mem);
-return 0;
+usb_ehci_realize(s, dev, errp);
+sysbus_init_irq(d, &s->irq);
+sysbus_init_mmio(d, &s->mem);
}
static void ehci_sysbus_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
-SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
-k->init = usb_ehci_sysbus_initfn;
+dc->realize = usb_ehci_sysbus_realize;
dc->vmsd = &vmstate_ehci_sysbus;
dc->props = ehci_sysbus_properties;
}
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index 1ad2159..ea0379b 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -2508,7 +2508,7 @@ const VMStateDescription vmstate_ehci = {
}
};
-void usb_ehci_initfn(EHCIState *s, DeviceState *dev)
+void usb_ehci_realize(EHCIState *s, DeviceState *dev, Error **errp)
{
int i;
diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h
index 2fcb92f..15c7630 100644
--- a/hw/usb/hcd-ehci.h
+++ b/hw/usb/hcd-ehci.h
@@ -322,7 +322,7 @@ struct EHCIState {
extern const VMStateDescription vmstate_ehci;
-void usb_ehci_initfn(EHCIState *s, DeviceState *dev);
+void usb_ehci_realize(EHCIState *s, DeviceState *dev, Error **errp);
#define TYPE_PCI_EHCI "pci-ehci-usb"
#define PCI_EHCI(obj) OBJECT_CHECK(EHCIPCIState, (obj), TYPE_PCI_EHCI)
--
1.7.9.7
Re: [Qemu-devel] [PATCH v2] e600 core for MPC86xx processors
Am 24.06.2013 um 08:13 schrieb Julio Guerra : > 2013/6/24 Alexey Kardashevskiy : >> On 06/21/2013 10:03 PM, Alexander Graf wrote: >>> >>> On 21.06.2013, at 14:01, Julio Guerra wrote: >>> 2013/6/21 Alexander Graf : > > On 26.05.2013, at 19:41, Julio Guerra wrote: > >> MPC86xx processors are based on the e600 core, which is not the case >> in qemu where it is based on the 7400 processor. >> >> This patch creates the e600 core and instantiates the MPC86xx >> processors based on it. Therefore, adding the high BATs and the SPRG >> 4..7 registers, which are e600-specific [1]. >> >> This allows to define the MPC8610 processor too and my program running >> on a real MPC8610 target is now able to run on qemu :) >> >> [1] http://cache.freescale.com/files/32bit/doc/ref_manual/E600CORERM.pdf >> >> Signed-off-by: Julio Guerra > > Thanks, applied to ppc-next. I just retested this patch and I noticed the `handle_mmu_fault` default value introduced by recent A. Farber patches on the CPU definitions is wrong with the selected memory model. Thus qemu complains about the MMU model. The following is missing in e600 CPU definition: > #if defined(CONFIG_SOFTMMU) > ppc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > #endif Can you correct it or should I resend a patch (v3 or just the previous three lines) ? >>> >>> Just send a patch on top of the current one. >> >> >> I do not really understand what this patch actually does but it breaks my >> pseries/power7 setup. Please, help. >> >> >> Starting program: /home/aik/qemu-system-ppc64 -L qemu-ppc64-bios/ -trace >> events=qemu_trace_events -net nic,model=e1000,addr=0:0:0 -net >> user,hostfwd=tcp::5000-:22 -m 1024 -machine pseries -nographic -vga none >> -enable-kvm -kernel guest.vmlinux.n -initrd 1.cpio >> [Thread debugging using libthread_db enabled] >> Using host libthread_db library "/lib64/libthread_db.so.1". >> ** >> ERROR:/home/alexey/pcipassthru/qemu-impreza/qom/object.c:152:type_get_parent: >> assertion failed: (type->parent_type != NULL) >> >> Breakpoint 4, 0x0080c6eefb8c in .abort () from /lib64/libc.so.6 >> Missing separate debuginfos, use: debuginfo-install SDL-1.2.15-8.fc19.ppc64 >> bluez-libs-4.101-6.fc19.ppc64 boost-system-1.53.0-6.fc19.ppc64 >> boost-thread-1.53.0-6.fc19.ppc64 brlapi-0.6.0-5.fc19.ppc64 >> ceph-devel-0.56.4-1.fc19.ppc64 ceph-libs-0.56.4-1.fc19.ppc64 >> cryptopp-5.6.2-2.fc19.ppc64 cyrus-sasl-lib-2.1.26-8.fc19.ppc64p7 >> glib2-2.36.2-1.fc19.ppc64 glibc-2.17-4.fc19.ppc64p7 >> glusterfs-3.4.0-0.5.beta2.fc19.ppc64 >> glusterfs-api-3.4.0-0.5.beta2.fc19.ppc64 gmp-5.1.1-2.fc19.ppc64 >> gnutls-3.1.11-1.fc19.ppc64 keyutils-libs-1.5.5-4.fc19.ppc64 >> krb5-libs-1.11.2-10.fc19.ppc64 leveldb-1.9.0-1.fc19.ppc64 >> libX11-1.5.99.902-1.fc19.ppc64 libXau-1.0.6-7.fc19.ppc64 >> libcom_err-1.42.7-2.fc19.ppc64 libcurl-7.29.0-6.fc19.ppc64 >> libfdt-1.3.0-6.fc19.ppc64 libgcc-4.8.0-8.fc19.ppc64 >> libgcrypt-1.5.2-1.fc19.ppc64 libgpg-error-1.11-1.fc19.ppc64 >> libidn-1.26-2.fc19.ppc64 libjpeg-turbo-1.2.90-2.fc19.ppc64 >> libselinux-2.1.13-15.fc19.ppc64 libssh2-1.4.3-4.fc19.ppc64 >> libstdc++-4.8.0-8.fc19.ppc64 libtasn1-3.3-1.fc19.ppc64 >> libuuid-2.23.1-2.fc19.ppc64 libxcb-1.9-3.fc19.ppc64 >> ncurses-libs-5.9-11.20130511.fc19.ppc64 nettle-2.6-2.fc19.ppc64 >> nspr-4.9.6-1.fc19.ppc64 nss-3.14.3-13.0.fc19.ppc64 >> nss-softokn-freebl-3.14.3-1.fc19.ppc64 nss-util-3.14.3-1.fc19.ppc64 >> openldap-2.4.35-4.fc19.ppc64 openssl-libs-1.0.1e-4.fc19.ppc64p7 >> p11-kit-0.18.3-1.fc19.ppc64 pcre-8.32-6.fc19.ppc64p7 >> pixman-0.30.0-1.fc19.ppc64 snappy-1.1.0-1.fc19.ppc64 >> zlib-1.2.7-10.fc19.ppc64p7 >> (gdb) up >> #1 0x0080c742d54c in .g_assertion_message () from >> /lib64/libglib-2.0.so.0 >> (gdb) >> #2 0x0080c742d5f4 in .g_assertion_message_expr () from >> /lib64/libglib-2.0.so.0 >> (gdb) bt >> #0 0x0080c6eefb8c in .abort () from /lib64/libc.so.6 >> #1 0x0080c742d54c in .g_assertion_message () from >> /lib64/libglib-2.0.so.0 >> #2 0x0080c742d5f4 in .g_assertion_message_expr () from >> /lib64/libglib-2.0.so.0 >> #3 0x10260058 in type_get_parent (type=0x10f7b260) >>at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:152 >> #4 0x10260120 in type_class_get_size (ti=0x10f7b260) >>at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:170 >> #5 0x102603d8 in type_initialize (ti=0x10f7b260) >>at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:236 >> #6 0x1026175c in object_class_foreach_tramp (key=0x10f7b3e0, >> value=0x10f7b260, >>opaque=0x3fffe5e0) at >> /home/alexey/pcipassthru/qemu-impreza/qom/object.c:626 >> #7 0x0080c73e0ab0 in .g_hash_table_foreach () from >> /lib64/libglib-2.0.so.0 >> #8 0x1026188c in object_class_foreach (fn= >>@0x10681290: 0x10261988 , >>implements_type=0x105c7188 "powerpc64-cpu", include_abstra
[Qemu-devel] [PATCH v2 02/13] qemu-socket: drop pointless allocation
Signed-off-by: Gerd Hoffmann
---
util/qemu-sockets.c |1 -
1 file changed, 1 deletion(-)
diff --git a/util/qemu-sockets.c b/util/qemu-sockets.c
index 86fb09c..35023a8 100644
--- a/util/qemu-sockets.c
+++ b/util/qemu-sockets.c
@@ -871,7 +871,6 @@ SocketAddress *socket_parse(const char *str, Error **errp)
}
} else {
addr->kind = SOCKET_ADDRESS_KIND_INET;
-addr->inet = g_new(InetSocketAddress, 1);
addr->inet = inet_parse(str, errp);
if (addr->inet == NULL) {
goto fail;
--
1.7.9.7
[Qemu-devel] [PULL 0/9] usb patch queue
Hi, Here comes the usb patch queue, bringing QOM improvements for ehci-sysbus, tegra2 ehci support and the usual share of little bug fixes. please pull, Gerd The following changes since commit 576156ffed72ab4feb0b752979db86ff8759a2a1: Merge remote-tracking branch 'bonzini/iommu-for-anthony' into staging (2013-06-20 16:53:39 -0500) are available in the git repository at: git://git.kraxel.org/qemu usb.84 for you to fetch changes up to 93c8e4dc386a243d7d417567d81dc1f1698478a4: usb: fix serial number for hid devices (2013-06-24 08:41:08 +0200) Andreas Färber (3): usb/hcd-ehci-sysbus: Convert to QOM realize usb/hcd-ehci: Split off instance_init from realize usb/hcd-ehci: Add Tegra2 SysBus EHCI device Gerd Hoffmann (3): usb-host-libusb: set USB_DEV_FLAG_IS_HOST usb: add serial bus property usb: fix serial number for hid devices Hans de Goede (1): usb/host-libusb: Fix building with libusb git master code Kuo-Jung Su (2): usb/hcd-ehci: Replace PORTSC macros with variables usb/hcd-ehci: Add Faraday FUSBH200 support hw/i386/pc_piix.c| 12 + hw/usb/bus.c |1 + hw/usb/desc.c|6 +++ hw/usb/dev-hid.c |3 ++ hw/usb/dev-storage.c | 13 ++--- hw/usb/hcd-ehci-pci.c| 23 ++--- hw/usb/hcd-ehci-sysbus.c | 121 +++--- hw/usb/hcd-ehci.c| 50 +++ hw/usb/hcd-ehci.h| 28 --- hw/usb/host-libusb.c |5 ++ include/hw/usb.h |1 + 11 files changed, 212 insertions(+), 51 deletions(-)
[Qemu-devel] [PATCH v2 10/13] qemu-char: minor mux chardev fixes
mux failure path has a memory leak. creating a mux chardev can't
fail though, so just assert() that instead of fixing an error path
which never ever runs anyway ...
Also fix bid being leaked while being at it.
Signed-off-by: Gerd Hoffmann
---
qemu-char.c |7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
index 5a2291d..e6c3157 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -3193,7 +3193,7 @@ CharDriverState *qemu_chr_new_from_opts(QemuOpts *opts,
ChardevBackend *backend = g_new0(ChardevBackend, 1);
ChardevReturn *ret = NULL;
const char *id = qemu_opts_id(opts);
-const char *bid = NULL;
+char *bid = NULL;
if (qemu_opt_get_bool(opts, "mux", 0)) {
bid = g_strdup_printf("%s-base", id);
@@ -3220,9 +3220,7 @@ CharDriverState *qemu_chr_new_from_opts(QemuOpts *opts,
backend->kind = CHARDEV_BACKEND_KIND_MUX;
backend->mux->chardev = g_strdup(bid);
ret = qmp_chardev_add(id, backend, errp);
-if (error_is_set(errp)) {
-goto qapi_out;
-}
+assert(!error_is_set(errp));
}
chr = qemu_chr_find(id);
@@ -3230,6 +3228,7 @@ CharDriverState *qemu_chr_new_from_opts(QemuOpts *opts,
qapi_out:
qapi_free_ChardevBackend(backend);
qapi_free_ChardevReturn(ret);
+g_free(bid);
return chr;
}
--
1.7.9.7
[Qemu-devel] [PATCH v2 12/13] qemu-char: report udb backend errors
Signed-off-by: Gerd Hoffmann
---
qemu-char.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/qemu-char.c b/qemu-char.c
index 7d072a8..dcc91bb 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -2255,6 +2255,8 @@ static CharDriverState *qemu_chr_open_udp(QemuOpts *opts)
fd = inet_dgram_opts(opts, &local_err);
if (fd < 0) {
+qerror_report_err(local_err);
+error_free(local_err);
return NULL;
}
return qemu_chr_open_udp_fd(fd);
--
1.7.9.7
[Qemu-devel] [PATCH v2 08/13] qemu-char: don't leak opts on error
Signed-off-by: Gerd Hoffmann
---
qemu-char.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qemu-char.c b/qemu-char.c
index 3e0044b..5751391 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -3185,7 +3185,7 @@ CharDriverState *qemu_chr_new_from_opts(QemuOpts *opts,
if (i == NULL) {
error_setg(errp, "chardev: backend \"%s\" not found",
qemu_opt_get(opts, "backend"));
-return NULL;
+goto err;
}
if (!cd->open) {
--
1.7.9.7
Re: [Qemu-devel] [PULL 00/21] pci,net,misc enhancements
On Sun, Jun 23, 2013 at 02:38:04PM +0300, Michael S. Tsirkin wrote:
> On Fri, Jun 21, 2013 at 08:10:15AM -0500, Anthony Liguori wrote:
> > "Michael S. Tsirkin" writes:
> >
> > > From: Michael S. Tsirkin
> > >
> > > The following changes since commit
> > > 90a2541b763b31d2b551b07e24aae3de5266d31b:
> > >
> > > target-i386: fix over 80 chars warnings (2013-06-15 17:50:38 +)
> > >
> > > are available in the git repository at:
> > >
> > > git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_anthony
> > >
> > > for you to fetch changes up to f96c30047009f8a9c3cecf68104d8d99f989f54d:
> > >
> > > pci: Fold host_buses list into PCIHostState functionality
> > > (2013-06-19 18:35:05 +0300)
> >
> > SEGV's during pretty much any test I try to run during startup:
> >
> > Core was generated by
> > `/home/aliguori/build/qemu/x86_64-softmmu/qemu-system-x86_64 -kernel
> > /usr/local/'.
> > Program terminated with signal 11, Segmentation fault.
> > #0 qemu_get_queue (nic=0x0) at /home/aliguori/git/qemu/net/net.c:263
>
>
> It's caused by the rx filter patch, sorry about not catching it.
If we don't assign 'id' for virtio-net nic device, crash[1] will occur.
Your fix is right for that.
But anthony's calltrace seems different from that.
> I've fixed it up but will send a pull request without it,
> so it can get a bit more testing.
BTW, we can use 'nc->name' to avoid the rx-filter crash[1].
I have sent a patch for mst/pci.
--
Amos.
crash [1]
#0 0x759236b1 in __strlen_sse2_pminub () from /lib64/libc.so.6
#1 0x55873a8d in qstring_from_str (str=0x0) at qobject/qstring.c:72
#2 0x55876dae in parse_escape (ap=0x71c3c910, ctxt=0x7fffe4015650)
at qobject/json-parser.c:614
#3 parse_value (ctxt=ctxt@entry=0x7fffe4015650, ap=ap@entry=0x71c3c910) at
qobject/json-parser.c:691
#4 0x55876fd2 in parse_pair (ctxt=ctxt@entry=0x7fffe4015650,
dict=dict@entry=0x7fffe4032400, ap=ap@entry=0x71c3c910) at
qobject/json-parser.c:393
#5 0x558765fe in parse_object (ap=0x71c3c910, ctxt=0x7fffe4015650)
at qobject/json-parser.c:454
#6 parse_value (ctxt=ctxt@entry=0x7fffe4015650, ap=ap@entry=0x71c3c910) at
qobject/json-parser.c:686
#7 0x55877193 in json_parser_parse_err (tokens=,
ap=0x71c3c910, errp=errp@entry=0x0) at qobject/json-parser.c:717
#8 0x5587729f in json_parser_parse (tokens=,
ap=) at qobject/json-parser.c:705
#9 0x55875254 in parse_json (parser=0x71c3c8a0, tokens=) at qobject/qjson.c:34
#10 0x55875d6a in json_message_process_token (lexer=0x71c3c8a8,
token=0x7fffe4015440, type=JSON_OPERATOR, x=26, y=0) at
qobject/json-streamer.c:87
#11 0x5588a7af in json_lexer_feed_char
(lexer=lexer@entry=0x71c3c8a8, ch=125 '}', flush=flush@entry=false) at
qobject/json-lexer.c:303
#12 0x5588a8f6 in json_lexer_feed (lexer=lexer@entry=0x71c3c8a8,
buffer=buffer@entry=0x558d1882 "{ 'name': %s, 'path': %s }",
size=)
at qobject/json-lexer.c:356
#13 0x55875f81 in json_message_parser_feed
(parser=parser@entry=0x71c3c8a0, buffer=buffer@entry=0x558d1882 "{
'name': %s, 'path': %s }", size=)
at qobject/json-streamer.c:110
#14 0x55875a2d in qobject_from_jsonv (string=0x558d1882 "{ 'name':
%s, 'path': %s }", ap=ap@entry=0x71c3c910) at qobject/qjson.c:44
#15 0x55875b39 in qobject_from_jsonf
(string=string@entry=0x558d1882 "{ 'name': %s, 'path': %s }") at
qobject/qjson.c:66
#16 0x557b5477 in rxfilter_notify (nc=nc@entry=0x567463e0) at
/home/devel/qemu/hw/net/virtio-net.c:203
#17 0x557b6fbe in virtio_net_handle_rx_mode (iov_cnt=,
iov=0x71c44ab0, cmd=0 '\000', n=0x56756528) at
/home/devel/qemu/hw/net/virtio-net.c:542
#18 virtio_net_handle_ctrl (vdev=0x56756528, vq=0x56767850) at
/home/devel/qemu/hw/net/virtio-net.c:755
#19 0x557c7cf2 in access_with_adjusted_size (addr=addr@entry=16,
value=value@entry=0x71c48b68, size=2, access_size_min=,
access_size_max=, access=access@entry=0x557c8310
, opaque=opaque@entry=0x567563e0) at
/home/devel/qemu/memory.c:399
#20 0x557c93d7 in memory_region_iorange_write (iorange=,
offset=16, width=2, data=2) at /home/devel/qemu/memory.c:475
#21 0x557c6a16 in kvm_handle_io (count=1, size=2, direction=1,
data=, port=49232) at /home/devel/qemu/kvm-all.c:1510
#22 kvm_cpu_exec (env=env@entry=0x566d6660) at
/home/devel/qemu/kvm-all.c:1659
#23 0x557706d5 in qemu_kvm_cpu_thread_fn (arg=0x566d6660) at
/home/devel/qemu/cpus.c:759
#24 0x76985d15 in start_thread () from /lib64/libpthread.so.0
#25 0x758b548d in clone () from /lib64/libc.so.6
[Qemu-devel] [PATCH v2 11/13] qemu-char: add -chardev mux support
Allow to explicitly create mux chardevs on the command line,
like you can using QMP.
Signed-off-by: Gerd Hoffmann
---
qemu-char.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/qemu-char.c b/qemu-char.c
index e6c3157..7d072a8 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -3122,6 +3122,19 @@ static void qemu_chr_parse_memory(QemuOpts *opts,
ChardevBackend *backend,
}
}
+static void qemu_chr_parse_mux(QemuOpts *opts, ChardevBackend *backend,
+ Error **errp)
+{
+const char *chardev = qemu_opt_get(opts, "chardev");
+
+if (chardev == NULL) {
+error_setg(errp, "chardev: mux: no chardev given");
+return;
+}
+backend->mux = g_new0(ChardevMux, 1);
+backend->mux->chardev = g_strdup(chardev);
+}
+
typedef struct CharDriver {
const char *name;
/* old, pre qapi */
@@ -3488,6 +3501,9 @@ QemuOptsList qemu_chardev_opts = {
},{
.name = "size",
.type = QEMU_OPT_SIZE,
+},{
+.name = "chardev",
+.type = QEMU_OPT_STRING,
},
{ /* end of list */ }
},
@@ -3778,6 +3794,8 @@ static void register_types(void)
register_char_driver_qapi("console", CHARDEV_BACKEND_KIND_CONSOLE, NULL);
register_char_driver_qapi("pipe", CHARDEV_BACKEND_KIND_PIPE,
qemu_chr_parse_pipe);
+register_char_driver_qapi("mux", CHARDEV_BACKEND_KIND_MUX,
+ qemu_chr_parse_mux);
}
type_init(register_types);
--
1.7.9.7
[Qemu-devel] [PATCH v2 09/13] qemu-char: use ChardevBackendKind in in CharDriver
Signed-off-by: Gerd Hoffmann
---
include/sysemu/char.h |2 +-
qemu-char.c |4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/sysemu/char.h b/include/sysemu/char.h
index 066c216..e65e4a4 100644
--- a/include/sysemu/char.h
+++ b/include/sysemu/char.h
@@ -281,7 +281,7 @@ CharDriverState *qemu_chr_find(const char *name);
QemuOpts *qemu_chr_parse_compat(const char *label, const char *filename);
void register_char_driver(const char *name, CharDriverState *(*open)(QemuOpts
*));
-void register_char_driver_qapi(const char *name, int kind,
+void register_char_driver_qapi(const char *name, ChardevBackendKind kind,
void (*parse)(QemuOpts *opts, ChardevBackend *backend, Error **errp));
/* add an eventfd to the qemu devices that are polled */
diff --git a/qemu-char.c b/qemu-char.c
index 5751391..5a2291d 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -3127,7 +3127,7 @@ typedef struct CharDriver {
/* old, pre qapi */
CharDriverState *(*open)(QemuOpts *opts);
/* new, qapi-based */
-int kind;
+ChardevBackendKind kind;
void (*parse)(QemuOpts *opts, ChardevBackend *backend, Error **errp);
} CharDriver;
@@ -3144,7 +3144,7 @@ void register_char_driver(const char *name,
CharDriverState *(*open)(QemuOpts *)
backends = g_slist_append(backends, s);
}
-void register_char_driver_qapi(const char *name, int kind,
+void register_char_driver_qapi(const char *name, ChardevBackendKind kind,
void (*parse)(QemuOpts *opts, ChardevBackend *backend, Error **errp))
{
CharDriver *s;
--
1.7.9.7
[Qemu-devel] [PATCH v2 13/13] qemu-socket: don't leak opts on error
Signed-off-by: Gerd Hoffmann --- util/qemu-sockets.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/qemu-sockets.c b/util/qemu-sockets.c index 126cbb6..095716e 100644 --- a/util/qemu-sockets.c +++ b/util/qemu-sockets.c @@ -963,7 +963,7 @@ int socket_dgram(SocketAddress *remote, SocketAddress *local, Error **errp) default: error_setg(errp, "socket type unsupported for datagram"); -return -1; +fd = -1; } qemu_opts_del(opts); return fd; -- 1.7.9.7
[Qemu-devel] [PATCH v2 03/13] qemu-socket: catch monitor_get_fd failures
Signed-off-by: Gerd Hoffmann
---
util/qemu-sockets.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/util/qemu-sockets.c b/util/qemu-sockets.c
index 35023a8..126cbb6 100644
--- a/util/qemu-sockets.c
+++ b/util/qemu-sockets.c
@@ -903,7 +903,7 @@ int socket_connect(SocketAddress *addr, Error **errp,
case SOCKET_ADDRESS_KIND_FD:
fd = monitor_get_fd(cur_mon, addr->fd->str, errp);
-if (callback) {
+if (fd >= 0 && callback) {
qemu_set_nonblock(fd);
callback(fd, opaque);
}
--
1.7.9.7
[Qemu-devel] [PATCH v2 06/13] qemu-char: print notification to stderr
Signed-off-by: Gerd Hoffmann
---
qemu-char.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
index cfc68cd..3e0044b 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -2666,8 +2666,8 @@ static CharDriverState *qemu_chr_open_socket_fd(int fd,
bool do_nodelay,
}
if (is_listen && is_waitconnect) {
-printf("QEMU waiting for connection on: %s\n",
- chr->filename);
+fprintf(stderr, "QEMU waiting for connection on: %s\n",
+chr->filename);
tcp_chr_accept(s->listen_chan, G_IO_IN, chr);
qemu_set_nonblock(s->listen_fd);
}
--
1.7.9.7
[Qemu-devel] [PATCH v2 05/13] qemu-char: use more specific error_setg_* variants
Signed-off-by: Gerd Hoffmann
---
qemu-char.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
index ee7c70e..cfc68cd 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -2604,7 +2604,7 @@ static CharDriverState *qemu_chr_open_socket_fd(int fd,
bool do_nodelay,
memset(&ss, 0, ss_len);
if (getsockname(fd, (struct sockaddr *) &ss, &ss_len) != 0) {
-error_setg(errp, "getsockname: %s", strerror(errno));
+error_setg_errno(errp, errno, "getsockname");
return NULL;
}
@@ -3536,7 +3536,7 @@ static int qmp_chardev_open_file_source(char *src, int
flags,
TFR(fd = qemu_open(src, flags, 0666));
if (fd == -1) {
-error_setg(errp, "open %s: %s", src, strerror(errno));
+error_setg_file_open(errp, errno, src);
}
return fd;
}
--
1.7.9.7
[Qemu-devel] [PATCH v2 00/13] A bunch of little socket + chardev fixes
Hi, Here is v2 of the series, addressing Michaels review comments. cheers, Gerd Gerd Hoffmann (13): qemu-socket: zero-initialize SocketAddress qemu-socket: drop pointless allocation qemu-socket: catch monitor_get_fd failures qemu-char: check optional fields using has_* qemu-char: use more specific error_setg_* variants qemu-char: print notification to stderr qemu-char: fix documentation for telnet+wait socket flags qemu-char: don't leak opts on error qemu-char: use ChardevBackendKind in in CharDriver qemu-char: minor mux chardev fixes qemu-char: add -chardev mux support qemu-char: report udb backend errors qemu-socket: don't leak opts on error include/sysemu/char.h |2 +- qapi-schema.json |7 --- qemu-char.c | 45 - util/qemu-sockets.c |9 - 4 files changed, 41 insertions(+), 22 deletions(-) -- 1.7.9.7
[Qemu-devel] [PATCH v2 07/13] qemu-char: fix documentation for telnet+wait socket flags
Signed-off-by: Gerd Hoffmann --- qapi-schema.json |7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/qapi-schema.json b/qapi-schema.json index a80ee40..a29ce57 100644 --- a/qapi-schema.json +++ b/qapi-schema.json @@ -3185,10 +3185,11 @@ # @addr: socket address to listen on (server=true) #or connect to (server=false) # @server: #optional create server socket (default: true) -# @wait: #optional wait for connect (not used for server -#sockets, default: false) +# @wait: #optional wait for incoming connection on server +#sockets (default: false). # @nodelay: #optional set TCP_NODELAY socket option (default: false) -# @telnet: #optional enable telnet protocol (default: false) +# @telnet: #optional enable telnet protocol on server +# sockets (default: false) # # Since: 1.4 ## -- 1.7.9.7
[Qemu-devel] [PATCH v2 04/13] qemu-char: check optional fields using has_*
Signed-off-by: Gerd Hoffmann
---
qemu-char.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
index 2c3cfe6..ee7c70e 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -3500,7 +3500,7 @@ static CharDriverState *qmp_chardev_open_file(ChardevFile
*file, Error **errp)
{
HANDLE out;
-if (file->in) {
+if (file->has_in) {
error_setg(errp, "input file not supported");
return NULL;
}
@@ -3551,7 +3551,7 @@ static CharDriverState *qmp_chardev_open_file(ChardevFile
*file, Error **errp)
return NULL;
}
-if (file->in) {
+if (file->has_in) {
flags = O_RDONLY;
in = qmp_chardev_open_file_source(file->in, flags, errp);
if (error_is_set(errp)) {
--
1.7.9.7
[Qemu-devel] [PATCH v2 01/13] qemu-socket: zero-initialize SocketAddress
Signed-off-by: Gerd Hoffmann
---
util/qemu-sockets.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/util/qemu-sockets.c b/util/qemu-sockets.c
index 96eca2a..86fb09c 100644
--- a/util/qemu-sockets.c
+++ b/util/qemu-sockets.c
@@ -848,9 +848,9 @@ int unix_nonblocking_connect(const char *path,
SocketAddress *socket_parse(const char *str, Error **errp)
{
-SocketAddress *addr = NULL;
+SocketAddress *addr;
-addr = g_new(SocketAddress, 1);
+addr = g_new0(SocketAddress, 1);
if (strstart(str, "unix:", NULL)) {
if (str[5] == '\0') {
error_setg(errp, "invalid Unix socket address");
--
1.7.9.7
[Qemu-devel] [PATCH for mst/pci] output nc->name in NIC_RX_FILTER_CHANGED event
netclient 'name' entry in event is useful for management to know
which device is changed. n->netclient_name is not always set.
This patch changes to use nc->name. If we don't assign 'id',
qemu will set a generated name to nc->name.
Signed-off-by: Amos Kong
---
hw/net/virtio-net.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index c88403a..e4d9752 100644
--- a/hw/net/virtio-net.c
+++ b/hw/net/virtio-net.c
@@ -200,14 +200,9 @@ static void rxfilter_notify(NetClientState *nc)
VirtIONet *n = qemu_get_nic_opaque(nc);
if (nc->rxfilter_notify_enabled) {
-if (n->netclient_name) {
-event_data = qobject_from_jsonf("{ 'name': %s, 'path': %s }",
-n->netclient_name,
-
object_get_canonical_path(OBJECT(n->qdev)));
-} else {
-event_data = qobject_from_jsonf("{ 'path': %s }",
-
object_get_canonical_path(OBJECT(n->qdev)));
-}
+event_data = qobject_from_jsonf("{ 'name': %s, 'path': %s }",
+ nc->name,
+ object_get_canonical_path(OBJECT(n->qdev)));
monitor_protocol_event(QEVENT_NIC_RX_FILTER_CHANGED, event_data);
qobject_decref(event_data);
--
1.8.1.4
Re: [Qemu-devel] [PATCH v2] vmdk: refuse to open higher version than supported
On Thu, 06/13 10:38, Stefan Hajnoczi wrote: > On Thu, Jun 13, 2013 at 11:21:29AM +0800, Fam Zheng wrote: > > Refuse to open higher version for safety. > > > > Although we try to be compatible with published VMDK spec, VMware has > > newer version from ESXi 5.1 exported OVF/OVA, which we have no knowledge > > what's changed in it. And it is very likely to have more new versions in > > the future, so it's not safe to open them blindly. > > > > Signed-off-by: Fam Zheng > > > > --- > > > > v2: Report error and return -ENOTSUP. > > > > --- > > block/vmdk.c | 9 + > > 1 file changed, 9 insertions(+) > > Reviewed-by: Stefan Hajnoczi Is this OK to be applied? Thanks. -- Fam
Re: [Qemu-devel] [PATCH 01/26] ohci: use realize for ohci
Hi Hu,
On Mon, Jun 24, 2013 at 4:11 PM, Hu Tao wrote:
> On Mon, Jun 24, 2013 at 03:54:31PM +1000, Peter Crosthwaite wrote:
>> Hi Hu,
>>
>> On Sat, Jun 22, 2013 at 6:50 PM, Hu Tao wrote:
>> > Cc: Gerd Hoffmann
>> > Signed-off-by: Hu Tao
>> > ---
>> > hw/usb/hcd-ohci.c | 16 +++-
>> > 1 file changed, 7 insertions(+), 9 deletions(-)
>> >
>> > diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c
>> > index 51241cd..79ef41b 100644
>> > --- a/hw/usb/hcd-ohci.c
>> > +++ b/hw/usb/hcd-ohci.c
>> > @@ -1876,17 +1876,16 @@ typedef struct {
>> > dma_addr_t dma_offset;
>> > } OHCISysBusState;
>> >
>> > -static int ohci_init_pxa(SysBusDevice *dev)
>> > +static void ohci_realize_pxa(DeviceState *dev, Error **errp)
>> > {
>> > -OHCISysBusState *s = FROM_SYSBUS(OHCISysBusState, dev);
>> > +OHCISysBusState *s = DO_UPCAST(OHCISysBusState, busdev.qdev, dev);
>>
>> I don't think this is an improvement. Until a QOM cast macro is
>> available, FROM_SYSBUS is preferable to a DO_UPCAST I think?
>
> patch 2 introduces QOM macro and replaces DO_UPCAST. Instead, we can
> also first do QOM then realize. Which one do you prefer?
>
Other way round I think make more sense, as no need to have this ugly
hunk for transition sake.
Squashing is another low effort option, one patch that just does it
all makes sense to me (and ive done this a few times already with
various devices).
Regards,
Peter
>>
>> > +SysBusDevice *b = SYS_BUS_DEVICE(dev);
>> >
>> > /* Cannot fail as we pass NULL for masterbus */
>> > -usb_ohci_init(&s->ohci, &dev->qdev, s->num_ports, s->dma_offset,
>> > NULL, 0,
>> > +usb_ohci_init(&s->ohci, dev, s->num_ports, s->dma_offset, NULL, 0,
>> >&dma_context_memory);
>>
>> Rebase required due to Paolos IOMMU patches going in removing
>> dma_context_memory.
>
> Thanks for reminding. I'll do a rebase anyway, patches involving i440fx
> and q35 may conflict with your `pci cleanup' series, and ehci patches
> duplicates Andreas's work.
>
>
Re: [Qemu-devel] [PATCH v2] e600 core for MPC86xx processors
2013/6/24 Alexey Kardashevskiy : > On 06/21/2013 10:03 PM, Alexander Graf wrote: >> >> On 21.06.2013, at 14:01, Julio Guerra wrote: >> >>> 2013/6/21 Alexander Graf : On 26.05.2013, at 19:41, Julio Guerra wrote: > MPC86xx processors are based on the e600 core, which is not the case > in qemu where it is based on the 7400 processor. > > This patch creates the e600 core and instantiates the MPC86xx > processors based on it. Therefore, adding the high BATs and the SPRG > 4..7 registers, which are e600-specific [1]. > > This allows to define the MPC8610 processor too and my program running > on a real MPC8610 target is now able to run on qemu :) > > [1] http://cache.freescale.com/files/32bit/doc/ref_manual/E600CORERM.pdf > > Signed-off-by: Julio Guerra Thanks, applied to ppc-next. >>> >>> I just retested this patch and I noticed the `handle_mmu_fault` >>> default value introduced by recent A. Farber patches on the CPU >>> definitions is wrong with the selected memory model. Thus qemu >>> complains about the MMU model. >>> >>> The following is missing in e600 CPU definition: #if defined(CONFIG_SOFTMMU) ppc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; #endif >>> >>> Can you correct it or should I resend a patch (v3 or just the previous >>> three lines) ? >> >> Just send a patch on top of the current one. > > > I do not really understand what this patch actually does but it breaks my > pseries/power7 setup. Please, help. > > > Starting program: /home/aik/qemu-system-ppc64 -L qemu-ppc64-bios/ -trace > events=qemu_trace_events -net nic,model=e1000,addr=0:0:0 -net > user,hostfwd=tcp::5000-:22 -m 1024 -machine pseries -nographic -vga none > -enable-kvm -kernel guest.vmlinux.n -initrd 1.cpio > [Thread debugging using libthread_db enabled] > Using host libthread_db library "/lib64/libthread_db.so.1". > ** > ERROR:/home/alexey/pcipassthru/qemu-impreza/qom/object.c:152:type_get_parent: > assertion failed: (type->parent_type != NULL) > > Breakpoint 4, 0x0080c6eefb8c in .abort () from /lib64/libc.so.6 > Missing separate debuginfos, use: debuginfo-install SDL-1.2.15-8.fc19.ppc64 > bluez-libs-4.101-6.fc19.ppc64 boost-system-1.53.0-6.fc19.ppc64 > boost-thread-1.53.0-6.fc19.ppc64 brlapi-0.6.0-5.fc19.ppc64 > ceph-devel-0.56.4-1.fc19.ppc64 ceph-libs-0.56.4-1.fc19.ppc64 > cryptopp-5.6.2-2.fc19.ppc64 cyrus-sasl-lib-2.1.26-8.fc19.ppc64p7 > glib2-2.36.2-1.fc19.ppc64 glibc-2.17-4.fc19.ppc64p7 > glusterfs-3.4.0-0.5.beta2.fc19.ppc64 > glusterfs-api-3.4.0-0.5.beta2.fc19.ppc64 gmp-5.1.1-2.fc19.ppc64 > gnutls-3.1.11-1.fc19.ppc64 keyutils-libs-1.5.5-4.fc19.ppc64 > krb5-libs-1.11.2-10.fc19.ppc64 leveldb-1.9.0-1.fc19.ppc64 > libX11-1.5.99.902-1.fc19.ppc64 libXau-1.0.6-7.fc19.ppc64 > libcom_err-1.42.7-2.fc19.ppc64 libcurl-7.29.0-6.fc19.ppc64 > libfdt-1.3.0-6.fc19.ppc64 libgcc-4.8.0-8.fc19.ppc64 > libgcrypt-1.5.2-1.fc19.ppc64 libgpg-error-1.11-1.fc19.ppc64 > libidn-1.26-2.fc19.ppc64 libjpeg-turbo-1.2.90-2.fc19.ppc64 > libselinux-2.1.13-15.fc19.ppc64 libssh2-1.4.3-4.fc19.ppc64 > libstdc++-4.8.0-8.fc19.ppc64 libtasn1-3.3-1.fc19.ppc64 > libuuid-2.23.1-2.fc19.ppc64 libxcb-1.9-3.fc19.ppc64 > ncurses-libs-5.9-11.20130511.fc19.ppc64 nettle-2.6-2.fc19.ppc64 > nspr-4.9.6-1.fc19.ppc64 nss-3.14.3-13.0.fc19.ppc64 > nss-softokn-freebl-3.14.3-1.fc19.ppc64 nss-util-3.14.3-1.fc19.ppc64 > openldap-2.4.35-4.fc19.ppc64 openssl-libs-1.0.1e-4.fc19.ppc64p7 > p11-kit-0.18.3-1.fc19.ppc64 pcre-8.32-6.fc19.ppc64p7 > pixman-0.30.0-1.fc19.ppc64 snappy-1.1.0-1.fc19.ppc64 > zlib-1.2.7-10.fc19.ppc64p7 > (gdb) up > #1 0x0080c742d54c in .g_assertion_message () from /lib64/libglib-2.0.so.0 > (gdb) > #2 0x0080c742d5f4 in .g_assertion_message_expr () from > /lib64/libglib-2.0.so.0 > (gdb) bt > #0 0x0080c6eefb8c in .abort () from /lib64/libc.so.6 > #1 0x0080c742d54c in .g_assertion_message () from /lib64/libglib-2.0.so.0 > #2 0x0080c742d5f4 in .g_assertion_message_expr () from > /lib64/libglib-2.0.so.0 > #3 0x10260058 in type_get_parent (type=0x10f7b260) > at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:152 > #4 0x10260120 in type_class_get_size (ti=0x10f7b260) > at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:170 > #5 0x102603d8 in type_initialize (ti=0x10f7b260) > at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:236 > #6 0x1026175c in object_class_foreach_tramp (key=0x10f7b3e0, > value=0x10f7b260, > opaque=0x3fffe5e0) at > /home/alexey/pcipassthru/qemu-impreza/qom/object.c:626 > #7 0x0080c73e0ab0 in .g_hash_table_foreach () from > /lib64/libglib-2.0.so.0 > #8 0x1026188c in object_class_foreach (fn= > @0x10681290: 0x10261988 , > implements_type=0x105c7188 "powerpc64-cpu", include_abstract=0x0, > opaque=0x3fffe680) > at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:647 > #9 0x10261a3c in object_class_get_list (implements_type=0x105c
Re: [Qemu-devel] [Qemu-trivial] [PATCH 01/13] qemu-socket: zero-initialize SocketAddress
On 06/21/13 20:15, Michael Tokarev wrote:
> 21.06.2013 14:38, Gerd Hoffmann wrote:
>> Signed-off-by: Gerd Hoffmann
>> ---
>> util/qemu-sockets.c |2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/util/qemu-sockets.c b/util/qemu-sockets.c
>> index fdd8dc4..364bd8c 100644
>> --- a/util/qemu-sockets.c
>> +++ b/util/qemu-sockets.c
>> @@ -855,7 +855,7 @@ SocketAddress *socket_parse(const char *str, Error
>> **errp)
>> {
>> SocketAddress *addr = NULL;
>>
>> -addr = g_new(SocketAddress, 1);
>> +addr = g_new0(SocketAddress, 1);
>
> While at it we can remove the =NULL assignment too, guess, someting like this:
>
> --- a/util/qemu-sockets.c
> +++ b/util/qemu-sockets.c
> @@ -848,9 +848,7 @@ int unix_nonblocking_connect(const char *path,
>
> SocketAddress *socket_parse(const char *str, Error **errp)
> {
> -SocketAddress *addr = NULL;
> -
> -addr = g_new(SocketAddress, 1);
> +SocketAddress *addr = addr = g_new0(SocketAddress, 1);
> if (strstart(str, "unix:", NULL)) {
> if (str[5] == '\0') {
> error_setg(errp, "invalid Unix socket address");
>
> Is that okay with you? :)
Yes.
> And not that the original issue is a big issue really, because
> in each case each relevant field is initialized.
Except in the error cases.
cheers,
Gerd
Re: [Qemu-devel] [PATCH 01/26] ohci: use realize for ohci
On Mon, Jun 24, 2013 at 03:54:31PM +1000, Peter Crosthwaite wrote:
> Hi Hu,
>
> On Sat, Jun 22, 2013 at 6:50 PM, Hu Tao wrote:
> > Cc: Gerd Hoffmann
> > Signed-off-by: Hu Tao
> > ---
> > hw/usb/hcd-ohci.c | 16 +++-
> > 1 file changed, 7 insertions(+), 9 deletions(-)
> >
> > diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c
> > index 51241cd..79ef41b 100644
> > --- a/hw/usb/hcd-ohci.c
> > +++ b/hw/usb/hcd-ohci.c
> > @@ -1876,17 +1876,16 @@ typedef struct {
> > dma_addr_t dma_offset;
> > } OHCISysBusState;
> >
> > -static int ohci_init_pxa(SysBusDevice *dev)
> > +static void ohci_realize_pxa(DeviceState *dev, Error **errp)
> > {
> > -OHCISysBusState *s = FROM_SYSBUS(OHCISysBusState, dev);
> > +OHCISysBusState *s = DO_UPCAST(OHCISysBusState, busdev.qdev, dev);
>
> I don't think this is an improvement. Until a QOM cast macro is
> available, FROM_SYSBUS is preferable to a DO_UPCAST I think?
patch 2 introduces QOM macro and replaces DO_UPCAST. Instead, we can
also first do QOM then realize. Which one do you prefer?
>
> > +SysBusDevice *b = SYS_BUS_DEVICE(dev);
> >
> > /* Cannot fail as we pass NULL for masterbus */
> > -usb_ohci_init(&s->ohci, &dev->qdev, s->num_ports, s->dma_offset, NULL,
> > 0,
> > +usb_ohci_init(&s->ohci, dev, s->num_ports, s->dma_offset, NULL, 0,
> >&dma_context_memory);
>
> Rebase required due to Paolos IOMMU patches going in removing
> dma_context_memory.
Thanks for reminding. I'll do a rebase anyway, patches involving i440fx
and q35 may conflict with your `pci cleanup' series, and ehci patches
duplicates Andreas's work.
Re: [Qemu-devel] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer
On 2013-06-23 22:50, Hervé Poussineau wrote:
> Jan Kiszka a écrit :
>> From: Jan Kiszka
>>
>> The current ioport dispatcher is a complex beast, mostly due to the
>> need to deal with old portio interface users. But we can overcome it
>> without converting all portio users by embedding the required base
>> address of a MemoryRegionPortio access into that data structure. That
>> removes the need to have the additional MemoryRegionIORange structure
>> in the loop on every access.
>>
>> To handle old portio memory ops, we simply install dispatching handlers
>> for portio memory regions when registering them with the memory core.
>> This removes the need for the old_portio field.
>>
>> We can drop the additional aliasing of ioport regions and also the
>> special address space listener. cpu_in and cpu_out now simply call
>> address_space_read/write. And we can concentrate portio handling in a
>> single source file.
>>
>> Signed-off-by: Jan Kiszka
>> ---
>
> ...
>
>> +
>> +static void portio_write(void *opaque, hwaddr addr, uint64_t data,
>> + unsigned size)
>> +{
>> +MemoryRegionPortioList *mrpio = opaque;
>> +const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size,
>> true);
>> +
>> +if (mrp) {
>> +mrp->write(mrpio->portio_opaque, mrp->base + addr, data);
>> +} else if (size == 2) {
>> +mrp = find_portio(mrpio, addr, 1, true);
>> +assert(mrp);
>> +mrp->write(mrpio->portio_opaque, mrp->base + addr, data & 0xff);
>> +mrp->write(mrpio->portio_opaque, mrp->base + addr + 1, data
>> >> 8);
>> +}
>> +}
>> +
>> +static const MemoryRegionOps portio_ops = {
>> +.read = portio_read,
>> +.write = portio_write,
>> +.valid.unaligned = true,
>> +.impl.unaligned = true,
>> +};
>> +
>
> You need to mark these operations as DEVICE_LITTLE_ENDIAN.
> In portio_write above, you clearly assume that data is in LE format.
Anything behind PIO is little endian, of course. Will add this.
>
> This fixes PPC PReP emulation, which would otherwise be broken with this
> patchset.
Thanks,
Jan
signature.asc
Description: OpenPGP digital signature
Re: [Qemu-devel] [PATCH 01/26] ohci: use realize for ohci
Hi Hu,
On Sat, Jun 22, 2013 at 6:50 PM, Hu Tao wrote:
> Cc: Gerd Hoffmann
> Signed-off-by: Hu Tao
> ---
> hw/usb/hcd-ohci.c | 16 +++-
> 1 file changed, 7 insertions(+), 9 deletions(-)
>
> diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c
> index 51241cd..79ef41b 100644
> --- a/hw/usb/hcd-ohci.c
> +++ b/hw/usb/hcd-ohci.c
> @@ -1876,17 +1876,16 @@ typedef struct {
> dma_addr_t dma_offset;
> } OHCISysBusState;
>
> -static int ohci_init_pxa(SysBusDevice *dev)
> +static void ohci_realize_pxa(DeviceState *dev, Error **errp)
> {
> -OHCISysBusState *s = FROM_SYSBUS(OHCISysBusState, dev);
> +OHCISysBusState *s = DO_UPCAST(OHCISysBusState, busdev.qdev, dev);
I don't think this is an improvement. Until a QOM cast macro is
available, FROM_SYSBUS is preferable to a DO_UPCAST I think?
> +SysBusDevice *b = SYS_BUS_DEVICE(dev);
>
> /* Cannot fail as we pass NULL for masterbus */
> -usb_ohci_init(&s->ohci, &dev->qdev, s->num_ports, s->dma_offset, NULL, 0,
> +usb_ohci_init(&s->ohci, dev, s->num_ports, s->dma_offset, NULL, 0,
>&dma_context_memory);
Rebase required due to Paolos IOMMU patches going in removing
dma_context_memory.
Regards,
Peter
> -sysbus_init_irq(dev, &s->ohci.irq);
> -sysbus_init_mmio(dev, &s->ohci.mem);
> -
> -return 0;
> +sysbus_init_irq(b, &s->ohci.irq);
> +sysbus_init_mmio(b, &s->ohci.mem);
> }
>
> static Property ohci_pci_properties[] = {
> @@ -1926,9 +1925,8 @@ static Property ohci_sysbus_properties[] = {
> static void ohci_sysbus_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
> -SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
>
> -sbc->init = ohci_init_pxa;
> +dc->realize = ohci_realize_pxa;
> dc->desc = "OHCI USB Controller";
> dc->props = ohci_sysbus_properties;
> }
> --
> 1.8.3.1
>
>
Re: [Qemu-devel] [PATCH V2] ARM Cortex A9 Global Timer
I've respun this, but still testing and debugging a few issues.
Some notes FTR.
On Tue, Apr 16, 2013 at 10:50 PM, François Legal
wrote:
> Le 16-04-2013 14:19, Peter Maydell a écrit :
[Snip]
>
>
> New patch follows.
>
> ---
>
> diff -urN qemu-master.old/hw/cpu/a9mpcore.c qemu-master/hw/cpu/a9mpcore.c
> --- qemu-master.old/hw/cpu/a9mpcore.c 2013-04-08 20:12:33.0 +0200
> +++ qemu-master/hw/cpu/a9mpcore.c 2013-04-16 13:18:39.0 +0200
>
> @@ -15,6 +15,7 @@
> uint32_t num_cpu;
> MemoryRegion container;
> DeviceState *mptimer;
> +DeviceState *mpgtimer;
> DeviceState *wdt;
> DeviceState *gic;
> DeviceState *scu;
> @@ -31,6 +32,7 @@
> {
> A9MPPrivState *s = FROM_SYSBUS(A9MPPrivState, dev);
> SysBusDevice *timerbusdev, *wdtbusdev, *gicbusdev, *scubusdev;
> +SysBusDevice *gtimerbusdev;
> int i;
>
> s->gic = qdev_create(NULL, "arm_gic");
> @@ -50,6 +52,11 @@
> qdev_init_nofail(s->scu);
> scubusdev = SYS_BUS_DEVICE(s->scu);
>
> +s->mpgtimer = qdev_create(NULL, "a9_globaltimer");
>
> +qdev_prop_set_uint32(s->mpgtimer, "num-cpu", s->num_cpu);
> +qdev_init_nofail(s->mpgtimer);
> +gtimerbusdev = SYS_BUS_DEVICE(s->mpgtimer);
> +
> s->mptimer = qdev_create(NULL, "arm_mptimer");
> qdev_prop_set_uint32(s->mptimer, "num-cpu", s->num_cpu);
> qdev_init_nofail(s->mptimer);
> @@ -68,8 +75,6 @@
> * 0x0600-0x06ff -- private timers and watchdogs
> * 0x0700-0x0fff -- nothing
> * 0x1000-0x1fff -- GIC Distributor
> - *
> - * We should implement the global timer but don't currently do so.
> */
> memory_region_init(&s->container, "a9mp-priv-container", 0x2000);
> memory_region_add_subregion(&s->container, 0,
> @@ -80,6 +85,8 @@
> /* Note that the A9 exposes only the "timer/watchdog for this core"
> * memory region, not the "timer/watchdog for core X" ones 11MPcore
> has.
> */
> +memory_region_add_subregion(&s->container, 0x200,
> +sysbus_mmio_get_region(gtimerbusdev, 0));
> memory_region_add_subregion(&s->container, 0x600,
> sysbus_mmio_get_region(timerbusdev, 0));
> memory_region_add_subregion(&s->container, 0x620,
> @@ -90,10 +97,13 @@
> sysbus_init_mmio(dev, &s->container);
>
> /* Wire up the interrupt from each watchdog and timer.
> - * For each core the timer is PPI 29 and the watchdog PPI 30.
> + * For each core the global timer is PPI 27, the private
> + * timer is PPI 29 and the watchdog PPI 30.
> */
> for (i = 0; i < s->num_cpu; i++) {
> int ppibase = (s->num_irq - 32) + i * 32;
> +sysbus_connect_irq(gtimerbusdev, i,
> + qdev_get_gpio_in(s->gic, ppibase + 27));
> sysbus_connect_irq(timerbusdev, i,
> qdev_get_gpio_in(s->gic, ppibase + 29));
> sysbus_connect_irq(wdtbusdev, i,
> diff -urN qemu-master.old/hw/timer/a9gtimer.c
> qemu-master/hw/timer/a9gtimer.c
> --- qemu-master.old/hw/timer/a9gtimer.c 1970-01-01 01:00:00.0 +0100
> +++ qemu-master/hw/timer/a9gtimer.c 2013-04-16 14:35:48.0 +0200
> @@ -0,0 +1,348 @@
> +/*
> + * Global peripheral timer block for ARM A9MP
>
> + *
> + * Written by François LEGAL
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License along
> + * with this program; if not, see
Re: [Qemu-devel] [PATCH 1/2] monitor: discard global variable in auto completion functions
于 2013-6-21 23:24, Luiz Capitulino 写道:
On Fri, 21 Jun 2013 14:37:37 +0800
Wenchao Xia wrote:
In monitor_find_completion() and related functions, Global variable
*mon_cmds is not used any more, make them reenterable safely.
*cur_mon is also not used now. *info_cmds is still there, but soon
will be removed by a new way of sub command completion.
Signed-off-by: Wenchao Xia
---
include/monitor/readline.h |8 -
monitor.c | 70 ++-
readline.c |4 ++-
3 files changed, 52 insertions(+), 30 deletions(-)
diff --git a/include/monitor/readline.h b/include/monitor/readline.h
index fc9806e..a4c7bce 100644
--- a/include/monitor/readline.h
+++ b/include/monitor/readline.h
@@ -7,8 +7,12 @@
#define READLINE_MAX_CMDS 64
#define READLINE_MAX_COMPLETIONS 256
+typedef struct mon_cmd_t mon_cmd_t;
This should be in monitor.h. Maybe you could move struct mon_cmd_t there
too.
>
Originally monitor.h include readline.h, readline.h need this def in
this patch, so putting it in monitor.h require readline.h include
monitor.h, break build. Do you have a better way to solve it? introduce
monitor-def.h?
about struct mon_cmd_t, I think it is good to hide it in monitor.c.
Also, can you split this series is smaller patches? It looks good, but
it isn't easy to review because it changes too much code at once.
Sure, let me try.
Otherwise this is a nice feature!
+
typedef void ReadLineFunc(Monitor *mon, const char *str, void *opaque);
-typedef void ReadLineCompletionFunc(const char *cmdline);
+typedef void ReadLineCompletionFunc(Monitor *mon,
+mon_cmd_t *cmd_table,
+const char *cmdline);
typedef struct ReadLineState {
char cmd_buf[READLINE_CMD_BUF_SIZE + 1];
@@ -35,6 +39,7 @@ typedef struct ReadLineState {
int read_password;
char prompt[256];
Monitor *mon;
+mon_cmd_t *cmd_table;
} ReadLineState;
void readline_add_completion(ReadLineState *rs, const char *str);
@@ -50,6 +55,7 @@ void readline_restart(ReadLineState *rs);
void readline_show_prompt(ReadLineState *rs);
ReadLineState *readline_init(Monitor *mon,
+ mon_cmd_t *cmd_table,
ReadLineCompletionFunc *completion_finder);
#endif /* !READLINE_H */
diff --git a/monitor.c b/monitor.c
index 70ae8f5..bc60171 100644
--- a/monitor.c
+++ b/monitor.c
@@ -116,7 +116,7 @@ struct MonitorCompletionData {
void (*user_print)(Monitor *mon, const QObject *data);
};
-typedef struct mon_cmd_t {
+struct mon_cmd_t {
const char *name;
const char *args_type;
const char *params;
@@ -134,7 +134,7 @@ typedef struct mon_cmd_t {
* used, and mhandler of 1st level plays the role of help function.
*/
struct mon_cmd_t *sub_table;
-} mon_cmd_t;
+};
/* file descriptors passed via SCM_RIGHTS */
typedef struct mon_fd_t mon_fd_t;
@@ -3999,7 +3999,7 @@ out:
QDECREF(qdict);
}
-static void cmd_completion(const char *name, const char *list)
+static void cmd_completion(Monitor *mon, const char *name, const char *list)
{
const char *p, *pstart;
char cmd[128];
@@ -4017,7 +4017,7 @@ static void cmd_completion(const char *name, const char
*list)
memcpy(cmd, pstart, len);
cmd[len] = '\0';
if (name[0] == '\0' || !strncmp(name, cmd, strlen(name))) {
-readline_add_completion(cur_mon->rs, cmd);
+readline_add_completion(mon->rs, cmd);
}
if (*p == '\0')
break;
@@ -4025,7 +4025,7 @@ static void cmd_completion(const char *name, const char
*list)
}
}
-static void file_completion(const char *input)
+static void file_completion(Monitor *mon, const char *input)
{
DIR *ffs;
struct dirent *d;
@@ -4048,7 +4048,7 @@ static void file_completion(const char *input)
pstrcpy(file_prefix, sizeof(file_prefix), p + 1);
}
#ifdef DEBUG_COMPLETION
-monitor_printf(cur_mon, "input='%s' path='%s' prefix='%s'\n",
+monitor_printf(mon, "input='%s' path='%s' prefix='%s'\n",
input, path, file_prefix);
#endif
ffs = opendir(path);
@@ -4075,20 +4075,28 @@ static void file_completion(const char *input)
if (stat(file, &sb) == 0 && S_ISDIR(sb.st_mode)) {
pstrcat(file, sizeof(file), "/");
}
-readline_add_completion(cur_mon->rs, file);
+readline_add_completion(mon->rs, file);
}
}
closedir(ffs);
}
-static void block_completion_it(void *opaque, BlockDriverState *bs)
+typedef struct MonitorBlockComplete {
+Monitor *mon;
+const char *input;
+} MonitorBlockComplete;
+
+static void block_completion_it(void *opaque,
+BlockDriverState *bs)
{
const char *name = bdrv_get_device_name(bs);
-const char *input = opaque;
Re: [Qemu-devel] [RFT PATCH v1 12/30] virtio/virtio-pci: QOM casting sweep
Hi Frederic,
On Tue, Jun 11, 2013 at 5:09 PM, Frederic Konrad
wrote:
> Hi,
>
>
> On 11/06/2013 08:49, peter.crosthwa...@xilinx.com wrote:
>>
>> From: Peter Crosthwaite
>>
>> Use standard QOM cast macro. Remove usages of container_of() and
>> direct -> style upcasting.
>>
>> Signed-off-by: Peter Crosthwaite
>
> [...]
>
>> static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d)
>> {
>> -return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
>> +return VIRTIO_PCI(d);
>> }
>
>
> Maybe you can replace each to_virtio_pci_proxy directly with VIRTIO_PCI?
>
I'm going to drop this one V2 for the moment and revisit is later. Its
more complicated, given the replications between the fast and slow
versions and needs a little more research (and a mini series of its
own).
Regards,
Peter
Re: [Qemu-devel] [RFT PATCH v1 16/30] isa/*: QOM casting sweep
Hi Andreas, On Tue, Jun 11, 2013 at 7:58 PM, Andreas Färber wrote: > Am 11.06.2013 08:52, schrieb peter.crosthwa...@xilinx.com: >> From: Peter Crosthwaite >> >> Use standard QOM cast macros. Remove usage of DO_UPCAST and >> direct -> style upcasting. >> >> Signed-off-by: Peter Crosthwaite >> --- >> >> hw/isa/i82378.c | 8 >> hw/isa/lpc_ich9.c | 6 +++--- >> hw/isa/piix4.c| 4 ++-- >> hw/isa/vt82c686.c | 14 +++--- >> 4 files changed, 16 insertions(+), 16 deletions(-) > [...] >> diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c >> index d750413..1eb05b2 100644 >> --- a/hw/isa/piix4.c >> +++ b/hw/isa/piix4.c > [...] >> @@ -98,7 +98,7 @@ int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn) >> PCIDevice *d; >> >> d = pci_create_simple_multifunction(bus, devfn, true, "PIIX4"); >> -*isa_bus = DO_UPCAST(ISABus, qbus, qdev_get_child_bus(&d->qdev, >> "isa.0")); >> +*isa_bus = DO_UPCAST(ISABus, qbus, qdev_get_child_bus(DEVICE(d), >> "isa.0")); > > Conflict, my ISABus patch does ISA_BUS() in addition: > http://patchwork.ozlabs.org/patch/249705/ > >> return d->devfn; >> } >> >> diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c >> index 5261927..8ec0d84 100644 >> --- a/hw/isa/vt82c686.c >> +++ b/hw/isa/vt82c686.c > [...] >> @@ -450,7 +450,7 @@ ISABus *vt82c686b_init(PCIBus *bus, int devfn) >> >> d = pci_create_simple_multifunction(bus, devfn, true, "VT82C686B"); >> >> -return DO_UPCAST(ISABus, qbus, qdev_get_child_bus(&d->qdev, "isa.0")); >> +return DO_UPCAST(ISABus, qbus, qdev_get_child_bus(DEVICE(d), "isa.0")); > > Ditto. > All come out in the wash in the rebase. Regards, Peter >> } >> >> static void via_class_init(ObjectClass *klass, void *data) > > Otherwise looks fine. > > Andreas > > -- > SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany > GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg >
Re: [Qemu-devel] [Qemu-ppc] [PATCH] RFC kvm irqfd: add directly mapped MSI IRQ support
On Sun, 2013-06-23 at 16:58 -0500, Anthony Liguori wrote: > On Sun, Jun 23, 2013 at 4:39 PM, Benjamin Herrenschmidt > wrote: > > On Sun, 2013-06-23 at 10:02 -0500, Anthony Liguori wrote: > >> It doesn't make a lot of sense to have Power do MSI decoding in > >> userspace while x86 does it in the kernel. I assume the kernel > >> doesn't have enough information to do the translation on Power? > > > > Well, it would need the host bridge which it doesn't have and it > > would need a concept of mapping that to interrupt numbers which > > we don't want in the kernel. > > > > We can keep the kernel side a LOT simpler (completely avoiding > > the whole route bloatware) by sticking to our "simple" direct map kernel > > stuff and doing the mapping from address/data to interrupts in qemu, so > > we'll stick to that. > > Yeah, but none of this is Power specific... so we can do the same for x86, > no? > > I'm still trying to wrap my head around why we need MSI knowledge at > all in the kernel for x86. I presume it's to fast-path irqfd when > doing vhost? Or device assignment. Any paths where we want to inject an MSI interrupt without going through userspace. Thanks, Alex
Re: [Qemu-devel] [PATCH] RFC kvm irqfd: add directly mapped MSI IRQ support
On Sun, 2013-06-23 at 10:06 -0500, Anthony Liguori wrote:
> On Thu, Jun 20, 2013 at 11:46 PM, Alex Williamson
> wrote:
> > On Fri, 2013-06-21 at 12:49 +1000, Alexey Kardashevskiy wrote:
> >> On 06/21/2013 12:34 PM, Alex Williamson wrote:
> >>
> >>
> >> Do not follow you, sorry. For x86, is it that MSI routing table which is
> >> updated via KVM_SET_GSI_ROUTING in KVM? When there is no KVM, what piece of
> >> code responds on msi_notify() in qemu-x86 and does qemu_irq_pulse()?
> >
> > vfio_msi_interrupt->msi[x]_notify->stl_le_phys(msg.address, msg.data)
> >
> > This writes directly to the interrupt block on the vCPU. With KVM, the
> > in-kernel APIC does the same write, where the pin to MSIMessage is setup
> > by kvm_irqchip_add_msi_route and the pin is pulled by an irqfd.
>
> What is this "interrupt block on the vCPU" you speak of? I reviewed
> the SDM and see nothing in the APIC protocol or the brief description
> of MSI as a PCI concept that would indicate anything except that the
> PHB handles MSI writes and feeds them to the I/O APIC.
In all likelihood I'm recalling ia64 details and trying to apply them to
x86. Does the MSIMessage not actually get written to the LAPIC on the
CPU? Thanks,
Alex
> In fact, the wikipedia article on MSI has:
>
> "A common misconception with Message Signaled Interrupts is that they
> allow the device to send data to a processor as part of the interrupt.
> The data that is sent as part of the write is used by the chipset to
> determine which interrupt to trigger on which processor; it is not
> available for the device to communicate additional information to the
> interrupt handler."
>
> > Do I understand that on POWER the MSI from the device is intercepted at
> > the PHB and converted to an IRQ that's triggered by some means other
> > than a MSI write?
>
> This is exactly the same thing that happens on x86, no? Can you point
> me to something in the SDM that says otherwise?
>
> Regards,
>
> Anthony Liguori
>
> > So to correctly model the hardware, vfio should do a
> > msi_notify() that does a stl_le_phys that terminates at this IRQ
> > remapper thing and in turn toggles a qemu_irq. MSIMessage is only
> > extraneous data if you want to skip over hardware blocks.
> >
> > Maybe you could add a device parameter to kvm_irqchip_add_msi_route so
> > that it can be implemented on POWER without this pci_bus_map_msi
> > interface that seems very unique to POWER. Thanks,
> >
> > Alex
> >
> >> ---
> >> hw/misc/vfio.c | 11 +--
> >> hw/pci/pci.c | 13 +
> >> hw/ppc/spapr_pci.c | 13 +
> >> hw/virtio/virtio-pci.c | 26 --
> >> include/hw/pci/pci.h |4
> >> include/hw/pci/pci_bus.h |1 +
> >> 6 files changed, 60 insertions(+), 8 deletions(-)
> >>
> >> diff --git a/hw/misc/vfio.c b/hw/misc/vfio.c
> >> index 14aac04..2d9eef7 100644
> >> --- a/hw/misc/vfio.c
> >> +++ b/hw/misc/vfio.c
> >> @@ -639,7 +639,11 @@ static int vfio_msix_vector_do_use(PCIDevice
> >> *pdev, unsigned int nr,
> >> * Attempt to enable route through KVM irqchip,
> >> * default to userspace handling if unavailable.
> >> */
> >> -vector->virq = msg ? kvm_irqchip_add_msi_route(kvm_state, *msg)
> >> : -1;
> >> +
> >> +vector->virq = msg ? pci_bus_map_msi(vdev->pdev.bus, *msg) : -1;
> >> +if (vector->virq < 0) {
> >> +vector->virq = msg ? kvm_irqchip_add_msi_route(kvm_state,
> >> *msg) : -1;
> >> +}
> >> if (vector->virq < 0 ||
> >> kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,
> >> vector->virq) < 0) {
> >> @@ -807,7 +811,10 @@ retry:
> >> * Attempt to enable route through KVM irqchip,
> >> * default to userspace handling if unavailable.
> >> */
> >> -vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
> >> +vector->virq = pci_bus_map_msi(vdev->pdev.bus, msg);
> >> +if (vector->virq < 0) {
> >> +vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
> >> +}
> >> if (vector->virq < 0 ||
> >> kvm_irqchip_add_irqfd_notifier(kvm_state,
> >> &vector->interrupt,
> >> vector->virq) < 0) {
> >> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> >> index a976e46..a9875e9 100644
> >> --- a/hw/pci/pci.c
> >> +++ b/hw/pci/pci.c
> >> @@ -1254,6 +1254,19 @@ void
> >> pci_device_set_intx_routing_notifier(PCIDevice *dev,
> >> dev->intx_routing_notifier = notifier;
> >> }
> >>
> >> +void pci_bus_set_map_msi_fn(PCIBus *bus, pci_map_msi_fn map_msi_fn)
> >> +{
> >> +bus->map_msi = map_msi_
Re: [Qemu-devel] [PATCH v2] e600 core for MPC86xx processors
On 06/21/2013 10:03 PM, Alexander Graf wrote: > > On 21.06.2013, at 14:01, Julio Guerra wrote: > >> 2013/6/21 Alexander Graf : >>> >>> On 26.05.2013, at 19:41, Julio Guerra wrote: >>> MPC86xx processors are based on the e600 core, which is not the case in qemu where it is based on the 7400 processor. This patch creates the e600 core and instantiates the MPC86xx processors based on it. Therefore, adding the high BATs and the SPRG 4..7 registers, which are e600-specific [1]. This allows to define the MPC8610 processor too and my program running on a real MPC8610 target is now able to run on qemu :) [1] http://cache.freescale.com/files/32bit/doc/ref_manual/E600CORERM.pdf Signed-off-by: Julio Guerra >>> >>> Thanks, applied to ppc-next. >>> >> >> I just retested this patch and I noticed the `handle_mmu_fault` >> default value introduced by recent A. Farber patches on the CPU >> definitions is wrong with the selected memory model. Thus qemu >> complains about the MMU model. >> >> The following is missing in e600 CPU definition: >>> #if defined(CONFIG_SOFTMMU) >>>ppc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; >>> #endif >> >> Can you correct it or should I resend a patch (v3 or just the previous >> three lines) ? > > Just send a patch on top of the current one. I do not really understand what this patch actually does but it breaks my pseries/power7 setup. Please, help. Starting program: /home/aik/qemu-system-ppc64 -L qemu-ppc64-bios/ -trace events=qemu_trace_events -net nic,model=e1000,addr=0:0:0 -net user,hostfwd=tcp::5000-:22 -m 1024 -machine pseries -nographic -vga none -enable-kvm -kernel guest.vmlinux.n -initrd 1.cpio [Thread debugging using libthread_db enabled] Using host libthread_db library "/lib64/libthread_db.so.1". ** ERROR:/home/alexey/pcipassthru/qemu-impreza/qom/object.c:152:type_get_parent: assertion failed: (type->parent_type != NULL) Breakpoint 4, 0x0080c6eefb8c in .abort () from /lib64/libc.so.6 Missing separate debuginfos, use: debuginfo-install SDL-1.2.15-8.fc19.ppc64 bluez-libs-4.101-6.fc19.ppc64 boost-system-1.53.0-6.fc19.ppc64 boost-thread-1.53.0-6.fc19.ppc64 brlapi-0.6.0-5.fc19.ppc64 ceph-devel-0.56.4-1.fc19.ppc64 ceph-libs-0.56.4-1.fc19.ppc64 cryptopp-5.6.2-2.fc19.ppc64 cyrus-sasl-lib-2.1.26-8.fc19.ppc64p7 glib2-2.36.2-1.fc19.ppc64 glibc-2.17-4.fc19.ppc64p7 glusterfs-3.4.0-0.5.beta2.fc19.ppc64 glusterfs-api-3.4.0-0.5.beta2.fc19.ppc64 gmp-5.1.1-2.fc19.ppc64 gnutls-3.1.11-1.fc19.ppc64 keyutils-libs-1.5.5-4.fc19.ppc64 krb5-libs-1.11.2-10.fc19.ppc64 leveldb-1.9.0-1.fc19.ppc64 libX11-1.5.99.902-1.fc19.ppc64 libXau-1.0.6-7.fc19.ppc64 libcom_err-1.42.7-2.fc19.ppc64 libcurl-7.29.0-6.fc19.ppc64 libfdt-1.3.0-6.fc19.ppc64 libgcc-4.8.0-8.fc19.ppc64 libgcrypt-1.5.2-1.fc19.ppc64 libgpg-error-1.11-1.fc19.ppc64 libidn-1.26-2.fc19.ppc64 libjpeg-turbo-1.2.90-2.fc19.ppc64 libselinux-2.1.13-15.fc19.ppc64 libssh2-1.4.3-4.fc19.ppc64 libstdc++-4.8.0-8.fc19.ppc64 libtasn1-3.3-1.fc19.ppc64 libuuid-2.23.1-2.fc19.ppc64 libxcb-1.9-3.fc19.ppc64 ncurses-libs-5.9-11.20130511.fc19.ppc64 nettle-2.6-2.fc19.ppc64 nspr-4.9.6-1.fc19.ppc64 nss-3.14.3-13.0.fc19.ppc64 nss-softokn-freebl-3.14.3-1.fc19.ppc64 nss-util-3.14.3-1.fc19.ppc64 openldap-2.4.35-4.fc19.ppc64 openssl-libs-1.0.1e-4.fc19.ppc64p7 p11-kit-0.18.3-1.fc19.ppc64 pcre-8.32-6.fc19.ppc64p7 pixman-0.30.0-1.fc19.ppc64 snappy-1.1.0-1.fc19.ppc64 zlib-1.2.7-10.fc19.ppc64p7 (gdb) up #1 0x0080c742d54c in .g_assertion_message () from /lib64/libglib-2.0.so.0 (gdb) #2 0x0080c742d5f4 in .g_assertion_message_expr () from /lib64/libglib-2.0.so.0 (gdb) bt #0 0x0080c6eefb8c in .abort () from /lib64/libc.so.6 #1 0x0080c742d54c in .g_assertion_message () from /lib64/libglib-2.0.so.0 #2 0x0080c742d5f4 in .g_assertion_message_expr () from /lib64/libglib-2.0.so.0 #3 0x10260058 in type_get_parent (type=0x10f7b260) at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:152 #4 0x10260120 in type_class_get_size (ti=0x10f7b260) at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:170 #5 0x102603d8 in type_initialize (ti=0x10f7b260) at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:236 #6 0x1026175c in object_class_foreach_tramp (key=0x10f7b3e0, value=0x10f7b260, opaque=0x3fffe5e0) at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:626 #7 0x0080c73e0ab0 in .g_hash_table_foreach () from /lib64/libglib-2.0.so.0 #8 0x1026188c in object_class_foreach (fn= @0x10681290: 0x10261988 , implements_type=0x105c7188 "powerpc64-cpu", include_abstract=0x0, opaque=0x3fffe680) at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:647 #9 0x10261a3c in object_class_get_list (implements_type=0x105c7188 "powerpc64-cpu", include_abstract=0x0) at /home/alexey/pcipassthru/qemu-impreza/qom/object.c:679 #10 0x10459dec in ppc_cpu_class_by_pvr (pvr=0x3f0201) at /home/alexey/pcipassthru/qemu-im
Re: [Qemu-devel] [RFT PATCH v1 06/30] scsi/megasas: QOM Upcast Sweep
On Tue, Jun 11, 2013 at 4:44 PM, wrote:
> From: Peter Crosthwaite
>
> Define and use standard QOM cast macro. Remove usages of DO_UPCAST
> and direct -> style upcasting.
>
> Signed-off-by: Peter Crosthwaite
> ---
>
> hw/scsi/megasas.c | 17 +++--
> 1 file changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
> index fe6550c..21eaf4f 100644
> --- a/hw/scsi/megasas.c
> +++ b/hw/scsi/megasas.c
> @@ -108,6 +108,11 @@ typedef struct MegasasState {
> SCSIBus bus;
> } MegasasState;
>
> +#define TYPE_MEGASAS "megasas"
> +
> +#define MEGASAS(obj) \
> +OBJECT_CHECK(MegasasState, (obj), TYPE_MEGASAS)
> +
> #define MEGASAS_INTR_DISABLED_MASK 0x
>
> static bool megasas_intr_enabled(MegasasState *s)
> @@ -2039,13 +2044,13 @@ static void megasas_soft_reset(MegasasState *s)
>
> static void megasas_scsi_reset(DeviceState *dev)
> {
> -MegasasState *s = DO_UPCAST(MegasasState, dev.qdev, dev);
> +MegasasState *s = MEGASAS(dev);
>
> megasas_soft_reset(s);
> }
>
> static const VMStateDescription vmstate_megasas = {
> -.name = "megasas",
> +.name = TYPE_MEGASAS,
Will fix v2.
Regards,
Peter
Re: [Qemu-devel] [RFT PATCH v1 01/30] net/e1000: QOM Upcast Sweep
On Tue, Jun 11, 2013 at 4:40 PM, wrote:
> From: Peter Crosthwaite
>
> Define and use standard QOM cast macro. Remove usages of DO_UPCAST
> and direct -> style upcasting.
>
> Signed-off-by: Peter Crosthwaite
> ---
>
> hw/net/e1000.c | 20 +---
> 1 file changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a/hw/net/e1000.c b/hw/net/e1000.c
> index e6f46f0..a7de400 100644
> --- a/hw/net/e1000.c
> +++ b/hw/net/e1000.c
> @@ -138,6 +138,11 @@ typedef struct E1000State_st {
> uint32_t compat_flags;
> } E1000State;
>
> +#define TYPE_E1000 "e1000"
> +
> +#define E1000(obj) \
> +OBJECT_CHECK(E1000State, (obj), TYPE_E1000)
> +
> #definedefreg(x) x = (E1000_##x>>2)
> enum {
> defreg(CTRL), defreg(EECD), defreg(EERD), defreg(GPRC),
> @@ -1175,7 +1180,7 @@ static int e1000_post_load(void *opaque, int version_id)
> }
>
> static const VMStateDescription vmstate_e1000 = {
> -.name = "e1000",
> +.name = TYPE_E1000,
Will fix v2 as per discussion recent discussion on type string usages.
Regards,
Peter
Re: [Qemu-devel] [PATCH] Switch the roles of jmp_next[0] and jmp_next[1].
My intention was to make things consistent for readability. In the case of gen_jz_ecx_string(), jmp_next[1] is already the "not taken" case. However, looks like the meaning of jmp_next changes in the case of a TB loop, it does not point to the next TB to execute any more. Anyway, I thought this patch can reduce some confusion. On Sun, Jun 23, 2013 at 2:22 PM, Richard Henderson wrote: > On 06/22/2013 09:10 AM, Zhihui Zhang wrote: > > This way, jmp_next[0] means "taken" for both conditional jumps AND > unconditional jumps. > > Currently, it has opposite meanings for the two cases. > > So? There's no proscribed meaning for the 0 and 1 indices. > > > r~ >
Re: [Qemu-devel] [PATCH v7 2/3] Add 'auto-converge' migration capability
Oops! A minor glitch on my side (pl. ignore the subject line of
this...as this is actually patch 3/3 and not patch 2/3). I just resent
this as patch 3/3 with the correct subject line.
Thx
Vinod
On 6/23/2013 1:05 PM, Chegu Vinod wrote:
If a user chooses to turn on the auto-converge migration capability
these changes detect the lack of convergence and throttle down the
guest. i.e. force the VCPUs out of the guest for some duration
and let the migration thread catchup and help converge.
Verified the convergence using the following :
- Java Warehouse workload running on a 20VCPU/256G guest(~80% busy)
- OLTP like workload running on a 80VCPU/512G guest (~80% busy)
Sample results with Java warehouse workload : (migrate speed set to 20Gb and
migrate downtime set to 4seconds).
(qemu) info migrate
capabilities: xbzrle: off auto-converge: off <
Migration status: active
total time: 1487503 milliseconds
expected downtime: 519 milliseconds
transferred ram: 383749347 kbytes
remaining ram: 2753372 kbytes
total ram: 268444224 kbytes
duplicate: 65461532 pages
skipped: 64901568 pages
normal: 95750218 pages
normal bytes: 383000872 kbytes
dirty pages rate: 67551 pages
---
(qemu) info migrate
capabilities: xbzrle: off auto-converge: on <
Migration status: completed
total time: 241161 milliseconds
downtime: 6373 milliseconds
transferred ram: 28235307 kbytes
remaining ram: 0 kbytes
total ram: 268444224 kbytes
duplicate: 64946416 pages
skipped: 64903523 pages
normal: 7044971 pages
normal bytes: 28179884 kbytes
Signed-off-by: Chegu Vinod
---
arch_init.c | 79 +++
1 files changed, 79 insertions(+), 0 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index a8b91ee..e7ca3b1 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -104,6 +104,9 @@ int graphic_depth = 15;
#endif
const uint32_t arch_type = QEMU_ARCH;
+static bool mig_throttle_on;
+static int dirty_rate_high_cnt;
+static void check_guest_throttling(void);
/***/
/* ram save/restore */
@@ -378,8 +381,14 @@ static void migration_bitmap_sync(void)
uint64_t num_dirty_pages_init = migration_dirty_pages;
MigrationState *s = migrate_get_current();
static int64_t start_time;
+static int64_t bytes_xfer_prev;
static int64_t num_dirty_pages_period;
int64_t end_time;
+int64_t bytes_xfer_now;
+
+if (!bytes_xfer_prev) {
+bytes_xfer_prev = ram_bytes_transferred();
+}
if (!start_time) {
start_time = qemu_get_clock_ms(rt_clock);
@@ -404,6 +413,23 @@ static void migration_bitmap_sync(void)
/* more than 1 second = 1000 millisecons */
if (end_time > start_time + 1000) {
+if (migrate_auto_converge()) {
+/* The following detection logic can be refined later. For now:
+ Check to see if the dirtied bytes is 50% more than the approx.
+ amount of bytes that just got transferred since the last time we
+ were in this routine. If that happens >N times (for now N==4)
+ we turn on the throttle down logic */
+bytes_xfer_now = ram_bytes_transferred();
+if (s->dirty_pages_rate &&
+ (num_dirty_pages_period * TARGET_PAGE_SIZE >
+ (bytes_xfer_now - bytes_xfer_prev)/2) &&
+ (dirty_rate_high_cnt++ > 4)) {
+trace_migration_throttle();
+mig_throttle_on = true;
+dirty_rate_high_cnt = 0;
+ }
+ bytes_xfer_prev = bytes_xfer_now;
+}
s->dirty_pages_rate = num_dirty_pages_period * 1000
/ (end_time - start_time);
s->dirty_bytes_rate = s->dirty_pages_rate * TARGET_PAGE_SIZE;
@@ -566,6 +592,8 @@ static int ram_save_setup(QEMUFile *f, void *opaque)
migration_bitmap = bitmap_new(ram_pages);
bitmap_set(migration_bitmap, 0, ram_pages);
migration_dirty_pages = ram_pages;
+mig_throttle_on = false;
+dirty_rate_high_cnt = 0;
if (migrate_use_xbzrle()) {
XBZRLE.cache = cache_init(migrate_xbzrle_cache_size() /
@@ -628,6 +656,7 @@ static int ram_save_iterate(QEMUFile *f, void *opaque)
}
total_sent += bytes_sent;
acct_info.iterations++;
+check_guest_throttling();
/* we want to check in the 1st loop, just in case it was the 1st time
and we had to sync the dirty bitmap.
qemu_get_clock_ns() is a bit expensive, so we only check each some
@@ -1097,3 +1126,53 @@ TargetInfo *qmp_query_target(Error **errp)
return info;
}
+
+/* Stub function that's gets run on the vcpu when its brought out of the
+ VM to run inside qemu via async_run_on_cpu()*/
+static void mig_sleep_cpu(void *opq)
+{
+qemu_mutex_unlock_iothread();
+g_usleep(30*1000);
+qe
[Qemu-devel] [PATCH v7 3/3] Force auto-convegence of live migration
If a user chooses to turn on the auto-converge migration capability
these changes detect the lack of convergence and throttle down the
guest. i.e. force the VCPUs out of the guest for some duration
and let the migration thread catchup and help converge.
Verified the convergence using the following :
- Java Warehouse workload running on a 20VCPU/256G guest(~80% busy)
- OLTP like workload running on a 80VCPU/512G guest (~80% busy)
Sample results with Java warehouse workload : (migrate speed set to 20Gb and
migrate downtime set to 4seconds).
(qemu) info migrate
capabilities: xbzrle: off auto-converge: off <
Migration status: active
total time: 1487503 milliseconds
expected downtime: 519 milliseconds
transferred ram: 383749347 kbytes
remaining ram: 2753372 kbytes
total ram: 268444224 kbytes
duplicate: 65461532 pages
skipped: 64901568 pages
normal: 95750218 pages
normal bytes: 383000872 kbytes
dirty pages rate: 67551 pages
---
(qemu) info migrate
capabilities: xbzrle: off auto-converge: on <
Migration status: completed
total time: 241161 milliseconds
downtime: 6373 milliseconds
transferred ram: 28235307 kbytes
remaining ram: 0 kbytes
total ram: 268444224 kbytes
duplicate: 64946416 pages
skipped: 64903523 pages
normal: 7044971 pages
normal bytes: 28179884 kbytes
Signed-off-by: Chegu Vinod
---
arch_init.c | 79 +++
1 files changed, 79 insertions(+), 0 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index a8b91ee..e7ca3b1 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -104,6 +104,9 @@ int graphic_depth = 15;
#endif
const uint32_t arch_type = QEMU_ARCH;
+static bool mig_throttle_on;
+static int dirty_rate_high_cnt;
+static void check_guest_throttling(void);
/***/
/* ram save/restore */
@@ -378,8 +381,14 @@ static void migration_bitmap_sync(void)
uint64_t num_dirty_pages_init = migration_dirty_pages;
MigrationState *s = migrate_get_current();
static int64_t start_time;
+static int64_t bytes_xfer_prev;
static int64_t num_dirty_pages_period;
int64_t end_time;
+int64_t bytes_xfer_now;
+
+if (!bytes_xfer_prev) {
+bytes_xfer_prev = ram_bytes_transferred();
+}
if (!start_time) {
start_time = qemu_get_clock_ms(rt_clock);
@@ -404,6 +413,23 @@ static void migration_bitmap_sync(void)
/* more than 1 second = 1000 millisecons */
if (end_time > start_time + 1000) {
+if (migrate_auto_converge()) {
+/* The following detection logic can be refined later. For now:
+ Check to see if the dirtied bytes is 50% more than the approx.
+ amount of bytes that just got transferred since the last time we
+ were in this routine. If that happens >N times (for now N==4)
+ we turn on the throttle down logic */
+bytes_xfer_now = ram_bytes_transferred();
+if (s->dirty_pages_rate &&
+ (num_dirty_pages_period * TARGET_PAGE_SIZE >
+ (bytes_xfer_now - bytes_xfer_prev)/2) &&
+ (dirty_rate_high_cnt++ > 4)) {
+trace_migration_throttle();
+mig_throttle_on = true;
+dirty_rate_high_cnt = 0;
+ }
+ bytes_xfer_prev = bytes_xfer_now;
+}
s->dirty_pages_rate = num_dirty_pages_period * 1000
/ (end_time - start_time);
s->dirty_bytes_rate = s->dirty_pages_rate * TARGET_PAGE_SIZE;
@@ -566,6 +592,8 @@ static int ram_save_setup(QEMUFile *f, void *opaque)
migration_bitmap = bitmap_new(ram_pages);
bitmap_set(migration_bitmap, 0, ram_pages);
migration_dirty_pages = ram_pages;
+mig_throttle_on = false;
+dirty_rate_high_cnt = 0;
if (migrate_use_xbzrle()) {
XBZRLE.cache = cache_init(migrate_xbzrle_cache_size() /
@@ -628,6 +656,7 @@ static int ram_save_iterate(QEMUFile *f, void *opaque)
}
total_sent += bytes_sent;
acct_info.iterations++;
+check_guest_throttling();
/* we want to check in the 1st loop, just in case it was the 1st time
and we had to sync the dirty bitmap.
qemu_get_clock_ns() is a bit expensive, so we only check each some
@@ -1097,3 +1126,53 @@ TargetInfo *qmp_query_target(Error **errp)
return info;
}
+
+/* Stub function that's gets run on the vcpu when its brought out of the
+ VM to run inside qemu via async_run_on_cpu()*/
+static void mig_sleep_cpu(void *opq)
+{
+qemu_mutex_unlock_iothread();
+g_usleep(30*1000);
+qemu_mutex_lock_iothread();
+}
+
+/* To reduce the dirty rate explicitly disallow the VCPUs from spending
+ much time in the VM. The migration thread will try to catchup.
+ Workload will experience a performance drop.
+*/
+static void mig_throttle_cpu_down(CPUState *cpu, void *data)
+{
+async_run_on_cpu(cpu, mi
[Qemu-devel] [PATCH v7 2/3] Add 'auto-converge' migration capability
If a user chooses to turn on the auto-converge migration capability
these changes detect the lack of convergence and throttle down the
guest. i.e. force the VCPUs out of the guest for some duration
and let the migration thread catchup and help converge.
Verified the convergence using the following :
- Java Warehouse workload running on a 20VCPU/256G guest(~80% busy)
- OLTP like workload running on a 80VCPU/512G guest (~80% busy)
Sample results with Java warehouse workload : (migrate speed set to 20Gb and
migrate downtime set to 4seconds).
(qemu) info migrate
capabilities: xbzrle: off auto-converge: off <
Migration status: active
total time: 1487503 milliseconds
expected downtime: 519 milliseconds
transferred ram: 383749347 kbytes
remaining ram: 2753372 kbytes
total ram: 268444224 kbytes
duplicate: 65461532 pages
skipped: 64901568 pages
normal: 95750218 pages
normal bytes: 383000872 kbytes
dirty pages rate: 67551 pages
---
(qemu) info migrate
capabilities: xbzrle: off auto-converge: on <
Migration status: completed
total time: 241161 milliseconds
downtime: 6373 milliseconds
transferred ram: 28235307 kbytes
remaining ram: 0 kbytes
total ram: 268444224 kbytes
duplicate: 64946416 pages
skipped: 64903523 pages
normal: 7044971 pages
normal bytes: 28179884 kbytes
Signed-off-by: Chegu Vinod
---
arch_init.c | 79 +++
1 files changed, 79 insertions(+), 0 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index a8b91ee..e7ca3b1 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -104,6 +104,9 @@ int graphic_depth = 15;
#endif
const uint32_t arch_type = QEMU_ARCH;
+static bool mig_throttle_on;
+static int dirty_rate_high_cnt;
+static void check_guest_throttling(void);
/***/
/* ram save/restore */
@@ -378,8 +381,14 @@ static void migration_bitmap_sync(void)
uint64_t num_dirty_pages_init = migration_dirty_pages;
MigrationState *s = migrate_get_current();
static int64_t start_time;
+static int64_t bytes_xfer_prev;
static int64_t num_dirty_pages_period;
int64_t end_time;
+int64_t bytes_xfer_now;
+
+if (!bytes_xfer_prev) {
+bytes_xfer_prev = ram_bytes_transferred();
+}
if (!start_time) {
start_time = qemu_get_clock_ms(rt_clock);
@@ -404,6 +413,23 @@ static void migration_bitmap_sync(void)
/* more than 1 second = 1000 millisecons */
if (end_time > start_time + 1000) {
+if (migrate_auto_converge()) {
+/* The following detection logic can be refined later. For now:
+ Check to see if the dirtied bytes is 50% more than the approx.
+ amount of bytes that just got transferred since the last time we
+ were in this routine. If that happens >N times (for now N==4)
+ we turn on the throttle down logic */
+bytes_xfer_now = ram_bytes_transferred();
+if (s->dirty_pages_rate &&
+ (num_dirty_pages_period * TARGET_PAGE_SIZE >
+ (bytes_xfer_now - bytes_xfer_prev)/2) &&
+ (dirty_rate_high_cnt++ > 4)) {
+trace_migration_throttle();
+mig_throttle_on = true;
+dirty_rate_high_cnt = 0;
+ }
+ bytes_xfer_prev = bytes_xfer_now;
+}
s->dirty_pages_rate = num_dirty_pages_period * 1000
/ (end_time - start_time);
s->dirty_bytes_rate = s->dirty_pages_rate * TARGET_PAGE_SIZE;
@@ -566,6 +592,8 @@ static int ram_save_setup(QEMUFile *f, void *opaque)
migration_bitmap = bitmap_new(ram_pages);
bitmap_set(migration_bitmap, 0, ram_pages);
migration_dirty_pages = ram_pages;
+mig_throttle_on = false;
+dirty_rate_high_cnt = 0;
if (migrate_use_xbzrle()) {
XBZRLE.cache = cache_init(migrate_xbzrle_cache_size() /
@@ -628,6 +656,7 @@ static int ram_save_iterate(QEMUFile *f, void *opaque)
}
total_sent += bytes_sent;
acct_info.iterations++;
+check_guest_throttling();
/* we want to check in the 1st loop, just in case it was the 1st time
and we had to sync the dirty bitmap.
qemu_get_clock_ns() is a bit expensive, so we only check each some
@@ -1097,3 +1126,53 @@ TargetInfo *qmp_query_target(Error **errp)
return info;
}
+
+/* Stub function that's gets run on the vcpu when its brought out of the
+ VM to run inside qemu via async_run_on_cpu()*/
+static void mig_sleep_cpu(void *opq)
+{
+qemu_mutex_unlock_iothread();
+g_usleep(30*1000);
+qemu_mutex_lock_iothread();
+}
+
+/* To reduce the dirty rate explicitly disallow the VCPUs from spending
+ much time in the VM. The migration thread will try to catchup.
+ Workload will experience a performance drop.
+*/
+static void mig_throttle_cpu_down(CPUState *cpu, void *data)
+{
+async_run_on_cpu(cpu, mi
[Qemu-devel] [PATCH v7 2/3] Add 'auto-converge' migration capability
The auto-converge migration capability allows the user to specify if they
choose live migration seqeunce to automatically detect and force convergence.
Signed-off-by: Chegu Vinod
Reviewed-by: Paolo Bonzini
Reviewed-by: Eric Blake
---
include/migration/migration.h |2 ++
migration.c |9 +
qapi-schema.json |5 -
3 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/include/migration/migration.h b/include/migration/migration.h
index e2acec6..ace91b0 100644
--- a/include/migration/migration.h
+++ b/include/migration/migration.h
@@ -127,4 +127,6 @@ int migrate_use_xbzrle(void);
int64_t migrate_xbzrle_cache_size(void);
int64_t xbzrle_cache_resize(int64_t new_size);
+
+bool migrate_auto_converge(void);
#endif
diff --git a/migration.c b/migration.c
index 058f9e6..d0759c1 100644
--- a/migration.c
+++ b/migration.c
@@ -473,6 +473,15 @@ void qmp_migrate_set_downtime(double value, Error **errp)
max_downtime = (uint64_t)value;
}
+bool migrate_auto_converge(void)
+{
+MigrationState *s;
+
+s = migrate_get_current();
+
+return s->enabled_capabilities[MIGRATION_CAPABILITY_AUTO_CONVERGE];
+}
+
int migrate_use_xbzrle(void)
{
MigrationState *s;
diff --git a/qapi-schema.json b/qapi-schema.json
index a80ee40..c019fec 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -605,10 +605,13 @@
# This feature allows us to minimize migration traffic for certain
work
# loads, by sending compressed difference of the pages
#
+# @auto-converge: If enabled, QEMU will automatically throttle down the guest
+# to speed up convergence of RAM migration. (since 1.6)
+#
# Since: 1.2
##
{ 'enum': 'MigrationCapability',
- 'data': ['xbzrle'] }
+ 'data': ['xbzrle', 'auto-converge'] }
##
# @MigrationCapabilityStatus
--
1.7.1
[Qemu-devel] [PATCH v7 0/3] Throttle-down guest to help with live migration convergence
Busy enterprise workloads hosted on large sized VM's tend to dirty memory faster than the transfer rate achieved via live guest migration. Despite some good recent improvements (& using dedicated 10Gig NICs between hosts) the live migration does NOT converge. If a user chooses to force convergence of their migration via a new migration capability "auto-converge" then this change will auto-detect lack of convergence scenario and trigger a slow down of the workload by explicitly disallowing the VCPUs from spending much time in the VM context. The migration thread tries to catchup and this eventually leads to convergence in some "deterministic" amount of time. Yes it does impact the performance of all the VCPUs but in my observation that lasts only for a short duration of time. i.e. end up entering stage 3 (downtime phase) soon after that. No external trigger is required. Thanks to Juan and Paolo for their useful suggestions. --- Changes from v6: - incorporated feedback from Paolo. - rebased to latest qemu.git and removing RFC Changes from v5: - incorporated feedback from Paolo & Igor. - rebased to latest qemu.git Changes from v4: - incorporated feedback from Paolo. - split into 3 patches. Changes from v3: - incorporated feedback from Paolo and Eric - rebased to latest qemu.git Changes from v2: - incorporated feedback from Orit, Juan and Eric - stop the throttling thread at the start of stage 3 - rebased to latest qemu.git Changes from v1: - rebased to latest qemu.git - added auto-converge capability(default off) - suggested by Anthony Liguori & Eric Blake. Signed-off-by: Chegu Vinod --- Chegu Vinod (3): Introduce async_run_on_cpu() Add 'auto-converge' migration capability Force auto-convegence of live migration arch_init.c | 85 + cpus.c| 29 ++ include/migration/migration.h |2 + include/qemu-common.h |1 + include/qom/cpu.h | 10 + migration.c |9 qapi-schema.json |5 ++- 7 files changed, 140 insertions(+), 1 deletions(-)
[Qemu-devel] [PATCH v7 1/3] Introduce async_run_on_cpu()
Introduce an asynchronous version of run_on_cpu() i.e. the caller
doesn't have to block till the call back routine finishes execution
on the target vcpu.
Signed-off-by: Chegu Vinod
Reviewed-by: Paolo Bonzini
---
cpus.c| 29 +
include/qemu-common.h |1 +
include/qom/cpu.h | 10 ++
3 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/cpus.c b/cpus.c
index c8bc8ad..c7c90d0 100644
--- a/cpus.c
+++ b/cpus.c
@@ -653,6 +653,7 @@ void run_on_cpu(CPUState *cpu, void (*func)(void *data),
void *data)
wi.func = func;
wi.data = data;
+wi.free = false;
if (cpu->queued_work_first == NULL) {
cpu->queued_work_first = &wi;
} else {
@@ -671,6 +672,31 @@ void run_on_cpu(CPUState *cpu, void (*func)(void *data),
void *data)
}
}
+void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)
+{
+struct qemu_work_item *wi;
+
+if (qemu_cpu_is_self(cpu)) {
+func(data);
+return;
+}
+
+wi = g_malloc0(sizeof(struct qemu_work_item));
+wi->func = func;
+wi->data = data;
+wi->free = true;
+if (cpu->queued_work_first == NULL) {
+cpu->queued_work_first = wi;
+} else {
+cpu->queued_work_last->next = wi;
+}
+cpu->queued_work_last = wi;
+wi->next = NULL;
+wi->done = false;
+
+qemu_cpu_kick(cpu);
+}
+
static void flush_queued_work(CPUState *cpu)
{
struct qemu_work_item *wi;
@@ -683,6 +709,9 @@ static void flush_queued_work(CPUState *cpu)
cpu->queued_work_first = wi->next;
wi->func(wi->data);
wi->done = true;
+if (wi->free) {
+g_free(wi);
+}
}
cpu->queued_work_last = NULL;
qemu_cond_broadcast(&qemu_work_cond);
diff --git a/include/qemu-common.h b/include/qemu-common.h
index 3c91375..9834dcb 100644
--- a/include/qemu-common.h
+++ b/include/qemu-common.h
@@ -291,6 +291,7 @@ struct qemu_work_item {
void (*func)(void *data);
void *data;
int done;
+bool free;
};
#ifdef CONFIG_USER_ONLY
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index a5bb515..b555c22 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -288,6 +288,16 @@ bool cpu_is_stopped(CPUState *cpu);
void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
/**
+ * async_run_on_cpu:
+ * @cpu: The vCPU to run on.
+ * @func: The function to be executed.
+ * @data: Data to pass to the function.
+ *
+ * Schedules the function @func for execution on the vCPU @cpu asynchronously.
+ */
+void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
+
+/**
* qemu_for_each_cpu:
* @func: The function to be executed.
* @data: Data to pass to the function.
--
1.7.1
Re: [Qemu-devel] [RFC PATCH v6 3/3] Force auto-convegence of live migration
On 6/20/2013 5:54 AM, Paolo Bonzini wrote:
Il 14/06/2013 15:58, Chegu Vinod ha scritto:
If a user chooses to turn on the auto-converge migration capability
these changes detect the lack of convergence and throttle down the
guest. i.e. force the VCPUs out of the guest for some duration
and let the migration thread catchup and help converge.
Hi Vinod,
pretty much the same comments I sent you yesterday on the obsolete
version of the patch still apply.
Verified the convergence using the following :
- Java Warehouse workload running on a 20VCPU/256G guest(~80% busy)
- OLTP like workload running on a 80VCPU/512G guest (~80% busy)
Sample results with Java warehouse workload : (migrate speed set to 20Gb and
migrate downtime set to 4seconds).
(qemu) info migrate
capabilities: xbzrle: off auto-converge: off <
Migration status: active
total time: 1487503 milliseconds
expected downtime: 519 milliseconds
transferred ram: 383749347 kbytes
remaining ram: 2753372 kbytes
total ram: 268444224 kbytes
duplicate: 65461532 pages
skipped: 64901568 pages
normal: 95750218 pages
normal bytes: 383000872 kbytes
dirty pages rate: 67551 pages
---
(qemu) info migrate
capabilities: xbzrle: off auto-converge: on <
Migration status: completed
total time: 241161 milliseconds
downtime: 6373 milliseconds
transferred ram: 28235307 kbytes
remaining ram: 0 kbytes
total ram: 268444224 kbytes
duplicate: 64946416 pages
skipped: 64903523 pages
normal: 7044971 pages
normal bytes: 28179884 kbytes
Signed-off-by: Chegu Vinod
---
arch_init.c | 85 +++
1 files changed, 85 insertions(+), 0 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 5d32ecf..69c6c8c 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -104,6 +104,8 @@ int graphic_depth = 15;
#endif
const uint32_t arch_type = QEMU_ARCH;
+static bool mig_throttle_on;
+static void throttle_down_guest_to_converge(void);
/***/
/* ram save/restore */
@@ -378,8 +380,15 @@ static void migration_bitmap_sync(void)
uint64_t num_dirty_pages_init = migration_dirty_pages;
MigrationState *s = migrate_get_current();
static int64_t start_time;
+static int64_t bytes_xfer_prev;
static int64_t num_dirty_pages_period;
int64_t end_time;
+int64_t bytes_xfer_now;
+static int dirty_rate_high_cnt;
+
+if (!bytes_xfer_prev) {
+bytes_xfer_prev = ram_bytes_transferred();
+}
if (!start_time) {
start_time = qemu_get_clock_ms(rt_clock);
@@ -404,6 +413,23 @@ static void migration_bitmap_sync(void)
/* more than 1 second = 1000 millisecons */
if (end_time > start_time + 1000) {
+if (migrate_auto_converge()) {
+/* The following detection logic can be refined later. For now:
+ Check to see if the dirtied bytes is 50% more than the approx.
+ amount of bytes that just got transferred since the last time we
+ were in this routine. If that happens >N times (for now N==4)
+ we turn on the throttle down logic */
+bytes_xfer_now = ram_bytes_transferred();
+if (s->dirty_pages_rate &&
+((num_dirty_pages_period*TARGET_PAGE_SIZE) >
+((bytes_xfer_now - bytes_xfer_prev)/2))) {
+if (dirty_rate_high_cnt++ > 4) {
Too many parentheses, and please remove the nested if.
+DPRINTF("Unable to converge. Throtting down guest\n");
Please use tracepoint instead.
+mig_throttle_on = true;
Need to reset dirty_rate_high_cnt here, and both
dirty_rate_high_cnt/mig_throttle_on if you see !migrate_auto_converge().
This ensures that throttling does not kick in automatically if you
disable and re-enable the feature. It also lets you remove a bunch of
migrate_auto_converge() checks.
You also need to reset dirty_rate_high_cnt/mig_throttle_on in the setup
phase of migration.
+}
+ }
+ bytes_xfer_prev = bytes_xfer_now;
+}
s->dirty_pages_rate = num_dirty_pages_period * 1000
/ (end_time - start_time);
s->dirty_bytes_rate = s->dirty_pages_rate * TARGET_PAGE_SIZE;
@@ -628,6 +654,7 @@ static int ram_save_iterate(QEMUFile *f, void *opaque)
}
total_sent += bytes_sent;
acct_info.iterations++;
+throttle_down_guest_to_converge();
You can use a shorter name, like check_cpu_throttling().
/* we want to check in the 1st loop, just in case it was the 1st time
and we had to sync the dirty bitmap.
qemu_get_clock_ns() is a bit expensive, so we only check each some
@@ -1098,3 +1125,61 @@ TargetInfo *qmp_query_target(Error **errp)
return info;
}
+
+static bool throttling_needed(void)
+{
+if (!migrate_auto_converge()) {
+
[Qemu-devel] [PATCH v4] QEMUBH: make AioContext's bh re-entrant
BH will be used outside big lock, so introduce lock to protect
between the writers, ie, bh's adders and deleter. The lock only
affects the writers and bh's callback does not take this extra lock.
Note that for the same AioContext, aio_bh_poll() can not run in
parallel yet.
Signed-off-by: Liu Ping Fan
v3->v4
resolve memory order of bh->idle and ->scheduled
add comments for qemu_bh_delete/cancel
---
async.c | 32 ++--
include/block/aio.h | 7 +++
2 files changed, 37 insertions(+), 2 deletions(-)
diff --git a/async.c b/async.c
index 90fe906..108d7c3 100644
--- a/async.c
+++ b/async.c
@@ -47,11 +47,16 @@ QEMUBH *aio_bh_new(AioContext *ctx, QEMUBHFunc *cb, void
*opaque)
bh->ctx = ctx;
bh->cb = cb;
bh->opaque = opaque;
+qemu_mutex_lock(&ctx->bh_lock);
bh->next = ctx->first_bh;
+/* Make sure the members ready before putting bh into list */
+smp_wmb();
ctx->first_bh = bh;
+qemu_mutex_unlock(&ctx->bh_lock);
return bh;
}
+/* Multiple occurrences of aio_bh_poll cannot be called concurrently */
int aio_bh_poll(AioContext *ctx)
{
QEMUBH *bh, **bhp, *next;
@@ -61,9 +66,15 @@ int aio_bh_poll(AioContext *ctx)
ret = 0;
for (bh = ctx->first_bh; bh; bh = next) {
+/* Make sure fetching bh before accessing its members */
+smp_read_barrier_depends();
next = bh->next;
if (!bh->deleted && bh->scheduled) {
bh->scheduled = 0;
+/* Paired with write barrier in bh schedule to ensure reading for
+ * idle & callbacks coming after bh's scheduling.
+ */
+smp_rmb();
if (!bh->idle)
ret = 1;
bh->idle = 0;
@@ -75,6 +86,7 @@ int aio_bh_poll(AioContext *ctx)
/* remove deleted bhs */
if (!ctx->walking_bh) {
+qemu_mutex_lock(&ctx->bh_lock);
bhp = &ctx->first_bh;
while (*bhp) {
bh = *bhp;
@@ -85,6 +97,7 @@ int aio_bh_poll(AioContext *ctx)
bhp = &bh->next;
}
}
+qemu_mutex_unlock(&ctx->bh_lock);
}
return ret;
@@ -94,24 +107,38 @@ void qemu_bh_schedule_idle(QEMUBH *bh)
{
if (bh->scheduled)
return;
-bh->scheduled = 1;
bh->idle = 1;
+/* Make sure idle & any writes that are needed by the callback are done
+ * before the locations are read in the aio_bh_poll.
+ */
+smp_wmb();
+bh->scheduled = 1;
}
void qemu_bh_schedule(QEMUBH *bh)
{
if (bh->scheduled)
return;
-bh->scheduled = 1;
bh->idle = 0;
+/* Make sure idle & any writes that are needed by the callback are done
+ * before the locations are read in the aio_bh_poll.
+ */
+smp_wmb();
+bh->scheduled = 1;
aio_notify(bh->ctx);
}
+
+/* This func is async.
+ */
void qemu_bh_cancel(QEMUBH *bh)
{
bh->scheduled = 0;
}
+/* This func is async.The bottom half will do the delete action at the finial
+ * end.
+ */
void qemu_bh_delete(QEMUBH *bh)
{
bh->scheduled = 0;
@@ -211,6 +238,7 @@ AioContext *aio_context_new(void)
ctx = (AioContext *) g_source_new(&aio_source_funcs, sizeof(AioContext));
ctx->pollfds = g_array_new(FALSE, FALSE, sizeof(GPollFD));
ctx->thread_pool = NULL;
+qemu_mutex_init(&ctx->bh_lock);
event_notifier_init(&ctx->notifier, false);
aio_set_event_notifier(ctx, &ctx->notifier,
(EventNotifierHandler *)
diff --git a/include/block/aio.h b/include/block/aio.h
index 1836793..cc1 100644
--- a/include/block/aio.h
+++ b/include/block/aio.h
@@ -17,6 +17,7 @@
#include "qemu-common.h"
#include "qemu/queue.h"
#include "qemu/event_notifier.h"
+#include "qemu/thread.h"
typedef struct BlockDriverAIOCB BlockDriverAIOCB;
typedef void BlockDriverCompletionFunc(void *opaque, int ret);
@@ -53,6 +54,8 @@ typedef struct AioContext {
*/
int walking_handlers;
+/* lock to protect between bh's adders and deleter */
+QemuMutex bh_lock;
/* Anchor of the list of Bottom Halves belonging to the context */
struct QEMUBH *first_bh;
@@ -127,6 +130,8 @@ void aio_notify(AioContext *ctx);
* aio_bh_poll: Poll bottom halves for an AioContext.
*
* These are internal functions used by the QEMU main loop.
+ * And notice that multiple occurrences of aio_bh_poll cannot
+ * be called concurrently
*/
int aio_bh_poll(AioContext *ctx);
@@ -163,6 +168,8 @@ void qemu_bh_cancel(QEMUBH *bh);
* Deleting a bottom half frees the memory that was allocated for it by
* qemu_bh_new. It also implies canceling the bottom half if it was
* scheduled.
+ * This func is async. The bottom half will do the delete action at the finial
+ * end.
*
* @bh: The bottom half to be deleted.
*/
--
1.8.1.4
Re: [Qemu-devel] [Qemu-ppc] [PATCH] RFC kvm irqfd: add directly mapped MSI IRQ support
On Sun, Jun 23, 2013 at 4:39 PM, Benjamin Herrenschmidt wrote: > On Sun, 2013-06-23 at 10:02 -0500, Anthony Liguori wrote: >> It doesn't make a lot of sense to have Power do MSI decoding in >> userspace while x86 does it in the kernel. I assume the kernel >> doesn't have enough information to do the translation on Power? > > Well, it would need the host bridge which it doesn't have and it > would need a concept of mapping that to interrupt numbers which > we don't want in the kernel. > > We can keep the kernel side a LOT simpler (completely avoiding > the whole route bloatware) by sticking to our "simple" direct map kernel > stuff and doing the mapping from address/data to interrupts in qemu, so > we'll stick to that. Yeah, but none of this is Power specific... so we can do the same for x86, no? I'm still trying to wrap my head around why we need MSI knowledge at all in the kernel for x86. I presume it's to fast-path irqfd when doing vhost? Regards, Anthony Liguori > > Cheers, > Ben. > >
Re: [Qemu-devel] [PATCH 0/3] multiboot: Fix memory information
Kevin Wolf writes: > Kevin Wolf (3): > multiboot: Don't forget last mmap entry > multiboot: Calculate upper_mem in the ROM > multiboot: Updated ROM binary Reviewed-by: Anthony Liguori Do you have a test case that triggered this that you can share? I'll apply this after a day or so when others have had a chance to review. Regards, Anthony Liguori > > hw/i386/multiboot.c |2 - > pc-bios/multiboot.bin | Bin 1024 -> 1024 bytes > pc-bios/optionrom/multiboot.S | 75 > +++-- > 3 files changed, 57 insertions(+), 20 deletions(-) > mode change 100644 => 100755 pc-bios/multiboot.bin > > -- > 1.7.7
Re: [Qemu-devel] [Qemu-ppc] [PATCH] RFC kvm irqfd: add directly mapped MSI IRQ support
On Sun, 2013-06-23 at 10:02 -0500, Anthony Liguori wrote: > It doesn't make a lot of sense to have Power do MSI decoding in > userspace while x86 does it in the kernel. I assume the kernel > doesn't have enough information to do the translation on Power? Well, it would need the host bridge which it doesn't have and it would need a concept of mapping that to interrupt numbers which we don't want in the kernel. We can keep the kernel side a LOT simpler (completely avoiding the whole route bloatware) by sticking to our "simple" direct map kernel stuff and doing the mapping from address/data to interrupts in qemu, so we'll stick to that. Cheers, Ben.
Re: [Qemu-devel] [PATCH] RFC kvm irqfd: add directly mapped MSI IRQ support
On Sun, 2013-06-23 at 17:07 +0300, Michael S. Tsirkin wrote: > Yes I think that's fine really. > > Basically devices all speak MSIMessage as they should - > this is what the PCI spec says. > On all normal systems guests also speak MSIMessage so > the API which uses these makes sense for kvm. > Except, ppc architecture in its wisdom decided to hide this > in firmware. QEMU does not have firmware so the translation > has to be maintained in QEMU powerpc code. It is still not enough. There is nothing that says that an MSI address/message is unique. On pseries (among others I'm sure), this is a per-host-bridge concept since the MSIs are decoded by the PHB and turned into standard fabric interrupts there. So at least the bus needs to be passed as well. Cheers, Ben.
Re: [Qemu-devel] [PATCH v3 11/14] ioport: Switch dispatching to memory core layer
Jan Kiszka a écrit :
From: Jan Kiszka
The current ioport dispatcher is a complex beast, mostly due to the
need to deal with old portio interface users. But we can overcome it
without converting all portio users by embedding the required base
address of a MemoryRegionPortio access into that data structure. That
removes the need to have the additional MemoryRegionIORange structure
in the loop on every access.
To handle old portio memory ops, we simply install dispatching handlers
for portio memory regions when registering them with the memory core.
This removes the need for the old_portio field.
We can drop the additional aliasing of ioport regions and also the
special address space listener. cpu_in and cpu_out now simply call
address_space_read/write. And we can concentrate portio handling in a
single source file.
Signed-off-by: Jan Kiszka
---
...
+
+static void portio_write(void *opaque, hwaddr addr, uint64_t data,
+ unsigned size)
+{
+MemoryRegionPortioList *mrpio = opaque;
+const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, true);
+
+if (mrp) {
+mrp->write(mrpio->portio_opaque, mrp->base + addr, data);
+} else if (size == 2) {
+mrp = find_portio(mrpio, addr, 1, true);
+assert(mrp);
+mrp->write(mrpio->portio_opaque, mrp->base + addr, data & 0xff);
+mrp->write(mrpio->portio_opaque, mrp->base + addr + 1, data >> 8);
+}
+}
+
+static const MemoryRegionOps portio_ops = {
+.read = portio_read,
+.write = portio_write,
+.valid.unaligned = true,
+.impl.unaligned = true,
+};
+
You need to mark these operations as DEVICE_LITTLE_ENDIAN.
In portio_write above, you clearly assume that data is in LE format.
This fixes PPC PReP emulation, which would otherwise be broken with this
patchset.
Hervé
Re: [Qemu-devel] [PATCH v3 00/14] Refactor portio dispatching
Jan Kiszka a écrit : Changes in v3: - decouple vmport from portio types - removed portio traces from memory.h, consolidating it in ioport.h CC: Jan Kiszka CC: malc Jan Kiszka (14): adlib: replace register_ioport* applesmc: replace register_ioport* wdt_ib700: replace register_ioport* i82374: replace register_ioport* prep: replace register_ioport* vt82c686: replace register_ioport* Privatize register_ioport_read/write isa: implement isa_is_ioport_assigned via memory_region_find vmware-vga: Accept unaligned I/O accesses xen: Mark fixed platform I/O as unaligned ioport: Switch dispatching to memory core layer ioport: Remove unused old dispatching services vmport: Disentangle read handler type from portio ioport: Move portio types to ioport.h The whole series: Tested-by: Hervé Poussineau
[Qemu-devel] [PATCH 2/3] multiboot: Calculate upper_mem in the ROM
The upper_mem field of the Multiboot information struct doesn't really contain the RAM size - 1 MB like we used to calculate it, but only the memory from 1 MB up to the first (upper) memory hole. In order to correctly retrieve this information, the multiboot ROM now looks at the mmap it creates anyway and tries to find the size of contiguous usable memory from 1 MB. Drop the multiboot.c definition of lower_mem and upper_mem because both are queried at runtime now. Signed-off-by: Kevin Wolf --- hw/i386/multiboot.c |2 -- pc-bios/optionrom/multiboot.S | 40 2 files changed, 40 insertions(+), 2 deletions(-) diff --git a/hw/i386/multiboot.c b/hw/i386/multiboot.c index 09211e0..985ca1e 100644 --- a/hw/i386/multiboot.c +++ b/hw/i386/multiboot.c @@ -315,8 +315,6 @@ int load_multiboot(FWCfgState *fw_cfg, | MULTIBOOT_FLAGS_CMDLINE | MULTIBOOT_FLAGS_MODULES | MULTIBOOT_FLAGS_MMAP); -stl_p(bootinfo + MBI_MEM_LOWER, 640); -stl_p(bootinfo + MBI_MEM_UPPER, (ram_size / 1024) - 1024); stl_p(bootinfo + MBI_BOOT_DEVICE, 0x8000); /* XXX: use the -boot switch? */ stl_p(bootinfo + MBI_MMAP_ADDR, ADDR_E820_MAP); diff --git a/pc-bios/optionrom/multiboot.S b/pc-bios/optionrom/multiboot.S index a0f3602..b7efe4d 100644 --- a/pc-bios/optionrom/multiboot.S +++ b/pc-bios/optionrom/multiboot.S @@ -123,6 +123,46 @@ mmap_store_entry: jnz mmap_loop mmap_done: + /* Calculate upper_mem field: The amount of memory between 1 MB and + the first upper memory hole. Get it from the mmap. */ + xor %di, %di + mov $0x10, %edx +upper_mem_entry: + cmp %fs:0x2c, %di + je upper_mem_done + add $4, %di + + /* Skip if type != 1 */ + cmpl$1, %es:16(%di) + jne upper_mem_next + + /* Skip if > 4 GB */ + movl%es:4(%di), %eax + test%eax, %eax + jnz upper_mem_next + + /* Check for contiguous extension (base <= %edx < base + length) */ + movl%es:(%di), %eax + cmp %eax, %edx + jb upper_mem_next + addl%es:8(%di), %eax + cmp %eax, %edx + jae upper_mem_next + + /* If so, update %edx, and restart the search (mmap isn't ordered) */ + mov %eax, %edx + xor %di, %di + jmp upper_mem_entry + +upper_mem_next: + addl%es:-4(%di), %edi + jmp upper_mem_entry + +upper_mem_done: + sub $0x10, %edx + shr $10, %edx + mov %edx, %fs:0x8 + real_to_prot: /* Load the GDT before going into protected mode */ lgdt: -- 1.7.7
[Qemu-devel] [PATCH 0/3] multiboot: Fix memory information
Kevin Wolf (3): multiboot: Don't forget last mmap entry multiboot: Calculate upper_mem in the ROM multiboot: Updated ROM binary hw/i386/multiboot.c |2 - pc-bios/multiboot.bin | Bin 1024 -> 1024 bytes pc-bios/optionrom/multiboot.S | 75 +++-- 3 files changed, 57 insertions(+), 20 deletions(-) mode change 100644 => 100755 pc-bios/multiboot.bin -- 1.7.7
[Qemu-devel] [PATCH 1/3] multiboot: Don't forget last mmap entry
When the BIOS returns ebx = 0, the current entry is still valid and needs to be included in the Multiboot memory map. Fixing this meant that using bx as the entry index doesn't work any more because it's 0 on the last entry (and it was SeaBIOS-specific anyway), so the whole loop had to change a bit and should be more generic as a result (ebx can be an arbitrary continuation number now, and the entry size returned by the BIOS is used instead of hard-coding 20 bytes). Signed-off-by: Kevin Wolf --- pc-bios/optionrom/multiboot.S | 35 +-- 1 files changed, 17 insertions(+), 18 deletions(-) diff --git a/pc-bios/optionrom/multiboot.S b/pc-bios/optionrom/multiboot.S index 003bcfb..a0f3602 100644 --- a/pc-bios/optionrom/multiboot.S +++ b/pc-bios/optionrom/multiboot.S @@ -89,17 +89,14 @@ run_multiboot: /* Initialize multiboot mmap structs using int 0x15(e820) */ xor %ebx, %ebx - /* mmap start after first size */ - movl$4, %edi + /* Start storing mmap data at %es:0 */ + xor %edi, %edi mmap_loop: + /* The multiboot entry size has offset -4, so leave some space */ + add $4, %di /* entry size (mmap struct) & max buffer size (int15) */ movl$20, %ecx - /* store entry size */ - /* old as(1) doesn't like this insn so emit the bytes instead: - movl%ecx, %es:-4(%edi) - */ - .dc.b 0x26,0x67,0x66,0x89,0x4f,0xfc /* e820 */ movl$0xe820, %eax /* 'SMAP' magic */ @@ -107,21 +104,23 @@ mmap_loop: int $0x15 mmap_check_entry: - /* last entry? then we're done */ + /* Error or last entry already done? */ jb mmap_done - and %bx, %bx - jz mmap_done - /* valid entry, so let's loop on */ mmap_store_entry: - /* %ax = entry_number * 24 */ - mov $24, %ax - mul %bx - mov %ax, %di + /* store entry size */ + /* old as(1) doesn't like this insn so emit the bytes instead: + movl%ecx, %es:-4(%edi) + */ + .dc.b 0x26,0x67,0x66,0x89,0x4f,0xfc + + /* %edi += entry_size, store as mbs_mmap_length */ + add %ecx, %edi movw%di, %fs:0x2c - /* %di = 4 + (entry_number * 24) */ - add $4, %di - jmp mmap_loop + + /* Continuation value 0 means last entry */ + test%ebx, %ebx + jnz mmap_loop mmap_done: real_to_prot: -- 1.7.7
[Qemu-devel] [PATCH 3/3] multiboot: Updated ROM binary
Signed-off-by: Kevin Wolf
---
pc-bios/multiboot.bin | Bin 1024 -> 1024 bytes
1 files changed, 0 insertions(+), 0 deletions(-)
mode change 100644 => 100755 pc-bios/multiboot.bin
diff --git a/pc-bios/multiboot.bin b/pc-bios/multiboot.bin
old mode 100644
new mode 100755
index
7b3c1745a430ea5e0e15b9aa817d1cbbaa40db14..e772713c95749bee82c20002b50ec6d05b2d4987
GIT binary patch
delta 202
zcmZqRXyBNj#XOB^_C#GPg#@NF#>1&;opKBeyEzzAJLOmyy5%M?0U2xzY29*@CbrM2
zH~imxoF#3i2m=E{+75*mKyp`rqi^t8(IR2B^t4X@KWU8TQ#$Q*7}8pAmtHaapSFvE
zL4YB}8Yog?2GpvS)?6#VSgN9y*6qrY)_R~+3dmwjvpiHJsFud;$^m2*v!`_)GW`Gg
w6i}e{&+Ef!jjupvq#b<4mBO0VDaOGtIh=7ffTUV_TBrY?v>ggBfFipB9DRe&iWZ3~-YyZ`A;Iwdap&=rPCFfj=Ho1{
g&re>;xSN@QA$M{jlOdzb=E+PsjFS&A`7r7M0H
[Qemu-devel] [Bug 1193628] Re: Undefined References
@Peter Maydell (pmaydell): you're right, but in the meantime, I needed to find another solution. @Michael Tokarev (mjt+launchpad-tls): Thanks a lot for your answer, it helped me pass this hindrance... to find 2 other obstacles. Regarding the first one: I patched the two files as recommended (and added comments to the third one). There's a confusing thing though: the displayed "configure" file is very different from the one which is distributed with the 1.1.0 release, so the line numbers are not correct. The patch needs to be done from line #2569, instead of #2673. Anyway, I was able to continue making qemu until this error: " LINK lm32-softmmu/qemu-system-lm32 /usr/bin/ld: milkymist-tmu2.o: undefined reference to symbol 'XFree' /usr/bin/ld: note: 'XFree' is defined in DSO /usr/lib/i386-linux-gnu/libX11.so.6 so try adding it to the linker command line /usr/lib/i386-linux-gnu/libX11.so.6: could not read symbols: Invalid operation collect2: error: ld returned 1 exit status make[1]: *** [qemu-system-lm32] Error 1 make: *** [subdir-lm32-softmmu] Error 2" I had to apply another patch to "configure" from here: http://permalink.gmane.org/gmane.comp.emulators.qemu/193007 Then I ran into another issue: " CCcris-linux-user/signal.o /home/actionmystique/Downloads/qemu-1.1.0/linux-user/signal.c:3479:24: error: field ‘info’ has incomplete type make[1]: *** [signal.o] Error 1 make: *** [subdir-cris-linux-user] Error 2" This was solved with a last patch on "linux-user/signal.c" from: http://git.qemu.org/?p=qemu.git;a=commit;h=02d2bd5d57812154cfb978bc2098cf49d551583d And now I'm finally able to compile, link and install qemu-1.1.0 on Ubuntu 13.04 without any error! :) N.B: I have attached the four files as tar.gz for further reference; you may want to include these new files into qemu 1.1.0. ** Attachment added: "configure - def-helper.h - exec-all.h - linux-user/signal.c" https://bugs.launchpad.net/qemu/+bug/1193628/+attachment/3711488/+files/qemu-1.1.0-patch.tar.gz -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1193628 Title: Undefined References Status in QEMU: New Bug description: I've been able to make qemu on ubuntu 13.04 for all last releases: 1.4.0 -> 1.5.0 Unfortunately, when I launch one of them with a Cisco ASA, it crashes inside GNS3 (latest release) for Ubuntu. The top GNS3 developer told me they experienced similar results and advised me to use qemu 1.1.0. The problem is that I cannot link that version. I always have these errors: "LINK qemu-ga qemu-timer.o: In function `dynticks_rearm_timer': /home/actionmystique/Downloads/qemu-1.1.0/qemu-timer.c:538: undefined reference to `timer_gettime' /home/actionmystique/Downloads/qemu-1.1.0/qemu-timer.c:551: undefined reference to `timer_settime' qemu-timer.o: In function `dynticks_stop_timer': /home/actionmystique/Downloads/qemu-1.1.0/qemu-timer.c:524: undefined reference to `timer_delete' qemu-timer.o: In function `dynticks_start_timer': /home/actionmystique/Downloads/qemu-1.1.0/qemu-timer.c:510: undefined reference to `timer_create' collect2: error: ld returned 1 exit status make: *** [qemu-ga] Error 1" The man pages say we need to link with '-lrt' option, but I could not find it in the Makefile. I do not know how to correct this issue. To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1193628/+subscriptions
Re: [Qemu-devel] [PATCH v3] configure: Simplify alternate .text segment
On 23 June 2013 19:20, Richard Henderson wrote: > On 06/22/2013 03:58 AM, Peter Maydell wrote: >> Should we really be putting this in LDFLAGS? That seems >> likely to end up getting accidentally applied in places >> where we don't want it (helper binaries, etc). It seems >> like it would be more robust to have it in a special >> variable which we only ever explicitly apply to linking >> the foo-linux-user binary. > > This is within the target subdir, not in the main top level. Ah, I hadn't noticed that. Fair enough. -- PMM
Re: [Qemu-devel] [PATCH] Switch the roles of jmp_next[0] and jmp_next[1].
On 06/22/2013 09:10 AM, Zhihui Zhang wrote: > This way, jmp_next[0] means "taken" for both conditional jumps AND > unconditional jumps. > Currently, it has opposite meanings for the two cases. So? There's no proscribed meaning for the 0 and 1 indices. r~
Re: [Qemu-devel] [PATCH v3] configure: Simplify alternate .text segment
On 06/22/2013 03:58 AM, Peter Maydell wrote: > On 22 June 2013 03:10, Richard Henderson wrote: >> + ldflags="$ldflags $textseg_ldflags" >> fi >> >> echo "LDFLAGS+=$ldflags" >> $config_target_mak > > Should we really be putting this in LDFLAGS? That seems > likely to end up getting accidentally applied in places > where we don't want it (helper binaries, etc). It seems > like it would be more robust to have it in a special > variable which we only ever explicitly apply to linking > the foo-linux-user binary. This is within the target subdir, not in the main top level. So... What helper binaries? Modifying ldflags is what we do now. If you think that we should change to a different variable, then I think that should be a separate change. r~
Re: [Qemu-devel] [PATCH] Fix iSCSI crash on SG_IO with an iovector
On 06/23/13 17:07, Ronnie Sahlberg wrote:
> Don't assume that SG_IO is always invoked with a simple buffer,
> check the iovec_count and if it is >= 1 then we need to pass an array
> of iovectors to libiscsi instead of just a plain buffer.
>
> Signed-off-by: Ronnie Sahlberg
> ---
> block/iscsi.c | 56 +---
> 1 files changed, 49 insertions(+), 7 deletions(-)
>
> diff --git a/block/iscsi.c b/block/iscsi.c
> index 0bbf0b1..dca38c4 100644
> --- a/block/iscsi.c
> +++ b/block/iscsi.c
> @@ -651,6 +651,9 @@ iscsi_aio_ioctl_cb(struct iscsi_context *iscsi, int
> status,
> {
> IscsiAIOCB *acb = opaque;
>
> +g_free(acb->buf);
> +acb->buf = NULL;
> +
> if (acb->canceled != 0) {
> return;
> }
> @@ -727,14 +730,36 @@ static BlockDriverAIOCB
> *iscsi_aio_ioctl(BlockDriverState *bs,
> memcpy(&acb->task->cdb[0], acb->ioh->cmdp, acb->ioh->cmd_len);
> acb->task->expxferlen = acb->ioh->dxfer_len;
>
> +data.size = 0;
> if (acb->task->xfer_dir == SCSI_XFER_WRITE) {
> -data.data = acb->ioh->dxferp;
> -data.size = acb->ioh->dxfer_len;
> +if (acb->ioh->iovec_count == 0) {
> +data.data = acb->ioh->dxferp;
> +data.size = acb->ioh->dxfer_len;
> +} else {
> +#if defined(LIBISCSI_FEATURE_IOVECTOR)
> + scsi_task_set_iov_out(acb->task,
> + (struct scsi_iovec *) acb->ioh->dxferp,
> + acb->ioh->iovec_count);
> + #else
> +int i;
> +char *buf;
> +struct scsi_iovec *iov = (struct scsi_iovec *)acb->ioh->dxferp;
> +
> +acb->buf = g_malloc(acb->ioh->dxfer_len);
> +buf = (char *)acb->buf;
> +for (i = 0; i < acb->ioh->iovec_count; i++) {
> +memcpy(buf, iov[i].iov_base, iov[i].iov_len);
> +buf += iov[i].iov_len;
> +}
> +data.data = acb->buf;
> +data.size = acb->ioh->dxfer_len;
> +#endif
> +}
> }
> +
> if (iscsi_scsi_command_async(iscsi, iscsilun->lun, acb->task,
> iscsi_aio_ioctl_cb,
> - (acb->task->xfer_dir == SCSI_XFER_WRITE) ?
> - &data : NULL,
> + (data.size > 0) ? &data : NULL,
> acb) != 0) {
> scsi_free_scsi_task(acb->task);
> qemu_aio_release(acb);
> @@ -743,9 +768,26 @@ static BlockDriverAIOCB
> *iscsi_aio_ioctl(BlockDriverState *bs,
>
> /* tell libiscsi to read straight into the buffer we got from ioctl */
> if (acb->task->xfer_dir == SCSI_XFER_READ) {
> -scsi_task_add_data_in_buffer(acb->task,
> - acb->ioh->dxfer_len,
> - acb->ioh->dxferp);
> +if (acb->ioh->iovec_count == 0) {
> +scsi_task_add_data_in_buffer(acb->task,
> + acb->ioh->dxfer_len,
> + acb->ioh->dxferp);
> +} else {
> +#if defined(LIBISCSI_FEATURE_IOVECTOR)
> +scsi_task_set_iov_in(acb->task,
> + (struct scsi_iovec *) acb->ioh->dxferp,
> + acb->ioh->iovec_count);
> +#else
> +int i;
> +for (i = 0; i < acb->ioh->iovec_count; i++) {
> +struct scsi_iovec *iov = (struct scsi_iovec
> *)acb->ioh->dxferp;
> +
> +scsi_task_add_data_in_buffer(acb->task,
> +iov[i].iov_len,
> +iov[i].iov_base);
> +}
> +#endif
> +}
> }
>
> iscsi_set_events(iscsilun);
>
Reviewed-by: Laszlo Ersek
[Qemu-devel] [PATCH] Fix iSCSI crash on SG_IO with an iovector
Don't assume that SG_IO is always invoked with a simple buffer,
check the iovec_count and if it is >= 1 then we need to pass an array
of iovectors to libiscsi instead of just a plain buffer.
Signed-off-by: Ronnie Sahlberg
---
block/iscsi.c | 56 +---
1 files changed, 49 insertions(+), 7 deletions(-)
diff --git a/block/iscsi.c b/block/iscsi.c
index 0bbf0b1..dca38c4 100644
--- a/block/iscsi.c
+++ b/block/iscsi.c
@@ -651,6 +651,9 @@ iscsi_aio_ioctl_cb(struct iscsi_context *iscsi, int status,
{
IscsiAIOCB *acb = opaque;
+g_free(acb->buf);
+acb->buf = NULL;
+
if (acb->canceled != 0) {
return;
}
@@ -727,14 +730,36 @@ static BlockDriverAIOCB *iscsi_aio_ioctl(BlockDriverState
*bs,
memcpy(&acb->task->cdb[0], acb->ioh->cmdp, acb->ioh->cmd_len);
acb->task->expxferlen = acb->ioh->dxfer_len;
+data.size = 0;
if (acb->task->xfer_dir == SCSI_XFER_WRITE) {
-data.data = acb->ioh->dxferp;
-data.size = acb->ioh->dxfer_len;
+if (acb->ioh->iovec_count == 0) {
+data.data = acb->ioh->dxferp;
+data.size = acb->ioh->dxfer_len;
+} else {
+#if defined(LIBISCSI_FEATURE_IOVECTOR)
+ scsi_task_set_iov_out(acb->task,
+ (struct scsi_iovec *) acb->ioh->dxferp,
+ acb->ioh->iovec_count);
+ #else
+int i;
+char *buf;
+struct scsi_iovec *iov = (struct scsi_iovec *)acb->ioh->dxferp;
+
+acb->buf = g_malloc(acb->ioh->dxfer_len);
+buf = (char *)acb->buf;
+for (i = 0; i < acb->ioh->iovec_count; i++) {
+memcpy(buf, iov[i].iov_base, iov[i].iov_len);
+buf += iov[i].iov_len;
+}
+data.data = acb->buf;
+data.size = acb->ioh->dxfer_len;
+#endif
+}
}
+
if (iscsi_scsi_command_async(iscsi, iscsilun->lun, acb->task,
iscsi_aio_ioctl_cb,
- (acb->task->xfer_dir == SCSI_XFER_WRITE) ?
- &data : NULL,
+ (data.size > 0) ? &data : NULL,
acb) != 0) {
scsi_free_scsi_task(acb->task);
qemu_aio_release(acb);
@@ -743,9 +768,26 @@ static BlockDriverAIOCB *iscsi_aio_ioctl(BlockDriverState
*bs,
/* tell libiscsi to read straight into the buffer we got from ioctl */
if (acb->task->xfer_dir == SCSI_XFER_READ) {
-scsi_task_add_data_in_buffer(acb->task,
- acb->ioh->dxfer_len,
- acb->ioh->dxferp);
+if (acb->ioh->iovec_count == 0) {
+scsi_task_add_data_in_buffer(acb->task,
+ acb->ioh->dxfer_len,
+ acb->ioh->dxferp);
+} else {
+#if defined(LIBISCSI_FEATURE_IOVECTOR)
+scsi_task_set_iov_in(acb->task,
+ (struct scsi_iovec *) acb->ioh->dxferp,
+ acb->ioh->iovec_count);
+#else
+int i;
+for (i = 0; i < acb->ioh->iovec_count; i++) {
+struct scsi_iovec *iov = (struct scsi_iovec *)acb->ioh->dxferp;
+
+scsi_task_add_data_in_buffer(acb->task,
+iov[i].iov_len,
+iov[i].iov_base);
+}
+#endif
+}
}
iscsi_set_events(iscsilun);
--
1.7.3.1
[Qemu-devel] [PATCH] iSCSI fix crash when using virtio and libiscsi V3
List, Please find a new version of the patch to fix the iSCSI crash when ioctl with iovector is sent. Updated to fix the commit message as per lerseks suggestion. Also added an explicit cast to suppress a compiler warning when we dont have iovector support available.
Re: [Qemu-devel] [PATCH] RFC kvm irqfd: add directly mapped MSI IRQ support
On Thu, Jun 20, 2013 at 11:46 PM, Alex Williamson
wrote:
> On Fri, 2013-06-21 at 12:49 +1000, Alexey Kardashevskiy wrote:
>> On 06/21/2013 12:34 PM, Alex Williamson wrote:
>>
>>
>> Do not follow you, sorry. For x86, is it that MSI routing table which is
>> updated via KVM_SET_GSI_ROUTING in KVM? When there is no KVM, what piece of
>> code responds on msi_notify() in qemu-x86 and does qemu_irq_pulse()?
>
> vfio_msi_interrupt->msi[x]_notify->stl_le_phys(msg.address, msg.data)
>
> This writes directly to the interrupt block on the vCPU. With KVM, the
> in-kernel APIC does the same write, where the pin to MSIMessage is setup
> by kvm_irqchip_add_msi_route and the pin is pulled by an irqfd.
What is this "interrupt block on the vCPU" you speak of? I reviewed
the SDM and see nothing in the APIC protocol or the brief description
of MSI as a PCI concept that would indicate anything except that the
PHB handles MSI writes and feeds them to the I/O APIC.
In fact, the wikipedia article on MSI has:
"A common misconception with Message Signaled Interrupts is that they
allow the device to send data to a processor as part of the interrupt.
The data that is sent as part of the write is used by the chipset to
determine which interrupt to trigger on which processor; it is not
available for the device to communicate additional information to the
interrupt handler."
> Do I understand that on POWER the MSI from the device is intercepted at
> the PHB and converted to an IRQ that's triggered by some means other
> than a MSI write?
This is exactly the same thing that happens on x86, no? Can you point
me to something in the SDM that says otherwise?
Regards,
Anthony Liguori
> So to correctly model the hardware, vfio should do a
> msi_notify() that does a stl_le_phys that terminates at this IRQ
> remapper thing and in turn toggles a qemu_irq. MSIMessage is only
> extraneous data if you want to skip over hardware blocks.
>
> Maybe you could add a device parameter to kvm_irqchip_add_msi_route so
> that it can be implemented on POWER without this pci_bus_map_msi
> interface that seems very unique to POWER. Thanks,
>
> Alex
>
>> ---
>> hw/misc/vfio.c | 11 +--
>> hw/pci/pci.c | 13 +
>> hw/ppc/spapr_pci.c | 13 +
>> hw/virtio/virtio-pci.c | 26 --
>> include/hw/pci/pci.h |4
>> include/hw/pci/pci_bus.h |1 +
>> 6 files changed, 60 insertions(+), 8 deletions(-)
>>
>> diff --git a/hw/misc/vfio.c b/hw/misc/vfio.c
>> index 14aac04..2d9eef7 100644
>> --- a/hw/misc/vfio.c
>> +++ b/hw/misc/vfio.c
>> @@ -639,7 +639,11 @@ static int vfio_msix_vector_do_use(PCIDevice
>> *pdev, unsigned int nr,
>> * Attempt to enable route through KVM irqchip,
>> * default to userspace handling if unavailable.
>> */
>> -vector->virq = msg ? kvm_irqchip_add_msi_route(kvm_state, *msg) :
>> -1;
>> +
>> +vector->virq = msg ? pci_bus_map_msi(vdev->pdev.bus, *msg) : -1;
>> +if (vector->virq < 0) {
>> +vector->virq = msg ? kvm_irqchip_add_msi_route(kvm_state,
>> *msg) : -1;
>> +}
>> if (vector->virq < 0 ||
>> kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,
>> vector->virq) < 0) {
>> @@ -807,7 +811,10 @@ retry:
>> * Attempt to enable route through KVM irqchip,
>> * default to userspace handling if unavailable.
>> */
>> -vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
>> +vector->virq = pci_bus_map_msi(vdev->pdev.bus, msg);
>> +if (vector->virq < 0) {
>> +vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
>> +}
>> if (vector->virq < 0 ||
>> kvm_irqchip_add_irqfd_notifier(kvm_state,
>> &vector->interrupt,
>> vector->virq) < 0) {
>> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
>> index a976e46..a9875e9 100644
>> --- a/hw/pci/pci.c
>> +++ b/hw/pci/pci.c
>> @@ -1254,6 +1254,19 @@ void
>> pci_device_set_intx_routing_notifier(PCIDevice *dev,
>> dev->intx_routing_notifier = notifier;
>> }
>>
>> +void pci_bus_set_map_msi_fn(PCIBus *bus, pci_map_msi_fn map_msi_fn)
>> +{
>> +bus->map_msi = map_msi_fn;
>> +}
>> +
>> +int pci_bus_map_msi(PCIBus *bus, MSIMessage msg)
>> +{
>> +if (bus->map_msi) {
>> +return bus->map_msi(bus, msg);
>> +}
>> +return -1;
>> +}
>> +
>> /*
>> * PCI-to-PCI bridge specification
>> * 9.1: Interrupt routing. Table 9-1
>> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
>> index 80408c9..9ef9a29 1006
Re: [Qemu-devel] [PATCH] RFC kvm irqfd: add directly mapped MSI IRQ support
On Sun, Jun 23, 2013 at 9:07 AM, Michael S. Tsirkin wrote: > On Fri, Jun 21, 2013 at 09:51:20AM +1000, Alexey Kardashevskiy wrote: >> And kvm_irqchip_add_msi_route does not have any link to a device or a bus >> so I'll have to walk through all PHBs in system and see if PHB's MSI window >> is the one from MSIMessage and convert MSIMessage to virq. Pretty easy and >> quick but still dirty hack, would it be better? > > Yes I think that's fine really. > > Basically devices all speak MSIMessage as they should - > this is what the PCI spec says. > On all normal systems guests also speak MSIMessage so > the API which uses these makes sense for kvm. There is no difference between Power and x86 in how they handle MSI. MSI is not a concept in the APIC or processor. MSI interrupts are handled by the PHB and delivered through the I/O APIC using the information in the address/data. I've always assumed that the kernel knows about MSI just because PCI passthrough needs it for whatever reason. It's not part of the APIC complex and it is weird to have MSI decoding information in the kernel. > Except, ppc architecture in its wisdom decided to hide this > in firmware. QEMU does not have firmware so the translation > has to be maintained in QEMU powerpc code. To be clear: instead of writing to an address with a load/store, Power has a hypercall to do this. The hypercall is hidden behind a firmware abstract layer (RTAS) but it's still just a hypercall. It uses a hypercall simply because Power was designed to not require MMIO trapping. It's much like Xen PV in that regard. It doesn't make a lot of sense to have Power do MSI decoding in userspace while x86 does it in the kernel. I assume the kernel doesn't have enough information to do the translation on Power? Regards, Anthony Liguori > -- > MST >
Re: [Qemu-devel] [PATCH] RFC kvm irqfd: add directly mapped MSI IRQ support
On Fri, Jun 21, 2013 at 09:51:20AM +1000, Alexey Kardashevskiy wrote: > And kvm_irqchip_add_msi_route does not have any link to a device or a bus > so I'll have to walk through all PHBs in system and see if PHB's MSI window > is the one from MSIMessage and convert MSIMessage to virq. Pretty easy and > quick but still dirty hack, would it be better? Yes I think that's fine really. Basically devices all speak MSIMessage as they should - this is what the PCI spec says. On all normal systems guests also speak MSIMessage so the API which uses these makes sense for kvm. Except, ppc architecture in its wisdom decided to hide this in firmware. QEMU does not have firmware so the translation has to be maintained in QEMU powerpc code. -- MST
Re: [Qemu-devel] [PULL 00/21] pci,net,misc enhancements
On Fri, Jun 21, 2013 at 08:10:15AM -0500, Anthony Liguori wrote: > "Michael S. Tsirkin" writes: > > > From: Michael S. Tsirkin > > > > The following changes since commit 90a2541b763b31d2b551b07e24aae3de5266d31b: > > > > target-i386: fix over 80 chars warnings (2013-06-15 17:50:38 +) > > > > are available in the git repository at: > > > > git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_anthony > > > > for you to fetch changes up to f96c30047009f8a9c3cecf68104d8d99f989f54d: > > > > pci: Fold host_buses list into PCIHostState functionality > > (2013-06-19 18:35:05 +0300) > > SEGV's during pretty much any test I try to run during startup: > > Core was generated by > `/home/aliguori/build/qemu/x86_64-softmmu/qemu-system-x86_64 -kernel > /usr/local/'. > Program terminated with signal 11, Segmentation fault. > #0 qemu_get_queue (nic=0x0) at /home/aliguori/git/qemu/net/net.c:263 It's caused by the rx filter patch, sorry about not catching it. I've fixed it up but will send a pull request without it, so it can get a bit more testing. -- MST
[Qemu-devel] porting peter-bochs to qemu
Hi I am porting peter-bochs debugger to qemu. I am stuck into the breakpoint->continue part. Anybody want to give a help to finish the debugger stub? https://www.dropbox.com/s/aidxcm9l1vnia1b/GKD.png https://www.dropbox.com/s/76a778f1a76ga7v/LibGKD.png?m Thanksfrom Peter
Re: [Qemu-devel] [PATCH] Fix iSCSI crash on SG_IO with an iovector
On 06/22/13 03:37, Ronnie Sahlberg wrote:
> Don't assume that SG_IO is always invoked with a simple buffer,
> check the iovec_count and if it is > 1 then we need to pass an array
> of iovectors to libiscsi instead of just a plain buffer.
>
> Signed-off-by: Ronnie Sahlberg
> ---
> block/iscsi.c | 56 +---
> 1 files changed, 49 insertions(+), 7 deletions(-)
Looks okay to me, but of course I'm not too familiar with this code.
You (or the maintainer with jurisdiction) might want to change the
commit message:
- check the iovec_count and if it is > 1 then we need to pass an array
+ check the iovec_count and if it is >= 1 then we need to pass an array
But I won't insist on a repost naturally!
I assume you tested the code for both definednesses of
LIBISCSI_FEATURE_IOVECTOR.
Reviewed-by: Laszlo Ersek
Thanks
Laszlo
>
> diff --git a/block/iscsi.c b/block/iscsi.c
> index 0bbf0b1..cbe2e8f 100644
> --- a/block/iscsi.c
> +++ b/block/iscsi.c
> @@ -651,6 +651,9 @@ iscsi_aio_ioctl_cb(struct iscsi_context *iscsi, int
> status,
> {
> IscsiAIOCB *acb = opaque;
>
> +g_free(acb->buf);
> +acb->buf = NULL;
> +
> if (acb->canceled != 0) {
> return;
> }
> @@ -727,14 +730,36 @@ static BlockDriverAIOCB
> *iscsi_aio_ioctl(BlockDriverState *bs,
> memcpy(&acb->task->cdb[0], acb->ioh->cmdp, acb->ioh->cmd_len);
> acb->task->expxferlen = acb->ioh->dxfer_len;
>
> +data.size = 0;
> if (acb->task->xfer_dir == SCSI_XFER_WRITE) {
> -data.data = acb->ioh->dxferp;
> -data.size = acb->ioh->dxfer_len;
> +if (acb->ioh->iovec_count == 0) {
> +data.data = acb->ioh->dxferp;
> +data.size = acb->ioh->dxfer_len;
> +} else {
> +#if defined(LIBISCSI_FEATURE_IOVECTOR)
> + scsi_task_set_iov_out(acb->task,
> + (struct scsi_iovec *) acb->ioh->dxferp,
> + acb->ioh->iovec_count);
> + #else
> +int i;
> +char *buf;
> +struct scsi_iovec *iov = (struct scsi_iovec *)acb->ioh->dxferp;
> +
> +acb->buf = g_malloc(acb->ioh->dxfer_len);
> +buf = acb->buf;
> +for (i = 0; i < acb->ioh->iovec_count; i++) {
> +memcpy(buf, iov[i].iov_base, iov[i].iov_len);
> +buf += iov[i].iov_len;
> +}
> +data.data = acb->buf;
> +data.size = acb->ioh->dxfer_len;
> +#endif
> +}
> }
> +
> if (iscsi_scsi_command_async(iscsi, iscsilun->lun, acb->task,
> iscsi_aio_ioctl_cb,
> - (acb->task->xfer_dir == SCSI_XFER_WRITE) ?
> - &data : NULL,
> + (data.size > 0) ? &data : NULL,
> acb) != 0) {
> scsi_free_scsi_task(acb->task);
> qemu_aio_release(acb);
> @@ -743,9 +768,26 @@ static BlockDriverAIOCB
> *iscsi_aio_ioctl(BlockDriverState *bs,
>
> /* tell libiscsi to read straight into the buffer we got from ioctl */
> if (acb->task->xfer_dir == SCSI_XFER_READ) {
> -scsi_task_add_data_in_buffer(acb->task,
> - acb->ioh->dxfer_len,
> - acb->ioh->dxferp);
> +if (acb->ioh->iovec_count == 0) {
> +scsi_task_add_data_in_buffer(acb->task,
> + acb->ioh->dxfer_len,
> + acb->ioh->dxferp);
> +} else {
> +#if defined(LIBISCSI_FEATURE_IOVECTOR)
> +scsi_task_set_iov_in(acb->task,
> + (struct scsi_iovec *) acb->ioh->dxferp,
> + acb->ioh->iovec_count);
> +#else
> +int i;
> +for (i = 0; i < acb->ioh->iovec_count; i++) {
> +struct scsi_iovec *iov = (struct scsi_iovec
> *)acb->ioh->dxferp;
> +
> +scsi_task_add_data_in_buffer(acb->task,
> +iov[i].iov_len,
> +iov[i].iov_base);
> +}
> +#endif
> +}
> }
>
> iscsi_set_events(iscsilun);
>
