Re: [Qemu-devel] [PATCH]virtio: virtqueue_get_avail_bytes: fix desc_pa when loop over the indirect descriptor table
On Thu, Aug 22, 2013 at 02:47:16PM +0800, yinyin wrote:
> virtqueue_get_avail_bytes: when found a indirect desc, we need loop over it.
>/* loop over the indirect descriptor table */
>indirect = 1;
>max = vring_desc_len(desc_pa, i) / sizeof(VRingDesc);
>num_bufs = i = 0;
>desc_pa = vring_desc_addr(desc_pa, i);
> But, It init i to 0, then use i to update desc_pa. so we will always get:
> desc_pa = vring_desc_addr(desc_pa, 0);
> the last two line should swap.
>
> Signed-off-by: Yin Yin
Applied, thanks everyone
> ---
> hw/virtio/virtio.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
> index f03c45d..2f1e73b 100644
> --- a/hw/virtio/virtio.c
> +++ b/hw/virtio/virtio.c
> @@ -377,8 +377,8 @@ void virtqueue_get_avail_bytes(VirtQueue *vq, unsigned
> int *in_bytes,
> /* loop over the indirect descriptor table */
> indirect = 1;
> max = vring_desc_len(desc_pa, i) / sizeof(VRingDesc);
> -num_bufs = i = 0;
> desc_pa = vring_desc_addr(desc_pa, i);
> +num_bufs = i = 0;
> }
>
> do {
> --
> 1.7.12.4 (Apple Git-37)
Re: [Qemu-devel] [PATCH v3] usb/dev-hid: Modified usb-tablet category from Misc to Input
On Thu, Aug 22, 2013 at 04:44:11PM +0300, Marcel Apfelbaum wrote:
> usb-tablet device was wrongly assigned to Misc category
>
> Reported-by: Markus Armbruster
> Signed-off-by: Marcel Apfelbaum
> Reviewed-by: Andreas Färber
Reviewed-by: Michael S. Tsirkin
> ---
> Changes from v2:
> - Corrected spelling
> Changes from v1:
> - Add cc to qemu-stable and Gerd Hoffmann
> - Changed subject prefix from hw to usb/dev-hid
>
> hw/usb/dev-hid.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/usb/dev-hid.c b/hw/usb/dev-hid.c
> index 66c6331..5956720 100644
> --- a/hw/usb/dev-hid.c
> +++ b/hw/usb/dev-hid.c
> @@ -658,7 +658,7 @@ static void usb_tablet_class_initfn(ObjectClass *klass,
> void *data)
> uc->product_desc = "QEMU USB Tablet";
> dc->vmsd = &vmstate_usb_ptr;
> dc->props = usb_tablet_properties;
> -set_bit(DEVICE_CATEGORY_MISC, dc->categories);
> +set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
> }
>
> static const TypeInfo usb_tablet_info = {
> --
> 1.8.3.1
[Qemu-devel] [Bug 1209180] Re: hw/usb/core.c:415: usb_handle_packet: Assertion `p->ep->type != 3 || (dev->flags & (1 << USB_DEV_FLAG_IS_HOST))' failed
** Changed in: qemu
Status: Fix Committed => Fix Released
--
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https://bugs.launchpad.net/bugs/1209180
Title:
hw/usb/core.c:415: usb_handle_packet: Assertion `p->ep->type != 3 ||
(dev->flags & (1 << USB_DEV_FLAG_IS_HOST))' failed
Status in QEMU:
Fix Released
Bug description:
After the patch at http://lists.nongnu.org/archive/html/qemu-
devel/2013-05/msg01567.html, I cannot get my Logitech Unifying USB
receiver passed to the guest anymore.
Minimal reproduction command:
qemu-system-x86_64 -usbdevice host:046d:c52b
Debug patch:
diff --git a/hw/usb/core.c b/hw/usb/core.c
index 05948ca..20753cc 100644
--- a/hw/usb/core.c
+++ b/hw/usb/core.c
@@ -409,6 +409,8 @@ void usb_handle_packet(USBDevice *dev, USBPacket *p)
/* hcd drivers cannot handle async for isoc */
assert(p->ep->type != USB_ENDPOINT_XFER_ISOC);
/* using async for interrupt packets breaks migration */
+ printf("type=%x %x %x %p %p\n", p->ep->type,
+ dev->flags, p->ep->dev->flags, dev, p->ep->dev);
assert(p->ep->type != USB_ENDPOINT_XFER_INT ||
(dev->flags & (1 << USB_DEV_FLAG_IS_HOST)));
usb_packet_set_state(p, USB_PACKET_ASYNC);
yields:
type=0 1 1 0x565de4c0 0x565de4c0
type=0 1 1 0x565de4c0 0x565de4c0
type=0 1 1 0x565de4c0 0x565de4c0
type=0 1 1 0x565de4c0 0x565de4c0
type=0 1 1 0x565de4c0 0x565de4c0
type=3 1 1 0x565de4c0 0x565de4c0
qemu-system-x86_64: hw/usb/core.c:415: usb_handle_packet: Assertion
`p->ep->type != 3 || (dev->flags & (1 << USB_DEV_FLAG_IS_HOST))' failed.
Program received signal SIGABRT, Aborted.
0x710c61c9 in raise () from /usr/lib/libc.so.6
(gdb) bt
#0 0x710c61c9 in raise () from /usr/lib/libc.so.6
#1 0x710c75c8 in abort () from /usr/lib/libc.so.6
#2 0x710bf356 in __assert_fail_base () from /usr/lib/libc.so.6
#3 0x710bf402 in __assert_fail () from /usr/lib/libc.so.6
#4 0x556e4b38 in usb_handle_packet (dev=,
p=p@entry=0x565da610) at hw/usb/core.c:414
#5 0x556f93ef in uhci_handle_td (s=s@entry=0x565ce5d0,
q=0x566a9dc0, q@entry=0x0, qh_addr=qh_addr@entry=980834,
td=td@entry=0x7fffdd30, td_addr=,
int_mask=int_mask@entry=0x7fffdd1c)
at hw/usb/hcd-uhci.c:904
#6 0x556f9949 in uhci_process_frame (s=s@entry=0x565ce5d0) at
hw/usb/hcd-uhci.c:1084
#7 0x556f9c35 in uhci_frame_timer (opaque=0x565ce5d0) at
hw/usb/hcd-uhci.c:1183
#8 0x5573e086 in qemu_run_timers (clock=0x5654e200) at
qemu-timer.c:394
#9 0x5573e325 in qemu_run_timers (clock=) at
qemu-timer.c:459
#10 qemu_run_all_timers () at qemu-timer.c:452
#11 0x55711bee in main_loop_wait (nonblocking=) at
main-loop.c:470
#12 0x555e0161 in main_loop () at vl.c:2029
#13 main (argc=, argv=, envp=)
at vl.c:4419
Looking around, I see that host-bsd.c and host-linux.c both set
USB_DEV_FLAG_IS_HOST, but host-libusbx.c doesn't do that.
Affected QEMU versions: 1.5.1, 1.5.2
Not affected: 1.5.0
libusb version: 1.0.16
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1209180/+subscriptions
[Qemu-devel] [PATCH v3] target-i386: Fix segment cache dump
When in Long Mode, cpu_x86_seg_cache() logs "DS16" because the Default
operation size bit (D/B bit) is not set for Long Mode Data Segments since
there are only Data Segments in Long Mode and no explicit 16/32/64-bit
Descriptors.
This patch fixes this by checking the Long Mode Active bit of the hidden
flags variable and logging "DS" if it is set. (I.e. in Long Mode all Data
Segments are logged as "DS")
Signed-off-by: Tobias Markus
---
v3: * Manually Break Lines
* Again change line wrapping as suggested by Eric Blake
v2: * Fix line wrapping as suggested in IRC
* Break the line
Note that alternatively, Data Segments in Long Mode could be logged as "DS64"
to avoid confusion about the missing 64 postfix. (But that would be, strictly
speaking, wrong because there are only DSs and no DS16/32/64 in Long Mode.)
PS: This is my first contribution to an Open Source Project and I would be very
happy about constructive feedback, especially about possible wrong line
wrapping.
target-i386/helper.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target-i386/helper.c b/target-i386/helper.c
index bf3e2ac..0edb93b 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -147,7 +147,9 @@ cpu_x86_dump_seg_cache(CPUX86State *env, FILE *f,
fprintf_function cpu_fprintf,
cpu_fprintf(f, " [%c%c", (sc->flags & DESC_C_MASK) ? 'C' : '-',
(sc->flags & DESC_R_MASK) ? 'R' : '-');
} else {
-cpu_fprintf(f, (sc->flags & DESC_B_MASK) ? "DS " : "DS16");
+cpu_fprintf(f,
+(sc->flags & DESC_B_MASK || env->hflags & HF_LMA_MASK)
+? "DS " : "DS16");
cpu_fprintf(f, " [%c%c", (sc->flags & DESC_E_MASK) ? 'E' : '-',
(sc->flags & DESC_W_MASK) ? 'W' : '-');
}
--
1.8.4
Re: [Qemu-devel] [PATCH v4] usb/dev-hid: Modified usb-tablet category from Misc to Input
On Thu, Aug 22, 2013 at 08:11:36PM +0300, Marcel Apfelbaum wrote:
> usb-tablet device was wrongly assigned to Misc category
>
> Reported-by: Markus Armbruster
> Cc: qemu-sta...@nongnu.org
> Signed-off-by: Marcel Apfelbaum
> Reviewed-by: Andreas Färber
Reviewed-by: Michael S. Tsirkin
> ---
> Changes from v3:
> - Added "Cc: qemu-sta...@nongnu.org" this time in the sign-off area ...
> Changes from v2:
> - Corrected spelling
> Changes from v1:
> - Add cc to qemu-stable and Gerd Hoffmann
> - Changed subject prefix from hw to usb/dev-hid
>
> hw/usb/dev-hid.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/usb/dev-hid.c b/hw/usb/dev-hid.c
> index 66c6331..5956720 100644
> --- a/hw/usb/dev-hid.c
> +++ b/hw/usb/dev-hid.c
> @@ -658,7 +658,7 @@ static void usb_tablet_class_initfn(ObjectClass *klass,
> void *data)
> uc->product_desc = "QEMU USB Tablet";
> dc->vmsd = &vmstate_usb_ptr;
> dc->props = usb_tablet_properties;
> -set_bit(DEVICE_CATEGORY_MISC, dc->categories);
> +set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
> }
>
> static const TypeInfo usb_tablet_info = {
> --
> 1.8.3.1
Re: [Qemu-devel] [PATCH 3/3] pvpanic: rename to isa-pvpanic
On Thu, Aug 22, 2013 at 11:50:43AM -0500, Anthony Liguori wrote: > Laszlo Ersek writes: > > > On 08/21/13 19:06, Paolo Bonzini wrote: > >> Il 21/08/2013 19:07, Michael S. Tsirkin ha scritto: > > > >>> NACK > >> > >> You know that a single developer's NACK counts nothing (it can be you, > >> it can be me), don't you? > > > > going meta... > > > > What's this? > > > > All I know (... I think I know) about patch acceptance is that Anthony > > prefers to have at least one R-b. As far as I've seen this is not a hard > > requirement (for example, maintainers sometimes send unreviewed patches > > in a pull request, and on occasion they are merged). > > I look very poorly on anyone nacking anything. I value constructive > feedback. > Nacking does not add any value to the conversation. I admire the fact > that we've been able to maintain a very high level of conversation over > the years on qemu-devel and throwing around nacks just lowers the > overall tone. In that case, what's a good way to clarify that one is opposed to the idea, not the implementation? We have Acked-by: versus Reviewed-by: on the positive side, and I was looking for something like this on the negative side. > > If you can't think of anything better to say than NACK, don't even > bother sending the email in the first place. I did add motivation too, it was snipped in the response. > Regards, > > Anthony Liguori > > > > > No words have been spent on NAKs yet (... since my subscription, that > > is). Is this stuff formalized somewhere? > > > > Sorry for wasting time... > > > > Thanks, > > Laszlo
Re: [Qemu-devel] [PATCH 3/3] pvpanic: rename to isa-pvpanic
On Thu, Aug 22, 2013 at 02:41:51PM +0200, Paolo Bonzini wrote: > Il 22/08/2013 14:43, Laszlo Ersek ha scritto: > > On 08/21/13 19:06, Paolo Bonzini wrote: > >> Il 21/08/2013 19:07, Michael S. Tsirkin ha scritto: > > > >>> NACK > >> > >> You know that a single developer's NACK counts nothing (it can be you, > >> it can be me), don't you? > > > > going meta... > > > > What's this? > > > > All I know (... I think I know) about patch acceptance is that Anthony > > prefers to have at least one R-b. As far as I've seen this is not a hard > > requirement (for example, maintainers sometimes send unreviewed patches > > in a pull request, and on occasion they are merged). > > > > No words have been spent on NAKs yet (... since my subscription, that > > is). Is this stuff formalized somewhere? > > > > Sorry for wasting time... > > No, it's not. But for example I NACKed removal of pvpanic from 1.6, it > was overridden, and I didn't complain too much. > > Paolo I don't think it was overridden. In fact you NACKed an explicit -device pvpanic. You suggested disabling in 1.6 but keeping it a builtin, but this was never implemented, afterwards issues with Linux guests surfaced, we discussed this again on the KVM call, and there seemed to be a concensus that it's an OK patch, with some issues. A week later Marcel sent v2, it worked and looked like the least problematic path to take. -- MST
Re: [Qemu-devel] [PATCH v4 0/6] Clean up bogus default boot order
On Fri, Aug 23, 2013 at 02:31:49PM +0200, Markus Armbruster wrote: > "Michael S. Tsirkin" writes: > > > On Fri, Aug 16, 2013 at 01:13:44PM +0200, arm...@redhat.com wrote: > >> From: Markus Armbruster > >> > >> The first five patches are admittedly related to the stated purpose of > >> this series pretty much only by "I can't stand perpetuating this > >> stupid crap". Max Filippov and Peter Maydell already cleaned up > >> Xtensa and ARM the same way. > > > > I picked up patches 3,4 and 5 on my tree. > > 1 and 2 were rebased by Eduardo, I'm taking them > > from his patchset. > > 6 needs to be rebased and comments addressed. > > Applies fine with "git-am -3". Pushed to > http://repo.or.cz/w/qemu/armbru.git/shortlog/refs/heads/boot-order > for your convenience. > > We discussed the patch at some length, but it's not 100% clear to me > what exactly you'd like me to address and how. So let's recap briefly. > > I think your main point was that PC machine type declarations are a bit > repetitive. They all share two lines: > > .max_cpus = 255, > DEFAULT_MACHINE_OPTIONS, > > where DEFAULT_MACHINE_OPTIONS is defined as > > #define DEFAULT_MACHINE_OPTIONS \ > .boot_order = "cad" > > Many of them also share one of these lines: > > .desc = "Standard PC (Q35 + ICH9, 2009)", > .desc = "Standard PC (i440FX + PIIX, 1996)", > .desc = "Standard PC", > > My patch touches only the shared DEFAULT_MACHINE_OPTIONS line. It > becomes > >.boot_order = "cad" > > Commit message explains why: > > We set default boot order "cad" in every single machine definition > except "pseries" and "moxiesim", even though very few boards actually > care for boot order, and "cad" makes sense for even fewer. > > Machines that care: > > * pc and its variants > > Accept up to three letters 'a', 'b' (undocumented alias for 'a'), > 'c', 'd' and 'n'. Reject all others (fatal with -boot). > > [...] > > Strip characters these machines ignore from their default boot order. > > For all other machines, remove the unused default boot order > alltogether. > > The change is systematic: if the machine uses .boot_order, strip the > characters it ignores from its initial value, else drop the initializer, > so .boot_order remains null. > > I don't want to squash further cleanup into this one, because it's hard > enough to review as it is (and it already got competent review). I > could be persuaded to do further cleanup on top, but you need to tell me > what cleanup you want. Probably faster if you do it yourself :) Responded in the relevant thread. Hope this helps. -- MST
Re: [Qemu-devel] [PATCH v3 6/6] hw: Clean up bogus default boot order
On Thu, Aug 22, 2013 at 01:24:50PM +0200, Markus Armbruster wrote:
> "Michael S. Tsirkin" writes:
>
> > On Thu, Aug 22, 2013 at 10:39:34AM +0200, Markus Armbruster wrote:
> >> "Michael S. Tsirkin" writes:
> >>
> >> > On Wed, Aug 21, 2013 at 06:01:45PM +0200, Markus Armbruster wrote:
> >> >> "Michael S. Tsirkin" writes:
> >> >>
> >> >> > On Wed, Aug 21, 2013 at 05:10:56PM +0200, Markus Armbruster wrote:
> >> >> >> "Michael S. Tsirkin" writes:
> >> >> >>
> >> >> >> > On Mon, Jul 22, 2013 at 01:38:47PM +0200, Markus Armbruster wrote:
> >> >> >> >> We set default boot order "cad" in every single machine definition
> >> >> >> >> except "pseries" and "moxiesim", even though very few boards
> >> >> >> >> actually
> >> >> >> >> care for boot order, and "cad" makes sense for even fewer.
> >> >> >> >>
> >> >> >> >> Machines that care:
> >> >> >> >>
> >> >> >> >> * pc and its variants
> >> >> >> >>
> >> >> >> >> Accept up to three letters 'a', 'b' (undocumented alias for
> >> >> >> >> 'a'),
> >> >> >> >> 'c', 'd' and 'n'. Reject all others (fatal with -boot).
> >> >> >> >>
> >> >> >> >> * nseries (n800, n810)
> >> >> >> >>
> >> >> >> >> Check whether order starts with 'n'. Silently ignored
> >> >> >> >> otherwise.
> >> >> >> >>
> >> >> >> >> * prep, g3beige, mac99
> >> >> >> >>
> >> >> >> >> Extract the first character the machine understands (subset of
> >> >> >> >> 'a'..'f'). Silently ignored otherwise.
> >> >> >> >>
> >> >> >> >> * spapr
> >> >> >> >>
> >> >> >> >> Accept an arbitrary string (vl.c restricts it to contain only
> >> >> >> >> 'a'..'p', no duplicates).
> >> >> >> >>
> >> >> >> >> * sun4[mdc]
> >> >> >> >>
> >> >> >> >> Use the first character. Silently ignored otherwise.
> >> >> >> >>
> >> >> >> >> Strip characters these machines ignore from their default boot
> >> >> >> >> order.
> >> >> >> >>
> >> >> >> >> For all other machines, remove the unused default boot order
> >> >> >> >> alltogether.
> >> >> >> >>
> >> >> >> >> Note that my rename of QEMUMachine member boot_order to
> >> >> >> >> default_boot_order and QEMUMachineInitArgs member boot_device to
> >> >> >> >> boot_order has a welcome side effect: it makes every use of boot
> >> >> >> >> orders visible in this patch, for easy review.
> >> >> >> >>
> >> >> >> >> Signed-off-by: Markus Armbruster
> >> >> >> >> ---
> >> >> >> [...]
> >> >> >> >> diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
> >> >> >> >> index 9327ac1..3700bd5 100644
> >> >> >> >> --- a/hw/i386/pc_piix.c
> >> >> >> >> +++ b/hw/i386/pc_piix.c
> >> >> >> >> @@ -216,7 +216,7 @@ static void pc_init1(QEMUMachineInitArgs
> >> >> >> >> *args,
> >> >> >> >> }
> >> >> >> >> }
> >> >> >> >>
> >> >> >> >> -pc_cmos_init(below_4g_mem_size, above_4g_mem_size,
> >> >> >> >> args->boot_device,
> >> >> >> >> +pc_cmos_init(below_4g_mem_size, above_4g_mem_size,
> >> >> >> >> args->boot_order,
> >> >> >> >> floppy, idebus[0], idebus[1], rtc_state);
> >> >> >> >>
> >> >> >> >> if (pci_enabled && usb_enabled(false)) {
> >> >> >> >> @@ -324,7 +324,7 @@ static QEMUMachine pc_i440fx_machine_v1_6 = {
> >> >> >> >> .hot_add_cpu = pc_hot_add_cpu,
> >> >> >> >> .max_cpus = 255,
> >> >> >> >> .is_default = 1,
> >> >> >> >> -DEFAULT_MACHINE_OPTIONS,
> >> >> >> >> +.default_boot_order = "cad",
> >> >> >> >> };
> >> >> >> >>
> >> >> >> >> static QEMUMachine pc_i440fx_machine_v1_5 = {
> >> >> >> >> @@ -337,7 +337,7 @@ static QEMUMachine pc_i440fx_machine_v1_5 = {
> >> >> >> >> PC_COMPAT_1_5,
> >> >> >> >> { /* end of list */ }
> >> >> >> >> },
> >> >> >> >> -DEFAULT_MACHINE_OPTIONS,
> >> >> >> >> +.default_boot_order = "cad",
> >> >> >> >> };
> >> >> >> >>
> >> >> >> >> static QEMUMachine pc_i440fx_machine_v1_4 = {
> >> >> >> >
> >> >> >> > So all PC machine types share this?
> >> >> >>
> >> >> >> Correct, just like they share DEFAULT_MACHINE_OPTIONS before my
> >> >> >> patch.
> >> >> >> Which is defined as
> >> >> >>
> >> >> >> #define DEFAULT_MACHINE_OPTIONS \
> >> >> >> .boot_order = "cad"
> >> >> >>
> >> >> >> I.e. my patch merely peels off a layer of obfuscation :)
> >> >> >
> >> >> > Using a macro in multiple places, instead of a hard-coded constant is
> >> >> > not obfuscation.
> >> >> >
> >> >> >> > Can we set this in some common code, somehow?
> >> >> >>
> >> >> >> We don't have an inheritance notion for machine types.
> >> >> >>
> >> >> >> vl.c uses machine->boot_order before calling one of its methods, so
> >> >> >> monkey-patching .boot_order from a method won't do. Besides, that
> >> >> >> cure
> >> >> >> looks much worse than the disease to me.
> >> >> >>
> >> >> >> Can't think of anything else offhand.
> >> >> >>
> >> >> >> [...]
> >> >> >
> >> >> > Set this in pc_init_pci somehow?
> >> >>
> >> >> Too late, see "vl.c uses..." above.
> >> >
> >> > Ah, missed it.
> >> > Can we fix that?
> >>
> >> If I understand
Re: [Qemu-devel] [RFC PATCH] Introduce RCU-enabled DQs (v2)
Paolo Bonzini writes:
> Just a couple of questions, one of them on the new macro...
>
>> +/* prior to publication of the elm->prev->next value, some list
>> + * readers may still see the removed element when following
>> + * the antecedent's next pointer.
>> + */
>> +
>> +#define QLIST_REMOVE_RCU(elm, field) do { \
>> +if ((elm)->field.le_next != NULL) { \
>> + (elm)->field.le_next->field.le_prev =\
>> +(elm)->field.le_prev; \
>> +} \
>> +atomic_rcu_set((elm)->field.le_prev, (elm)->field.le_next); \
>> +} while (/*CONSTCOND*/0)
>
> Why is the barrier needed here, but not in Linux's list_del_rcu?
>
> I think it is not needed because all involved elements have already been
> published and just have their pointers shuffled.
I read this as more than shuffling pointers. The intent here is
that the previous element's next pointer is being updated to omit the
current element from the list.
atomic_set always deferences the pointer passed to it, and
(field)->le_pre is a double pointer. So looking at the macro:
#define atomic_set(ptr, i) ((*(__typeof__(*ptr) *volatile) (ptr)) = (i))
It translates to:
( ( * (__typeof(*elm->field.le_prev) *volatile) (elm)->field.le_prev) =
elm->field.le_next; )
Which is:
*((struct *elm) *volatile)(elm)->field.le_prev = elm->field.le_next;
Which is:
*(elm)->field.le_prev = elm->field.le_next;
Because field.le_prev is a double pointer that has previously been set
to &prev (the address of the previous list element) this is assiging the
*previous* element's next pointer, the way I read it.
The Linux list_del_rcu is dealing with a singly linked list and
therefore does not set a value in the previous node's element.
But I'm still unclear on whether or not the memory barrier is needed
because the deleted element won't be reclaimed right away.
Mike
--
Mike Day | + 1 919 371-8786 | ncm...@ncultra.org
"Endurance is a Virtue"
Re: [Qemu-devel] -cpu host (was Re: KVM call minutes for 2013-08-06)
On Thu, Aug 08, 2013 at 05:55:09PM +0200, Andreas Färber wrote: > Hi Peter, > > Am 08.08.2013 14:51, schrieb Peter Maydell: > > [I missed this KVM call but the stuff about -cpu host ties into > > an issue we've been grappling with for ARM KVM, so it seems > > a reasonable jumping-off-point.] > > > > On 6 August 2013 16:15, Juan Quintela wrote: > >> 2013-08-06 > >> -- > >> > >> What libvirt needs/miss Today? > >> - how to handle machine types? creating them inside qemu? > >> - qemu --cpu help > >> only shows cpus, not what features qemu will use > >> - qemu -cpu host > >> what does this exactly means? kvm removes same flags. > >> - Important to know if migration would work. > >> - Machine types sometimes disable some feature, so cpu alone is not > >> enough. > > > >> - kernel removes some features because it knows it can't be virtualised > >> - qemu adds some others because it knows it don't need host support > >> - and then lots of features in the middle > > > > So, coming at this from an ARM perspective: > > Should any target arch that supports KVM also support "-cpu host"? > > If so, what should it do? > > I think that depends on the target and whether/what is useful. > > > Is there a description somewhere of > > what the x86 and PPC semantics of -cpu host are? > > I'm afraid our usual documentation will be reading the source code. ;) > > x86 was first to implement -cpu host and passed through pretty much all > host features even if they would not work without additional support > code. This is definitely not true. Only features that will work are passsed through. Actually the definition of "-cpu host" for x86 can be: advertise any feature that can be supported on this host/qemu combo. > I've seen a bunch of bugs where that leads to GMP and others > breaking badly. Lately in the case of PMU we've started to limit that. The problem with PMU was that PMU capabilities was passed through even for non "-cpu host". There was no problem with "-cpu host". > Alex proposed -cpu best, which was never merged to date. It was similar > to how ppc's -cpu host works: According to http://wiki.qemu.org/Features/CPUModels#-cpu_host_vs_-cpu_best it should select predefined cpu model closest to host one. Useful, bit not the same as "-cpu host". > > ppc matches the Processor Version Register (PVR) in kvm.c against its > known models from cpu-models.c (strictly today, mask being discussed). > The PVR can be read from userspace via mfpvr alias to mfspr (Move From > Special Purpose Register; possibly emulated for userspace by kernel?). > CPU features are all QEMU-driven AFAIU, through the "CPU families" in > translate_init.c. Beware, everything is highly macro'fied in ppc code. > -- Gleb.
Re: [Qemu-devel] -cpu host (was Re: KVM call minutes for 2013-08-06)
On Fri, Aug 09, 2013 at 02:53:30PM -0300, Eduardo Habkost wrote:
> On Thu, Aug 08, 2013 at 12:29:07PM -0700, Christoffer Dall wrote:
> > On Thu, Aug 08, 2013 at 08:05:11PM +0100, Peter Maydell wrote:
> > > On 8 August 2013 19:39, Christoffer Dall
> > > wrote:
> > > > FWIW, from the kernel point of view I'd much prefer to return "this is
> > > > the type of VCPU that I prefer to emulate" to user space on this current
> > > > host than having QEMU come up with its own suggestion for CPU and asking
> > > > the kernel for it. The reason is that it gives us slightly more freedom
> > > > in how we choose to support a given host SoC in that we can say that we
> > > > at least support core A on core B, so if user space can deal with a
> > > > virtual core A, we should be good.
> > >
> > > Hmm, I'm not sure how useful a "query support" kind of API would
> > > be to QEMU. QEMU is basically going to have two use cases:
> > > (1) "I want an A15" [ie -cpu cortex-a15]
> > > (2) "give me whatever you have and I'll cope" [ie -cpu host]
> > >
> > > so my thought was that we could just have the kernel support
> > > init.target = KVM_ARM_TARGET_HOST;
> > > memset(init.features, 0, sizeof(init.features));
> > > ret = kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
> > >
> > > (in the same way we currently ask for KVM_ARM_TARGET_CORTEX_A15).
> > >
> > > I guess we could have a "return preferred target value"
> > > VM ioctl, but it seems a bit pointless given that the
> > > only thing userspace is going to do with the return
> > > value is immediately feed it back to the kernel...
> > >
> > My thinking was that the result of cpu = KVM_ARM_TARGET_HOST would be
> > the same as x = kvm_get_target_host(), cpu = x, but at the same time
> > letting QEMU know what it's dealing with. Perhaps QEMU doesn't need
> > this for emulation, but isn't it useful for
> > save/restore/migration/debugging scenarios?
>
> FWIW, this is how it works on x86: QEMU calls GET_SUPPORTED_CPUID and
> then uses the result on a SET_CPUID call.
>
> (Well, at least that's the general idea, but the details are a bit more
> complicated than that. e.g.: some features can be enabled only if some
> QEMU options are set as well, like tsc-deadline and x2apic, that require
> the in-kernel irqchip to be enabled.)
>
> Even if you don't really need this 2-step method today, doing this would
> allow QEMU to fiddle with some bits if necessary in the future.
>
Without 2-step method how QEMU ARM knows that it can create cpu type
user asked for? On x86 QEMU queries kernel about what feature can be
supported and then "and" it with requested features (feature can be
requested implicitly, by specifying cpu model name like "Neahalem", or
explicitly, by adding +feature_name on -cpu parameter). -cpu host is
just a by product of this algorithm, it says enables everything that is
supported ("supported & 1" instead of "supported & requested").
--
Gleb.
Re: [Qemu-devel] -cpu host (was Re: KVM call minutes for 2013-08-06)
On Thu, Aug 08, 2013 at 07:20:41PM +0100, Peter Maydell wrote: > >> For ARM you can't get at feature info of the host from userspace > >> (unless you want to get into parsing /proc/cpuinfo), so my current > >> idea is to have KVM_ARM_VCPU_INIT support a target-cpu-type > >> which means "whatever host CPU is". Then when we've created the > >> vcpu we can populate QEMU's idea of what the CPU features are > >> by using the existing ioctls for reading the cp15 registers of > >> the vcpu. > > > > Sounds sane to me iff those cp15 registers all work with KVM and don't > > need any additional KVM/QEMU/device code. > > Yes; KVM won't tell us about CP15 registers unless they > are exposed to the guest VM (that is, we're querying the So why not implement something similar to x86 cpuid thing. Have separate ioctls to query what CP15 registers KVM can support and what is exposed to a guest? > VCPU, not the host CPU). More generally, the cp15 "tuple > list" code I landed a couple of months back makes the kernel > the authoritative source for which cp15 registers exist and > what their values are -- in -enable-kvm mode QEMU no longer > cares about them (its own list of which registers exist for > which CPU is used only for TCG). > -- Gleb.
Re: [Qemu-devel] [RFC 0/2] target-arm: Provide '-cpu host' when running KVM
On Wed, Aug 14, 2013 at 09:28:10PM +0200, Alexander Graf wrote:
>
> On 14.08.2013, at 20:28, Christoffer Dall wrote:
>
> > On Wed, Aug 14, 2013 at 08:21:54PM +0200, Alexander Graf wrote:
> >>
> >> On 14.08.2013, at 20:18, Christoffer Dall wrote:
> >>
> >>> On Wed, Aug 14, 2013 at 07:44:25PM +0200, Alexander Graf wrote:
>
> On 14.08.2013, at 19:39, Christoffer Dall wrote:
>
> > On Wed, Aug 14, 2013 at 07:31:59PM +0200, Alexander Graf wrote:
> >>
> >> On 14.08.2013, at 19:26, Christoffer Dall wrote:
> >>
> >>> On Wed, Aug 14, 2013 at 11:30:46AM +0200, Alexander Graf wrote:
>
> On 14.08.2013, at 11:23, Peter Maydell wrote:
>
> > On 14 August 2013 10:11, Alexander Graf wrote:
> >> You're right, the main difference is that KVM doesn't have any
> >> idea what a "host" style CPU is. It only knows how to report to
> >> QEMU
> >> what the current host CPU would be, so that anything from VCPU_INIT
> >> onwards is 100% identical regardless of whether the user said
> >> -cpu host or -cpu xxx.
> >>
> >> I'm still puzzled on how this will work with BIG.little btw.
> >
> > The rough idea is that for BIG.little the kernel must trap the
> > ID registers at least (so that the vcpu seems consistent to the
> > guest whether it's running on the big or the little core). For
> > "-cpu host" the guest would see whatever is the most low-overhead
> > for the kernel to provide (ie assuming the big and little CPUs
> > are roughly-similar you could make -cpu host provide something
> > that looks to the guest like the big CPU and don't have to trap
> > quite as much as you would for providing a vcpu that wasn't the
> > same as either the big or little one).
>
> So -cpu host in this case wouldn't actually expose the host CPU 1:1,
> but instead a cortex-a15 even when it's run on an a7 BIG.little
> core. I see.
>
> >>> Yes, from the discussion we've had the whole picture just becomes to
> >>> blurry when you start presenting multiple different CPUs to the guest
> >>> and there's really no need to that I'm aware of.
> >>>
> >>> In fact the -cpu host case fits quite nicely with this state of mind;
> >>> the kernel is free to decide based on the specific hardware and config
> >>> on which it's running how to handle VMs on BL.
> >>
> >> So why not have a vm ioctl to fetch the "best match" vcpu type? I
> >> don't like the idea of adding any awareness of a "host" type to the
> >> normal vcpu creation process.
> >>
> >>
> > That's actually what I suggested initially. I'm not really a QEMU
> > expert, but I think Peter already answered this question: he doesn't
> > want to support hundreds of CPU models in QEMU just to be able to run
> > KVM when it's not necessary.
> >
> > If his argument holds in that you can support -cpu host without having a
> > model for that specific cpu in QEMU, then indeed it is a strong
> > argument, and we have the problem with ARMv8 already, and this goes a
> > long way to solve that. No?
>
> That's up for QEMU to decide. With the "fetch and push" model we can
> support both flavors from user space. It also makes the kernel side more
> reproducible and obvious. There's simply no way to add hacks like "If
> I'm a -cpu host type do xxx" in KVM, because KVM never knows that it is
> running -cpu host.
>
> >>> Do we have historical examples of this knowledge being abused inside the
> >>> kernel for other archs? If not, can we come up with a technical
> >>> scenario where it may happen on ARM?
> >>
> >> if (cpu == host_cpu) {
> >> vgic_version = get_host_vgic_version();
> >> }
> >>
> >> would be an example :).
> >
> > Not really, this is driven from user space, but ok.
> >
> >> Everything -cpu host does has to be reproducible without -cpu host,
> >> otherwise our compatibility layering is broken. So why not model the API
> >> like it from the beginning?
> >>
> >>>
> >>> Also, not really sure if such code should be controlled through the user
> >>> space API; ideally we would catch bad coding behavior in the kernel
> >>> during code review.
> >>>
> >>> The only reason I originally suggested the "fetch and push" model was
> >>> that I thought user space would need to know the specific CPU model for
> >>> things to work and possibly for things like debugging and migration, but
> >>> since I have been almost convinced otherwise, I don't see any real
> >>> technical arguments for not adding -cpu host support in the kernel side.
> >>>
> >>> Note that this doesn't prevent us from adding an IOCTL later that gives
> >>> you the host CPU type in KVM terminology if we find it useful. But, I
> >>> think the reduced h
[Qemu-devel] [PATCH 5/9] bswap.h: Remove be32_to_cpupu()
Replace the legacy be32_to_cpupu() with ldl_be_p().
Signed-off-by: Peter Maydell
---
hw/net/e1000.c |2 +-
include/qemu/bswap.h |5 -
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/hw/net/e1000.c b/hw/net/e1000.c
index fdb1f89..f770f08 100644
--- a/hw/net/e1000.c
+++ b/hw/net/e1000.c
@@ -526,7 +526,7 @@ xmit_seg(E1000State *s)
if (tp->tcp) {
sofar = frames * tp->mss;
cpu_to_be32wu((uint32_t *)(tp->data+css+4),// seq
-be32_to_cpupu((uint32_t *)(tp->data+css+4))+sofar);
+ldl_be_p(tp->data+css+4)+sofar);
if (tp->paylen - sofar > tp->mss)
tp->data[css + 13] &= ~9; // PSH, FIN
} else // UDP
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index ac5b2e0..9524931 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -412,11 +412,6 @@ static inline void stfq_be_p(void *ptr, float64 v)
/* Legacy unaligned versions. Note that we never had a complete set. */
-static inline uint32_t be32_to_cpupu(const uint32_t *p)
-{
-return ldl_be_p(p);
-}
-
static inline void cpu_to_be16wu(uint16_t *p, uint16_t v)
{
stw_be_p(p, v);
--
1.7.9.5
[Qemu-devel] [PATCH 1/9] bswap.h: Remove cpu_to_le16wu()
Replace the legacy cpu_to_le16wu() with stw_le_p().
Signed-off-by: Peter Maydell
---
hw/acpi/core.c |4 ++--
include/hw/pci/pci.h |2 +-
include/qemu/bswap.h |5 -
3 files changed, 3 insertions(+), 8 deletions(-)
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index b07feda..e84a577 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -170,8 +170,8 @@ static void acpi_table_install(const char unsigned *blob,
size_t bloblen,
}
/* increase number of tables */
-cpu_to_le16wu((uint16_t *)acpi_tables,
- le16_to_cpupu((uint16_t *)acpi_tables) + 1u);
+stw_le_p(acpi_tables,
+ le16_to_cpupu((uint16_t *)acpi_tables) + 1u);
/* Update the header fields. The strings need not be NUL-terminated. */
changed_fields = 0;
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index ccec2ba..ae82064 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -422,7 +422,7 @@ pci_get_byte(const uint8_t *config)
static inline void
pci_set_word(uint8_t *config, uint16_t val)
{
-cpu_to_le16wu((uint16_t *)config, val);
+stw_le_p(config, val);
}
static inline uint16_t
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index 14a5f65..ada1084 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -412,11 +412,6 @@ static inline void stfq_be_p(void *ptr, float64 v)
/* Legacy unaligned versions. Note that we never had a complete set. */
-static inline void cpu_to_le16wu(uint16_t *p, uint16_t v)
-{
-stw_le_p(p, v);
-}
-
static inline void cpu_to_le32wu(uint32_t *p, uint32_t v)
{
stl_le_p(p, v);
--
1.7.9.5
[Qemu-devel] [PATCH 9/9] bswap.h: Remove cpu_to_32wu()
Replace the legacy cpu_to_32wu() with stl_p().
Signed-off-by: Peter Maydell
---
hw/display/vga_template.h | 14 --
include/qemu/bswap.h |7 ---
2 files changed, 8 insertions(+), 13 deletions(-)
diff --git a/hw/display/vga_template.h b/hw/display/vga_template.h
index f6f6a01..6cfae56 100644
--- a/hw/display/vga_template.h
+++ b/hw/display/vga_template.h
@@ -113,20 +113,22 @@ static void glue(vga_draw_glyph9_, DEPTH)(uint8_t *d, int
linesize,
do {
font_data = font_ptr[0];
#if BPP == 1
-cpu_to_32wu((uint32_t *)d, (dmask16[(font_data >> 4)] & xorcol) ^
bgcol);
+stl_p((uint32_t *)d, (dmask16[(font_data >> 4)] & xorcol) ^ bgcol);
v = (dmask16[(font_data >> 0) & 0xf] & xorcol) ^ bgcol;
-cpu_to_32wu(((uint32_t *)d)+1, v);
+stl_p(((uint32_t *)d)+1, v);
if (dup9)
((uint8_t *)d)[8] = v >> (24 * (1 - BIG));
else
((uint8_t *)d)[8] = bgcol;
#elif BPP == 2
-cpu_to_32wu(((uint32_t *)d)+0, (dmask4[(font_data >> 6)] & xorcol) ^
bgcol);
-cpu_to_32wu(((uint32_t *)d)+1, (dmask4[(font_data >> 4) & 3] & xorcol)
^ bgcol);
-cpu_to_32wu(((uint32_t *)d)+2, (dmask4[(font_data >> 2) & 3] & xorcol)
^ bgcol);
+stl_p(((uint32_t *)d)+0, (dmask4[(font_data >> 6)] & xorcol) ^ bgcol);
+stl_p(((uint32_t *)d)+1,
+ (dmask4[(font_data >> 4) & 3] & xorcol) ^ bgcol);
+stl_p(((uint32_t *)d)+2,
+ (dmask4[(font_data >> 2) & 3] & xorcol) ^ bgcol);
v = (dmask4[(font_data >> 0) & 3] & xorcol) ^ bgcol;
-cpu_to_32wu(((uint32_t *)d)+3, v);
+stl_p(((uint32_t *)d)+3, v);
if (dup9)
((uint16_t *)d)[8] = v >> (16 * (1 - BIG));
else
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index 4cbd6e7..437b8e0 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -410,13 +410,6 @@ static inline void stfq_be_p(void *ptr, float64 v)
stq_be_p(ptr, u.ll);
}
-/* Legacy unaligned versions. Note that we never had a complete set. */
-
-static inline void cpu_to_32wu(uint32_t *p, uint32_t v)
-{
-stl_p(p, v);
-}
-
static inline unsigned long leul_to_cpu(unsigned long v)
{
/* In order to break an include loop between here and
--
1.7.9.5
[Qemu-devel] [PATCH 7/9] bswap.h: Remove cpu_to_be32wu()
Replace the legacy cpu_to_be32wu() with stl_be_p().
Signed-off-by: Peter Maydell
---
hw/block/cdrom.c |6 +++---
hw/net/e1000.c |3 +--
hw/pci/pcie_aer.c|4 ++--
include/qemu/bswap.h |5 -
4 files changed, 6 insertions(+), 12 deletions(-)
diff --git a/hw/block/cdrom.c b/hw/block/cdrom.c
index 5c69f34..4e1019c 100644
--- a/hw/block/cdrom.c
+++ b/hw/block/cdrom.c
@@ -59,7 +59,7 @@ int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int
start_track)
q += 3;
} else {
/* sector 0 */
-cpu_to_be32wu((uint32_t *)q, 0);
+stl_be_p(q, 0);
q += 4;
}
}
@@ -73,7 +73,7 @@ int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int
start_track)
lba_to_msf(q, nb_sectors);
q += 3;
} else {
-cpu_to_be32wu((uint32_t *)q, nb_sectors);
+stl_be_p(q, nb_sectors);
q += 4;
}
len = q - buf;
@@ -127,7 +127,7 @@ int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int
msf, int session_num)
lba_to_msf(q, nb_sectors);
q += 3;
} else {
-cpu_to_be32wu((uint32_t *)q, nb_sectors);
+stl_be_p(q, nb_sectors);
q += 4;
}
diff --git a/hw/net/e1000.c b/hw/net/e1000.c
index b8e3ce9..06a2f6e 100644
--- a/hw/net/e1000.c
+++ b/hw/net/e1000.c
@@ -522,8 +522,7 @@ xmit_seg(E1000State *s)
DBGOUT(TXSUM, "tcp %d tucss %d len %d\n", tp->tcp, css, len);
if (tp->tcp) {
sofar = frames * tp->mss;
-cpu_to_be32wu((uint32_t *)(tp->data+css+4),// seq
-ldl_be_p(tp->data+css+4)+sofar);
+stl_be_p(tp->data+css+4, ldl_be_p(tp->data+css+4)+sofar); /* seq */
if (tp->paylen - sofar > tp->mss)
tp->data[css + 13] &= ~9; // PSH, FIN
} else // UDP
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index ca762ab..723d88d 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -425,7 +425,7 @@ static void pcie_aer_update_log(PCIDevice *dev, const
PCIEAERErr *err)
/* 7.10.8 Header Log Register */
uint8_t *header_log =
aer_cap + PCI_ERR_HEADER_LOG + i * sizeof err->header[0];
-cpu_to_be32wu((uint32_t*)header_log, err->header[i]);
+stl_be_p(header_log, err->header[i]);
}
} else {
assert(!(err->flags & PCIE_AER_ERR_TLP_PREFIX_PRESENT));
@@ -439,7 +439,7 @@ static void pcie_aer_update_log(PCIDevice *dev, const
PCIEAERErr *err)
/* 7.10.12 tlp prefix log register */
uint8_t *prefix_log =
aer_cap + PCI_ERR_TLP_PREFIX_LOG + i * sizeof err->prefix[0];
-cpu_to_be32wu((uint32_t*)prefix_log, err->prefix[i]);
+stl_be_p(prefix_log, err->prefix[i]);
}
errcap |= PCI_ERR_CAP_TLP;
} else {
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index 3bb6b71..b95cc73 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -412,11 +412,6 @@ static inline void stfq_be_p(void *ptr, float64 v)
/* Legacy unaligned versions. Note that we never had a complete set. */
-static inline void cpu_to_be32wu(uint32_t *p, uint32_t v)
-{
-stl_be_p(p, v);
-}
-
static inline void cpu_to_be64wu(uint64_t *p, uint64_t v)
{
stq_be_p(p, v);
--
1.7.9.5
[Qemu-devel] [PATCH 8/9] bswap.h: Remove cpu_to_be64wu()
Replace the legacy cpu_to_be64wu() with stq_be_p().
Signed-off-by: Peter Maydell
---
block/qcow2-cluster.c |2 +-
include/qemu/bswap.h |5 -
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/block/qcow2-cluster.c b/block/qcow2-cluster.c
index cca76d4..363a725 100644
--- a/block/qcow2-cluster.c
+++ b/block/qcow2-cluster.c
@@ -92,7 +92,7 @@ int qcow2_grow_l1_table(BlockDriverState *bs, uint64_t
min_size,
/* set new table */
BLKDBG_EVENT(bs->file, BLKDBG_L1_GROW_ACTIVATE_TABLE);
cpu_to_be32w((uint32_t*)data, new_l1_size);
-cpu_to_be64wu((uint64_t*)(data + 4), new_l1_table_offset);
+stq_be_p(data + 4, new_l1_table_offset);
ret = bdrv_pwrite_sync(bs->file, offsetof(QCowHeader, l1_size),
data,sizeof(data));
if (ret < 0) {
goto fail;
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index b95cc73..4cbd6e7 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -412,11 +412,6 @@ static inline void stfq_be_p(void *ptr, float64 v)
/* Legacy unaligned versions. Note that we never had a complete set. */
-static inline void cpu_to_be64wu(uint64_t *p, uint64_t v)
-{
-stq_be_p(p, v);
-}
-
static inline void cpu_to_32wu(uint32_t *p, uint32_t v)
{
stl_p(p, v);
--
1.7.9.5
[Qemu-devel] [PATCH 2/9] bswap.h: Remove cpu_to_le32wu()
Replace the legacy cpu_to_le32wu() with stl_le_p().
Signed-off-by: Peter Maydell
---
hw/net/ne2000.c |2 +-
include/hw/pci/pci.h |2 +-
include/qemu/bswap.h |5 -
3 files changed, 2 insertions(+), 7 deletions(-)
diff --git a/hw/net/ne2000.c b/hw/net/ne2000.c
index 31afd28..e7865e9 100644
--- a/hw/net/ne2000.c
+++ b/hw/net/ne2000.c
@@ -467,7 +467,7 @@ static inline void ne2000_mem_writel(NE2000State *s,
uint32_t addr,
addr &= ~1; /* XXX: check exact behaviour if not even */
if (addr < 32 ||
(addr >= NE2000_PMEM_START && addr < NE2000_MEM_SIZE)) {
-cpu_to_le32wu((uint32_t *)(s->mem + addr), val);
+stl_le_p(s->mem + addr, val);
}
}
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index ae82064..2de27c5 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -434,7 +434,7 @@ pci_get_word(const uint8_t *config)
static inline void
pci_set_long(uint8_t *config, uint32_t val)
{
-cpu_to_le32wu((uint32_t *)config, val);
+stl_le_p(config, val);
}
static inline uint32_t
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index ada1084..d0c4ff0 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -412,11 +412,6 @@ static inline void stfq_be_p(void *ptr, float64 v)
/* Legacy unaligned versions. Note that we never had a complete set. */
-static inline void cpu_to_le32wu(uint32_t *p, uint32_t v)
-{
-stl_le_p(p, v);
-}
-
static inline uint16_t le16_to_cpupu(const uint16_t *p)
{
return lduw_le_p(p);
--
1.7.9.5
[Qemu-devel] [PATCH 3/9] bswap.h: Remove le16_to_cpupu()
Replace the legacy le16_to_cpupu() with lduw_le_p().
Signed-off-by: Peter Maydell
---
hw/acpi/core.c |3 +--
include/hw/pci/pci.h |2 +-
include/qemu/bswap.h |5 -
3 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index e84a577..f8f45ab 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -170,8 +170,7 @@ static void acpi_table_install(const char unsigned *blob,
size_t bloblen,
}
/* increase number of tables */
-stw_le_p(acpi_tables,
- le16_to_cpupu((uint16_t *)acpi_tables) + 1u);
+stw_le_p(acpi_tables, lduw_le_p(acpi_tables) + 1u);
/* Update the header fields. The strings need not be NUL-terminated. */
changed_fields = 0;
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 2de27c5..e5231df 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -428,7 +428,7 @@ pci_set_word(uint8_t *config, uint16_t val)
static inline uint16_t
pci_get_word(const uint8_t *config)
{
-return le16_to_cpupu((const uint16_t *)config);
+return lduw_le_p(config);
}
static inline void
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index d0c4ff0..1c50002 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -412,11 +412,6 @@ static inline void stfq_be_p(void *ptr, float64 v)
/* Legacy unaligned versions. Note that we never had a complete set. */
-static inline uint16_t le16_to_cpupu(const uint16_t *p)
-{
-return lduw_le_p(p);
-}
-
static inline uint32_t le32_to_cpupu(const uint32_t *p)
{
return ldl_le_p(p);
--
1.7.9.5
[Qemu-devel] [PATCH 4/9] bswap.h: Remove le32_to_cpupu()
Replace the legacy le32_to_cpupu() with ldl_le_p().
Signed-off-by: Peter Maydell
---
hw/net/ne2000.c |2 +-
include/hw/pci/pci.h |2 +-
include/qemu/bswap.h |5 -
3 files changed, 2 insertions(+), 7 deletions(-)
diff --git a/hw/net/ne2000.c b/hw/net/ne2000.c
index e7865e9..5088e65 100644
--- a/hw/net/ne2000.c
+++ b/hw/net/ne2000.c
@@ -497,7 +497,7 @@ static inline uint32_t ne2000_mem_readl(NE2000State *s,
uint32_t addr)
addr &= ~1; /* XXX: check exact behaviour if not even */
if (addr < 32 ||
(addr >= NE2000_PMEM_START && addr < NE2000_MEM_SIZE)) {
-return le32_to_cpupu((uint32_t *)(s->mem + addr));
+return ldl_le_p(s->mem + addr);
} else {
return 0x;
}
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index e5231df..76d67a4 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -440,7 +440,7 @@ pci_set_long(uint8_t *config, uint32_t val)
static inline uint32_t
pci_get_long(const uint8_t *config)
{
-return le32_to_cpupu((const uint32_t *)config);
+return ldl_le_p(config);
}
static inline void
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index 1c50002..ac5b2e0 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -412,11 +412,6 @@ static inline void stfq_be_p(void *ptr, float64 v)
/* Legacy unaligned versions. Note that we never had a complete set. */
-static inline uint32_t le32_to_cpupu(const uint32_t *p)
-{
-return ldl_le_p(p);
-}
-
static inline uint32_t be32_to_cpupu(const uint32_t *p)
{
return ldl_be_p(p);
--
1.7.9.5
[Qemu-devel] [PATCH 6/9] bswap.h: Remove cpu_to_be16wu()
Replace the legacy cpu_to_be16wu() with stw_be_p().
Signed-off-by: Peter Maydell
---
hw/block/cdrom.c |4 ++--
hw/ide/atapi.c | 16
hw/net/e1000.c | 19 ---
include/qemu/bswap.h |5 -
4 files changed, 18 insertions(+), 26 deletions(-)
diff --git a/hw/block/cdrom.c b/hw/block/cdrom.c
index 38469fa..5c69f34 100644
--- a/hw/block/cdrom.c
+++ b/hw/block/cdrom.c
@@ -77,7 +77,7 @@ int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int
start_track)
q += 4;
}
len = q - buf;
-cpu_to_be16wu((uint16_t *)buf, len - 2);
+stw_be_p(buf, len - 2);
return len;
}
@@ -150,6 +150,6 @@ int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int
msf, int session_num)
}
len = q - buf;
-cpu_to_be16wu((uint16_t *)buf, len - 2);
+stw_be_p(buf, len - 2);
return len;
}
diff --git a/hw/ide/atapi.c b/hw/ide/atapi.c
index 05e60b1..f7d2009 100644
--- a/hw/ide/atapi.c
+++ b/hw/ide/atapi.c
@@ -437,7 +437,7 @@ static int ide_dvd_read_structure(IDEState *s, int format,
cpu_to_ube32(buf + 16, total_sectors - 1); /* l0 end sector */
/* Size of buffer, not including 2 byte size field */
-cpu_to_be16wu((uint16_t *)buf, 2048 + 2);
+stw_be_p(buf, 2048 + 2);
/* 2k data + 4 byte header */
return (2048 + 4);
@@ -448,7 +448,7 @@ static int ide_dvd_read_structure(IDEState *s, int format,
buf[5] = 0; /* no region restrictions */
/* Size of buffer, not including 2 byte size field */
-cpu_to_be16wu((uint16_t *)buf, 4 + 2);
+stw_be_p(buf, 4 + 2);
/* 4 byte header + 4 byte data */
return (4 + 4);
@@ -458,7 +458,7 @@ static int ide_dvd_read_structure(IDEState *s, int format,
case 0x04: /* DVD disc manufacturing information */
/* Size of buffer, not including 2 byte size field */
-cpu_to_be16wu((uint16_t *)buf, 2048 + 2);
+stw_be_p(buf, 2048 + 2);
/* 2k data + 4 byte header */
return (2048 + 4);
@@ -471,22 +471,22 @@ static int ide_dvd_read_structure(IDEState *s, int format,
buf[4] = 0x00; /* Physical format */
buf[5] = 0x40; /* Not writable, is readable */
-cpu_to_be16wu((uint16_t *)(buf + 6), 2048 + 4);
+stw_be_p(buf + 6, 2048 + 4);
buf[8] = 0x01; /* Copyright info */
buf[9] = 0x40; /* Not writable, is readable */
-cpu_to_be16wu((uint16_t *)(buf + 10), 4 + 4);
+stw_be_p(buf + 10, 4 + 4);
buf[12] = 0x03; /* BCA info */
buf[13] = 0x40; /* Not writable, is readable */
-cpu_to_be16wu((uint16_t *)(buf + 14), 188 + 4);
+stw_be_p(buf + 14, 188 + 4);
buf[16] = 0x04; /* Manufacturing info */
buf[17] = 0x40; /* Not writable, is readable */
-cpu_to_be16wu((uint16_t *)(buf + 18), 2048 + 4);
+stw_be_p(buf + 18, 2048 + 4);
/* Size of buffer, not including 2 byte size field */
-cpu_to_be16wu((uint16_t *)buf, 16 + 2);
+stw_be_p(buf, 16 + 2);
/* data written + 4 byte header */
return (16 + 4);
diff --git a/hw/net/e1000.c b/hw/net/e1000.c
index f770f08..b8e3ce9 100644
--- a/hw/net/e1000.c
+++ b/hw/net/e1000.c
@@ -451,8 +451,7 @@ putsum(uint8_t *data, uint32_t n, uint32_t sloc, uint32_t
css, uint32_t cse)
n = cse + 1;
if (sloc < n-1) {
sum = net_checksum_add(n-css, data+css);
-cpu_to_be16wu((uint16_t *)(data + sloc),
- net_checksum_finish(sum));
+stw_be_p(data + sloc, net_checksum_finish(sum));
}
}
@@ -513,13 +512,11 @@ xmit_seg(E1000State *s)
DBGOUT(TXSUM, "frames %d size %d ipcss %d\n",
frames, tp->size, css);
if (tp->ip) { // IPv4
-cpu_to_be16wu((uint16_t *)(tp->data+css+2),
- tp->size - css);
-cpu_to_be16wu((uint16_t *)(tp->data+css+4),
+stw_be_p(tp->data+css+2, tp->size - css);
+stw_be_p(tp->data+css+4,
be16_to_cpup((uint16_t *)(tp->data+css+4))+frames);
} else // IPv6
-cpu_to_be16wu((uint16_t *)(tp->data+css+4),
- tp->size - css);
+stw_be_p(tp->data+css+4, tp->size - css);
css = tp->tucss;
len = tp->size - css;
DBGOUT(TXSUM, "tcp %d tucss %d len %d\n", tp->tcp, css, len);
@@ -530,14 +527,14 @@ xmit_seg(E1000State *s)
if (tp->paylen - sofar > tp->mss)
tp->data[css + 13] &= ~9; // PSH, FIN
} else // UDP
-cpu_to_be16wu((uint16_t *)(tp->data+css+4), len);
+stw_be_p(tp->data+css+4, len);
if (tp->sum_needed & E1000_TXD_POPTS_TX
Re: [Qemu-devel] [RFC 0/2] target-arm: Provide '-cpu host' when running KVM
On 25 August 2013 15:42, Gleb Natapov wrote: > Are ARM cpu features not enumerable and the only way to know what is > supported by a core is by its id? I do see feature registers in the > spec, so why wouldn't we want to be able to disable/enable features > individually? It's complicated. There are feature registers which have various bits, but only some combinations are architecturally valid. In any case a guest might reasonably legitimately assume "this is an A15 so it will have architected timers", for example, and not bother testing feature bits. Some feature bits really do have to match the real hardware, like ones that say "you need to explicitly flush the branch predictor". A lot are feature bits that are simply mandatory for any ARMv7 or later processor (which is what you need for KVM to work at all). And buried in there might possibly be a few features that it might actually make sense to enable/disable separately (like "do we have Neon?"). So what we have for now is that the INIT_VCPU ioctl has space for feature flags (currently unused in v7; in v8 there's a "make the VM be a 32 bit VM on a 64 bit CPU" flag), so we could wire those up some day. (We don't have any support in QEMU for saying "I want an ARM CPU with features X and Y but not Z" yet either.) -- PMM
[Qemu-devel] [PATCH 0/9] Remove legacy unaligned bswap functions
The bswap.h header includes a set of "legacy unaligned functions"
that (since commit c732a52d3 at the beginning of this year) are
just wrappers for underlying {ld,st} functions. The legacy
functions aren't used in many places, so just replace all their
uses with uses of the new-style {ld,st} functions; this lets us
remove the legacy wrappers altogether.
Since we know the {ld,st}* routines are definitely functions,
we can in the process remove some casts which were left over
from when the legacy unaligned functions were previously macros.
The patchset is divided up by function being removed, rather
than by which device/subsystem is being fixed; I think this way
round is easier to review since you only have to keep one
substitution in your head when reading a patch.
Peter Maydell (9):
bswap.h: Remove cpu_to_le16wu()
bswap.h: Remove cpu_to_le32wu()
bswap.h: Remove le16_to_cpupu()
bswap.h: Remove le32_to_cpupu()
bswap.h: Remove be32_to_cpupu()
bswap.h: Remove cpu_to_be16wu()
bswap.h: Remove cpu_to_be32wu()
bswap.h: Remove cpu_to_be64wu()
bswap.h: Remove cpu_to_32wu()
block/qcow2-cluster.c |2 +-
hw/acpi/core.c|3 +--
hw/block/cdrom.c | 10 +-
hw/display/vga_template.h | 14 --
hw/ide/atapi.c| 16 +++
hw/net/e1000.c| 22 +
hw/net/ne2000.c |4 ++--
hw/pci/pcie_aer.c |4 ++--
include/hw/pci/pci.h |8
include/qemu/bswap.h | 47 -
10 files changed, 40 insertions(+), 90 deletions(-)
--
1.7.9.5
Re: [Qemu-devel] [PATCH 2/5] hw: arm_gic: Introduce GIC_SET_PRIORITY macro
On 23.08.2013, at 21:10, Christoffer Dall wrote:
> To make the code slightly cleaner to look at and make the save/restore
> code easier to understand, introduce this macro to set the priority of
> interrupts.
>
> Signed-off-by: Christoffer Dall
> ---
> hw/intc/arm_gic.c |6 +-
> hw/intc/gic_internal.h |6 ++
> 2 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
> index bff3f9e..a7bb528 100644
> --- a/hw/intc/arm_gic.c
> +++ b/hw/intc/arm_gic.c
> @@ -444,11 +444,7 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
> irq = (offset - 0x400) + GIC_BASE_IRQ;
> if (irq >= s->num_irq)
> goto bad_reg;
> -if (irq < GIC_INTERNAL) {
> -s->priority1[irq][cpu] = value;
> -} else {
> -s->priority2[irq - GIC_INTERNAL] = value;
> -}
> +GIC_SET_PRIORITY(irq, cpu, value);
> } else if (offset < 0xc00) {
> /* Interrupt CPU Target. RAZ/WI on uniprocessor GICs, with the
> * annoying exception of the 11MPCore's GIC.
> diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h
> index 1426437..d835aa1 100644
> --- a/hw/intc/gic_internal.h
> +++ b/hw/intc/gic_internal.h
> @@ -57,6 +57,12 @@
> #define GIC_GET_PRIORITY(irq, cpu) (((irq) < GIC_INTERNAL) ?\
> s->priority1[irq][cpu] :\
> s->priority2[(irq) - GIC_INTERNAL])
> +#define GIC_SET_PRIORITY(irq, cpu, val) do { \
> +uint8_t *__x = ((irq) < GIC_INTERNAL) ? \
> +&s->priority1[irq][cpu] : \
> +&s->priority2[(irq) - GIC_INTERNAL]; \
> +*__x = val; \
> +} while (0)
Why not make this a function?
Alex
> #define GIC_TARGET(irq) s->irq_target[irq]
>
> typedef struct gic_irq_state {
> --
> 1.7.10.4
>
> ___
> kvmarm mailing list
> kvm...@lists.cs.columbia.edu
> https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm
Re: [Qemu-devel] [PATCH 5/5] hw: arm_gic_kvm: Add KVM VGIC save/restore logic
On 23.08.2013, at 21:10, Christoffer Dall wrote:
> Save and restore the ARM KVM VGIC state from the kernel. We rely on
> QEMU to marshal the GICState data structure and therefore simply
> synchronize the kernel state with the QEMU emulated state in both
> directions.
>
> We take some care on the restore path to check the VGIC has been
> configured with enough IRQs and CPU interfaces that we can properly
> restore the state, and for separate set/clear registers we first fully
> clear the registers and then set the required bits.
>
> Signed-off-by: Christoffer Dall
> ---
> hw/intc/arm_gic_common.c|2 +
> hw/intc/arm_gic_kvm.c | 418 ++-
> hw/intc/gic_internal.h |1 +
> include/migration/vmstate.h |6 +
> 4 files changed, 425 insertions(+), 2 deletions(-)
>
> diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c
> index a50ded2..f39bdc1 100644
> --- a/hw/intc/arm_gic_common.c
> +++ b/hw/intc/arm_gic_common.c
> @@ -77,6 +77,8 @@ static const VMStateDescription vmstate_gic = {
> VMSTATE_UINT16_ARRAY(running_priority, GICState, NCPU),
> VMSTATE_UINT16_ARRAY(current_pending, GICState, NCPU),
> VMSTATE_UINT8_2DARRAY(binary_point, GICState, 2, NCPU),
> +VMSTATE_UINT32_2DARRAY(active_prio, GICState, 4, NCPU),
> +VMSTATE_UINT32(num_irq, GICState),
> VMSTATE_END_OF_LIST()
> }
> };
> diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c
> index 9f0a852..9785281 100644
> --- a/hw/intc/arm_gic_kvm.c
> +++ b/hw/intc/arm_gic_kvm.c
> @@ -23,6 +23,15 @@
> #include "kvm_arm.h"
> #include "gic_internal.h"
>
> +//#define DEBUG_GIC_KVM
> +
> +#ifdef DEBUG_GIC_KVM
> +#define DPRINTF(fmt, ...) \
> +do { fprintf(stderr, "arm_gic: " fmt , ## __VA_ARGS__); } while (0)
> +#else
> +#define DPRINTF(fmt, ...) do {} while(0)
You really want to make DPRINTF still be format checked by the compiler. Check
out hw/intc/openpic.c for an example how to get there.
> +#endif
> +
> #define TYPE_KVM_ARM_GIC "kvm-arm-gic"
> #define KVM_ARM_GIC(obj) \
> OBJECT_CHECK(GICState, (obj), TYPE_KVM_ARM_GIC)
> @@ -73,14 +82,419 @@ static void kvm_arm_gic_set_irq(void *opaque, int irq,
> int level)
> kvm_set_irq(kvm_state, kvm_irq, !!level);
> }
>
> +static bool kvm_arm_gic_can_save_restore(GICState *s)
> +{
> +KVMARMGICClass *kgc = KVM_ARM_GIC_GET_CLASS(s);
> +return kgc->dev_fd >= 0;
> +}
> +
> +static void kvm_arm_gic_reg_access(GICState *s, int group, int offset,
> + int cpu, uint32_t *val, bool write)
> +{
> +KVMARMGICClass *kgc = KVM_ARM_GIC_GET_CLASS(s);
> +struct kvm_device_attr attr;
> +int type;
> +
> +cpu = cpu & 0xff;
> +
> +attr.flags = 0;
> +attr.group = group;
> +attr.attr = (((uint64_t)cpu << KVM_DEV_ARM_VGIC_CPUID_SHIFT) &
> + KVM_DEV_ARM_VGIC_CPUID_MASK) |
> +(((uint64_t)offset << KVM_DEV_ARM_VGIC_OFFSET_SHIFT) &
> + KVM_DEV_ARM_VGIC_OFFSET_MASK);
> +attr.addr = (uint64_t)(long)val;
uintptr_t?
> +
> +if (write) {
> +type = KVM_SET_DEVICE_ATTR;
> +} else {
> +type = KVM_GET_DEVICE_ATTR;
> +}
> +
> +if (kvm_device_ioctl(kgc->dev_fd, type, &attr) < 0) {
> +fprintf(stderr, "KVM_{SET/GET}_DEVICE_ATTR failed: %s\n",
> +strerror(errno));
> +abort();
> +}
> +}
> +
> +static void kvm_arm_gic_dist_reg_access(GICState *s, int offset, int cpu,
> +uint32_t *val, bool write)
> +{
> +kvm_arm_gic_reg_access(s, KVM_DEV_ARM_VGIC_GRP_DIST_REGS,
> + offset, cpu, val, write);
> +}
> +
> +static void kvm_arm_gic_cpu_reg_access(GICState *s, int offset, int cpu,
> + uint32_t *val, bool write)
> +{
> +kvm_arm_gic_reg_access(s, KVM_DEV_ARM_VGIC_GRP_CPU_REGS,
> + offset, cpu, val, write);
> +}
> +
> +#define for_each_irq_reg(_ctr, _max_irq, _field_width) \
> +for (_ctr = 0; _ctr < ((_max_irq) / (32 / (_field_width))); _ctr++)
> +
> +/*
> + * Translate from the in-kernel field for an IRQ value to/from the qemu
> + * representation.
> + */
> +typedef void (*vgic_translate_fn)(GICState *s, int irq, int cpu,
> + uint32_t *field, bool to_kernel);
> +
> +/* synthetic translate function used for clear/set registers to completely
> + * clear a setting using a clear-register before setting the remaing bits
> + * using a set-register */
> +static void translate_clear(GICState *s, int irq, int cpu,
> +uint32_t *field, bool to_kernel)
> +{
> +if (to_kernel) {
> +*field = ~0;
> +} else {
> +/* does not make sense: qemu model doesn't use set/clear regs */
> +abort();
> +}
I don't understand the to_kernel bits. I thought we're in a device file that
only works with KVM?
> +}
> +
> +static void tr
Re: [Qemu-devel] [PATCH 0/5] Support arm-gic-kvm save/restore
On 23.08.2013, at 21:10, Christoffer Dall wrote: > Implement support to save/restore the ARM KVM VGIC state from the > kernel. The basic appraoch is to transfer state from the in-kernel VGIC > to the emulated arm-gic state representation and let the standard QEMU > vmstate save/restore handle saving the arm-gic state. Restore works by > reversing the process. > > The first few patches adds missing features and fixes issues with the > arm-gic implementation in qemu in preparation for the actual > save/restore logic. > > The patches depend on the device control patch series sent out earlier, > which can also be found here: > git://git.linaro.org/people/cdall/qemu-arm.git migration/device-ctrl > > The whole patch series based on top of the above can be found here: > git://git.linaro.org/people/cdall/qemu-arm.git migration/vgic Reviewed-by: Alexander Graf Alex
[Qemu-devel] [PATCH V20 1/8] docs: document for add-cow file format
Document for add-cow format, the usage and spec of add-cow are
introduced.
v19->v20:
1) fix AddCowMeta's logic while add-cow is being written.
v18-v19:
1) backing_fmt and image_fmt NUL-terminated.
2) other fix.
V17->V18:
1) remove version field.
2) header size is maximum value and cluster size value.
3) fix type.
Signed-off-by: Dong Xu Wang
---
docs/specs/add-cow.txt | 172 +
1 file changed, 172 insertions(+)
create mode 100644 docs/specs/add-cow.txt
diff --git a/docs/specs/add-cow.txt b/docs/specs/add-cow.txt
new file mode 100644
index 000..fba74dd
--- /dev/null
+++ b/docs/specs/add-cow.txt
@@ -0,0 +1,172 @@
+== General ==
+
+The raw file format does not support backing files or copy on write
+feature. The add-cow image format makes it possible to use backing
+files with an image by keeping a separate .add-cow metadata file.
+Once all clusters have been written into the image it is safe to
+discard the .add-cow and backing files, then we can use the image
+directly.
+
+An example usage of add-cow would look like:
+(ubuntu.img is a disk image which has an installed OS.)
+1) Create an image, such as raw format, with the same size of
+ubuntu.img:
+qemu-img create -f raw test.raw 8G
+2) Create an add-cow image which will store dirty bitmap
+qemu-img create -f add-cow test.add-cow \
+-o backing_file=ubuntu.img,image_file=test.raw
+3) Run qemu with add-cow image
+qemu -drive if=virtio,file=test.add-cow
+
+test.raw may be larger than ubuntu.img, in that case, the size of
+test.add-cow will be calculated from the size of test.raw.
+
+image_fmt can be omitted, in that case image_fmt is assumed to be
+"raw". backing_fmt can also be omitted, add-cow should do a probe
+operation and determine what the backing file's format is. It is
+recommended to always specify the format for any raw file, because
+probing a raw file is a security hole.
+
+=Specification=
+
+The file format looks like this:
+
+ +---+---+
+ | Header| COW bitmap |
+ +---+---+
+
+All numbers in add-cow are stored in Little Endian byte order.
+
+== Header ==
+
+The Header is included in the first bytes:
+(HEADER_SIZE is defined in 40-43 bytes.)
+Byte0 - 3:magic
+add-cow magic string ("ACOW"). It is coded in
+free-form ASCII.
+
+4 - 7:backing file name offset
+Offset in the add-cow file at which the backing
+file name is stored (NB: The string is NOT
+NUL-terminated).
+If backing file name does NOT exist, this field
+will be 0. Must be between 76 and [HEADER_SIZE
+- 2](a file name must be at least 1 byte).
+
+8 - 11:backing file name size
+Length of the backing file name in bytes. It
+will be 0 if the backing file name offset is
+0. If backing file name offset is non-zero,
+then it must be non-zero. Must be less than
+[HEADER_SIZE - 76] to fit in the reserved
+part of the header. Backing file name offset
++ size must be no more than HEADER_SIZE.
+
+12 - 15:image file name offset
+Offset in the add-cow file at which the image
+file name is stored (NB: The string is NOT
+NUL-terminated). It must be between 76 and
+[HEADER_SIZE - 2]. Image file name size + offset
+must be no more than HEADER_SIZE.
+
+16 - 19:image file name size
+Length of the image file name in bytes.
+Must be less than [HEADER_SIZE - 76] to fit in
+the reserved part of the header.
+
+20 - 23:cluster bits
+Number of bits that are used for addressing an
+offset within a cluster (1 << cluster_bits is
+the cluster size). Must not be less than 12
+(i.e. 4096 byte clusters).
+
+Note: qemu as of today has an implementation
+limit of 2 MB as the maximum cluster size and
+won't be able to open images with larger cluster
+sizes.
+
+24 - 31:features
+Bitmask of features. If a feature bit is set
+but not recognized, the opening add-cow file must
+fail. No features bits are currently defined.
+
+Bits 0-63: Reserved (set to 0)
[Qemu-devel] [PATCH V20 3/8] qed_read_string to bdrv_read_string
Make qed_read_string function to a common interface, so move it to
block.c.
Signed-off-by: Dong Xu Wang
---
block.c | 27 +++
block/qed.c | 34 --
include/block/block.h | 2 ++
3 files changed, 33 insertions(+), 30 deletions(-)
diff --git a/block.c b/block.c
index b2711e9..e747afb 100644
--- a/block.c
+++ b/block.c
@@ -206,6 +206,33 @@ int path_has_protocol(const char *path)
return *p == ':';
}
+/**
+ * Read a string of known length from the image file
+ *
+ * @bs: Image file
+ * @offset: File offset to start of string, in bytes
+ * @n: String length in bytes
+ * @buf:Destination buffer
+ * @buflen: Destination buffer length in bytes
+ * @ret:0 on success, -errno on failure
+ *
+ * The string is NUL-terminated.
+ */
+int bdrv_read_string(BlockDriverState *bs, uint64_t offset, size_t n,
+ char *buf, size_t buflen)
+{
+int ret;
+if (n >= buflen) {
+return -EINVAL;
+}
+ret = bdrv_pread(bs, offset, buf, n);
+if (ret < 0) {
+return ret;
+}
+buf[n] = '\0';
+return 0;
+}
+
int path_is_absolute(const char *path)
{
#ifdef _WIN32
diff --git a/block/qed.c b/block/qed.c
index 6b02c47..09cc13f 100644
--- a/block/qed.c
+++ b/block/qed.c
@@ -217,33 +217,6 @@ static bool qed_is_image_size_valid(uint64_t image_size,
uint32_t cluster_size,
}
/**
- * Read a string of known length from the image file
- *
- * @file: Image file
- * @offset: File offset to start of string, in bytes
- * @n: String length in bytes
- * @buf:Destination buffer
- * @buflen: Destination buffer length in bytes
- * @ret:0 on success, -errno on failure
- *
- * The string is NUL-terminated.
- */
-static int qed_read_string(BlockDriverState *file, uint64_t offset, size_t n,
- char *buf, size_t buflen)
-{
-int ret;
-if (n >= buflen) {
-return -EINVAL;
-}
-ret = bdrv_pread(file, offset, buf, n);
-if (ret < 0) {
-return ret;
-}
-buf[n] = '\0';
-return 0;
-}
-
-/**
* Allocate new clusters
*
* @s: QED state
@@ -437,9 +410,10 @@ static int bdrv_qed_open(BlockDriverState *bs, QDict
*options, int flags)
return -EINVAL;
}
-ret = qed_read_string(bs->file, s->header.backing_filename_offset,
- s->header.backing_filename_size,
bs->backing_file,
- sizeof(bs->backing_file));
+ret = bdrv_read_string(bs->file, s->header.backing_filename_offset,
+ s->header.backing_filename_size,
+ bs->backing_file,
+ sizeof(bs->backing_file));
if (ret < 0) {
return ret;
}
diff --git a/include/block/block.h b/include/block/block.h
index f025185..30c8e1a 100644
--- a/include/block/block.h
+++ b/include/block/block.h
@@ -168,6 +168,8 @@ int bdrv_pwrite_sync(BlockDriverState *bs, int64_t offset,
const void *buf, int count);
int coroutine_fn bdrv_co_readv(BlockDriverState *bs, int64_t sector_num,
int nb_sectors, QEMUIOVector *qiov);
+int bdrv_read_string(BlockDriverState *bs, uint64_t offset, size_t n,
+ char *buf, size_t buflen);
int coroutine_fn bdrv_co_copy_on_readv(BlockDriverState *bs,
int64_t sector_num, int nb_sectors, QEMUIOVector *qiov);
int coroutine_fn bdrv_co_writev(BlockDriverState *bs, int64_t sector_num,
--
1.7.11.7
[Qemu-devel] [PATCH V20 0/7] add-cow file format
It will introduce a new file format: add-cow. The add-cow file format makes it possible to perform copy-on-write on top of a raw disk image. When we know that no backing file clusters remain visible (e.g. we have streamed the entire image and copied all data from the backing file), then it is possible to discard the add-cow file and use the raw image file directly. This feature adds the copy-on-write feature to raw files (which cannot support it natively) while allowing us to get full performance again later when we no longer need copy-on-write. add-cow can benefit from other available functions, such as path_has_protocol and qed_read_string, so we will make them public. snapshot_blkdev are not supported now for add-cow. Will add it in futher patches. These patches are using QemuOpts parser, former patches could be found here: http://patchwork.ozlabs.org/patch/266693/ v19->v20: 1) reorganize patch order. 2) fix AddCowMeta's logic while add-cow is being written. Add-cow is not real parallel now, it also has to track image_hd's meta data. I will quit from QEMU soon, so I am wondering if it is possible to optimize it later. v18->v19: 1) squash one patch into another one. 2) fix meta clean up logic. v17 -> v18: 1) remove version field. 2) header size is maximum value and cluster size value. 3) fix type. 4) move struct to source file. 5) cluster_size->table_size. 6) use error_report, not fprintf. 7) remove version field from header. 8) header_size is MAX(cluster_size, 4096). 9) introduce s->cluster_sectors. 10) use BLKDBG_L2_LOAD/UPDATE. 11) add 037 and 038 tests. v16->v17): 1) Use stringify. v15->v16): 1) Rebased on QEMU upstream source tree. 2) Judge if opts is null in add_cow_create function. v14->v15: 1) Fix typo and make some sentences more readable in docs. 2) Introduce STRINGIZER macro. v13->v14: 1) Make some sentences more clear in docs. 2) Make MAGIC from 8 bytes to 4 bytes. 3) Fix some bugs. v12->v13: 1) Use QemuOpts, not QEMUOptionParameter 2) cluster_size configuable 3) Refactor block-cache.c 4) Correct qemu-iotests script. 5) Other bug fix. v11->v12: 1) Removed un-used feature bit. 2) Share cache code with qcow2.c. 3) Remove snapshot_blkdev support, will add it in another patch. 5) COW Bitmap field in add-cow file will be multiple of 65536. 6) fix grammer and typo. Dong Xu Wang (8): docs: document for add-cow file format make path_has_protocol non static qed_read_string to bdrv_read_string rename qcow2_cache functions to block_cache move qcow2-cache.c to block-cache.c Make block-cache.c be common interface add-cow file format core code qemu-iotests: add add-cow iotests support block.c | 29 +- block/Makefile.objs | 4 +- block/add-cow.c | 824 +++ block/block-cache.c | 342 ++ block/block-cache.h | 59 block/qcow2-cache.c | 323 - block/qcow2-cluster.c| 48 +-- block/qcow2-refcount.c | 42 +-- block/qcow2.c| 21 +- block/qcow2.h| 25 +- block/qed.c | 34 +- docs/specs/add-cow.txt | 172 + include/block/block.h| 6 + include/block/block_int.h| 2 + tests/qemu-iotests/017 | 2 +- tests/qemu-iotests/020 | 2 +- tests/qemu-iotests/037 | 2 +- tests/qemu-iotests/038 | 2 +- tests/qemu-iotests/common| 5 + tests/qemu-iotests/common.rc | 15 +- trace-events | 12 +- 21 files changed, 1529 insertions(+), 442 deletions(-) create mode 100644 block/add-cow.c create mode 100644 block/block-cache.c create mode 100644 block/block-cache.h delete mode 100644 block/qcow2-cache.c create mode 100644 docs/specs/add-cow.txt -- 1.7.11.7
[Qemu-devel] [PATCH V20 8/8] qemu-iotests: add add-cow iotests support
This patch will use qemu-iotests to test add-cow file format. v17-v18: 1) add 037 and 038 tests. Signed-off-by: Dong Xu Wang --- tests/qemu-iotests/017 | 2 +- tests/qemu-iotests/020 | 2 +- tests/qemu-iotests/037 | 2 +- tests/qemu-iotests/038 | 2 +- tests/qemu-iotests/common| 5 + tests/qemu-iotests/common.rc | 15 ++- 6 files changed, 23 insertions(+), 5 deletions(-) diff --git a/tests/qemu-iotests/017 b/tests/qemu-iotests/017 index 45f2c0b..ae0e627 100755 --- a/tests/qemu-iotests/017 +++ b/tests/qemu-iotests/017 @@ -40,7 +40,7 @@ trap "_cleanup; exit \$status" 0 1 2 3 15 . ./common.pattern # Any format supporting backing files -_supported_fmt qcow qcow2 vmdk qed +_supported_fmt qcow qcow2 vmdk qed add-cow _supported_proto generic _supported_os Linux diff --git a/tests/qemu-iotests/020 b/tests/qemu-iotests/020 index 2fb0ff8..3dbb495 100755 --- a/tests/qemu-iotests/020 +++ b/tests/qemu-iotests/020 @@ -42,7 +42,7 @@ trap "_cleanup; exit \$status" 0 1 2 3 15 . ./common.pattern # Any format supporting backing files -_supported_fmt qcow qcow2 vmdk qed +_supported_fmt qcow qcow2 vmdk qed add-cow _supported_proto generic _supported_os Linux diff --git a/tests/qemu-iotests/037 b/tests/qemu-iotests/037 index c11460b..683e73d 100755 --- a/tests/qemu-iotests/037 +++ b/tests/qemu-iotests/037 @@ -38,7 +38,7 @@ trap "_cleanup; exit \$status" 0 1 2 3 15 . ./common.rc . ./common.filter -_supported_fmt qcow qcow2 vmdk qed +_supported_fmt qcow qcow2 vmdk qed add-cow _supported_proto generic _supported_os Linux diff --git a/tests/qemu-iotests/038 b/tests/qemu-iotests/038 index 36125ea..10bacfb 100755 --- a/tests/qemu-iotests/038 +++ b/tests/qemu-iotests/038 @@ -38,7 +38,7 @@ trap "_cleanup; exit \$status" 0 1 2 3 15 . ./common.rc . ./common.filter -_supported_fmt qcow2 qed +_supported_fmt qcow2 qed add-cow _supported_proto generic _supported_os Linux diff --git a/tests/qemu-iotests/common b/tests/qemu-iotests/common index 6826ea7..c1d7101 100644 --- a/tests/qemu-iotests/common +++ b/tests/qemu-iotests/common @@ -128,6 +128,7 @@ common options check options -rawtest raw (default) -cowtest cow +-add-cowtest add-cow -qcow test qcow -qcow2 test qcow2 -qedtest qed @@ -165,6 +166,10 @@ testlist options xpand=false ;; +-add-cow) +IMGFMT=add-cow +xpand=false +;; -qcow) IMGFMT=qcow xpand=false diff --git a/tests/qemu-iotests/common.rc b/tests/qemu-iotests/common.rc index 5e077c3..442f891 100644 --- a/tests/qemu-iotests/common.rc +++ b/tests/qemu-iotests/common.rc @@ -116,6 +116,16 @@ _make_test_img() fi if [ \( "$IMGFMT" = "qcow2" -o "$IMGFMT" = "qed" \) -a -n "$CLUSTER_SIZE" ]; then optstr=$(_optstr_add "$optstr" "cluster_size=$CLUSTER_SIZE") +elif [ "$IMGFMT" = "add-cow" ]; then +local IMG="$TEST_IMG"".raw" +if [ "$1" = "-b" ]; then +IMG="$IMG"".b" +$QEMU_IMG create -f raw $IMG $image_size>/dev/null +extra_img_options="-o image_file=$IMG $extra_img_options" +else +$QEMU_IMG create -f raw $IMG $image_size>/dev/null +extra_img_options="-o image_file=$IMG" +fi fi if [ -n "$optstr" ]; then @@ -136,7 +146,8 @@ _make_test_img() -e "s# zeroed_grain=\\(on\\|off\\)##g" \ -e "s# subformat='[^']*'##g" \ -e "s# adapter_type='[^']*'##g" \ --e "s# lazy_refcounts=\\(on\\|off\\)##g" +-e "s# lazy_refcounts=\\(on\\|off\\)##g" \ +-e "s# image_file='[^']*'##g" # Start an NBD server on the image file, which is what we'll be talking to if [ $IMGPROTO = "nbd" ]; then @@ -158,6 +169,8 @@ _cleanup_test_img() rm -f $TEST_DIR/t.$IMGFMT rm -f $TEST_DIR/t.$IMGFMT.orig rm -f $TEST_DIR/t.$IMGFMT.base +rm -f $TEST_DIR/t.$IMGFMT.raw +rm -f $TEST_DIR/t.$IMGFMT.raw.b ;; rbd) -- 1.7.11.7
[Qemu-devel] [PATCH V20 2/8] make path_has_protocol non static
We will use path_has_protocol outside block.c, so just make it public.
Reviewed-by: Michael Roth
Signed-off-by: Dong Xu Wang
---
block.c | 2 +-
include/block/block.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/block.c b/block.c
index fcc8870..b2711e9 100644
--- a/block.c
+++ b/block.c
@@ -189,7 +189,7 @@ static void bdrv_io_limits_intercept(BlockDriverState *bs,
}
/* check if the path starts with ":" */
-static int path_has_protocol(const char *path)
+int path_has_protocol(const char *path)
{
const char *p;
diff --git a/include/block/block.h b/include/block/block.h
index 476d168..f025185 100644
--- a/include/block/block.h
+++ b/include/block/block.h
@@ -343,6 +343,7 @@ void bdrv_img_create(const char *filename, const char *fmt,
void bdrv_set_buffer_alignment(BlockDriverState *bs, int align);
void *qemu_blockalign(BlockDriverState *bs, size_t size);
bool bdrv_qiov_is_aligned(BlockDriverState *bs, QEMUIOVector *qiov);
+int path_has_protocol(const char *path);
struct HBitmapIter;
void bdrv_set_dirty_tracking(BlockDriverState *bs, int granularity);
--
1.7.11.7
[Qemu-devel] [PATCH V20 4/8] rename qcow2_cache functions to block_cache
This patch only rename qcow2_cache* functions to block_cache*,
did not touch other code.
Signed-off-by: Dong Xu Wang
---
block/qcow2-cache.c| 70 +-
block/qcow2-cluster.c | 48 +-
block/qcow2-refcount.c | 42 +++---
block/qcow2.c | 18 ++---
block/qcow2.h | 28 ++--
trace-events | 12 -
6 files changed, 109 insertions(+), 109 deletions(-)
diff --git a/block/qcow2-cache.c b/block/qcow2-cache.c
index 2f3114e..bc057a8 100644
--- a/block/qcow2-cache.c
+++ b/block/qcow2-cache.c
@@ -27,25 +27,25 @@
#include "qcow2.h"
#include "trace.h"
-typedef struct Qcow2CachedTable {
+typedef struct BlockCachedTable {
void* table;
int64_t offset;
booldirty;
int cache_hits;
int ref;
-} Qcow2CachedTable;
+} BlockCachedTable;
-struct Qcow2Cache {
-Qcow2CachedTable* entries;
-struct Qcow2Cache* depends;
+struct BlockCache {
+BlockCachedTable* entries;
+struct BlockCache* depends;
int size;
booldepends_on_flush;
};
-Qcow2Cache *qcow2_cache_create(BlockDriverState *bs, int num_tables)
+BlockCache *block_cache_create(BlockDriverState *bs, int num_tables)
{
BDRVQcowState *s = bs->opaque;
-Qcow2Cache *c;
+BlockCache *c;
int i;
c = g_malloc0(sizeof(*c));
@@ -59,7 +59,7 @@ Qcow2Cache *qcow2_cache_create(BlockDriverState *bs, int
num_tables)
return c;
}
-int qcow2_cache_destroy(BlockDriverState* bs, Qcow2Cache *c)
+int block_cache_destroy(BlockDriverState* bs, BlockCache *c)
{
int i;
@@ -74,11 +74,11 @@ int qcow2_cache_destroy(BlockDriverState* bs, Qcow2Cache *c)
return 0;
}
-static int qcow2_cache_flush_dependency(BlockDriverState *bs, Qcow2Cache *c)
+static int block_cache_flush_dependency(BlockDriverState *bs, BlockCache *c)
{
int ret;
-ret = qcow2_cache_flush(bs, c->depends);
+ret = block_cache_flush(bs, c->depends);
if (ret < 0) {
return ret;
}
@@ -89,7 +89,7 @@ static int qcow2_cache_flush_dependency(BlockDriverState *bs,
Qcow2Cache *c)
return 0;
}
-static int qcow2_cache_entry_flush(BlockDriverState *bs, Qcow2Cache *c, int i)
+static int block_cache_entry_flush(BlockDriverState *bs, BlockCache *c, int i)
{
BDRVQcowState *s = bs->opaque;
int ret = 0;
@@ -98,11 +98,11 @@ static int qcow2_cache_entry_flush(BlockDriverState *bs,
Qcow2Cache *c, int i)
return 0;
}
-trace_qcow2_cache_entry_flush(qemu_coroutine_self(),
+trace_block_cache_entry_flush(qemu_coroutine_self(),
c == s->l2_table_cache, i);
if (c->depends) {
-ret = qcow2_cache_flush_dependency(bs, c);
+ret = block_cache_flush_dependency(bs, c);
} else if (c->depends_on_flush) {
ret = bdrv_flush(bs->file);
if (ret >= 0) {
@@ -131,17 +131,17 @@ static int qcow2_cache_entry_flush(BlockDriverState *bs,
Qcow2Cache *c, int i)
return 0;
}
-int qcow2_cache_flush(BlockDriverState *bs, Qcow2Cache *c)
+int block_cache_flush(BlockDriverState *bs, BlockCache *c)
{
BDRVQcowState *s = bs->opaque;
int result = 0;
int ret;
int i;
-trace_qcow2_cache_flush(qemu_coroutine_self(), c == s->l2_table_cache);
+trace_block_cache_flush(qemu_coroutine_self(), c == s->l2_table_cache);
for (i = 0; i < c->size; i++) {
-ret = qcow2_cache_entry_flush(bs, c, i);
+ret = block_cache_entry_flush(bs, c, i);
if (ret < 0 && result != -ENOSPC) {
result = ret;
}
@@ -157,20 +157,20 @@ int qcow2_cache_flush(BlockDriverState *bs, Qcow2Cache *c)
return result;
}
-int qcow2_cache_set_dependency(BlockDriverState *bs, Qcow2Cache *c,
-Qcow2Cache *dependency)
+int block_cache_set_dependency(BlockDriverState *bs, BlockCache *c,
+BlockCache *dependency)
{
int ret;
if (dependency->depends) {
-ret = qcow2_cache_flush_dependency(bs, dependency);
+ret = block_cache_flush_dependency(bs, dependency);
if (ret < 0) {
return ret;
}
}
if (c->depends && (c->depends != dependency)) {
-ret = qcow2_cache_flush_dependency(bs, c);
+ret = block_cache_flush_dependency(bs, c);
if (ret < 0) {
return ret;
}
@@ -180,12 +180,12 @@ int qcow2_cache_set_dependency(BlockDriverState *bs,
Qcow2Cache *c,
return 0;
}
-void qcow2_cache_depends_on_flush(Qcow2Cache *c)
+void block_cache_depends_on_flush(BlockCache *c)
{
c->depends_on_flush = true;
}
-static int qcow2_cache_find_entry_to_replace(Qcow2Cache *c)
+static int block_cache_find_entry_to_replace(BlockCache *c)
{
int i;
int min_count = INT_MAX;
@@ -215,14 +215,14 @@ static int qcow2_cache_find_entry_to_replace(Qcow2Cache
*c)
return min_i
Re: [Qemu-devel] [PATCH] hw: fix to display correct memory size
On 23.08.2013, at 15:57, Yongbok Kim wrote:
> A parenthesis placed inappropriately caused displaying
> wrong memory size bigger than 4GB.
>
> Signed-off-by: Yongbok Kim
Acked-by: Alexander Graf
I think this should easily go in through the qemu-trivial queue.
Alex
> ---
> hw/mips/mips_malta.c |2 +-
> hw/mips/mips_r4k.c|2 +-
> hw/ppc/mac_oldworld.c |2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index f8d064c..23ac1ca 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -954,7 +954,7 @@ void mips_malta_init(QEMUMachineInitArgs *args)
> if (ram_size > (256 << 20)) {
> fprintf(stderr,
> "qemu: Too much memory for this machine: %d MB, maximum 256
> MB\n",
> -((unsigned int)ram_size / (1 << 20)));
> +(unsigned int)(ram_size / (1 << 20)));
> exit(1);
> }
> memory_region_init_ram(ram, NULL, "mips_malta.ram", ram_size);
> diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
> index 044f232..e8108ac 100644
> --- a/hw/mips/mips_r4k.c
> +++ b/hw/mips/mips_r4k.c
> @@ -201,7 +201,7 @@ void mips_r4k_init(QEMUMachineInitArgs *args)
> if (ram_size > (256 << 20)) {
> fprintf(stderr,
> "qemu: Too much memory for this machine: %d MB, maximum 256
> MB\n",
> -((unsigned int)ram_size / (1 << 20)));
> +(unsigned int)(ram_size / (1 << 20)));
> exit(1);
> }
> memory_region_init_ram(ram, NULL, "mips_r4k.ram", ram_size);
> diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
> index 42bb9d5..d7d1758 100644
> --- a/hw/ppc/mac_oldworld.c
> +++ b/hw/ppc/mac_oldworld.c
> @@ -124,7 +124,7 @@ static void ppc_heathrow_init(QEMUMachineInitArgs *args)
> if (ram_size > (2047 << 20)) {
> fprintf(stderr,
> "qemu: Too much memory for this machine: %d MB, maximum 2047
> MB\n",
> -((unsigned int)ram_size / (1 << 20)));
> +(unsigned int)(ram_size / (1 << 20)));
> exit(1);
> }
>
> --
> 1.7.4
>
>
[Qemu-devel] [PATCH V20 7/8] add-cow file format core code
add-cow file format core code. It use block-cache.c as cache code.
It lacks of snapshot_blkdev support.
v18->v19:
1) add aio parallel write support.
2) fix flush method.
v17-v18:
1) use error_report, not fprintf.
2) remove version field from header.
3) header_size is MAX(cluster_size, 4096).
4) introduce s->cluster_sectors.
5) use BLKDBG_L2_LOAD/UPDATE.
v16->v17:
1) Use stringify.
v15->v16:
1) Judge if opts is null in add_cow_create function.
Signed-off-by: Dong Xu Wang
---
block/Makefile.objs | 1 +
block/add-cow.c | 824 ++
include/block/block_int.h | 2 +
3 files changed, 827 insertions(+)
create mode 100644 block/add-cow.c
diff --git a/block/Makefile.objs b/block/Makefile.objs
index 69e5584..7f56d71 100644
--- a/block/Makefile.objs
+++ b/block/Makefile.objs
@@ -1,6 +1,7 @@
block-obj-y += raw.o cow.o qcow.o vdi.o vmdk.o cloop.o dmg.o bochs.o vpc.o
vvfat.o
block-obj-y += qcow2.o qcow2-refcount.o qcow2-cluster.o qcow2-snapshot.o
block-obj-y += block-cache.o
+block-obj-y += add-cow.o
block-obj-y += qed.o qed-gencb.o qed-l2-cache.o qed-table.o qed-cluster.o
block-obj-y += qed-check.o
block-obj-y += vhdx.o
diff --git a/block/add-cow.c b/block/add-cow.c
new file mode 100644
index 000..af766543
--- /dev/null
+++ b/block/add-cow.c
@@ -0,0 +1,824 @@
+/*
+ * QEMU ADD-COW Disk Format
+ *
+ * Copyright IBM, Corp. 2012
+ *
+ * Authors:
+ * Dong Xu Wang
+ *
+ * This work is licensed under the terms of the GNU LGPL, version 2 or later.
+ * See the COPYING.LIB file in the top-level directory.
+ *
+ */
+
+#include "qemu-common.h"
+#include "block/block_int.h"
+#include "qemu/module.h"
+#include "block/block-cache.h"
+
+#define ACOW_CLUSTER_SIZE 65536
+
+typedef struct AddCowMeta {
+uint64_t start_sector;
+int remaining_sectors;
+CoQueue dependent_requests;
+struct AddCowMeta *next;
+
+QLIST_ENTRY(AddCowMeta) next_in_flight;
+} AddCowMeta;
+
+enum {
+/* compat_features bit */
+ACOW_F_ALL_ALLOCATED= 0X01,
+
+/* none feature bit used now */
+ACOW_FEATURE_MASK = 0,
+
+ACOW_MAGIC = 'A' | 'C' << 8 | 'O' << 16 | 'W' << 24,
+ACOW_CACHE_SIZE = 16,
+DEFAULT_HEADER_SIZE = 4096,
+MIN_CLUSTER_BITS= 12,
+MAX_CLUSTER_BITS= 21,
+};
+
+typedef struct AddCowHeader {
+uint32_tmagic;
+
+uint32_tbacking_offset;
+uint32_tbacking_size;
+uint32_timage_offset;
+uint32_timage_size;
+
+uint32_tcluster_bits;
+uint64_tfeatures;
+uint64_tcompat_features;
+uint32_theader_size;
+
+charbacking_fmt[16];
+charimage_fmt[16];
+} QEMU_PACKED AddCowHeader;
+
+typedef struct BDRVAddCowState {
+BlockDriverState*image_hd;
+CoMutex lock;
+int cluster_size;
+int cluster_sectors;
+BlockCache *bitmap_cache;
+uint64_tbitmap_size;
+AddCowHeaderheader;
+charbacking_fmt[16];
+charimage_fmt[16];
+BlockCache *image_hd_cache;
+QLIST_HEAD(AddCowAlloc, AddCowMeta) cluster_allocs;
+} BDRVAddCowState;
+
+/* Convert sector_num to offset in bitmap */
+static inline int64_t offset_in_bitmap(int64_t sector_num,
+ int64_t cluster_sectors)
+{
+int64_t cluster_num = sector_num / cluster_sectors;
+return cluster_num / 8;
+}
+
+static inline bool is_cluster_head(int64_t sector_num,
+ int64_t cluster_sectors)
+{
+return sector_num % cluster_sectors == 0;
+}
+
+static inline bool is_cluster_tail(int64_t sector_num,
+ int64_t cluster_sectors)
+{
+return (sector_num + 1) % cluster_sectors == 0;
+}
+
+static void add_cow_header_le_to_cpu(const AddCowHeader *le, AddCowHeader *cpu)
+{
+cpu->magic = le32_to_cpu(le->magic);
+
+cpu->backing_offset = le32_to_cpu(le->backing_offset);
+cpu->backing_size = le32_to_cpu(le->backing_size);
+cpu->image_offset = le32_to_cpu(le->image_offset);
+cpu->image_size = le32_to_cpu(le->image_size);
+
+cpu->cluster_bits = le32_to_cpu(le->cluster_bits);
+cpu->features = le64_to_cpu(le->features);
+cpu->compat_features= le64_to_cpu(le->compat_features);
+cpu->header_size= le32_to_cpu(le->header_size);
+
+memcpy(cpu->backing_fmt, le->backing_fmt, sizeof(cpu->backing_fmt));
+memcpy(cpu->image_fmt, le->image_fmt, sizeof(cpu->image_fmt));
+}
+
+static void add_cow_header_cpu_to_le(const AddCowHeader *cpu, AddCowHeader *le)
+{
+le->magic = cpu_to_le32(cpu->magic);
+
+le->backing_offset = cpu_to_le32(cpu->backing_offset);
+le->backing_size= cpu_to_le32(cpu->backing_size);
+le->image_offset= cpu_to_le32(cpu->image_offset);
+le->image_size =
[Qemu-devel] [PATCH V20 5/8] move qcow2-cache.c to block-cache.c
Will use block cache as common interface, so move qcow2-cache.c
to block-cache.c,
Signed-off-by: Dong Xu Wang
---
block/Makefile.objs | 3 +-
block/block-cache.c | 323
block/qcow2-cache.c | 323
block/qcow2.h | 2 +-
4 files changed, 326 insertions(+), 325 deletions(-)
create mode 100644 block/block-cache.c
delete mode 100644 block/qcow2-cache.c
diff --git a/block/Makefile.objs b/block/Makefile.objs
index 4cf9aa4..69e5584 100644
--- a/block/Makefile.objs
+++ b/block/Makefile.objs
@@ -1,5 +1,6 @@
block-obj-y += raw.o cow.o qcow.o vdi.o vmdk.o cloop.o dmg.o bochs.o vpc.o
vvfat.o
-block-obj-y += qcow2.o qcow2-refcount.o qcow2-cluster.o qcow2-snapshot.o
qcow2-cache.o
+block-obj-y += qcow2.o qcow2-refcount.o qcow2-cluster.o qcow2-snapshot.o
+block-obj-y += block-cache.o
block-obj-y += qed.o qed-gencb.o qed-l2-cache.o qed-table.o qed-cluster.o
block-obj-y += qed-check.o
block-obj-y += vhdx.o
diff --git a/block/block-cache.c b/block/block-cache.c
new file mode 100644
index 000..bc057a8
--- /dev/null
+++ b/block/block-cache.c
@@ -0,0 +1,323 @@
+/*
+ * L2/refcount table cache for the QCOW2 format
+ *
+ * Copyright (c) 2010 Kevin Wolf
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "block/block_int.h"
+#include "qemu-common.h"
+#include "qcow2.h"
+#include "trace.h"
+
+typedef struct BlockCachedTable {
+void* table;
+int64_t offset;
+booldirty;
+int cache_hits;
+int ref;
+} BlockCachedTable;
+
+struct BlockCache {
+BlockCachedTable* entries;
+struct BlockCache* depends;
+int size;
+booldepends_on_flush;
+};
+
+BlockCache *block_cache_create(BlockDriverState *bs, int num_tables)
+{
+BDRVQcowState *s = bs->opaque;
+BlockCache *c;
+int i;
+
+c = g_malloc0(sizeof(*c));
+c->size = num_tables;
+c->entries = g_malloc0(sizeof(*c->entries) * num_tables);
+
+for (i = 0; i < c->size; i++) {
+c->entries[i].table = qemu_blockalign(bs, s->cluster_size);
+}
+
+return c;
+}
+
+int block_cache_destroy(BlockDriverState* bs, BlockCache *c)
+{
+int i;
+
+for (i = 0; i < c->size; i++) {
+assert(c->entries[i].ref == 0);
+qemu_vfree(c->entries[i].table);
+}
+
+g_free(c->entries);
+g_free(c);
+
+return 0;
+}
+
+static int block_cache_flush_dependency(BlockDriverState *bs, BlockCache *c)
+{
+int ret;
+
+ret = block_cache_flush(bs, c->depends);
+if (ret < 0) {
+return ret;
+}
+
+c->depends = NULL;
+c->depends_on_flush = false;
+
+return 0;
+}
+
+static int block_cache_entry_flush(BlockDriverState *bs, BlockCache *c, int i)
+{
+BDRVQcowState *s = bs->opaque;
+int ret = 0;
+
+if (!c->entries[i].dirty || !c->entries[i].offset) {
+return 0;
+}
+
+trace_block_cache_entry_flush(qemu_coroutine_self(),
+ c == s->l2_table_cache, i);
+
+if (c->depends) {
+ret = block_cache_flush_dependency(bs, c);
+} else if (c->depends_on_flush) {
+ret = bdrv_flush(bs->file);
+if (ret >= 0) {
+c->depends_on_flush = false;
+}
+}
+
+if (ret < 0) {
+return ret;
+}
+
+if (c == s->refcount_block_cache) {
+BLKDBG_EVENT(bs->file, BLKDBG_REFBLOCK_UPDATE_PART);
+} else if (c == s->l2_table_cache) {
+BLKDBG_EVENT(bs->file, BLKDBG_L2_UPDATE);
+}
+
+ret = bdrv_pwrite(bs->file, c->entries[i].offset, c->entries[i].table,
+s->cluster_size);
+if (ret < 0) {
+return ret;
+}
+
+c->entries[i].dirty = false;
+
+return 0;
+}
+
+int block_cache_flush(BlockDriverState *bs, BlockCache *c)
+{
+BDRVQcowState *s = bs->opaque;
+int result = 0;
+int ret;
+int i;
+
+trace_block_cache_flush(qe
[Qemu-devel] [PATCH V20 6/8] Make block-cache.c be common interface
To use block-cache.c be common cache interface, we need to add
some parameter to identify cache's type.
Define a struct named BlockTableType, pass BlockTableType and
table size parameters to block cache initialization function.
v17-v18:
1) move struct to source file.
2) cluster_size->table_size.
Signed-off-by: Dong Xu Wang
---
block/block-cache.c | 85 +++
block/block-cache.h | 59 +++
block/qcow2.c | 7 +++--
block/qcow2.h | 25 ++-
include/block/block.h | 3 ++
5 files changed, 122 insertions(+), 57 deletions(-)
create mode 100644 block/block-cache.h
diff --git a/block/block-cache.c b/block/block-cache.c
index bc057a8..a05418f 100644
--- a/block/block-cache.c
+++ b/block/block-cache.c
@@ -1,4 +1,8 @@
/*
+ * QEMU Block Layer Cache
+ *
+ * This file is based on qcow2-cache.c, see its copyrights below:
+ *
* L2/refcount table cache for the QCOW2 format
*
* Copyright (c) 2010 Kevin Wolf
@@ -24,11 +28,11 @@
#include "block/block_int.h"
#include "qemu-common.h"
-#include "qcow2.h"
#include "trace.h"
+#include "block/block-cache.h"
typedef struct BlockCachedTable {
-void* table;
+void*table;
int64_t offset;
booldirty;
int cache_hits;
@@ -36,30 +40,34 @@ typedef struct BlockCachedTable {
} BlockCachedTable;
struct BlockCache {
-BlockCachedTable* entries;
-struct BlockCache* depends;
-int size;
-booldepends_on_flush;
+BlockCachedTable*entries;
+struct BlockCache *depends;
+int size;
+size_t table_size;
+BlockTableType table_type;
+booldepends_on_flush;
};
-BlockCache *block_cache_create(BlockDriverState *bs, int num_tables)
+BlockCache *block_cache_create(BlockDriverState *bs, int num_tables,
+ size_t table_size, BlockTableType type)
{
-BDRVQcowState *s = bs->opaque;
BlockCache *c;
int i;
c = g_malloc0(sizeof(*c));
c->size = num_tables;
c->entries = g_malloc0(sizeof(*c->entries) * num_tables);
+c->table_type = type;
+c->table_size = table_size;
for (i = 0; i < c->size; i++) {
-c->entries[i].table = qemu_blockalign(bs, s->cluster_size);
+c->entries[i].table = qemu_blockalign(bs, table_size);
}
return c;
}
-int block_cache_destroy(BlockDriverState* bs, BlockCache *c)
+int block_cache_destroy(BlockDriverState *bs, BlockCache *c)
{
int i;
@@ -91,15 +99,13 @@ static int block_cache_flush_dependency(BlockDriverState
*bs, BlockCache *c)
static int block_cache_entry_flush(BlockDriverState *bs, BlockCache *c, int i)
{
-BDRVQcowState *s = bs->opaque;
int ret = 0;
if (!c->entries[i].dirty || !c->entries[i].offset) {
return 0;
}
-trace_block_cache_entry_flush(qemu_coroutine_self(),
- c == s->l2_table_cache, i);
+trace_block_cache_entry_flush(qemu_coroutine_self(), c->table_type, i);
if (c->depends) {
ret = block_cache_flush_dependency(bs, c);
@@ -114,14 +120,16 @@ static int block_cache_entry_flush(BlockDriverState *bs,
BlockCache *c, int i)
return ret;
}
-if (c == s->refcount_block_cache) {
+if (c->table_type == BLOCK_TABLE_REF) {
BLKDBG_EVENT(bs->file, BLKDBG_REFBLOCK_UPDATE_PART);
-} else if (c == s->l2_table_cache) {
+} else if (c->table_type == BLOCK_TABLE_L2) {
BLKDBG_EVENT(bs->file, BLKDBG_L2_UPDATE);
+} else if (c->table_type == BLOCK_TABLE_BITMAP) {
+BLKDBG_EVENT(bs->file, BLKDBG_ADDCOW_WRITE);
}
-ret = bdrv_pwrite(bs->file, c->entries[i].offset, c->entries[i].table,
-s->cluster_size);
+ret = bdrv_pwrite(bs->file, c->entries[i].offset,
+ c->entries[i].table, c->table_size);
if (ret < 0) {
return ret;
}
@@ -133,12 +141,11 @@ static int block_cache_entry_flush(BlockDriverState *bs,
BlockCache *c, int i)
int block_cache_flush(BlockDriverState *bs, BlockCache *c)
{
-BDRVQcowState *s = bs->opaque;
int result = 0;
int ret;
int i;
-trace_block_cache_flush(qemu_coroutine_self(), c == s->l2_table_cache);
+trace_block_cache_flush(qemu_coroutine_self(), c->table_type);
for (i = 0; i < c->size; i++) {
ret = block_cache_entry_flush(bs, c, i);
@@ -157,13 +164,15 @@ int block_cache_flush(BlockDriverState *bs, BlockCache *c)
return result;
}
-int block_cache_set_dependency(BlockDriverState *bs, BlockCache *c,
-BlockCache *dependency)
+int block_cache_set_dependency_two_bs(BlockDriverState *bs,
+ BlockCache *c,
+ BlockDriverState *depend_bs,
+ BlockCache *dependency)
{
int ret;
if (dependency->depen
Re: [Qemu-devel] [PATCH] hw: fix to display correct memory size
On 23.08.2013, at 17:20, Andreas Färber wrote:
> Am 23.08.2013 16:57, schrieb Yongbok Kim:
>> A parenthesis placed inappropriately caused displaying
>> wrong memory size bigger than 4GB.
>>
>> Signed-off-by: Yongbok Kim
>> ---
>> hw/mips/mips_malta.c |2 +-
>> hw/mips/mips_r4k.c|2 +-
>> hw/ppc/mac_oldworld.c |2 +-
>> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> Thanks for fixing this even beyond MIPS machines!
>
> In theory I would've preferred a patch using the correct format string
> and dropping the unsigned int cast completely, but our RAM_ADDR_FMT uses
> hexadecimal format, so:
>
> Reviewed-by: Andreas Färber
>
>> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
>> index f8d064c..23ac1ca 100644
>> --- a/hw/mips/mips_malta.c
>> +++ b/hw/mips/mips_malta.c
>> @@ -954,7 +954,7 @@ void mips_malta_init(QEMUMachineInitArgs *args)
>> if (ram_size > (256 << 20)) {
>> fprintf(stderr,
>> "qemu: Too much memory for this machine: %d MB, maximum 256
>> MB\n",
>> -((unsigned int)ram_size / (1 << 20)));
>> +(unsigned int)(ram_size / (1 << 20)));
>
> Seeing that in the Malta case your other patch will trivially conflict
> with this bugfix, would you have time to turn it into a series of three
> patches, this being the first and adding "Cc: qemu-sta...@nongnu.org" to
> its commit message for inclusion in 1.6.1, then an additional patch
> replacing fprintf(stderr, "qemu: ...\n", ...) with error_report("...",
> ...) (note no trailing \n and it will also automatically prefix the
> right qemu-system-mips* executable name) and finally your 2 GiB patch?
Ah, saw this comment too late. Andreas' suggestions is obviously even better :).
Alex
Re: [Qemu-devel] [PATCH] spapr-vscsi: Report error on unsupported MAD requests
On 23.08.2013, at 10:23, Alexey Kardashevskiy wrote:
> The existing driver just dropped unsupported requests. This adds error
> responses to those unhandled requests.
>
> Signed-off-by: Alexey Kardashevskiy
> ---
> hw/scsi/spapr_vscsi.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c
> index cc35b1b..9259d7e 100644
> --- a/hw/scsi/spapr_vscsi.c
> +++ b/hw/scsi/spapr_vscsi.c
> @@ -957,24 +957,24 @@ static int vscsi_handle_mad_req(VSCSIState *s,
> vscsi_req *req)
> break;
> case VIOSRP_ERROR_LOG_TYPE:
> fprintf(stderr, "Unsupported ERROR LOG MAD IU\n");
These should probably be error_report() calls.
> -mad->error_log.common.status = cpu_to_be16(1);
> -vscsi_send_iu(s, req, sizeof(mad->error_log), VIOSRP_MAD_FORMAT);
This changes the reply from sizeof(mad->error_log) to
mad->empty_io.common.length. Is this correct?
> break;
> case VIOSRP_ADAPTER_INFO_TYPE:
> vscsi_send_adapter_info(s, req);
> -break;
> +return 1;
Please turn this into a boolean variable that tells the common code below that
we've successfully handled the request.
> case VIOSRP_HOST_CONFIG_TYPE:
> -mad->host_config.common.status = cpu_to_be16(1);
> -vscsi_send_iu(s, req, sizeof(mad->host_config), VIOSRP_MAD_FORMAT);
> +fprintf(stderr, "Unsupported HOST CONFIG TYPE MAD IU\n");
> break;
> case VIOSRP_CAPABILITIES_TYPE:
> vscsi_send_capabilities(s, req);
> -break;
> +return 1;
> default:
> fprintf(stderr, "VSCSI: Unknown MAD type %02x\n",
> be32_to_cpu(mad->empty_iu.common.type));
> }
>
then you can just put the handling below in an
if (!request_handled) { }
block which makes the code a lot easier to follow. Multiple exit points of a
function are a pretty regular source of breakage, because you're very likely to
miss one.
> +mad->empty_iu.common.status = cpu_to_be16(VIOSRP_MAD_NOT_SUPPORTED);
> +vscsi_send_iu(s, req, mad->empty_iu.common.length, VIOSRP_MAD_FORMAT);
Doesn't the length have to be endianness swapped too?
Alex
> +
> return 1;
> }
>
> --
> 1.8.4.rc4
>
Re: [Qemu-devel] [RFC] TCG unit testing
On 08/23/2013 01:42 PM, Stefan Weil wrote: > Am 23.08.2013 21:47, schrieb Richard Henderson: >> I've been thinking for a while about how to reliably test TCG backends, and >> maybe how to do regression testing on them. Having to begin the test from a >> guest binary, especially considering the vast cross-compilation problem, is >> pretty much a non-starter. >> >> I've been thinking of a truly stripped down target for the purpose, with a >> special-purpose machine loop and main to go with it. I.e. avoid vl.c. >> >> My current idea is that the test file consists of 3 sections: guest memory >> layout, raw TBs, and expected results. Perhaps best explained with some >> examples: >> >> (1a) I've split up this test into two TBs to prevent some constant folding. >> (1b) The guest machine should have enough registers to make it easy to >> perform >> lots of tests at once. Even better if we can avoid the complication of >> memory. >> > [...] >> Thoughts? Anything that we ought to be testing that I haven't thought of >> here, >> and that this sort of structure couldn't support? >> >> It may be some time before I can progress this enough to usefulness, but I >> wanted to get this written down while it is fresh in my head. >> >> >> r~ > > Since the addition of the TCG interpreter backend, there exist two > backends for each supported host. It is possible to run user code > with well defined instruction order (no asynchronous events like > interrupts) with both backends and to compare the execution > flow. I did that while developing TCI. The process can be reversed: > TCI could be used as reference to test any other backend. > > Another approach for testing TCG backends might work like this: > > Modifying QEMU so that it is possible to feed the TCG backend > with single TCG opcodes would allow testing some part of the > processing chain: > > target opcodes -> tcg opcodes -> host opcodes I don't see how TCI really comes into this except as Yet Another Backend to be tested. Indeed, such unit testing could show that TCI is in fact broken wrt helpers, depending on the host abi. E.g. tci never defines TCG_TARGET_CALL_ALIGN_ARGS. Thus if one uses tci on an ARM host, a helper like DEF_HELPER_FLAGS_2(store_fpcr, TCG_CALL_NO_RWG, void, env, i64) will have its arguments loaded into TCI's R0, R1, R2, and thence into the ARM r0, r1, r2. But the ARM abi requires the i64 input to be aligned, and thus it should be r0, r2, r3. r~
Re: [Qemu-devel] [PATCH] spapr-vscsi: Adding VSCSI capabilities
On 23.08.2013, at 10:22, Alexey Kardashevskiy wrote:
> From: Nikunj A Dadhania
>
> This implements capabilities exchange between host and client.
> As at the moment no capability is supported, put zero flags everywhere
> and return.
>
> Signed-off-by: Nikunj A Dadhania
> Signed-off-by: Alexey Kardashevskiy
> ---
> hw/scsi/spapr_vscsi.c | 31 +++
> 1 file changed, 31 insertions(+)
>
> diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c
> index c5ff794..cc35b1b 100644
> --- a/hw/scsi/spapr_vscsi.c
> +++ b/hw/scsi/spapr_vscsi.c
> @@ -919,6 +919,34 @@ static int vscsi_send_adapter_info(VSCSIState *s,
> vscsi_req *req)
> return vscsi_send_iu(s, req, sizeof(*sinfo), VIOSRP_MAD_FORMAT);
> }
>
> +static int vscsi_send_capabilities(VSCSIState *s, vscsi_req *req)
> +{
> +struct viosrp_capabilities *vcap;
> +struct capabilities cap;
> +int rc;
> +
> +vcap = &req->iu.mad.capabilities;
> +rc = spapr_vio_dma_read(&s->vdev, be64_to_cpu(vcap->buffer),
> +&cap, be16_to_cpu(vcap->common.length));
While I don't think any harm could happen from it, this could lead to a
potential timing attack where we read and write from different locations in
memory if the guest swizzles the request while we're processing it.
It's certainly better style (read: makes it easier to prove this doesn't happen
when it really is important) to read the variables into local variables and
reuse them there. In this case it mostly helps readability to make sure here
and below are the same variables.
> +if (rc) {
> +fprintf(stderr, "vscsi_send_capabilities: DMA write failure !\n");
This is a DMA read, no? Also this should be error_report.
> +}
> +
> +cap.flags = 0;
> +cap.migration.ecl = 0;
> +cap.reserve.type = 0;
> +cap.migration.common.server_support = 0;
> +cap.reserve.common.server_support = 0;
Is this a memset(0)?
Alex
> +rc = spapr_vio_dma_write(&s->vdev, be64_to_cpu(vcap->buffer),
> + &cap, be16_to_cpu(vcap->common.length));
> +if (rc) {
> +fprintf(stderr, "vscsi_send_capabilities: DMA write failure !\n");
> +}
> +vcap->common.status = rc ? cpu_to_be32(1) : 0;
> +
> +return vscsi_send_iu(s, req, sizeof(*vcap), VIOSRP_MAD_FORMAT);
> +}
> +
> static int vscsi_handle_mad_req(VSCSIState *s, vscsi_req *req)
> {
> union mad_iu *mad = &req->iu.mad;
> @@ -939,6 +967,9 @@ static int vscsi_handle_mad_req(VSCSIState *s, vscsi_req
> *req)
> mad->host_config.common.status = cpu_to_be16(1);
> vscsi_send_iu(s, req, sizeof(mad->host_config), VIOSRP_MAD_FORMAT);
> break;
> +case VIOSRP_CAPABILITIES_TYPE:
> +vscsi_send_capabilities(s, req);
> +break;
> default:
> fprintf(stderr, "VSCSI: Unknown MAD type %02x\n",
> be32_to_cpu(mad->empty_iu.common.type));
> --
> 1.8.4.rc4
>
Re: [Qemu-devel] [RFC] TCG unit testing
On 23 August 2013 22:18, Richard Henderson wrote: > E.g. tci never defines TCG_TARGET_CALL_ALIGN_ARGS. Thus if one uses tci on an > ARM host, a helper like > > DEF_HELPER_FLAGS_2(store_fpcr, TCG_CALL_NO_RWG, void, env, i64) > > will have its arguments loaded into TCI's R0, R1, R2, and thence into the ARM > r0, r1, r2. But the ARM abi requires the i64 input to be aligned, and thus it > should be r0, r2, r3. Oh, TCI does that? That's just broken -- you can't treat all helpers the same that way. You either need to have a bit of per-CPU glue code which knows how to adjust things to the calling convention (which would defeat the point of TCI being CPU-independent) or you need to defer to a library that can do it (libffi would be the obvious choice) or you need to actually have the C code in the interpreter make the call with all the correct argument types (should be technically possible for qemu I guess since we have a fixed set of helper functions and we know the types at compile time, though it might be kind of painful). -- PMM
Re: [Qemu-devel] [PATCH for-1.6? v2 21/21] qtest: Prepare QOM machine tests
On 05.08.2013, at 14:27, Andreas Färber wrote:
> Instantiate all [*] machines per target, so that they get a bit of test
> coverage at all. This has proven helpful during QOM refactorings.
>
> [*] ppcemb target contains some non-working non-embedded machines, and
> ppc405 CPUs are not available there either.
So I just looked up the spec and ppc405 does support 1k TLB entries, so it is
eligible for the ppcemb target. The fact that it doesn't work is a bug :).
> i386 and x86_64 do not cover pc*-x.y or xenfv.
>
> Signed-off-by: Andreas Färber
> ---
> tests/Makefile | 26 ++
> tests/qom-test.c | 280 +++
> 2 files changed, 306 insertions(+)
> create mode 100644 tests/qom-test.c
>
> diff --git a/tests/Makefile b/tests/Makefile
> index d044908..a7e1319 100644
> --- a/tests/Makefile
> +++ b/tests/Makefile
> @@ -63,25 +63,50 @@ check-qtest-i386-y += tests/boot-order-test$(EXESUF)
> check-qtest-i386-y += tests/rtc-test$(EXESUF)
> check-qtest-i386-y += tests/i440fx-test$(EXESUF)
> check-qtest-i386-y += tests/fw_cfg-test$(EXESUF)
> +check-qtest-i386-y += tests/qom-test$(EXESUF)
> check-qtest-x86_64-y = $(check-qtest-i386-y)
> gcov-files-i386-y += i386-softmmu/hw/mc146818rtc.c
> gcov-files-x86_64-y = $(subst
> i386-softmmu/,x86_64-softmmu/,$(gcov-files-i386-y))
> check-qtest-mips-y = tests/endianness-test$(EXESUF)
> check-qtest-mips64-y = tests/endianness-test$(EXESUF)
> check-qtest-mips64el-y = tests/endianness-test$(EXESUF)
> +check-qtest-mips-y += tests/qom-test$(EXESUF)
> +check-qtest-mipsel-y += tests/qom-test$(EXESUF)
> +check-qtest-mips64-y += tests/qom-test$(EXESUF)
> +check-qtest-mips64el-y += tests/qom-test$(EXESUF)
> check-qtest-ppc-y = tests/endianness-test$(EXESUF)
> check-qtest-ppc64-y = tests/endianness-test$(EXESUF)
> check-qtest-sh4-y = tests/endianness-test$(EXESUF)
> check-qtest-sh4eb-y = tests/endianness-test$(EXESUF)
> +check-qtest-sh4-y += tests/qom-test$(EXESUF)
> +check-qtest-sh4eb-y += tests/qom-test$(EXESUF)
> check-qtest-sparc64-y = tests/endianness-test$(EXESUF)
> #check-qtest-sparc-y = tests/m48t59-test$(EXESUF)
> #check-qtest-sparc64-y += tests/m48t59-test$(EXESUF)
> gcov-files-sparc-y += hw/m48t59.c
> gcov-files-sparc64-y += hw/m48t59.c
> +check-qtest-sparc-y += tests/qom-test$(EXESUF)
> +check-qtest-sparc64-y += tests/qom-test$(EXESUF)
> check-qtest-arm-y = tests/tmp105-test$(EXESUF)
> gcov-files-arm-y += hw/tmp105.c
> +check-qtest-arm-y += tests/qom-test$(EXESUF)
> check-qtest-ppc-y += tests/boot-order-test$(EXESUF)
> check-qtest-ppc64-y += tests/boot-order-test$(EXESUF)
> +check-qtest-ppc-y += tests/qom-test$(EXESUF)
> +check-qtest-ppc64-y += tests/qom-test$(EXESUF)
> +check-qtest-ppcemb-y += tests/qom-test$(EXESUF)
> +check-qtest-alpha-y += tests/qom-test$(EXESUF)
> +check-qtest-cris-y += tests/qom-test$(EXESUF)
> +check-qtest-lm32-y += tests/qom-test$(EXESUF)
> +check-qtest-m68k-y += tests/qom-test$(EXESUF)
> +check-qtest-microblaze-y += tests/qom-test$(EXESUF)
> +check-qtest-microblazeel-y = $(check-qtest-microblaze-y)
> +check-qtest-moxie-y += tests/qom-test$(EXESUF)
> +check-qtest-or32-y += tests/qom-test$(EXESUF)
> +check-qtest-s390x-y += tests/qom-test$(EXESUF)
> +check-qtest-unicore32-y += tests/qom-test$(EXESUF)
> +check-qtest-xtensa-y += tests/qom-test$(EXESUF)
> +check-qtest-xtensaeb-y = $(check-qtest-xtensa-y)
>
> check-qapi-schema-y := $(addprefix tests/qapi-schema/, \
> comments.json empty.json funny-char.json indented-expr.json \
> @@ -161,6 +186,7 @@ tests/boot-order-test$(EXESUF): tests/boot-order-test.o
> $(libqos-obj-y)
> tests/tmp105-test$(EXESUF): tests/tmp105-test.o $(libqos-omap-obj-y)
> tests/i440fx-test$(EXESUF): tests/i440fx-test.o $(libqos-pc-obj-y)
> tests/fw_cfg-test$(EXESUF): tests/fw_cfg-test.o $(libqos-pc-obj-y)
> +tests/qom-test$(EXESUF): tests/qom-test.o
>
> # QTest rules
>
> diff --git a/tests/qom-test.c b/tests/qom-test.c
> new file mode 100644
> index 000..c9494e0
> --- /dev/null
> +++ b/tests/qom-test.c
> @@ -0,0 +1,280 @@
> +/*
> + * QTest testcase for QOM
> + *
> + * Copyright (c) 2013 SUSE LINUX Products GmbH
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + */
> +#include "libqtest.h"
> +
> +#include
> +#include
> +#include "qemu/osdep.h"
> +
> +static void test_nop(gconstpointer data)
> +{
> +QTestState *s;
> +const char *machine = data;
> +char *args;
> +
> +args = g_strdup_printf("-display none -machine %s", machine);
> +s = qtest_start(args);
> +if (s) {
> +qtest_quit(s);
> +}
> +g_free(args);
> +}
> +
> +static const char *x86_machines[] = {
> +"pc",
> +"isapc",
> +"q35",
> +};
> +
> +static const char *alpha_machines[] = {
> +"clipper",
> +};
> +
> +static const char *arm_machines[] = {
> +"integratorcp",
> +"versatilepb",
> +"versatileab",
> +"lm3s811evb",
> +"lm3s6965evb",
> +"col
Re: [Qemu-devel] [PATCH for-1.6? v2 21/21] qtest: Prepare QOM machine tests
On 5 August 2013 14:27, Andreas Färber wrote:
> +static const char *arm_machines[] = {
> +"integratorcp",
> +"versatilepb",
> +"versatileab",
> +"lm3s811evb",
> +"lm3s6965evb",
> +"collie",
[etc]
I'd rather have these tests than not have them, but can't we autodetect
the list of machines (by parsing the output of -M help, or otherwise)?
-- PMM
Re: [Qemu-devel] [PATCH for-1.6? v2 21/21] qtest: Prepare QOM machine tests
Am 25.08.2013 19:22, schrieb Alexander Graf:
>
> On 05.08.2013, at 14:27, Andreas Färber wrote:
>
>> Instantiate all [*] machines per target, so that they get a bit of test
>> coverage at all. This has proven helpful during QOM refactorings.
>>
>> [*] ppcemb target contains some non-working non-embedded machines, and
>> ppc405 CPUs are not available there either.
>
> So I just looked up the spec and ppc405 does support 1k TLB entries, so it is
> eligible for the ppcemb target. The fact that it doesn't work is a bug :).
Thanks for clarifying!
>> i386 and x86_64 do not cover pc*-x.y or xenfv.
>>
>> Signed-off-by: Andreas Färber
>> ---
>> tests/Makefile | 26 ++
>> tests/qom-test.c | 280
>> +++
>> 2 files changed, 306 insertions(+)
>> create mode 100644 tests/qom-test.c
>>
>> diff --git a/tests/Makefile b/tests/Makefile
>> index d044908..a7e1319 100644
>> --- a/tests/Makefile
>> +++ b/tests/Makefile
>> @@ -63,25 +63,50 @@ check-qtest-i386-y += tests/boot-order-test$(EXESUF)
>> check-qtest-i386-y += tests/rtc-test$(EXESUF)
>> check-qtest-i386-y += tests/i440fx-test$(EXESUF)
>> check-qtest-i386-y += tests/fw_cfg-test$(EXESUF)
>> +check-qtest-i386-y += tests/qom-test$(EXESUF)
>> check-qtest-x86_64-y = $(check-qtest-i386-y)
>> gcov-files-i386-y += i386-softmmu/hw/mc146818rtc.c
>> gcov-files-x86_64-y = $(subst
>> i386-softmmu/,x86_64-softmmu/,$(gcov-files-i386-y))
>> check-qtest-mips-y = tests/endianness-test$(EXESUF)
>> check-qtest-mips64-y = tests/endianness-test$(EXESUF)
>> check-qtest-mips64el-y = tests/endianness-test$(EXESUF)
>> +check-qtest-mips-y += tests/qom-test$(EXESUF)
>> +check-qtest-mipsel-y += tests/qom-test$(EXESUF)
>> +check-qtest-mips64-y += tests/qom-test$(EXESUF)
>> +check-qtest-mips64el-y += tests/qom-test$(EXESUF)
>> check-qtest-ppc-y = tests/endianness-test$(EXESUF)
>> check-qtest-ppc64-y = tests/endianness-test$(EXESUF)
>> check-qtest-sh4-y = tests/endianness-test$(EXESUF)
>> check-qtest-sh4eb-y = tests/endianness-test$(EXESUF)
>> +check-qtest-sh4-y += tests/qom-test$(EXESUF)
>> +check-qtest-sh4eb-y += tests/qom-test$(EXESUF)
>> check-qtest-sparc64-y = tests/endianness-test$(EXESUF)
>> #check-qtest-sparc-y = tests/m48t59-test$(EXESUF)
>> #check-qtest-sparc64-y += tests/m48t59-test$(EXESUF)
>> gcov-files-sparc-y += hw/m48t59.c
>> gcov-files-sparc64-y += hw/m48t59.c
>> +check-qtest-sparc-y += tests/qom-test$(EXESUF)
>> +check-qtest-sparc64-y += tests/qom-test$(EXESUF)
>> check-qtest-arm-y = tests/tmp105-test$(EXESUF)
>> gcov-files-arm-y += hw/tmp105.c
>> +check-qtest-arm-y += tests/qom-test$(EXESUF)
>> check-qtest-ppc-y += tests/boot-order-test$(EXESUF)
>> check-qtest-ppc64-y += tests/boot-order-test$(EXESUF)
>> +check-qtest-ppc-y += tests/qom-test$(EXESUF)
>> +check-qtest-ppc64-y += tests/qom-test$(EXESUF)
>> +check-qtest-ppcemb-y += tests/qom-test$(EXESUF)
>> +check-qtest-alpha-y += tests/qom-test$(EXESUF)
>> +check-qtest-cris-y += tests/qom-test$(EXESUF)
>> +check-qtest-lm32-y += tests/qom-test$(EXESUF)
>> +check-qtest-m68k-y += tests/qom-test$(EXESUF)
>> +check-qtest-microblaze-y += tests/qom-test$(EXESUF)
>> +check-qtest-microblazeel-y = $(check-qtest-microblaze-y)
>> +check-qtest-moxie-y += tests/qom-test$(EXESUF)
>> +check-qtest-or32-y += tests/qom-test$(EXESUF)
>> +check-qtest-s390x-y += tests/qom-test$(EXESUF)
>> +check-qtest-unicore32-y += tests/qom-test$(EXESUF)
>> +check-qtest-xtensa-y += tests/qom-test$(EXESUF)
>> +check-qtest-xtensaeb-y = $(check-qtest-xtensa-y)
>>
>> check-qapi-schema-y := $(addprefix tests/qapi-schema/, \
>> comments.json empty.json funny-char.json indented-expr.json \
>> @@ -161,6 +186,7 @@ tests/boot-order-test$(EXESUF): tests/boot-order-test.o
>> $(libqos-obj-y)
>> tests/tmp105-test$(EXESUF): tests/tmp105-test.o $(libqos-omap-obj-y)
>> tests/i440fx-test$(EXESUF): tests/i440fx-test.o $(libqos-pc-obj-y)
>> tests/fw_cfg-test$(EXESUF): tests/fw_cfg-test.o $(libqos-pc-obj-y)
>> +tests/qom-test$(EXESUF): tests/qom-test.o
>>
>> # QTest rules
>>
>> diff --git a/tests/qom-test.c b/tests/qom-test.c
>> new file mode 100644
>> index 000..c9494e0
>> --- /dev/null
>> +++ b/tests/qom-test.c
>> @@ -0,0 +1,280 @@
>> +/*
>> + * QTest testcase for QOM
>> + *
>> + * Copyright (c) 2013 SUSE LINUX Products GmbH
>> + *
>> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
>> + * See the COPYING file in the top-level directory.
>> + */
>> +#include "libqtest.h"
>> +
>> +#include
>> +#include
>> +#include "qemu/osdep.h"
>> +
>> +static void test_nop(gconstpointer data)
>> +{
>> +QTestState *s;
>> +const char *machine = data;
>> +char *args;
>> +
>> +args = g_strdup_printf("-display none -machine %s", machine);
>> +s = qtest_start(args);
>> +if (s) {
>> +qtest_quit(s);
>> +}
>> +g_free(args);
>> +}
>> +
>> +static const char *x86_machines[] = {
>> +"pc",
>> +"isapc",
>> +"q35",
>> +};
>> +
>> +static const char *alpha_machin
Re: [Qemu-devel] [PATCH for-1.6? v2 21/21] qtest: Prepare QOM machine tests
Am 25.08.2013 19:33, schrieb Peter Maydell:
> On 5 August 2013 14:27, Andreas Färber wrote:
>> +static const char *arm_machines[] = {
>> +"integratorcp",
>> +"versatilepb",
>> +"versatileab",
>> +"lm3s811evb",
>> +"lm3s6965evb",
>> +"collie",
>
> [etc]
>
> I'd rather have these tests than not have them, but can't we autodetect
> the list of machines (by parsing the output of -M help, or otherwise)?
If you want to implement that, feel free to. :) We neither have working
QMP parsing nor a QMP method for obtaining machines that I'm aware of.
My opinion is that if I merge a complete but fixed list today and
afterwards someone adds a new machine and forgets to cover it with
custom or this generic qtest, then it's their fault if I unknowingly
break their machine.
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [PATCH] spapr-pci: rework MSI/MSIX
On 12.07.2013, at 08:38, Alexey Kardashevskiy wrote: > On the sPAPR platform a guest allocates MSI/MSIX vectors via RTAS > hypercalls which return global IRQ numbers to a guest so it only > operates with those and never touches MSIMessage. > > Therefore MSIMessage handling is completely hidden in QEMU. > > Previously every sPAPR PCI host bridge implemented its own MSI window > to catch msi_notify()/msix_notify() calls from QEMU devices (virtio-pci > or vfio) and route them to the guest via qemu_pulse_irq(). > MSIMessage used to be encoded as: > .addr - address within the PHB MSI window; > .data - the device index on PHB plus vector number. > The MSI MR write function translated this MSIMessage to a global IRQ > number and called qemu_pulse_irq(). > > However the total number of IRQs is not really big (at the moment it is > 1024 IRQs starting from 4096) and even 16bit data field of MSIMessage > seems to be enough to store an IRQ number there. > > This simplifies MSI handling in sPAPR PHB. Specifically, this does: > 1. remove a MSI window from a PHB; > 2. add a single memory region for all MSIs to sPAPREnvironment > and spapr_pci_msi_init() to initialize it; > 3. encode MSIMessage as: >* .addr - a fixed address of SPAPR_PCI_MSI_WINDOW==0x400ULL; >* .data as an IRQ number. > 4. change IRQ allocator to align first IRQ number in a block for MSI. > MSI uses lower bits to specify the vector number so the first IRQ has to > be aligned. MSIX does not need any special allocator though. > > Signed-off-by: Alexey Kardashevskiy Thanks, applied to ppc-next. Alex
Re: [Qemu-devel] [PATCH -V3 4/4] target-ppc: Use #define for max slb entries
On 23.08.2013, at 06:20, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> Instead of opencoding 64 use MAX_SLB_ENTRIES. We don't update the kernel
> header here.
Ah, here you're fixing up the hardcoded 64 :). Could you please check whether
ARRAY_SIZE() works in all these as well? If not, this patch is good.
Alex
>
> Signed-off-by: Aneesh Kumar K.V
> ---
> target-ppc/cpu.h | 3 ++-
> target-ppc/kvm.c | 6 +++---
> target-ppc/machine.c | 2 +-
> 3 files changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> index 711db08..b06818e 100644
> --- a/target-ppc/cpu.h
> +++ b/target-ppc/cpu.h
> @@ -405,6 +405,7 @@ struct ppc_slb_t {
> uint64_t vsid;
> };
>
> +#define MAX_SLB_ENTRIES 64
> #define SEGMENT_SHIFT_256M 28
> #define SEGMENT_MASK_256M (~((1ULL << SEGMENT_SHIFT_256M) - 1))
>
> @@ -947,7 +948,7 @@ struct CPUPPCState {
> #if !defined(CONFIG_USER_ONLY)
> #if defined(TARGET_PPC64)
> /* PowerPC 64 SLB area */
> -ppc_slb_t slb[64];
> +ppc_slb_t slb[MAX_SLB_ENTRIES];
> int32_t slb_nr;
> #endif
> /* segment registers */
> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> index bcc6544..fce8835 100644
> --- a/target-ppc/kvm.c
> +++ b/target-ppc/kvm.c
> @@ -818,7 +818,7 @@ int kvm_arch_put_registers(CPUState *cs, int level)
>
> /* Sync SLB */
> #ifdef TARGET_PPC64
> -for (i = 0; i < 64; i++) {
> +for (i = 0; i < MAX_SLB_ENTRIES; i++) {
> sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
> sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
> }
> @@ -1042,8 +1042,8 @@ int kvm_arch_get_registers(CPUState *cs)
> * the env->slb array first so that we mark all entries invalid and
> * update with only valid SLB entries.
> */
> -memset(env->slb, 0, 64 * sizeof(ppc_slb_t));
> -for (i = 0; i < 64; i++) {
> +memset(env->slb, 0, MAX_SLB_ENTRIES * sizeof(ppc_slb_t));
> +for (i = 0; i < MAX_SLB_ENTRIES; i++) {
> target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
> target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
> /*
> diff --git a/target-ppc/machine.c b/target-ppc/machine.c
> index 12e1512..12c174f 100644
> --- a/target-ppc/machine.c
> +++ b/target-ppc/machine.c
> @@ -312,7 +312,7 @@ static const VMStateDescription vmstate_slb = {
> .minimum_version_id_old = 1,
> .fields = (VMStateField []) {
> VMSTATE_INT32_EQUAL(env.slb_nr, PowerPCCPU),
> -VMSTATE_SLB_ARRAY(env.slb, PowerPCCPU, 64),
> +VMSTATE_SLB_ARRAY(env.slb, PowerPCCPU, MAX_SLB_ENTRIES),
> VMSTATE_END_OF_LIST()
> }
> };
> --
> 1.8.1.2
>
Re: [Qemu-devel] [PATCH -V3 2/4] target-ppc: Fix page table lookup with kvm enabled
On 23.08.2013, at 06:20, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> With kvm enabled, we store the hash page table information in the hypervisor.
> Use ioctl to read the htab contents. Without this we get the below error when
> trying to read the guest address
>
> (gdb) x/10 do_fork
> 0xc0098660 : Cannot access memory at address
> 0xc0098660
> (gdb)
>
> Signed-off-by: Aneesh Kumar K.V
> ---
> target-ppc/kvm.c| 45 +
> target-ppc/kvm_ppc.h| 9 -
> target-ppc/mmu-hash64.c | 25 -
> 3 files changed, 69 insertions(+), 10 deletions(-)
>
> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> index 6878af2..bcc6544 100644
> --- a/target-ppc/kvm.c
> +++ b/target-ppc/kvm.c
> @@ -1891,3 +1891,48 @@ int kvm_arch_on_sigbus(int code, void *addr)
> void kvm_arch_init_irq_routing(KVMState *s)
> {
> }
> +
> +int kvmppc_hash64_load_hpte(PowerPCCPU *cpu, uint64_t index,
> +target_ulong *hpte0, target_ulong *hpte1)
> +{
> +int htab_fd;
> +struct kvm_get_htab_fd ghf;
> +struct kvm_get_htab_buf {
> +struct kvm_get_htab_header header;
> +/*
> + * Older kernel required one extra byte.
> + */
> +unsigned long hpte[3];
> +} hpte_buf;
> +
> +*hpte0 = 0;
> +*hpte1 = 0;
> +if (!cap_htab_fd) {
> +return 0;
> +}
> +/*
> + * At this point we are only interested in reading only bolted entries
> + */
> +ghf.flags = KVM_GET_HTAB_BOLTED_ONLY;
> +ghf.start_index = index;
> +htab_fd = kvm_vm_ioctl(kvm_state, KVM_PPC_GET_HTAB_FD, &ghf);
We should cache this.
> +if (htab_fd < 0) {
> +return htab_fd;
> +}
> +
> +if (read(htab_fd, &hpte_buf, sizeof(hpte_buf)) < 0) {
> +goto out;
> +}
> +/*
> + * We only requested for one entry, So we should get only 1
> + * valid entry at the same index
> + */
> +if (hpte_buf.header.n_valid != 1 || hpte_buf.header.index != index) {
> +goto out;
> +}
> +*hpte0 = hpte_buf.hpte[0];
> +*hpte1 = hpte_buf.hpte[1];
> +out:
> +close(htab_fd);
> +return 0;
> +}
> diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
> index 4ae7bf2..e25373a 100644
> --- a/target-ppc/kvm_ppc.h
> +++ b/target-ppc/kvm_ppc.h
> @@ -42,7 +42,8 @@ int kvmppc_get_htab_fd(bool write);
> int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns);
> int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
> uint16_t n_valid, uint16_t n_invalid);
> -
> +int kvmppc_hash64_load_hpte(PowerPCCPU *cpu, uint64_t index,
> +target_ulong *hpte0, target_ulong *hpte1);
> #else
>
> static inline uint32_t kvmppc_get_tbfreq(void)
> @@ -181,6 +182,12 @@ static inline int kvmppc_load_htab_chunk(QEMUFile *f,
> int fd, uint32_t index,
> abort();
> }
>
> +static inline int kvmppc_hash64_load_hpte(PowerPCCPU *cpu, uint64_t index,
> + target_ulong *hpte0,
> + target_ulong *hpte1)
> +{
> +abort();
> +}
> #endif
>
> #ifndef CONFIG_KVM
> diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
> index 67fc1b5..4d8120c 100644
> --- a/target-ppc/mmu-hash64.c
> +++ b/target-ppc/mmu-hash64.c
> @@ -302,17 +302,26 @@ static int ppc_hash64_amr_prot(CPUPPCState *env,
> ppc_hash_pte64_t pte)
> return prot;
> }
>
> -static hwaddr ppc_hash64_pteg_search(CPUPPCState *env, hwaddr pteg_off,
> +static hwaddr ppc_hash64_pteg_search(CPUPPCState *env, hwaddr hash,
>bool secondary, target_ulong ptem,
>ppc_hash_pte64_t *pte)
> {
> -hwaddr pte_offset = pteg_off;
> +uint64_t index;
> +hwaddr pte_offset;
> target_ulong pte0, pte1;
> int i;
>
> +pte_offset = (hash * HASH_PTEG_SIZE_64) & env->htab_mask;;
> +index = (hash * HPTES_PER_GROUP) & env->htab_mask;
> +
> for (i = 0; i < HPTES_PER_GROUP; i++) {
> -pte0 = ppc_hash64_load_hpte0(env, pte_offset);
> -pte1 = ppc_hash64_load_hpte1(env, pte_offset);
> +if (kvm_enabled()) {
> +index += i;
> +kvmppc_hash64_load_hpte(ppc_env_get_cpu(env), index, &pte0,
> &pte1);
This breaks PR KVM which doesn't have an HTAB fd.
I think what you want is code in kvmppc_set_papr() that tries to fetch an HTAB
fd. You can then modify the check to if (kvm_enabled() &&
kvmppc_has_htab_fd()), as the below case should work just fine on PR KVM.
Alex
> +} else {
> +pte0 = ppc_hash64_load_hpte0(env, pte_offset);
> +pte1 = ppc_hash64_load_hpte1(env, pte_offset);
> +}
>
> if ((pte0 & HPTE64_V_VALID)
> && (secondary == !!(pte0 & HPTE64_V_SECONDARY))
> @@ -332,7 +341,7 @@ static hwaddr ppc_hash64_htab_lookup(CPUPPCState *env,
>ppc_s
Re: [Qemu-devel] [PATCH -V3 3/4] target-ppc: Check for error on address translation in memsave command
On 23.08.2013, at 06:20, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> When we translate the virtual address to physical check for error.
>
> Signed-off-by: Aneesh Kumar K.V
I think this change is sane, but I'd really prefer to see an ack from (or get
this applied by) Luiz.
Alex
> ---
> cpus.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/cpus.c b/cpus.c
> index 0f65e76..658366d 100644
> --- a/cpus.c
> +++ b/cpus.c
> @@ -1309,7 +1309,10 @@ void qmp_memsave(int64_t addr, int64_t size, const
> char *filename,
> l = sizeof(buf);
> if (l > size)
> l = size;
> -cpu_memory_rw_debug(cpu, addr, buf, l, 0);
> +if (cpu_memory_rw_debug(cpu, addr, buf, l, 0) != 0) {
> +error_set(errp, QERR_INVALID_PARAMETER, "addr");
> +goto exit;
> +}
> if (fwrite(buf, 1, l, f) != l) {
> error_set(errp, QERR_IO_ERROR);
> goto exit;
> --
> 1.8.1.2
>
Re: [Qemu-devel] [PATCH -V3 1/4] target-ppc: Update slb array with correct index values.
On 23.08.2013, at 06:20, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> Without this, a value of rb=0 and rs=0 results in replacing the 0th
> index. This can be observed when using gdb remote debugging support.
>
> (gdb) x/10i do_fork
> 0xc0085330 :Cannot access memory at address
> 0xc0085330
> (gdb)
>
> This is because when we do the slb sync via kvm_cpu_synchronize_state,
> we overwrite the slb entry (0th entry) for 0xc0085330
>
> Signed-off-by: Aneesh Kumar K.V
> ---
> target-ppc/kvm.c | 20 ++--
> 1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> index 30a870e..6878af2 100644
> --- a/target-ppc/kvm.c
> +++ b/target-ppc/kvm.c
> @@ -1033,9 +1033,25 @@ int kvm_arch_get_registers(CPUState *cs)
>
> /* Sync SLB */
> #ifdef TARGET_PPC64
> +/*
> + * KVM_GET_SREGS doesn't return slb entry with slot information
> + * same as index. The ioctl zero fills the array and update only
> + * upto slb_max entries. We cannot depend on the slot value
> + * in the slbe field for update, because a zero slbe value would
> + * result in us wrongly updating the 0th index. Instead we zero fill
> + * the env->slb array first so that we mark all entries invalid and
> + * update with only valid SLB entries.
Still too negative. How about something like this:
/*
* The packed SLB array we get from KVM only contains information
* about valid entries. So we flush our internal copy to get rid of stale
* ones, then put all valid SLB entries back in.
*/
> + */
> +memset(env->slb, 0, 64 * sizeof(ppc_slb_t));
Can't we use ARRAY_SIZE here and below?
Alex
> for (i = 0; i < 64; i++) {
> -ppc_store_slb(env, sregs.u.s.ppc64.slb[i].slbe,
> - sregs.u.s.ppc64.slb[i].slbv);
> +target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
> +target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
> +/*
> + * Only restore valid entries
> + */
> +if (rb & SLB_ESID_V) {
> +ppc_store_slb(env, rb, rs);
> +}
> }
> #endif
>
> --
> 1.8.1.2
>
Re: [Qemu-devel] [RFC] TCG unit testing
Am 23.08.2013 23:18, schrieb Richard Henderson: > > I don't see how TCI really comes into this except as Yet Another Backend to be > tested. Indeed, such unit testing could show that TCI is in fact broken wrt > helpers, depending on the host abi. TCI is special because it is the only TCG backend which works (more or less) for all hosts, so it can be improved to be a reference implementation. Then it will be possible to compare execution traces from TCI with other TCG backends. > E.g. tci never defines TCG_TARGET_CALL_ALIGN_ARGS. Thus if one uses tci on an > ARM host, a helper like > > DEF_HELPER_FLAGS_2(store_fpcr, TCG_CALL_NO_RWG, void, env, i64) > > will have its arguments loaded into TCI's R0, R1, R2, and thence into the ARM > r0, r1, r2. But the ARM abi requires the i64 input to be aligned, and thus it > should be r0, r2, r3. > > > r~ Yes, those possible alignment issues were already discussed earlier. Up to now, nobody cared enough to fix them. I have run some very limited tests on ARM hardware. My tests did not trigger those problems. I don't think that fixing the argument passing to helper functions is very difficult: we have a limited set of different helper function prototypes and can generate different calls for each case. This might even speed up TCI a little bit because only necessary parameters would be passed instead of the maximum number like it is done today. This and other known (or unknown) problems of the TCI backend will of course be fixed as soon as there are TCG unit tests which detect these problems. :-) That's why I am very interested in such unit tests and other tests for TCG backends. Stefan
Re: [Qemu-devel] [PATCH] spapr-vscsi: Adding VSCSI capabilities
On Sun, 2013-08-25 at 17:41 +0100, Alexander Graf wrote: > > While I don't think any harm could happen from it, this could lead to > a potential timing attack where we read and write from different > locations in memory if the guest swizzles the request while we're > processing it. > > It's certainly better style (read: makes it easier to prove this > doesn't happen when it really is important) to read the variables into > local variables and reuse them there. In this case it mostly helps > readability to make sure here and below are the same variables. Ugh... It's not better style at all, it's also less efficient and the "attack" you talk about doesn't exist... All the guest can do is shoot itself in the foot. Ben.
Re: [Qemu-devel] [RFC PATCH] Introduce RCU-enabled DQs (v2)
Hi Mike,
* Mike Day (ncm...@ncultra.org) wrote:
> Add RCU-enabled variants on the existing bsd DQ facility. Each Q
> operation has the same interface as the existing (non-RCU)
> version. Also, each operation is implemented as macro for now.
>
> Using the RCU-enabled DQ, existing DQ users will be able to convert to
> RCU without using a different list interface.
>
> This version (2) adds a macro to walk a Q in reverse:
>
> QLIST_FOREACH_REVERSE_RCU(el, head, field)
>
> Accordingly the reader threads in the test program walk the Q in
> reverse in addition to walking forward.
>
> To accompany the RCU-enabled DQ, there is also a test file that uses
> concurrent readers to contend with a single updater.
>
> This patchset builds on top of Paolo Bonzini's rcu tree:
> https://github.com/bonzini/qemu/tree/rcu
I'm not very comfortable with your DQ implementation not providing any
kind of guarantee to a forward traversal followed by backward traversal,
nor for backward followed by forward traversal. If a list add is
executed concurrently with traversals, and we can ensure there are no
list del of the node, if a traversal sees the added node when doing
forward iteration, I would clearly expect to still see it if a backward
iteration follows.
I took the liberty of implementing a couple of ideas I had to provide
a RCU DQ with those guarantees. I just pushed the code here (beware, I
just did some basic single-threaded unit tests so far, so consider this
code as largely untested concurrency-wise):
git clone git://git.urcu.io/urcu.git
branch: rcudq
file: urcu/rcudq.h
Direct link to the file via gitweb:
http://git.lttng.org/?p=userspace-rcu.git;a=blob;f=urcu/rcudq.h;h=4a8d7b0d5143a958514cf130b1c124d99f3194ca;hb=refs/heads/rcudq
The basic idea is that I add a "skip" flag within each node so
traversals will see the node appear into the list atomically, even
though they are being chained into the prev next and next prev pointers
non-atomically. Unfortunately, this requires an extra write barrier on
the add and delete operations, but considering that list manipulation
requires mutual exclusion anyway, an extra write barrier should not hurt
too much.
Comments are welcome!
Thanks,
Mathieu
>
> Signed-off-by: Mike Day
> ---
> docs/rcu.txt | 2 +-
> include/qemu/queue.h | 11 --
> include/qemu/rcu_queue.h | 145
> tests/Makefile | 6 +-
> tests/rcuq_test.c| 290
> +++
> 5 files changed, 440 insertions(+), 14 deletions(-)
> create mode 100644 include/qemu/rcu_queue.h
> create mode 100644 tests/rcuq_test.c
>
> diff --git a/docs/rcu.txt b/docs/rcu.txt
> index b3c593c..de59896 100644
> --- a/docs/rcu.txt
> +++ b/docs/rcu.txt
> @@ -106,7 +106,7 @@ The core RCU API is small:
> so that the reclaimer function can fetch the struct foo address
> and free it:
>
> -call_rcu1(foo_reclaim, &foo.rcu);
> +call_rcu1(&foo.rcu, foo_reclaim);
>
> void foo_reclaim(struct rcu_head *rp)
> {
> diff --git a/include/qemu/queue.h b/include/qemu/queue.h
> index 847ddd1..f6f0636 100644
> --- a/include/qemu/queue.h
> +++ b/include/qemu/queue.h
> @@ -139,17 +139,6 @@ struct {
>\
> (elm)->field.le_prev = &(head)->lh_first; \
> } while (/*CONSTCOND*/0)
>
> -#define QLIST_INSERT_HEAD_RCU(head, elm, field) do {\
> -(elm)->field.le_prev = &(head)->lh_first; \
> -(elm)->field.le_next = (head)->lh_first;\
> -smp_wmb(); /* fill elm before linking it */ \
> -if ((head)->lh_first != NULL) {\
> -(head)->lh_first->field.le_prev = &(elm)->field.le_next;\
> -} \
> -(head)->lh_first = (elm); \
> -smp_wmb(); \
> -} while (/* CONSTCOND*/0)
> -
> #define QLIST_REMOVE(elm, field) do { \
> if ((elm)->field.le_next != NULL) \
> (elm)->field.le_next->field.le_prev = \
> diff --git a/include/qemu/rcu_queue.h b/include/qemu/rcu_queue.h
> new file mode 100644
> index 000..198a87d
> --- /dev/null
> +++ b/include/qemu/rcu_queue.h
> @@ -0,0 +1,145 @@
> +#ifndef QEMU_RCU_SYS_QUEUE_H
> +#define QEMU_RCU_SYS_QUEUE_H
> +
> +/*
> + * rc_queue.h
> + *
> + * Userspace RCU QSBR header.
> + *
> + * LGPL-compatible code should include this header with :
> + *
> + * #define _LGPL_SOURCE
> + * #include
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * Lic
Re: [Qemu-devel] [Qemu-ppc] [PATCH -V3 2/4] target-ppc: Fix page table lookup with kvm enabled
On Sun, 2013-08-25 at 19:32 +0100, Alexander Graf wrote: > > + * At this point we are only interested in reading only bolted > entries > > + */ > > +ghf.flags = KVM_GET_HTAB_BOLTED_ONLY; > > +ghf.start_index = index; > > +htab_fd = kvm_vm_ioctl(kvm_state, KVM_PPC_GET_HTAB_FD, &ghf); > > We should cache this. > Also why bolted only ? Cheers, Ben.
Re: [Qemu-devel] [PATCH] spapr-vscsi: Adding VSCSI capabilities
On Sun, 2013-08-25 at 17:41 +0100, Alexander Graf wrote: > > +vcap = &req->iu.mad.capabilities; > > +rc = spapr_vio_dma_read(&s->vdev, be64_to_cpu(vcap->buffer), > > +&cap, > be16_to_cpu(vcap->common.length)); > > While I don't think any harm could happen from it, this could lead to > a potential timing attack where we read and write from different > locations in memory if the guest swizzles the request while we're > processing it. BTW. While I disagree with your initial comment ... is there any bound checking here ? That looks like potential stack corruption unless I miss something if the guest passes a too big length... So at least the length should be read once, bound-checked, then the read done with the result (don't bound check and read again, that would be indeed racy). Cheers, Ben.
Re: [Qemu-devel] [PATCH -V3 3/4] target-ppc: Check for error on address translation in memsave command
Am 25.08.2013 20:32, schrieb Alexander Graf:
>
> On 23.08.2013, at 06:20, Aneesh Kumar K.V wrote:
>
>> From: "Aneesh Kumar K.V"
>>
>> When we translate the virtual address to physical check for error.
>>
>> Signed-off-by: Aneesh Kumar K.V
>
> I think this change is sane, but I'd really prefer to see an ack from (or get
> this applied by) Luiz.
>
>
> Alex
>
>> ---
>> cpus.c | 5 -
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/cpus.c b/cpus.c
>> index 0f65e76..658366d 100644
>> --- a/cpus.c
>> +++ b/cpus.c
>> @@ -1309,7 +1309,10 @@ void qmp_memsave(int64_t addr, int64_t size, const
>> char *filename,
>> l = sizeof(buf);
>> if (l > size)
>> l = size;
>> -cpu_memory_rw_debug(cpu, addr, buf, l, 0);
>> +if (cpu_memory_rw_debug(cpu, addr, buf, l, 0) != 0) {
>> +error_set(errp, QERR_INVALID_PARAMETER, "addr");
I've been repeatedly told error_set() should no longer be used, in favor
of error_setg(). :)
Andreas
>> +goto exit;
>> +}
>> if (fwrite(buf, 1, l, f) != l) {
>> error_set(errp, QERR_IO_ERROR);
>> goto exit;
>> --
>> 1.8.1.2
>>
>
>
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [PATCH -V3 4/4] target-ppc: Use #define for max slb entries
Am 25.08.2013 20:33, schrieb Alexander Graf:
>
> On 23.08.2013, at 06:20, Aneesh Kumar K.V wrote:
>
>> From: "Aneesh Kumar K.V"
>>
>> Instead of opencoding 64 use MAX_SLB_ENTRIES. We don't update the kernel
>> header here.
>
> Ah, here you're fixing up the hardcoded 64 :). Could you please check whether
> ARRAY_SIZE() works in all these as well? If not, this patch is good.
>
>
> Alex
>
>>
>> Signed-off-by: Aneesh Kumar K.V
>> ---
>> target-ppc/cpu.h | 3 ++-
>> target-ppc/kvm.c | 6 +++---
>> target-ppc/machine.c | 2 +-
>> 3 files changed, 6 insertions(+), 5 deletions(-)
>>
>> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
>> index 711db08..b06818e 100644
>> --- a/target-ppc/cpu.h
>> +++ b/target-ppc/cpu.h
>> @@ -405,6 +405,7 @@ struct ppc_slb_t {
>> uint64_t vsid;
>> };
>>
>> +#define MAX_SLB_ENTRIES 64
>> #define SEGMENT_SHIFT_256M 28
>> #define SEGMENT_MASK_256M (~((1ULL << SEGMENT_SHIFT_256M) - 1))
>>
>> @@ -947,7 +948,7 @@ struct CPUPPCState {
>> #if !defined(CONFIG_USER_ONLY)
>> #if defined(TARGET_PPC64)
>> /* PowerPC 64 SLB area */
>> -ppc_slb_t slb[64];
>> +ppc_slb_t slb[MAX_SLB_ENTRIES];
>> int32_t slb_nr;
>> #endif
>> /* segment registers */
>> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
>> index bcc6544..fce8835 100644
>> --- a/target-ppc/kvm.c
>> +++ b/target-ppc/kvm.c
>> @@ -818,7 +818,7 @@ int kvm_arch_put_registers(CPUState *cs, int level)
>>
>> /* Sync SLB */
>> #ifdef TARGET_PPC64
>> -for (i = 0; i < 64; i++) {
>> +for (i = 0; i < MAX_SLB_ENTRIES; i++) {
>> sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
>> sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
>> }
>> @@ -1042,8 +1042,8 @@ int kvm_arch_get_registers(CPUState *cs)
>> * the env->slb array first so that we mark all entries invalid and
>> * update with only valid SLB entries.
>> */
>> -memset(env->slb, 0, 64 * sizeof(ppc_slb_t));
>> -for (i = 0; i < 64; i++) {
>> +memset(env->slb, 0, MAX_SLB_ENTRIES * sizeof(ppc_slb_t));
>> +for (i = 0; i < MAX_SLB_ENTRIES; i++) {
>> target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
>> target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
>> /*
>> diff --git a/target-ppc/machine.c b/target-ppc/machine.c
>> index 12e1512..12c174f 100644
>> --- a/target-ppc/machine.c
>> +++ b/target-ppc/machine.c
>> @@ -312,7 +312,7 @@ static const VMStateDescription vmstate_slb = {
>> .minimum_version_id_old = 1,
>> .fields = (VMStateField []) {
>> VMSTATE_INT32_EQUAL(env.slb_nr, PowerPCCPU),
>> -VMSTATE_SLB_ARRAY(env.slb, PowerPCCPU, 64),
>> +VMSTATE_SLB_ARRAY(env.slb, PowerPCCPU, MAX_SLB_ENTRIES),
IMO use of ARRAY_SIZE() makes it too easy to break VMState here.
Don't know how likely it is to be touched in the future, of course.
Andreas
>> VMSTATE_END_OF_LIST()
>> }
>> };
>> --
>> 1.8.1.2
>>
>
>
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
[Qemu-devel] [PATCH 16/47] hw/xtensa/Makefile.objs: Build xtensa_sim and xtensa_lx60 conditionally
Add the new CONFIG_* values to default-config/xtensa*-softmmu.mak. Signed-off-by: Ákos Kovács --- default-configs/xtensa-softmmu.mak |3 +++ default-configs/xtensaeb-softmmu.mak |3 +++ hw/xtensa/Makefile.objs |4 ++-- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/default-configs/xtensa-softmmu.mak b/default-configs/xtensa-softmmu.mak index 9d8899c..0ca02cf 100644 --- a/default-configs/xtensa-softmmu.mak +++ b/default-configs/xtensa-softmmu.mak @@ -3,3 +3,6 @@ CONFIG_SERIAL=y CONFIG_OPENCORES_ETH=y CONFIG_PFLASH_CFI01=y + +CONFIG_XTENSA_SIM=y +CONFIG_XTENSA_LX60=y diff --git a/default-configs/xtensaeb-softmmu.mak b/default-configs/xtensaeb-softmmu.mak index 9d8899c..0ca02cf 100644 --- a/default-configs/xtensaeb-softmmu.mak +++ b/default-configs/xtensaeb-softmmu.mak @@ -3,3 +3,6 @@ CONFIG_SERIAL=y CONFIG_OPENCORES_ETH=y CONFIG_PFLASH_CFI01=y + +CONFIG_XTENSA_SIM=y +CONFIG_XTENSA_LX60=y diff --git a/hw/xtensa/Makefile.objs b/hw/xtensa/Makefile.objs index 6ead782..d85af3b 100644 --- a/hw/xtensa/Makefile.objs +++ b/hw/xtensa/Makefile.objs @@ -1,3 +1,3 @@ obj-y += pic_cpu.o -obj-y += xtensa_sim.o -obj-y += xtensa_lx60.o +obj-$(CONFIG_XTENSA_SIM) += xtensa_sim.o +obj-$(CONFIG_XTENSA_LX60) += xtensa_lx60.o -- 1.7.10.4
[Qemu-devel] [PATCH 01/47] rules.mak: New logical functions
lnot, land, lor, lif, eq, ne, isempty, notempty functions added Example usage: obj-$(call lor,$(CONFIG_LINUX),$(CONFIG_BSD)) += feature.o Signed-off-by: Ákos Kovács --- rules.mak | 16 1 file changed, 16 insertions(+) diff --git a/rules.mak b/rules.mak index 4499745..7e8e3bd 100644 --- a/rules.mak +++ b/rules.mak @@ -106,6 +106,22 @@ clean: clean-timestamp obj := . old-nested-dirs := +# Logical functions +lnot = $(if $(subst n,,$1),n,y) + +land-yy = y +land = $(land-$1$2) + +lor = $(if $(subst $2,,$1)$(subst $1,,$2),n,y) + +lif = $(if $(subst n,,$1),$2,$3) + +eq = $(if $(subst $2,,$1)$(subst $1,,$2),n,y) +ne = $(if $(subst $2,,$1)$(subst $1,,$2),y,n) + +isempty = $(call eq,$1,) +notempty = $(call ne,$1,) + define push-var $(eval save-$2-$1 = $(value $1)) $(eval $1 :=) -- 1.7.10.4
[Qemu-devel] [RFC PATCH 00/47] Describing patchset
This is a request-for-comments patchset on the kconfig integration. The patchset contains a 'scripts/kconfig' git submodule (PATCH 5, kconfig-frontends v3.10) with the necessary modifications in the Makefile.objs (PATCHES 6-16). It also contains the Kconfig files themselves (PATCHES 17-45) for the devices and boards. At the time I only included ARM, which is works nicely. The main Kconfig file includes the devices' Kconfig file (hw/Kconfig) and the Kconfig.targets which is generated by the configure script, according to '--target-list'. At the time the patchset does not contain any way to build binaries with the new configuration, but it can be 'imitated' with a single 'include ../.config' line in the target's *-softmmu/config-devices.mak or default-configs/*-softmmu.mak. Signed-off-by: Ákos Kovács
[Qemu-devel] [PATCH 02/47] Makefile.target: CONFIG_NO_* variables removed
CONFIG_NO_* variables replaced with the lnot logical function Signed-off-by: Ákos Kovács --- Makefile.target |8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/Makefile.target b/Makefile.target index 9a49852..bbc668b 100644 --- a/Makefile.target +++ b/Makefile.target @@ -70,10 +70,6 @@ all: $(PROGS) stap # Dummy command so that make thinks it has done something @true -CONFIG_NO_PCI = $(if $(subst n,,$(CONFIG_PCI)),n,y) -CONFIG_NO_KVM = $(if $(subst n,,$(CONFIG_KVM)),n,y) -CONFIG_NO_XEN = $(if $(subst n,,$(CONFIG_XEN)),n,y) - # # cpu emulator library obj-y = exec.o translate-all.o cpu-exec.o @@ -84,7 +80,7 @@ obj-y += fpu/softfloat.o obj-y += target-$(TARGET_BASE_ARCH)/ obj-y += disas.o obj-$(CONFIG_GDBSTUB_XML) += gdbstub-xml.o -obj-$(CONFIG_NO_KVM) += kvm-stub.o +obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o # # Linux user emulator target @@ -125,7 +121,7 @@ LIBS+=$(libs_softmmu) # xen support obj-$(CONFIG_XEN) += xen-all.o xen-mapcache.o -obj-$(CONFIG_NO_XEN) += xen-stub.o +obj-$(call lnot,$(CONFIG_XEN)) += xen-stub.o # Hardware support ifeq ($(TARGET_NAME), sparc64) -- 1.7.10.4
[Qemu-devel] [PATCH 04/47] scripts/kconfig: kconfig-frontends submodule added
Add the kconfig-frontends to scripts/, picking version 3.10. Signed-off-by: Ákos Kovács --- .gitmodules |3 +++ scripts/kconfig |1 + 2 files changed, 4 insertions(+) create mode 16 scripts/kconfig diff --git a/.gitmodules b/.gitmodules index d7e3f3c..754fc03 100644 --- a/.gitmodules +++ b/.gitmodules @@ -25,3 +25,6 @@ [submodule "dtc"] path = dtc url = git://git.qemu.org/dtc.git +[submodule "scripts/kconfig"] + path = scripts/kconfig + url = git://ymorin.is-a-geek.org/kconfig-frontends diff --git a/scripts/kconfig b/scripts/kconfig new file mode 16 index 000..f0a6c0a --- /dev/null +++ b/scripts/kconfig @@ -0,0 +1 @@ +Subproject commit f0a6c0a0d14545c81757934c3679511b63b6c82f -- 1.7.10.4
[Qemu-devel] [PATCH 20/47] hw/block/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/block/Kconfig | 34 ++ 1 file changed, 34 insertions(+) create mode 100644 hw/block/Kconfig diff --git a/hw/block/Kconfig b/hw/block/Kconfig new file mode 100644 index 000..400cab3 --- /dev/null +++ b/hw/block/Kconfig @@ -0,0 +1,34 @@ +config FDC +bool +#select ISA + +config SSI_M25P80 +bool +select SSI + +config NAND +bool + +config PFLASH_CFI01 +bool + +config PFLASH_CFI02 +bool + +config ECC +bool + +config ONENAND +bool + +config PC_SYSFW +bool +#select ISA + +config NVME_PCI +bool +depends on PCI + +config VIRTIO_BLK_DATA_PLANE +bool +select VIRTIO -- 1.7.10.4
[Qemu-devel] [PATCH 19/47] hw/audio/Kconfig: Add audio Kconfig
Signed-off-by: Ákos Kovács --- hw/audio/Kconfig | 41 + 1 file changed, 41 insertions(+) create mode 100644 hw/audio/Kconfig diff --git a/hw/audio/Kconfig b/hw/audio/Kconfig new file mode 100644 index 000..bb6c31d --- /dev/null +++ b/hw/audio/Kconfig @@ -0,0 +1,41 @@ +menu "Audio devices" +config SB16 +bool +#select ISA + +config ES1370 +bool "ES1370" +depends on PCI + +config AC97 +bool "AC97 sound card" +default y +depends on PCI + +config ADLIB +bool +#select ISA + +config CS4231A +bool + +config HDA +bool +#select ISA + +config PCSPK +bool +select I8254 + +config WM8750 +bool + +config PL041 +bool + +config CS4231 +bool + +config MARVELL_88W8618 +bool +endmenu -- 1.7.10.4
[Qemu-devel] [PATCH 03/47] default-configs/: CONFIG_GDBSTUB_XML removed
Makefile.target: Build gdbstub-xml.o only when TARGET_XML_FILES is not empty. Signed-off-by: Ákos Kovács --- Makefile.target |2 +- default-configs/arm-linux-user.mak|2 -- default-configs/arm-softmmu.mak |1 - default-configs/armeb-linux-user.mak |2 -- default-configs/m68k-linux-user.mak |2 -- default-configs/m68k-softmmu.mak |1 - default-configs/ppc-linux-user.mak|2 -- default-configs/ppc-softmmu.mak |1 - default-configs/ppc64-linux-user.mak |2 -- default-configs/ppc64-softmmu.mak |1 - default-configs/ppc64abi32-linux-user.mak |2 -- default-configs/ppcemb-softmmu.mak|1 - 12 files changed, 1 insertion(+), 18 deletions(-) diff --git a/Makefile.target b/Makefile.target index bbc668b..af6ac7e 100644 --- a/Makefile.target +++ b/Makefile.target @@ -79,7 +79,7 @@ obj-$(CONFIG_TCG_INTERPRETER) += disas/tci.o obj-y += fpu/softfloat.o obj-y += target-$(TARGET_BASE_ARCH)/ obj-y += disas.o -obj-$(CONFIG_GDBSTUB_XML) += gdbstub-xml.o +obj-$(call notempty,$(TARGET_XML_FILES)) += gdbstub-xml.o obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o # diff --git a/default-configs/arm-linux-user.mak b/default-configs/arm-linux-user.mak index 46d4aa2..413361a 100644 --- a/default-configs/arm-linux-user.mak +++ b/default-configs/arm-linux-user.mak @@ -1,3 +1 @@ # Default configuration for arm-linux-user - -CONFIG_GDBSTUB_XML=y diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak index ac0815d..d13bc2b 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -2,7 +2,6 @@ include pci.mak include usb.mak -CONFIG_GDBSTUB_XML=y CONFIG_VGA=y CONFIG_ISA_MMIO=y CONFIG_NAND=y diff --git a/default-configs/armeb-linux-user.mak b/default-configs/armeb-linux-user.mak index 41d0cc4..bf2ffe7 100644 --- a/default-configs/armeb-linux-user.mak +++ b/default-configs/armeb-linux-user.mak @@ -1,3 +1 @@ # Default configuration for armeb-linux-user - -CONFIG_GDBSTUB_XML=y diff --git a/default-configs/m68k-linux-user.mak b/default-configs/m68k-linux-user.mak index f3487aa..06cd5ed 100644 --- a/default-configs/m68k-linux-user.mak +++ b/default-configs/m68k-linux-user.mak @@ -1,3 +1 @@ # Default configuration for m68k-linux-user - -CONFIG_GDBSTUB_XML=y diff --git a/default-configs/m68k-softmmu.mak b/default-configs/m68k-softmmu.mak index 51fe5bb..d9552df 100644 --- a/default-configs/m68k-softmmu.mak +++ b/default-configs/m68k-softmmu.mak @@ -3,5 +3,4 @@ include pci.mak include usb.mak CONFIG_COLDFIRE=y -CONFIG_GDBSTUB_XML=y CONFIG_PTIMER=y diff --git a/default-configs/ppc-linux-user.mak b/default-configs/ppc-linux-user.mak index 681a945..6273df2 100644 --- a/default-configs/ppc-linux-user.mak +++ b/default-configs/ppc-linux-user.mak @@ -1,3 +1 @@ # Default configuration for ppc-linux-user - -CONFIG_GDBSTUB_XML=y diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak index eac0b28..f5cd0bd 100644 --- a/default-configs/ppc-softmmu.mak +++ b/default-configs/ppc-softmmu.mak @@ -3,7 +3,6 @@ include pci.mak include sound.mak include usb.mak -CONFIG_GDBSTUB_XML=y CONFIG_ISA_MMIO=y CONFIG_ESCC=y CONFIG_M48T59=y diff --git a/default-configs/ppc64-linux-user.mak b/default-configs/ppc64-linux-user.mak index 089c08f..422d3fb 100644 --- a/default-configs/ppc64-linux-user.mak +++ b/default-configs/ppc64-linux-user.mak @@ -1,3 +1 @@ # Default configuration for ppc64-linux-user - -CONFIG_GDBSTUB_XML=y diff --git a/default-configs/ppc64-softmmu.mak b/default-configs/ppc64-softmmu.mak index 7831c2b..975112a 100644 --- a/default-configs/ppc64-softmmu.mak +++ b/default-configs/ppc64-softmmu.mak @@ -3,7 +3,6 @@ include pci.mak include sound.mak include usb.mak -CONFIG_GDBSTUB_XML=y CONFIG_ISA_MMIO=y CONFIG_ESCC=y CONFIG_M48T59=y diff --git a/default-configs/ppc64abi32-linux-user.mak b/default-configs/ppc64abi32-linux-user.mak index f038ffd..1c657ec 100644 --- a/default-configs/ppc64abi32-linux-user.mak +++ b/default-configs/ppc64abi32-linux-user.mak @@ -1,3 +1 @@ # Default configuration for ppc64abi32-linux-user - -CONFIG_GDBSTUB_XML=y diff --git a/default-configs/ppcemb-softmmu.mak b/default-configs/ppcemb-softmmu.mak index 86080a7..4411203 100644 --- a/default-configs/ppcemb-softmmu.mak +++ b/default-configs/ppcemb-softmmu.mak @@ -3,7 +3,6 @@ include pci.mak include sound.mak include usb.mak -CONFIG_GDBSTUB_XML=y CONFIG_ISA_MMIO=y CONFIG_ESCC=y CONFIG_M48T59=y -- 1.7.10.4
[Qemu-devel] [PATCH 23/47] hw/cpu/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/cpu/Kconfig | 11 +++ 1 file changed, 11 insertions(+) create mode 100644 hw/cpu/Kconfig diff --git a/hw/cpu/Kconfig b/hw/cpu/Kconfig new file mode 100644 index 000..d90cbe5 --- /dev/null +++ b/hw/cpu/Kconfig @@ -0,0 +1,11 @@ +config ARM11MPCORE +bool + +config ARM9MPCORE +bool + +config ARM15MPCORE +bool + +config ICC_BUS +bool -- 1.7.10.4
[Qemu-devel] [PATCH 27/47] hw/i2c/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/i2c/Kconfig | 10 ++ 1 file changed, 10 insertions(+) create mode 100644 hw/i2c/Kconfig diff --git a/hw/i2c/Kconfig b/hw/i2c/Kconfig new file mode 100644 index 000..eaf17cc --- /dev/null +++ b/hw/i2c/Kconfig @@ -0,0 +1,10 @@ +config VERSATILE_I2C +bool +select BITBANG_I2C + +config ACPI +bool +depends on PCI + +config BITBANG_I2C +bool -- 1.7.10.4
[Qemu-devel] [PATCH 06/47] hw/alpha/Makefile.objs: Build objects depending on CLIPPER
Set CONFIG_CLIPPER as default for default-configs/alpha-softmmu.mak Signed-off-by: Ákos Kovács --- default-configs/alpha-softmmu.mak |2 ++ hw/alpha/Makefile.objs|2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/default-configs/alpha-softmmu.mak b/default-configs/alpha-softmmu.mak index bc07600..1e8bbff 100644 --- a/default-configs/alpha-softmmu.mak +++ b/default-configs/alpha-softmmu.mak @@ -15,3 +15,5 @@ CONFIG_IDE_CMD646=y CONFIG_I8259=y CONFIG_MC146818RTC=y CONFIG_ISA_TESTDEV=y + +CONFIG_CLIPPER=y diff --git a/hw/alpha/Makefile.objs b/hw/alpha/Makefile.objs index 5c74275..0a6ade5 100644 --- a/hw/alpha/Makefile.objs +++ b/hw/alpha/Makefile.objs @@ -1 +1 @@ -obj-y += dp264.o pci.o typhoon.o +obj-$(CONFIG_CLIPPER) += dp264.o pci.o typhoon.o -- 1.7.10.4
[Qemu-devel] [PATCH 29/47] hw/input/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/input/Kconfig | 23 +++ 1 file changed, 23 insertions(+) create mode 100644 hw/input/Kconfig diff --git a/hw/input/Kconfig b/hw/input/Kconfig new file mode 100644 index 000..9114433 --- /dev/null +++ b/hw/input/Kconfig @@ -0,0 +1,23 @@ +config ADB +bool + +config LM832X +bool + +config PCKBD +bool + +config PL050 +bool + +config STELLARIS_INPUT +bool + +config TSC2005 +bool + +config TSC210X +bool + +config VMMOUSE +bool -- 1.7.10.4
[Qemu-devel] [PATCH 10/47] hw/microblaze/Makefile.objs: Create configs for petalogix boards
CONFIG_PETALOGIX_* configs added to default-configs/microblaze-softmmu.mak and default-configs/microblazeel-softmmu.mak. Signed-off-by: Ákos Kovács --- default-configs/microblaze-softmmu.mak |3 +++ default-configs/microblazeel-softmmu.mak |3 +++ hw/microblaze/Makefile.objs |7 +++ 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/default-configs/microblaze-softmmu.mak b/default-configs/microblaze-softmmu.mak index ce26308..114 100644 --- a/default-configs/microblaze-softmmu.mak +++ b/default-configs/microblaze-softmmu.mak @@ -9,3 +9,6 @@ CONFIG_XILINX_SPI=y CONFIG_XILINX_ETHLITE=y CONFIG_SSI=y CONFIG_SSI_M25P80=y + +CONFIG_PETALOGIX_S3ADSP1800=y +CONFIG_PETALOGIX_ML605=y diff --git a/default-configs/microblazeel-softmmu.mak b/default-configs/microblazeel-softmmu.mak index acf22c5..a6f22cd 100644 --- a/default-configs/microblazeel-softmmu.mak +++ b/default-configs/microblazeel-softmmu.mak @@ -9,3 +9,6 @@ CONFIG_XILINX_SPI=y CONFIG_XILINX_ETHLITE=y CONFIG_SSI=y CONFIG_SSI_M25P80=y + +CONFIG_PETALOGIX_S3ADSP1800=y +CONFIG_PETALOGIX_ML605=y diff --git a/hw/microblaze/Makefile.objs b/hw/microblaze/Makefile.objs index c65e2aa..43fa3fa 100644 --- a/hw/microblaze/Makefile.objs +++ b/hw/microblaze/Makefile.objs @@ -1,4 +1,3 @@ -obj-y += petalogix_s3adsp1800_mmu.o -obj-y += petalogix_ml605_mmu.o -obj-y += boot.o -obj-y += pic_cpu.o +obj-y += boot.o pic_cpu.o +obj-$(CONFIG_PETALOGIX_S3ADSP1800) += petalogix_s3adsp1800_mmu.o +obj-$(CONFIG_PETALOGIX_ML605) += petalogix_ml605_mmu.o -- 1.7.10.4
[Qemu-devel] [PATCH 35/47] hw/pci/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/pci/Kconfig |8 1 file changed, 8 insertions(+) create mode 100644 hw/pci/Kconfig diff --git a/hw/pci/Kconfig b/hw/pci/Kconfig new file mode 100644 index 000..31a755d --- /dev/null +++ b/hw/pci/Kconfig @@ -0,0 +1,8 @@ +config PCI +bool + +menu "PCI" +config PCI_HOTPLUG +bool "Enable hotplugging for PCI devices" +depends on PCI +endmenu -- 1.7.10.4
[Qemu-devel] [PATCH 33/47] hw/net/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/net/Kconfig | 74 1 file changed, 74 insertions(+) create mode 100644 hw/net/Kconfig diff --git a/hw/net/Kconfig b/hw/net/Kconfig new file mode 100644 index 000..19ca549 --- /dev/null +++ b/hw/net/Kconfig @@ -0,0 +1,74 @@ +menu "Network devices" +config DP8393X +bool + +config XEN_BACKEND +bool + +config NE2000_PCI +bool "NE2000 ethernet card" +depends on PCI + +config EEPRO100_PCI +bool "Intel EEPRO100" +depends on PCI + +config PCNET_COMMON +bool + +config PCNET_PCI +bool +depends on PCI +select PCNET_COMMON + +config E1000_PCI +bool "Intel Gigabit E1000 ethernet" +depends on PCI + +config RTL8139_PCI +bool "Realtek RTL8139 ethernet" +depends on PCI + +config VMXNET3_PCI +bool "VmWare paravirtual Ethernet v3" +depends on PCI + +config SMC91C111 +bool + +config LAN9118 +bool +select PTIMER + +config NE2000_ISA +bool +select NE2000_PCI + +config OPENCORES_ETH +bool + +config XGMAC +bool + +config MIPSNET +bool + +config XILINX_AXI +bool + +config STELLARIS_ENET +bool + +config LANCE +bool +select PCNET_COMMON + +config COLDFIRE +bool + +config XILINX_ETHLITE +bool + +config VIRTIO +bool +endmenu -- 1.7.10.4
[Qemu-devel] [PATCH 11/47] hw/mips/Makefile.objs: Create CONFIG_* for mips boards
Add the new configs to default-configs/mips*-sofmmu.mak. Signed-off-by: Ákos Kovács --- default-configs/mips-softmmu.mak |6 ++ default-configs/mips64-softmmu.mak |6 ++ default-configs/mips64el-softmmu.mak |6 ++ default-configs/mipsel-softmmu.mak |6 ++ hw/mips/Makefile.objs|8 ++-- 5 files changed, 30 insertions(+), 2 deletions(-) diff --git a/default-configs/mips-softmmu.mak b/default-configs/mips-softmmu.mak index 71177ef..e6ed0ee 100644 --- a/default-configs/mips-softmmu.mak +++ b/default-configs/mips-softmmu.mak @@ -35,3 +35,9 @@ CONFIG_MC146818RTC=y CONFIG_VT82C686=y CONFIG_ISA_TESTDEV=y CONFIG_EMPTY_SLOT=y + +CONFIG_R4K=y +CONFIG_JAZZ=y +CONFIG_MALTA=y +CONFIG_MIPSSIM=y +CONFIG_FULONG=y diff --git a/default-configs/mips64-softmmu.mak b/default-configs/mips64-softmmu.mak index 617301b..643bb80 100644 --- a/default-configs/mips64-softmmu.mak +++ b/default-configs/mips64-softmmu.mak @@ -35,3 +35,9 @@ CONFIG_MC146818RTC=y CONFIG_VT82C686=y CONFIG_ISA_TESTDEV=y CONFIG_EMPTY_SLOT=y + +CONFIG_R4K=y +CONFIG_JAZZ=y +CONFIG_MALTA=y +CONFIG_MIPSSIM=y +CONFIG_FULONG=y diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak index 317b151..6aa8ad6 100644 --- a/default-configs/mips64el-softmmu.mak +++ b/default-configs/mips64el-softmmu.mak @@ -37,3 +37,9 @@ CONFIG_MC146818RTC=y CONFIG_VT82C686=y CONFIG_ISA_TESTDEV=y CONFIG_EMPTY_SLOT=y + +CONFIG_R4K=y +CONFIG_JAZZ=y +CONFIG_MALTA=y +CONFIG_MIPSSIM=y +CONFIG_FULONG=y diff --git a/default-configs/mipsel-softmmu.mak b/default-configs/mipsel-softmmu.mak index 532a9ae..783ed49 100644 --- a/default-configs/mipsel-softmmu.mak +++ b/default-configs/mipsel-softmmu.mak @@ -35,3 +35,9 @@ CONFIG_MC146818RTC=y CONFIG_VT82C686=y CONFIG_ISA_TESTDEV=y CONFIG_EMPTY_SLOT=y + +CONFIG_R4K=y +CONFIG_JAZZ=y +CONFIG_MALTA=y +CONFIG_MIPSSIM=y +CONFIG_FULONG=y diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs index 0a652f8..304902b 100644 --- a/hw/mips/Makefile.objs +++ b/hw/mips/Makefile.objs @@ -1,4 +1,8 @@ -obj-y += mips_r4k.o mips_jazz.o mips_malta.o mips_mipssim.o obj-y += addr.o cputimer.o mips_int.o -obj-$(CONFIG_FULONG) += mips_fulong2e.o obj-y += gt64xxx_pci.o + +obj-$(CONFIG_R4K) += mips_r4k.o +obj-$(CONFIG_JAZZ) += mips_jazz.o +obj-$(CONFIG_MALTA) += mips_malta.o +obj-$(CONFIG_FULONG) += mips_fulong2e.o +obj-$(CONFIG_MIPSSIM) += mips_mipssim.o -- 1.7.10.4
[Qemu-devel] [PATCH 12/47] hw/ppc/Makefile.objs: Build all boards conditinally
CONFIG_PPC405, CONFIG_PPC440, CONFIG_PPC4XX, CONFIG_PREP, CONFIG_MAC_OLDWORLD, CONFIG_MAC_NEWWORLD, CONFIG_VIRTEX configuration options created for default-configs/ppc*-softmmu.mak. Signed-off-by: Ákos Kovács --- default-configs/ppc-softmmu.mak|8 default-configs/ppc64-softmmu.mak |9 + default-configs/ppcemb-softmmu.mak |8 hw/ppc/Makefile.objs | 13 +++-- 4 files changed, 32 insertions(+), 6 deletions(-) diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak index f5cd0bd..ec39ded 100644 --- a/default-configs/ppc-softmmu.mak +++ b/default-configs/ppc-softmmu.mak @@ -46,3 +46,11 @@ CONFIG_OPENPIC_KVM=$(and $(CONFIG_E500),$(CONFIG_KVM)) # For PReP CONFIG_MC146818RTC=y CONFIG_ISA_TESTDEV=y + +CONFIG_PREP=y +CONFIG_PPC4XX=y +CONFIG_PPC405=y +CONFIG_PPC440=y +CONFIG_MAC_OLDWORLD=y +CONFIG_MAC_NEWWORLD=y +CONFIG_VIRTEX=y diff --git a/default-configs/ppc64-softmmu.mak b/default-configs/ppc64-softmmu.mak index 975112a..bfe9dce 100644 --- a/default-configs/ppc64-softmmu.mak +++ b/default-configs/ppc64-softmmu.mak @@ -55,3 +55,12 @@ CONFIG_I82374=y CONFIG_I8257=y CONFIG_MC146818RTC=y CONFIG_ISA_TESTDEV=y + +CONFIG_PREP=y +CONFIG_PPC4XX=y +CONFIG_PPC405=y +CONFIG_PPC440=y +CONFIG_PREP=y +CONFIG_MAC_OLDWORLD=y +CONFIG_MAC_NEWWORLD=y +CONFIG_VIRTEX=y diff --git a/default-configs/ppcemb-softmmu.mak b/default-configs/ppcemb-softmmu.mak index 4411203..1e17114 100644 --- a/default-configs/ppcemb-softmmu.mak +++ b/default-configs/ppcemb-softmmu.mak @@ -41,3 +41,11 @@ CONFIG_OPENPIC_KVM=$(and $(CONFIG_E500),$(CONFIG_KVM)) # For PReP CONFIG_MC146818RTC=y CONFIG_ISA_TESTDEV=y + +CONFIG_PREP=y +CONFIG_PPC4XX=y +CONFIG_PPC405=y +CONFIG_PPC440=y +CONFIG_MAC_OLDWORLD=y +CONFIG_MAC_NEWWORLD=y +CONFIG_VIRTEX=y diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index 7a1cd5d..9a52a5e 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -5,16 +5,17 @@ obj-$(CONFIG_PSERIES) += spapr.o spapr_vio.o spapr_events.o obj-$(CONFIG_PSERIES) += spapr_hcall.o spapr_iommu.o spapr_rtas.o obj-$(CONFIG_PSERIES) += spapr_pci.o # PowerPC 4xx boards -obj-y += ppc405_boards.o ppc4xx_devs.o ppc405_uc.o ppc440_bamboo.o -obj-y += ppc4xx_pci.o +obj-$(CONFIG_PPC405) += ppc405_boards.o ppc405_uc.o +obj-$(CONFIG_PPC440) += ppc440_bamboo.o +obj-$(CONFIG_PPC4XX) += ppc4xx_pci.o ppc4xx_devs.o # PReP -obj-y += prep.o +obj-$(CONFIG_PREP) += prep.o # OldWorld PowerMac -obj-y += mac_oldworld.o +obj-$(CONFIG_MAC_OLDWORLD) += mac_oldworld.o # NewWorld PowerMac -obj-y += mac_newworld.o +obj-$(CONFIG_MAC_NEWWORLD) += mac_newworld.o # e500 obj-$(CONFIG_E500) += e500.o mpc8544ds.o e500plat.o obj-$(CONFIG_E500) += mpc8544_guts.o ppce500_spin.o # PowerPC 440 Xilinx ML507 reference board. -obj-y += virtex_ml507.o +obj-$(CONFIG_VIRTEX) += virtex_ml507.o -- 1.7.10.4
[Qemu-devel] [PATCH 14/47] hw/sparc/Makefile.objs: CONFIG_* for sun4m and leon3 created
CONFIG_LEON3 added to default-configs/sparc-softmmu.mak. Signed-off-by: Ákos Kovács --- default-configs/sparc-softmmu.mak |2 ++ hw/sparc/Makefile.objs|3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/default-configs/sparc-softmmu.mak b/default-configs/sparc-softmmu.mak index 8fc93dd..8680d75 100644 --- a/default-configs/sparc-softmmu.mak +++ b/default-configs/sparc-softmmu.mak @@ -15,4 +15,6 @@ CONFIG_CS4231=y CONFIG_GRLIB=y CONFIG_STP2000=y CONFIG_ECCMEMCTL=y + CONFIG_SUN4M=y +CONFIG_LEON3=y diff --git a/hw/sparc/Makefile.objs b/hw/sparc/Makefile.objs index c987b5b..540cedc 100644 --- a/hw/sparc/Makefile.objs +++ b/hw/sparc/Makefile.objs @@ -1 +1,2 @@ -obj-y += sun4m.o leon3.o +obj-$(CONFIG_SUN4M) += sun4m.o +obj-$(CONFIG_LEON3) += leon3.o -- 1.7.10.4
[Qemu-devel] [PATCH 36/47] hw/pci-bridge/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/pci-bridge/Kconfig |3 +++ 1 file changed, 3 insertions(+) create mode 100644 hw/pci-bridge/Kconfig diff --git a/hw/pci-bridge/Kconfig b/hw/pci-bridge/Kconfig new file mode 100644 index 000..1d23483 --- /dev/null +++ b/hw/pci-bridge/Kconfig @@ -0,0 +1,3 @@ +config DEC_PCI +bool +select PCI -- 1.7.10.4
[Qemu-devel] [PATCH 13/47] hw/sh4/Makefile.objs: Build sh4 boards conditionally
New CONFIG_* varibales created for r2d and shix boards and added to the default-configs/sh4*-softmmu.mak. Signed-off-by: Ákos Kovács --- default-configs/sh4-softmmu.mak |3 +++ default-configs/sh4eb-softmmu.mak |3 +++ hw/sh4/Makefile.objs |4 ++-- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/default-configs/sh4-softmmu.mak b/default-configs/sh4-softmmu.mak index 8e00390..6eb62d7 100644 --- a/default-configs/sh4-softmmu.mak +++ b/default-configs/sh4-softmmu.mak @@ -16,3 +16,6 @@ CONFIG_PCSPK=y CONFIG_I82374=y CONFIG_I8257=y CONFIG_MC146818RTC=y + +CONFIG_R2D=y +CONFIG_SHIX=y diff --git a/default-configs/sh4eb-softmmu.mak b/default-configs/sh4eb-softmmu.mak index efdd058..ba962df 100644 --- a/default-configs/sh4eb-softmmu.mak +++ b/default-configs/sh4eb-softmmu.mak @@ -16,3 +16,6 @@ CONFIG_PCSPK=y CONFIG_I82374=y CONFIG_I8257=y CONFIG_MC146818RTC=y + +CONFIG_R2D=y +CONFIG_SHIX=y diff --git a/hw/sh4/Makefile.objs b/hw/sh4/Makefile.objs index 2393702..3f9d652 100644 --- a/hw/sh4/Makefile.objs +++ b/hw/sh4/Makefile.objs @@ -1,4 +1,4 @@ -obj-y += shix.o r2d.o - obj-y += sh7750.o sh7750_regnames.o obj-y += sh_pci.o +obj-$(CONFIG_R2D) += r2d.o +obj-$(CONFIG_SHIX) += shix.o -- 1.7.10.4
[Qemu-devel] [PATCH 42/47] hw/tpm/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/tpm/Kconfig |6 ++ 1 file changed, 6 insertions(+) create mode 100644 hw/tpm/Kconfig diff --git a/hw/tpm/Kconfig b/hw/tpm/Kconfig new file mode 100644 index 000..8c9fb24 --- /dev/null +++ b/hw/tpm/Kconfig @@ -0,0 +1,6 @@ +config TPM_TIS +bool +#select ISA + +config TPM_PASSTHROUGH +bool -- 1.7.10.4
[Qemu-devel] [PATCH 17/47] hw/9pfs/Kconfig: Add 9pfs Kconfig
Signed-off-by: Ákos Kovács --- hw/9pfs/Kconfig |2 ++ 1 file changed, 2 insertions(+) create mode 100644 hw/9pfs/Kconfig diff --git a/hw/9pfs/Kconfig b/hw/9pfs/Kconfig new file mode 100644 index 000..f16ffed --- /dev/null +++ b/hw/9pfs/Kconfig @@ -0,0 +1,2 @@ +config OPEN_BY_HANDLE +bool -- 1.7.10.4
[Qemu-devel] [PATCH 15/47] hw/lm32/Makefile.objs: Conditionally build lm32 and milkmyst
Signed-off-by: Ákos Kovács --- hw/lm32/Makefile.objs |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/lm32/Makefile.objs b/hw/lm32/Makefile.objs index ea6418a..c394186 100644 --- a/hw/lm32/Makefile.objs +++ b/hw/lm32/Makefile.objs @@ -1,3 +1,3 @@ # LM32 boards -obj-y += lm32_boards.o -obj-y += milkymist.o +obj-$(CONFIG_LM32) += lm32_boards.o +obj-$(CONFIG_MILKYMIST) += milkymist.o -- 1.7.10.4
[Qemu-devel] [PATCH 45/47] hw/Kconfig: Add the main Kconfig for hw/
Signed-off-by: Ákos Kovács --- hw/Kconfig | 27 +++ 1 file changed, 27 insertions(+) create mode 100644 hw/Kconfig diff --git a/hw/Kconfig b/hw/Kconfig new file mode 100644 index 000..23e062b --- /dev/null +++ b/hw/Kconfig @@ -0,0 +1,27 @@ +source "hw/9pfs/Kconfig" +source "hw/audio/Kconfig" +source "hw/block/Kconfig" +source "hw/char/Kconfig" +source "hw/core/Kconfig" +source "hw/cpu/Kconfig" +source "hw/display/Kconfig" +source "hw/dma/Kconfig" +source "hw/gpio/Kconfig" +source "hw/i2c/Kconfig" +source "hw/input/Kconfig" +source "hw/intc/Kconfig" +source "hw/ide/Kconfig" +source "hw/isa/Kconfig" +source "hw/misc/Kconfig" +source "hw/net/Kconfig" +source "hw/nvram/Kconfig" +source "hw/pci-bridge/Kconfig" +source "hw/pci-host/Kconfig" +source "hw/pci/Kconfig" +source "hw/scsi/Kconfig" +source "hw/sd/Kconfig" +source "hw/ssi/Kconfig" +source "hw/timer/Kconfig" +source "hw/tpm/Kconfig" +source "hw/usb/Kconfig" +source "hw/watchdog/Kconfig" -- 1.7.10.4
[Qemu-devel] [PATCH 21/47] hw/char/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/char/Kconfig | 24 1 file changed, 24 insertions(+) create mode 100644 hw/char/Kconfig diff --git a/hw/char/Kconfig b/hw/char/Kconfig new file mode 100644 index 000..7ad0bd3 --- /dev/null +++ b/hw/char/Kconfig @@ -0,0 +1,24 @@ +config IPACK +bool +depends on PCI + +config ESCC +bool + +config PARALLEL +bool +#select ISA + +config SERIAL +bool +#select ISA + +config SERIAL_PCI +bool +depends on PCI + +config SCLPCONSOLE +bool + +config PL011 +bool -- 1.7.10.4
[Qemu-devel] [PATCH 18/47] hw/arm/Kconfig: Add ARM Kconfig
Signed-off-by: Ákos Kovács --- hw/arm/Kconfig | 235 1 file changed, 235 insertions(+) create mode 100644 hw/arm/Kconfig diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig new file mode 100644 index 000..c72b949 --- /dev/null +++ b/hw/arm/Kconfig @@ -0,0 +1,235 @@ +config ARM +bool +#select ARM_NVIC +default y + +menu "ARM" +config EXYNOS4 +bool "Samsung Exynos4210 SoC" +select A9SCU # snoop controll unit +select USB_EHCI +select LAN9118 +select PL310 # cache controller +select PCI +select ARM_GIC +select ARM_NVIC +select ARM9MPCORE +select ARM_MPTIMER +default y + +config HIGHBANK +bool "Calxeda Highbank SoC" +select A9SCU # snoop controll unit +select AHCI +select PL011 # UART +select PL022 # Serial port +select PL031 # RTC +select PL061 # GPIO +select PL310 # cache controller +select XGMAC # ethernet +select ARM_TIMER # sp804 +select ARM_NVIC +select ARM_MPTIMER +select ARM9MPCORE +select PCI +default y + +config INTEGRATORCP +bool "ARM Integrator CP" +select SMC91C111 +select ARM_TIMER +select PL011 # UART +select PL031 # RTC +select PL050 # keyboard/mouse +select PL110 # pl111 LCD controller +select PL181 # display +select PCI +default y + +config KZM +bool "Kzm" +select SERIAL +select IMX +select LAN9118 +select PCI +default y + +config MUSICPAL +bool "Marvell MV88W8618 / Freecom MusicPal" +select PFLASH_CFI02 +select PTIMER +select PCI +select BITBANG_I2C +select MARVELL_88W8618 +select WM8750 +select SERIAL +default y + +config OMAP +bool "Texas Instruments Open Multimedia Applications Platform" +select SERIAL +select PFLASH_CFI01 +select PCI +default y + +config NSERIES +bool "Nokia N-Series tablets" +select TMP105 # tempature sensor +select BLIZZARD # LCD/TV controller +select ONENAND +select TSC210X # touchscreen/sensors/audio +select TSC2005 # touchscreen/sensors/keypad +select LM832X # GPIO keyboard chip +select TWL92230 # energy-management +depends on OMAP +default y + +config PALM +bool "PalmOne PDAs" +select TSC210X +depends on OMAP +default y + +config STELLARIS +bool +select PL011 # UART +select PL022 # Serial port +select PL061 # GPIO +select STELLARIS_INPUT +select STELLARIS_ENET # ethernet +select SSD0303 # OLED display +select SSD0323 # OLED display +select SSI_SD +default y# for armv7m_nvic_* + +config REALVIEW +bool "ARM Realview baseboard" +# networking +select SMC91C111 +select LAN9118 +select RTL8139_PCI + +select VERSATILE_PCI +select WM8750 # audio codec +select PL011 # UART +select PL041 # audio codec +select PL050 # keyboard/mouse +select PL061 # GPIO +select PL080 # DMA controller +select VERSATILE_I2C +select DS1338 # I2C RTC+NVRAM +select USB_OHCI +select ARM_GIC +select ARM_MPTIMER +select ARM15MPCORE +select ARM11MPCORE +select ARM9MPCORE + +config VERSATILEPB +bool "ARM Versatile platform" +select PFLASH_CFI01 +select PL031 # RTC +select PL050 # keyboard/mouse +select PL080 # DMA controller +select PL181 # display +select PL190 # Vector PIC +select ARM_TIMER # sp804 +select USB_OHCI +select LSI_SCSI_PCI +select REALVIEW +default y + +config VXPRESS +bool "ARM Versatile Express" +select PFLASH_CFI01 +select LAN9118 +select PL011 # UART +select PL031 # RTC +select PL041 # audio codec +select PL110 # pl111 LCD controller +select PL181 # display +select PL310 # cache controller +select A9SCU # snoop controll unit +select ARM_TIMER # sp804 +select ARM_MPTIMER +select ARM15MPCORE +select ARM9MPCORE +select REALVIEW +default y + +config ZYNQ +bool "Xilinx Zynq Baseboard" +select ARM9MPCORE +select CADENCE # UART +select PCI +select PFLASH_CFI02 +select SDHCI +select USB_EHCI +select XILINX # UART +select XILINX_SPI +select XILINX_SPISS +default y + +config PXA2XX +bool "Intel XScale PXA255/270" +select SERIAL +
[Qemu-devel] [PATCH 22/47] hw/core/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/core/Kconfig | 11 +++ 1 file changed, 11 insertions(+) create mode 100644 hw/core/Kconfig diff --git a/hw/core/Kconfig b/hw/core/Kconfig new file mode 100644 index 000..8c275f7 --- /dev/null +++ b/hw/core/Kconfig @@ -0,0 +1,11 @@ +config EMPTY_SLOT +bool + +config XILINX_AXI +bool + +config PTIMER +bool + +config SOFTMMU +bool -- 1.7.10.4
[Qemu-devel] [PATCH 25/47] hw/dma/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/dma/Kconfig | 25 + 1 file changed, 25 insertions(+) create mode 100644 hw/dma/Kconfig diff --git a/hw/dma/Kconfig b/hw/dma/Kconfig new file mode 100644 index 000..1ef6b47 --- /dev/null +++ b/hw/dma/Kconfig @@ -0,0 +1,25 @@ +config RC4030 +bool + +config PL080 +bool + +config PL330 +bool + +config I82374 +bool +#select ISA +select I8257 + +config I8257 +bool +#select ISA + +config XILINX_AXI +bool +select PTIMER + +config STP2000 +bool +select SUN4M -- 1.7.10.4
[Qemu-devel] [PATCH 24/47] hw/display/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/display/Kconfig | 84 1 file changed, 84 insertions(+) create mode 100644 hw/display/Kconfig diff --git a/hw/display/Kconfig b/hw/display/Kconfig new file mode 100644 index 000..1f6f386 --- /dev/null +++ b/hw/display/Kconfig @@ -0,0 +1,84 @@ +config ADS7846 +bool +select SSI + +config VGA_CIRRUS +bool +depends on PCI +select VGA +#select ISA + +config G364FB +bool + +config JAZZ_LED +bool + +config PL110 +bool +select FRAMEBUFFER + +config SSD0303 +bool +#select I2C + +config SSD0323 +bool +select SSI + +config VGA_PCI +bool +select VGA +depends on PCI + +config VGA_ISA +bool +select VGA +#select ISA + +config VGA_ISA_MM +bool +select VGA + +config VMWARE_VGA +bool +select VGA +depends on PCI + +config BLIZZARD +bool + +config FRAMEBUFFER +bool + +config MILKYMIST +bool +select FRAMEBUFFER + +config ZAURUS +bool +select NAND +select ECC + +config OMAP +bool +select FRAMEBUFFER + +config PXA2XX +bool +select FRAMEBUFFER + +config MILKYMIST_TMU2 +bool + +config SM501 +bool + +config TCX +bool + +config VGA +bool + +config QXL +bool -- 1.7.10.4
[Qemu-devel] [PATCH 26/47] hw/gpio/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/gpio/Kconfig |5 + 1 file changed, 5 insertions(+) create mode 100644 hw/gpio/Kconfig diff --git a/hw/gpio/Kconfig b/hw/gpio/Kconfig new file mode 100644 index 000..820c76f --- /dev/null +++ b/hw/gpio/Kconfig @@ -0,0 +1,5 @@ +config MAX7310 +bool + +config PL061 +bool -- 1.7.10.4
[Qemu-devel] [PATCH 28/47] hw/ide/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/ide/Kconfig | 49 + 1 file changed, 49 insertions(+) create mode 100644 hw/ide/Kconfig diff --git a/hw/ide/Kconfig b/hw/ide/Kconfig new file mode 100644 index 000..c73af88 --- /dev/null +++ b/hw/ide/Kconfig @@ -0,0 +1,49 @@ +config IDE_CORE +bool +#select ISA + +config IDE_QDEV +bool +select IDE_CORE + +config IDE_PCI +bool "IDE PCI" +select IDE_QDEV +select USB_XHCI + +config IDE_ISA +bool +#select ISA +select IDE_QDEV + +config IDE_PIIX +bool +select IDE_QDEV +depends on PCI + +config IDE_CMD646 +bool +#select ISA +depends on PCI +select IDE_QDEV + +config IDE_MACIO +bool +select IDE_QDEV + +config IDE_MMIO +bool +select IDE_QDEV + +config IDE_VIA +bool +select IDE_QDEV +depends on PCI + +config MICRODRIVE +bool +select IDE_CORE + +config AHCI +bool +select IDE_QDEV -- 1.7.10.4
[Qemu-devel] [PATCH 09/47] hw/m68k/Makefile.objs: Conditionally build boards
CONFIG_AN5206, CONFIG_DUMMY_M68K, CONFIG_MCF5206, CONFIG_MCF5208 make variables created for m68k boards, and added to default-configs/m86k-softmmu.mak. Signed-off-by: Ákos Kovács --- default-configs/m68k-softmmu.mak |3 +++ hw/m68k/Makefile.objs|7 --- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/default-configs/m68k-softmmu.mak b/default-configs/m68k-softmmu.mak index d9552df..72e1336 100644 --- a/default-configs/m68k-softmmu.mak +++ b/default-configs/m68k-softmmu.mak @@ -4,3 +4,6 @@ include pci.mak include usb.mak CONFIG_COLDFIRE=y CONFIG_PTIMER=y +CONFIG_AN5206=y +CONFIG_DUMMY_M68K=y +CONFIG_MCF5208=y diff --git a/hw/m68k/Makefile.objs b/hw/m68k/Makefile.objs index c4352e7..288dbb5 100644 --- a/hw/m68k/Makefile.objs +++ b/hw/m68k/Makefile.objs @@ -1,4 +1,5 @@ -obj-y += an5206.o mcf5208.o -obj-y += dummy_m68k.o +obj-$(CONFIG_AN5206) += an5206.o +obj-$(CONFIG_DUMMY_M68K) += dummy_m68k.o -obj-y += mcf5206.o mcf_intc.o +obj-$(CONFIG_MCF5206) += mcf5206.o +obj-$(CONFIG_MCF5208) += mcf5208.o mcf_intc.o -- 1.7.10.4
[Qemu-devel] [PATCH 30/47] hw/intc/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/intc/Kconfig | 28 1 file changed, 28 insertions(+) create mode 100644 hw/intc/Kconfig diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig new file mode 100644 index 000..c4dec79 --- /dev/null +++ b/hw/intc/Kconfig @@ -0,0 +1,28 @@ +config HEATHROW_PIC +bool + +config I8259 +bool + +config PL190 +bool + +config APIC +bool + +config ARM_GIC +bool + +config ARM_GIC_KVM +bool +depends on KVM + +config IOAPIC +bool + +config OPENPICS +bool + +config STELLARIS +bool +select ARM_GIC -- 1.7.10.4
[Qemu-devel] [PATCH 31/47] hw/isa/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/isa/Kconfig | 42 ++ 1 file changed, 42 insertions(+) create mode 100644 hw/isa/Kconfig diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig new file mode 100644 index 000..8b6baaf --- /dev/null +++ b/hw/isa/Kconfig @@ -0,0 +1,42 @@ +#config ISA +# bool + +config APM +bool + +config I82378 +bool +#select ISA +select I8259 # irq +select PCSPK +select I82374 # DMA +select MC146818RTC # timer +depends on PCI + +config ISA_MMIO +bool +#select ISA + +config PC87312 +bool +#select ISA +select SERIAL +select PARALLEL +select FDC +select IDE_ISA + +config PIIX4 +bool +#select ISA +depends on PCI + +config VT82C686 +bool +#select ISA +depends on PCI + +config LPC_ICH9 +bool +#select ISA +depends on PCI +select APM -- 1.7.10.4
[Qemu-devel] [PATCH 37/47] hw/pci-host/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/pci-host/Kconfig | 36 1 file changed, 36 insertions(+) create mode 100644 hw/pci-host/Kconfig diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig new file mode 100644 index 000..12014f5 --- /dev/null +++ b/hw/pci-host/Kconfig @@ -0,0 +1,36 @@ +config PREP_PCI +bool +select PCI + +config GRACKLE_PCI +bool +select PCI + +config UNIN_PCI +bool +select PCI + +config PPCE500_PCI +bool +select PCI + +config VERSATILE_PCI +bool +select PCI + +config PCI_APB +bool +select PCI + +config FULONG +bool +select PCI + +config PCI_PIIX +bool +select PCI +#select ISA + +config PCI_Q35 +bool +select PCI -- 1.7.10.4
[Qemu-devel] [PATCH 32/47] hw/misc/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/misc/Kconfig | 67 +++ 1 file changed, 67 insertions(+) create mode 100644 hw/misc/Kconfig diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig new file mode 100644 index 000..5a6477f --- /dev/null +++ b/hw/misc/Kconfig @@ -0,0 +1,67 @@ +config APPLESMC +bool +#select ISA + +config MAX111X +bool +select SSI + +config TMP105 +bool +#select I2C + +config ISA_DEBUG +bool +#select ISA + +config SGA +bool +#depends on PCI + +config ISA_TESTDEV +bool +#select ISA + +config PCI_TESTDEV +bool +depends on PCI + +config VMPORT +bool +#select ISA + +config PL310 +bool + +config PUV3 +bool + +config MACIO +bool +depends on PCI +select MAC_NVRAM + +config CUDA +bool +select MACIO + +config MAC_DBDMA +bool +select MACIO +select ADB +#select ISA + +config A9SCU +bool + +config ECCMEMCTL +bool +select ECC + +config OMAP +bool +select ECCMEMCTL +select NAND + +config PVPANIC +bool -- 1.7.10.4
[Qemu-devel] [PATCH 34/47] hw/nvram/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/nvram/Kconfig |5 + 1 file changed, 5 insertions(+) create mode 100644 hw/nvram/Kconfig diff --git a/hw/nvram/Kconfig b/hw/nvram/Kconfig new file mode 100644 index 000..1235c6e --- /dev/null +++ b/hw/nvram/Kconfig @@ -0,0 +1,5 @@ +config DS1225Y +bool + +config MAC_NVRAM +bool -- 1.7.10.4
[Qemu-devel] [PATCH 38/47] hw/scsi/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/scsi/Kconfig | 21 + 1 file changed, 21 insertions(+) create mode 100644 hw/scsi/Kconfig diff --git a/hw/scsi/Kconfig b/hw/scsi/Kconfig new file mode 100644 index 000..5e493a6 --- /dev/null +++ b/hw/scsi/Kconfig @@ -0,0 +1,21 @@ +menu "SCSI devices" +config LSI_SCSI_PCI +bool "LSI53C895A SCSI Host Bus Adapter" +depends on PCI + +config MEGASAS_SCSI_PCI +bool "MegaRAID SAS 8708EM2 Host Bus Adapter" +depends on PCI + +config VMW_PVSCSI_SCSI_PCI +bool "VMware PVSCSI paravirtual SCSI bus" +depends on PCI + +config ESP +bool + +config ESP_PCI +bool "ESP/NCR53C9x" +depends on PCI +select ESP +endmenu -- 1.7.10.4
[Qemu-devel] [PATCH 41/47] hw/timer/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/timer/Kconfig | 80 ++ 1 file changed, 80 insertions(+) create mode 100644 hw/timer/Kconfig diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig new file mode 100644 index 000..5d55137 --- /dev/null +++ b/hw/timer/Kconfig @@ -0,0 +1,80 @@ +config ARM_TIMER +bool +select PTIMER + +config CADENCE +bool + +config DS1338 +bool + +config HPET +bool + +config I8254 +bool +select MC146818RTC +#select ISA + +config M48T59 +bool +#select ISA + +config PL031 +bool + +config PUV3 +bool +select PTIMER + +config TWL92230 +bool + +config XILINX +bool +select PTIMER + +config SLAVIO +bool +select PTIMER + +config ETRAXFS +bool +select PTIMER + +config GRLIB +bool +select PTIMER + +config IMX +bool +select PTIMER + +config LM32 +bool +select PTIMER + +config MILKYMIST +bool +select PTIMER + +config EXYNOS4 +bool +select PTIMER + +config SH4 +bool +select PTIMER + +config TUSB6010 +bool +select USB_MUSB + +config ARM_MPTIMER +bool +select PTIMER + +config MC146818RTC +bool +select PTIMER +#select ISA -- 1.7.10.4
[Qemu-devel] [PATCH 39/47] hw/sd/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/sd/Kconfig | 23 +++ 1 file changed, 23 insertions(+) create mode 100644 hw/sd/Kconfig diff --git a/hw/sd/Kconfig b/hw/sd/Kconfig new file mode 100644 index 000..eaef4f7 --- /dev/null +++ b/hw/sd/Kconfig @@ -0,0 +1,23 @@ +config SD +bool + +config PL181 +bool +select SD + +config SSI_SD +bool +select SD +select SSI + +config SDHCI +bool +select SD + +config MILKYMIST +bool +select SD + +config PXA2XX +bool +select SD -- 1.7.10.4
[Qemu-devel] [PATCH 40/47] hw/ssi/Kconfig: Add Kconfig file
Signed-off-by: Ákos Kovács --- hw/ssi/Kconfig | 14 ++ 1 file changed, 14 insertions(+) create mode 100644 hw/ssi/Kconfig diff --git a/hw/ssi/Kconfig b/hw/ssi/Kconfig new file mode 100644 index 000..4f89fd2 --- /dev/null +++ b/hw/ssi/Kconfig @@ -0,0 +1,14 @@ +config SSI +bool + +config PL022 +bool +select SSI + +config XILINX_SPI +bool +select SSI + +config XILINX_SPIPS +bool +select SSI -- 1.7.10.4
