Re: [Qemu-devel] Debugging with printf
I understand that they're not one and the same but there are similarities. After all the Emulator is based on QEMU. How would someone go about editing QEMU source to display messages? 2013/12/12 Stefan Hajnoczi > On Wed, Dec 11, 2013 at 04:36:14PM +0200, Mar Tsan wrote: > > Hello. I'm working with Android Emulator (which as I understand is > > something like QEMU but not the same) and I would like to print messages > > concerning the Emulator. What I mean is that I want to edit the source > code > > of the Emulator (adding some *printf*s to it) and display the results or > > write them to a file. Can someone help me, please? > > Please ask the Android (Emulator) community for help. This list is > about QEMU and we don't know specifics of the Android Emulator. > > Stefan >
[Qemu-devel] [PATCH v8 10/12] stream: Use bdrv_drop_intermediate and drop close_unused_images
This reuses the new bdrv_drop_intermediate.
Signed-off-by: Fam Zheng
---
block/stream.c | 28 +---
1 file changed, 1 insertion(+), 27 deletions(-)
diff --git a/block/stream.c b/block/stream.c
index 46bec7d..9cdcf0e 100644
--- a/block/stream.c
+++ b/block/stream.c
@@ -51,32 +51,6 @@ static int coroutine_fn stream_populate(BlockDriverState *bs,
return bdrv_co_copy_on_readv(bs, sector_num, nb_sectors, &qiov);
}
-static void close_unused_images(BlockDriverState *top, BlockDriverState *base,
-const char *base_id)
-{
-BlockDriverState *intermediate;
-intermediate = top->backing_hd;
-
-/* Must assign before bdrv_delete() to prevent traversing dangling pointer
- * while we delete backing image instances.
- */
-top->backing_hd = base;
-
-while (intermediate) {
-BlockDriverState *unused;
-
-/* reached base */
-if (intermediate == base) {
-break;
-}
-
-unused = intermediate;
-intermediate = intermediate->backing_hd;
-unused->backing_hd = NULL;
-bdrv_unref(unused);
-}
-}
-
static void coroutine_fn stream_run(void *opaque)
{
StreamBlockJob *s = opaque;
@@ -190,7 +164,7 @@ wait:
}
}
ret = bdrv_change_backing_file(bs, base_id, base_fmt);
-close_unused_images(bs, base, base_id);
+bdrv_drop_intermediate(bs, bs->backing_hd, base);
}
qemu_vfree(buf);
--
1.8.5.1
[Qemu-devel] [PATCH v8 07/12] block: Add backing_blocker in BlockDriverState
This makes use of op_blocker and blocks all the operations except for
commit target, on each BlockDriverState->backing_hd.
Signed-off-by: Fam Zheng
---
block.c | 13 +
include/block/block_int.h | 3 +++
2 files changed, 16 insertions(+)
diff --git a/block.c b/block.c
index 63a5918..b3993d7 100644
--- a/block.c
+++ b/block.c
@@ -961,7 +961,13 @@ fail:
void bdrv_set_backing_hd(BlockDriverState *bs, BlockDriverState *backing_hd)
{
if (bs->backing_hd) {
+assert(error_is_set(&bs->backing_blocker));
+bdrv_op_unblock_all(bs->backing_hd, bs->backing_blocker);
bdrv_unref(bs->backing_hd);
+} else {
+error_setg(&bs->backing_blocker,
+ "device is used as backing hd of '%s'",
+ bs->device_name);
}
bs->backing_hd = backing_hd;
@@ -970,6 +976,10 @@ void bdrv_set_backing_hd(BlockDriverState *bs,
BlockDriverState *backing_hd)
}
bdrv_ref(bs->backing_hd);
+bdrv_op_block_all(bs->backing_hd, bs->backing_blocker);
+/* Otherwise we won't be able to commit due to check in bdrv_commit */
+bdrv_op_unblock(bs->backing_hd, BLOCK_OP_TYPE_COMMIT,
+bs->backing_blocker);
pstrcpy(bs->backing_file, sizeof(bs->backing_file),
bs->backing_hd->file->filename);
pstrcpy(bs->backing_format, sizeof(bs->backing_format),
@@ -1476,6 +1486,9 @@ void bdrv_close(BlockDriverState *bs)
if (bs->drv) {
if (bs->backing_hd) {
+assert(error_is_set(&bs->backing_blocker));
+bdrv_op_unblock_all(bs->backing_hd, bs->backing_blocker);
+error_free(bs->backing_blocker);
bdrv_unref(bs->backing_hd);
bs->backing_hd = NULL;
}
diff --git a/include/block/block_int.h b/include/block/block_int.h
index 2f6556d..1ac17d5 100644
--- a/include/block/block_int.h
+++ b/include/block/block_int.h
@@ -341,6 +341,9 @@ struct BlockDriverState {
BlockJob *job;
QDict *options;
+
+/* The error object in use for blocking operations on backing_hd */
+Error *backing_blocker;
};
int get_tmp_filename(char *filename, int size);
--
1.8.5.1
[Qemu-devel] [PATCH v8 03/12] block: Introduce op_blockers to BlockDriverState
BlockDriverState.op_blockers is an array of lists with BLOCK_OP_TYPE_MAX
elements. Each list is a list of blockers of an operation type
(BlockOpType), that marks this BDS as currently blocked for a certain
type of operation with reason errors stored in the list. The rule of
usage is:
* BDS user who wants to take an operation should check if there's any
blocker of the type with bdrv_op_is_blocked().
* BDS user who wants to block certain types of operation, should call
bdrv_op_block (or bdrv_op_block_all to block all types of operations,
which is similar to the existing bdrv_set_in_use()).
* A blocker is only referenced by op_blockers, so the lifecycle is
managed by caller, and shouldn't be lost until unblock, so typically
a caller does these:
- Allocate a blocker with error_setg or similar, call bdrv_op_block()
to block some operations.
- Hold the blocker, do his job.
- Unblock operations that it blocked, with the same reason pointer
passed to bdrv_op_unblock().
- Release the blocker with error_free().
Signed-off-by: Fam Zheng
---
block.c | 71 +++
include/block/block.h | 7 +
include/block/block_int.h | 5
3 files changed, 83 insertions(+)
diff --git a/block.c b/block.c
index 13f001a..74547af 100644
--- a/block.c
+++ b/block.c
@@ -1627,6 +1627,8 @@ static void bdrv_move_feature_fields(BlockDriverState
*bs_dest,
/* keep the same entry in bdrv_states */
pstrcpy(bs_dest->device_name, sizeof(bs_dest->device_name),
bs_src->device_name);
+memcpy(bs_dest->op_blockers, bs_src->op_blockers,
+ sizeof(bs_dest->op_blockers));
bs_dest->list = bs_src->list;
}
@@ -4629,6 +4631,75 @@ void bdrv_unref(BlockDriverState *bs)
}
}
+struct BdrvOpBlocker {
+Error *reason;
+QLIST_ENTRY(BdrvOpBlocker) list;
+};
+
+bool bdrv_op_is_blocked(BlockDriverState *bs, BlockOpType op, Error **errp)
+{
+BdrvOpBlocker *blocker;
+assert((int) op >= 0 && op < BLOCK_OP_TYPE_MAX);
+if (!QLIST_EMPTY(&bs->op_blockers[op])) {
+blocker = QLIST_FIRST(&bs->op_blockers[op]);
+if (errp) {
+*errp = error_copy(blocker->reason);
+}
+return true;
+}
+return false;
+}
+
+void bdrv_op_block(BlockDriverState *bs, BlockOpType op, Error *reason)
+{
+BdrvOpBlocker *blocker;
+assert((int) op >= 0 && op < BLOCK_OP_TYPE_MAX);
+
+blocker = g_malloc0(sizeof(BdrvOpBlocker));
+blocker->reason = reason;
+QLIST_INSERT_HEAD(&bs->op_blockers[op], blocker, list);
+}
+
+void bdrv_op_unblock(BlockDriverState *bs, BlockOpType op, Error *reason)
+{
+BdrvOpBlocker *blocker, *next;
+assert((int) op >= 0 && op < BLOCK_OP_TYPE_MAX);
+QLIST_FOREACH_SAFE(blocker, &bs->op_blockers[op], list, next) {
+if (blocker->reason == reason) {
+QLIST_REMOVE(blocker, list);
+g_free(blocker);
+}
+}
+}
+
+void bdrv_op_block_all(BlockDriverState *bs, Error *reason)
+{
+int i;
+for (i = 0; i < BLOCK_OP_TYPE_MAX; i++) {
+bdrv_op_block(bs, i, reason);
+}
+}
+
+void bdrv_op_unblock_all(BlockDriverState *bs, Error *reason)
+{
+int i;
+for (i = 0; i < BLOCK_OP_TYPE_MAX; i++) {
+bdrv_op_unblock(bs, i, reason);
+}
+}
+
+bool bdrv_op_blocker_is_empty(BlockDriverState *bs)
+{
+int i;
+
+for (i = 0; i < BLOCK_OP_TYPE_MAX; i++) {
+if (!QLIST_EMPTY(&bs->op_blockers[i])) {
+return false;
+}
+}
+return true;
+}
+
void bdrv_set_in_use(BlockDriverState *bs, int in_use)
{
assert(bs->in_use != in_use);
diff --git a/include/block/block.h b/include/block/block.h
index 36efaea..890af1a 100644
--- a/include/block/block.h
+++ b/include/block/block.h
@@ -442,6 +442,13 @@ void bdrv_unref(BlockDriverState *bs);
void bdrv_set_in_use(BlockDriverState *bs, int in_use);
int bdrv_in_use(BlockDriverState *bs);
+bool bdrv_op_is_blocked(BlockDriverState *bs, BlockOpType op, Error **errp);
+void bdrv_op_block(BlockDriverState *bs, BlockOpType op, Error *reason);
+void bdrv_op_unblock(BlockDriverState *bs, BlockOpType op, Error *reason);
+void bdrv_op_block_all(BlockDriverState *bs, Error *reason);
+void bdrv_op_unblock_all(BlockDriverState *bs, Error *reason);
+bool bdrv_op_blocker_is_empty(BlockDriverState *bs);
+
#ifdef CONFIG_LINUX_AIO
int raw_get_aio_fd(BlockDriverState *bs);
#else
diff --git a/include/block/block_int.h b/include/block/block_int.h
index 8b132d7..458acd6 100644
--- a/include/block/block_int.h
+++ b/include/block/block_int.h
@@ -252,6 +252,8 @@ typedef struct BlockLimits {
int opt_transfer_length;
} BlockLimits;
+typedef struct BdrvOpBlocker BdrvOpBlocker;
+
/*
* Note: the function bdrv_append() copies and swaps contents of
* BlockDriverStates, so if you add new fields to this struct, please
@@ -333,6 +335,9 @@ struct BlockDriverState {
QLIST_HEAD(, BdrvTrackedRequest) tracked_reque
[Qemu-devel] [PATCH v8 09/12] block: Support dropping active in bdrv_drop_intermediate
Dropping intermediate could be useful both for commit and stream, and
BDS refcnt plus bdrv_swap could do most of the job nicely. It also needs
to work with op blockers.
Signed-off-by: Fam Zheng
---
block.c| 142 +
block/commit.c | 1 +
2 files changed, 63 insertions(+), 80 deletions(-)
diff --git a/block.c b/block.c
index fba7148..e5e7b0b 100644
--- a/block.c
+++ b/block.c
@@ -2176,114 +2176,96 @@ BlockDriverState *bdrv_find_overlay(BlockDriverState
*active,
return overlay;
}
-typedef struct BlkIntermediateStates {
-BlockDriverState *bs;
-QSIMPLEQ_ENTRY(BlkIntermediateStates) entry;
-} BlkIntermediateStates;
-
-
/*
- * Drops images above 'base' up to and including 'top', and sets the image
- * above 'top' to have base as its backing file.
+ * Drops images above 'base' up to and including 'top', and sets new 'base'
+ * as backing_hd of top_overlay (the image orignally has 'top' as backing
+ * file). top_overlay may be NULL if 'top' is active, no such update needed.
+ * Requires that the top_overlay to 'top' is opened r/w.
+ *
+ * 1) This will convert the following chain:
+ * ... <- base <- ... <- top <- overlay <-... <- active
+ *
+ * to
*
- * Requires that the overlay to 'top' is opened r/w, so that the backing file
- * information in 'bs' can be properly updated.
+ * ... <- base <- overlay <- active
*
- * E.g., this will convert the following chain:
- * bottom <- base <- intermediate <- top <- active
+ * 2) It is allowed for bottom==base, in which case it converts:
+ *
+ * ... <- base <- ... <- top <- overlay <- ... <- active
*
* to
*
- * bottom <- base <- active
+ * base <- overlay <- active
*
- * It is allowed for bottom==base, in which case it converts:
+ * 2) It also allows active==top, in which case it converts:
*
- * base <- intermediate <- top <- active
+ * ... <- base <- ... <- top (active)
*
* to
*
- * base <- active
+ * base == active == top, i.e. only base and lower remains: *top == *base when
+ * return.
+ *
+ * 3) If base==NULL, it will drop all the BDS below overlay and set its
+ * backing_hd to NULL. I.e.:
+ *
+ * base(NULL) <- ... <- overlay <- ... <- active
*
- * Error conditions:
- * if active == top, that is considered an error
+ * to
*
+ * overlay <- ... <- active
*/
int bdrv_drop_intermediate(BlockDriverState *active, BlockDriverState *top,
BlockDriverState *base)
{
-BlockDriverState *intermediate;
-BlockDriverState *base_bs = NULL;
-BlockDriverState *new_top_bs = NULL;
-BlkIntermediateStates *intermediate_state, *next;
-int ret = -EIO;
-
-QSIMPLEQ_HEAD(states_to_delete, BlkIntermediateStates) states_to_delete;
-QSIMPLEQ_INIT(&states_to_delete);
+BlockDriverState *drop_start, *overlay;
+int ret = -EINVAL;
-if (!top->drv || !base->drv) {
+if (!top->drv || (base && !base->drv)) {
goto exit;
}
-
-new_top_bs = bdrv_find_overlay(active, top);
-
-if (new_top_bs == NULL) {
-/* we could not find the image above 'top', this is an error */
-goto exit;
-}
-
-/* special case of new_top_bs->backing_hd already pointing to base -
nothing
- * to do, no intermediate images */
-if (new_top_bs->backing_hd == base) {
+if (top == base) {
ret = 0;
-goto exit;
-}
-
-intermediate = top;
-
-/* now we will go down through the list, and add each BDS we find
- * into our deletion queue, until we hit the 'base'
- */
-while (intermediate) {
-intermediate_state = g_malloc0(sizeof(BlkIntermediateStates));
-intermediate_state->bs = intermediate;
-QSIMPLEQ_INSERT_TAIL(&states_to_delete, intermediate_state, entry);
-
-if (intermediate->backing_hd == base) {
-base_bs = intermediate->backing_hd;
-break;
+} else if (top == active) {
+assert(base);
+drop_start = active->backing_hd;
+bdrv_swap(active, base);
+base->backing_hd = NULL;
+bdrv_unref(drop_start);
+ret = 0;
+} else {
+/* If there's an overlay, its backing_hd points to top's BDS now,
+ * the top image is dropped but this BDS structure is kept and swapped
+ * with base, this way we keep the pointers valid after dropping top */
+overlay = bdrv_find_overlay(active, top);
+if (!overlay) {
+goto exit;
+}
+if (base) {
+ret = bdrv_change_backing_file(overlay, base->filename,
+ base->drv->format_name);
+} else {
+ret = bdrv_change_backing_file(overlay, NULL, NULL);
+}
+if (ret) {
+goto exit;
+}
+if (base) {
+drop_start = top->backing_hd;
+bdrv_swap(top, base);
+/* Break the loop formed by bdrv_swap */
+bdrv_set_backing_hd(base, NULL);
+} e
[Qemu-devel] [PATCH v8 12/12] block: Allow backup on referenced named BlockDriverState
Drive backup is a read only operation on source bs. We want to allow this specific case to enable image-fleecing. Note that when image-fleecing job starts, the job still add its blocker to source bs, and any other operation on it will be blocked by that. Signed-off-by: Fam Zheng --- block.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/block.c b/block.c index e5e7b0b..2496e7d 100644 --- a/block.c +++ b/block.c @@ -980,6 +980,8 @@ void bdrv_set_backing_hd(BlockDriverState *bs, BlockDriverState *backing_hd) /* Otherwise we won't be able to commit due to check in bdrv_commit */ bdrv_op_unblock(bs->backing_hd, BLOCK_OP_TYPE_COMMIT, bs->backing_blocker); +bdrv_op_unblock(bs->backing_hd, BLOCK_OP_TYPE_BACKUP_SOURCE, +bs->backing_blocker); pstrcpy(bs->backing_file, sizeof(bs->backing_file), bs->backing_hd->file->filename); pstrcpy(bs->backing_format, sizeof(bs->backing_format), -- 1.8.5.1
[Qemu-devel] [PATCH v8 02/12] qapi: Add BlockOperationType enum
This adds the enum of all the operations that can be taken on a block
device.
Signed-off-by: Fam Zheng
---
qapi-schema.json | 50 ++
1 file changed, 50 insertions(+)
diff --git a/qapi-schema.json b/qapi-schema.json
index d6f8615..8e982a2 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -1440,6 +1440,56 @@
'data': ['commit', 'stream', 'mirror', 'backup'] }
##
+# @BlockOperationType
+#
+# Type of a block operation. (since 2.0)
+#
+# @backup-source: As a backup source. See the 'drive-backup' command.
+#
+# @backup-target: As a backup target. See the 'drive-backup' command.
+#
+# @change: See the 'change' command.
+#
+# @commit: See the 'block-commit' command.
+#
+# @dataplane: The virtio-blk dataplane feature.
+#
+# @drive-del: See the 'drive_del' HMP command.
+#
+# @eject: See the 'eject' command.
+#
+# @external-snapshot: See the 'blockdev-snapshot-sync' command.
+#
+# @internal-snapshot: See the 'blockdev-snapshot-internal-sync' command.
+#
+# @internal-snapshot-delete: See the 'blockdev-snapshot-delete-internal-sync'
command.
+#
+# @mirror: See the 'drive-mirror' command.
+#
+# @resize: See the 'block-resize' command.
+#
+# @stream: See the 'block-stream' command.
+#
+# Since: 2.0
+##
+{ 'enum': 'BlockOpType',
+ 'data': [
+'backup-source',
+'backup-target',
+'change',
+'commit',
+'dataplane',
+'drive-del',
+'eject',
+'external-snapshot',
+'internal-snapshot',
+'internal-snapshot-delete',
+'mirror',
+'resize',
+'stream'
+] }
+
+##
# @BlockJobInfo:
#
# Information about a long-running block device operation.
--
1.8.5.1
[Qemu-devel] [PATCH v8 05/12] block: Move op_blocker check from block_job_create to its caller
It makes no sense to check for "any" blocker on bs, we are here only
because of the mechanical conversion from in_use to op_blockers. Remove
it now, and let the callers check specific operation types. Backup and
mirror already have it, add checker to stream and commit.
Signed-off-by: Fam Zheng
---
blockdev.c | 8
blockjob.c | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/blockdev.c b/blockdev.c
index 29958bc..f342a80 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -1754,6 +1754,10 @@ void qmp_block_stream(const char *device, bool has_base,
return;
}
+if (bdrv_op_is_blocked(bs, BLOCK_OP_TYPE_STREAM, errp)) {
+return;
+}
+
if (base) {
base_bs = bdrv_find_backing_image(bs, base);
if (base_bs == NULL) {
@@ -1794,6 +1798,10 @@ void qmp_block_commit(const char *device,
return;
}
+if (bdrv_op_is_blocked(bs, BLOCK_OP_TYPE_COMMIT, errp)) {
+return;
+}
+
/* default top_bs is the active layer */
top_bs = bs;
diff --git a/blockjob.c b/blockjob.c
index f1ff036..21e21c0 100644
--- a/blockjob.c
+++ b/blockjob.c
@@ -41,7 +41,7 @@ void *block_job_create(const BlockJobDriver *driver,
BlockDriverState *bs,
{
BlockJob *job;
-if (bs->job || !bdrv_op_blocker_is_empty(bs)) {
+if (bs->job) {
error_set(errp, QERR_DEVICE_IN_USE, bdrv_get_device_name(bs));
return NULL;
}
--
1.8.5.1
[Qemu-devel] [PATCH v8 11/12] qmp: Add command 'blockdev-backup'
Similar to drive-backup, but this command uses a device id as target
instead of creating/opening an image file.
Also add blocker on target bs, since the target is also a named device
now.
Signed-off-by: Fam Zheng
---
block/backup.c | 21 +
blockdev.c | 47 +++
qapi-schema.json | 49 +
qmp-commands.hx | 44
4 files changed, 161 insertions(+)
diff --git a/block/backup.c b/block/backup.c
index 0198514..c8fe1a9 100644
--- a/block/backup.c
+++ b/block/backup.c
@@ -339,6 +339,7 @@ static void coroutine_fn backup_run(void *opaque)
hbitmap_free(job->bitmap);
bdrv_iostatus_disable(target);
+bdrv_op_unblock_all(target, job->common.blocker);
bdrv_unref(target);
block_job_completed(&job->common, ret);
@@ -364,6 +365,24 @@ void backup_start(BlockDriverState *bs, BlockDriverState
*target,
return;
}
+if (!bdrv_is_inserted(bs)) {
+error_set(errp, QERR_DEVICE_HAS_NO_MEDIUM, bs->device_name);
+return;
+}
+
+if (!bdrv_is_inserted(target)) {
+error_set(errp, QERR_DEVICE_HAS_NO_MEDIUM, target->device_name);
+return;
+}
+
+if (bdrv_op_is_blocked(bs, BLOCK_OP_TYPE_BACKUP_SOURCE, errp)) {
+return;
+}
+
+if (bdrv_op_is_blocked(target, BLOCK_OP_TYPE_BACKUP_TARGET, errp)) {
+return;
+}
+
len = bdrv_getlength(bs);
if (len < 0) {
error_setg_errno(errp, -len, "unable to get length for '%s'",
@@ -377,6 +396,8 @@ void backup_start(BlockDriverState *bs, BlockDriverState
*target,
return;
}
+bdrv_op_block_all(target, job->common.blocker);
+
job->on_source_error = on_source_error;
job->on_target_error = on_target_error;
job->target = target;
diff --git a/blockdev.c b/blockdev.c
index f342a80..1bf9a16 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -1872,6 +1872,8 @@ void qmp_drive_backup(const char *device, const char
*target,
return;
}
+/* Although backup_run has this check too, we need to use bs->drv below, so
+ * do an early check redundantly. */
if (!bdrv_is_inserted(bs)) {
error_set(errp, QERR_DEVICE_HAS_NO_MEDIUM, device);
return;
@@ -1888,6 +1890,7 @@ void qmp_drive_backup(const char *device, const char
*target,
}
}
+/* Early check to avoid creating target */
if (bdrv_op_is_blocked(bs, BLOCK_OP_TYPE_BACKUP_SOURCE, errp)) {
return;
}
@@ -1946,6 +1949,50 @@ void qmp_drive_backup(const char *device, const char
*target,
}
}
+void qmp_blockdev_backup(const char *device, const char *target,
+ enum MirrorSyncMode sync,
+ bool has_speed, int64_t speed,
+ bool has_on_source_error,
+ BlockdevOnError on_source_error,
+ bool has_on_target_error,
+ BlockdevOnError on_target_error,
+ Error **errp)
+{
+BlockDriverState *bs;
+BlockDriverState *target_bs;
+Error *local_err = NULL;
+
+if (!has_speed) {
+speed = 0;
+}
+if (!has_on_source_error) {
+on_source_error = BLOCKDEV_ON_ERROR_REPORT;
+}
+if (!has_on_target_error) {
+on_target_error = BLOCKDEV_ON_ERROR_REPORT;
+}
+
+bs = bdrv_find(device);
+if (!bs) {
+error_set(errp, QERR_DEVICE_NOT_FOUND, device);
+return;
+}
+
+target_bs = bdrv_find(target);
+if (!target_bs) {
+error_set(errp, QERR_DEVICE_NOT_FOUND, target);
+return;
+}
+
+bdrv_ref(target_bs);
+backup_start(bs, target_bs, speed, sync, on_source_error, on_target_error,
+ block_job_cb, bs, &local_err);
+if (local_err != NULL) {
+bdrv_unref(target_bs);
+error_propagate(errp, local_err);
+}
+}
+
#define DEFAULT_MIRROR_BUF_SIZE (10 << 20)
void qmp_drive_mirror(const char *device, const char *target,
diff --git a/qapi-schema.json b/qapi-schema.json
index 8e982a2..ecea383 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -1869,6 +1869,40 @@
'*on-target-error': 'BlockdevOnError' } }
##
+# @BlockdevBackup
+#
+# @device: the name of the device which should be copied.
+#
+# @target: the name of the backup target device.
+#
+# @sync: what parts of the disk image should be copied to the destination
+#(all the disk, only the sectors allocated in the topmost image, or
+#only new I/O).
+#
+# @speed: #optional the maximum speed, in bytes per second.
+#
+# @on-source-error: #optional the action to take on an error on the source,
+# default 'report'. 'stop' and 'enospc' can only be used
+# if the block device supports io-status (see BlockInfo).
+#
+# @on-target-error: #optional the action to take on an error on the target,
[Qemu-devel] [PATCH v8 06/12] block: Add bdrv_set_backing_hd()
This is the common but non-trivial steps to assign or change the
backing_hd of BDS.
Signed-off-by: Fam Zheng
---
block.c | 29 +++--
include/block/block.h | 1 +
2 files changed, 24 insertions(+), 6 deletions(-)
diff --git a/block.c b/block.c
index 28814f7..63a5918 100644
--- a/block.c
+++ b/block.c
@@ -958,6 +958,24 @@ fail:
return ret;
}
+void bdrv_set_backing_hd(BlockDriverState *bs, BlockDriverState *backing_hd)
+{
+if (bs->backing_hd) {
+bdrv_unref(bs->backing_hd);
+}
+
+bs->backing_hd = backing_hd;
+if (!backing_hd) {
+return;
+}
+bdrv_ref(bs->backing_hd);
+
+pstrcpy(bs->backing_file, sizeof(bs->backing_file),
+bs->backing_hd->file->filename);
+pstrcpy(bs->backing_format, sizeof(bs->backing_format),
+bs->backing_hd->drv->format_name);
+}
+
/*
* Opens the backing file for a BlockDriverState if not yet open
*
@@ -971,6 +989,7 @@ int bdrv_open_backing_file(BlockDriverState *bs, QDict
*options, Error **errp)
char backing_filename[PATH_MAX];
int back_flags, ret;
BlockDriver *back_drv = NULL;
+BlockDriverState *backing_hd;
Error *local_err = NULL;
if (bs->backing_hd != NULL) {
@@ -994,7 +1013,7 @@ int bdrv_open_backing_file(BlockDriverState *bs, QDict
*options, Error **errp)
sizeof(backing_filename));
}
-bs->backing_hd = bdrv_new("");
+backing_hd = bdrv_new("");
if (bs->backing_format[0] != '\0') {
back_drv = bdrv_find_format(bs->backing_format);
@@ -1004,20 +1023,18 @@ int bdrv_open_backing_file(BlockDriverState *bs, QDict
*options, Error **errp)
back_flags = bs->open_flags & ~(BDRV_O_RDWR | BDRV_O_SNAPSHOT |
BDRV_O_COPY_ON_READ);
-ret = bdrv_open(bs->backing_hd,
+ret = bdrv_open(backing_hd,
*backing_filename ? backing_filename : NULL, options,
back_flags, back_drv, &local_err);
if (ret < 0) {
-bdrv_unref(bs->backing_hd);
-bs->backing_hd = NULL;
+bdrv_unref(backing_hd);
bs->open_flags |= BDRV_O_NO_BACKING;
error_setg(errp, "Could not open backing file: %s",
error_get_pretty(local_err));
error_free(local_err);
return ret;
}
-pstrcpy(bs->backing_file, sizeof(bs->backing_file),
-bs->backing_hd->file->filename);
+bdrv_set_backing_hd(bs, backing_hd);
return 0;
}
diff --git a/include/block/block.h b/include/block/block.h
index ac8976e..20bfcd9 100644
--- a/include/block/block.h
+++ b/include/block/block.h
@@ -185,6 +185,7 @@ int bdrv_parse_cache_flags(const char *mode, int *flags);
int bdrv_parse_discard_flags(const char *mode, int *flags);
int bdrv_file_open(BlockDriverState **pbs, const char *filename,
QDict *options, int flags, Error **errp);
+void bdrv_set_backing_hd(BlockDriverState *bs, BlockDriverState *backing_hd);
int bdrv_open_backing_file(BlockDriverState *bs, QDict *options, Error **errp);
int bdrv_open(BlockDriverState *bs, const char *filename, QDict *options,
int flags, BlockDriver *drv, Error **errp);
--
1.8.5.1
[Qemu-devel] [PATCH v8 01/12] blkdebug: Use QLIST_FOREACH_SAFE to resume IO
Qemu-iotest 030 was broken.
When the coroutine runs and finishes, it will remove itself from the req
list, so let's use safe version of foreach to avoid use after free.
Signed-off-by: Fam Zheng
---
block/blkdebug.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/block/blkdebug.c b/block/blkdebug.c
index 37cf028..957be2c 100644
--- a/block/blkdebug.c
+++ b/block/blkdebug.c
@@ -594,9 +594,9 @@ static int blkdebug_debug_breakpoint(BlockDriverState *bs,
const char *event,
static int blkdebug_debug_resume(BlockDriverState *bs, const char *tag)
{
BDRVBlkdebugState *s = bs->opaque;
-BlkdebugSuspendedReq *r;
+BlkdebugSuspendedReq *r, *next;
-QLIST_FOREACH(r, &s->suspended_reqs, next) {
+QLIST_FOREACH_SAFE(r, &s->suspended_reqs, next, next) {
if (!strcmp(r->tag, tag)) {
qemu_coroutine_enter(r->co, NULL);
return 0;
@@ -609,7 +609,7 @@ static int
blkdebug_debug_remove_breakpoint(BlockDriverState *bs,
const char *tag)
{
BDRVBlkdebugState *s = bs->opaque;
-BlkdebugSuspendedReq *r;
+BlkdebugSuspendedReq *r, *r_next;
BlkdebugRule *rule, *next;
int i, ret = -ENOENT;
@@ -622,7 +622,7 @@ static int
blkdebug_debug_remove_breakpoint(BlockDriverState *bs,
}
}
}
-QLIST_FOREACH(r, &s->suspended_reqs, next) {
+QLIST_FOREACH_SAFE(r, &s->suspended_reqs, next, r_next) {
if (!strcmp(r->tag, tag)) {
qemu_coroutine_enter(r->co, NULL);
ret = 0;
--
1.8.5.1
[Qemu-devel] [PATCH v8 04/12] block: Replace in_use with operation blocker
This drops BlockDriverState.in_use with op_blockers:
- Call bdrv_op_block_all in place of bdrv_set_in_use(bs, 1).
- Call bdrv_op_unblock_all in place of bdrv_set_in_use(bs, 0).
- Check bdrv_op_is_blocked() in place of bdrv_in_use(bs).
The specific types are used, e.g. in place of starting block backup,
bdrv_op_is_blocked(bs, BLOCK_OP_TYPE_BACKUP, ...).
- Check bdrv_op_blocker_is_empty() in place of assert(!bs->in_use).
Note: there is only bdrv_op_block_all and bdrv_op_unblock_all callers at
this moment. So although the checks are specific to op types, this
changes can still be seen as identical logic with previously with
in_use. The difference is error message are improved because of blocker
error info.
Signed-off-by: Fam Zheng
---
block-migration.c | 7 +--
block.c | 24 +++-
blockdev.c | 15 ++-
blockjob.c | 14 +-
hw/block/dataplane/virtio-blk.c | 18 --
include/block/block.h | 2 --
include/block/block_int.h | 1 -
include/block/blockjob.h| 3 +++
8 files changed, 42 insertions(+), 42 deletions(-)
diff --git a/block-migration.c b/block-migration.c
index 897fdba..bf9a25f 100644
--- a/block-migration.c
+++ b/block-migration.c
@@ -59,6 +59,7 @@ typedef struct BlkMigDevState {
unsigned long *aio_bitmap;
int64_t completed_sectors;
BdrvDirtyBitmap *dirty_bitmap;
+Error *blocker;
} BlkMigDevState;
typedef struct BlkMigBlock {
@@ -346,7 +347,8 @@ static void init_blk_migration_it(void *opaque,
BlockDriverState *bs)
bmds->completed_sectors = 0;
bmds->shared_base = block_mig_state.shared_base;
alloc_aio_bitmap(bmds);
-bdrv_set_in_use(bs, 1);
+error_setg(&bmds->blocker, "block device is in use by migration");
+bdrv_op_block_all(bs, bmds->blocker);
bdrv_ref(bs);
block_mig_state.total_sector_sum += sectors;
@@ -584,7 +586,8 @@ static void blk_mig_cleanup(void)
blk_mig_lock();
while ((bmds = QSIMPLEQ_FIRST(&block_mig_state.bmds_list)) != NULL) {
QSIMPLEQ_REMOVE_HEAD(&block_mig_state.bmds_list, entry);
-bdrv_set_in_use(bmds->bs, 0);
+bdrv_op_unblock_all(bmds->bs, bmds->blocker);
+error_free(bmds->blocker);
bdrv_unref(bmds->bs);
g_free(bmds->aio_bitmap);
g_free(bmds);
diff --git a/block.c b/block.c
index 74547af..28814f7 100644
--- a/block.c
+++ b/block.c
@@ -1621,7 +1621,6 @@ static void bdrv_move_feature_fields(BlockDriverState
*bs_dest,
bs_dest->refcnt = bs_src->refcnt;
/* job */
-bs_dest->in_use = bs_src->in_use;
bs_dest->job= bs_src->job;
/* keep the same entry in bdrv_states */
@@ -1653,7 +1652,7 @@ void bdrv_swap(BlockDriverState *bs_new, BlockDriverState
*bs_old)
assert(QLIST_EMPTY(&bs_new->dirty_bitmaps));
assert(bs_new->job == NULL);
assert(bs_new->dev == NULL);
-assert(bs_new->in_use == 0);
+assert(bdrv_op_blocker_is_empty(bs_new));
assert(bs_new->io_limits_enabled == false);
assert(!throttle_have_timer(&bs_new->throttle_state));
@@ -1672,7 +1671,7 @@ void bdrv_swap(BlockDriverState *bs_new, BlockDriverState
*bs_old)
/* Check a few fields that should remain attached to the device */
assert(bs_new->dev == NULL);
assert(bs_new->job == NULL);
-assert(bs_new->in_use == 0);
+assert(bdrv_op_blocker_is_empty(bs_new));
assert(bs_new->io_limits_enabled == false);
assert(!throttle_have_timer(&bs_new->throttle_state));
@@ -1709,7 +1708,7 @@ static void bdrv_delete(BlockDriverState *bs)
{
assert(!bs->dev);
assert(!bs->job);
-assert(!bs->in_use);
+assert(bdrv_op_blocker_is_empty(bs));
assert(!bs->refcnt);
assert(QLIST_EMPTY(&bs->dirty_bitmaps));
@@ -1891,7 +1890,8 @@ int bdrv_commit(BlockDriverState *bs)
return -ENOTSUP;
}
-if (bdrv_in_use(bs) || bdrv_in_use(bs->backing_hd)) {
+if (bdrv_op_is_blocked(bs, BLOCK_OP_TYPE_COMMIT, NULL) ||
+bdrv_op_is_blocked(bs->backing_hd, BLOCK_OP_TYPE_COMMIT, NULL)) {
return -EBUSY;
}
@@ -2919,8 +2919,9 @@ int bdrv_truncate(BlockDriverState *bs, int64_t offset)
return -ENOTSUP;
if (bs->read_only)
return -EACCES;
-if (bdrv_in_use(bs))
+if (bdrv_op_is_blocked(bs, BLOCK_OP_TYPE_RESIZE, NULL)) {
return -EBUSY;
+}
ret = drv->bdrv_truncate(bs, offset);
if (ret == 0) {
ret = refresh_total_sectors(bs, offset >> BDRV_SECTOR_BITS);
@@ -4700,17 +4701,6 @@ bool bdrv_op_blocker_is_empty(BlockDriverState *bs)
return true;
}
-void bdrv_set_in_use(BlockDriverState *bs, int in_use)
-{
-assert(bs->in_use != in_use);
-bs->in_use = in_use;
-}
-
-int bdrv_in_use(BlockDriverState *bs)
-{
-return bs->in_use;
-}
-
void bdrv_iostatus_enable(BlockDriverState *bs)
[Qemu-devel] [PATCH v8 00/12] Drop in_use from BlockDriverState and enable point-in-time snapshot exporting over NBD
This series adds for point-in-time snapshot NBD exporting based on blockdev-backup (variant of drive-backup with existing device as target). We get a thin point-in-time snapshot by COW mechanism of drive-backup, and export it through built in NBD server. The steps are as below: 1. (SHELL) qemu-img create -f qcow2 BACKUP.qcow2 (Alternatively we can use -o backing_file=RUNNING-VM.img to omit explicitly providing the size by ourselves, but it's risky because RUNNING-VM.qcow2 is used r/w by guest. Whether or not setting backing file in the image file doesn't matter, as we are going to override the backing hd in the next step) 2. (QMP) blockdev-add backing=source-drive file.driver=file file.filename=BACKUP.qcow2 id=target0 if=none driver=qcow2 (where source-drive is the running BlockDriverState name for RUNNING-VM.img. This patch implements "backing=" option to override backing_hd for added drive) 3. (QMP) blockdev-backup device=source-drive sync=none target=target0 (this is the QMP command introduced by this series, which use a named device as target of drive-backup) 4. (QMP) nbd-server-add device=target0 When image fleecing done: 1. (QMP) block-job-cancel device=source-drive 2. (HMP) drive_del target0 3. (SHELL) rm BACKUP.qcow2 v8: Address comments from Markus, Kevin and Ian. Thanks for the review! Cover letter fixed "block-job-cancel". (Ian) Dropped "[v7 07/10] block: Pass error in bdrv_snapshot_create". (Markus) Dropped "[v7 08/10] block: Add checks of blocker in block operations". (Markus) They are neither necessary for this series nor significant improvements. [01/10] qapi: Add BlockOperationType enum Since 2.0. (Kevin, Markus) [02/10] block: Introduce op_blockers to BlockDriverState Commit message reword. (Markus) Move bdrv_op_blocker_is_empty() here. [03/10] block: Replace in_use with operation blocker Moved to the front of series. Reword commit message. (Markus) Move memcpy in bdrv_move_feature_fields() into 02/10. (Markus) Don't drop in_use asserts, convert them. (Markus) Drop unused local_err. (Markus) Simplify bdrv_op_blocker_is_empty(). (Markus) Fix error message for do_drive_del() and dataplane. (Markus) Remember to error_free for dataplane op blocker. (Markus) Drop whitespace change. (Markus) Mechanical convert of in_use for block_job_create(). [04/10] block: Add bdrv_set_backing_hd() New. Separate the common part for setting backing_hd. [05/10] block: Add backing_blocker in BlockDriverState New. [06/10] block: Parse "backing" option to reference existing BDS Make use of 04/10. We need to delete "backing" from qdict, otherwise QMP complains with an supported option, not dropping it. (Markus) Move error_free(bs->backing_blocker) in bdrv_close(). (Markus) Reword comment for backing_blocker. (Markus) 03/10 retained the logic of in_use assert, this is no longer true since backing_hd has a blocker on it. So drop it. (Markus) [07/10] block: Support dropping active in bdrv_drop_intermediate Make use of 04/10. (Kevin) Pass NULL, NULL instead of empty string to bdrv_change_backing_file. (Kevin) [08/10] stream: Use bdrv_drop_intermediate and drop close_unused_images [09/10] qmp: Add command 'blockdev-backup' Since 1.8 -> Since 2.0. [10/10] block: Allow backup on referenced named BlockDriverState v7: Fix typo in cover letter "ide0-hd0". (Markus) Rebase to current qemu.git. (Resolved a few trivial contextual conflict) v6: Address Paolo's comments, (except for bitmask): - Add blocker for all backing_hd references, a relatively big change, some patches are reordered. - Introduce a few other necessary patches. - Move two snapshot checks into bdrv_snapshot_*. The interface is unchanged. Fam Zheng (12): blkdebug: Use QLIST_FOREACH_SAFE to resume IO qapi: Add BlockOperationType enum block: Introduce op_blockers to BlockDriverState block: Replace in_use with operation blocker block: Move op_blocker check from block_job_create to its caller block: Add bdrv_set_backing_hd() block: Add backing_blocker in BlockDriverState block: Parse "backing" option to reference existing BDS block: Support dropping active in bdrv_drop_intermediate stream: Use bdrv_drop_intermediate and drop close_unused_images qmp: Add command 'blockdev-backup' block: Allow backup on referenced named BlockDriverState block-migration.c | 7 +- block.c | 291 ++-- block/backup.c | 21 +++ block/blkdebug.c| 8 +- block/commit.c | 1 + block/stream.c
[Qemu-devel] [PATCH] blkdebug: Use QLIST_FOREACH_SAFE to resume IO
Qemu-iotest 030 was broken.
When the coroutine runs and finishes, it will remove itself from the req
list, so let's use safe version of foreach to avoid use after free.
Signed-off-by: Fam Zheng
---
block/blkdebug.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/block/blkdebug.c b/block/blkdebug.c
index 37cf028..957be2c 100644
--- a/block/blkdebug.c
+++ b/block/blkdebug.c
@@ -594,9 +594,9 @@ static int blkdebug_debug_breakpoint(BlockDriverState *bs,
const char *event,
static int blkdebug_debug_resume(BlockDriverState *bs, const char *tag)
{
BDRVBlkdebugState *s = bs->opaque;
-BlkdebugSuspendedReq *r;
+BlkdebugSuspendedReq *r, *next;
-QLIST_FOREACH(r, &s->suspended_reqs, next) {
+QLIST_FOREACH_SAFE(r, &s->suspended_reqs, next, next) {
if (!strcmp(r->tag, tag)) {
qemu_coroutine_enter(r->co, NULL);
return 0;
@@ -609,7 +609,7 @@ static int
blkdebug_debug_remove_breakpoint(BlockDriverState *bs,
const char *tag)
{
BDRVBlkdebugState *s = bs->opaque;
-BlkdebugSuspendedReq *r;
+BlkdebugSuspendedReq *r, *r_next;
BlkdebugRule *rule, *next;
int i, ret = -ENOENT;
@@ -622,7 +622,7 @@ static int
blkdebug_debug_remove_breakpoint(BlockDriverState *bs,
}
}
}
-QLIST_FOREACH(r, &s->suspended_reqs, next) {
+QLIST_FOREACH_SAFE(r, &s->suspended_reqs, next, r_next) {
if (!strcmp(r->tag, tag)) {
qemu_coroutine_enter(r->co, NULL);
ret = 0;
--
1.8.5.1
Re: [Qemu-devel] [PATCH v7 3/6] hw/arm/digic: add timer support
On Fri, Dec 13, 2013 at 3:43 PM, Antony Pavlov wrote:
> On Fri, 13 Dec 2013 09:20:27 +1000
> Peter Crosthwaite wrote:
>
>> On Fri, Dec 13, 2013 at 8:23 AM, Antony Pavlov
>> wrote:
>> > Signed-off-by: Antony Pavlov
>> > Reviewed-by: Peter Maydell
>> > ---
>> > hw/arm/digic.c | 28 ++
>> > hw/timer/Makefile.objs | 1 +
>> > hw/timer/digic-timer.c | 140
>> > +
>> > hw/timer/digic-timer.h | 36 +
>> > include/hw/arm/digic.h | 6 +++
>> > 5 files changed, 211 insertions(+)
>> > create mode 100644 hw/timer/digic-timer.c
>> > create mode 100644 hw/timer/digic-timer.h
>> >
>> > diff --git a/hw/arm/digic.c b/hw/arm/digic.c
>> > index 2620262..e8eb0de 100644
>> > --- a/hw/arm/digic.c
>> > +++ b/hw/arm/digic.c
>> > @@ -22,18 +22,35 @@
>> >
>> > #include "hw/arm/digic.h"
>> >
>> > +#define DIGIC4_TIMER_BASE(n)(0xc021 + (n) * 0x100)
>> > +
>> > static void digic_init(Object *obj)
>> > {
>> > DigicState *s = DIGIC(obj);
>> > +DeviceState *dev;
>> > +int i;
>> >
>> > object_initialize(&s->cpu, sizeof(s->cpu), "arm946-" TYPE_ARM_CPU);
>> > object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
>> > +
>> > +for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
>> > +#define DIGIC_TIMER_NAME_MLEN11
>> > +char name[DIGIC_TIMER_NAME_MLEN];
>> > +
>> > +object_initialize(&s->timer[i], sizeof(s->timer[i]),
>> > TYPE_DIGIC_TIMER);
>> > +dev = DEVICE(&s->timer[i]);
>> > +qdev_set_parent_bus(dev, sysbus_get_default());
>> > +snprintf(name, DIGIC_TIMER_NAME_MLEN, "timer[%d]", i);
>> > +object_property_add_child(obj, name, OBJECT(&s->timer[i]), NULL);
>> > +}
>> > }
>> >
>> > static void digic_realize(DeviceState *dev, Error **errp)
>> > {
>> > DigicState *s = DIGIC(dev);
>> > Error *err = NULL;
>> > +SysBusDevice *sbd;
>> > +int i;
>> >
>> > object_property_set_bool(OBJECT(&s->cpu), true, "reset-hivecs", &err);
>> > if (err != NULL) {
>> > @@ -46,6 +63,17 @@ static void digic_realize(DeviceState *dev, Error
>> > **errp)
>> > error_propagate(errp, err);
>> > return;
>> > }
>> > +
>> > +for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
>> > +object_property_set_bool(OBJECT(&s->timer[i]), true, "realized",
>> > &err);
>> > +if (err != NULL) {
>> > +error_propagate(errp, err);
>> > +return;
>> > +}
>> > +
>> > +sbd = SYS_BUS_DEVICE(&s->timer[i]);
>> > +sysbus_mmio_map(sbd, 0, DIGIC4_TIMER_BASE(i));
>> > +}
>> > }
>> >
>> > static void digic_class_init(ObjectClass *oc, void *data)
>> > diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
>> > index 3ae091c..ea9f11f 100644
>> > --- a/hw/timer/Makefile.objs
>> > +++ b/hw/timer/Makefile.objs
>> > @@ -26,5 +26,6 @@ obj-$(CONFIG_OMAP) += omap_synctimer.o
>> > obj-$(CONFIG_PXA2XX) += pxa2xx_timer.o
>> > obj-$(CONFIG_SH4) += sh_timer.o
>> > obj-$(CONFIG_TUSB6010) += tusb6010.o
>> > +obj-$(CONFIG_DIGIC) += digic-timer.o
>> >
>> > obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
>> > diff --git a/hw/timer/digic-timer.c b/hw/timer/digic-timer.c
>> > new file mode 100644
>> > index 000..974e588
>> > --- /dev/null
>> > +++ b/hw/timer/digic-timer.c
>> > @@ -0,0 +1,140 @@
>> > +/*
>> > + * QEMU model of the Canon DIGIC timer block.
>> > + *
>> > + * Copyright (C) 2013 Antony Pavlov
>> > + *
>> > + * This model is based on reverse engineering efforts
>> > + * made by CHDK (http://chdk.wikia.com) and
>> > + * Magic Lantern (http://www.magiclantern.fm) projects
>> > + * contributors.
>> > + *
>> > + * See "Timer/Clock Module" docs here:
>> > + * http://magiclantern.wikia.com/wiki/Register_Map
>> > + *
>> > + * The QEMU model of the OSTimer in PKUnity SoC by Guan Xuetao
>> > + * is used as a template.
>> > + *
>> > + * This program is free software; you can redistribute it and/or modify
>> > + * it under the terms of the GNU General Public License as published by
>> > + * the Free Software Foundation; either version 2 of the License, or
>> > + * (at your option) any later version.
>> > + *
>> > + * This program is distributed in the hope that it will be useful,
>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> > + * GNU General Public License for more details.
>> > + *
>> > + */
>> > +
>> > +#include "hw/sysbus.h"
>> > +#include "hw/ptimer.h"
>> > +#include "qemu/main-loop.h"
>> > +
>> > +#include "hw/timer/digic-timer.h"
>> > +
>> > +#define DIGIC_TIMER_CONTROL 0x00
>> > +#define DIGIC_TIMER_VALUE 0x0c
>> > +
>> > +static const VMStateDescription vmstate_digic_timer = {
>> > +.name = "digic.timer",
>> > +.version_id = 1,
>> > +.minimum_version_id = 1,
>> > +.minimum_version_id_old = 1,
>> > +.fields = (VMStateField[]) {
>> > +VMSTATE_PTIMER(ptimer, DigicTimerState),
>> > +
[Qemu-devel] [Bug 1260555] [NEW] qemu-system-sparc UI doesn't work with Cocoa and Sun ROM
Public bug reported: The 32-bit SPARC emulator's TCX emulation seems to work with OpenBIOS, but doesn't work with a SparcStation ROM on Cocoa. Screenshot attached. Using version 1.7.0 on Mac OS X 10.9 via MacPorts and compiled directly from source, though this problem has carried over from Mac OS X 10.8 and many earlier versions of Qemu. The following is my Qemu command: sudo qemu-system-sparc -m 256 -M SS-5 -bios /home/img/ROMs/sun/ss5-170.bin \ -g 1024x768x24 \ -drive file=/home/doc/VMs/slagheap/sd0.raw,if=scsi,bus=0,unit=3 \ -drive file=/home/doc/VMs/slagheap/sd1.raw,if=scsi,bus=0,unit=1 \ -drive file=/home/doc/VMs/slagheap/sd2.raw,if=scsi,bus=0,unit=2 \ -net nic,macaddr=DE:EE:DD:FF:EE:DD,model=lance \ -net tap,ifname=tap0,script=/home/doc/VMs/slagheap/ifup,downscript=/home/doc/VMs/slagheap/ifdown Note: also can't compile Qemu w/ SDL support from MacPorts on Mac OS X, and config.log is not helpful to figure out why, but this is another issue. ** Affects: qemu Importance: Undecided Status: New ** Attachment added: "qemu.tcx.png" https://bugs.launchpad.net/bugs/1260555/+attachment/3928423/+files/qemu.tcx.png -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1260555 Title: qemu-system-sparc UI doesn't work with Cocoa and Sun ROM Status in QEMU: New Bug description: The 32-bit SPARC emulator's TCX emulation seems to work with OpenBIOS, but doesn't work with a SparcStation ROM on Cocoa. Screenshot attached. Using version 1.7.0 on Mac OS X 10.9 via MacPorts and compiled directly from source, though this problem has carried over from Mac OS X 10.8 and many earlier versions of Qemu. The following is my Qemu command: sudo qemu-system-sparc -m 256 -M SS-5 -bios /home/img/ROMs/sun/ss5-170.bin \ -g 1024x768x24 \ -drive file=/home/doc/VMs/slagheap/sd0.raw,if=scsi,bus=0,unit=3 \ -drive file=/home/doc/VMs/slagheap/sd1.raw,if=scsi,bus=0,unit=1 \ -drive file=/home/doc/VMs/slagheap/sd2.raw,if=scsi,bus=0,unit=2 \ -net nic,macaddr=DE:EE:DD:FF:EE:DD,model=lance \ -net tap,ifname=tap0,script=/home/doc/VMs/slagheap/ifup,downscript=/home/doc/VMs/slagheap/ifdown Note: also can't compile Qemu w/ SDL support from MacPorts on Mac OS X, and config.log is not helpful to figure out why, but this is another issue. To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1260555/+subscriptions
Re: [Qemu-devel] issue with vgabios lfb and virtio vga
On Fr, 2013-12-13 at 11:58 +1000, Dave Airlie wrote: > On Thu, Dec 12, 2013 at 6:17 PM, Gerd Hoffmann wrote: > > On Do, 2013-12-12 at 09:51 +1000, Dave Airlie wrote: > >> Now the vgabios.c does a check of bar 0 and bar 1 to see if they are > >> 0xfff1 masked, this protects against the the i/o bar but fails to > >> protect against the LFB one as PCI BARs don't encode the size just the > >> base address, and a 4k BAR can be aligned to a larger size. > > > >> Any ideas? I seem to remember vgabios.c had a hack in the past for > >> vmware, but I'm not sure. > > > > The fallback to bar #1 *is* the vmware hack ;) > > > > Something like the attached patch should do the trick. > > > Oh do we generate the VGABIOS from seabios now or are we going to? master is switched to seavgabios, 1.7 still at the old one. "git submodule init" will fetch firmware subtrees. the Makefile in roms/ has targets to build vgabioses. cheers, Gerd
Re: [Qemu-devel] [PATCH v7 3/6] hw/arm/digic: add timer support
On Fri, 13 Dec 2013 09:20:27 +1000
Peter Crosthwaite wrote:
> On Fri, Dec 13, 2013 at 8:23 AM, Antony Pavlov
> wrote:
> > Signed-off-by: Antony Pavlov
> > Reviewed-by: Peter Maydell
> > ---
> > hw/arm/digic.c | 28 ++
> > hw/timer/Makefile.objs | 1 +
> > hw/timer/digic-timer.c | 140
> > +
> > hw/timer/digic-timer.h | 36 +
> > include/hw/arm/digic.h | 6 +++
> > 5 files changed, 211 insertions(+)
> > create mode 100644 hw/timer/digic-timer.c
> > create mode 100644 hw/timer/digic-timer.h
> >
> > diff --git a/hw/arm/digic.c b/hw/arm/digic.c
> > index 2620262..e8eb0de 100644
> > --- a/hw/arm/digic.c
> > +++ b/hw/arm/digic.c
> > @@ -22,18 +22,35 @@
> >
> > #include "hw/arm/digic.h"
> >
> > +#define DIGIC4_TIMER_BASE(n)(0xc021 + (n) * 0x100)
> > +
> > static void digic_init(Object *obj)
> > {
> > DigicState *s = DIGIC(obj);
> > +DeviceState *dev;
> > +int i;
> >
> > object_initialize(&s->cpu, sizeof(s->cpu), "arm946-" TYPE_ARM_CPU);
> > object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
> > +
> > +for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
> > +#define DIGIC_TIMER_NAME_MLEN11
> > +char name[DIGIC_TIMER_NAME_MLEN];
> > +
> > +object_initialize(&s->timer[i], sizeof(s->timer[i]),
> > TYPE_DIGIC_TIMER);
> > +dev = DEVICE(&s->timer[i]);
> > +qdev_set_parent_bus(dev, sysbus_get_default());
> > +snprintf(name, DIGIC_TIMER_NAME_MLEN, "timer[%d]", i);
> > +object_property_add_child(obj, name, OBJECT(&s->timer[i]), NULL);
> > +}
> > }
> >
> > static void digic_realize(DeviceState *dev, Error **errp)
> > {
> > DigicState *s = DIGIC(dev);
> > Error *err = NULL;
> > +SysBusDevice *sbd;
> > +int i;
> >
> > object_property_set_bool(OBJECT(&s->cpu), true, "reset-hivecs", &err);
> > if (err != NULL) {
> > @@ -46,6 +63,17 @@ static void digic_realize(DeviceState *dev, Error **errp)
> > error_propagate(errp, err);
> > return;
> > }
> > +
> > +for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
> > +object_property_set_bool(OBJECT(&s->timer[i]), true, "realized",
> > &err);
> > +if (err != NULL) {
> > +error_propagate(errp, err);
> > +return;
> > +}
> > +
> > +sbd = SYS_BUS_DEVICE(&s->timer[i]);
> > +sysbus_mmio_map(sbd, 0, DIGIC4_TIMER_BASE(i));
> > +}
> > }
> >
> > static void digic_class_init(ObjectClass *oc, void *data)
> > diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
> > index 3ae091c..ea9f11f 100644
> > --- a/hw/timer/Makefile.objs
> > +++ b/hw/timer/Makefile.objs
> > @@ -26,5 +26,6 @@ obj-$(CONFIG_OMAP) += omap_synctimer.o
> > obj-$(CONFIG_PXA2XX) += pxa2xx_timer.o
> > obj-$(CONFIG_SH4) += sh_timer.o
> > obj-$(CONFIG_TUSB6010) += tusb6010.o
> > +obj-$(CONFIG_DIGIC) += digic-timer.o
> >
> > obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
> > diff --git a/hw/timer/digic-timer.c b/hw/timer/digic-timer.c
> > new file mode 100644
> > index 000..974e588
> > --- /dev/null
> > +++ b/hw/timer/digic-timer.c
> > @@ -0,0 +1,140 @@
> > +/*
> > + * QEMU model of the Canon DIGIC timer block.
> > + *
> > + * Copyright (C) 2013 Antony Pavlov
> > + *
> > + * This model is based on reverse engineering efforts
> > + * made by CHDK (http://chdk.wikia.com) and
> > + * Magic Lantern (http://www.magiclantern.fm) projects
> > + * contributors.
> > + *
> > + * See "Timer/Clock Module" docs here:
> > + * http://magiclantern.wikia.com/wiki/Register_Map
> > + *
> > + * The QEMU model of the OSTimer in PKUnity SoC by Guan Xuetao
> > + * is used as a template.
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + */
> > +
> > +#include "hw/sysbus.h"
> > +#include "hw/ptimer.h"
> > +#include "qemu/main-loop.h"
> > +
> > +#include "hw/timer/digic-timer.h"
> > +
> > +#define DIGIC_TIMER_CONTROL 0x00
> > +#define DIGIC_TIMER_VALUE 0x0c
> > +
> > +static const VMStateDescription vmstate_digic_timer = {
> > +.name = "digic.timer",
> > +.version_id = 1,
> > +.minimum_version_id = 1,
> > +.minimum_version_id_old = 1,
> > +.fields = (VMStateField[]) {
> > +VMSTATE_PTIMER(ptimer, DigicTimerState),
> > +VMSTATE_END_OF_LIST()
> > +}
> > +};
> > +
> > +static uint64_t digic_timer_read(void *opaque, hwaddr offset, unsigned
> > size)
> > +{
> > +DigicTimerState *s = opaque;
> > +uint32_
Re: [Qemu-devel] [PATCH v12 1/5] vmstate: Add support for an array of ptimer_state *
Peter Crosthwaite wrote:
On Fri, Dec 13, 2013 at 11:19 AM, liguang wrote:
From: Peter Maydell
Add support for defining a vmstate field which is an array
of pointers to structures, and use this to define a
VMSTATE_PTIMER_ARRAY() which allows an array of ptimer_state*
to be used by devices.
Signed-off-by: Peter Maydell
If you are intending someones else patch for merge as part of your own
series, you should sign it off yourself. Considering it's only one
patch, you probably can just do this on list (just like a review)
rather than a respin.
Ok, here's a
Signed-off-by: liguang
Thanks!
Regards,
Peter
---
include/hw/ptimer.h |4
include/migration/vmstate.h | 10 ++
2 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/include/hw/ptimer.h b/include/hw/ptimer.h
index 28fcaf1..a33edf4 100644
--- a/include/hw/ptimer.h
+++ b/include/hw/ptimer.h
@@ -36,4 +36,8 @@ extern const VMStateDescription vmstate_ptimer;
.offset = vmstate_offset_pointer(_state, _field, ptimer_state), \
}
+#define VMSTATE_PTIMER_ARRAY(_f, _s, _n)\
+VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(_f, _s, _n, 0, \
+ vmstate_ptimer, ptimer_state)
+
#endif
diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h
index 9d09e60..be193ba 100644
--- a/include/migration/vmstate.h
+++ b/include/migration/vmstate.h
@@ -339,6 +339,16 @@ extern const VMStateInfo vmstate_info_bitmap;
.offset = vmstate_offset_array(_state, _field, _type, _num), \
}
+#define VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(_f, _s, _n, _v, _vmsd, _type) { \
+.name = (stringify(_f)), \
+.version_id = (_v), \
+.num= (_n), \
+.vmsd =&(_vmsd), \
+.size = sizeof(_type *),\
+.flags = VMS_ARRAY|VMS_STRUCT|VMS_ARRAY_OF_POINTER, \
+.offset = vmstate_offset_array(_s, _f, _type*, _n), \
+}
+
#define VMSTATE_STRUCT_ARRAY_TEST(_field, _state, _num, _test, _version,
_vmsd, _type) { \
.name = (stringify(_field)), \
.num = (_num), \
--
1.7.2.5
Re: [Qemu-devel] Occasional clockjump in Win2012 after Live Migration
Does your VM belong to domain or workgroup? Best regards, Vadim. - Original Message - From: "Peter Lieven" To: qemu-devel@nongnu.org, vroze...@redhat.com Sent: Friday, December 13, 2013 3:03:45 AM Subject: Occasional clockjump in Win2012 after Live Migration Hi, is anyone aware of a problem with a clock jump in Windows (observed in Server 2012) where after a successful live migration the clock jumps roughly 2 days into the future? Maybe this is already fixed we observed this with qemu-kvm-1.2.0. I have not yet managed to reproduce this, but it definetly happens. Where is Windows getting the system clock from? RTC or addtionally internal clocksources like HPET, PM_TIMER etc? Thanks, Peter
Re: [Qemu-devel] [PATCH] target-sh4: Use new qemu_ld/st opcodes
On Fri, Dec 13, 2013 at 01:07:06AM +0100, Aurelien Jarno wrote:
> Signed-off-by: Aurelien Jarno
Reviewed-by: Edgar E. Iglesias
> ---
> target-sh4/translate.c | 167
> ++--
> 1 file changed, 90 insertions(+), 77 deletions(-)
>
> diff --git a/target-sh4/translate.c b/target-sh4/translate.c
> index 2272eb0..87f532a 100644
> --- a/target-sh4/translate.c
> +++ b/target-sh4/translate.c
> @@ -464,7 +464,7 @@ static void _decode_opc(DisasContext * ctx)
> {
> TCGv addr = tcg_temp_new();
> tcg_gen_addi_i32(addr, REG(B11_8), B3_0 * 4);
> - tcg_gen_qemu_st32(REG(B7_4), addr, ctx->memidx);
> +tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, MO_TEUL);
> tcg_temp_free(addr);
> }
> return;
> @@ -472,7 +472,7 @@ static void _decode_opc(DisasContext * ctx)
> {
> TCGv addr = tcg_temp_new();
> tcg_gen_addi_i32(addr, REG(B7_4), B3_0 * 4);
> - tcg_gen_qemu_ld32s(REG(B11_8), addr, ctx->memidx);
> +tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, MO_TESL);
> tcg_temp_free(addr);
> }
> return;
> @@ -482,14 +482,14 @@ static void _decode_opc(DisasContext * ctx)
> case 0x9000: /* mov.w @(disp,PC),Rn */
> {
> TCGv addr = tcg_const_i32(ctx->pc + 4 + B7_0 * 2);
> - tcg_gen_qemu_ld16s(REG(B11_8), addr, ctx->memidx);
> +tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, MO_TESW);
> tcg_temp_free(addr);
> }
> return;
> case 0xd000: /* mov.l @(disp,PC),Rn */
> {
> TCGv addr = tcg_const_i32((ctx->pc + 4 + B7_0 * 4) & ~3);
> - tcg_gen_qemu_ld32s(REG(B11_8), addr, ctx->memidx);
> +tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, MO_TESL);
> tcg_temp_free(addr);
> }
> return;
> @@ -516,28 +516,29 @@ static void _decode_opc(DisasContext * ctx)
> tcg_gen_mov_i32(REG(B11_8), REG(B7_4));
> return;
> case 0x2000: /* mov.b Rm,@Rn */
> - tcg_gen_qemu_st8(REG(B7_4), REG(B11_8), ctx->memidx);
> +tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, MO_UB);
> return;
> case 0x2001: /* mov.w Rm,@Rn */
> - tcg_gen_qemu_st16(REG(B7_4), REG(B11_8), ctx->memidx);
> +tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, MO_TEUW);
> return;
> case 0x2002: /* mov.l Rm,@Rn */
> - tcg_gen_qemu_st32(REG(B7_4), REG(B11_8), ctx->memidx);
> +tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, MO_TEUL);
> return;
> case 0x6000: /* mov.b @Rm,Rn */
> - tcg_gen_qemu_ld8s(REG(B11_8), REG(B7_4), ctx->memidx);
> +tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_SB);
> return;
> case 0x6001: /* mov.w @Rm,Rn */
> - tcg_gen_qemu_ld16s(REG(B11_8), REG(B7_4), ctx->memidx);
> +tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_TESW);
> return;
> case 0x6002: /* mov.l @Rm,Rn */
> - tcg_gen_qemu_ld32s(REG(B11_8), REG(B7_4), ctx->memidx);
> +tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_TESL);
> return;
> case 0x2004: /* mov.b Rm,@-Rn */
> {
> TCGv addr = tcg_temp_new();
> tcg_gen_subi_i32(addr, REG(B11_8), 1);
> - tcg_gen_qemu_st8(REG(B7_4), addr, ctx->memidx); /* might cause
> re-execution */
> +/* might cause re-execution */
> +tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, MO_UB);
> tcg_gen_mov_i32(REG(B11_8), addr); /* modify
> register status */
> tcg_temp_free(addr);
> }
> @@ -546,7 +547,7 @@ static void _decode_opc(DisasContext * ctx)
> {
> TCGv addr = tcg_temp_new();
> tcg_gen_subi_i32(addr, REG(B11_8), 2);
> - tcg_gen_qemu_st16(REG(B7_4), addr, ctx->memidx);
> +tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, MO_TEUW);
> tcg_gen_mov_i32(REG(B11_8), addr);
> tcg_temp_free(addr);
> }
> @@ -555,22 +556,22 @@ static void _decode_opc(DisasContext * ctx)
> {
> TCGv addr = tcg_temp_new();
> tcg_gen_subi_i32(addr, REG(B11_8), 4);
> - tcg_gen_qemu_st32(REG(B7_4), addr, ctx->memidx);
> +tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, MO_TEUL);
> tcg_gen_mov_i32(REG(B11_8), addr);
> }
> return;
> case 0x6004: /* mov.b @Rm+,Rn */
> - tcg_gen_qemu_ld8s(REG(B11_8), REG(B7_4), ctx->memidx);
> +tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_SB);
> if ( B11_8 != B7_4 )
> tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 1);
> return;
> case 0x6005: /* mov.w @Rm+,Rn */
> - tcg_gen_qemu_ld16s(REG(B11_8), REG(B7_4), ctx->memidx);
> +tcg_gen_qemu_ld_i3
Re: [Qemu-devel] [PATCH v7 04/10] block: support dropping active in bdrv_drop_intermediate
On 2013年12月12日 21:24, Kevin Wolf wrote:
Am 12.12.2013 um 09:23 hat Fam Zheng geschrieben:
Dropping intermediate could be useful both for commit and stream, and
BDS refcnt plus bdrv_swap could do most of the job nicely. It also need
some improvements in preparation for op blockers.
Signed-off-by: Fam Zheng
---
block.c| 152 +++--
block/commit.c | 1 +
2 files changed, 74 insertions(+), 79 deletions(-)
diff --git a/block.c b/block.c
index 41562fd..681d3be 100644
--- a/block.c
+++ b/block.c
@@ -2163,114 +2163,108 @@ BlockDriverState *bdrv_find_overlay(BlockDriverState
*active,
return overlay;
}
-typedef struct BlkIntermediateStates {
-BlockDriverState *bs;
-QSIMPLEQ_ENTRY(BlkIntermediateStates) entry;
-} BlkIntermediateStates;
-
+static void bdrv_set_backing_hd(BlockDriverState *bs,
+BlockDriverState *new_backing)
+{
+if (bs->backing_hd) {
+bdrv_op_unblock_all(bs->backing_hd, bs->backing_blocker);
+}
+bs->backing_hd = new_backing;
+if (new_backing) {
+bdrv_op_block_all(bs->backing_hd, bs->backing_blocker);
What about unblocking commit, like you did in patch 3?
Should bdrv_open_backing_file() be using this function?
Yes, will do that.
+}
+}
/*
- * Drops images above 'base' up to and including 'top', and sets the image
- * above 'top' to have base as its backing file.
+ * Drops images above 'base' up to and including 'top', and sets new 'base'
+ * as backing_hd of top_overlay (the image orignally has 'top' as backing
+ * file). top_overlay may be NULL if 'top' is active, no such update needed.
+ * Requires that the top_overlay to 'top' is opened r/w.
*
- * Requires that the overlay to 'top' is opened r/w, so that the backing file
- * information in 'bs' can be properly updated.
+ * 1) This will convert the following chain:
+ * ... <- base <- ... <- top <- overlay <-... <- active
*
- * E.g., this will convert the following chain:
- * bottom <- base <- intermediate <- top <- active
+ * to
+ *
+ * ... <- base <- overlay <- active
+ *
+ * 2) It is allowed for bottom==base, in which case it converts:
+ *
+ * ... <- base <- ... <- top <- overlay <- ... <- active
*
* to
*
- * bottom <- base <- active
+ * base <- overlay <- active
*
- * It is allowed for bottom==base, in which case it converts:
+ * 2) It also allows active==top, in which case it converts:
*
- * base <- intermediate <- top <- active
+ * ... <- base <- ... <- top (active)
*
* to
*
- * base <- active
+ * base == active == top, i.e. only base and lower remains: *top == *base when
+ * return.
+ *
+ * 3) If base==NULL, it will drop all the BDS below overlay and set its
+ * backing_hd to NULL. I.e.:
*
- * Error conditions:
- * if active == top, that is considered an error
+ * base(NULL) <- ... <- overlay <- ... <- active
*
+ * to
+ *
+ * overlay <- ... <- active
*/
int bdrv_drop_intermediate(BlockDriverState *active, BlockDriverState *top,
BlockDriverState *base)
{
-BlockDriverState *intermediate;
-BlockDriverState *base_bs = NULL;
-BlockDriverState *new_top_bs = NULL;
-BlkIntermediateStates *intermediate_state, *next;
-int ret = -EIO;
-
-QSIMPLEQ_HEAD(states_to_delete, BlkIntermediateStates) states_to_delete;
-QSIMPLEQ_INIT(&states_to_delete);
-
-if (!top->drv || !base->drv) {
-goto exit;
-}
+BlockDriverState *drop_start, *overlay;
+int ret = -EINVAL;
-new_top_bs = bdrv_find_overlay(active, top);
-
-if (new_top_bs == NULL) {
-/* we could not find the image above 'top', this is an error */
+if (!top->drv || (base && !base->drv)) {
goto exit;
}
-
-/* special case of new_top_bs->backing_hd already pointing to base -
nothing
- * to do, no intermediate images */
-if (new_top_bs->backing_hd == base) {
+if (top == base) {
ret = 0;
-goto exit;
-}
-
-intermediate = top;
-
-/* now we will go down through the list, and add each BDS we find
- * into our deletion queue, until we hit the 'base'
- */
-while (intermediate) {
-intermediate_state = g_malloc0(sizeof(BlkIntermediateStates));
-intermediate_state->bs = intermediate;
-QSIMPLEQ_INSERT_TAIL(&states_to_delete, intermediate_state, entry);
-
-if (intermediate->backing_hd == base) {
-base_bs = intermediate->backing_hd;
-break;
+} else if (top == active) {
+assert(base);
+drop_start = active->backing_hd;
+bdrv_swap(active, base);
+base->backing_hd = NULL;
+bdrv_unref(drop_start);
+ret = 0;
+} else {
+/* If there's an overlay, its backing_hd points to top's BDS now,
+ * the top image is dropped but this BDS structure is kept and swapped
+ * with base, this way we keep the pointers valid after dropping top
Re: [Qemu-devel] [PATCH v7 08/10] block: Add checks of blocker in block operations
On 2013年12月12日 21:56, Markus Armbruster wrote: Fam Zheng writes: Before operate on a BlockDriverState, respective types are checked against bs->op_blockers and it will error out if there's a blocker. Signed-off-by: Fam Zheng So this patch adds protection against "two of the same kind simultaneously". How could we check it's complete? Have we pondered the more general problem of which "operations" (whatever that is) exclude each other? Good point. For what we want now, I think these extra checks are not required. I think these could be added in a separate series if any. Planning to drop it for next revision but the discussion is still open. Thanks, Fam
Re: [Qemu-devel] [PATCH v12 1/5] vmstate: Add support for an array of ptimer_state *
On Fri, Dec 13, 2013 at 11:19 AM, liguang wrote:
> From: Peter Maydell
>
> Add support for defining a vmstate field which is an array
> of pointers to structures, and use this to define a
> VMSTATE_PTIMER_ARRAY() which allows an array of ptimer_state*
> to be used by devices.
>
> Signed-off-by: Peter Maydell
If you are intending someones else patch for merge as part of your own
series, you should sign it off yourself. Considering it's only one
patch, you probably can just do this on list (just like a review)
rather than a respin.
Regards,
Peter
> ---
> include/hw/ptimer.h |4
> include/migration/vmstate.h | 10 ++
> 2 files changed, 14 insertions(+), 0 deletions(-)
>
> diff --git a/include/hw/ptimer.h b/include/hw/ptimer.h
> index 28fcaf1..a33edf4 100644
> --- a/include/hw/ptimer.h
> +++ b/include/hw/ptimer.h
> @@ -36,4 +36,8 @@ extern const VMStateDescription vmstate_ptimer;
> .offset = vmstate_offset_pointer(_state, _field, ptimer_state), \
> }
>
> +#define VMSTATE_PTIMER_ARRAY(_f, _s, _n)\
> +VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(_f, _s, _n, 0, \
> + vmstate_ptimer, ptimer_state)
> +
> #endif
> diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h
> index 9d09e60..be193ba 100644
> --- a/include/migration/vmstate.h
> +++ b/include/migration/vmstate.h
> @@ -339,6 +339,16 @@ extern const VMStateInfo vmstate_info_bitmap;
> .offset = vmstate_offset_array(_state, _field, _type, _num), \
> }
>
> +#define VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(_f, _s, _n, _v, _vmsd, _type) { \
> +.name = (stringify(_f)), \
> +.version_id = (_v), \
> +.num= (_n), \
> +.vmsd = &(_vmsd), \
> +.size = sizeof(_type *),\
> +.flags = VMS_ARRAY|VMS_STRUCT|VMS_ARRAY_OF_POINTER, \
> +.offset = vmstate_offset_array(_s, _f, _type*, _n), \
> +}
> +
> #define VMSTATE_STRUCT_ARRAY_TEST(_field, _state, _num, _test, _version,
> _vmsd, _type) { \
> .name = (stringify(_field)), \
> .num = (_num), \
> --
> 1.7.2.5
>
>
Re: [Qemu-devel] [PATCH 5/7] hw/arm/boot: Allow easier swapping in of different loader code
On Thu, Nov 28, 2013 at 11:33 PM, Peter Maydell
wrote:
> For AArch64 we will obviously require a different set of
> primary and secondary boot loader code fragments. However currently
> we hardcode the offsets into the loader code where we must write
> the entrypoint and other data into arm_load_kernel(). This makes it
> hard to substitute a different loader fragment, so switch to a more
> flexible scheme where instead of a raw array of instructions we use
> an array of (instruction, fixup-type) pairs that indicate which
> words need special action or data written into them.
>
Why do we need blobs at all? Cant we just fix arm/boot to directly
setup the CPU state to the desired? Rather than complex blobs that
execute ARM instructions just manipulate the regs directly. The
booloader already directly accesses r15 for setting the boot blob
entry point so I don't see whats wrong with setting board-id and dtb
directly either. See the microblaze bootloader for an example.
Regards,
Peter
> Signed-off-by: Peter Maydell
> ---
> hw/arm/boot.c | 152
> -
> 1 file changed, 107 insertions(+), 45 deletions(-)
>
> diff --git a/hw/arm/boot.c b/hw/arm/boot.c
> index 55d552f..77d29a8 100644
> --- a/hw/arm/boot.c
> +++ b/hw/arm/boot.c
> @@ -20,15 +20,33 @@
> #define KERNEL_ARGS_ADDR 0x100
> #define KERNEL_LOAD_ADDR 0x0001
>
> +typedef enum {
> +FIXUP_NONE = 0, /* do nothing */
> +FIXUP_TERMINATOR, /* end of insns */
> +FIXUP_BOARDID,/* overwrite with board ID number */
> +FIXUP_ARGPTR, /* overwrite with pointer to kernel args */
> +FIXUP_ENTRYPOINT, /* overwrite with kernel entry point */
> +FIXUP_GIC_CPU_IF, /* overwrite with GIC CPU interface address */
> +FIXUP_BOOTREG,/* overwrite with boot register address */
> +FIXUP_DSB,/* overwrite with correct DSB insn for cpu */
> +FIXUP_MAX,
> +} FixupType;
> +
> +typedef struct ARMInsnFixup {
> +uint32_t insn;
> +FixupType fixup;
> +} ARMInsnFixup;
> +
> /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel.
> */
> -static uint32_t bootloader[] = {
> - 0xe3a0, /* mov r0, #0 */
> - 0xe59f1004, /* ldr r1, [pc, #4] */
> - 0xe59f2004, /* ldr r2, [pc, #4] */
> - 0xe59ff004, /* ldr pc, [pc, #4] */
> - 0, /* Board ID */
> - 0, /* Address of kernel args. Set by integratorcp_init. */
> - 0 /* Kernel entry point. Set by integratorcp_init. */
> +static const ARMInsnFixup bootloader[] = {
> +{ 0xe3a0 }, /* mov r0, #0 */
> +{ 0xe59f1004 }, /* ldr r1, [pc, #4] */
> +{ 0xe59f2004 }, /* ldr r2, [pc, #4] */
> +{ 0xe59ff004 }, /* ldr pc, [pc, #4] */
> +{ 0, FIXUP_BOARDID },
> +{ 0, FIXUP_ARGPTR },
> +{ 0, FIXUP_ENTRYPOINT },
> +{ 0, FIXUP_TERMINATOR }
> };
>
> /* Handling for secondary CPU boot in a multicore system.
> @@ -48,39 +66,83 @@ static uint32_t bootloader[] = {
> #define DSB_INSN 0xf57ff04f
> #define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
>
> -static uint32_t smpboot[] = {
> - 0xe59f2028, /* ldr r2, gic_cpu_if */
> - 0xe59f0028, /* ldr r0, startaddr */
> - 0xe3a01001, /* mov r1, #1 */
> - 0xe5821000, /* str r1, [r2] - set GICC_CTLR.Enable */
> - 0xe3a010ff, /* mov r1, #0xff */
> - 0xe5821004, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
> - DSB_INSN, /* dsb */
> - 0xe320f003, /* wfi */
> - 0xe5901000, /* ldr r1, [r0] */
> - 0xe1110001, /* tst r1, r1 */
> - 0x0afb, /* beq */
> - 0xe12fff11, /* bx r1 */
> - 0, /* gic_cpu_if: base address of GIC CPU interface */
> - 0 /* bootreg: Boot register address is held here */
> +static const ARMInsnFixup smpboot[] = {
> +{ 0xe59f2028 }, /* ldr r2, gic_cpu_if */
> +{ 0xe59f0028 }, /* ldr r0, startaddr */
> +{ 0xe3a01001 }, /* mov r1, #1 */
> +{ 0xe5821000 }, /* str r1, [r2] - set GICC_CTLR.Enable */
> +{ 0xe3a010ff }, /* mov r1, #0xff */
> +{ 0xe5821004 }, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
> +{ 0, FIXUP_DSB }, /* dsb */
> +{ 0xe320f003 }, /* wfi */
> +{ 0xe5901000 }, /* ldr r1, [r0] */
> +{ 0xe1110001 }, /* tst r1, r1 */
> +{ 0x0afb }, /* beq */
> +{ 0xe12fff11 }, /* bx r1 */
> +{ 0, FIXUP_GIC_CPU_IF },
> +{ 0, FIXUP_BOOTREG },
> +{ 0, FIXUP_TERMINATOR }
> };
>
> +static void write_bootloader(const char *name, hwaddr addr,
> + const ARMInsnFixup *insns, uint32_t
> *fixupcontext)
> +{
> +/* Fix up the specified bootloader fragment and write it into
> + * guest memory using rom_add_blob_fixed(). fixupcontext is
> + * an array giving the values to write in for the fixup types
> + * which write a value into the code array.
> + */
> +int i, len;
> +uint32_t *code;
> +
> +len = 0;
> +while (insns[len].fixup != FIXUP_TERMINATOR) {
> +len++;
> +}
> +
> +
Re: [Qemu-devel] [PATCH v4 0/8] spapr: bootindex support
On 12/13/2013 01:05 AM, Michael S. Tsirkin wrote: > On Wed, Dec 11, 2013 at 09:22:13PM +1100, Alexey Kardashevskiy wrote: >> With the great help from Paolo, I am presenting yet another try of bootindex >> support on sPAPR, this time with some QOM fixes. Details are in the commit >> messages. >> Please, comment. Thanks. >> >> Alexey Kardashevskiy (5): >> boot: extend get_boot_devices_list() to ignore suffixes >> spapr-llan: add to boot device list >> spapr-vio: fix firmware names >> qdev: introduce FWPathProvider interface >> spapr: define interface to fix device pathname >> >> Hervé Poussineau (1): >> qom: detect bad reentrance during object_class_foreach >> >> Paolo Bonzini (2): >> qom: do not register interface "types" in the type table >> vl: allow customizing the class of /machine > > Looks good overall. > But this seems to suffer from the same problem as existing > bootindex code on x86: you can't add a bootable device > by hotplug. Why? The boot list is delivered to SLOF via the device tree which is composed on a machine reset (spapr_finalize_fdt() calls get_boot_devices_list() and that's it) so if a bootable device was hotplugged, then after reset it will be in the list. > And we really want to fix it on x86 too. > This might be fixable using FW CFG read callback, and updating > the bootindex blob dynamically. > See how e.g. acpi_build_update works. Sorry, since I do not have good understanding what is happening in x86, I need more details. Because I would implement qemu_add_machine_reset_notifier (copied from qemu_add_machine_init_done_notifier thing) and make fw_cfg_init() register a reset notifier. Or just call qemu_add_machine_init_done_notifier() on a machine reset - I do not really see a code in any of those notifiers which could not be executed on a machine reset (but again, I am even more ignorant in x86 field than usual :) ). -- Alexey
Re: [Qemu-devel] [PATCH v7 00/10] Drop in_use from BlockDriverState and enable point-in-time snapshot exporting over NBD
On 2013年12月13日 10:40, Ian Main wrote: On Thu, Dec 12, 2013 at 04:23:36PM +0800, Fam Zheng wrote: This series adds for point-in-time snapshot NBD exporting based on blockdev-backup (variant of drive-backup with existing device as target). We get a thin point-in-time snapshot by COW mechanism of drive-backup, and export it through built in NBD server. The steps are as below: 1. (SHELL) qemu-img create -f qcow2 BACKUP.qcow2 (Alternatively we can use -o backing_file=RUNNING-VM.img to omit explicitly providing the size by ourselves, but it's risky because RUNNING-VM.qcow2 is used r/w by guest. Whether or not setting backing file in the image file doesn't matter, as we are going to override the backing hd in the next step) 2. (QMP) blockdev-add backing=source-drive file.driver=file file.filename=BACKUP.qcow2 id=target0 if=none driver=qcow2 (where source-drive is the running BlockDriverState name for RUNNING-VM.img. This patch implements "backing=" option to override backing_hd for added drive) 3. (QMP) blockdev-backup device=source-drive sync=none target=target0 (this is the QMP command introduced by this series, which use a named device as target of drive-backup) 4. (QMP) nbd-server-add device=target0 When image fleecing done: 1. (QMP) block-job-complete device=source-drive If you do another revision, this should be block-job-cancel. OK, thanks for reminding. Fam
Re: [Qemu-devel] [PATCH v7 06/10] block: Replace in_use with operation blocker
On 2013年12月12日 21:46, Markus Armbruster wrote:
Fam Zheng writes:
This drops BlockDriverState.in_use with op_blockers:
- Call bdrv_op_block_all in place of bdrv_set_in_use(bs, 1).
- Call bdrv_op_unblock_all in place of bdrv_set_in_use(bs, 0).
- Check bdrv_op_is_blocked() in place of bdrv_in_use(bs).
The specific types are used, e.g. in place of starting block backup,
bdrv_op_is_blocked(bs, BLOCK_OP_TYPE_BACKUP, ...).
- Check bdrv_op_blocker_is_empty() in place of assert(!bs->in_use).
Note: there is no block for only specific types for now, i.e. a caller
blocks all or none. So although the checks are type specific, the above
changes can still be seen as identical in logic.
PATCH 3/10 adds a new blocker that doesn't block all or none. It's not
related to existing in_use, though, and therefore doesn't contradict
your "no functional change" claim.
I've always hated in_use. Its meaning is ill-defined, and its use is
confusing. Three cheers for getting rid of it!
Markus,
Thank you very much for the thorough and nice review on this. The commit
message apparently went out dated, because I reordered the patch and did
numbers of rebase during my self reviewing and testing.
I meant to make it mechanism, and will fix toward that as you suggested.
So I'll put it back to the first part of series in the next revision, to
avoid preceding patches introducing blocker (like you pointed out).
Signed-off-by: Fam Zheng
---
block-migration.c | 7 +--
block.c | 32 +++-
blockdev.c | 29 +++--
blockjob.c | 12 +++-
hw/block/dataplane/virtio-blk.c | 16 ++--
include/block/block.h | 2 --
include/block/block_int.h | 1 -
include/block/blockjob.h| 3 +++
8 files changed, 63 insertions(+), 39 deletions(-)
diff --git a/block-migration.c b/block-migration.c
index 897fdba..bf9a25f 100644
--- a/block-migration.c
+++ b/block-migration.c
@@ -59,6 +59,7 @@ typedef struct BlkMigDevState {
unsigned long *aio_bitmap;
int64_t completed_sectors;
BdrvDirtyBitmap *dirty_bitmap;
+Error *blocker;
} BlkMigDevState;
typedef struct BlkMigBlock {
@@ -346,7 +347,8 @@ static void init_blk_migration_it(void *opaque,
BlockDriverState *bs)
bmds->completed_sectors = 0;
bmds->shared_base = block_mig_state.shared_base;
alloc_aio_bitmap(bmds);
-bdrv_set_in_use(bs, 1);
+error_setg(&bmds->blocker, "block device is in use by migration");
+bdrv_op_block_all(bs, bmds->blocker);
bdrv_ref(bs);
block_mig_state.total_sector_sum += sectors;
@@ -584,7 +586,8 @@ static void blk_mig_cleanup(void)
blk_mig_lock();
while ((bmds = QSIMPLEQ_FIRST(&block_mig_state.bmds_list)) != NULL) {
QSIMPLEQ_REMOVE_HEAD(&block_mig_state.bmds_list, entry);
-bdrv_set_in_use(bmds->bs, 0);
+bdrv_op_unblock_all(bmds->bs, bmds->blocker);
+error_free(bmds->blocker);
bdrv_unref(bmds->bs);
g_free(bmds->aio_bitmap);
g_free(bmds);
diff --git a/block.c b/block.c
index 681d3be..f59f398 100644
--- a/block.c
+++ b/block.c
@@ -1652,15 +1652,17 @@ static void bdrv_move_feature_fields(BlockDriverState
*bs_dest,
bs_dest->refcnt = bs_src->refcnt;
/* job */
-bs_dest->in_use = bs_src->in_use;
bs_dest->job= bs_src->job;
/* keep the same entry in bdrv_states */
pstrcpy(bs_dest->device_name, sizeof(bs_dest->device_name),
bs_src->device_name);
+memcpy(bs_dest->op_blockers, bs_src->op_blockers,
+ sizeof(bs_dest->op_blockers));
bs_dest->list = bs_src->list;
}
Doesn't the new memcpy() belong to PATCH 02/10?
Yes, thanks.
+static bool bdrv_op_blocker_is_empty(BlockDriverState *bs);
/*
* Swap bs contents for two image chains while they are live,
* while keeping required fields on the BlockDriverState that is
@@ -1682,7 +1684,6 @@ void bdrv_swap(BlockDriverState *bs_new, BlockDriverState
*bs_old)
assert(QLIST_EMPTY(&bs_new->dirty_bitmaps));
assert(bs_new->job == NULL);
assert(bs_new->dev == NULL);
-assert(bs_new->in_use == 0);
assert(bs_new->io_limits_enabled == false);
assert(!throttle_have_timer(&bs_new->throttle_state));
Why can you drop the !in_use assertion rather than replacing it by a
bdrv_op_blocker_is_empty() assertion like you do elsewhere?
I shouldn't, will fix.
@@ -1701,7 +1702,6 @@ void bdrv_swap(BlockDriverState *bs_new, BlockDriverState
*bs_old)
/* Check a few fields that should remain attached to the device */
assert(bs_new->dev == NULL);
assert(bs_new->job == NULL);
-assert(bs_new->in_use == 0);
assert(bs_new->io_limits_enabled == false);
assert(!throttle_have_timer(&bs_new->throttle_state));
Re: [Qemu-devel] [PATCH RFC 2/3] qapi script: add support of event
于 2013/12/2 14:48, Wenchao Xia 写道:
+
+if (!qapi_event_functions.emit) {
Better to return an error here instead of silently failing.
The purpose is allowing emit=NULL and skip event code in that case.
But the code will do nothing and the caller won't know that.
Now the caller also won't know that useless code will be executed,
when qemu-img link with stub of monitor_event functions. :)
Actually, I wonder if the code should even abort() in such a case,
as emit=NULL would be a programming today.
I am not sure why the code should always do something. The code may
actually take CPU resource to do nothing meanful, such as build up a
qdict and release it later, when emit is not a valid function. So I
did this as an improvement: check emit function ahead to escape useless
work.
Luiz, do you agree with me?
Re: [Qemu-devel] [PATCH 4/5] monitor: add object-add (QMP) and object_add (HMP) command
于 2013/12/11 2:15, Paolo Bonzini 写道:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Il 10/12/2013 19:00, Eric Blake ha scritto:
+ 'data': {'qom-type': 'str', 'id': 'str', '*props': 'dict'},
+ 'gen': 'no' }
This feels VERY open-coded. No where else in qapi-schema do we
have 'dict' as a type
Yes, in fact the "data" field is entirely skipped by the code
generator (that's 'gen':'no').
Could we use hmp_object_add()->qmp_object_add()->object_add() code path,
instead of hmp_object_add()->object_add(),qmp_object_add()->object_add()?
Would skipping by generator brings some difficult to it?
Re: [Qemu-devel] [PATCH v7 00/10] Drop in_use from BlockDriverState and enable point-in-time snapshot exporting over NBD
On Thu, Dec 12, 2013 at 04:23:36PM +0800, Fam Zheng wrote: > This series adds for point-in-time snapshot NBD exporting based on > blockdev-backup (variant of drive-backup with existing device as target). > > We get a thin point-in-time snapshot by COW mechanism of drive-backup, and > export it through built in NBD server. The steps are as below: > > 1. (SHELL) qemu-img create -f qcow2 BACKUP.qcow2 > > (Alternatively we can use -o backing_file=RUNNING-VM.img to omit > explicitly > providing the size by ourselves, but it's risky because RUNNING-VM.qcow2 > is > used r/w by guest. Whether or not setting backing file in the image file > doesn't matter, as we are going to override the backing hd in the next > step) > > 2. (QMP) blockdev-add backing=source-drive file.driver=file > file.filename=BACKUP.qcow2 id=target0 if=none driver=qcow2 > > (where source-drive is the running BlockDriverState name for > RUNNING-VM.img. This patch implements "backing=" option to override > backing_hd for added drive) > > 3. (QMP) blockdev-backup device=source-drive sync=none target=target0 > > (this is the QMP command introduced by this series, which use a named > device as target of drive-backup) > > 4. (QMP) nbd-server-add device=target0 > > When image fleecing done: > > 1. (QMP) block-job-complete device=source-drive If you do another revision, this should be block-job-cancel. Ian
Re: [Qemu-devel] [PATCH v5 0/9] Make 'dump-guest-memory' dump in kdump-compressed format
On 12/12/2013 07:07 PM, Qiao Nuohan wrote: > Hi, all > > Would you please give some advice about how to continue my series? > > My patches have stuck for several months, because I was not allowed to > add an > option before introspection is implemented. After observing mails about > introspection, I find it is still not confirmed its implement way. I can see several options: 1. Take over the introspection patches and push them through to completion 2. Come up with some alternative witness when your feature is available. Full-blown introspection of the entire QAPI schema is a heavy hammer, and if we can have something simpler to use for just this case, but still discoverable, then management can use that simpler method to learn if this feature is present. See for example how we added 'query-migrate-capabilities' as a way to add migration capabilities without needing fullblown introspection. 3. Rebase your patches and post without waiting for any means of discovery - maybe someone will still be interested enough in using the patches even without management being able to programmatically determine the availability. This is a busy list; it doesn't mean your patch will be outright rejected, but if you aren't actively pinging and rebasing it, the patch gets less attention, so people assume no one wanted it. Thanks for reviving the discussion, and good luck with what you try next. Personally, I think that both option 1 and 2 at the same time is worth pursuing (I'd really like introspection, but introspection is a heavy hammer so having something lighter weight for just your feature is also worth having). -- Eric Blake eblake redhat com+1-919-301-3266 Libvirt virtualization library http://libvirt.org signature.asc Description: OpenPGP digital signature
Re: [Qemu-devel] [PATCH V7 0/6] qcow2: rollback the modification on fail in snapshot creation
ping?
Re: [Qemu-devel] [PATCH v5 0/9] Make 'dump-guest-memory' dump in kdump-compressed format
Hi, all Would you please give some advice about how to continue my series? My patches have stuck for several months, because I was not allowed to add an option before introspection is implemented. After observing mails about introspection, I find it is still not confirmed its implement way. Since I got a deadline about this feature(in three months), I have to ask for some advice about these patches. First, I hope to confirm whether it is impossible to add an option to 'dump- guest-memory'. If the answer is impossible, then should I still wait for introspection or just change to add a new command? On 07/09/2013 03:30 PM, Qiao Nuohan wrote: Hi, all The last version is here: http://lists.gnu.org/archive/html/qemu-devel/2013-05/msg03866.html Command 'dump-guest-memory' was introduced to dump guest's memory. But the vmcore's format is only elf32 or elf64. The message is here: http://lists.gnu.org/archive/html/qemu-devel/2012-04/msg03379.html Compared with migration, the missing of compression feature means regression to 'dump-guest-memory'. So we post these patches to make 'dump-guest-memory' be able to dump guest's in kdump-compressed format. Then vmcore can be much smaller, and easily to be delivered. The kdump-compressed format is *linux specific* *linux standard* crash dump format used in kdump framework. The kdump-compressed format is readable only with the crash utility, and it can be smaller than the ELF format because of the compression support. To get more detailed information about kdump-compressed format, please refer to the following URL: http://sourceforge.net/projects/makedumpfile/ Note, similar to 'dump-guest-memory': 1. The guest should be x86 or x86_64. The other arch is not supported now. 2. If the OS is in the second kernel, gdb may not work well, and crash can work by specifying '--machdep phys_addr=xxx' in the command line. The reason is that the second kernel will update the page table, and we can not get the page table for the first kernel. 3. The cpu's state is stored in QEMU note. 4. The vmcore are able to be compressed with zlib, lzo or snappy. zlib is available by default, and option '--enable-lzo' or '--enable-snappy' should be specified with 'configure' to make lzo or snappy available. Changelog: Changes from v4 to v5: 1. using flatten format to avoid using temporary files according to Stefan's comments 2. Address Andreas's comments about coding style Changes from v3 to v4: 1. change to avoid conflict with Andreas's patches 2. rebase Changes from v2 to v3: 1. Address Eric's comment Changes from v1 to v2: 1. Address Eric& Daniel's comment: fix manner of string copy. 2. Address Eric's comment: replace reinventing new constants by using the ready-made ones accoring. 3. Address Andreas's comment: remove useless include. Qiao Nuohan (9): dump: Add argument to write_elfxx_notes dump: Add API to write header of flatten format dump: Add API to write vmcore dump: Add API to write elf notes to buffer dump: add API to write dump header dump: Add API to write dump_bitmap dump: Add APIs to operate DataCache dump: Add API to write dump pages dump: Make kdump-compressed format available for 'dump-guest-memory' configure | 50 +++ dump.c| 873 - hmp-commands.hx | 12 +- hmp.c | 23 ++- include/sysemu/dump.h | 127 +++ qapi-schema.json | 22 ++- qmp-commands.hx |6 +- 7 files changed, 1088 insertions(+), 25 deletions(-) -- Regards Qiao Nuohan
Re: [Qemu-devel] issue with vgabios lfb and virtio vga
On Thu, Dec 12, 2013 at 6:17 PM, Gerd Hoffmann wrote: > On Do, 2013-12-12 at 09:51 +1000, Dave Airlie wrote: >> Now the vgabios.c does a check of bar 0 and bar 1 to see if they are >> 0xfff1 masked, this protects against the the i/o bar but fails to >> protect against the LFB one as PCI BARs don't encode the size just the >> base address, and a 4k BAR can be aligned to a larger size. > >> Any ideas? I seem to remember vgabios.c had a hack in the past for >> vmware, but I'm not sure. > > The fallback to bar #1 *is* the vmware hack ;) > > Something like the attached patch should do the trick. > Oh do we generate the VGABIOS from seabios now or are we going to? I've been using the vgabios url from the pc-bios/README file Dave.
Re: [Qemu-devel] [PATCH qom v1 1/1] qom/object.c: Split out object and class caches.
On Wed, Nov 27, 2013 at 08:27:33PM -0800, Peter Crosthwaite wrote:
> The object-cast and class-cast caches cannot be shared because class
> caching is conditional on the target type not being an interface and
> object caching is unconditional. Leads to a bug when a class cast
> to an interface follows an object cast to the same interface type:
>
> FooObject = FOO(obj);
> FooClass = FOO_GET_CLASS(obj);
>
> Where TYPE_FOO is an interface. The first (object) cast will be
> successful and cache the casting result (i.e. TYPE_FOO will be cached).
> The second (class) cast will then check the shared cast cache
> and register a hit. The issue is, when a class cast hits in the cache
> it just returns a pointer cast of the input class (i.e. the concrete
> class).
>
> When casting to an interface, the cast itself must return the
> interface class, not the concrete class. The implementation of class
> cast caching already ensures that the returned cast result is only
> a pointer cast before caching. The object cast logic however does
> not have this check.
>
> Resolve by just splitting the object and class caches.
>
> Signed-off-by: Peter Crosthwaite
Reviewed-by: Edgar E. Iglesias
> ---
>
> include/qom/object.h | 3 ++-
> qom/object.c | 13 +++--
> 2 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/include/qom/object.h b/include/qom/object.h
> index a275db2..5f78847 100644
> --- a/include/qom/object.h
> +++ b/include/qom/object.h
> @@ -358,7 +358,8 @@ struct ObjectClass
> Type type;
> GSList *interfaces;
>
> -const char *cast_cache[OBJECT_CLASS_CAST_CACHE];
> +const char *object_cast_cache[OBJECT_CLASS_CAST_CACHE];
> +const char *class_cast_cache[OBJECT_CLASS_CAST_CACHE];
>
> ObjectUnparent *unparent;
> };
> diff --git a/qom/object.c b/qom/object.c
> index fc19cf6..21b5a0b 100644
> --- a/qom/object.c
> +++ b/qom/object.c
> @@ -458,7 +458,7 @@ Object *object_dynamic_cast_assert(Object *obj, const
> char *typename,
> Object *inst;
>
> for (i = 0; obj && i < OBJECT_CLASS_CAST_CACHE; i++) {
> -if (obj->class->cast_cache[i] == typename) {
> +if (obj->class->object_cast_cache[i] == typename) {
> goto out;
> }
> }
> @@ -475,9 +475,10 @@ Object *object_dynamic_cast_assert(Object *obj, const
> char *typename,
>
> if (obj && obj == inst) {
> for (i = 1; i < OBJECT_CLASS_CAST_CACHE; i++) {
> -obj->class->cast_cache[i - 1] = obj->class->cast_cache[i];
> +obj->class->object_cast_cache[i - 1] =
> +obj->class->object_cast_cache[i];
> }
> -obj->class->cast_cache[i - 1] = typename;
> +obj->class->object_cast_cache[i - 1] = typename;
> }
>
> out:
> @@ -547,7 +548,7 @@ ObjectClass *object_class_dynamic_cast_assert(ObjectClass
> *class,
> int i;
>
> for (i = 0; class && i < OBJECT_CLASS_CAST_CACHE; i++) {
> -if (class->cast_cache[i] == typename) {
> +if (class->class_cast_cache[i] == typename) {
> ret = class;
> goto out;
> }
> @@ -568,9 +569,9 @@ ObjectClass *object_class_dynamic_cast_assert(ObjectClass
> *class,
> #ifdef CONFIG_QOM_CAST_DEBUG
> if (class && ret == class) {
> for (i = 1; i < OBJECT_CLASS_CAST_CACHE; i++) {
> -class->cast_cache[i - 1] = class->cast_cache[i];
> +class->class_cast_cache[i - 1] = class->class_cast_cache[i];
> }
> -class->cast_cache[i - 1] = typename;
> +class->class_cast_cache[i - 1] = typename;
> }
> out:
> #endif
> --
> 1.8.4.4
>
>
[Qemu-devel] [PATCH v12 5/5] hw/arm: add cubieboard support
Signed-off-by: liguang
Reviewed-by: Peter Crosthwaite
---
hw/arm/Makefile.objs |2 +-
hw/arm/cubieboard.c | 69 ++
2 files changed, 70 insertions(+), 1 deletions(-)
create mode 100644 hw/arm/cubieboard.c
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 012bd2c..1dd94de 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -5,4 +5,4 @@ obj-y += tosa.o versatilepb.o vexpress.o xilinx_zynq.o z2.o
obj-y += armv7m.o exynos4210.o pxa2xx.o pxa2xx_gpio.o pxa2xx_pic.o
obj-y += omap1.o omap2.o strongarm.o
-obj-$(CONFIG_ALLWINNER_A10) += allwinner-a10.o
+obj-$(CONFIG_ALLWINNER_A10) += allwinner-a10.o cubieboard.o
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
new file mode 100644
index 000..3fcb6d2
--- /dev/null
+++ b/hw/arm/cubieboard.c
@@ -0,0 +1,69 @@
+/*
+ * cubieboard emulation
+ *
+ * Copyright (C) 2013 Li Guang
+ * Written by Li Guang
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ */
+
+#include "hw/sysbus.h"
+#include "hw/devices.h"
+#include "hw/boards.h"
+#include "hw/arm/allwinner-a10.h"
+
+static struct arm_boot_info cubieboard_binfo = {
+.loader_start = AW_A10_SDRAM_BASE,
+.board_id = 0x1008,
+};
+
+typedef struct CubieBoardState {
+AwA10State *a10;
+MemoryRegion sdram;
+} CubieBoardState;
+
+static void cubieboard_init(QEMUMachineInitArgs *args)
+{
+CubieBoardState *s = g_new(CubieBoardState, 1);
+Error *err = NULL;
+
+s->a10 = AW_A10(object_new(TYPE_AW_A10));
+object_property_set_bool(OBJECT(s->a10), true, "realized", &err);
+if (err != NULL) {
+error_report("Couldn't realize Allwinner A10: %s\n",
+error_get_pretty(err));
+exit(1);
+}
+
+memory_region_init_ram(&s->sdram, NULL, "cubieboard.ram", args->ram_size);
+vmstate_register_ram_global(&s->sdram);
+memory_region_add_subregion(get_system_memory(), AW_A10_SDRAM_BASE,
+&s->sdram);
+
+cubieboard_binfo.ram_size = args->ram_size;
+cubieboard_binfo.kernel_filename = args->kernel_filename;
+cubieboard_binfo.kernel_cmdline = args->kernel_cmdline;
+arm_load_kernel(&s->a10->cpu, &cubieboard_binfo);
+}
+
+static QEMUMachine cubieboard_machine = {
+.name = "cubieboard",
+.desc = "cubietech cubieboard",
+.init = cubieboard_init,
+};
+
+
+static void cubieboard_machine_init(void)
+{
+qemu_register_machine(&cubieboard_machine);
+}
+
+machine_init(cubieboard_machine_init)
--
1.7.2.5
[Qemu-devel] [PATCH v12 4/5] hw/arm: add allwinner a10 SoC support
Signed-off-by: liguang
Reviewed-by: Peter Crosthwaite
---
default-configs/arm-softmmu.mak |1 +
hw/arm/Makefile.objs|1 +
hw/arm/allwinner-a10.c | 103 +++
include/hw/arm/allwinner-a10.h | 35 +
4 files changed, 140 insertions(+), 0 deletions(-)
create mode 100644 hw/arm/allwinner-a10.c
create mode 100644 include/hw/arm/allwinner-a10.h
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index e965068..a19208f 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -84,3 +84,4 @@ CONFIG_INTEGRATOR_DEBUG=y
CONFIG_ALLWINNER_A10_PIT=y
CONFIG_ALLWINNER_A10_PIC=y
+CONFIG_ALLWINNER_A10=y
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 3671b42..012bd2c 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -5,3 +5,4 @@ obj-y += tosa.o versatilepb.o vexpress.o xilinx_zynq.o z2.o
obj-y += armv7m.o exynos4210.o pxa2xx.o pxa2xx_gpio.o pxa2xx_pic.o
obj-y += omap1.o omap2.o strongarm.o
+obj-$(CONFIG_ALLWINNER_A10) += allwinner-a10.o
diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
new file mode 100644
index 000..4658e19
--- /dev/null
+++ b/hw/arm/allwinner-a10.c
@@ -0,0 +1,103 @@
+/*
+ * Allwinner A10 SoC emulation
+ *
+ * Copyright (C) 2013 Li Guang
+ * Written by Li Guang
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ */
+
+#include "hw/sysbus.h"
+#include "hw/devices.h"
+#include "hw/arm/allwinner-a10.h"
+
+static void aw_a10_init(Object *obj)
+{
+AwA10State *s = AW_A10(obj);
+
+object_initialize(&s->cpu, sizeof(s->cpu), "cortex-a8-" TYPE_ARM_CPU);
+object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
+
+object_initialize(&s->intc, sizeof(s->intc), TYPE_AW_A10_PIC);
+qdev_set_parent_bus(DEVICE(&s->intc), sysbus_get_default());
+
+object_initialize(&s->timer, sizeof(s->timer), TYPE_AW_A10_PIT);
+qdev_set_parent_bus(DEVICE(&s->timer), sysbus_get_default());
+}
+
+static void aw_a10_realize(DeviceState *dev, Error **errp)
+{
+AwA10State *s = AW_A10(dev);
+SysBusDevice *sysbusdev;
+uint8_t i;
+qemu_irq fiq, irq;
+Error *err = NULL;
+
+object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
+if (err != NULL) {
+error_propagate(errp, err);
+return;
+}
+irq = qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ);
+fiq = qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ);
+
+object_property_set_bool(OBJECT(&s->intc), true, "realized", &err);
+if (err != NULL) {
+error_propagate(errp, err);
+return;
+}
+sysbusdev = SYS_BUS_DEVICE(&s->intc);
+sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE);
+sysbus_connect_irq(sysbusdev, 0, irq);
+sysbus_connect_irq(sysbusdev, 1, fiq);
+for (i = 0; i < AW_A10_PIC_INT_NR; i++) {
+s->irq[i] = qdev_get_gpio_in(DEVICE(&s->intc), i);
+}
+
+object_property_set_bool(OBJECT(&s->timer), true, "realized", &err);
+if (err != NULL) {
+error_propagate(errp, err);
+return;
+}
+sysbusdev = SYS_BUS_DEVICE(&s->timer);
+sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE);
+sysbus_connect_irq(sysbusdev, 0, s->irq[22]);
+sysbus_connect_irq(sysbusdev, 1, s->irq[23]);
+sysbus_connect_irq(sysbusdev, 2, s->irq[24]);
+sysbus_connect_irq(sysbusdev, 3, s->irq[25]);
+sysbus_connect_irq(sysbusdev, 4, s->irq[67]);
+sysbus_connect_irq(sysbusdev, 5, s->irq[68]);
+
+serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2, s->irq[1],
+ 115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
+}
+
+static void aw_a10_class_init(ObjectClass *oc, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(oc);
+
+dc->realize = aw_a10_realize;
+}
+
+static const TypeInfo aw_a10_type_info = {
+.name = TYPE_AW_A10,
+.parent = TYPE_DEVICE,
+.instance_size = sizeof(AwA10State),
+.instance_init = aw_a10_init,
+.class_init = aw_a10_class_init,
+};
+
+static void aw_a10_register_types(void)
+{
+type_register_static(&aw_a10_type_info);
+}
+
+type_init(aw_a10_register_types)
diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h
new file mode 100644
index 000..da36647
--- /dev/null
+++ b/include/hw/arm/allwinner-a10.h
@@ -0,0 +1,35 @@
+#ifndef ALLWINNER_H_
+
+#include "qemu-common.h"
+#include "qemu/error-report.h"
+#include "hw/char/serial.h"
+#include "hw/arm/arm.h"
+#include "hw/timer/allwinner-a10-pit.h"
+#include "h
[Qemu-devel] [PATCH v12 2/5] hw/timer: add allwinner a10 timer
Signed-off-by: liguang
Reviewed-by: Peter Crosthwaite
---
default-configs/arm-softmmu.mak |2 +
hw/timer/Makefile.objs |2 +
hw/timer/allwinner-a10-pit.c | 254 ++
include/hw/timer/allwinner-a10-pit.h | 59
4 files changed, 317 insertions(+), 0 deletions(-)
create mode 100644 hw/timer/allwinner-a10-pit.c
create mode 100644 include/hw/timer/allwinner-a10-pit.h
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index a555eef..7858abf 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -81,3 +81,5 @@ CONFIG_VERSATILE_I2C=y
CONFIG_SDHCI=y
CONFIG_INTEGRATOR_DEBUG=y
+
+CONFIG_ALLWINNER_A10_PIT=y
diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
index eca5905..f6ace47 100644
--- a/hw/timer/Makefile.objs
+++ b/hw/timer/Makefile.objs
@@ -27,3 +27,5 @@ obj-$(CONFIG_SH4) += sh_timer.o
obj-$(CONFIG_TUSB6010) += tusb6010.o
obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
+
+obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o
diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c
new file mode 100644
index 000..8bba5e2
--- /dev/null
+++ b/hw/timer/allwinner-a10-pit.c
@@ -0,0 +1,254 @@
+/*
+ * Allwinner A10 timer device emulation
+ *
+ * Copyright (C) 2013 Li Guang
+ * Written by Li Guang
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ */
+
+#include "hw/sysbus.h"
+#include "sysemu/sysemu.h"
+#include "hw/timer/allwinner-a10-pit.h"
+
+static uint64_t a10_pit_read(void *opaque, hwaddr offset, unsigned size)
+{
+AwA10PITState *s = AW_A10_PIT(opaque);
+uint8_t index;
+
+switch (offset) {
+case AW_A10_PIT_TIMER_IRQ_EN:
+return s->irq_enable;
+case AW_A10_PIT_TIMER_IRQ_ST:
+return s->irq_status;
+case AW_A10_PIT_TIMER_BASE ... AW_A10_PIT_TIMER_BASE_END:
+index = offset & 0xf0;
+index >>= 4;
+index -= 1;
+switch (offset & 0x0f) {
+case AW_A10_PIT_TIMER_CONTROL:
+return s->control[index];
+case AW_A10_PIT_TIMER_INTERVAL:
+return s->interval[index];
+case AW_A10_PIT_TIMER_COUNT:
+s->count[index] = ptimer_get_count(s->timer[index]);
+return s->count[index];
+default:
+qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad offset 0x%x\n", __func__, (int)offset);
+break;
+}
+case AW_A10_PIT_WDOG_CONTROL:
+break;
+case AW_A10_PIT_WDOG_MODE:
+break;
+case AW_A10_PIT_COUNT_LO:
+return s->count_lo;
+case AW_A10_PIT_COUNT_HI:
+return s->count_hi;
+case AW_A10_PIT_COUNT_CTL:
+return s->count_ctl;
+default:
+qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad offset 0x%x\n", __func__, (int)offset);
+break;
+}
+
+return 0;
+}
+
+static void a10_pit_write(void *opaque, hwaddr offset, uint64_t value,
+unsigned size)
+{
+ AwA10PITState *s = AW_A10_PIT(opaque);
+ uint8_t index;
+
+switch (offset) {
+case AW_A10_PIT_TIMER_IRQ_EN:
+s->irq_enable = value;
+break;
+case AW_A10_PIT_TIMER_IRQ_ST:
+s->irq_status &= ~value;
+break;
+case AW_A10_PIT_TIMER_BASE ... AW_A10_PIT_TIMER_BASE_END:
+index = offset & 0xf0;
+index >>= 4;
+index -= 1;
+switch (offset & 0x0f) {
+case AW_A10_PIT_TIMER_CONTROL:
+s->control[index] = value;
+if (s->control[index] & AW_A10_PIT_TIMER_RELOAD) {
+ptimer_set_count(s->timer[index], s->interval[index]);
+}
+if (s->control[index] & AW_A10_PIT_TIMER_EN) {
+int oneshot = 0;
+if (s->control[index] & AW_A10_PIT_TIMER_MODE) {
+oneshot = 1;
+}
+ptimer_run(s->timer[index], oneshot);
+} else {
+ptimer_stop(s->timer[index]);
+}
+break;
+case AW_A10_PIT_TIMER_INTERVAL:
+s->interval[index] = value;
+ptimer_set_limit(s->timer[index], s->interval[index], 1);
+break;
+case AW_A10_PIT_TIMER_COUNT:
+s->count[index] = value;
+break;
+default:
+qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad offset 0x%x\n", __func__, (int)offset);
+}
+break;
+case AW_A10_PIT_WD
[Qemu-devel] [PATCH v12 3/5] hw/intc: add allwinner A10 interrupt controller
Signed-off-by: liguang
Reviewed-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
default-configs/arm-softmmu.mak |1 +
hw/intc/Makefile.objs |1 +
hw/intc/allwinner-a10-pic.c | 200 +++
include/hw/intc/allwinner-a10-pic.h | 40 +++
4 files changed, 242 insertions(+), 0 deletions(-)
create mode 100644 hw/intc/allwinner-a10-pic.c
create mode 100644 include/hw/intc/allwinner-a10-pic.h
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 7858abf..e965068 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -83,3 +83,4 @@ CONFIG_SDHCI=y
CONFIG_INTEGRATOR_DEBUG=y
CONFIG_ALLWINNER_A10_PIT=y
+CONFIG_ALLWINNER_A10_PIC=y
diff --git a/hw/intc/Makefile.objs b/hw/intc/Makefile.objs
index 47ac442..60eb936 100644
--- a/hw/intc/Makefile.objs
+++ b/hw/intc/Makefile.objs
@@ -24,3 +24,4 @@ obj-$(CONFIG_OPENPIC_KVM) += openpic_kvm.o
obj-$(CONFIG_SH4) += sh_intc.o
obj-$(CONFIG_XICS) += xics.o
obj-$(CONFIG_XICS_KVM) += xics_kvm.o
+obj-$(CONFIG_ALLWINNER_A10_PIC) += allwinner-a10-pic.o
diff --git a/hw/intc/allwinner-a10-pic.c b/hw/intc/allwinner-a10-pic.c
new file mode 100644
index 000..407d563
--- /dev/null
+++ b/hw/intc/allwinner-a10-pic.c
@@ -0,0 +1,200 @@
+/*
+ * Allwinner A10 interrupt controller device emulation
+ *
+ * Copyright (C) 2013 Li Guang
+ * Written by Li Guang
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ */
+
+#include "hw/sysbus.h"
+#include "hw/devices.h"
+#include "sysemu/sysemu.h"
+#include "hw/intc/allwinner-a10-pic.h"
+
+static void aw_a10_pic_update(AwA10PICState *s)
+{
+uint8_t i;
+int irq = 0, fiq = 0;
+
+for (i = 0; i < AW_A10_PIC_REG_NUM; i++) {
+irq |= s->irq_pending[i] & ~s->mask[i];
+fiq |= s->select[i] & s->irq_pending[i] & ~s->mask[i];
+}
+
+qemu_set_irq(s->parent_irq, !!irq);
+qemu_set_irq(s->parent_fiq, !!fiq);
+}
+
+static void aw_a10_pic_set_irq(void *opaque, int irq, int level)
+{
+AwA10PICState *s = opaque;
+
+if (level) {
+set_bit(irq % 32, (void *)&s->irq_pending[irq / 32]);
+}
+aw_a10_pic_update(s);
+}
+
+static uint64_t aw_a10_pic_read(void *opaque, hwaddr offset, unsigned size)
+{
+AwA10PICState *s = opaque;
+uint8_t index = (offset & 0xc) / 4;
+
+switch (offset) {
+case AW_A10_PIC_VECTOR:
+return s->vector;
+case AW_A10_PIC_BASE_ADDR:
+return s->base_addr;
+case AW_A10_PIC_PROTECT:
+return s->protect;
+case AW_A10_PIC_NMI:
+return s->nmi;
+case AW_A10_PIC_IRQ_PENDING ... AW_A10_PIC_IRQ_PENDING + 8:
+return s->irq_pending[index];
+case AW_A10_PIC_FIQ_PENDING ... AW_A10_PIC_FIQ_PENDING + 8:
+return s->fiq_pending[index];
+case AW_A10_PIC_SELECT ... AW_A10_PIC_SELECT + 8:
+return s->select[index];
+case AW_A10_PIC_ENABLE ... AW_A10_PIC_ENABLE + 8:
+return s->enable[index];
+case AW_A10_PIC_MASK ... AW_A10_PIC_MASK + 8:
+return s->mask[index];
+default:
+qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad offset 0x%x\n", __func__, (int)offset);
+break;
+}
+
+return 0;
+}
+
+static void aw_a10_pic_write(void *opaque, hwaddr offset, uint64_t value,
+ unsigned size)
+{
+AwA10PICState *s = opaque;
+uint8_t index = (offset & 0xc) / 4;
+
+switch (offset) {
+case AW_A10_PIC_VECTOR:
+s->vector = value & ~0x3;
+break;
+case AW_A10_PIC_BASE_ADDR:
+s->base_addr = value & ~0x3;
+case AW_A10_PIC_PROTECT:
+s->protect = value;
+break;
+case AW_A10_PIC_NMI:
+s->nmi = value;
+break;
+case AW_A10_PIC_IRQ_PENDING ... AW_A10_PIC_IRQ_PENDING + 8:
+s->irq_pending[index] &= ~value;
+break;
+case AW_A10_PIC_FIQ_PENDING ... AW_A10_PIC_FIQ_PENDING + 8:
+s->fiq_pending[index] &= ~value;
+break;
+case AW_A10_PIC_SELECT ... AW_A10_PIC_SELECT + 8:
+s->select[index] = value;
+break;
+case AW_A10_PIC_ENABLE ... AW_A10_PIC_ENABLE + 8:
+s->enable[index] = value;
+break;
+case AW_A10_PIC_MASK ... AW_A10_PIC_MASK + 8:
+s->mask[index] = value;
+break;
+default:
+qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad offset 0x%x\n", __func__, (int)offset);
+break;
+}
+
+aw_a10_pic_update(s);
+}
+
+static const MemoryRegionOps aw_a10_pic_ops =
[Qemu-devel] [PATCH v12 0/5] add allwinner A10 SoC support
lay a foundation for allwinner A10 SoC with a cortex-a8 processor, and will add more devices later. v2: split timer and interrupt controller emulation into their corresponding files. v3: 1. change loader_start address 2. add 64-bit counter 3. fixup fail to clear interrup status issue v4: 1. add VMSD 2. use defines of magic number for readability 3. code cleanup v5: 1. add VMSTATE_PTIMER_ARRAY 2. code cleanup v6: 1. fix a fiq lost issue pointed out by Peter Crosthwaite 2. code cleanup v7: model allwinner A10 as a SoC device, and add cubieboard. v8: 1. A10 be QOMified as a device 2. add AW as prefix of A10 v9: code cleanup for PATCH 4/5 A10 SoC support v10: code cleanup for PATCH 2/5 v11: code cleanup for PATCH 2/5, 3/5 v12: 1. use bool type for irq setting 2. use Peter's VMSTATE_PTIMER_ARRAY TODO: 1. add BROM support 2. add more devices test: can boot-up officially released linux kernel build with PLL disabled. can find test zImage at: http://dl.dbank.com/c0jaibr54s reference: http://linux-sunxi.org/Main_Page Li Guang (5) vmstate: Add support for an array of ptimer_state * hw/timer: add allwinner a10 timer hw/intc: add allwinner A10 interrupt controller hw/arm: add allwinner a10 SoC support hw/arm: add cubieboard support default-configs/arm-softmmu.mak | 4 + hw/arm/Makefile.objs | 3 + hw/arm/allwinner-a10.c | 103 +++ hw/arm/cubieboard.c | 69 ++ hw/intc/Makefile.objs| 1 + hw/intc/allwinner-a10-pic.c | 200 +++ hw/timer/Makefile.objs | 2 + hw/timer/allwinner-a10-pit.c | 254 ++ include/hw/arm/allwinner-a10.h | 35 + include/hw/intc/allwinner-a10-pic.h | 40 +++ include/hw/ptimer.h | 4 include/hw/timer/allwinner-a10-pit.h | 59 include/migration/vmstate.h | 10 ++ 13 files changed, 783 insertions(+), 1 deletions(-) create mode 100644 hw/timer/allwinner-a10-pit.c create mode 100644 include/hw/timer/allwinner-a10-pit.h create mode 100644 hw/intc/allwinner-a10-pic.c create mode 100644 include/hw/intc/allwinner-a10-pic.h create mode 100644 hw/arm/allwinner-a10.c create mode 100644 include/hw/arm/allwinner-a10.h create mode 100644 hw/arm/cubieboard.c
[Qemu-devel] [PATCH v12 1/5] vmstate: Add support for an array of ptimer_state *
From: Peter Maydell
Add support for defining a vmstate field which is an array
of pointers to structures, and use this to define a
VMSTATE_PTIMER_ARRAY() which allows an array of ptimer_state*
to be used by devices.
Signed-off-by: Peter Maydell
---
include/hw/ptimer.h |4
include/migration/vmstate.h | 10 ++
2 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/include/hw/ptimer.h b/include/hw/ptimer.h
index 28fcaf1..a33edf4 100644
--- a/include/hw/ptimer.h
+++ b/include/hw/ptimer.h
@@ -36,4 +36,8 @@ extern const VMStateDescription vmstate_ptimer;
.offset = vmstate_offset_pointer(_state, _field, ptimer_state), \
}
+#define VMSTATE_PTIMER_ARRAY(_f, _s, _n)\
+VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(_f, _s, _n, 0, \
+ vmstate_ptimer, ptimer_state)
+
#endif
diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h
index 9d09e60..be193ba 100644
--- a/include/migration/vmstate.h
+++ b/include/migration/vmstate.h
@@ -339,6 +339,16 @@ extern const VMStateInfo vmstate_info_bitmap;
.offset = vmstate_offset_array(_state, _field, _type, _num), \
}
+#define VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(_f, _s, _n, _v, _vmsd, _type) { \
+.name = (stringify(_f)), \
+.version_id = (_v), \
+.num= (_n), \
+.vmsd = &(_vmsd), \
+.size = sizeof(_type *),\
+.flags = VMS_ARRAY|VMS_STRUCT|VMS_ARRAY_OF_POINTER, \
+.offset = vmstate_offset_array(_s, _f, _type*, _n), \
+}
+
#define VMSTATE_STRUCT_ARRAY_TEST(_field, _state, _num, _test, _version,
_vmsd, _type) { \
.name = (stringify(_field)), \
.num = (_num), \
--
1.7.2.5
Re: [Qemu-devel] [PATCH] target-microblaze: Use the new qemu_ld/st opcodes
On Tue, Dec 10, 2013 at 03:40:21PM -0800, Richard Henderson wrote:
> The ability of the new opcodes to byte-swap the memory operation
> simplifies the code in and around dec_load and dec_store significantly.
I've tested and applied this, thanks.
Edgar
>
> Cc: Edgar E. Iglesias
> Signed-off-by: Richard Henderson
> ---
> target-microblaze/translate.c | 139
> +++---
> 1 file changed, 35 insertions(+), 104 deletions(-)
>
> diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
> index 9edcb67..270138c 100644
> --- a/target-microblaze/translate.c
> +++ b/target-microblaze/translate.c
> @@ -864,26 +864,6 @@ static void dec_imm(DisasContext *dc)
> dc->clear_imm = 0;
> }
>
> -static inline void gen_load(DisasContext *dc, TCGv dst, TCGv addr,
> -unsigned int size, bool exclusive)
> -{
> -int mem_index = cpu_mmu_index(dc->env);
> -
> -if (size == 1) {
> -tcg_gen_qemu_ld8u(dst, addr, mem_index);
> -} else if (size == 2) {
> -tcg_gen_qemu_ld16u(dst, addr, mem_index);
> -} else if (size == 4) {
> -tcg_gen_qemu_ld32u(dst, addr, mem_index);
> -} else
> -cpu_abort(dc->env, "Incorrect load size %d\n", size);
> -
> -if (exclusive) {
> -tcg_gen_mov_tl(env_res_addr, addr);
> -tcg_gen_mov_tl(env_res_val, dst);
> -}
> -}
> -
> static inline TCGv *compute_ldst_addr(DisasContext *dc, TCGv *t)
> {
> unsigned int extimm = dc->tb_flags & IMM_FLAG;
> @@ -935,35 +915,22 @@ static inline TCGv *compute_ldst_addr(DisasContext *dc,
> TCGv *t)
> return t;
> }
>
> -static inline void dec_byteswap(DisasContext *dc, TCGv dst, TCGv src, int
> size)
> -{
> -if (size == 4) {
> -tcg_gen_bswap32_tl(dst, src);
> -} else if (size == 2) {
> -TCGv t = tcg_temp_new();
> -
> -/* bswap16 assumes the high bits are zero. */
> -tcg_gen_andi_tl(t, src, 0x);
> -tcg_gen_bswap16_tl(dst, t);
> -tcg_temp_free(t);
> -} else {
> -/* Ignore.
> -cpu_abort(dc->env, "Invalid ldst byteswap size %d\n", size);
> -*/
> -}
> -}
> -
> static void dec_load(DisasContext *dc)
> {
> -TCGv t, *addr;
> +TCGv t, v, *addr;
> unsigned int size, rev = 0, ex = 0;
> +TCGMemOp mop;
>
> -size = 1 << (dc->opcode & 3);
> -
> +mop = dc->opcode & 3;
> +size = 1 << mop;
> if (!dc->type_b) {
> rev = (dc->ir >> 9) & 1;
> ex = (dc->ir >> 10) & 1;
> }
> +mop |= MO_TE;
> +if (rev) {
> +mop ^= MO_BSWAP;
> +}
>
> if (size > 4 && (dc->tb_flags & MSR_EE_FLAG)
>&& (dc->env->pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)) {
> @@ -1044,40 +1011,30 @@ static void dec_load(DisasContext *dc)
> sync_jmpstate(dc);
>
> /* Verify alignment if needed. */
> -if ((dc->env->pvr.regs[2] & PVR2_UNALIGNED_EXC_MASK) && size > 1) {
> -TCGv v = tcg_temp_new();
> -
> -/*
> - * Microblaze gives MMU faults priority over faults due to
> - * unaligned addresses. That's why we speculatively do the load
> - * into v. If the load succeeds, we verify alignment of the
> - * address and if that succeeds we write into the destination reg.
> - */
> -gen_load(dc, v, *addr, size, ex);
> +/*
> + * Microblaze gives MMU faults priority over faults due to
> + * unaligned addresses. That's why we speculatively do the load
> + * into v. If the load succeeds, we verify alignment of the
> + * address and if that succeeds we write into the destination reg.
> + */
> +v = tcg_temp_new();
> +tcg_gen_qemu_ld_tl(v, *addr, cpu_mmu_index(dc->env), mop);
>
> +if ((dc->env->pvr.regs[2] & PVR2_UNALIGNED_EXC_MASK) && size > 1) {
> tcg_gen_movi_tl(cpu_SR[SR_PC], dc->pc);
> gen_helper_memalign(cpu_env, *addr, tcg_const_tl(dc->rd),
> tcg_const_tl(0), tcg_const_tl(size - 1));
> -if (dc->rd) {
> -if (rev) {
> -dec_byteswap(dc, cpu_R[dc->rd], v, size);
> -} else {
> -tcg_gen_mov_tl(cpu_R[dc->rd], v);
> -}
> -}
> -tcg_temp_free(v);
> -} else {
> -if (dc->rd) {
> -gen_load(dc, cpu_R[dc->rd], *addr, size, ex);
> -if (rev) {
> -dec_byteswap(dc, cpu_R[dc->rd], cpu_R[dc->rd], size);
> -}
> -} else {
> -/* We are loading into r0, no need to reverse. */
> -gen_load(dc, env_imm, *addr, size, ex);
> -}
> }
>
> +if (ex) {
> +tcg_gen_mov_tl(env_res_addr, *addr);
> +tcg_gen_mov_tl(env_res_val, v);
> +}
> +if (dc->rd) {
> +tcg_gen_mov_tl(cpu_R[dc->rd], v);
> +}
> +tcg_temp_free(v);
> +
> if (ex) { /* lwx */
> /* no support for for AXI exclusive so always clear C */
> writ
Re: [Qemu-devel] [PATCH v11 3/5] hw/intc: add allwinner A10 interrupt controller
Peter Maydell wrote:
On 11 December 2013 08:08, liguang wrote:
+static void aw_a10_pic_set_irq(void *opaque, int irq, int level)
+{
+AwA10PICState *s = opaque;
+
+if (level) {
+set_bit(irq%32, (void *)&s->irq_pending[irq/32]);
The % and / operators here should have spaces round them.
+}
+aw_a10_pic_update(s);
+}
+
+static uint64_t aw_a10_pic_read(void *opaque, hwaddr offset, unsigned size)
+{
+AwA10PICState *s = opaque;
+uint8_t index = (offset& 0xc)/4;
Spaces.
will fix,
thanks!
Otherwise
Reviewed-by: Peter Maydell
-- PMM
Re: [Qemu-devel] [PATCH v11 1/5] vmstate: add VMSTATE_PTIMER_ARRAY
Peter Maydell wrote:
On 11 December 2013 08:08, liguang wrote:
+static int get_ptimer(QEMUFile *f, void *pv, size_t size)
+{
+ptimer_state *v = pv;
+uint64_t count;
+
+count = qemu_get_be64(f);
+if (count != -1) {
+ptimer_set_count(v, count);
+} else {
+ptimer_stop(v);
+}
+
+return 0;
+}
+
+static void put_ptimer(QEMUFile *f, void *pv, size_t size)
+{
+ptimer_state *v = pv;
+uint64_t count;
+
+count = ptimer_get_count(v);
+qemu_put_be64(f, count);
+}
+
+const VMStateInfo vmstate_info_ptimer = {
+.name = "ptimer",
+.get = get_ptimer,
+.put = put_ptimer,
+};
Sorry, I led you a bit astray with my last review comment;
this is definitely wrong because it isn't saving and
restoring each ptimer_state according to the vmstate_ptimer
definition, it's only saving a single 64 bit count.
Doing this right isn't quite as obvious as I thought
because we haven't needed to do "array of pointers to
structures" yet, so there's a missing macro.
I've written a patch which does this correctly -- I'll
send it out shortly and you can add it to your patch
series in place of this one.
Ok, thanks!
Re: [Qemu-devel] [PATCH 09/18] softfloat: Fix Handling of Small Negatives in float64_to_uint64
On 9 December 2013 15:47, Tom Musta wrote: > The float64_to_uint64 routine exits early for all negative numbers. > While the integer result is always correctly returned as 0, the > exception flags are also always set to float_flag_invalid. This > is incorrect for those cases where a small negative number (-1 < x < 0) > rounds to zero. In such a case, the flag should be reported as > inexact. > -static int64 roundAndPackUint64(uint64_t absZ0, uint64_t absZ1 STATUS_PARAM) > +static int64 roundAndPackUint64(flag zSign, uint64_t absZ0, > +uint64_t absZ1 STATUS_PARAM) This function isn't in the copy of fpu/softfloat.c that's in master, unless I'm confused. Does this series depend on something else? thanks -- PMM
[Qemu-devel] [PATCH] target-sh4: Use new qemu_ld/st opcodes
Signed-off-by: Aurelien Jarno
---
target-sh4/translate.c | 167 ++--
1 file changed, 90 insertions(+), 77 deletions(-)
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 2272eb0..87f532a 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -464,7 +464,7 @@ static void _decode_opc(DisasContext * ctx)
{
TCGv addr = tcg_temp_new();
tcg_gen_addi_i32(addr, REG(B11_8), B3_0 * 4);
- tcg_gen_qemu_st32(REG(B7_4), addr, ctx->memidx);
+tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, MO_TEUL);
tcg_temp_free(addr);
}
return;
@@ -472,7 +472,7 @@ static void _decode_opc(DisasContext * ctx)
{
TCGv addr = tcg_temp_new();
tcg_gen_addi_i32(addr, REG(B7_4), B3_0 * 4);
- tcg_gen_qemu_ld32s(REG(B11_8), addr, ctx->memidx);
+tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, MO_TESL);
tcg_temp_free(addr);
}
return;
@@ -482,14 +482,14 @@ static void _decode_opc(DisasContext * ctx)
case 0x9000: /* mov.w @(disp,PC),Rn */
{
TCGv addr = tcg_const_i32(ctx->pc + 4 + B7_0 * 2);
- tcg_gen_qemu_ld16s(REG(B11_8), addr, ctx->memidx);
+tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, MO_TESW);
tcg_temp_free(addr);
}
return;
case 0xd000: /* mov.l @(disp,PC),Rn */
{
TCGv addr = tcg_const_i32((ctx->pc + 4 + B7_0 * 4) & ~3);
- tcg_gen_qemu_ld32s(REG(B11_8), addr, ctx->memidx);
+tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, MO_TESL);
tcg_temp_free(addr);
}
return;
@@ -516,28 +516,29 @@ static void _decode_opc(DisasContext * ctx)
tcg_gen_mov_i32(REG(B11_8), REG(B7_4));
return;
case 0x2000: /* mov.b Rm,@Rn */
- tcg_gen_qemu_st8(REG(B7_4), REG(B11_8), ctx->memidx);
+tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, MO_UB);
return;
case 0x2001: /* mov.w Rm,@Rn */
- tcg_gen_qemu_st16(REG(B7_4), REG(B11_8), ctx->memidx);
+tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, MO_TEUW);
return;
case 0x2002: /* mov.l Rm,@Rn */
- tcg_gen_qemu_st32(REG(B7_4), REG(B11_8), ctx->memidx);
+tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, MO_TEUL);
return;
case 0x6000: /* mov.b @Rm,Rn */
- tcg_gen_qemu_ld8s(REG(B11_8), REG(B7_4), ctx->memidx);
+tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_SB);
return;
case 0x6001: /* mov.w @Rm,Rn */
- tcg_gen_qemu_ld16s(REG(B11_8), REG(B7_4), ctx->memidx);
+tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_TESW);
return;
case 0x6002: /* mov.l @Rm,Rn */
- tcg_gen_qemu_ld32s(REG(B11_8), REG(B7_4), ctx->memidx);
+tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_TESL);
return;
case 0x2004: /* mov.b Rm,@-Rn */
{
TCGv addr = tcg_temp_new();
tcg_gen_subi_i32(addr, REG(B11_8), 1);
- tcg_gen_qemu_st8(REG(B7_4), addr, ctx->memidx); /* might cause
re-execution */
+/* might cause re-execution */
+tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, MO_UB);
tcg_gen_mov_i32(REG(B11_8), addr); /* modify
register status */
tcg_temp_free(addr);
}
@@ -546,7 +547,7 @@ static void _decode_opc(DisasContext * ctx)
{
TCGv addr = tcg_temp_new();
tcg_gen_subi_i32(addr, REG(B11_8), 2);
- tcg_gen_qemu_st16(REG(B7_4), addr, ctx->memidx);
+tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, MO_TEUW);
tcg_gen_mov_i32(REG(B11_8), addr);
tcg_temp_free(addr);
}
@@ -555,22 +556,22 @@ static void _decode_opc(DisasContext * ctx)
{
TCGv addr = tcg_temp_new();
tcg_gen_subi_i32(addr, REG(B11_8), 4);
- tcg_gen_qemu_st32(REG(B7_4), addr, ctx->memidx);
+tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, MO_TEUL);
tcg_gen_mov_i32(REG(B11_8), addr);
}
return;
case 0x6004: /* mov.b @Rm+,Rn */
- tcg_gen_qemu_ld8s(REG(B11_8), REG(B7_4), ctx->memidx);
+tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_SB);
if ( B11_8 != B7_4 )
tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 1);
return;
case 0x6005: /* mov.w @Rm+,Rn */
- tcg_gen_qemu_ld16s(REG(B11_8), REG(B7_4), ctx->memidx);
+tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_TESW);
if ( B11_8 != B7_4 )
tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 2);
return;
case 0x6006
Re: [Qemu-devel] [PATCH v7 2/6] hw/arm/digic: prepare DIGIC-based boards support
On Fri, Dec 13, 2013 at 8:23 AM, Antony Pavlov wrote:
> Also this patch adds initial support for Canon
> PowerShot A1100 IS compact camera.
>
> Signed-off-by: Antony Pavlov
> ---
> hw/arm/Makefile.objs | 1 +
> hw/arm/digic_boards.c | 83
> +++
> 2 files changed, 84 insertions(+)
> create mode 100644 hw/arm/digic_boards.c
>
> diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
> index 8789807..d7d37f2 100644
> --- a/hw/arm/Makefile.objs
> +++ b/hw/arm/Makefile.objs
> @@ -1,4 +1,5 @@
> obj-y += boot.o collie.o exynos4_boards.o gumstix.o highbank.o
> +obj-$(CONFIG_DIGIC) += digic_boards.o
> obj-y += integratorcp.o kzm.o mainstone.o musicpal.o nseries.o
> obj-y += omap_sx1.o palm.o realview.o spitz.o stellaris.o
> obj-y += tosa.o versatilepb.o vexpress.o virt.o xilinx_zynq.o z2.o
> diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
> new file mode 100644
> index 000..20c8054
> --- /dev/null
> +++ b/hw/arm/digic_boards.c
> @@ -0,0 +1,83 @@
> +/*
> + * QEMU model of the Canon DIGIC boards (cameras indeed :).
> + *
> + * Copyright (C) 2013 Antony Pavlov
> + *
> + * This model is based on reverse engineering efforts
> + * made by CHDK (http://chdk.wikia.com) and
> + * Magic Lantern (http://www.magiclantern.fm) projects
> + * contributors.
> + *
> + * See docs here:
> + * http://magiclantern.wikia.com/wiki/Register_Map
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#include "hw/boards.h"
> +#include "exec/address-spaces.h"
> +#include "hw/arm/digic.h"
> +
> +typedef struct DigicBoardState {
> +DigicState *digic;
Probably a question for Andreas or Peter, but why the layer of
indirection? can't the digic SoC be embedded in the board much the
same way Devices embed in a SoC?
> +MemoryRegion ram;
> +} DigicBoardState;
> +
> +typedef struct DigicBoard {
> +hwaddr ram_size;
> +} DigicBoard;
> +
> +static void digic4_board_setup_ram(DigicBoardState *s, hwaddr ram_size)
> +{
> +memory_region_init_ram(&s->ram, NULL, "ram", ram_size);
> +memory_region_add_subregion(get_system_memory(), 0, &s->ram);
> +vmstate_register_ram_global(&s->ram);
> +}
> +
> +static void digic4_board_init(DigicBoard *board)
> +{
> +Error *err = NULL;
> +
> +DigicBoardState *s = g_new(DigicBoardState, 1);
> +
> +s->digic = DIGIC(object_new(TYPE_DIGIC));
Then this becomes an object_initialize.
> +object_property_set_bool(OBJECT(s->digic), true, "realized", &err);
> +if (err != NULL) {
> +fprintf(stderr, "Couldn't realize DIGIC SoC: %s\n",
> +error_get_pretty(err));
> +exit(1);
error_report().
Regards,
Peter
> +}
> +
> +digic4_board_setup_ram(s, board->ram_size);
> +}
> +
> +static DigicBoard digic4_board_canon_a1100 = {
> +.ram_size = 64 * 1024 * 1024,
> +};
> +
> +static void canon_a1100_init(QEMUMachineInitArgs *args)
> +{
> +digic4_board_init(&digic4_board_canon_a1100);
> +}
> +
> +static QEMUMachine canon_a1100 = {
> +.name = "canon-a1100",
> +.desc = "Canon PowerShot A1100 IS",
> +.init = &canon_a1100_init,
> +};
> +
> +static void digic_register_machines(void)
> +{
> +qemu_register_machine(&canon_a1100);
> +}
> +
> +machine_init(digic_register_machines)
> --
> 1.8.5
>
>
Re: [Qemu-devel] [PATCH v7 1/6] hw/arm: add very initial support for Canon DIGIC SoC
On Fri, Dec 13, 2013 at 8:23 AM, Antony Pavlov wrote:
> DIGIC is Canon Inc.'s name for a family of SoC
> for digital cameras and camcorders.
>
> There is no publicly available specification for
> DIGIC chips. All information about DIGIC chip
> internals is based on reverse engineering efforts
> made by CHDK (http://chdk.wikia.com) and
> Magic Lantern (http://www.magiclantern.fm) projects
> contributors.
>
> Signed-off-by: Antony Pavlov
> Reviewed-by: Andreas Färber
> Reviewed-by: Peter Maydell
Reviewed-by: Peter Crosthwaite
> ---
> default-configs/arm-softmmu.mak | 1 +
> hw/arm/Makefile.objs| 1 +
> hw/arm/digic.c | 71
> +
> include/hw/arm/digic.h | 35
> 4 files changed, 108 insertions(+)
> create mode 100644 hw/arm/digic.c
> create mode 100644 include/hw/arm/digic.h
>
> diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
> index e48f102..2135be3 100644
> --- a/default-configs/arm-softmmu.mak
> +++ b/default-configs/arm-softmmu.mak
> @@ -64,6 +64,7 @@ CONFIG_XILINX_SPIPS=y
>
> CONFIG_ARM11SCU=y
> CONFIG_A9SCU=y
> +CONFIG_DIGIC=y
> CONFIG_MARVELL_88W8618=y
> CONFIG_OMAP=y
> CONFIG_TSC210X=y
> diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
> index 78b5614..8789807 100644
> --- a/hw/arm/Makefile.objs
> +++ b/hw/arm/Makefile.objs
> @@ -4,4 +4,5 @@ obj-y += omap_sx1.o palm.o realview.o spitz.o stellaris.o
> obj-y += tosa.o versatilepb.o vexpress.o virt.o xilinx_zynq.o z2.o
>
> obj-y += armv7m.o exynos4210.o pxa2xx.o pxa2xx_gpio.o pxa2xx_pic.o
> +obj-$(CONFIG_DIGIC) += digic.o
> obj-y += omap1.o omap2.o strongarm.o
> diff --git a/hw/arm/digic.c b/hw/arm/digic.c
> new file mode 100644
> index 000..2620262
> --- /dev/null
> +++ b/hw/arm/digic.c
> @@ -0,0 +1,71 @@
> +/*
> + * QEMU model of the Canon DIGIC SoC.
> + *
> + * Copyright (C) 2013 Antony Pavlov
> + *
> + * This model is based on reverse engineering efforts
> + * made by CHDK (http://chdk.wikia.com) and
> + * Magic Lantern (http://www.magiclantern.fm) projects
> + * contributors.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#include "hw/arm/digic.h"
> +
> +static void digic_init(Object *obj)
> +{
> +DigicState *s = DIGIC(obj);
> +
> +object_initialize(&s->cpu, sizeof(s->cpu), "arm946-" TYPE_ARM_CPU);
> +object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
> +}
> +
> +static void digic_realize(DeviceState *dev, Error **errp)
> +{
> +DigicState *s = DIGIC(dev);
> +Error *err = NULL;
> +
> +object_property_set_bool(OBJECT(&s->cpu), true, "reset-hivecs", &err);
> +if (err != NULL) {
> +error_propagate(errp, err);
> +return;
> +}
> +
> +object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
> +if (err != NULL) {
> +error_propagate(errp, err);
> +return;
> +}
> +}
> +
> +static void digic_class_init(ObjectClass *oc, void *data)
> +{
> +DeviceClass *dc = DEVICE_CLASS(oc);
> +
> +dc->realize = digic_realize;
> +}
> +
> +static const TypeInfo digic_type_info = {
> +.name = TYPE_DIGIC,
> +.parent = TYPE_DEVICE,
> +.instance_size = sizeof(DigicState),
> +.instance_init = digic_init,
> +.class_init = digic_class_init,
> +};
> +
> +static void digic_register_types(void)
> +{
> +type_register_static(&digic_type_info);
> +}
> +
> +type_init(digic_register_types)
> diff --git a/include/hw/arm/digic.h b/include/hw/arm/digic.h
> new file mode 100644
> index 000..b7d16fb
> --- /dev/null
> +++ b/include/hw/arm/digic.h
> @@ -0,0 +1,35 @@
> +/*
> + * Misc Canon DIGIC declarations.
> + *
> + * Copyright (C) 2013 Antony Pavlov
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#ifndef HW_ARM_DIGIC_H
> +#define HW_ARM_DIGIC_H
> +
> +#include "cpu.h"
> +
> +#define TYPE_DIGIC "digic"
> +
> +#define DIGIC(obj) OBJECT_CHECK(DigicState, (obj), TYPE_DIGIC)
> +
> +typedef struct DigicState {
> +/*<
Re: [Qemu-devel] [PATCH v7 5/6] hw/arm/digic: add NOR ROM support
On Fri, Dec 13, 2013 at 8:23 AM, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov
> ---
> hw/arm/digic_boards.c | 70
> +++
> 1 file changed, 70 insertions(+)
>
> diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
> index 20c8054..ad62c7e 100644
> --- a/hw/arm/digic_boards.c
> +++ b/hw/arm/digic_boards.c
> @@ -26,6 +26,13 @@
> #include "hw/boards.h"
> #include "exec/address-spaces.h"
> #include "hw/arm/digic.h"
> +#include "hw/block/flash.h"
> +#include "hw/loader.h"
> +#include "sysemu/sysemu.h"
> +
> +#define DIGIC4_ROM0_BASE 0xf000
> +#define DIGIC4_ROM1_BASE 0xf800
> +#define DIGIC4_ROM_MAX_SIZE 0x0800
>
> typedef struct DigicBoardState {
> DigicState *digic;
> @@ -34,6 +41,10 @@ typedef struct DigicBoardState {
>
> typedef struct DigicBoard {
> hwaddr ram_size;
> +void (*add_rom0)(DigicBoardState *, hwaddr, const char *);
> +const char *rom0_def_filename;
> +void (*add_rom1)(DigicBoardState *, hwaddr, const char *);
> +const char *rom1_def_filename;
> } DigicBoard;
>
> static void digic4_board_setup_ram(DigicBoardState *s, hwaddr ram_size)
> @@ -58,10 +69,69 @@ static void digic4_board_init(DigicBoard *board)
> }
>
> digic4_board_setup_ram(s, board->ram_size);
> +
> +if (board->add_rom0) {
> +board->add_rom0(s, DIGIC4_ROM0_BASE, board->rom0_def_filename);
> +}
> +
> +if (board->add_rom1) {
> +board->add_rom1(s, DIGIC4_ROM1_BASE, board->rom1_def_filename);
> +}
> +}
> +
> +static void digic_load_rom(DigicBoardState *s, hwaddr addr,
> + hwaddr max_size, const char *def_filename)
> +{
> +target_long rom_size;
> +const char *filename;
> +
> +if (bios_name) {
> +filename = bios_name;
> +} else {
> +filename = def_filename;
> +}
> +
> +if (filename) {
> +char *fn = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename);
> +
> +if (!fn) {
> +fprintf(stderr, "Couldn't find rom image '%s'.\n", filename);
Should this be error_report()?
Regards,
Peter
> +exit(1);
> +}
> +
> +rom_size = load_image_targphys(fn, addr, max_size);
> +if (rom_size < 0 || rom_size > max_size) {
> +fprintf(stderr, "Couldn't load rom image '%s'\n", filename);
> +exit(1);
> +}
> +}
> +}
> +
> +/*
> + * Samsung K8P3215UQB
> + * 64M Bit (4Mx16) Page Mode / Multi-Bank NOR Flash Memory
> + */
> +static void digic4_add_k8p3215uqb_rom(DigicBoardState *s, hwaddr addr,
> + const char *def_filename)
> +{
> +#define FLASH_K8P3215UQB_SIZE (4 * 1024 * 1024)
> +#define FLASH_K8P3215UQB_SECTOR_SIZE (64 * 1024)
> +
> +pflash_cfi02_register(addr, NULL, "pflash", FLASH_K8P3215UQB_SIZE,
> + NULL, FLASH_K8P3215UQB_SECTOR_SIZE,
> + FLASH_K8P3215UQB_SIZE /
> FLASH_K8P3215UQB_SECTOR_SIZE,
> + DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE,
> + 4,
> + 0x00EC, 0x007E, 0x0003, 0x0001,
> + 0x0555, 0x2aa, 0);
> +
> +digic_load_rom(s, addr, FLASH_K8P3215UQB_SIZE, def_filename);
> }
>
> static DigicBoard digic4_board_canon_a1100 = {
> .ram_size = 64 * 1024 * 1024,
> +.add_rom1 = digic4_add_k8p3215uqb_rom,
> +.rom1_def_filename = "canon-a1100-rom1.bin",
> };
>
> static void canon_a1100_init(QEMUMachineInitArgs *args)
> --
> 1.8.5
>
>
Re: [Qemu-devel] [PATCH v7 4/6] hw/arm/digic: add UART support
On Fri, Dec 13, 2013 at 8:23 AM, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov
> Reviewed-by: Peter Maydell
Reveiwed-by: Peter Crosthwaite
> ---
> hw/arm/digic.c | 16
> hw/char/Makefile.objs | 1 +
> hw/char/digic-uart.c | 195
> +
> hw/char/digic-uart.h | 45
> include/hw/arm/digic.h | 2 +
> 5 files changed, 259 insertions(+)
> create mode 100644 hw/char/digic-uart.c
> create mode 100644 hw/char/digic-uart.h
>
> diff --git a/hw/arm/digic.c b/hw/arm/digic.c
> index e8eb0de..ec8c330 100644
> --- a/hw/arm/digic.c
> +++ b/hw/arm/digic.c
> @@ -24,6 +24,8 @@
>
> #define DIGIC4_TIMER_BASE(n)(0xc021 + (n) * 0x100)
>
> +#define DIGIC_UART_BASE 0xc080
> +
> static void digic_init(Object *obj)
> {
> DigicState *s = DIGIC(obj);
> @@ -43,6 +45,11 @@ static void digic_init(Object *obj)
> snprintf(name, DIGIC_TIMER_NAME_MLEN, "timer[%d]", i);
> object_property_add_child(obj, name, OBJECT(&s->timer[i]), NULL);
> }
> +
> +object_initialize(&s->uart, sizeof(s->uart), TYPE_DIGIC_UART);
> +dev = DEVICE(&s->uart);
> +qdev_set_parent_bus(dev, sysbus_get_default());
> +object_property_add_child(obj, "uart", OBJECT(&s->uart), NULL);
> }
>
> static void digic_realize(DeviceState *dev, Error **errp)
> @@ -74,6 +81,15 @@ static void digic_realize(DeviceState *dev, Error **errp)
> sbd = SYS_BUS_DEVICE(&s->timer[i]);
> sysbus_mmio_map(sbd, 0, DIGIC4_TIMER_BASE(i));
> }
> +
> +object_property_set_bool(OBJECT(&s->uart), true, "realized", &err);
> +if (err != NULL) {
> +error_propagate(errp, err);
> +return;
> +}
> +
> +sbd = SYS_BUS_DEVICE(&s->uart);
> +sysbus_mmio_map(sbd, 0, DIGIC_UART_BASE);
> }
>
> static void digic_class_init(ObjectClass *oc, void *data)
> diff --git a/hw/char/Makefile.objs b/hw/char/Makefile.objs
> index cbd6a00..be2a7d9 100644
> --- a/hw/char/Makefile.objs
> +++ b/hw/char/Makefile.objs
> @@ -14,6 +14,7 @@ obj-$(CONFIG_COLDFIRE) += mcf_uart.o
> obj-$(CONFIG_OMAP) += omap_uart.o
> obj-$(CONFIG_SH4) += sh_serial.o
> obj-$(CONFIG_PSERIES) += spapr_vty.o
> +obj-$(CONFIG_DIGIC) += digic-uart.o
>
> common-obj-$(CONFIG_ETRAXFS) += etraxfs_ser.o
> common-obj-$(CONFIG_ISA_DEBUG) += debugcon.o
> diff --git a/hw/char/digic-uart.c b/hw/char/digic-uart.c
> new file mode 100644
> index 000..fd8e077
> --- /dev/null
> +++ b/hw/char/digic-uart.c
> @@ -0,0 +1,195 @@
> +/*
> + * QEMU model of the Canon DIGIC UART block.
> + *
> + * Copyright (C) 2013 Antony Pavlov
> + *
> + * This model is based on reverse engineering efforts
> + * made by CHDK (http://chdk.wikia.com) and
> + * Magic Lantern (http://www.magiclantern.fm) projects
> + * contributors.
> + *
> + * See "Serial terminal" docs here:
> + * http://magiclantern.wikia.com/wiki/Register_Map#Misc_Registers
> + *
> + * The QEMU model of the Milkymist UART block by Michael Walle
> + * is used as a template.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#include "hw/hw.h"
> +#include "hw/sysbus.h"
> +#include "sysemu/char.h"
> +
> +#include "hw/char/digic-uart.h"
> +
> +enum {
> +ST_RX_RDY = (1 << 0),
> +ST_TX_RDY = (1 << 1),
> +};
> +
> +static uint64_t digic_uart_read(void *opaque, hwaddr addr,
> +unsigned size)
> +{
> +DigicUartState *s = opaque;
> +uint64_t ret = 0;
> +
> +addr >>= 2;
> +
> +switch (addr) {
> +case R_RX:
> +s->reg_st &= ~(ST_RX_RDY);
> +ret = s->reg_rx;
> +break;
> +
> +case R_ST:
> +ret = s->reg_st;
> +break;
> +
> +default:
> +qemu_log_mask(LOG_UNIMP,
> + "digic-uart: read access to unknown register 0x"
> + TARGET_FMT_plx, addr << 2);
> +}
> +
> +return ret;
> +}
> +
> +static void digic_uart_write(void *opaque, hwaddr addr, uint64_t value,
> + unsigned size)
> +{
> +DigicUartState *s = opaque;
> +unsigned char ch = value;
> +
> +addr >>= 2;
> +
> +switch (addr) {
> +case R_TX:
> +if (s->chr) {
> +qemu_chr_fe_write_all(s->chr, &ch, 1);
> +}
> +break;
> +
> +case R_ST:
> +/*
> + * Ignore write to R_ST.
> + *
> + * The point is that this register is actively used
> + * during receiving and transmitting symbols,
> + * but we d
Re: [Qemu-devel] [PATCH v7 3/6] hw/arm/digic: add timer support
On Fri, Dec 13, 2013 at 8:23 AM, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov
> Reviewed-by: Peter Maydell
> ---
> hw/arm/digic.c | 28 ++
> hw/timer/Makefile.objs | 1 +
> hw/timer/digic-timer.c | 140
> +
> hw/timer/digic-timer.h | 36 +
> include/hw/arm/digic.h | 6 +++
> 5 files changed, 211 insertions(+)
> create mode 100644 hw/timer/digic-timer.c
> create mode 100644 hw/timer/digic-timer.h
>
> diff --git a/hw/arm/digic.c b/hw/arm/digic.c
> index 2620262..e8eb0de 100644
> --- a/hw/arm/digic.c
> +++ b/hw/arm/digic.c
> @@ -22,18 +22,35 @@
>
> #include "hw/arm/digic.h"
>
> +#define DIGIC4_TIMER_BASE(n)(0xc021 + (n) * 0x100)
> +
> static void digic_init(Object *obj)
> {
> DigicState *s = DIGIC(obj);
> +DeviceState *dev;
> +int i;
>
> object_initialize(&s->cpu, sizeof(s->cpu), "arm946-" TYPE_ARM_CPU);
> object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
> +
> +for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
> +#define DIGIC_TIMER_NAME_MLEN11
> +char name[DIGIC_TIMER_NAME_MLEN];
> +
> +object_initialize(&s->timer[i], sizeof(s->timer[i]),
> TYPE_DIGIC_TIMER);
> +dev = DEVICE(&s->timer[i]);
> +qdev_set_parent_bus(dev, sysbus_get_default());
> +snprintf(name, DIGIC_TIMER_NAME_MLEN, "timer[%d]", i);
> +object_property_add_child(obj, name, OBJECT(&s->timer[i]), NULL);
> +}
> }
>
> static void digic_realize(DeviceState *dev, Error **errp)
> {
> DigicState *s = DIGIC(dev);
> Error *err = NULL;
> +SysBusDevice *sbd;
> +int i;
>
> object_property_set_bool(OBJECT(&s->cpu), true, "reset-hivecs", &err);
> if (err != NULL) {
> @@ -46,6 +63,17 @@ static void digic_realize(DeviceState *dev, Error **errp)
> error_propagate(errp, err);
> return;
> }
> +
> +for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
> +object_property_set_bool(OBJECT(&s->timer[i]), true, "realized",
> &err);
> +if (err != NULL) {
> +error_propagate(errp, err);
> +return;
> +}
> +
> +sbd = SYS_BUS_DEVICE(&s->timer[i]);
> +sysbus_mmio_map(sbd, 0, DIGIC4_TIMER_BASE(i));
> +}
> }
>
> static void digic_class_init(ObjectClass *oc, void *data)
> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
> index 3ae091c..ea9f11f 100644
> --- a/hw/timer/Makefile.objs
> +++ b/hw/timer/Makefile.objs
> @@ -26,5 +26,6 @@ obj-$(CONFIG_OMAP) += omap_synctimer.o
> obj-$(CONFIG_PXA2XX) += pxa2xx_timer.o
> obj-$(CONFIG_SH4) += sh_timer.o
> obj-$(CONFIG_TUSB6010) += tusb6010.o
> +obj-$(CONFIG_DIGIC) += digic-timer.o
>
> obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
> diff --git a/hw/timer/digic-timer.c b/hw/timer/digic-timer.c
> new file mode 100644
> index 000..974e588
> --- /dev/null
> +++ b/hw/timer/digic-timer.c
> @@ -0,0 +1,140 @@
> +/*
> + * QEMU model of the Canon DIGIC timer block.
> + *
> + * Copyright (C) 2013 Antony Pavlov
> + *
> + * This model is based on reverse engineering efforts
> + * made by CHDK (http://chdk.wikia.com) and
> + * Magic Lantern (http://www.magiclantern.fm) projects
> + * contributors.
> + *
> + * See "Timer/Clock Module" docs here:
> + * http://magiclantern.wikia.com/wiki/Register_Map
> + *
> + * The QEMU model of the OSTimer in PKUnity SoC by Guan Xuetao
> + * is used as a template.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#include "hw/sysbus.h"
> +#include "hw/ptimer.h"
> +#include "qemu/main-loop.h"
> +
> +#include "hw/timer/digic-timer.h"
> +
> +#define DIGIC_TIMER_CONTROL 0x00
> +#define DIGIC_TIMER_VALUE 0x0c
> +
> +static const VMStateDescription vmstate_digic_timer = {
> +.name = "digic.timer",
> +.version_id = 1,
> +.minimum_version_id = 1,
> +.minimum_version_id_old = 1,
> +.fields = (VMStateField[]) {
> +VMSTATE_PTIMER(ptimer, DigicTimerState),
> +VMSTATE_END_OF_LIST()
> +}
> +};
> +
> +static uint64_t digic_timer_read(void *opaque, hwaddr offset, unsigned size)
> +{
> +DigicTimerState *s = opaque;
> +uint32_t ret = 0;
> +
> +switch (offset) {
> +case DIGIC_TIMER_VALUE:
> +ret = (uint32_t)ptimer_get_count(s->ptimer);
> +ret &= 0x;
> +break;
> +default:
> +qemu_log_mask(LOG_UNIMP,
> + "digic-timer: read access to unknown register 0x"
> + TARGET_FMT_plx, offset);
> +}
[Qemu-devel] [PATCH v7 6/6] MAINTAINERS: Document 'Canon DIGIC' machine
Signed-off-by: Antony Pavlov --- MAINTAINERS | 6 ++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 7eed206..02ad9fb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -233,6 +233,12 @@ S: Supported F: hw/arm/highbank.c F: hw/net/xgmac.c +Canon DIGIC +M: Antony Pavlov +S: Maintained +F: include/hw/arm/digic.h +F: hw/*/digic* + Gumstix M: qemu-devel@nongnu.org S: Orphan -- 1.8.5
[Qemu-devel] [PATCH v7 5/6] hw/arm/digic: add NOR ROM support
Signed-off-by: Antony Pavlov
---
hw/arm/digic_boards.c | 70 +++
1 file changed, 70 insertions(+)
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 20c8054..ad62c7e 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -26,6 +26,13 @@
#include "hw/boards.h"
#include "exec/address-spaces.h"
#include "hw/arm/digic.h"
+#include "hw/block/flash.h"
+#include "hw/loader.h"
+#include "sysemu/sysemu.h"
+
+#define DIGIC4_ROM0_BASE 0xf000
+#define DIGIC4_ROM1_BASE 0xf800
+#define DIGIC4_ROM_MAX_SIZE 0x0800
typedef struct DigicBoardState {
DigicState *digic;
@@ -34,6 +41,10 @@ typedef struct DigicBoardState {
typedef struct DigicBoard {
hwaddr ram_size;
+void (*add_rom0)(DigicBoardState *, hwaddr, const char *);
+const char *rom0_def_filename;
+void (*add_rom1)(DigicBoardState *, hwaddr, const char *);
+const char *rom1_def_filename;
} DigicBoard;
static void digic4_board_setup_ram(DigicBoardState *s, hwaddr ram_size)
@@ -58,10 +69,69 @@ static void digic4_board_init(DigicBoard *board)
}
digic4_board_setup_ram(s, board->ram_size);
+
+if (board->add_rom0) {
+board->add_rom0(s, DIGIC4_ROM0_BASE, board->rom0_def_filename);
+}
+
+if (board->add_rom1) {
+board->add_rom1(s, DIGIC4_ROM1_BASE, board->rom1_def_filename);
+}
+}
+
+static void digic_load_rom(DigicBoardState *s, hwaddr addr,
+ hwaddr max_size, const char *def_filename)
+{
+target_long rom_size;
+const char *filename;
+
+if (bios_name) {
+filename = bios_name;
+} else {
+filename = def_filename;
+}
+
+if (filename) {
+char *fn = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename);
+
+if (!fn) {
+fprintf(stderr, "Couldn't find rom image '%s'.\n", filename);
+exit(1);
+}
+
+rom_size = load_image_targphys(fn, addr, max_size);
+if (rom_size < 0 || rom_size > max_size) {
+fprintf(stderr, "Couldn't load rom image '%s'\n", filename);
+exit(1);
+}
+}
+}
+
+/*
+ * Samsung K8P3215UQB
+ * 64M Bit (4Mx16) Page Mode / Multi-Bank NOR Flash Memory
+ */
+static void digic4_add_k8p3215uqb_rom(DigicBoardState *s, hwaddr addr,
+ const char *def_filename)
+{
+#define FLASH_K8P3215UQB_SIZE (4 * 1024 * 1024)
+#define FLASH_K8P3215UQB_SECTOR_SIZE (64 * 1024)
+
+pflash_cfi02_register(addr, NULL, "pflash", FLASH_K8P3215UQB_SIZE,
+ NULL, FLASH_K8P3215UQB_SECTOR_SIZE,
+ FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_SIZE,
+ DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE,
+ 4,
+ 0x00EC, 0x007E, 0x0003, 0x0001,
+ 0x0555, 0x2aa, 0);
+
+digic_load_rom(s, addr, FLASH_K8P3215UQB_SIZE, def_filename);
}
static DigicBoard digic4_board_canon_a1100 = {
.ram_size = 64 * 1024 * 1024,
+.add_rom1 = digic4_add_k8p3215uqb_rom,
+.rom1_def_filename = "canon-a1100-rom1.bin",
};
static void canon_a1100_init(QEMUMachineInitArgs *args)
--
1.8.5
Re: [Qemu-devel] [PATCH] block: Fix relative backing file path checking
On 12/09/2013 11:42 PM, Xu Wang wrote: > This patch is made for Bug #1257334 (diffuse handling of image > creation from another path). The cause of it is user could create > image even though the backing file doesn't exist. Becase backing s/Becase/, because/ > file checking in the bdrv_img_create() is from the user's current > path instead of relative path to the image to be created. This patch > makes qemu check backing file according to the relative path to the > image to be created. Hence if relative backing file path doesn't > exist, the backing file checking will fail now. > > Test case: > Reproduce process (from bug page): > 1. $mkdir a/ > 2. $qemu-img create -f qcow2 a/blob.img 10G > 3. $qemu-img create -f qcow2 -b a/blob.img a/ovl.img >Here the actual backing file of ovl.img is a/a/blob.img. But >the backing file checking will check from the user's current >path and find a/blob.img successfully. But the path saved in >the ovl.img is a/a/blob.img. Bug occurred. > > After patched: > The step 3 above an error message will be thrown because backing > file checking started after got the full path of backing file > intead of relative path. s/intead/instead/ > > Signed-off-by: Xu Wang > --- > block.c | 17 +++-- > 1 file changed, 15 insertions(+), 2 deletions(-) > > diff --git a/block.c b/block.c > index 13f001a..20d2b66 100644 > --- a/block.c > +++ b/block.c > @@ -4790,18 +4790,31 @@ void bdrv_img_create(const char *filename, const char > *fmt, > uint64_t size; > char buf[32]; > int back_flags; > +char backing_filename_full[PATH_MAX]; I hate code that uses PATH_MAX as an array size. It is not portable to systems like GNU Hurd. But qemu doesn't compile on GNU Hurd, and you're not the first user of this construct in the codebase (so the problem already exists and should be independently cleaned up). So I won't let it hold up your patch. > +error_setg_errno(errp, -ret, "Backing file '%s'" > + "(actual path is '%s') error: %s", Outputs "Backing file 'foo'(actual path...", which looks bad. You need a space in the error message either before or after the line break. The rest of the patch looks okay. -- Eric Blake eblake redhat com+1-919-301-3266 Libvirt virtualization library http://libvirt.org signature.asc Description: OpenPGP digital signature
Re: [Qemu-devel] [PULL v3 00/12] target-lm32 updates
Hi Anthony, Am Donnerstag, 28. November 2013, 19:43:10 schrieben Sie: > Hi Anthony, > > This is a pull for various updates and fixes for the LatticeMico32 target. > > Please pull. > > changes since v2: > - rebased > - replaced ifdef HOST_WORDS_BIGENDIAN with be16_to_cpu() in >"milkymist-vgafb: swap pixel data in source buffer" > - bumped "target-lm32: move model features to LM32CPU" to v2 patch >with minor fixes found by Andreas Faerber > - new patch "hw/lm32: print error if cpu model is not found" > > changes since v1: > - rebased > - dropped patch "target-lm32: register helper functions". This is >no longer needed. > - added patch "target-lm32: stop VM on illegal or unknown >instruction". >Was posted as request for comments before. But since there were no >comments, include it here. ping :) -michael
Re: [Qemu-devel] [PATCH] target-lm32: Use new qemu_ld/st opcodes
Hi Richard, Am Samstag, 7. Dezember 2013, 03:03:21 schrieb Richard Henderson: > Cc: Michael Walle > Signed-off-by: Richard Henderson > --- > target-lm32/translate.c | 16 > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/target-lm32/translate.c b/target-lm32/translate.c > index 6ea0ecd..3d2f2e8 100644 > --- a/target-lm32/translate.c > +++ b/target-lm32/translate.c > @@ -441,7 +441,7 @@ static void dec_lb(DisasContext *dc) > > t0 = tcg_temp_new(); > tcg_gen_addi_tl(t0, cpu_R[dc->r0], sign_extend(dc->imm16, 16)); > -tcg_gen_qemu_ld8s(cpu_R[dc->r1], t0, MEM_INDEX); > +tcg_gen_qemu_ld_tl(cpu_R[dc->r1], t0, MEM_INDEX, MO_SB); > tcg_temp_free(t0); > } > > @@ -453,7 +453,7 @@ static void dec_lbu(DisasContext *dc) > > t0 = tcg_temp_new(); > tcg_gen_addi_tl(t0, cpu_R[dc->r0], sign_extend(dc->imm16, 16)); > -tcg_gen_qemu_ld8u(cpu_R[dc->r1], t0, MEM_INDEX); > +tcg_gen_qemu_ld_tl(cpu_R[dc->r1], t0, MEM_INDEX, MO_UB); > tcg_temp_free(t0); > } > > @@ -465,7 +465,7 @@ static void dec_lh(DisasContext *dc) > > t0 = tcg_temp_new(); > tcg_gen_addi_tl(t0, cpu_R[dc->r0], sign_extend(dc->imm16, 16)); > -tcg_gen_qemu_ld16s(cpu_R[dc->r1], t0, MEM_INDEX); > +tcg_gen_qemu_ld_tl(cpu_R[dc->r1], t0, MEM_INDEX, MO_TESW); > tcg_temp_free(t0); > } > > @@ -477,7 +477,7 @@ static void dec_lhu(DisasContext *dc) > > t0 = tcg_temp_new(); > tcg_gen_addi_tl(t0, cpu_R[dc->r0], sign_extend(dc->imm16, 16)); > -tcg_gen_qemu_ld16u(cpu_R[dc->r1], t0, MEM_INDEX); > +tcg_gen_qemu_ld_tl(cpu_R[dc->r1], t0, MEM_INDEX, MO_TEUW); > tcg_temp_free(t0); > } > > @@ -489,7 +489,7 @@ static void dec_lw(DisasContext *dc) > > t0 = tcg_temp_new(); > tcg_gen_addi_tl(t0, cpu_R[dc->r0], sign_extend(dc->imm16, 16)); > -tcg_gen_qemu_ld32s(cpu_R[dc->r1], t0, MEM_INDEX); > +tcg_gen_qemu_ld_tl(cpu_R[dc->r1], t0, MEM_INDEX, MO_TEUL); shouldn't this be MO_TESL? > tcg_temp_free(t0); > } > > @@ -663,7 +663,7 @@ static void dec_sb(DisasContext *dc) > > t0 = tcg_temp_new(); > tcg_gen_addi_tl(t0, cpu_R[dc->r0], sign_extend(dc->imm16, 16)); > -tcg_gen_qemu_st8(cpu_R[dc->r1], t0, MEM_INDEX); > +tcg_gen_qemu_st_tl(cpu_R[dc->r1], t0, MEM_INDEX, MO_UB); > tcg_temp_free(t0); > } > > @@ -697,7 +697,7 @@ static void dec_sh(DisasContext *dc) > > t0 = tcg_temp_new(); > tcg_gen_addi_tl(t0, cpu_R[dc->r0], sign_extend(dc->imm16, 16)); > -tcg_gen_qemu_st16(cpu_R[dc->r1], t0, MEM_INDEX); > +tcg_gen_qemu_st_tl(cpu_R[dc->r1], t0, MEM_INDEX, MO_TEUW); > tcg_temp_free(t0); > } > > @@ -794,7 +794,7 @@ static void dec_sw(DisasContext *dc) > > t0 = tcg_temp_new(); > tcg_gen_addi_tl(t0, cpu_R[dc->r0], sign_extend(dc->imm16, 16)); > -tcg_gen_qemu_st32(cpu_R[dc->r1], t0, MEM_INDEX); > +tcg_gen_qemu_st_tl(cpu_R[dc->r1], t0, MEM_INDEX, MO_TEUL); > tcg_temp_free(t0); > } -michael
[Qemu-devel] [PATCH v7 4/6] hw/arm/digic: add UART support
Signed-off-by: Antony Pavlov
Reviewed-by: Peter Maydell
---
hw/arm/digic.c | 16
hw/char/Makefile.objs | 1 +
hw/char/digic-uart.c | 195 +
hw/char/digic-uart.h | 45
include/hw/arm/digic.h | 2 +
5 files changed, 259 insertions(+)
create mode 100644 hw/char/digic-uart.c
create mode 100644 hw/char/digic-uart.h
diff --git a/hw/arm/digic.c b/hw/arm/digic.c
index e8eb0de..ec8c330 100644
--- a/hw/arm/digic.c
+++ b/hw/arm/digic.c
@@ -24,6 +24,8 @@
#define DIGIC4_TIMER_BASE(n)(0xc021 + (n) * 0x100)
+#define DIGIC_UART_BASE 0xc080
+
static void digic_init(Object *obj)
{
DigicState *s = DIGIC(obj);
@@ -43,6 +45,11 @@ static void digic_init(Object *obj)
snprintf(name, DIGIC_TIMER_NAME_MLEN, "timer[%d]", i);
object_property_add_child(obj, name, OBJECT(&s->timer[i]), NULL);
}
+
+object_initialize(&s->uart, sizeof(s->uart), TYPE_DIGIC_UART);
+dev = DEVICE(&s->uart);
+qdev_set_parent_bus(dev, sysbus_get_default());
+object_property_add_child(obj, "uart", OBJECT(&s->uart), NULL);
}
static void digic_realize(DeviceState *dev, Error **errp)
@@ -74,6 +81,15 @@ static void digic_realize(DeviceState *dev, Error **errp)
sbd = SYS_BUS_DEVICE(&s->timer[i]);
sysbus_mmio_map(sbd, 0, DIGIC4_TIMER_BASE(i));
}
+
+object_property_set_bool(OBJECT(&s->uart), true, "realized", &err);
+if (err != NULL) {
+error_propagate(errp, err);
+return;
+}
+
+sbd = SYS_BUS_DEVICE(&s->uart);
+sysbus_mmio_map(sbd, 0, DIGIC_UART_BASE);
}
static void digic_class_init(ObjectClass *oc, void *data)
diff --git a/hw/char/Makefile.objs b/hw/char/Makefile.objs
index cbd6a00..be2a7d9 100644
--- a/hw/char/Makefile.objs
+++ b/hw/char/Makefile.objs
@@ -14,6 +14,7 @@ obj-$(CONFIG_COLDFIRE) += mcf_uart.o
obj-$(CONFIG_OMAP) += omap_uart.o
obj-$(CONFIG_SH4) += sh_serial.o
obj-$(CONFIG_PSERIES) += spapr_vty.o
+obj-$(CONFIG_DIGIC) += digic-uart.o
common-obj-$(CONFIG_ETRAXFS) += etraxfs_ser.o
common-obj-$(CONFIG_ISA_DEBUG) += debugcon.o
diff --git a/hw/char/digic-uart.c b/hw/char/digic-uart.c
new file mode 100644
index 000..fd8e077
--- /dev/null
+++ b/hw/char/digic-uart.c
@@ -0,0 +1,195 @@
+/*
+ * QEMU model of the Canon DIGIC UART block.
+ *
+ * Copyright (C) 2013 Antony Pavlov
+ *
+ * This model is based on reverse engineering efforts
+ * made by CHDK (http://chdk.wikia.com) and
+ * Magic Lantern (http://www.magiclantern.fm) projects
+ * contributors.
+ *
+ * See "Serial terminal" docs here:
+ * http://magiclantern.wikia.com/wiki/Register_Map#Misc_Registers
+ *
+ * The QEMU model of the Milkymist UART block by Michael Walle
+ * is used as a template.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "hw/hw.h"
+#include "hw/sysbus.h"
+#include "sysemu/char.h"
+
+#include "hw/char/digic-uart.h"
+
+enum {
+ST_RX_RDY = (1 << 0),
+ST_TX_RDY = (1 << 1),
+};
+
+static uint64_t digic_uart_read(void *opaque, hwaddr addr,
+unsigned size)
+{
+DigicUartState *s = opaque;
+uint64_t ret = 0;
+
+addr >>= 2;
+
+switch (addr) {
+case R_RX:
+s->reg_st &= ~(ST_RX_RDY);
+ret = s->reg_rx;
+break;
+
+case R_ST:
+ret = s->reg_st;
+break;
+
+default:
+qemu_log_mask(LOG_UNIMP,
+ "digic-uart: read access to unknown register 0x"
+ TARGET_FMT_plx, addr << 2);
+}
+
+return ret;
+}
+
+static void digic_uart_write(void *opaque, hwaddr addr, uint64_t value,
+ unsigned size)
+{
+DigicUartState *s = opaque;
+unsigned char ch = value;
+
+addr >>= 2;
+
+switch (addr) {
+case R_TX:
+if (s->chr) {
+qemu_chr_fe_write_all(s->chr, &ch, 1);
+}
+break;
+
+case R_ST:
+/*
+ * Ignore write to R_ST.
+ *
+ * The point is that this register is actively used
+ * during receiving and transmitting symbols,
+ * but we don't know the function of most of bits.
+ *
+ * Ignoring writes to R_ST is only a simplification
+ * of the model. It has no perceptible side effects
+ * for existing guests.
+ */
+break;
+
+default:
+qemu_log_mask(LOG_UNIMP,
+ "digic-uart: write access to unknown register 0x"
+ TARGET_FMT_plx, a
[Qemu-devel] [PATCH v7 1/6] hw/arm: add very initial support for Canon DIGIC SoC
DIGIC is Canon Inc.'s name for a family of SoC
for digital cameras and camcorders.
There is no publicly available specification for
DIGIC chips. All information about DIGIC chip
internals is based on reverse engineering efforts
made by CHDK (http://chdk.wikia.com) and
Magic Lantern (http://www.magiclantern.fm) projects
contributors.
Signed-off-by: Antony Pavlov
Reviewed-by: Andreas Färber
Reviewed-by: Peter Maydell
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/Makefile.objs| 1 +
hw/arm/digic.c | 71 +
include/hw/arm/digic.h | 35
4 files changed, 108 insertions(+)
create mode 100644 hw/arm/digic.c
create mode 100644 include/hw/arm/digic.h
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index e48f102..2135be3 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -64,6 +64,7 @@ CONFIG_XILINX_SPIPS=y
CONFIG_ARM11SCU=y
CONFIG_A9SCU=y
+CONFIG_DIGIC=y
CONFIG_MARVELL_88W8618=y
CONFIG_OMAP=y
CONFIG_TSC210X=y
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 78b5614..8789807 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -4,4 +4,5 @@ obj-y += omap_sx1.o palm.o realview.o spitz.o stellaris.o
obj-y += tosa.o versatilepb.o vexpress.o virt.o xilinx_zynq.o z2.o
obj-y += armv7m.o exynos4210.o pxa2xx.o pxa2xx_gpio.o pxa2xx_pic.o
+obj-$(CONFIG_DIGIC) += digic.o
obj-y += omap1.o omap2.o strongarm.o
diff --git a/hw/arm/digic.c b/hw/arm/digic.c
new file mode 100644
index 000..2620262
--- /dev/null
+++ b/hw/arm/digic.c
@@ -0,0 +1,71 @@
+/*
+ * QEMU model of the Canon DIGIC SoC.
+ *
+ * Copyright (C) 2013 Antony Pavlov
+ *
+ * This model is based on reverse engineering efforts
+ * made by CHDK (http://chdk.wikia.com) and
+ * Magic Lantern (http://www.magiclantern.fm) projects
+ * contributors.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "hw/arm/digic.h"
+
+static void digic_init(Object *obj)
+{
+DigicState *s = DIGIC(obj);
+
+object_initialize(&s->cpu, sizeof(s->cpu), "arm946-" TYPE_ARM_CPU);
+object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
+}
+
+static void digic_realize(DeviceState *dev, Error **errp)
+{
+DigicState *s = DIGIC(dev);
+Error *err = NULL;
+
+object_property_set_bool(OBJECT(&s->cpu), true, "reset-hivecs", &err);
+if (err != NULL) {
+error_propagate(errp, err);
+return;
+}
+
+object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
+if (err != NULL) {
+error_propagate(errp, err);
+return;
+}
+}
+
+static void digic_class_init(ObjectClass *oc, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(oc);
+
+dc->realize = digic_realize;
+}
+
+static const TypeInfo digic_type_info = {
+.name = TYPE_DIGIC,
+.parent = TYPE_DEVICE,
+.instance_size = sizeof(DigicState),
+.instance_init = digic_init,
+.class_init = digic_class_init,
+};
+
+static void digic_register_types(void)
+{
+type_register_static(&digic_type_info);
+}
+
+type_init(digic_register_types)
diff --git a/include/hw/arm/digic.h b/include/hw/arm/digic.h
new file mode 100644
index 000..b7d16fb
--- /dev/null
+++ b/include/hw/arm/digic.h
@@ -0,0 +1,35 @@
+/*
+ * Misc Canon DIGIC declarations.
+ *
+ * Copyright (C) 2013 Antony Pavlov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef HW_ARM_DIGIC_H
+#define HW_ARM_DIGIC_H
+
+#include "cpu.h"
+
+#define TYPE_DIGIC "digic"
+
+#define DIGIC(obj) OBJECT_CHECK(DigicState, (obj), TYPE_DIGIC)
+
+typedef struct DigicState {
+/*< private >*/
+DeviceState parent_obj;
+/*< public >*/
+
+ARMCPU cpu;
+} DigicState;
+
+#endif /* HW_ARM_DIGIC_H */
--
1.8.5
[Qemu-devel] [PATCH v7 3/6] hw/arm/digic: add timer support
Signed-off-by: Antony Pavlov
Reviewed-by: Peter Maydell
---
hw/arm/digic.c | 28 ++
hw/timer/Makefile.objs | 1 +
hw/timer/digic-timer.c | 140 +
hw/timer/digic-timer.h | 36 +
include/hw/arm/digic.h | 6 +++
5 files changed, 211 insertions(+)
create mode 100644 hw/timer/digic-timer.c
create mode 100644 hw/timer/digic-timer.h
diff --git a/hw/arm/digic.c b/hw/arm/digic.c
index 2620262..e8eb0de 100644
--- a/hw/arm/digic.c
+++ b/hw/arm/digic.c
@@ -22,18 +22,35 @@
#include "hw/arm/digic.h"
+#define DIGIC4_TIMER_BASE(n)(0xc021 + (n) * 0x100)
+
static void digic_init(Object *obj)
{
DigicState *s = DIGIC(obj);
+DeviceState *dev;
+int i;
object_initialize(&s->cpu, sizeof(s->cpu), "arm946-" TYPE_ARM_CPU);
object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
+
+for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
+#define DIGIC_TIMER_NAME_MLEN11
+char name[DIGIC_TIMER_NAME_MLEN];
+
+object_initialize(&s->timer[i], sizeof(s->timer[i]), TYPE_DIGIC_TIMER);
+dev = DEVICE(&s->timer[i]);
+qdev_set_parent_bus(dev, sysbus_get_default());
+snprintf(name, DIGIC_TIMER_NAME_MLEN, "timer[%d]", i);
+object_property_add_child(obj, name, OBJECT(&s->timer[i]), NULL);
+}
}
static void digic_realize(DeviceState *dev, Error **errp)
{
DigicState *s = DIGIC(dev);
Error *err = NULL;
+SysBusDevice *sbd;
+int i;
object_property_set_bool(OBJECT(&s->cpu), true, "reset-hivecs", &err);
if (err != NULL) {
@@ -46,6 +63,17 @@ static void digic_realize(DeviceState *dev, Error **errp)
error_propagate(errp, err);
return;
}
+
+for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
+object_property_set_bool(OBJECT(&s->timer[i]), true, "realized", &err);
+if (err != NULL) {
+error_propagate(errp, err);
+return;
+}
+
+sbd = SYS_BUS_DEVICE(&s->timer[i]);
+sysbus_mmio_map(sbd, 0, DIGIC4_TIMER_BASE(i));
+}
}
static void digic_class_init(ObjectClass *oc, void *data)
diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
index 3ae091c..ea9f11f 100644
--- a/hw/timer/Makefile.objs
+++ b/hw/timer/Makefile.objs
@@ -26,5 +26,6 @@ obj-$(CONFIG_OMAP) += omap_synctimer.o
obj-$(CONFIG_PXA2XX) += pxa2xx_timer.o
obj-$(CONFIG_SH4) += sh_timer.o
obj-$(CONFIG_TUSB6010) += tusb6010.o
+obj-$(CONFIG_DIGIC) += digic-timer.o
obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
diff --git a/hw/timer/digic-timer.c b/hw/timer/digic-timer.c
new file mode 100644
index 000..974e588
--- /dev/null
+++ b/hw/timer/digic-timer.c
@@ -0,0 +1,140 @@
+/*
+ * QEMU model of the Canon DIGIC timer block.
+ *
+ * Copyright (C) 2013 Antony Pavlov
+ *
+ * This model is based on reverse engineering efforts
+ * made by CHDK (http://chdk.wikia.com) and
+ * Magic Lantern (http://www.magiclantern.fm) projects
+ * contributors.
+ *
+ * See "Timer/Clock Module" docs here:
+ * http://magiclantern.wikia.com/wiki/Register_Map
+ *
+ * The QEMU model of the OSTimer in PKUnity SoC by Guan Xuetao
+ * is used as a template.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "hw/sysbus.h"
+#include "hw/ptimer.h"
+#include "qemu/main-loop.h"
+
+#include "hw/timer/digic-timer.h"
+
+#define DIGIC_TIMER_CONTROL 0x00
+#define DIGIC_TIMER_VALUE 0x0c
+
+static const VMStateDescription vmstate_digic_timer = {
+.name = "digic.timer",
+.version_id = 1,
+.minimum_version_id = 1,
+.minimum_version_id_old = 1,
+.fields = (VMStateField[]) {
+VMSTATE_PTIMER(ptimer, DigicTimerState),
+VMSTATE_END_OF_LIST()
+}
+};
+
+static uint64_t digic_timer_read(void *opaque, hwaddr offset, unsigned size)
+{
+DigicTimerState *s = opaque;
+uint32_t ret = 0;
+
+switch (offset) {
+case DIGIC_TIMER_VALUE:
+ret = (uint32_t)ptimer_get_count(s->ptimer);
+ret &= 0x;
+break;
+default:
+qemu_log_mask(LOG_UNIMP,
+ "digic-timer: read access to unknown register 0x"
+ TARGET_FMT_plx, offset);
+}
+
+return ret;
+}
+
+static void digic_timer_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
+{
+DigicTimerState *s = opaque;
+
+/* FIXME: without documentation every write just starts timer */
+ptimer_set_limit(s->ptimer, 0x, 1);
+ptimer_run(s->ptimer, 1);
+}
+
+static
[Qemu-devel] [PATCH v7 2/6] hw/arm/digic: prepare DIGIC-based boards support
Also this patch adds initial support for Canon
PowerShot A1100 IS compact camera.
Signed-off-by: Antony Pavlov
---
hw/arm/Makefile.objs | 1 +
hw/arm/digic_boards.c | 83 +++
2 files changed, 84 insertions(+)
create mode 100644 hw/arm/digic_boards.c
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 8789807..d7d37f2 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -1,4 +1,5 @@
obj-y += boot.o collie.o exynos4_boards.o gumstix.o highbank.o
+obj-$(CONFIG_DIGIC) += digic_boards.o
obj-y += integratorcp.o kzm.o mainstone.o musicpal.o nseries.o
obj-y += omap_sx1.o palm.o realview.o spitz.o stellaris.o
obj-y += tosa.o versatilepb.o vexpress.o virt.o xilinx_zynq.o z2.o
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
new file mode 100644
index 000..20c8054
--- /dev/null
+++ b/hw/arm/digic_boards.c
@@ -0,0 +1,83 @@
+/*
+ * QEMU model of the Canon DIGIC boards (cameras indeed :).
+ *
+ * Copyright (C) 2013 Antony Pavlov
+ *
+ * This model is based on reverse engineering efforts
+ * made by CHDK (http://chdk.wikia.com) and
+ * Magic Lantern (http://www.magiclantern.fm) projects
+ * contributors.
+ *
+ * See docs here:
+ * http://magiclantern.wikia.com/wiki/Register_Map
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "hw/boards.h"
+#include "exec/address-spaces.h"
+#include "hw/arm/digic.h"
+
+typedef struct DigicBoardState {
+DigicState *digic;
+MemoryRegion ram;
+} DigicBoardState;
+
+typedef struct DigicBoard {
+hwaddr ram_size;
+} DigicBoard;
+
+static void digic4_board_setup_ram(DigicBoardState *s, hwaddr ram_size)
+{
+memory_region_init_ram(&s->ram, NULL, "ram", ram_size);
+memory_region_add_subregion(get_system_memory(), 0, &s->ram);
+vmstate_register_ram_global(&s->ram);
+}
+
+static void digic4_board_init(DigicBoard *board)
+{
+Error *err = NULL;
+
+DigicBoardState *s = g_new(DigicBoardState, 1);
+
+s->digic = DIGIC(object_new(TYPE_DIGIC));
+object_property_set_bool(OBJECT(s->digic), true, "realized", &err);
+if (err != NULL) {
+fprintf(stderr, "Couldn't realize DIGIC SoC: %s\n",
+error_get_pretty(err));
+exit(1);
+}
+
+digic4_board_setup_ram(s, board->ram_size);
+}
+
+static DigicBoard digic4_board_canon_a1100 = {
+.ram_size = 64 * 1024 * 1024,
+};
+
+static void canon_a1100_init(QEMUMachineInitArgs *args)
+{
+digic4_board_init(&digic4_board_canon_a1100);
+}
+
+static QEMUMachine canon_a1100 = {
+.name = "canon-a1100",
+.desc = "Canon PowerShot A1100 IS",
+.init = &canon_a1100_init,
+};
+
+static void digic_register_machines(void)
+{
+qemu_register_machine(&canon_a1100);
+}
+
+machine_init(digic_register_machines)
--
1.8.5
[Qemu-devel] [PATCH v7 0/6] add initial support for Canon DIGIC SoC
[PATCH v7 1/6] hw/arm: add very initial support for Canon DIGIC SoC [PATCH v7 2/6] hw/arm/digic: prepare DIGIC-based boards support [PATCH v7 3/6] hw/arm/digic: add timer support [PATCH v7 4/6] hw/arm/digic: add UART support [PATCH v7 5/6] hw/arm/digic: add NOR ROM support [PATCH v7 6/6] MAINTAINERS: Document 'Canon DIGIC' machine Changes since v6: 1. rebase over Peter Crosthwaite's "Fix Support for ARM CBAR and reset-hivecs" v4 patch series 2. digic_boards: drop start_addr so the line 's->digic->cpu.env.regs[15] = board->start_addr;' has gone 3. hw/arc/digic: use "reset-hivecs" ARM CPU property 4. add a record to the MAINTAINERS file Changes since v5: 1. rebase over latest master 2. digic_timer: add a reset function 3. digic_timer: add a VMStateDescription 4. digic_timer: fix whitespaces 5. digic_boards: fix whitespaces 6. move misplaced DIGIC_ROM* definitions to the "hw/arm/digic: add NOR ROM support" patch Changes since v4: 1. digic.h: parent_obj: change type Object -> DeviceState 2. digic-uart: drop reg array 3. digic_boards: fix K8P3215UQB comment 4. Makefile: place digic stuff in own line 5. drop cpu-qom.h inclusion 6. digic.h: add private/public labels 7. digic.h: fix guard macro 8. move base address macros to digic.c 9. fix header comments Changes since v3: 1. fix typos and formatting 2. digic-timer: drop DPRINTF 3. digic-timer: fix DIGIC4_TIMER_BASE() macro 4. digic.c: fix max timer device string Changes since v2: 1. rebase over latest master; * pass available size to object_initialize(). 2. digic-uart: qemu_log: use LOG_UNIMP instead LOG_GUEST_ERROR; 3. digic-boards: update rom image load code: introduce digic_load_rom(). Changes since v1: 0. drop the "add ARM946E-S CPU" patch; 1. convert to QOM, split DIGIC SoC code and board code (thanks to Andreas Fa:rber, Peter Maydell and Peter Crosthwaite); 2. fix digic-uart (many thanks to Peter Crosthwaite for his comments); 3. digic-boards: digic4_add_k8p3215uqb_rom(): update rom image load code: use the '-bios' option. DIGIC is Canon Inc.'s name for a family of SoC for digital cameras and camcorders. See http://en.wikipedia.org/wiki/DIGIC for details. There is no publicly available specification for DIGIC chips. All information about DIGIC chip internals is based on reverse engineering efforts made by CHDK (http://chdk.wikia.com) and Magic Lantern (http://www.magiclantern.fm) projects contributors. Also this patch series adds initial support for Canon PowerShot A1100 IS compact camera (it is my only camera with connected UART interface). As the DIGIC-based cameras differences mostly are unsignificant (e.g. RAM-size, ROM type and size, GPIO usage) the other compact and DSLR cameras support can be easely added. This DIGIC support patch series is inspired by EOS QEMU from Magic Lantern project. The main differences: * EOS QEMU uses home-brew all-in-one monolith design; this patch series uses conventional QEMU object-centric design; * EOS QEMU tries provide simplest emulation for most controllers inside SoC to run Magic Lantern firmware; this patch series provide more complete support only for core devices to run barebox bootloader. ** EOS QEMU does not support timer counting (this patch series emulate 1 MHz counting); ** EOS QEMU support DIGIC UART only for output character to stderr; (this patch series emulate introduces full blown UART interface); ** EOS QEMU has incomplete ROM support; (this patch series uses conventional QEMU pflash). This initial DIGIC support can't be used to run the original camera firmware, but it can successfully run experimental version of barebox bootloader (see http://www.barebox.org). The last sources of barebox for PowerShot A1100 can be obtained here: https://github.com/frantony/barebox/tree/next.digic.20131213 The precompiled ROM image usable with QEMU can be obtained here: https://github.com/frantony/barebox/raw/next.digic.20131213/canon-a1100-rom1.bin Download this ROM image and just run QEMU: qemu-system-arm -M canon-a1100 -serial stdio Short build instruction for QEMU bios image (canon-a1100-rom1.bin): $ git clone https://github.com/frantony/barebox -b next.digic.20131213 $ cd barebox $ export ARCH=arm $ export CROSS_COMPILE= $ make canon-a1100_defconfig $ make $ ./mk-canon-a1100-rom1.sh This ROM image (after "dancing bit" encoding) can be run on real Canon A1100 camera. The short build instruction for __previous__ DIGIC barebox version (it can be used with more recent sources too) can be obtained here: http://lists.infradead.org/pipermail/barebox/2013-August/016007.html
[Qemu-devel] [PATCH] vmstate: Add support for an array of ptimer_state *
Add support for defining a vmstate field which is an array
of pointers to structures, and use this to define a
VMSTATE_PTIMER_ARRAY() which allows an array of ptimer_state*
to be used by devices.
Signed-off-by: Peter Maydell
---
This is an odd lacuna in the VMSTATE macros, given that the
underlying savevm machinery entirely supports the combination
of VMS_ flags. This will be used in the Allwinner A10 timer.
include/hw/ptimer.h | 4
include/migration/vmstate.h | 10 ++
2 files changed, 14 insertions(+)
diff --git a/include/hw/ptimer.h b/include/hw/ptimer.h
index 28fcaf1..a33edf4 100644
--- a/include/hw/ptimer.h
+++ b/include/hw/ptimer.h
@@ -36,4 +36,8 @@ extern const VMStateDescription vmstate_ptimer;
.offset = vmstate_offset_pointer(_state, _field, ptimer_state), \
}
+#define VMSTATE_PTIMER_ARRAY(_f, _s, _n)\
+VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(_f, _s, _n, 0, \
+ vmstate_ptimer, ptimer_state)
+
#endif
diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h
index 9d09e60..be193ba 100644
--- a/include/migration/vmstate.h
+++ b/include/migration/vmstate.h
@@ -339,6 +339,16 @@ extern const VMStateInfo vmstate_info_bitmap;
.offset = vmstate_offset_array(_state, _field, _type, _num), \
}
+#define VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(_f, _s, _n, _v, _vmsd, _type) { \
+.name = (stringify(_f)), \
+.version_id = (_v), \
+.num= (_n), \
+.vmsd = &(_vmsd), \
+.size = sizeof(_type *),\
+.flags = VMS_ARRAY|VMS_STRUCT|VMS_ARRAY_OF_POINTER, \
+.offset = vmstate_offset_array(_s, _f, _type*, _n), \
+}
+
#define VMSTATE_STRUCT_ARRAY_TEST(_field, _state, _num, _test, _version,
_vmsd, _type) { \
.name = (stringify(_field)), \
.num = (_num), \
--
1.8.5
Re: [Qemu-devel] [PATCH v2 00/19] bsd-user: Add system call and mips/arm support.
On Dec 12, 2013, at 1:57 PM, Ed Maste wrote: > On 27 November 2013 06:29, Paolo Bonzini wrote: >> Il 26/11/2013 22:01, Ed Maste ha scritto: >>> >>> Ping. >>> >>> This is a large change in an area that hasn't had a lot of activity of >>> late; what are the next steps here? >> >> We're now in hard freeze, so the next step is to wait for 1.8 to be >> released. >> >> I reviewed the parts out of bsd-user, and had only one question. > > Ok, 1.7's now out, and we'll sort out the HOST_ABI vs. HOST_VARIANT > question. What's our next step after that? FYI, I have some addition bug fixes that I will be adding in a new patch set (v3) and will be rebasing to HEAD. Also, I'll make the change from HOST_ABI_DIR to HOST_VARIANT_DIR. The idea is if someone wanted to run, say, OpenBSD targets on a FreeBSD host it would use the code in the bsd-user/freebsd directory to do that. The code would need to support emulation for OpenBSD system calls that are not already natively supported by FreeBSD. Best Regards, -stacey.
Re: [Qemu-devel] [PATCH V5 5/7] Add max device width parameter for NOR devices
On Thu, Dec 12, 2013 at 9:37 AM, Peter Maydell wrote:
> On 12 December 2013 17:26, Peter Maydell wrote:
>> On 5 December 2013 21:35, Roy Franz wrote:
>>> For handling CFI and device ID reads, we need to not only know the
>>> width that a NOR flash device is configured for, but also its maximum
>>> width. The maximum width addressing mode is used for multi-width
>>> parts no matter which width they are configured for. The most common
>>> case is x16 parts that also support x8 mode. When configured for x8
>>> operation these devices respond to CFI and device ID requests differently
>>> than native x8 NOR parts.
>>
>>> DEFINE_PROP_UINT64("sector-length", struct pflash_t, sector_len, 0),
>>> DEFINE_PROP_UINT8("width", struct pflash_t, bank_width, 0),
>>> DEFINE_PROP_UINT8("device-width", struct pflash_t, device_width, 0),
>>> +DEFINE_PROP_UINT8("max-device-width", struct pflash_t,
>>> max_device_width, 0),
>>
>> So I think that given we now have three width related properties
>> we could use a comment here about what they mean. Do I have
>> this right?
>>
>> /* width here is the overall width of this QEMU device in bytes.
>> * The QEMU device may be emulating a number of flash devices
>> * wired up in parallel; the width of each individual flash
>> * device should be specified via device-width. If the individual
>> * devices have a maximum width which is greater than the width
>> * they are being used for, this maximum width should be set via
>> * max-device-width (which otherwise defaults to device-width).
>> * So for instance a 32-bit wide QEMU flash device made from four
>> * 16-bit flash devices used in 8-bit wide mode would be configured
>> * with width = 4, device-width = 1, max-device-width = 2.
>> *
>> * If device-width is not specified we default to backwards
>> * compatible behaviour which is a bad emulation of two
>> * 16 bit devices making up a 32 bit wide QEMU device. This
>> * is deprecated for new uses of this device.
>> */
>
> PS: if you're happy that the comment above is correct, I
> can just add it locally (and fix up the format nits in
> the other patch), to save you having to respin the series,
> and stick it in the target-arm.next queue.
>
> thanks
> -- PMM
Hi Peter,
Your comment explains it very nicely, and please go ahead
and fix the formatting issues. This is the last QEMU patchset
I have for UEFI support, so once this is in UEFI should boot on the A15
QEMU platforms.
Thanks,
Roy
Re: [Qemu-devel] [PATCH v11 1/5] vmstate: add VMSTATE_PTIMER_ARRAY
On 11 December 2013 08:08, liguang wrote:
> +static int get_ptimer(QEMUFile *f, void *pv, size_t size)
> +{
> +ptimer_state *v = pv;
> +uint64_t count;
> +
> +count = qemu_get_be64(f);
> +if (count != -1) {
> +ptimer_set_count(v, count);
> +} else {
> +ptimer_stop(v);
> +}
> +
> +return 0;
> +}
> +
> +static void put_ptimer(QEMUFile *f, void *pv, size_t size)
> +{
> +ptimer_state *v = pv;
> +uint64_t count;
> +
> +count = ptimer_get_count(v);
> +qemu_put_be64(f, count);
> +}
> +
> +const VMStateInfo vmstate_info_ptimer = {
> +.name = "ptimer",
> +.get = get_ptimer,
> +.put = put_ptimer,
> +};
Sorry, I led you a bit astray with my last review comment;
this is definitely wrong because it isn't saving and
restoring each ptimer_state according to the vmstate_ptimer
definition, it's only saving a single 64 bit count.
Doing this right isn't quite as obvious as I thought
because we haven't needed to do "array of pointers to
structures" yet, so there's a missing macro.
I've written a patch which does this correctly -- I'll
send it out shortly and you can add it to your patch
series in place of this one.
thanks
-- PMM
Re: [Qemu-devel] [PATCH v2 00/19] bsd-user: Add system call and mips/arm support.
On 27 November 2013 06:29, Paolo Bonzini wrote: > Il 26/11/2013 22:01, Ed Maste ha scritto: >> On 8 November 2013 11:33, Stacey Son wrote: >>> [v2] >>> >>> - Rebases to 1.7.0-rc0. (Requires, however, Andreas Tobler's patch to >>> build: see >>> http://lists.nongnu.org/archive/html/qemu-devel/2013-11/msg0.html) >>> - Fixes deadlock in the _umtx_op() system call handler. >>> - Fixes race condition in mmap() system call handler. >>> - Makes qemu-mips (o32) usable. >>> - A small code clean up to the ARM cpu_loop(). >>> - Fixes comment in arm-bsd-user.mak to match filename. >>> - Fixes symbol conflicts with FreeBSD's libcrypto for static link. >> >> Ping. >> >> This is a large change in an area that hasn't had a lot of activity of >> late; what are the next steps here? > > We're now in hard freeze, so the next step is to wait for 1.8 to be > released. > > I reviewed the parts out of bsd-user, and had only one question. Ok, 1.7's now out, and we'll sort out the HOST_ABI vs. HOST_VARIANT question. What's our next step after that?
Re: [Qemu-devel] [PATCH v2] roms: Flush icache when writing roms to guest memory
On Thu, 2013-12-12 at 10:29 +0100, Alexander Graf wrote: > We use the rom infrastructure to write firmware and/or initial kernel > blobs into guest address space. So we're basically emulating the cache > off phase on very early system bootup. > > That phase is usually responsible for clearing the instruction cache for > anything it writes into cachable memory, to ensure that after reboot we > don't happen to execute stale bits from the instruction cache. > > So we need to invalidate the icache every time we write a rom into guest > address space. We do not need to do this for every DMA since the guest > expects it has to flush the icache manually in that case. Linux may do this for all DMAs (or more accurately, for all pages that it makes executable regardless of how it loaded the data), and it's probably a reasonable assumption for virtio, but on real hardware the guest may often be able to get away with just invalidating the icache, without the dcache flush step. Whether it's worth QEMU flushing in those cases (and finding a way to exempt virtio), versus documenting it as a known limitation, is debatable -- but I don't think you can say that the requirements are the same as for real hardware (on platforms that require such cache cleaning, and excluding hardware (if any) where DMA is injected directly into data cache without passing through main memory). IMHO it would be safer to start with a policy of always cleaning the cache (on relevant platforms -- it would be a no-op on x86) when QEMU modifies guest memory, and then for performance carve out exceptions like virtio. Breakpoints (and any other memory modifications that might be done by a debugger) are another situation that requires cache cleaning. -Scott
Re: [Qemu-devel] [PATCH v11 3/5] hw/intc: add allwinner A10 interrupt controller
On 11 December 2013 08:08, liguang wrote:
> +static void aw_a10_pic_set_irq(void *opaque, int irq, int level)
> +{
> +AwA10PICState *s = opaque;
> +
> +if (level) {
> +set_bit(irq%32, (void *)&s->irq_pending[irq/32]);
The % and / operators here should have spaces round them.
> +}
> +aw_a10_pic_update(s);
> +}
> +
> +static uint64_t aw_a10_pic_read(void *opaque, hwaddr offset, unsigned size)
> +{
> +AwA10PICState *s = opaque;
> +uint8_t index = (offset & 0xc)/4;
Spaces.
Otherwise
Reviewed-by: Peter Maydell
-- PMM
Re: [Qemu-devel] [PATCH v11 3/5] hw/intc: add allwinner A10 interrupt controller
On 11 December 2013 08:27, Peter Crosthwaite wrote: > Reduces reliance on qemu_set_irq implementation > (ideally someone converts that API to accept bool). I have a feeling we have some users of that API which use it to pass an arbitrary integer value around, not just for a true/false value. Anyway, your suggestion here is correct. thanks -- PMM
[Qemu-devel] [PATCH] qemu will core dump with "-smp 254, sockets=2, cores=3, threads=2"
Hi all, when set "-smp" more than 160, qemu will give the following warning: Warning: Number of SMP cpus requested (161) exceeds the recommended cpus supported by KVM (160) As the above warning, when set "-smp 160,sockets=2,cores=3,threads=2", but find that apic_id(hw/i386/acpi-build.c) is 259 not 159 and id(hw/acpi/piix4.c) is 259 not 159. As the above warning, when set "-smp 254,sockets=2,cores=3,threads=2", but find that apic_id(hw/i386/acpi-build.c) is 513 not 253 and id(hw/acpi/piix4.c) is 513 not 253. Based on above reasons, we have two methods to fix this issue. 1, Delete "assert(apic_id <= MAX_CPUMASK_BITS)" in file "hw/i386/acpi-build.c" and delete "g_assert((id / 8) < PIIX4_PROC_LEN)" in file "hw/acpi/piix4.c". 2, Detect the values of "sockets,cores,threads" when get them from command line. And modify smp_parse function in file vl.c to do some restrictions on these parameters when boot qemu. I will submit the code patch later. Best Regards, Jun Li
Re: [Qemu-devel] [RFC 3/7] iothread: add I/O thread object
Quoting Stefan Hajnoczi (2013-12-12 07:19:40)
> This is a stand-in for Michael Roth's QContext. I expect this to be
> replaced once QContext is completed.
>
> The IOThread object is an AioContext event loop thread. This patch adds
> the concept of multiple event loop threads, allowing users to define
> them.
>
> When SMP guests run on SMP hosts it makes sense to instantiate multiple
> IOThreads. This spreads event loop processing across multiple cores.
> Note that additional patches are required to actually bind a device to
> an IOThread.
>
> Signed-off-by: Stefan Hajnoczi
> ---
> Makefile.objs | 1 +
> include/sysemu/iothread.h | 31 +
> iothread.c| 115
> ++
> 3 files changed, 147 insertions(+)
> create mode 100644 include/sysemu/iothread.h
> create mode 100644 iothread.c
>
> diff --git a/Makefile.objs b/Makefile.objs
> index 2b6c1fe..a1102a5 100644
> --- a/Makefile.objs
> +++ b/Makefile.objs
> @@ -42,6 +42,7 @@ libcacard-y += libcacard/vcardt.o
>
> ifeq ($(CONFIG_SOFTMMU),y)
> common-obj-y = $(block-obj-y) blockdev.o blockdev-nbd.o block/
> +common-obj-y += iothread.o
> common-obj-y += net/
> common-obj-y += readline.o
> common-obj-y += qdev-monitor.o device-hotplug.o
> diff --git a/include/sysemu/iothread.h b/include/sysemu/iothread.h
> new file mode 100644
> index 000..8c49bd6
> --- /dev/null
> +++ b/include/sysemu/iothread.h
> @@ -0,0 +1,31 @@
> +/*
> + * Event loop thread
> + *
> + * Copyright Red Hat Inc., 2013
> + *
> + * Authors:
> + * Stefan Hajnoczi
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + *
> + */
> +
> +#ifndef IOTHREAD_H
> +#define IOTHREAD_H
> +
> +#include "block/aio.h"
> +
> +#define TYPE_IOTHREAD "iothread"
> +#define IOTHREADS_PATH "/backends/iothreads"
> +
> +typedef struct IOThread IOThread;
> +
> +#define IOTHREAD(obj) \
> + OBJECT_CHECK(IOThread, obj, TYPE_IOTHREAD)
> +
> +IOThread *iothread_find(const char *id);
> +char *iothread_get_id(IOThread *iothread);
> +AioContext *iothread_get_aio_context(IOThread *iothread);
> +
> +#endif /* IOTHREAD_H */
> diff --git a/iothread.c b/iothread.c
> new file mode 100644
> index 000..dbc6047
> --- /dev/null
> +++ b/iothread.c
> @@ -0,0 +1,115 @@
> +/*
> + * Event loop thread
> + *
> + * Copyright Red Hat Inc., 2013
> + *
> + * Authors:
> + * Stefan Hajnoczi
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + *
> + */
> +
> +#include "qom/object.h"
> +#include "qemu/module.h"
> +#include "qemu/thread.h"
> +#include "block/aio.h"
> +#include "sysemu/iothread.h"
> +
> +typedef ObjectClass IOThreadClass;
> +struct IOThread {
> +Object parent;
> +QemuThread thread;
> +AioContext *ctx;
> +bool stopping;
> +};
> +
> +#define IOTHREAD_GET_CLASS(obj) \
> + OBJECT_GET_CLASS(IOThreadClass, obj, TYPE_IOTHREAD)
> +#define IOTHREAD_CLASS(klass) \
> + OBJECT_CLASS_CHECK(IOThreadClass, klass, TYPE_IOTHREAD)
> +
> +static void *iothread_run(void *opaque)
> +{
> +IOThread *iothread = opaque;
> +
> +for (;;) {
> +/* TODO can we optimize away acquire/release to only happen when
> + * aio_notify() was called?
> + */
Perhaps have the AioContext's notifier callback set a flag that can be
checked for afterward to determine whether we should release/re-acquire?
Calls to aio_context_acquire() could reset it upon acquistion, so we could
maybe do something like:
while(!iothread->stopping) {
aio_context_acquire(iothread->ctx);
while (!iothread->ctx->notified) {
aio_poll(iothread->ctx, true);
}
aio_context_release(iothread->ctx);
}
> +aio_context_acquire(iothread->ctx);
> +if (iothread->stopping) {
> +aio_context_release(iothread->ctx);
> +break;
> +}
> +aio_poll(iothread->ctx, true);
> +aio_context_release(iothread->ctx);
> +}
> +return NULL;
> +}
> +
> +static void iothread_instance_init(Object *obj)
> +{
> +IOThread *iothread = IOTHREAD(obj);
> +
> +iothread->stopping = false;
> +iothread->ctx = aio_context_new();
> +
> +/* This assumes .instance_init() is called from a thread with useful CPU
> + * affinity for us to inherit.
> + */
Is this assumption necessary/controllable? Couldn't we just expose the thread
id via QOM or some other interface so users/management can set the affinity
later?
> +qemu_thread_create(&iothread->thread, iothread_run,
> + iothread, QEMU_THREAD_JOINABLE);
> +}
> +
> +static void iothread_instance_finalize(Object *obj)
> +{
> +IOThread *iothread = IOTHREAD(obj);
> +
> +iothread->stopping = true;
> +aio_notify(iothread->ctx);
> +qemu_thread_join(&iothread->thread);
> +aio_context_unref(iothread->ctx);
> +}
> +
> +s
Re: [Qemu-devel] [PATCH V5 5/7] Add max device width parameter for NOR devices
On 12 December 2013 17:26, Peter Maydell wrote:
> On 5 December 2013 21:35, Roy Franz wrote:
>> For handling CFI and device ID reads, we need to not only know the
>> width that a NOR flash device is configured for, but also its maximum
>> width. The maximum width addressing mode is used for multi-width
>> parts no matter which width they are configured for. The most common
>> case is x16 parts that also support x8 mode. When configured for x8
>> operation these devices respond to CFI and device ID requests differently
>> than native x8 NOR parts.
>
>> DEFINE_PROP_UINT64("sector-length", struct pflash_t, sector_len, 0),
>> DEFINE_PROP_UINT8("width", struct pflash_t, bank_width, 0),
>> DEFINE_PROP_UINT8("device-width", struct pflash_t, device_width, 0),
>> +DEFINE_PROP_UINT8("max-device-width", struct pflash_t,
>> max_device_width, 0),
>
> So I think that given we now have three width related properties
> we could use a comment here about what they mean. Do I have
> this right?
>
> /* width here is the overall width of this QEMU device in bytes.
> * The QEMU device may be emulating a number of flash devices
> * wired up in parallel; the width of each individual flash
> * device should be specified via device-width. If the individual
> * devices have a maximum width which is greater than the width
> * they are being used for, this maximum width should be set via
> * max-device-width (which otherwise defaults to device-width).
> * So for instance a 32-bit wide QEMU flash device made from four
> * 16-bit flash devices used in 8-bit wide mode would be configured
> * with width = 4, device-width = 1, max-device-width = 2.
> *
> * If device-width is not specified we default to backwards
> * compatible behaviour which is a bad emulation of two
> * 16 bit devices making up a 32 bit wide QEMU device. This
> * is deprecated for new uses of this device.
> */
PS: if you're happy that the comment above is correct, I
can just add it locally (and fix up the format nits in
the other patch), to save you having to respin the series,
and stick it in the target-arm.next queue.
thanks
-- PMM
Re: [Qemu-devel] [PATCH V5 7/7] Fix NOR flash device ID reading
On 5 December 2013 21:35, Roy Franz wrote: > Fix NOR flash manufacturer and device ID reading. This now > properly takes into account device widths and device max widths > as required. The reading of these IDs uses the same max_width > dependent addressing as CFI queries. > > The old code remains for chips that don't specify a device width, > as the new code relies on a device width being set in order to > properly operate. The existing code seems very broken. > > Only ident0 and ident1 are used in the new code, as other fields > relate to the lock state of blocks in flash. > > The VExpress flash configuration has been updated to match > the new code, as the existing definition was 'wrong' in order > to return the expected results with the broken device ID code. > > Signed-off-by: Roy Franz Reviewed-by: Peter Maydell -- PMM
Re: [Qemu-devel] [PATCH V5 6/7] Fix CFI query responses for NOR flash
On 5 December 2013 21:35, Roy Franz wrote:
> This change fixes the CFI query responses to handle NOR device
> widths that are different from the bank width. Support is also
> added for multi-width devices in a x8 configuration. This is
> typically x8/x16 devices, but the CFI specification mentions
> x8/x32 devices so those should be supported as well if they
> exist.
> The query response data is now replicated per-device in the bank,
> and is adjusted for x16 or x32 parts configured in x8 mode.
>
> The existing code is left in place for boards that have not
> been updated to specify an explicit device_width. The VExpress
> board has been updated in an earlier patch in this series so
> this is the only board currently affected.
>
> Signed-off-by: Roy Franz
> ---
> hw/block/pflash_cfi01.c | 103
> ++-
> 1 file changed, 92 insertions(+), 11 deletions(-)
>
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index 8f81341..564e6ee 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -119,6 +119,66 @@ static void pflash_timer (void *opaque)
> pfl->cmd = 0;
> }
>
> +/* Perform a CFI query based on the bank width of the flash.
> + * If this code is called we know we have a device_width set for
> + * this flash.
> + */
> +static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr offset)
> +{
> +int i;
> +uint32_t resp = 0;
> +hwaddr boff;
> +
> +/* Adjust incoming offset to match expected device-width
> + * addressing. CFI query addresses are always specified in terms of
> + * the maximum supported width of the device. This means that x8
> + * devices and x8/x16 devices in x8 mode behave differently. For
> + * devices that are not used at their max width, we will be
> + * provided with addresses that use higher address bits than
> + * expected (based on the max width), so we will shift them lower
> + * so that they will match the addresses used when
> + * device_width==max_device_width.
> + */
> +boff = offset >> (ctz32(pfl->bank_width) +
> + ctz32(pfl->max_device_width) -
> ctz32(pfl->device_width));
> +
> +if (boff > pfl->cfi_len) {
> +return 0;
> +}
> +/* Now we will construct the CFI response generated by a single
> + * device, then replicate that for all devices that make up the
> + * bus. For wide parts used in x8 mode, CFI query responses
> + * are different than native byte-wide parts.
> + */
> +resp = pfl->cfi_table[boff];
> +if (pfl->device_width != pfl->max_device_width) {
> +/* The only case currently supported is x8 mode for a
> + * wider part.
> + */
> +if (pfl->device_width != 1 || pfl->bank_width > 4) {
> +DPRINTF("%s: Unsupported device configuration: device_width=%d,
> max_device_width=%d\n",
This line is overlong and needs a linebreak.
> +boff = offset & 0xFF;
> +if (pfl->bank_width == 2)
> +boff = boff >> 1;
> +else if (pfl->bank_width == 4)
> +boff = boff >> 2;
> +
Missing braces.
Otherwise:
Reviewed-by: Peter Maydell
thanks
-- PMM
Re: [Qemu-devel] [PATCH V5 3/7] return status for each NOR flash device
On 5 December 2013 21:35, Roy Franz wrote: > Now that we know how wide each flash device that makes up the bank is, > return status for each device in the bank. Leave existing code > that treats 32 bit wide banks as composed of two 16 bit devices as otherwise > we may break configurations that do not set the device_width propery. > > Signed-off-by: Roy Franz Reviewed-by: Peter Maydell -- PMM
Re: [Qemu-devel] [PATCH V5 4/7] Set proper device-width for vexpress flash
On 5 December 2013 21:35, Roy Franz wrote: > Create vexpress specific pflash registration > function which properly configures the device-width > of 16 bits (2 bytes) for the NOR flash on the > vexpress platform. This change is required for > buffered flash writes to work properly. > > Signed-off-by: Roy Franz Reviewed-by: Peter Maydell thanks -- PMM
Re: [Qemu-devel] [PATCH V5 2/7] Add device-width property to pflash_cfi01
On 5 December 2013 21:35, Roy Franz wrote: > The width of the devices that make up the flash interface > is required to mask certain commands, in particular the > write length for buffered writes. This length will be presented > to each device on the interface by the program writing the flash, > and the flash emulation code needs to be able to determine > the length of the write as recieved by each flash device. > The device-width defaults to the bank width which should > maintain existing behavior for platforms that don't need > this change. > This change is required to support buffered writes on the > vexpress platform that has a 32 bit flash interface with 2 > 16 bit devices on it. > > Signed-off-by: Roy Franz thanks -- PMM
Re: [Qemu-devel] [PATCH V5 5/7] Add max device width parameter for NOR devices
On 5 December 2013 21:35, Roy Franz wrote:
> For handling CFI and device ID reads, we need to not only know the
> width that a NOR flash device is configured for, but also its maximum
> width. The maximum width addressing mode is used for multi-width
> parts no matter which width they are configured for. The most common
> case is x16 parts that also support x8 mode. When configured for x8
> operation these devices respond to CFI and device ID requests differently
> than native x8 NOR parts.
> DEFINE_PROP_UINT64("sector-length", struct pflash_t, sector_len, 0),
> DEFINE_PROP_UINT8("width", struct pflash_t, bank_width, 0),
> DEFINE_PROP_UINT8("device-width", struct pflash_t, device_width, 0),
> +DEFINE_PROP_UINT8("max-device-width", struct pflash_t, max_device_width,
> 0),
So I think that given we now have three width related properties
we could use a comment here about what they mean. Do I have
this right?
/* width here is the overall width of this QEMU device in bytes.
* The QEMU device may be emulating a number of flash devices
* wired up in parallel; the width of each individual flash
* device should be specified via device-width. If the individual
* devices have a maximum width which is greater than the width
* they are being used for, this maximum width should be set via
* max-device-width (which otherwise defaults to device-width).
* So for instance a 32-bit wide QEMU flash device made from four
* 16-bit flash devices used in 8-bit wide mode would be configured
* with width = 4, device-width = 1, max-device-width = 2.
*
* If device-width is not specified we default to backwards
* compatible behaviour which is a bad emulation of two
* 16 bit devices making up a 32 bit wide QEMU device. This
* is deprecated for new uses of this device.
*/
thanks
-- PMM
Re: [Qemu-devel] [PATCH v2] target-arm: add support for v8 AES instructions
On 5 December 2013 17:54, Ard Biesheuvel wrote: > This adds support for the AESE/AESD/AESMC/AESIMC instructions that > are available on some v8 implementations of Aarch32. > > Signed-off-by: Ard Biesheuvel I finally managed to get set up to compare this against a reference implementation, and confirm that it passes. Reviewed-by: Peter Maydell and applied to target-arm.next. thanks -- PMM
Re: [Qemu-devel] [PATCH 0/7] target-arm: Support AArch64 KVM
Last call for review/testing/comments on this patchset: I'm planning to do a target-arm pullreq early next week which will include this patchset. thanks -- PMM On 5 December 2013 15:23, Peter Maydell wrote: > Slightly over-eager ping for code review and/or testing, since the A64 > patches are going to sit on top of this and they're starting to pile up :-) > (Also noticed I forgot to cc Mian; apologies.) > > thanks > -- PMM > > On 28 November 2013 13:33, Peter Maydell wrote: >> This patchset adds support for basic AArch64 KVM VM control. It sits >> on top of the mach-virt + cpu-host patchset I sent out last week. >> The core of these patches is the work done by Mian M. Hamayun; I've >> just taken that, refactored it a bit to sit on top of the >> mach-virt+cpu-host patchset instead af defining an 'a57' cpu, and >> made some minor bugfixes as part of the code review I did in the >> process. >> >> (Mian: my apologies for not looking at your last patch series sooner. >> This actually ended up in my generating extra work for myself since >> if I'd been a bit quicker about that we could have dealt with more of >> this in code review rather than my fixing things up. I'll try to do >> better next time around.) >> >> This patch series supports: >> * 64 bit KVM VM control >> * SMP and UP >> * PSCI boot of secondary CPUs >> It doesn't support: >> * migration >> * reset (partly because there's no way to reset a mach-virt system yet) >> * anything except "-cpu host" >> * debugging the VM via qemu gdbstub >> * running 32 bit VMs on a 64 bit system >>[Mian's patchset includes support for that but I have left it out >>for the moment because it needs more thought about UI and so on] >> >> You can find this patchset plus the mach-virt/cpu-host one at >> git://git.linaro.org/people/pmaydell/qemu-arm.git mach-virt-64 >> https://git.linaro.org/gitweb?p=people/pmaydell/qemu-arm.git;a=shortlog;h=refs/heads/mach-virt-64
Re: [Qemu-devel] [PATCH] inet_listen_opts: add error checking
On 12/12/2013 05:27 AM, Gerd Hoffmann wrote:
> Hi,
>
>>> +if (port_offset) {
>>> +int baseport;
>>> +errno = 0;
>>> +baseport = strtol(port, NULL, 10);
>
>>
>> WHY is strtol() such a PAINFUL interface to use correctly?
>
> Crossed my mind too after reading the manpage, which sayed you should
> clear errno to reliable detect errors as checking the return value
> doesn't cut it.
>
> Your points obviously underline that.
>
>> And WHY
>> can't qemu copy libvirt's lead of writing a SANE wrapper function, and
>> then mandating that the rest of the code base use the sane wrapper
>> instead of strtol()?
>>
>
> Care to share a pointer to the code?
/* Like strtol, but produce an "int" result, and check more carefully.
Return 0 upon success; return -1 to indicate failure.
When END_PTR is NULL, the byte after the final valid digit must be NUL.
Otherwise, it's like strtol and lets the caller check any suffix for
validity. This function is careful to return -1 when the string S
represents a number that is not representable as an "int". */
int
virStrToLong_i(char const *s, char **end_ptr, int base, int *result)
{
long int val;
char *p;
int err;
errno = 0;
val = strtol(s, &p, base); /* exempt from syntax-check */
err = (errno || (!end_ptr && *p) || p == s || (int) val != val);
if (end_ptr)
*end_ptr = p;
if (err)
return -1;
*result = val;
return 0;
}
and other variants of virStrToLong_* for parsing into unsigned int,
long, etc.
Libvirt then couples that with a syntax check that gets run during 'make
syntax-check' (or we could even migrate it into 'make check') that
forbids all use of strtol() not on a line with the magic exemption
comment. Therefore, the number of actual uses of strtol() in the source
code base is limited to just these wrapper functions, and everyone else
gets sane semantics.
--
Eric Blake eblake redhat com+1-919-301-3266
Libvirt virtualization library http://libvirt.org
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Re: [Qemu-devel] [PATCH 0/5] Monitor commands for object-add/del
On Tue, 10 Dec 2013 18:00:23 +0100 Paolo Bonzini wrote: > These allow hotplugging (and hot-unplugging without leaking an object) > virtio-rng devices. They can also be used for memory hotplug. > > Paolo Bonzini (5): > rng: initialize file descriptor to -1 > qom: fix leak for objects created with -object > qom: catch errors in object_property_add_child > monitor: add object-add (QMP) and object_add (HMP) command > monitor: add object-del (QMP) and object_del (HMP) command > > backends/rng-random.c | 4 +-- > hmp-commands.hx | 28 ++ > hmp.c | 67 ++ > hmp.h | 2 ++ > include/monitor/monitor.h | 3 ++ > include/qapi/visitor.h| 3 +- > include/qemu/typedefs.h | 2 ++ > qapi-schema.json | 34 ++ > qmp-commands.hx | 51 > qmp.c | 74 > +++ > qom/object.c | 9 -- > vl.c | 3 +- > 12 files changed, 273 insertions(+), 7 deletions(-) > With s/object_add/object-add/ and s/object_del/object-del/ in 4-5/5 fixed Reviewed-By: Igor Mammedov
Re: [Qemu-devel] [Spice-devel] Vdagent not working on xen linux hvm DomUs
Il 12/12/2013 16:23, Wei Liu ha scritto: On Thu, Dec 12, 2013 at 02:10:23PM +0100, Fabio Fantoni wrote: [...] I did some other tests, I narrowed down the commit range to the one between: commit c9fea5d701f8fd33f0843728ec264d95cee3ed37 Mon, 22 Jul 2013 15:14:18 (Merge remote-tracking branch 'bonzini/iommu-for-anthony') where there is virtio net regression with xen and commit962b03fcf509db25c847aa67c4eff574c240dcfe Thu, 4 Jul 2013 15:42:43 + (xen: Mark fixed platform I/O as unaligned) where virtio net is working I also tested: commit 2562becfc126ed7678c662ee23b7c1fe135d8966 Mon, 15 Jul 2013 19:02:41 + and commit dcb117bfda5af6f6ceb7231778d36d8bce4aee93 Thu, 4 Jul 2013 15:42:46 + but qemu crashes on xl create for another error and I haven't found which is the commit to apply with git cherry-pick so that I can check if the virtio net regression is present. Can someone help me please? I added also qemu-devel to cc. I did a quick test with Xen's QEMU, currently at commit 1c514a7734b7f98625a0d18d5e8ee7581f26e50c Merge: 79c097d 35bdc13 Author: Stefano Stabellini Date: Tue Jun 25 11:34:24 2013 + Merge remote branch 'perard/cpu-hotplug-port-v2' into xen-staging-master-7 from git://xenbits.xen.org/qemu-upstream-unstable.git My guest is Squeeze with stock kernel 2.6.32. vif=['model=virtio-net-pci,bridge=xenbr0'] No pci=nomsi in guest kernel command line. Everything worked fine. And /proc/interrupts shows that it's indeed using MSI for virtio PCI. I'm kind of confused. (And in the long run of this thread I probably didn't remember everything.) Wei. I tried with "commit e16435c95be86244bd92c5c26579bd4298aa65a6 (xen_disk: mark ioreq as mapped before unmapping in error case)" from git://xenbits.xen.org/qemu-upstream-4.3-testing.git. There are only 4 commits difference between mine and your test. FWIK the only other difference is domUs kernel versions, and the msi problem is probably a regression between kernel 2.6.32 and 3.2 (the "older" domUs used in my tests was Precise with kernel 3.2). Tomorrow I'll try also with squeeze. RIguardo invece l'altra regressione qemu tra il 4 e 22 luglio che da errore xen mapcache usando virtio net puoi aiutarmi? Another question: the qemu 1.6 regression between july 4th-22nd commits (qemu crash on domU kernel load with xen mapcache error with virtio net), could you help me? Thanks for any reply.
[Qemu-devel] Occasional clockjump in Win2012 after Live Migration
Hi, is anyone aware of a problem with a clock jump in Windows (observed in Server 2012) where after a successful live migration the clock jumps roughly 2 days into the future? Maybe this is already fixed we observed this with qemu-kvm-1.2.0. I have not yet managed to reproduce this, but it definetly happens. Where is Windows getting the system clock from? RTC or addtionally internal clocksources like HPET, PM_TIMER etc? Thanks, Peter
Re: [Qemu-devel] [PATCH 5/11 v3 FIXED] qdev: add "hotplugable" property to Device
On Wed, 11 Dec 2013 20:57:43 +0100 Markus Armbruster wrote: > Please spell it "pluggable", both in C identifiers and strings. Sure, I'll respin series since it will touch several patches.
Re: [Qemu-devel] [PATCH v3] char: restore read callback on a reattached (hotplug) chardev
On 12/12/2013 05:02 AM, Markus Armbruster wrote: > Gal Hammer writes: > >> Fix a bug that was introduced in commit 386a5a1e. A removal of a device >> set the chr handlers to NULL. However when the device is plugged back, >> its read callback is not restored so data can't be transftered from the [1] >> host to the guest (e.g. via the virtio-serial port). >> >> https://bugzilla.redhat.com/show_bug.cgi?id=1027181 >> >> Signed-off-by: Gal Hammer >> >> V3: - fix a typo in comment. >> - move the revision history after the "signed-off-by" tag. > > Close, but no cigar :) Also, you missed my suggested typo fix at [1]. s/transftered/transferred/ -- Eric Blake eblake redhat com+1-919-301-3266 Libvirt virtualization library http://libvirt.org signature.asc Description: OpenPGP digital signature
Re: [Qemu-devel] [PATCH] trace: add glib 2.32+ static GMutex support
12.12.2013 18:52, Stefan Hajnoczi wrote:
> The GStaticMutex API was deprecated in glib 2.32. We cannot switch over
> to GMutex unconditionally since we would drop support for older glib
> versions. But the deprecated API warnings during build are annoying so
> use static GMutex when possible.
>
> Signed-off-by: Stefan Hajnoczi
> ---
> trace/simple.c | 45 ++---
> 1 file changed, 38 insertions(+), 7 deletions(-)
>
> diff --git a/trace/simple.c b/trace/simple.c
> index 1e3f691..941f7ea 100644
> --- a/trace/simple.c
> +++ b/trace/simple.c
> @@ -39,7 +39,11 @@
> * Trace records are written out by a dedicated thread. The thread waits for
> * records to become available, writes them out, and then waits again.
> */
> +#if GLIB_CHECK_VERSION(2, 32, 0)
> +static GMutex trace_lock;
> +#else
> static GStaticMutex trace_lock = G_STATIC_MUTEX_INIT;
> +#endif
>
> /* g_cond_new() was deprecated in glib 2.31 but we still need to support it
> */
> #if GLIB_CHECK_VERSION(2, 31, 0)
> @@ -86,6 +90,34 @@ typedef struct {
> static void read_from_buffer(unsigned int idx, void *dataptr, size_t size);
> static unsigned int write_to_buffer(unsigned int idx, void *dataptr, size_t
> size);
>
> +/* Hide changes in glib mutex APIs */
> +static void lock_trace_lock(void)
> +{
> +#if GLIB_CHECK_VERSION(2, 32, 0)
> +g_mutex_lock(&trace_lock);
> +#else
> +g_static_mutex_lock(&trace_lock);
> +#endif
> +}
> +
> +static void unlock_trace_lock(void)
> +{
> +#if GLIB_CHECK_VERSION(2, 32, 0)
> +g_mutex_unlock(&trace_lock);
> +#else
> +g_static_mutex_unlock(&trace_lock);
> +#endif
> +}
> +
> +static GMutex *get_trace_lock_mutex(void)
> +{
> +#if GLIB_CHECK_VERSION(2, 32, 0)
> +return &trace_lock;
> +#else
> +return g_static_mutex_get_mutex(&trace_lock);
> +#endif
> +}
I'd group mutex definition above with all the functions accessing it,
and also make the functions inline.
Well, to my taste, this is a good example where #define is better than
an inline function. Compare the above with:
diff --git a/trace/simple.c b/trace/simple.c
index 1e3f691..2e55ac1 100644
--- a/trace/simple.c
+++ b/trace/simple.c
@@ -39,7 +39,17 @@
* Trace records are written out by a dedicated thread. The thread waits for
* records to become available, writes them out, and then waits again.
*/
+#if GLIB_CHECK_VERSION(2, 32, 0)
+static GMutex trace_lock;
+#define lock_trace_lock() g_mutex_lock(&trace_lock)
+#define unlock_trace_lock() g_mutex_unlock(&trace_lock)
+#define get_trace_lock_mutex() (&trace_lock)
+#else
static GStaticMutex trace_lock = G_STATIC_MUTEX_INIT;
+#define lock_trace_lock() g_static_mutex_lock(&trace_lock)
+#define unlock_trace_lock() g_static_mutex_unlock(&trace_lock)
+#define get_trace_lock_mutex() g_static_mutex_get_mutex(&trace_lock)
+#endif
/* g_cond_new() was deprecated in glib 2.31 but we still need to support it */
#if GLIB_CHECK_VERSION(2, 31, 0)
(#defines here and elsewhere has added bonus - when debugging, debugger
does not step into the inline functions, -- such stepping is quite annoying).
But somehow many developers prefer inline functions (sometimes it is better
indeed, especially in a commonly used header files, and when the functions
has complex or many parameters; in this case we have much simpler situation.
For fun, this #ifdeffery is 5 times larger than the actual users of the
functions being defined :)
Thanks,
/mjt
[Qemu-devel] [PATCH V5 5/7] block: Create authorizations mechanism for external snapshot and resize.
Signed-off-by: Benoit Canet
---
block.c | 65 ---
block/blkverify.c | 2 +-
blockdev.c| 2 +-
include/block/block.h | 20 +++
include/block/block_int.h | 12 ++---
5 files changed, 77 insertions(+), 24 deletions(-)
diff --git a/block.c b/block.c
index 22190a4..57946b7 100644
--- a/block.c
+++ b/block.c
@@ -4992,21 +4992,68 @@ int bdrv_amend_options(BlockDriverState *bs,
QEMUOptionParameter *options)
return bs->drv->bdrv_amend_options(bs, options);
}
-ExtSnapshotPerm bdrv_check_ext_snapshot(BlockDriverState *bs)
+/* Used to recurse on single child block filters.
+ * Single child block filter will store their child in bs->file.
+ */
+bool bdrv_generic_is_first_non_filter(BlockDriverState *bs,
+ BlockDriverState *candidate)
{
-if (bs->drv->bdrv_check_ext_snapshot) {
-return bs->drv->bdrv_check_ext_snapshot(bs);
+if (!bs->drv) {
+return false;
+}
+
+if (!bs->drv->authorizations[BS_IS_A_FILTER]) {
+if (bs == candidate) {
+return true;
+} else {
+return false;
+}
+}
+
+if (!bs->drv->authorizations[BS_FILTER_PASS_DOWN]) {
+return false;
}
-if (bs->file && bs->file->drv && bs->file->drv->bdrv_check_ext_snapshot) {
-return bs->file->drv->bdrv_check_ext_snapshot(bs);
+if (!bs->file) {
+return false;
+}
+
+return bdrv_recurse_is_first_non_filter(bs->file, candidate);
+}
+
+bool bdrv_recurse_is_first_non_filter(BlockDriverState *bs,
+ BlockDriverState *candidate)
+{
+if (bs->drv && bs->drv->bdrv_recurse_is_first_non_filter) {
+return bs->drv->bdrv_recurse_is_first_non_filter(bs, candidate);
}
-/* external snapshots are allowed by default */
-return EXT_SNAPSHOT_ALLOWED;
+return bdrv_generic_is_first_non_filter(bs, candidate);
}
-ExtSnapshotPerm bdrv_check_ext_snapshot_forbidden(BlockDriverState *bs)
+/* This function check if the candidate is the first non filter bs down it's
+ * bs chain. Since we don't have pointers to parents it explore all bs chains
+ * from the top. Some filters can choose not to pass down the recursion.
+ */
+bool bdrv_is_first_non_filter(BlockDriverState *candidate)
{
-return EXT_SNAPSHOT_FORBIDDEN;
+BlockDriverState *bs;
+
+/* walk down the bs forest recursively */
+QTAILQ_FOREACH(bs, &bdrv_states, device_list) {
+bool perm;
+
+if (!bs->file) {
+continue;
+}
+
+perm = bdrv_recurse_is_first_non_filter(bs->file, candidate);
+
+/* candidate is the first non filter */
+if (perm) {
+return true;
+}
+}
+
+return false;
}
diff --git a/block/blkverify.c b/block/blkverify.c
index 3c63528..853afa9 100644
--- a/block/blkverify.c
+++ b/block/blkverify.c
@@ -417,7 +417,7 @@ static BlockDriver bdrv_blkverify = {
.bdrv_aio_writev= blkverify_aio_writev,
.bdrv_aio_flush = blkverify_aio_flush,
-.bdrv_check_ext_snapshot = bdrv_check_ext_snapshot_forbidden,
+.authorizations = { true, false },
};
static void bdrv_blkverify_init(void)
diff --git a/blockdev.c b/blockdev.c
index 838df50..ebb8f48 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -1236,7 +1236,7 @@ static void external_snapshot_prepare(BlkTransactionState
*common,
}
}
-if (bdrv_check_ext_snapshot(state->old_bs) != EXT_SNAPSHOT_ALLOWED) {
+if (!bdrv_is_first_non_filter(state->old_bs)) {
error_set(errp, QERR_FEATURE_DISABLED, "snapshot");
return;
}
diff --git a/include/block/block.h b/include/block/block.h
index f7d8017..16812b0 100644
--- a/include/block/block.h
+++ b/include/block/block.h
@@ -283,16 +283,16 @@ int bdrv_amend_options(BlockDriverState *bs_new,
QEMUOptionParameter *options);
/* external snapshots */
typedef enum {
-EXT_SNAPSHOT_ALLOWED,
-EXT_SNAPSHOT_FORBIDDEN,
-} ExtSnapshotPerm;
-
-/* return EXT_SNAPSHOT_ALLOWED if external snapshot is allowed
- * return EXT_SNAPSHOT_FORBIDDEN if external snapshot is forbidden
- */
-ExtSnapshotPerm bdrv_check_ext_snapshot(BlockDriverState *bs);
-/* helper used to forbid external snapshots like in blkverify */
-ExtSnapshotPerm bdrv_check_ext_snapshot_forbidden(BlockDriverState *bs);
+BS_IS_A_FILTER,
+BS_FILTER_PASS_DOWN,
+BS_AUTHORIZATION_COUNT,
+} BsAuthorization;
+
+bool bdrv_generic_is_first_non_filter(BlockDriverState *bs,
+ BlockDriverState *candidate);
+bool bdrv_recurse_is_first_non_filter(BlockDriverState *bs,
+ BlockDriverState *candidate);
+bool bdrv_is_first_non_filter(BlockDriverState *candidate);
/* async block I/O */
typedef void BlockDriverDirtyHandler(BlockDriverState *bs, int64_t sector,
diff --git a/include/block/block_int.h b/include/b
[Qemu-devel] [PATCH V5 7/7] qmp: Allow to take external snapshots on bs graphs node.
Signed-off-by: Benoit Canet
---
blockdev.c | 55 ---
hmp.c| 4 +++-
qapi-schema.json | 13 ++---
qmp-commands.hx | 11 ++-
4 files changed, 71 insertions(+), 12 deletions(-)
diff --git a/blockdev.c b/blockdev.c
index 374d03d..1246544 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -940,14 +940,22 @@ static void blockdev_do_action(int kind, void *data,
Error **errp)
qmp_transaction(&list, errp);
}
-void qmp_blockdev_snapshot_sync(const char *device, const char *snapshot_file,
+void qmp_blockdev_snapshot_sync(bool has_device, const char *device,
+bool has_node_name, const char *node_name,
+const char *snapshot_file,
+bool has_snapshot_node_name,
+const char *snapshot_node_name,
bool has_format, const char *format,
-bool has_mode, enum NewImageMode mode,
-Error **errp)
+bool has_mode, NewImageMode mode, Error **errp)
{
BlockdevSnapshot snapshot = {
+.has_device = has_device,
.device = (char *) device,
+.has_node_name = has_node_name,
+.node_name = (char *) node_name,
.snapshot_file = (char *) snapshot_file,
+.has_snapshot_node_name = has_snapshot_node_name,
+.snapshot_node_name = (char *) snapshot_node_name,
.has_format = has_format,
.format = (char *) format,
.has_mode = has_mode,
@@ -1185,8 +1193,14 @@ static void
external_snapshot_prepare(BlkTransactionState *common,
{
BlockDriver *drv;
int flags, ret;
+QDict *options = NULL;
Error *local_err = NULL;
+bool has_device = false;
const char *device;
+bool has_node_name = false;
+const char *node_name;
+bool has_snapshot_node_name = false;
+const char *snapshot_node_name;
const char *new_image_file;
const char *format = "qcow2";
enum NewImageMode mode = NEW_IMAGE_MODE_ABSOLUTE_PATHS;
@@ -1197,7 +1211,14 @@ static void
external_snapshot_prepare(BlkTransactionState *common,
/* get parameters */
g_assert(action->kind == TRANSACTION_ACTION_KIND_BLOCKDEV_SNAPSHOT_SYNC);
+has_device = action->blockdev_snapshot_sync->has_device;
device = action->blockdev_snapshot_sync->device;
+has_node_name = action->blockdev_snapshot_sync->has_node_name;
+node_name = action->blockdev_snapshot_sync->node_name;
+has_snapshot_node_name =
+action->blockdev_snapshot_sync->has_snapshot_node_name;
+snapshot_node_name = action->blockdev_snapshot_sync->snapshot_node_name;
+
new_image_file = action->blockdev_snapshot_sync->snapshot_file;
if (action->blockdev_snapshot_sync->has_format) {
format = action->blockdev_snapshot_sync->format;
@@ -1213,9 +1234,21 @@ static void
external_snapshot_prepare(BlkTransactionState *common,
return;
}
-state->old_bs = bdrv_find(device);
-if (!state->old_bs) {
-error_set(errp, QERR_DEVICE_NOT_FOUND, device);
+state->old_bs = bdrv_lookup_bs(has_device, device,
+ has_node_name, node_name,
+ &local_err);
+if (error_is_set(&local_err)) {
+error_propagate(errp, local_err);
+return;
+}
+
+if (has_node_name && !has_snapshot_node_name) {
+error_setg(errp, "New snapshot node name missing");
+return;
+}
+
+if (has_snapshot_node_name && bdrv_find_node(snapshot_node_name)) {
+error_setg(errp, "New snapshot node name already existing");
return;
}
@@ -1255,15 +1288,23 @@ static void
external_snapshot_prepare(BlkTransactionState *common,
}
}
+if (has_snapshot_node_name) {
+options = qdict_new();
+qdict_put(options, "node-name",
+ qstring_from_str(snapshot_node_name));
+}
+
/* We will manually add the backing_hd field to the bs later */
state->new_bs = bdrv_new("");
/* TODO Inherit bs->options or only take explicit options with an
* extended QMP command? */
-ret = bdrv_open(state->new_bs, new_image_file, NULL,
+ret = bdrv_open(state->new_bs, new_image_file, options,
flags | BDRV_O_NO_BACKING, drv, &local_err);
if (ret != 0) {
error_propagate(errp, local_err);
}
+
+QDECREF(options);
}
static void external_snapshot_commit(BlkTransactionState *common)
diff --git a/hmp.c b/hmp.c
index 906ddb7..47dcf0c 100644
--- a/hmp.c
+++ b/hmp.c
@@ -971,7 +971,9 @@ void hmp_snapshot_blkdev(Monitor *mon, const QDict *qdict)
}
mode = reuse ? NEW_IMAGE_MODE_EXISTING : NEW_IMAGE_MODE_ABSOLUTE_PATHS;
-qmp_blockdev_snapshot_sync(device, filename, !!format, format,
+qmp_blockdev_snapshot_sync(true, device, false,
[Qemu-devel] [PATCH V5 6/7] qmp: Allow block_resize to manipulate bs graph nodes.
Signed-off-by: Benoit Canet
---
blockdev.c | 18 ++
hmp.c| 2 +-
qapi-schema.json | 10 --
qmp-commands.hx | 3 ++-
4 files changed, 25 insertions(+), 8 deletions(-)
diff --git a/blockdev.c b/blockdev.c
index ebb8f48..374d03d 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -1676,14 +1676,24 @@ int do_drive_del(Monitor *mon, const QDict *qdict,
QObject **ret_data)
return 0;
}
-void qmp_block_resize(const char *device, int64_t size, Error **errp)
+void qmp_block_resize(bool has_device, const char *device,
+ bool has_node_name, const char *node_name,
+ int64_t size, Error **errp)
{
+Error *local_err = NULL;
BlockDriverState *bs;
int ret;
-bs = bdrv_find(device);
-if (!bs) {
-error_set(errp, QERR_DEVICE_NOT_FOUND, device);
+bs = bdrv_lookup_bs(has_device, device,
+has_node_name, node_name,
+&local_err);
+if (error_is_set(&local_err)) {
+error_propagate(errp, local_err);
+return;
+}
+
+if (!bdrv_is_first_non_filter(bs)) {
+error_set(errp, QERR_FEATURE_DISABLED, "resize");
return;
}
diff --git a/hmp.c b/hmp.c
index 3820fbe..906ddb7 100644
--- a/hmp.c
+++ b/hmp.c
@@ -892,7 +892,7 @@ void hmp_block_resize(Monitor *mon, const QDict *qdict)
int64_t size = qdict_get_int(qdict, "size");
Error *errp = NULL;
-qmp_block_resize(device, size, &errp);
+qmp_block_resize(true, device, false, NULL, size, &errp);
hmp_handle_error(mon, &errp);
}
diff --git a/qapi-schema.json b/qapi-schema.json
index 903fcb6..3977619 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -1722,7 +1722,11 @@
#
# Resize a block image while a guest is running.
#
-# @device: the name of the device to get the image resized
+# Either @device or @node-name must be set but not both.
+#
+# @device: #optional the name of the device to get the image resized
+#
+# @node-name: #optional graph node name to get the image resized (Since 2.0)
#
# @size: new image size in bytes
#
@@ -1731,7 +1735,9 @@
#
# Since: 0.14.0
##
-{ 'command': 'block_resize', 'data': { 'device': 'str', 'size': 'int' }}
+{ 'command': 'block_resize', 'data': { '*device': 'str',
+ '*node-name': 'str',
+ 'size': 'int' }}
##
# @NewImageMode
diff --git a/qmp-commands.hx b/qmp-commands.hx
index 1451c1a..5696b08 100644
--- a/qmp-commands.hx
+++ b/qmp-commands.hx
@@ -880,7 +880,7 @@ EQMP
{
.name = "block_resize",
-.args_type = "device:B,size:o",
+.args_type = "device:s?,node-name:s?,size:o",
.mhandler.cmd_new = qmp_marshal_input_block_resize,
},
@@ -893,6 +893,7 @@ Resize a block image while a guest is running.
Arguments:
- "device": the device's ID, must be unique (json-string)
+- "node-name": the node name in the block driver state graph (json-string)
- "size": new size
Example:
--
1.8.3.2
[Qemu-devel] [PATCH V5 3/7] qmp: Add a command to list the named BlockDriverState nodes.
Signed-off-by: Benoit Canet
---
block.c | 18 +
block/qapi.c | 109 +-
blockdev.c| 5 +++
include/block/block.h | 1 +
include/block/qapi.h | 1 +
qapi-schema.json | 16 +++-
qmp-commands.hx | 61
7 files changed, 155 insertions(+), 56 deletions(-)
diff --git a/block.c b/block.c
index 1c57f0d..78d13e5 100644
--- a/block.c
+++ b/block.c
@@ -32,6 +32,7 @@
#include "sysemu/sysemu.h"
#include "qemu/notify.h"
#include "block/coroutine.h"
+#include "block/qapi.h"
#include "qmp-commands.h"
#include "qemu/timer.h"
@@ -3189,6 +3190,23 @@ BlockDriverState *bdrv_find_node(const char *node_name)
return NULL;
}
+/* Put this QMP function here so it can access the static graph_bdrv_states. */
+BlockDeviceInfoList *bdrv_named_nodes_list(void)
+{
+BlockDeviceInfoList *list, *entry;
+BlockDriverState *bs;
+
+list = NULL;
+QTAILQ_FOREACH(bs, &graph_bdrv_states, node_list) {
+entry = g_malloc0(sizeof(*entry));
+entry->value = bdrv_block_device_info(bs);
+entry->next = list;
+list = entry;
+}
+
+return list;
+}
+
BlockDriverState *bdrv_next(BlockDriverState *bs)
{
if (!bs) {
diff --git a/block/qapi.c b/block/qapi.c
index a32cb79..556f7fb 100644
--- a/block/qapi.c
+++ b/block/qapi.c
@@ -29,6 +29,60 @@
#include "qapi/qmp-output-visitor.h"
#include "qapi/qmp/types.h"
+BlockDeviceInfo *bdrv_block_device_info(BlockDriverState *bs)
+{
+BlockDeviceInfo *info = g_malloc0(sizeof(*info));
+
+info->file = g_strdup(bs->filename);
+info->ro = bs->read_only;
+info->drv= g_strdup(bs->drv->format_name);
+info->encrypted = bs->encrypted;
+info->encryption_key_missing = bdrv_key_required(bs);
+
+if (bs->node_name[0]) {
+info->has_node_name = true;
+info->node_name = g_strdup(bs->node_name);
+}
+
+if (bs->backing_file[0]) {
+info->has_backing_file = true;
+info->backing_file = g_strdup(bs->backing_file);
+}
+
+info->backing_file_depth = bdrv_get_backing_file_depth(bs);
+
+if (bs->io_limits_enabled) {
+ThrottleConfig cfg;
+throttle_get_config(&bs->throttle_state, &cfg);
+info->bps = cfg.buckets[THROTTLE_BPS_TOTAL].avg;
+info->bps_rd = cfg.buckets[THROTTLE_BPS_READ].avg;
+info->bps_wr = cfg.buckets[THROTTLE_BPS_WRITE].avg;
+
+info->iops= cfg.buckets[THROTTLE_OPS_TOTAL].avg;
+info->iops_rd = cfg.buckets[THROTTLE_OPS_READ].avg;
+info->iops_wr = cfg.buckets[THROTTLE_OPS_WRITE].avg;
+
+info->has_bps_max = cfg.buckets[THROTTLE_BPS_TOTAL].max;
+info->bps_max = cfg.buckets[THROTTLE_BPS_TOTAL].max;
+info->has_bps_rd_max = cfg.buckets[THROTTLE_BPS_READ].max;
+info->bps_rd_max = cfg.buckets[THROTTLE_BPS_READ].max;
+info->has_bps_wr_max = cfg.buckets[THROTTLE_BPS_WRITE].max;
+info->bps_wr_max = cfg.buckets[THROTTLE_BPS_WRITE].max;
+
+info->has_iops_max= cfg.buckets[THROTTLE_OPS_TOTAL].max;
+info->iops_max= cfg.buckets[THROTTLE_OPS_TOTAL].max;
+info->has_iops_rd_max = cfg.buckets[THROTTLE_OPS_READ].max;
+info->iops_rd_max = cfg.buckets[THROTTLE_OPS_READ].max;
+info->has_iops_wr_max = cfg.buckets[THROTTLE_OPS_WRITE].max;
+info->iops_wr_max = cfg.buckets[THROTTLE_OPS_WRITE].max;
+
+info->has_iops_size = cfg.op_size;
+info->iops_size = cfg.op_size;
+}
+
+return info;
+}
+
/*
* Returns 0 on success, with *p_list either set to describe snapshot
* information, or NULL because there are no snapshots. Returns -errno on
@@ -211,60 +265,7 @@ void bdrv_query_info(BlockDriverState *bs,
if (bs->drv) {
info->has_inserted = true;
-info->inserted = g_malloc0(sizeof(*info->inserted));
-info->inserted->file = g_strdup(bs->filename);
-info->inserted->ro = bs->read_only;
-info->inserted->drv = g_strdup(bs->drv->format_name);
-info->inserted->encrypted = bs->encrypted;
-info->inserted->encryption_key_missing = bdrv_key_required(bs);
-
-if (bs->backing_file[0]) {
-info->inserted->has_backing_file = true;
-info->inserted->backing_file = g_strdup(bs->backing_file);
-}
-
-info->inserted->backing_file_depth = bdrv_get_backing_file_depth(bs);
-
-if (bs->io_limits_enabled) {
-ThrottleConfig cfg;
-throttle_get_config(&bs->throttle_state, &cfg);
-info->inserted->bps = cfg.buckets[THROTTLE_BPS_TOTAL].avg;
-info->inserted->bps_rd = cfg.buckets[THROTTLE_BPS_READ].avg;
-info->inserted->bps_wr = cfg.buckets[THROTTLE_BPS_WRITE].avg;
-
-info->inserted->iops= cfg.buckets[THROTTLE_OPS_T
[Qemu-devel] [PATCH V5 4/7] qmp: Allow to change password on named block driver states.
There was two candidate ways to implement named node manipulation:
1)
{ 'command': 'block_passwd', 'data': {'*device': 'str',
'*node-name': 'str', 'password': 'str'}
}
2)
{ 'command': 'block_passwd', 'data': {'device': 'str',
'*device-is-node': 'bool',
'password': 'str'} }
Luiz proposed 1 and says 2 was an abuse of the QMP interface and proposed to
rewrite the QMP block interface for 2.0.
Luiz does not like in 1 the fact that 2 fields are optional but one of them must
be specified leading to an abuse of the QMP semantic.
Kevin argumented that 2 what a clear abuse of the device field and would not be
practical when reading fast some log file because the user would read "device"
and think that a device is manipulated when it's in fact a node name.
Documentation of 1 make it pretty clear what to do for the user.
Kevin argued that all bs are node including devices ones so 2 does not make
sense.
Kevin also argued that rewriting the QMP block interface would not make disapear
the current one.
Kevin pushed the argument that making the QAPI generator compatible with the
semantic of the operation would need a rewrite that no one has done yet.
A vote has been done on the list to elect the version to use and 1 won.
For reference the complete thread is:
"[Qemu-devel] [PATCH V4 4/7] qmp: Allow to change password on names block driver
states."
Signed-off-by: Benoit Canet
---
block.c | 32
blockdev.c| 13 +
hmp.c | 2 +-
include/block/block.h | 3 +++
qapi-schema.json | 9 +++--
qmp-commands.hx | 3 ++-
6 files changed, 54 insertions(+), 8 deletions(-)
diff --git a/block.c b/block.c
index 78d13e5..22190a4 100644
--- a/block.c
+++ b/block.c
@@ -3207,6 +3207,38 @@ BlockDeviceInfoList *bdrv_named_nodes_list(void)
return list;
}
+BlockDriverState *bdrv_lookup_bs(bool has_device, const char *device,
+ bool has_node_name, const char *node_name,
+ Error **errp)
+{
+BlockDriverState *bs = NULL;
+
+if (has_device == has_node_name) {
+error_setg(errp, "Use either device or node-name but not both");
+return NULL;
+}
+
+if (has_device) {
+bs = bdrv_find(device);
+
+if (!bs) {
+error_set(errp, QERR_DEVICE_NOT_FOUND, device);
+return NULL;
+}
+
+return bs;
+}
+
+bs = bdrv_find_node(node_name);
+
+if (!bs) {
+error_set(errp, QERR_DEVICE_NOT_FOUND, node_name);
+return NULL;
+}
+
+return bs;
+}
+
BlockDriverState *bdrv_next(BlockDriverState *bs)
{
if (!bs) {
diff --git a/blockdev.c b/blockdev.c
index 204ab40..838df50 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -1474,14 +1474,19 @@ void qmp_eject(const char *device, bool has_force, bool
force, Error **errp)
eject_device(bs, force, errp);
}
-void qmp_block_passwd(const char *device, const char *password, Error **errp)
+void qmp_block_passwd(bool has_device, const char *device,
+ bool has_node_name, const char *node_name,
+ const char *password, Error **errp)
{
+Error *local_err = NULL;
BlockDriverState *bs;
int err;
-bs = bdrv_find(device);
-if (!bs) {
-error_set(errp, QERR_DEVICE_NOT_FOUND, device);
+bs = bdrv_lookup_bs(has_device, device,
+has_node_name, node_name,
+&local_err);
+if (error_is_set(&local_err)) {
+error_propagate(errp, local_err);
return;
}
diff --git a/hmp.c b/hmp.c
index 32ee285..3820fbe 100644
--- a/hmp.c
+++ b/hmp.c
@@ -870,7 +870,7 @@ void hmp_block_passwd(Monitor *mon, const QDict *qdict)
const char *password = qdict_get_str(qdict, "password");
Error *errp = NULL;
-qmp_block_passwd(device, password, &errp);
+qmp_block_passwd(true, device, false, NULL, password, &errp);
hmp_handle_error(mon, &errp);
}
diff --git a/include/block/block.h b/include/block/block.h
index 8c10123..f7d8017 100644
--- a/include/block/block.h
+++ b/include/block/block.h
@@ -376,6 +376,9 @@ const char *bdrv_get_format_name(BlockDriverState *bs);
BlockDriverState *bdrv_find(const char *name);
BlockDriverState *bdrv_find_node(const char *node_name);
BlockDeviceInfoList *bdrv_named_nodes_list(void);
+BlockDriverState *bdrv_lookup_bs(bool has_device, const char *device,
+ bool has_node_name, const char *node_name,
+ Error **errp);
BlockDriverState *bdrv_next(BlockDriverState *bs);
void bdrv_iterate(void (*it)(void *opaque, BlockDriverState *bs),
void *opaque);
diff --git a/qapi-schema.json b/qapi-schema.json
index 0dadd5d..903fcb6 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -1676,7 +
[Qemu-devel] [PATCH V5 1/7] block: Add bs->node_name to hold the name of a bs node of the bs graph.
Add the minimum of code to prepare for the following patches.
Signed-off-by: Benoit Canet
---
block.c | 57 +++
include/block/block.h | 1 +
include/block/block_int.h | 9 +++-
3 files changed, 52 insertions(+), 15 deletions(-)
diff --git a/block.c b/block.c
index 64e7d22..481d566 100644
--- a/block.c
+++ b/block.c
@@ -90,6 +90,9 @@ static int coroutine_fn
bdrv_co_do_write_zeroes(BlockDriverState *bs,
static QTAILQ_HEAD(, BlockDriverState) bdrv_states =
QTAILQ_HEAD_INITIALIZER(bdrv_states);
+static QTAILQ_HEAD(, BlockDriverState) graph_bdrv_states =
+QTAILQ_HEAD_INITIALIZER(graph_bdrv_states);
+
static QLIST_HEAD(, BlockDriver) bdrv_drivers =
QLIST_HEAD_INITIALIZER(bdrv_drivers);
@@ -327,7 +330,7 @@ BlockDriverState *bdrv_new(const char *device_name)
QLIST_INIT(&bs->dirty_bitmaps);
pstrcpy(bs->device_name, sizeof(bs->device_name), device_name);
if (device_name[0] != '\0') {
-QTAILQ_INSERT_TAIL(&bdrv_states, bs, list);
+QTAILQ_INSERT_TAIL(&bdrv_states, bs, device_list);
}
bdrv_iostatus_disable(bs);
notifier_list_init(&bs->close_notifiers);
@@ -1501,7 +1504,7 @@ void bdrv_close_all(void)
{
BlockDriverState *bs;
-QTAILQ_FOREACH(bs, &bdrv_states, list) {
+QTAILQ_FOREACH(bs, &bdrv_states, device_list) {
bdrv_close(bs);
}
}
@@ -1530,7 +1533,7 @@ static bool bdrv_requests_pending(BlockDriverState *bs)
static bool bdrv_requests_pending_all(void)
{
BlockDriverState *bs;
-QTAILQ_FOREACH(bs, &bdrv_states, list) {
+QTAILQ_FOREACH(bs, &bdrv_states, device_list) {
if (bdrv_requests_pending(bs)) {
return true;
}
@@ -1557,7 +1560,7 @@ void bdrv_drain_all(void)
BlockDriverState *bs;
while (busy) {
-QTAILQ_FOREACH(bs, &bdrv_states, list) {
+QTAILQ_FOREACH(bs, &bdrv_states, device_list) {
bdrv_start_throttled_reqs(bs);
}
@@ -1566,14 +1569,19 @@ void bdrv_drain_all(void)
}
}
-/* make a BlockDriverState anonymous by removing from bdrv_state list.
+/* make a BlockDriverState anonymous by removing from bdrv_state and
+ * graph_bdrv_state list.
Also, NULL terminate the device_name to prevent double remove */
void bdrv_make_anon(BlockDriverState *bs)
{
if (bs->device_name[0] != '\0') {
-QTAILQ_REMOVE(&bdrv_states, bs, list);
+QTAILQ_REMOVE(&bdrv_states, bs, device_list);
}
bs->device_name[0] = '\0';
+if (bs->node_name[0] != '\0') {
+QTAILQ_REMOVE(&graph_bdrv_states, bs, node_list);
+}
+bs->node_name[0] = '\0';
}
static void bdrv_rebind(BlockDriverState *bs)
@@ -1627,7 +1635,12 @@ static void bdrv_move_feature_fields(BlockDriverState
*bs_dest,
/* keep the same entry in bdrv_states */
pstrcpy(bs_dest->device_name, sizeof(bs_dest->device_name),
bs_src->device_name);
-bs_dest->list = bs_src->list;
+bs_dest->device_list = bs_src->device_list;
+
+/* keep the same entry in graph_bdrv_states
+ * We do want to swap name but don't want to swap linked list entries
+ */
+bs_dest->node_list = bs_src->node_list;
}
/*
@@ -1952,7 +1965,7 @@ int bdrv_commit_all(void)
{
BlockDriverState *bs;
-QTAILQ_FOREACH(bs, &bdrv_states, list) {
+QTAILQ_FOREACH(bs, &bdrv_states, device_list) {
if (bs->drv && bs->backing_hd) {
int ret = bdrv_commit(bs);
if (ret < 0) {
@@ -3110,11 +3123,12 @@ void bdrv_iterate_format(void (*it)(void *opaque, const
char *name),
}
}
+/* This function is to find block backend bs */
BlockDriverState *bdrv_find(const char *name)
{
BlockDriverState *bs;
-QTAILQ_FOREACH(bs, &bdrv_states, list) {
+QTAILQ_FOREACH(bs, &bdrv_states, device_list) {
if (!strcmp(name, bs->device_name)) {
return bs;
}
@@ -3122,19 +3136,34 @@ BlockDriverState *bdrv_find(const char *name)
return NULL;
}
+/* This function is to find a node in the bs graph */
+BlockDriverState *bdrv_find_node(const char *node_name)
+{
+BlockDriverState *bs;
+
+assert(node_name);
+
+QTAILQ_FOREACH(bs, &graph_bdrv_states, node_list) {
+if (!strcmp(node_name, bs->node_name)) {
+return bs;
+}
+}
+return NULL;
+}
+
BlockDriverState *bdrv_next(BlockDriverState *bs)
{
if (!bs) {
return QTAILQ_FIRST(&bdrv_states);
}
-return QTAILQ_NEXT(bs, list);
+return QTAILQ_NEXT(bs, device_list);
}
void bdrv_iterate(void (*it)(void *opaque, BlockDriverState *bs), void *opaque)
{
BlockDriverState *bs;
-QTAILQ_FOREACH(bs, &bdrv_states, list) {
+QTAILQ_FOREACH(bs, &bdrv_states, device_list) {
it(opaque, bs);
}
}
@@ -3154,7 +3183,7 @@ int bdrv_flush_all(void)
BlockDriverState *bs;
int result = 0;
-QTAILQ_FOREACH(bs, &bdrv_states, list) {
+QTAILQ_FOREACH(bs, &bdrv_states, devi
[Qemu-devel] [PATCH V5 2/7] block: Allow the user to define "node-name" option.
Signed-off-by: Benoit Canet
---
block.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/block.c b/block.c
index 481d566..1c57f0d 100644
--- a/block.c
+++ b/block.c
@@ -735,6 +735,39 @@ static int bdrv_open_flags(BlockDriverState *bs, int flags)
return open_flags;
}
+static int bdrv_get_node_name(BlockDriverState *bs,
+ QDict *options,
+ Error **errp)
+{
+const char *node_name = NULL;
+
+node_name = qdict_get_try_str(options, "node-name");
+
+if (!node_name) {
+return 0;
+}
+
+/* empty string node name is invalid */
+if (node_name[0] == '\0') {
+error_setg(errp, "Empty node name");
+return -EINVAL;
+}
+
+/* takes care of avoiding duplicates node names */
+if (bdrv_find_node(node_name)) {
+error_setg(errp, "Duplicate node name");
+return -EINVAL;
+}
+
+/* copy node name into the bs and insert it into the graph list */
+pstrcpy(bs->node_name, sizeof(bs->node_name), node_name);
+QTAILQ_INSERT_TAIL(&graph_bdrv_states, bs, node_list);
+
+qdict_del(options, "node-name");
+
+return 0;
+}
+
/*
* Common part for opening disk images and files
*
@@ -759,6 +792,11 @@ static int bdrv_open_common(BlockDriverState *bs,
BlockDriverState *file,
trace_bdrv_open_common(bs, filename ?: "", flags, drv->format_name);
+ret = bdrv_get_node_name(bs, options, errp);
+if (ret < 0) {
+return ret;
+}
+
/* bdrv_open() with directly using a protocol as drv. This layer is already
* opened, so assign it to bs (while file becomes a closed
BlockDriverState)
* and return immediately. */
--
1.8.3.2
[Qemu-devel] [PATCH V5 0/7] Giving names to BlockDriverState graph nodes
v5: block empty node names [Kevin] factorize setting of node-name option [Kevin] NULL terminate node_name on removal [Kevin] make query-named-block-nodes return BlockDeviceInfo structure [Eric] Change some doc in query-named-block-nodes [Eric] Document the choice of the QMP API for node name [Eric] Use the same authorization as snapshot on block resize [Kevin] Rebase the series [Kevin] Benoît Canet (7): block: Add bs->node_name to hold the name of a bs node of the bs graph. block: Allow the user to define "node-name" option. qmp: Add a command to list the named BlockDriverState nodes. qmp: Allow to change password on named block driver states. block: Create authorizations mechanism for external snapshot and resize. qmp: Allow block_resize to manipulate bs graph nodes. qmp: Allow to take external snapshots on bs graphs node. block.c | 210 +- block/blkverify.c | 2 +- block/qapi.c | 109 blockdev.c| 93 hmp.c | 8 +- include/block/block.h | 23 +++-- include/block/block_int.h | 21 - include/block/qapi.h | 1 + qapi-schema.json | 48 +-- qmp-commands.hx | 78 - 10 files changed, 471 insertions(+), 122 deletions(-) -- 1.8.3.2
Re: [Qemu-devel] [Spice-devel] Vdagent not working on xen linux hvm DomUs
On Thu, Dec 12, 2013 at 02:10:23PM +0100, Fabio Fantoni wrote: [...] > I did some other tests, I narrowed down the commit range to the one between: > > commit c9fea5d701f8fd33f0843728ec264d95cee3ed37 Mon, 22 Jul 2013 > 15:14:18 (Merge remote-tracking branch 'bonzini/iommu-for-anthony') > where there is virtio net regression with xen > > and > > commit962b03fcf509db25c847aa67c4eff574c240dcfe Thu, 4 Jul 2013 > 15:42:43 + (xen: Mark fixed platform I/O as unaligned) > where virtio net is working > > I also tested: > commit 2562becfc126ed7678c662ee23b7c1fe135d8966 Mon, 15 Jul 2013 > 19:02:41 + > and > commit dcb117bfda5af6f6ceb7231778d36d8bce4aee93 Thu, 4 Jul 2013 > 15:42:46 + > but qemu crashes on xl create for another error and I haven't found > which is the commit to apply with git cherry-pick so that I can > check if the virtio net regression is present. > > Can someone help me please? > > I added also qemu-devel to cc. > I did a quick test with Xen's QEMU, currently at commit 1c514a7734b7f98625a0d18d5e8ee7581f26e50c Merge: 79c097d 35bdc13 Author: Stefano Stabellini Date: Tue Jun 25 11:34:24 2013 + Merge remote branch 'perard/cpu-hotplug-port-v2' into xen-staging-master-7 from git://xenbits.xen.org/qemu-upstream-unstable.git My guest is Squeeze with stock kernel 2.6.32. vif=['model=virtio-net-pci,bridge=xenbr0'] No pci=nomsi in guest kernel command line. Everything worked fine. And /proc/interrupts shows that it's indeed using MSI for virtio PCI. I'm kind of confused. (And in the long run of this thread I probably didn't remember everything.) Wei. > Thanks for any reply.
[Qemu-devel] Fwd: [sheepdog] Call to sd_truncate()
Hello everyone,
I am having trouble with my qemu guests. I am facing buffer input output
errors on the guests' kernel log:
[TIMESTAMP] Buffer I/O error on device vda1, logical block XX
[TIMESTAMP] end_request: I/O error, dev vda, sector XX
I am also reading in the qemu log:
qemu-system-x86_64: shrinking is not supported
I traced this message to the block driver I am using (sheepdog):
static int sd_truncate(BlockDriverState *bs, int64_t offset)
{
BDRVSheepdogState *s = bs->opaque;
int ret, fd;
unsigned int datalen;
if (offset < s->inode.vdi_size) {
error_report("shrinking is not supported");
return -EINVAL;
} else if (offset > SD_MAX_VDI_SIZE) {
error_report("too big image size");
return -EINVAL;
}
fd = connect_to_sdog(s);
if (fd < 0) {
return fd;
}
...
}
This function is called as the .bdrv_truncate function. I already asked
people on sheepdog about what could cause calls to this function but as far
as they know, only qemu-img resize could call this function.
I am using libvirt as well.
Does anyone have a clue?
Thanks,
Hadrien Kohl
-- Forwarded message --
From: Liu Yuan
Date: 2013/12/12
Subject: Re: [sheepdog] Call to sd_truncate()
To: Hadrien KOHL
Cc: sheep...@lists.wpkg.org
On Thu, Dec 12, 2013 at 11:36:06AM +0100, Hadrien KOHL wrote:
> Hi,
>
> Thanks, that's interesting. I don't have any component I can think of that
> does this though.
> Could it be possible that the kernel/filesystem of the host is doing it on
> it's own?
>
IMO only 'qemu-img resize'(probably libvirt has similar function) and
'dog vdi resize' can resize the volume.
But any higher component in QEMU might call .bdrv_truncate() too, which is
out
of my cscope. I'd suggest you ask the qemu list that anyone else execept
'qemu-img resize' would call .bdrv_truncate() while VM is running.
Thanks
Yuan
[Qemu-devel] [PATCH] trace: add glib 2.32+ static GMutex support
The GStaticMutex API was deprecated in glib 2.32. We cannot switch over
to GMutex unconditionally since we would drop support for older glib
versions. But the deprecated API warnings during build are annoying so
use static GMutex when possible.
Signed-off-by: Stefan Hajnoczi
---
trace/simple.c | 45 ++---
1 file changed, 38 insertions(+), 7 deletions(-)
diff --git a/trace/simple.c b/trace/simple.c
index 1e3f691..941f7ea 100644
--- a/trace/simple.c
+++ b/trace/simple.c
@@ -39,7 +39,11 @@
* Trace records are written out by a dedicated thread. The thread waits for
* records to become available, writes them out, and then waits again.
*/
+#if GLIB_CHECK_VERSION(2, 32, 0)
+static GMutex trace_lock;
+#else
static GStaticMutex trace_lock = G_STATIC_MUTEX_INIT;
+#endif
/* g_cond_new() was deprecated in glib 2.31 but we still need to support it */
#if GLIB_CHECK_VERSION(2, 31, 0)
@@ -86,6 +90,34 @@ typedef struct {
static void read_from_buffer(unsigned int idx, void *dataptr, size_t size);
static unsigned int write_to_buffer(unsigned int idx, void *dataptr, size_t
size);
+/* Hide changes in glib mutex APIs */
+static void lock_trace_lock(void)
+{
+#if GLIB_CHECK_VERSION(2, 32, 0)
+g_mutex_lock(&trace_lock);
+#else
+g_static_mutex_lock(&trace_lock);
+#endif
+}
+
+static void unlock_trace_lock(void)
+{
+#if GLIB_CHECK_VERSION(2, 32, 0)
+g_mutex_unlock(&trace_lock);
+#else
+g_static_mutex_unlock(&trace_lock);
+#endif
+}
+
+static GMutex *get_trace_lock_mutex(void)
+{
+#if GLIB_CHECK_VERSION(2, 32, 0)
+return &trace_lock;
+#else
+return g_static_mutex_get_mutex(&trace_lock);
+#endif
+}
+
static void clear_buffer_range(unsigned int idx, size_t len)
{
uint32_t num = 0;
@@ -139,27 +171,26 @@ static bool get_trace_record(unsigned int idx,
TraceRecord **recordptr)
*/
static void flush_trace_file(bool wait)
{
-g_static_mutex_lock(&trace_lock);
+lock_trace_lock();
trace_available = true;
g_cond_signal(trace_available_cond);
if (wait) {
-g_cond_wait(trace_empty_cond, g_static_mutex_get_mutex(&trace_lock));
+g_cond_wait(trace_empty_cond, get_trace_lock_mutex());
}
-g_static_mutex_unlock(&trace_lock);
+unlock_trace_lock();
}
static void wait_for_trace_records_available(void)
{
-g_static_mutex_lock(&trace_lock);
+lock_trace_lock();
while (!(trace_available && trace_writeout_enabled)) {
g_cond_signal(trace_empty_cond);
-g_cond_wait(trace_available_cond,
-g_static_mutex_get_mutex(&trace_lock));
+g_cond_wait(trace_available_cond, get_trace_lock_mutex());
}
trace_available = false;
-g_static_mutex_unlock(&trace_lock);
+unlock_trace_lock();
}
static gpointer writeout_thread(gpointer opaque)
--
1.8.4.2
Re: [Qemu-devel] [PATCH v2 10/14] pci: allow 0 address for PCI IO regions
On Thu, Dec 05, 2013 at 11:33:48PM +, Peter Maydell wrote: > On 5 December 2013 22:33, Michael Roth wrote: > > Some kernels program a 0 address for io regions. PCI 3.0 spec > > sectio 6.2.5.1 doesn't seem to disallow this. > > Hmm. The last PCI spec I looked at said 0 wasn't a valid MMIO > address, so the variant of this patch I wrote a while back made it > a per PCI device flag whether a particular device let you get away > with it: > http://patchwork.ozlabs.org/patch/269133/ > > (the device in question for me was the versatile-pci host bridge). > > And presumably whoever put that specific check for 0 into > QEMU had a reason for it. It used to be the case that if you created a conflicting value for the BAR, you corrupted dispatch tables forever. Now that dispatch tables are rebuilt on any change that is less of an issue, but maybe that code is there to handle that, e.g. to avoid conflictig with apic or other non pci devices. > On the other hand I can't now find whatever document it was > that I was reading that claimed 0 wasn't valid :-( > > thanks > -- PMM
