[Qemu-devel] [PULL v2 for-2.0 16/24] qcow2: Keep option in qcow2_invalidate_cache()
From: Kevin Wolf kw...@redhat.com Instead of manually building a list of all options from BDRVQcowState values just reuse the options that were used to open the image. qcow2_open() won't fully use all of the options in the QDict, but that's okay. This fixes all of the driver-specific options in qcow2, except for lazy-refcounts, which was special cased before. Signed-off-by: Kevin Wolf kw...@redhat.com Reviewed-by: Max Reitz mre...@redhat.com Signed-off-by: Stefan Hajnoczi stefa...@redhat.com --- block/qcow2.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/block/qcow2.c b/block/qcow2.c index b5b1e8c..ec23cc4 100644 --- a/block/qcow2.c +++ b/block/qcow2.c @@ -1178,11 +1178,8 @@ static void qcow2_invalidate_cache(BlockDriverState *bs) bdrv_invalidate_cache(bs-file); -options = qdict_new(); -qdict_put(options, QCOW2_OPT_LAZY_REFCOUNTS, - qbool_from_int(s-use_lazy_refcounts)); - memset(s, 0, sizeof(BDRVQcowState)); +options = qdict_clone_shallow(bs-options); qcow2_open(bs, options, flags, NULL); QDECREF(options); -- 1.8.5.3
Re: [Qemu-devel] [PULL for-2.0-rc0 0/6] PowerPC patch queue 2014-03-13
On 13 March 2014 02:53, Andreas Färber afaer...@suse.de wrote: Hello Peter, Please pull the PowerPC queue into qemu.git master. Regards, Andreas Cc: Peter Maydell peter.mayd...@linaro.org Cc: qemu-...@nongnu.org Cc: Alexander Graf ag...@suse.de Cc: Alexey Kardashevskiy a...@ozlabs.ru Cc: Paolo Bonzini pbonz...@redhat.com The following changes since commit 2c3445bb850fbfb4481e9487d8852f10e8c74e4c: Merge remote-tracking branch 'remotes/kiszka/queues/slirp' into staging (2014-03-12 12:47:26 +) are available in the git repository at: git://github.com/afaerber/qemu-cpu.git tags/ppc-for-2.0 for you to fetch changes up to 295d51aa6a0d3b9a97200913f58a4d8b0c53ac42: spapr-pci: Convert fprintf() to error_report() (2014-03-13 03:49:48 +0100) Applied, thanks. -- PMM
[Qemu-devel] Building QMP in qemu-nbd
Hi, I want to make qemu-nbd QMP aware so the cloud stack my customer work on could start lxc containers with qcow2 KVM images and still benefit from the quorum and snapshot goodness. Stefan mentioned the nice idea of splitting qapi-schema.json in small files in a subdirectory so qemu-nbd could use only the block related commands. Eric: What do you think of this idea ? Do you have variants of this idea ? Best regards Benoît
Re: [Qemu-devel] SMBIOS vs. NUMA (was: Build full type 19 tables)
On Thu, Mar 13, 2014 at 09:04:52AM +0100, Gerd Hoffmann wrote: Should we just assert((ram_size 10) 0x8000), and officially limit guests to 2T ? No. Not fully sure what reasonable behavier would be in case more than 2T are present. I guess either not generating type16 entries at all or simply fill in the maximum value we can represent. Well, there's an extended maximum capacity field available starting with smbios v2.7, which is an uint64_t counting bytes. Bumping the few other types up to 2.7 shouldn't be too onerous, but I have no idea how well the various currently supported OSs would react to smbios suddenly going v2.7... Then, a type20 node is assigned to the sub-4G portion of the first Type17 device, and another type20 node is assigned to the over-4G portion of the same. From then on, type20 nodes correspond to the rest of the 16G-or-less type17 devices pretty much on a 1:1 basis. Hmm, not sure why type20 entries are handled the way they are. I think it would make more sense to have one type20 entry per e820 ram entry, similar to type19. Type20 entries have pointers to type17 (memory_device_handle) and type19 (memory_array_mapped_address_handle). Which, if you turn it upside down could be interpreted as every type 17 dimm needs (at least) a type20 device mapped address to point at it. If the e820 table will contain more than just two E820_RAM entries, and therefore we'll have more than the two Type19 nodes on the bottom row, what are the rules for extending the rest of the figure accordingly (i.e. how do we hook together more Type17 and Type20 nodes to go along with the extra Type19 nodes) ? See above for type19+20. type17 represents the dimms, so where the memory is actually mapped doesn't matter there. Lets simply sum up all memory, then split into 16g pieces and create a type17 entry for each piece. At least initially. That's pretty much what happens now. If we decide to use e820 instead of simply (below_4g, above_4g), I'd like add some sort of assertion that would alert anyone who might start adding extra entries into e820 beyond the current two (below_4g and above_4g) :) As further improvement we could make the dimm size configurable, so if you have a 4 node numa machine with 4g ram on each node you can present 4 virtual 4g ram dimms to the guest instead of a single 16g dimm. But that is clearly beyond the scope of the initial revision ... Minimum number of largest-possible power-of-two dimms per node, given the size of RAM assigned to each node. Then we'd basically just replicate the figure laterally, one instance per node (perhaps keeping a common T16 on top, but having one T19 at the bottom per node, and one T17,T20 pair per DIMM): t16 --- t17 t17 ... t17 t17 t17 ... t17 ... t17 t17 ... t17 t20 t20 ... t20 t20 t20 ... t20 ... t20 t20 ... t20 - - - t19 t19 t19 (node 0) (node 1) (node N) Would the 4G boundary issue still occur on a NUMA system (i.e., would node 0 have two t19s, and two t20s for the first t17, just like my current picture)? Do NUMA systems even have (or need) a smbios table ? :) But I agree, this shouldn't have to be sorted out right away :) --Gabriel
[Qemu-devel] [PULL v2 for-2.0 10/24] iothread: add I/O thread object
This is a stand-in for Michael Roth's QContext. I expect this to be
replaced once QContext is completed.
The IOThread object is an AioContext event loop thread. This patch adds
the concept of multiple event loop threads, allowing users to define
them.
When SMP guests run on SMP hosts it makes sense to instantiate multiple
IOThreads. This spreads event loop processing across multiple cores.
Note that additional patches are required to actually bind a device to
an IOThread.
[Andreas Färber afaer...@suse.de pointed out that the embedded parent
object instance should be called parent_obj and have a newline
afterwards. This patch has been changed to reflect this.
-- Stefan]
Signed-off-by: Stefan Hajnoczi stefa...@redhat.com
---
Makefile.objs | 1 +
include/sysemu/iothread.h | 30
iothread.c| 120 ++
3 files changed, 151 insertions(+)
create mode 100644 include/sysemu/iothread.h
create mode 100644 iothread.c
diff --git a/Makefile.objs b/Makefile.objs
index 5cd3d81..a6e0e2a 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -39,6 +39,7 @@ libcacard-y += libcacard/vcardt.o
ifeq ($(CONFIG_SOFTMMU),y)
common-obj-y = blockdev.o blockdev-nbd.o block/
+common-obj-y += iothread.o
common-obj-y += net/
common-obj-y += qdev-monitor.o device-hotplug.o
common-obj-$(CONFIG_WIN32) += os-win32.o
diff --git a/include/sysemu/iothread.h b/include/sysemu/iothread.h
new file mode 100644
index 000..a32214a
--- /dev/null
+++ b/include/sysemu/iothread.h
@@ -0,0 +1,30 @@
+/*
+ * Event loop thread
+ *
+ * Copyright Red Hat Inc., 2013
+ *
+ * Authors:
+ * Stefan Hajnoczi stefa...@redhat.com
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
+
+#ifndef IOTHREAD_H
+#define IOTHREAD_H
+
+#include block/aio.h
+
+#define TYPE_IOTHREAD iothread
+
+typedef struct IOThread IOThread;
+
+#define IOTHREAD(obj) \
+ OBJECT_CHECK(IOThread, obj, TYPE_IOTHREAD)
+
+IOThread *iothread_find(const char *id);
+char *iothread_get_id(IOThread *iothread);
+AioContext *iothread_get_aio_context(IOThread *iothread);
+
+#endif /* IOTHREAD_H */
diff --git a/iothread.c b/iothread.c
new file mode 100644
index 000..f263ee2
--- /dev/null
+++ b/iothread.c
@@ -0,0 +1,120 @@
+/*
+ * Event loop thread
+ *
+ * Copyright Red Hat Inc., 2013
+ *
+ * Authors:
+ * Stefan Hajnoczi stefa...@redhat.com
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
+
+#include qom/object.h
+#include qom/object_interfaces.h
+#include qemu/module.h
+#include qemu/thread.h
+#include block/aio.h
+#include sysemu/iothread.h
+
+#define IOTHREADS_PATH /objects
+
+typedef ObjectClass IOThreadClass;
+struct IOThread {
+Object parent_obj;
+
+QemuThread thread;
+AioContext *ctx;
+bool stopping;
+};
+
+#define IOTHREAD_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(IOThreadClass, obj, TYPE_IOTHREAD)
+#define IOTHREAD_CLASS(klass) \
+ OBJECT_CLASS_CHECK(IOThreadClass, klass, TYPE_IOTHREAD)
+
+static void *iothread_run(void *opaque)
+{
+IOThread *iothread = opaque;
+
+while (!iothread-stopping) {
+aio_context_acquire(iothread-ctx);
+while (!iothread-stopping aio_poll(iothread-ctx, true)) {
+/* Progress was made, keep going */
+}
+aio_context_release(iothread-ctx);
+}
+return NULL;
+}
+
+static void iothread_instance_finalize(Object *obj)
+{
+IOThread *iothread = IOTHREAD(obj);
+
+iothread-stopping = true;
+aio_notify(iothread-ctx);
+qemu_thread_join(iothread-thread);
+aio_context_unref(iothread-ctx);
+}
+
+static void iothread_complete(UserCreatable *obj, Error **errp)
+{
+IOThread *iothread = IOTHREAD(obj);
+
+iothread-stopping = false;
+iothread-ctx = aio_context_new();
+
+/* This assumes we are called from a thread with useful CPU affinity for us
+ * to inherit.
+ */
+qemu_thread_create(iothread-thread, iothread, iothread_run,
+ iothread, QEMU_THREAD_JOINABLE);
+}
+
+static void iothread_class_init(ObjectClass *klass, void *class_data)
+{
+UserCreatableClass *ucc = USER_CREATABLE_CLASS(klass);
+ucc-complete = iothread_complete;
+}
+
+static const TypeInfo iothread_info = {
+.name = TYPE_IOTHREAD,
+.parent = TYPE_OBJECT,
+.class_init = iothread_class_init,
+.instance_size = sizeof(IOThread),
+.instance_finalize = iothread_instance_finalize,
+.interfaces = (InterfaceInfo[]) {
+{TYPE_USER_CREATABLE},
+{}
+},
+};
+
+static void iothread_register_types(void)
+{
+type_register_static(iothread_info);
+}
+
+type_init(iothread_register_types)
+
+IOThread *iothread_find(const char *id)
+{
+Object *container = container_get(object_get_root(), IOTHREADS_PATH);
+Object *child;
+
+child =
[Qemu-devel] [PULL for-2.0-rc0 03/58] target-arm: Clean up ENV_GET_CPU() usage
Commits ab1da85791340e504d10487e1add81b9988afa98,
fdfba1a298ae26dd44bcfdb0429314139a0bc55a,
2c17449b3022ca9623c4a7e2a504a4150ac4ad30 added usages of ENV_GET_CPU()
macro to target-specific code.
Use arm_env_get_cpu() instead and enforce separating variable
declarations.
Cc: Edgar E. Iglesias edgar.igles...@xilinx.com
Cc: Peter Maydell peter.mayd...@linaro.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-arm/helper.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index f65cbac..a40f60f 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2762,15 +2762,17 @@ void switch_mode(CPUARMState *env, int mode)
static void v7m_push(CPUARMState *env, uint32_t val)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(arm_env_get_cpu(env));
+
env-regs[13] -= 4;
stl_phys(cs-as, env-regs[13], val);
}
static uint32_t v7m_pop(CPUARMState *env)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(arm_env_get_cpu(env));
uint32_t val;
+
val = ldl_phys(cs-as, env-regs[13]);
env-regs[13] += 4;
return val;
@@ -3134,7 +3136,7 @@ static int get_phys_addr_v5(CPUARMState *env, uint32_t
address, int access_type,
int is_user, hwaddr *phys_ptr,
int *prot, target_ulong *page_size)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(arm_env_get_cpu(env));
int code;
uint32_t table;
uint32_t desc;
@@ -3230,7 +3232,7 @@ static int get_phys_addr_v6(CPUARMState *env, uint32_t
address, int access_type,
int is_user, hwaddr *phys_ptr,
int *prot, target_ulong *page_size)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(arm_env_get_cpu(env));
int code;
uint32_t table;
uint32_t desc;
@@ -3353,7 +3355,7 @@ static int get_phys_addr_lpae(CPUARMState *env, uint32_t
address,
hwaddr *phys_ptr, int *prot,
target_ulong *page_size_ptr)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(arm_env_get_cpu(env));
/* Read an LPAE long-descriptor translation table. */
MMUFaultType fault_type = translation_fault;
uint32_t level = 1;
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 01/58] cpu: Don't clear cpu-exit_request on reset
From: Edgar E. Iglesias edgar.igles...@xilinx.com cpu-exit_request is part of the execution environment and should not be cleared when a CPU resets. Otherwise, we might deadlock QEMU if a CPU resets while there is I/O going on. Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com Reviewed-by: Peter Maydell peter.mayd...@linaro.org Signed-off-by: Andreas Färber afaer...@suse.de --- qom/cpu.c | 1 - 1 file changed, 1 deletion(-) diff --git a/qom/cpu.c b/qom/cpu.c index 9d62479..40d82dd 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -195,7 +195,6 @@ static void cpu_common_reset(CPUState *cpu) log_cpu_state(cpu, cc-reset_dump_flags); } -cpu-exit_request = 0; cpu-interrupt_request = 0; cpu-current_tb = NULL; cpu-halted = 0; -- 1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 07/58] target-sparc: Clean up ENV_GET_CPU() usage
Commits fdfba1a298ae26dd44bcfdb0429314139a0bc55a,
2c17449b3022ca9623c4a7e2a504a4150ac4ad30 and
f606604f1c10b60ef294f1b9b229426521a365e3 added usages of ENV_GET_CPU()
macro in target-specific code.
Use sparc_env_get_cpu() instead and reuse the variables.
Cc: Edgar E. Iglesias edgar.igles...@xilinx.com
Cc: Peter Maydell peter.mayd...@linaro.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-sparc/ldst_helper.c | 17 +++--
target-sparc/mmu_helper.c | 4 ++--
2 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index 32491b4..45ed154 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -447,7 +447,7 @@ static uint64_t leon3_cache_control_ld(CPUSPARCState *env,
target_ulong addr,
uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int
size,
int sign)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(sparc_env_get_cpu(env));
uint64_t ret = 0;
#if defined(DEBUG_MXCC) || defined(DEBUG_ASI)
uint32_t last_addr = addr;
@@ -688,8 +688,7 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong
addr, int asi, int size,
break;
case 8: /* User code access, XXX */
default:
-cpu_unassigned_access(CPU(sparc_env_get_cpu(env)),
- addr, false, false, asi, size);
+cpu_unassigned_access(cs, addr, false, false, asi, size);
ret = 0;
break;
}
@@ -717,7 +716,7 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong
addr, int asi, int size,
void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int
asi,
int size)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(sparc_env_get_cpu(env));
helper_check_align(env, addr, size - 1);
switch (asi) {
case 2: /* SuperSparc MXCC registers and Leon3 cache control */
@@ -1292,7 +1291,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
target_ulong val,
uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int
size,
int sign)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(sparc_env_get_cpu(env));
uint64_t ret = 0;
#if defined(DEBUG_ASI)
target_ulong last_addr = addr;
@@ -1605,8 +1604,7 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong
addr, int asi, int size,
case 0x5f: /* D-MMU demap, WO */
case 0x77: /* Interrupt vector, WO */
default:
-cpu_unassigned_access(CPU(sparc_env_get_cpu(env)),
- addr, false, false, 1, size);
+cpu_unassigned_access(cs, addr, false, false, 1, size);
ret = 0;
break;
}
@@ -1662,7 +1660,7 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong
addr, int asi, int size,
void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
int asi, int size)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(sparc_env_get_cpu(env));
#ifdef DEBUG_ASI
dump_asi(write, addr, asi, size, val);
#endif
@@ -2040,8 +2038,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
target_ulong val,
case 0x8a: /* Primary no-fault LE, RO */
case 0x8b: /* Secondary no-fault LE, RO */
default:
-cpu_unassigned_access(CPU(sparc_env_get_cpu(env)),
- addr, true, false, 1, size);
+cpu_unassigned_access(cs, addr, true, false, 1, size);
return;
}
}
diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c
index 5fc2fd6..511eb7e 100644
--- a/target-sparc/mmu_helper.c
+++ b/target-sparc/mmu_helper.c
@@ -86,7 +86,7 @@ static int get_physical_address(CPUSPARCState *env, hwaddr
*physical,
uint32_t pde;
int error_code = 0, is_dirty, is_user;
unsigned long page_offset;
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(sparc_env_get_cpu(env));
is_user = mmu_idx == MMU_USER_IDX;
@@ -245,7 +245,7 @@ int cpu_sparc_handle_mmu_fault(CPUSPARCState *env,
target_ulong address, int rw,
target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(sparc_env_get_cpu(env));
hwaddr pde_ptr;
uint32_t pde;
--
1.8.4.5
[Qemu-devel] [PULL v2 for-2.0 17/24] qcow2: Don't write with BDRV_O_INCOMING
From: Kevin Wolf kw...@redhat.com
qcow2_open() causes writes when repairing an image with the dirty flag
set and when clearing autoclear flags. It shouldn't do this when another
qemu instance is still actively working on this image file.
One effect of the bug is that images may have a cleared dirty flag while
the migration source host still has it in use with lazy refcounts
enabled, so refcounts are not accurate and the dirty flag must remain
set.
Signed-off-by: Kevin Wolf kw...@redhat.com
Reviewed-by: Eric Blake ebl...@redhat.com
Signed-off-by: Stefan Hajnoczi stefa...@redhat.com
---
block/qcow2.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/block/qcow2.c b/block/qcow2.c
index ec23cc4..945c9d6 100644
--- a/block/qcow2.c
+++ b/block/qcow2.c
@@ -644,7 +644,7 @@ static int qcow2_open(BlockDriverState *bs, QDict *options,
int flags,
}
/* Clear unknown autoclear feature bits */
-if (!bs-read_only s-autoclear_features != 0) {
+if (!bs-read_only !(flags BDRV_O_INCOMING) s-autoclear_features)
{
s-autoclear_features = 0;
ret = qcow2_update_header(bs);
if (ret 0) {
@@ -657,7 +657,7 @@ static int qcow2_open(BlockDriverState *bs, QDict *options,
int flags,
qemu_co_mutex_init(s-lock);
/* Repair image if dirty */
-if (!(flags BDRV_O_CHECK) !bs-read_only
+if (!(flags (BDRV_O_CHECK | BDRV_O_INCOMING)) !bs-read_only
(s-incompatible_features QCOW2_INCOMPAT_DIRTY)) {
BdrvCheckResult result = {0};
@@ -1137,10 +1137,12 @@ static void qcow2_close(BlockDriverState *bs)
/* else pre-write overlap checks in cache_destroy may crash */
s-l1_table = NULL;
-qcow2_cache_flush(bs, s-l2_table_cache);
-qcow2_cache_flush(bs, s-refcount_block_cache);
+if (!(bs-open_flags BDRV_O_INCOMING)) {
+qcow2_cache_flush(bs, s-l2_table_cache);
+qcow2_cache_flush(bs, s-refcount_block_cache);
-qcow2_mark_clean(bs);
+qcow2_mark_clean(bs);
+}
qcow2_cache_destroy(bs, s-l2_table_cache);
qcow2_cache_destroy(bs, s-refcount_block_cache);
--
1.8.5.3
[Qemu-devel] [PULL for-2.0-rc0 05/58] target-ppc: Clean up ENV_GET_CPU() usage
Commits fdfba1a298ae26dd44bcfdb0429314139a0bc55a,
ab1da85791340e504d10487e1add81b9988afa98,
f606604f1c10b60ef294f1b9b229426521a365e3 and
2c17449b3022ca9623c4a7e2a504a4150ac4ad30 added usages of ENV_GET_CPU()
macro in target-specific code.
Use ppc_env_get_cpu() instead.
Cc: Edgar E. Iglesias edgar.igles...@xilinx.com
Cc: Peter Maydell peter.mayd...@linaro.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
hw/ppc/ppc405_uc.c | 2 +-
hw/ppc/spapr_hcall.c| 6 +++---
target-ppc/mmu-hash32.h | 12
target-ppc/mmu-hash64.c | 2 +-
target-ppc/mmu-hash64.h | 6 --
5 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index ca520e8..54ba59e 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -44,7 +44,7 @@
ram_addr_t ppc405_set_bootinfo (CPUPPCState *env, ppc4xx_bd_info_t *bd,
uint32_t flags)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(ppc_env_get_cpu(env));
ram_addr_t bdloc;
int i, n;
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index d918780..1de82f8 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -356,7 +356,7 @@ static target_ulong h_set_dabr(PowerPCCPU *cpu,
sPAPREnvironment *spapr,
static target_ulong register_vpa(CPUPPCState *env, target_ulong vpa)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(ppc_env_get_cpu(env));
uint16_t size;
uint8_t tmp;
@@ -406,7 +406,7 @@ static target_ulong deregister_vpa(CPUPPCState *env,
target_ulong vpa)
static target_ulong register_slb_shadow(CPUPPCState *env, target_ulong addr)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(ppc_env_get_cpu(env));
uint32_t size;
if (addr == 0) {
@@ -442,7 +442,7 @@ static target_ulong deregister_slb_shadow(CPUPPCState *env,
target_ulong addr)
static target_ulong register_dtl(CPUPPCState *env, target_ulong addr)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(ppc_env_get_cpu(env));
uint32_t size;
if (addr == 0) {
diff --git a/target-ppc/mmu-hash32.h b/target-ppc/mmu-hash32.h
index 4671141..e193a6d 100644
--- a/target-ppc/mmu-hash32.h
+++ b/target-ppc/mmu-hash32.h
@@ -68,7 +68,8 @@ int ppc_hash32_handle_mmu_fault(CPUPPCState *env,
target_ulong address, int rw,
static inline target_ulong ppc_hash32_load_hpte0(CPUPPCState *env,
hwaddr pte_offset)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(ppc_env_get_cpu(env));
+
assert(!env-external_htab); /* Not supported on 32-bit for now */
return ldl_phys(cs-as, env-htab_base + pte_offset);
}
@@ -76,7 +77,8 @@ static inline target_ulong ppc_hash32_load_hpte0(CPUPPCState
*env,
static inline target_ulong ppc_hash32_load_hpte1(CPUPPCState *env,
hwaddr pte_offset)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(ppc_env_get_cpu(env));
+
assert(!env-external_htab); /* Not supported on 32-bit for now */
return ldl_phys(cs-as, env-htab_base + pte_offset + HASH_PTE_SIZE_32/2);
}
@@ -84,7 +86,8 @@ static inline target_ulong ppc_hash32_load_hpte1(CPUPPCState
*env,
static inline void ppc_hash32_store_hpte0(CPUPPCState *env,
hwaddr pte_offset, target_ulong pte0)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(ppc_env_get_cpu(env));
+
assert(!env-external_htab); /* Not supported on 32-bit for now */
stl_phys(cs-as, env-htab_base + pte_offset, pte0);
}
@@ -92,7 +95,8 @@ static inline void ppc_hash32_store_hpte0(CPUPPCState *env,
static inline void ppc_hash32_store_hpte1(CPUPPCState *env,
hwaddr pte_offset, target_ulong pte1)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(ppc_env_get_cpu(env));
+
assert(!env-external_htab); /* Not supported on 32-bit for now */
stl_phys(cs-as, env-htab_base + pte_offset + HASH_PTE_SIZE_32/2, pte1);
}
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index f2af4fb..438d0b7 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -608,7 +608,7 @@ void ppc_hash64_store_hpte(CPUPPCState *env,
target_ulong pte_index,
target_ulong pte0, target_ulong pte1)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(ppc_env_get_cpu(env));
if (kvmppc_kern_htab) {
return kvmppc_hash64_write_pte(env, pte_index, pte0, pte1);
diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
index 1746b3e..26f7341 100644
--- a/target-ppc/mmu-hash64.h
+++ b/target-ppc/mmu-hash64.h
@@ -85,8 +85,9 @@ void ppc_hash64_stop_access(uint64_t token);
static inline target_ulong ppc_hash64_load_hpte0(CPUPPCState *env,
uint64_t token, int index)
{
-CPUState *cs =
[Qemu-devel] [PULL v2 for-2.0 21/24] block/raw-posix: bdrv_parse_filename() for floppy
From: Max Reitz mre...@redhat.com
The host_floppy protocol driver should strip the host_floppy: prefix
from filenames if present.
Signed-off-by: Max Reitz mre...@redhat.com
Reviewed-by: Benoit Canet ben...@irqsave.net
Signed-off-by: Stefan Hajnoczi stefa...@redhat.com
---
block/raw-posix.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/block/raw-posix.c b/block/raw-posix.c
index ab32ff9..4b8c183 100644
--- a/block/raw-posix.c
+++ b/block/raw-posix.c
@@ -1844,6 +1844,15 @@ static BlockDriver bdrv_host_device = {
};
#ifdef __linux__
+static void floppy_parse_filename(const char *filename, QDict *options,
+ Error **errp)
+{
+/* The prefix is optional, just as for file. */
+strstart(filename, host_floppy:, filename);
+
+qdict_put_obj(options, filename, QOBJECT(qstring_from_str(filename)));
+}
+
static int floppy_open(BlockDriverState *bs, QDict *options, int flags,
Error **errp)
{
@@ -1949,6 +1958,7 @@ static BlockDriver bdrv_host_floppy = {
.instance_size = sizeof(BDRVRawState),
.bdrv_needs_filename = true,
.bdrv_probe_device = floppy_probe_device,
+.bdrv_parse_filename = floppy_parse_filename,
.bdrv_file_open = floppy_open,
.bdrv_close = raw_close,
.bdrv_reopen_prepare = raw_reopen_prepare,
--
1.8.5.3
[Qemu-devel] [PULL for-2.0-rc0 13/58] target-i386: Rename x86_def_t to X86CPUDefinition
From: Eduardo Habkost ehabk...@redhat.com
As the new X86CPU subclass code is going to change lots of the code
invoving x86_def_t, let's rename the struct to match coding style first.
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-i386/cpu.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index fa56b8a..24420f9 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -484,7 +484,7 @@ static void add_flagname_to_bitmaps(const char *flagname,
}
}
-typedef struct x86_def_t {
+typedef struct X86CPUDefinition {
const char *name;
uint32_t level;
uint32_t xlevel;
@@ -497,7 +497,7 @@ typedef struct x86_def_t {
FeatureWordArray features;
char model_id[48];
bool cache_info_passthrough;
-} x86_def_t;
+} X86CPUDefinition;
#define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
#define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
@@ -549,7 +549,7 @@ typedef struct x86_def_t {
/* built-in CPU model definitions
*/
-static x86_def_t builtin_x86_defs[] = {
+static X86CPUDefinition builtin_x86_defs[] = {
{
.name = qemu64,
.level = 4,
@@ -1108,7 +1108,7 @@ static x86_def_t builtin_x86_defs[] = {
void x86_cpu_compat_set_features(const char *cpu_model, FeatureWord w,
uint32_t feat_add, uint32_t feat_remove)
{
-x86_def_t *def;
+X86CPUDefinition *def;
int i;
for (i = 0; i ARRAY_SIZE(builtin_x86_defs); i++) {
def = builtin_x86_defs[i];
@@ -1134,12 +1134,12 @@ static int cpu_x86_fill_model_id(char *str)
return 0;
}
-/* Fill a x86_def_t struct with information about the host CPU, and
+/* Fill a X86CPUDefinition struct with information about the host CPU, and
* the CPU features supported by the host hardware + host kernel
*
* This function may be called only if KVM is enabled.
*/
-static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def)
+static void kvm_cpu_fill_host(X86CPUDefinition *x86_cpu_def)
{
KVMState *s = kvm_state;
uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
@@ -1582,10 +1582,10 @@ static PropertyInfo qdev_prop_spinlocks = {
.set = x86_set_hv_spinlocks,
};
-static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
+static int cpu_x86_find_by_name(X86CPU *cpu, X86CPUDefinition *x86_cpu_def,
const char *name)
{
-x86_def_t *def;
+X86CPUDefinition *def;
int i;
if (name == NULL) {
@@ -1753,7 +1753,7 @@ static void listflags(char *buf, int bufsize, uint32_t
fbits,
/* generate CPU information. */
void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
-x86_def_t *def;
+X86CPUDefinition *def;
char buf[256];
int i;
@@ -1780,7 +1780,7 @@ void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf)
CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp)
{
CpuDefinitionInfoList *cpu_list = NULL;
-x86_def_t *def;
+X86CPUDefinition *def;
int i;
for (i = 0; i ARRAY_SIZE(builtin_x86_defs); i++) {
@@ -1822,7 +1822,7 @@ static void filter_features_for_kvm(X86CPU *cpu)
static void x86_cpu_load_def(X86CPU *cpu, const char *name, Error **errp)
{
CPUX86State *env = cpu-env;
-x86_def_t def1, *def = def1;
+X86CPUDefinition def1, *def = def1;
memset(def, 0, sizeof(*def));
@@ -1849,7 +1849,7 @@ static void x86_cpu_load_def(X86CPU *cpu, const char
*name, Error **errp)
object_property_set_str(OBJECT(cpu), def-model_id, model-id, errp);
-/* Special cases not set in the x86_def_t structs: */
+/* Special cases not set in the X86CPUDefinition structs: */
if (kvm_enabled()) {
env-features[FEAT_KVM] |= kvm_default_features;
}
@@ -1971,7 +1971,7 @@ void x86_cpudef_setup(void)
static const char *model_with_versions[] = { qemu32, qemu64, athlon
};
for (i = 0; i ARRAY_SIZE(builtin_x86_defs); ++i) {
-x86_def_t *def = builtin_x86_defs[i];
+X86CPUDefinition *def = builtin_x86_defs[i];
/* Look for specific cpudef models that */
/* have the QEMU version in .model_id */
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 02/58] target-alpha: Clean up ENV_GET_CPU() usage
Commits 2c17449b3022ca9623c4a7e2a504a4150ac4ad30,
fdfba1a298ae26dd44bcfdb0429314139a0bc55a,
ab1da85791340e504d10487e1add81b9988afa98 and
f606604f1c10b60ef294f1b9b229426521a365e3 added usages of ENV_GET_CPU()
macro in target-specific code.
Use alpha_env_get_cpu() instead.
Cc: Edgar E. Iglesias edgar.igles...@xilinx.com
Cc: Peter Maydell peter.mayd...@linaro.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-alpha/helper.c | 2 +-
target-alpha/mem_helper.c | 16
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/target-alpha/helper.c b/target-alpha/helper.c
index 025fdaf..98ddcdf 100644
--- a/target-alpha/helper.c
+++ b/target-alpha/helper.c
@@ -213,7 +213,7 @@ static int get_physical_address(CPUAlphaState *env,
target_ulong addr,
int prot_need, int mmu_idx,
target_ulong *pphys, int *pprot)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(alpha_env_get_cpu(env));
target_long saddr = addr;
target_ulong phys = 0;
target_ulong L1pte, L2pte, L3pte;
diff --git a/target-alpha/mem_helper.c b/target-alpha/mem_helper.c
index ea58704..e1aba64 100644
--- a/target-alpha/mem_helper.c
+++ b/target-alpha/mem_helper.c
@@ -26,45 +26,45 @@
uint64_t helper_ldl_phys(CPUAlphaState *env, uint64_t p)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(alpha_env_get_cpu(env));
return (int32_t)ldl_phys(cs-as, p);
}
uint64_t helper_ldq_phys(CPUAlphaState *env, uint64_t p)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(alpha_env_get_cpu(env));
return ldq_phys(cs-as, p);
}
uint64_t helper_ldl_l_phys(CPUAlphaState *env, uint64_t p)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(alpha_env_get_cpu(env));
env-lock_addr = p;
return env-lock_value = (int32_t)ldl_phys(cs-as, p);
}
uint64_t helper_ldq_l_phys(CPUAlphaState *env, uint64_t p)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(alpha_env_get_cpu(env));
env-lock_addr = p;
return env-lock_value = ldq_phys(cs-as, p);
}
void helper_stl_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(alpha_env_get_cpu(env));
stl_phys(cs-as, p, v);
}
void helper_stq_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(alpha_env_get_cpu(env));
stq_phys(cs-as, p, v);
}
uint64_t helper_stl_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(alpha_env_get_cpu(env));
uint64_t ret = 0;
if (p == env-lock_addr) {
@@ -81,7 +81,7 @@ uint64_t helper_stl_c_phys(CPUAlphaState *env, uint64_t p,
uint64_t v)
uint64_t helper_stq_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(alpha_env_get_cpu(env));
uint64_t ret = 0;
if (p == env-lock_addr) {
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 15/58] target-i386: Make kvm_default_features an array
From: Eduardo Habkost ehabk...@redhat.com
We will later make the KVM-specific code affect other feature words,
too.
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
Acked-by: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-i386/cpu.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index b32baf0..17fe45e 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -358,17 +358,22 @@ typedef struct model_features_t {
FeatureWord feat_word;
} model_features_t;
-static uint32_t kvm_default_features = (1 KVM_FEATURE_CLOCKSOURCE) |
+/* KVM-specific features that are automatically added to all CPU models
+ * when KVM is enabled.
+ */
+static uint32_t kvm_default_features[FEATURE_WORDS] = {
+[FEAT_KVM] = (1 KVM_FEATURE_CLOCKSOURCE) |
(1 KVM_FEATURE_NOP_IO_DELAY) |
(1 KVM_FEATURE_CLOCKSOURCE2) |
(1 KVM_FEATURE_ASYNC_PF) |
(1 KVM_FEATURE_STEAL_TIME) |
(1 KVM_FEATURE_PV_EOI) |
-(1 KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
+(1 KVM_FEATURE_CLOCKSOURCE_STABLE_BIT),
+};
void disable_kvm_pv_eoi(void)
{
-kvm_default_features = ~(1UL KVM_FEATURE_PV_EOI);
+kvm_default_features[FEAT_KVM] = ~(1UL KVM_FEATURE_PV_EOI);
}
void host_cpuid(uint32_t function, uint32_t count,
@@ -1853,8 +1858,12 @@ static void x86_cpu_load_def(X86CPU *cpu, const char
*name, Error **errp)
/* Special cases not set in the X86CPUDefinition structs: */
if (kvm_enabled()) {
-env-features[FEAT_KVM] |= kvm_default_features;
+FeatureWord w;
+for (w = 0; w FEATURE_WORDS; w++) {
+env-features[w] |= kvm_default_features[w];
+}
}
+
env-features[FEAT_1_ECX] |= CPUID_EXT_HYPERVISOR;
/* sysenter isn't supported in compatibility mode on AMD,
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 11/58] target-i386: Rename cpu_x86_register() to x86_cpu_load_def()
From: Eduardo Habkost ehabk...@redhat.com
There isn't any kind of registration involved in cpu_x86_register()
anymore: it is simply looking up a CPU model name and loading the model
definition data into the X86CPU object. Rename it to x86_cpu_load_def()
to reflect what it does.
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-i386/cpu.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 5fb8a6d..241b4b2 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1817,7 +1817,9 @@ static void filter_features_for_kvm(X86CPU *cpu)
}
}
-static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp)
+/* Load CPU definition for a given CPU model name
+ */
+static void x86_cpu_load_def(X86CPU *cpu, const char *name, Error **errp)
{
CPUX86State *env = cpu-env;
x86_def_t def1, *def = def1;
@@ -1900,7 +1902,7 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState
*icc_bridge,
object_unref(OBJECT(cpu));
#endif
-cpu_x86_register(cpu, name, error);
+x86_cpu_load_def(cpu, name, error);
if (error) {
goto out;
}
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 16/58] target-i386: Introduce x86_cpu_compat_disable_kvm_features()
From: Eduardo Habkost ehabk...@redhat.com
Instead of the feature-specific disable_kvm_pv_eoi() function, create a
more general function that can be used to disable other feature bits in
machine-type compat code.
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
Acked-by: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
hw/i386/pc_piix.c | 6 +++---
target-i386/cpu.c | 4 ++--
target-i386/cpu.h | 4 ++--
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 5e1d2d3..5011c3a 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -299,7 +299,7 @@ static void pc_compat_1_3(QEMUMachineInitArgs *args)
static void pc_compat_1_2(QEMUMachineInitArgs *args)
{
pc_compat_1_3(args);
-disable_kvm_pv_eoi();
+x86_cpu_compat_disable_kvm_features(FEAT_KVM, KVM_FEATURE_PV_EOI);
}
static void pc_init_pci_1_7(QEMUMachineInitArgs *args)
@@ -345,7 +345,7 @@ static void pc_init_pci_no_kvmclock(QEMUMachineInitArgs
*args)
has_pci_info = false;
has_acpi_build = false;
smbios_type1_defaults = false;
-disable_kvm_pv_eoi();
+x86_cpu_compat_disable_kvm_features(FEAT_KVM, KVM_FEATURE_PV_EOI);
enable_compat_apic_id_mode();
pc_init1(args, 1, 0);
}
@@ -358,7 +358,7 @@ static void pc_init_isa(QEMUMachineInitArgs *args)
if (!args-cpu_model) {
args-cpu_model = 486;
}
-disable_kvm_pv_eoi();
+x86_cpu_compat_disable_kvm_features(FEAT_KVM, KVM_FEATURE_PV_EOI);
enable_compat_apic_id_mode();
pc_init1(args, 0, 1);
}
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 17fe45e..5f960ac 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -371,9 +371,9 @@ static uint32_t kvm_default_features[FEATURE_WORDS] = {
(1 KVM_FEATURE_CLOCKSOURCE_STABLE_BIT),
};
-void disable_kvm_pv_eoi(void)
+void x86_cpu_compat_disable_kvm_features(FeatureWord w, uint32_t features)
{
-kvm_default_features[FEAT_KVM] = ~(1UL KVM_FEATURE_PV_EOI);
+kvm_default_features[w] = ~features;
}
void host_cpuid(uint32_t function, uint32_t count,
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 4b8c85b..2403321 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1262,11 +1262,11 @@ void do_smm_enter(X86CPU *cpu);
void cpu_report_tpr_access(CPUX86State *env, TPRAccess access);
-void disable_kvm_pv_eoi(void);
-
void x86_cpu_compat_set_features(const char *cpu_model, FeatureWord w,
uint32_t feat_add, uint32_t feat_remove);
+void x86_cpu_compat_disable_kvm_features(FeatureWord w, uint32_t features);
+
/* Return name of 32-bit register, from a R_* constant */
const char *get_register_name_32(unsigned int reg);
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 29/58] cpu: Move can_do_io field from CPU_COMMON to CPUState
Rename can_do_io() to cpu_can_do_io() and change argument to CPUState.
Signed-off-by: Andreas Färber afaer...@suse.de
---
cpus.c | 2 +-
include/exec/cpu-defs.h | 1 -
include/exec/exec-all.h | 21 +
include/exec/gen-icount.h | 4 ++--
include/exec/softmmu_template.h | 4 ++--
include/qom/cpu.h | 2 ++
qom/cpu.c | 1 +
translate-all.c | 5 +++--
8 files changed, 24 insertions(+), 16 deletions(-)
diff --git a/cpus.c b/cpus.c
index eda6d02..05016dc 100644
--- a/cpus.c
+++ b/cpus.c
@@ -140,7 +140,7 @@ static int64_t cpu_get_icount_locked(void)
icount = qemu_icount;
if (cpu) {
CPUArchState *env = cpu-env_ptr;
-if (!can_do_io(env)) {
+if (!cpu_can_do_io(cpu)) {
fprintf(stderr, Bad clock read\n);
}
icount -= (env-icount_decr.u16.low + env-icount_extra);
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index bdcfefb3..068b6c1 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -157,7 +157,6 @@ typedef struct CPUWatchpoint {
uint32_t u32; \
icount_decr_u16 u16;\
} icount_decr; \
-uint32_t can_do_io; /* nonzero if memory mapped IO is safe. */ \
\
/* from this point: preserved by CPU reset */ \
/* ice debug support */ \
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index a387922..2179329 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -380,20 +380,25 @@ extern int singlestep;
/* cpu-exec.c */
extern volatile sig_atomic_t exit_request;
-/* Deterministic execution requires that IO only be performed on the last
- instruction of a TB so that interrupts take effect immediately. */
-static inline int can_do_io(CPUArchState *env)
+/**
+ * cpu_can_do_io:
+ * @cpu: The CPU for which to check IO.
+ *
+ * Deterministic execution requires that IO only be performed on the last
+ * instruction of a TB so that interrupts take effect immediately.
+ *
+ * Returns: %true if memory-mapped IO is safe, %false otherwise.
+ */
+static inline bool cpu_can_do_io(CPUState *cpu)
{
-CPUState *cpu = ENV_GET_CPU(env);
-
if (!use_icount) {
-return 1;
+return true;
}
/* If not executing code then assume we are ok. */
if (cpu-current_tb == NULL) {
-return 1;
+return true;
}
-return env-can_do_io != 0;
+return cpu-can_do_io != 0;
}
#endif
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index 39a6b61..f0dace3 100644
--- a/include/exec/gen-icount.h
+++ b/include/exec/gen-icount.h
@@ -51,14 +51,14 @@ static void gen_tb_end(TranslationBlock *tb, int num_insns)
static inline void gen_io_start(void)
{
TCGv_i32 tmp = tcg_const_i32(1);
-tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUArchState, can_do_io));
+tcg_gen_st_i32(tmp, cpu_env, -ENV_OFFSET + offsetof(CPUState, can_do_io));
tcg_temp_free_i32(tmp);
}
static inline void gen_io_end(void)
{
TCGv_i32 tmp = tcg_const_i32(0);
-tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUArchState, can_do_io));
+tcg_gen_st_i32(tmp, cpu_env, -ENV_OFFSET + offsetof(CPUState, can_do_io));
tcg_temp_free_i32(tmp);
}
diff --git a/include/exec/softmmu_template.h b/include/exec/softmmu_template.h
index c7cd937..ac825d2 100644
--- a/include/exec/softmmu_template.h
+++ b/include/exec/softmmu_template.h
@@ -127,7 +127,7 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState
*env,
physaddr = (physaddr TARGET_PAGE_MASK) + addr;
cpu-mem_io_pc = retaddr;
-if (mr != io_mem_rom mr != io_mem_notdirty !can_do_io(env)) {
+if (mr != io_mem_rom mr != io_mem_notdirty !cpu_can_do_io(cpu)) {
cpu_io_recompile(env, retaddr);
}
@@ -333,7 +333,7 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env,
MemoryRegion *mr = iotlb_to_region(cpu-as, physaddr);
physaddr = (physaddr TARGET_PAGE_MASK) + addr;
-if (mr != io_mem_rom mr != io_mem_notdirty !can_do_io(env)) {
+if (mr != io_mem_rom mr != io_mem_notdirty !cpu_can_do_io(cpu)) {
cpu_io_recompile(env, retaddr);
}
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 9d52cf3..f80036e 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -157,6 +157,7 @@ struct kvm_run;
* @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
* CPU and return to its top level loop.
* @singlestep_enabled: Flags for single-stepping.
+ * @can_do_io: Nonzero if memory-mapped IO is safe.
* @env_ptr: Pointer to subclass-specific CPUArchState field.
* @current_tb: Currently
[Qemu-devel] [PULL for-2.0-rc0 27/58] cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook
Note that while such functions may exist both for *-user and softmmu,
only *-user uses the CPUState hook, while softmmu reuses the prototype
for calling it directly.
Signed-off-by: Andreas Färber afaer...@suse.de
---
include/qom/cpu.h | 3 +++
target-alpha/cpu.c| 4 +++-
target-alpha/cpu.h| 5 ++---
target-alpha/helper.c | 12
target-alpha/mem_helper.c | 3 ++-
target-arm/cpu.c | 4 +++-
target-arm/cpu.h | 5 ++---
target-arm/helper.c | 13 +
target-arm/op_helper.c| 3 ++-
target-cris/cpu.c | 4 +++-
target-cris/cpu.h | 3 +--
target-cris/helper.c | 24 +---
target-cris/op_helper.c | 3 ++-
target-i386/cpu.c | 4 +++-
target-i386/cpu.h | 3 +--
target-i386/helper.c | 20
target-i386/mem_helper.c | 3 ++-
target-lm32/cpu.c | 4 +++-
target-lm32/cpu.h | 3 +--
target-lm32/helper.c | 4 +++-
target-lm32/op_helper.c | 3 ++-
target-m68k/cpu.c | 4 +++-
target-m68k/cpu.h | 3 +--
target-m68k/helper.c | 17 ++---
target-m68k/op_helper.c | 3 ++-
target-microblaze/cpu.c | 4 +++-
target-microblaze/cpu.h | 3 +--
target-microblaze/helper.c| 14 --
target-microblaze/op_helper.c | 3 ++-
target-mips/cpu.c | 4 +++-
target-mips/cpu.h | 5 ++---
target-mips/helper.c | 15 +--
target-mips/op_helper.c | 3 ++-
target-moxie/cpu.c| 4 +++-
target-moxie/cpu.h| 2 +-
target-moxie/helper.c | 19 +++
target-openrisc/cpu.c | 4 +++-
target-openrisc/cpu.h | 4 +---
target-openrisc/mmu.c | 14 +++---
target-openrisc/mmu_helper.c | 3 ++-
target-ppc/cpu.h | 4 ++--
target-ppc/translate_init.c | 4 +++-
target-ppc/user_only_helper.c | 6 --
target-s390x/cpu.c| 4 +++-
target-s390x/cpu.h| 5 ++---
target-s390x/helper.c | 20
target-s390x/mem_helper.c | 3 ++-
target-sh4/cpu.c | 4 +++-
target-sh4/cpu.h | 5 ++---
target-sh4/helper.c | 13 +
target-sh4/op_helper.c| 3 ++-
target-sparc/cpu.c| 4 +++-
target-sparc/cpu.h| 3 +--
target-sparc/ldst_helper.c| 3 ++-
target-sparc/mmu_helper.c | 18 --
target-unicore32/cpu.c| 4 +++-
target-unicore32/cpu.h| 5 ++---
target-unicore32/helper.c | 5 -
target-unicore32/op_helper.c | 3 ++-
target-unicore32/softmmu.c| 6 --
user-exec.c | 9 +++--
61 files changed, 238 insertions(+), 151 deletions(-)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index f5b0d7a..5af434d 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -83,6 +83,7 @@ struct TranslationBlock;
* @set_pc: Callback for setting the Program Counter register.
* @synchronize_from_tb: Callback for synchronizing state from a TCG
* #TranslationBlock.
+ * @handle_mmu_fault: Callback for handling an MMU fault.
* @get_phys_page_debug: Callback for obtaining a physical address.
* @gdb_read_register: Callback for letting GDB read a register.
* @gdb_write_register: Callback for letting GDB write a register.
@@ -117,6 +118,8 @@ typedef struct CPUClass {
Error **errp);
void (*set_pc)(CPUState *cpu, vaddr value);
void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
+int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
+int mmu_index);
hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c
index cf2a315..4d8263f 100644
--- a/target-alpha/cpu.c
+++ b/target-alpha/cpu.c
@@ -288,7 +288,9 @@ static void alpha_cpu_class_init(ObjectClass *oc, void
*data)
cc-set_pc = alpha_cpu_set_pc;
cc-gdb_read_register = alpha_cpu_gdb_read_register;
cc-gdb_write_register = alpha_cpu_gdb_write_register;
-#ifndef CONFIG_USER_ONLY
+#ifdef CONFIG_USER_ONLY
+cc-handle_mmu_fault = alpha_cpu_handle_mmu_fault;
+#else
cc-do_unassigned_access = alpha_cpu_unassigned_access;
cc-get_phys_page_debug = alpha_cpu_get_phys_page_debug;
dc-vmsd = vmstate_alpha_cpu;
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index a172124..07d9f63 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -446,9 +446,8 @@ int cpu_alpha_exec(CPUAlphaState *s);
is returned if the signal was handled by the virtual CPU. */
int cpu_alpha_signal_handler(int host_signum, void *pinfo,
[Qemu-devel] [PULL for-2.0-rc0 17/58] target-i386: Enable x2apic by default on KVM
From: Eduardo Habkost ehabk...@redhat.com
When on KVM mode, enable x2apic by default on all CPU models.
Normally we try to keep the CPU model definitions as close as the real
CPUs as possible, but x2apic can be emulated by KVM without host CPU
support for x2apic, and it improves performance by reducing APIC access
overhead. x2apic emulation is available on KVM since 2009 (Linux
2.6.32-rc1), there's no reason for not enabling x2apic by default when
running KVM.
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
Acked-by: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
hw/i386/pc_piix.c | 1 +
hw/i386/pc_q35.c | 1 +
target-i386/cpu.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 5011c3a..7930a26 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -267,6 +267,7 @@ static void pc_compat_1_7(QEMUMachineInitArgs *args)
smbios_type1_defaults = false;
gigabyte_align = false;
option_rom_has_mr = true;
+x86_cpu_compat_disable_kvm_features(FEAT_1_ECX, CPUID_EXT_X2APIC);
}
static void pc_compat_1_6(QEMUMachineInitArgs *args)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 4b0456a..c844dc2 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -245,6 +245,7 @@ static void pc_compat_1_7(QEMUMachineInitArgs *args)
smbios_type1_defaults = false;
gigabyte_align = false;
option_rom_has_mr = true;
+x86_cpu_compat_disable_kvm_features(FEAT_1_ECX, CPUID_EXT_X2APIC);
}
static void pc_compat_1_6(QEMUMachineInitArgs *args)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 5f960ac..ea20332 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -369,6 +369,7 @@ static uint32_t kvm_default_features[FEATURE_WORDS] = {
(1 KVM_FEATURE_STEAL_TIME) |
(1 KVM_FEATURE_PV_EOI) |
(1 KVM_FEATURE_CLOCKSOURCE_STABLE_BIT),
+[FEAT_1_ECX] = CPUID_EXT_X2APIC,
};
void x86_cpu_compat_disable_kvm_features(FeatureWord w, uint32_t features)
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 23/58] target-sparc: Defer SPARCCPU feature inference to QOM realize
Gets it out of cpu_sparc_register() and aligns with target-arm.
Tested-by: Mark Cave-Ayland mark.cave-ayl...@ilande.co.uk
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-sparc/cpu.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index c4ef204..9a315c8 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -96,11 +96,6 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char
*cpu_model)
return -1;
}
-#if defined(CONFIG_USER_ONLY)
-if ((env-def-features CPU_FEATURE_FLOAT)) {
-env-def-features |= CPU_FEATURE_FLOAT128;
-}
-#endif
env-version = def-iu_version;
env-fsr = def-fpu_version;
env-nwindows = def-nwindows;
@@ -767,6 +762,14 @@ static bool sparc_cpu_has_work(CPUState *cs)
static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
{
SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev);
+#if defined(CONFIG_USER_ONLY)
+SPARCCPU *cpu = SPARC_CPU(dev);
+CPUSPARCState *env = cpu-env;
+
+if ((env-def-features CPU_FEATURE_FLOAT)) {
+env-def-features |= CPU_FEATURE_FLOAT128;
+}
+#endif
qemu_init_vcpu(CPU(dev));
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 10/58] cpu: Turn cpu_has_work() into a CPUClass hook
Default to false.
Tidy variable naming and inline cast uses while at it.
Tested-by: Jia Liu pro...@gmail.com (or32)
Signed-off-by: Andreas Färber afaer...@suse.de
---
cpu-exec.c | 5 -
cpus.c | 2 +-
include/qom/cpu.h | 12 ++--
qom/cpu.c | 6 ++
target-alpha/cpu.c | 16
target-alpha/cpu.h | 15 ---
target-arm/cpu.c| 7 +++
target-arm/cpu.h| 6 --
target-cris/cpu.c | 6 ++
target-cris/cpu.h | 5 -
target-i386/cpu.c | 15 +++
target-i386/cpu.h | 14 --
target-lm32/cpu.c | 6 ++
target-lm32/cpu.h | 5 -
target-m68k/cpu.c | 6 ++
target-m68k/cpu.h | 5 -
target-microblaze/cpu.c | 6 ++
target-microblaze/cpu.h | 5 -
target-mips/cpu.c | 30 ++
target-mips/cpu.h | 28
target-moxie/cpu.c | 6 ++
target-moxie/cpu.h | 5 -
target-openrisc/cpu.c | 7 +++
target-openrisc/cpu.h | 5 -
target-ppc/cpu.h| 8
target-ppc/translate_init.c | 9 +
target-s390x/cpu.c | 10 ++
target-s390x/cpu.h | 9 -
target-sh4/cpu.c| 6 ++
target-sh4/cpu.h| 5 -
target-sparc/cpu.c | 10 ++
target-sparc/cpu.h | 9 -
target-unicore32/cpu.c | 7 +++
target-unicore32/cpu.h | 6 --
target-xtensa/cpu.c | 8
target-xtensa/cpu.h | 7 ---
36 files changed, 172 insertions(+), 145 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 1b0f617..6559d5e 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -23,11 +23,6 @@
#include qemu/atomic.h
#include sysemu/qtest.h
-bool qemu_cpu_has_work(CPUState *cpu)
-{
-return cpu_has_work(cpu);
-}
-
void cpu_loop_exit(CPUArchState *env)
{
CPUState *cpu = ENV_GET_CPU(env);
diff --git a/cpus.c b/cpus.c
index b6421fd..eda6d02 100644
--- a/cpus.c
+++ b/cpus.c
@@ -76,7 +76,7 @@ static bool cpu_thread_is_idle(CPUState *cpu)
if (cpu_is_stopped(cpu)) {
return true;
}
-if (!cpu-halted || qemu_cpu_has_work(cpu) ||
+if (!cpu-halted || cpu_has_work(cpu) ||
kvm_halt_in_kernel()) {
return false;
}
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index d734be8..89d5dd1 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -70,6 +70,7 @@ struct TranslationBlock;
* instantiatable CPU type.
* @reset: Callback to reset the #CPUState to its initial state.
* @reset_dump_flags: #CPUDumpFlags to use for reset logging.
+ * @has_work: Callback for checking if there is work to do.
* @do_interrupt: Callback for interrupt handling.
* @do_unassigned_access: Callback for unassigned access handling.
* @memory_rw_debug: Callback for GDB memory access.
@@ -99,6 +100,7 @@ typedef struct CPUClass {
void (*reset)(CPUState *cpu);
int reset_dump_flags;
+bool (*has_work)(CPUState *cpu);
void (*do_interrupt)(CPUState *cpu);
CPUUnassignedAccess do_unassigned_access;
int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
@@ -348,14 +350,20 @@ void cpu_reset(CPUState *cpu);
ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
/**
- * qemu_cpu_has_work:
+ * cpu_has_work:
* @cpu: The vCPU to check.
*
* Checks whether the CPU has work to do.
*
* Returns: %true if the CPU has work, %false otherwise.
*/
-bool qemu_cpu_has_work(CPUState *cpu);
+static inline bool cpu_has_work(CPUState *cpu)
+{
+CPUClass *cc = CPU_GET_CLASS(cpu);
+
+g_assert(cc-has_work);
+return cc-has_work(cpu);
+}
/**
* qemu_cpu_is_self:
diff --git a/qom/cpu.c b/qom/cpu.c
index 40d82dd..f36d597 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -200,6 +200,11 @@ static void cpu_common_reset(CPUState *cpu)
cpu-halted = 0;
}
+static bool cpu_common_has_work(CPUState *cs)
+{
+return false;
+}
+
ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
{
CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
@@ -244,6 +249,7 @@ static void cpu_class_init(ObjectClass *klass, void *data)
k-class_by_name = cpu_common_class_by_name;
k-reset = cpu_common_reset;
k-get_arch_id = cpu_common_get_arch_id;
+k-has_work = cpu_common_has_work;
k-get_paging_enabled = cpu_common_get_paging_enabled;
k-get_memory_mapping = cpu_common_get_memory_mapping;
k-write_elf32_qemunote = cpu_common_write_elf32_qemunote;
diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c
index a0d5d5b..cf2a315 100644
--- a/target-alpha/cpu.c
+++ b/target-alpha/cpu.c
@@ -31,6 +31,21 @@ static void alpha_cpu_set_pc(CPUState *cs, vaddr value)
cpu-env.pc = value;
}
+static bool
[Qemu-devel] [PULL for-2.0-rc0 35/58] cpu: Move opaque field from CPU_COMMON to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
bsd-user/main.c | 2 +-
gdbstub.c| 3 +--
include/exec/cpu-defs.h | 3 ---
include/qom/cpu.h| 3 +++
linux-user/elfload.c | 10 ++
linux-user/linuxload.c | 3 +--
linux-user/m68k/target_cpu.h | 4 +++-
linux-user/main.c| 6 +++---
linux-user/signal.c | 17 +++--
linux-user/syscall.c | 30 ++
linux-user/vm86.c| 27 ++-
target-arm/arm-semi.c| 9 +
target-m68k/m68k-semi.c | 3 ++-
13 files changed, 72 insertions(+), 48 deletions(-)
diff --git a/bsd-user/main.c b/bsd-user/main.c
index f9246aa..f81ba55 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -1000,7 +1000,7 @@ int main(int argc, char **argv)
memset(ts, 0, sizeof(TaskState));
init_task_state(ts);
ts-info = info;
-env-opaque = ts;
+cpu-opaque = ts;
#if defined(TARGET_I386)
cpu_x86_set_cpl(env, 3);
diff --git a/gdbstub.c b/gdbstub.c
index e8ab0b2..c5ab73f 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -1086,8 +1086,7 @@ static int gdb_handle_packet(GDBState *s, const char
*line_buf)
}
#ifdef CONFIG_USER_ONLY
else if (strncmp(p, Offsets, 7) == 0) {
-CPUArchState *env = s-c_cpu-env_ptr;
-TaskState *ts = env-opaque;
+TaskState *ts = s-c_cpu-opaque;
snprintf(buf, sizeof(buf),
Text= TARGET_ABI_FMT_lx ;Data= TARGET_ABI_FMT_lx
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index bec06e8..8af8547 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -138,8 +138,5 @@ typedef struct CPUWatchpoint {
\
QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints;\
CPUWatchpoint *watchpoint_hit; \
-\
-/* user data */ \
-void *opaque; \
#endif
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index a385b9f..4d1ea35 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -184,6 +184,7 @@ struct kvm_run;
* @gdb_num_regs: Number of total registers accessible to GDB.
* @gdb_num_g_regs: Number of registers in GDB 'g' packets.
* @next_cpu: Next CPU sharing TB cache.
+ * @opaque: User data.
* @mem_io_pc: Host Program Counter at which the memory was accessed.
* @mem_io_vaddr: Target virtual address at which the memory was accessed.
* @kvm_fd: vCPU file descriptor for KVM.
@@ -230,6 +231,8 @@ struct CPUState {
int gdb_num_g_regs;
QTAILQ_ENTRY(CPUState) node;
+void *opaque;
+
/* In order to avoid passing too many arguments to the MMIO helpers,
* we store some rarely used information in the CPU context.
*/
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index c0687e3..6bc7999 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -2621,7 +2621,8 @@ static int write_note(struct memelfnote *men, int fd)
static void fill_thread_info(struct elf_note_info *info, const CPUArchState
*env)
{
-TaskState *ts = (TaskState *)env-opaque;
+CPUState *cpu = ENV_GET_CPU((CPUArchState *)env);
+TaskState *ts = (TaskState *)cpu-opaque;
struct elf_thread_status *ets;
ets = g_malloc0(sizeof (*ets));
@@ -2650,8 +2651,8 @@ static int fill_note_info(struct elf_note_info *info,
long signr, const CPUArchState *env)
{
#define NUMNOTES 3
-CPUState *cpu = NULL;
-TaskState *ts = (TaskState *)env-opaque;
+CPUState *cpu = ENV_GET_CPU((CPUArchState *)env);
+TaskState *ts = (TaskState *)cpu-opaque;
int i;
info-notes = g_malloc0(NUMNOTES * sizeof (struct memelfnote));
@@ -2775,7 +2776,8 @@ static int write_note_info(struct elf_note_info *info,
int fd)
*/
static int elf_core_dump(int signr, const CPUArchState *env)
{
-const TaskState *ts = (const TaskState *)env-opaque;
+const CPUState *cpu = ENV_GET_CPU((CPUArchState *)env);
+const TaskState *ts = (const TaskState *)cpu-opaque;
struct vm_area_struct *vma = NULL;
char corefile[PATH_MAX];
struct elf_note_info info;
diff --git a/linux-user/linuxload.c b/linux-user/linuxload.c
index f2997c2..506e837 100644
--- a/linux-user/linuxload.c
+++ b/linux-user/linuxload.c
@@ -89,8 +89,7 @@ static int prepare_binprm(struct linux_binprm *bprm)
abi_ulong loader_build_argptr(int envc, int argc, abi_ulong sp,
abi_ulong stringp, int push_ptr)
{
-CPUArchState *env = thread_cpu-env_ptr;
-TaskState *ts = (TaskState *)env-opaque;
+TaskState *ts = (TaskState *)thread_cpu-opaque;
int n = sizeof(abi_ulong);
abi_ulong envp;
[Qemu-devel] [PULL for-2.0-rc0 25/58] cpu: Factor out cpu_generic_init()
All targets using it gain the ability to set -cpu name,key=value,...
options via the default TYPE_CPU CPUClass::parse_features() implementation.
Signed-off-by: Andreas Färber afaer...@suse.de
---
include/qom/cpu.h | 11 +++
qom/cpu.c | 41 +
target-arm/helper.c | 14 +-
target-cris/cpu.c | 13 +
target-lm32/helper.c| 13 +
target-moxie/cpu.c | 13 +
target-openrisc/cpu.c | 13 +
target-ppc/translate_init.c | 21 +
target-sh4/cpu.c| 13 +
target-unicore32/helper.c | 13 +++--
10 files changed, 62 insertions(+), 103 deletions(-)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 3703b68..f5b0d7a 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -352,6 +352,17 @@ void cpu_reset(CPUState *cpu);
ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
/**
+ * cpu_generic_init:
+ * @typename: The CPU base type.
+ * @cpu_model: The model string including optional parameters.
+ *
+ * Instantiates a CPU, processes optional parameters and realizes the CPU.
+ *
+ * Returns: A #CPUState or %NULL if an error occurred.
+ */
+CPUState *cpu_generic_init(const char *typename, const char *cpu_model);
+
+/**
* cpu_has_work:
* @cpu: The vCPU to check.
*
diff --git a/qom/cpu.c b/qom/cpu.c
index 4aa0bf8..611ddf1 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -23,6 +23,7 @@
#include sysemu/kvm.h
#include qemu/notify.h
#include qemu/log.h
+#include qemu/error-report.h
#include sysemu/sysemu.h
bool cpu_exists(int64_t id)
@@ -39,6 +40,46 @@ bool cpu_exists(int64_t id)
return false;
}
+CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
+{
+char *str, *name, *featurestr;
+CPUState *cpu;
+ObjectClass *oc;
+CPUClass *cc;
+Error *err = NULL;
+
+str = g_strdup(cpu_model);
+name = strtok(str, ,);
+
+oc = cpu_class_by_name(typename, name);
+if (oc == NULL) {
+g_free(str);
+return NULL;
+}
+
+cpu = CPU(object_new(object_class_get_name(oc)));
+cc = CPU_GET_CLASS(cpu);
+
+featurestr = strtok(NULL, ,);
+cc-parse_features(cpu, featurestr, err);
+g_free(str);
+if (err != NULL) {
+goto out;
+}
+
+object_property_set_bool(OBJECT(cpu), true, realized, err);
+
+out:
+if (err != NULL) {
+error_report(%s, error_get_pretty(err));
+error_free(err);
+object_unref(OBJECT(cpu));
+return NULL;
+}
+
+return cpu;
+}
+
bool cpu_paging_enabled(const CPUState *cpu)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
diff --git a/target-arm/helper.c b/target-arm/helper.c
index a40f60f..f64be6f 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2186,19 +2186,7 @@ void register_cp_regs_for_features(ARMCPU *cpu)
ARMCPU *cpu_arm_init(const char *cpu_model)
{
-ARMCPU *cpu;
-ObjectClass *oc;
-
-oc = cpu_class_by_name(TYPE_ARM_CPU, cpu_model);
-if (!oc) {
-return NULL;
-}
-cpu = ARM_CPU(object_new(object_class_get_name(oc)));
-
-/* TODO this should be set centrally, once possible */
-object_property_set_bool(OBJECT(cpu), true, realized, NULL);
-
-return cpu;
+return ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, cpu_model));
}
void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
diff --git a/target-cris/cpu.c b/target-cris/cpu.c
index 07da845..12c90ee 100644
--- a/target-cris/cpu.c
+++ b/target-cris/cpu.c
@@ -89,18 +89,7 @@ static ObjectClass *cris_cpu_class_by_name(const char
*cpu_model)
CRISCPU *cpu_cris_init(const char *cpu_model)
{
-CRISCPU *cpu;
-ObjectClass *oc;
-
-oc = cris_cpu_class_by_name(cpu_model);
-if (oc == NULL) {
-return NULL;
-}
-cpu = CRIS_CPU(object_new(object_class_get_name(oc)));
-
-object_property_set_bool(OBJECT(cpu), true, realized, NULL);
-
-return cpu;
+return CRIS_CPU(cpu_generic_init(TYPE_CRIS_CPU, cpu_model));
}
/* Sort alphabetically by VR. */
diff --git a/target-lm32/helper.c b/target-lm32/helper.c
index eecb9f6..e813e7d 100644
--- a/target-lm32/helper.c
+++ b/target-lm32/helper.c
@@ -182,18 +182,7 @@ void lm32_cpu_do_interrupt(CPUState *cs)
LM32CPU *cpu_lm32_init(const char *cpu_model)
{
-LM32CPU *cpu;
-ObjectClass *oc;
-
-oc = cpu_class_by_name(TYPE_LM32_CPU, cpu_model);
-if (oc == NULL) {
-return NULL;
-}
-cpu = LM32_CPU(object_new(object_class_get_name(oc)));
-
-object_property_set_bool(OBJECT(cpu), true, realized, NULL);
-
-return cpu;
+return LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
}
/* Some soc ignores the MSB on the address bus. Thus creating a shadow memory
diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
index 88b0d35..32c6104 100644
--- a/target-moxie/cpu.c
+++ b/target-moxie/cpu.c
@@ -136,18 +136,7 @@ static
[Qemu-devel] [PULL for-2.0-rc0 14/58] target-i386: Don't declare variables in the middle of blocks
From: Eduardo Habkost ehabk...@redhat.com
Some of my recent changes introduced variable declarations in the middle
of code blocks.
Fix the code so that it compiles without warnings when using
-Wdeclaration-after-statement.
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-i386/cpu.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 24420f9..b32baf0 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1143,6 +1143,7 @@ static void kvm_cpu_fill_host(X86CPUDefinition
*x86_cpu_def)
{
KVMState *s = kvm_state;
uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
+FeatureWord w;
assert(kvm_enabled());
@@ -1163,7 +1164,6 @@ static void kvm_cpu_fill_host(X86CPUDefinition
*x86_cpu_def)
cpu_x86_fill_model_id(x86_cpu_def-model_id);
-FeatureWord w;
for (w = 0; w FEATURE_WORDS; w++) {
FeatureWordInfo *wi = feature_word_info[w];
x86_cpu_def-features[w] =
@@ -1823,6 +1823,8 @@ static void x86_cpu_load_def(X86CPU *cpu, const char
*name, Error **errp)
{
CPUX86State *env = cpu-env;
X86CPUDefinition def1, *def = def1;
+const char *vendor;
+char host_vendor[CPUID_VENDOR_SZ + 1];
memset(def, 0, sizeof(*def));
@@ -1862,8 +1864,7 @@ static void x86_cpu_load_def(X86CPU *cpu, const char
*name, Error **errp)
* KVM's sysenter/syscall emulation in compatibility mode and
* when doing cross vendor migration
*/
-const char *vendor = def-vendor;
-char host_vendor[CPUID_VENDOR_SZ + 1];
+vendor = def-vendor;
if (kvm_enabled()) {
uint32_t ebx = 0, ecx = 0, edx = 0;
host_cpuid(0, 0, NULL, ebx, ecx, edx);
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 43/58] translate-all: Change cpu_io_recompile() argument to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
include/exec/exec-all.h | 2 +-
include/exec/softmmu_template.h | 4 ++--
translate-all.c | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index cf5cd71..727dc3c 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -84,7 +84,7 @@ bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc);
void page_size_init(void);
void QEMU_NORETURN cpu_resume_from_signal(CPUArchState *env1, void *puc);
-void QEMU_NORETURN cpu_io_recompile(CPUArchState *env, uintptr_t retaddr);
+void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
TranslationBlock *tb_gen_code(CPUArchState *env,
target_ulong pc, target_ulong cs_base, int flags,
int cflags);
diff --git a/include/exec/softmmu_template.h b/include/exec/softmmu_template.h
index 8603933..73ed7cf 100644
--- a/include/exec/softmmu_template.h
+++ b/include/exec/softmmu_template.h
@@ -128,7 +128,7 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState
*env,
physaddr = (physaddr TARGET_PAGE_MASK) + addr;
cpu-mem_io_pc = retaddr;
if (mr != io_mem_rom mr != io_mem_notdirty !cpu_can_do_io(cpu)) {
-cpu_io_recompile(env, retaddr);
+cpu_io_recompile(cpu, retaddr);
}
cpu-mem_io_vaddr = addr;
@@ -334,7 +334,7 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env,
physaddr = (physaddr TARGET_PAGE_MASK) + addr;
if (mr != io_mem_rom mr != io_mem_notdirty !cpu_can_do_io(cpu)) {
-cpu_io_recompile(env, retaddr);
+cpu_io_recompile(cpu, retaddr);
}
cpu-mem_io_vaddr = addr;
diff --git a/translate-all.c b/translate-all.c
index 82d5fa4..83c7907 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -1419,9 +1419,9 @@ CPUInterruptHandler cpu_interrupt_handler =
tcg_handle_interrupt;
/* in deterministic execution mode, instructions doing device I/Os
must be at the end of the TB */
-void cpu_io_recompile(CPUArchState *env, uintptr_t retaddr)
+void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
{
-CPUState *cpu = ENV_GET_CPU(env);
+CPUArchState *env = cpu-env_ptr;
TranslationBlock *tb;
uint32_t n, cflags;
target_ulong pc, cs_base;
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 21/58] target-sparc: Use error_report() for CPU error reporting
Replace non-debug fprintf() with error_report().
Tested-by: Mark Cave-Ayland mark.cave-ayl...@ilande.co.uk
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-sparc/cpu.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 6cf7e37..9870991 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -18,6 +18,7 @@
*/
#include cpu.h
+#include qemu/error-report.h
//#define DEBUG_FEATURES
@@ -506,7 +507,7 @@ static void add_flagname_to_bitmaps(const char *flagname,
uint32_t *features)
return;
}
}
-fprintf(stderr, CPU feature %s not found\n, flagname);
+error_report(CPU feature %s not found, flagname);
}
static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model)
@@ -545,7 +546,7 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def,
const char *cpu_model)
iu_version = strtoll(val, err, 0);
if (!*val || *err) {
-fprintf(stderr, bad numerical value %s\n, val);
+error_report(bad numerical value %s, val);
goto error;
}
cpu_def-iu_version = iu_version;
@@ -557,7 +558,7 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def,
const char *cpu_model)
fpu_version = strtol(val, err, 0);
if (!*val || *err) {
-fprintf(stderr, bad numerical value %s\n, val);
+error_report(bad numerical value %s, val);
goto error;
}
cpu_def-fpu_version = fpu_version;
@@ -569,7 +570,7 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def,
const char *cpu_model)
mmu_version = strtol(val, err, 0);
if (!*val || *err) {
-fprintf(stderr, bad numerical value %s\n, val);
+error_report(bad numerical value %s, val);
goto error;
}
cpu_def-mmu_version = mmu_version;
@@ -582,7 +583,7 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def,
const char *cpu_model)
nwindows = strtol(val, err, 0);
if (!*val || *err || nwindows MAX_NWINDOWS ||
nwindows MIN_NWINDOWS) {
-fprintf(stderr, bad numerical value %s\n, val);
+error_report(bad numerical value %s, val);
goto error;
}
cpu_def-nwindows = nwindows;
@@ -590,12 +591,12 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def,
const char *cpu_model)
fprintf(stderr, nwindows %d\n, nwindows);
#endif
} else {
-fprintf(stderr, unrecognized feature %s\n, featurestr);
+error_report(unrecognized feature %s, featurestr);
goto error;
}
} else {
-fprintf(stderr, feature string `%s' not in format
-(+feature|-feature|feature=xyz)\n, featurestr);
+error_report(feature string `%s' not in format
+ (+feature|-feature|feature=xyz), featurestr);
goto error;
}
featurestr = strtok(NULL, ,);
--
1.8.4.5
[Qemu-devel] [Bug 1292037] [NEW] Solaris 10 x86 guest crashes qemu with -icount 1 option
*** This bug is a security vulnerability *** Public security bug reported: Commit: f53f3d0a00b6df39ce8dfca942608e5b6a9a4f71 on qemu.git Solaris image: Solaris 10 x86 (32 bit) command: ./i386-softmmu/qemu-system-i386 -hda image-file -m 2G -icount 1 -monitor stdio Crashes saying: qemu: Fatal: Raised interrupt while not in I/O function Host: ubuntu x86_64 3.2.0-56 generic intel xeon E5649 @ 2.53GHz ** Affects: qemu Importance: Undecided Status: New ** Tags: qemu solaris ** Summary changed: - Solaris crashes with -icount 1 + Solaris 10 x86 guest crashes with -icount 1 ** Summary changed: - Solaris 10 x86 guest crashes with -icount 1 + Solaris 10 x86 guest crashes with -icount 1 option ** Summary changed: - Solaris 10 x86 guest crashes with -icount 1 option + Solaris 10 x86 guest crashes qemu with -icount 1 option ** Information type changed from Public to Public Security ** Information type changed from Public Security to Private Security ** Information type changed from Private Security to Public Security ** Tags added: qemu -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1292037 Title: Solaris 10 x86 guest crashes qemu with -icount 1 option Status in QEMU: New Bug description: Commit: f53f3d0a00b6df39ce8dfca942608e5b6a9a4f71 on qemu.git Solaris image: Solaris 10 x86 (32 bit) command: ./i386-softmmu/qemu-system-i386 -hda image-file -m 2G -icount 1 -monitor stdio Crashes saying: qemu: Fatal: Raised interrupt while not in I/O function Host: ubuntu x86_64 3.2.0-56 generic intel xeon E5649 @ 2.53GHz To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1292037/+subscriptions
[Qemu-devel] [PULL for-2.0-rc0 33/58] cpu: Move jmp_env field from CPU_COMMON to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
cpu-exec.c | 8 +---
include/exec/cpu-defs.h | 2 --
include/qom/cpu.h | 2 ++
user-exec.c | 3 ++-
4 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index dd8da53..3e17ff5 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -28,7 +28,7 @@ void cpu_loop_exit(CPUArchState *env)
CPUState *cpu = ENV_GET_CPU(env);
cpu-current_tb = NULL;
-siglongjmp(env-jmp_env, 1);
+siglongjmp(cpu-jmp_env, 1);
}
/* exit the current TB from a signal handler. The host registers are
@@ -37,10 +37,12 @@ void cpu_loop_exit(CPUArchState *env)
#if defined(CONFIG_SOFTMMU)
void cpu_resume_from_signal(CPUArchState *env, void *puc)
{
+CPUState *cpu = ENV_GET_CPU(env);
+
/* XXX: restore cpu registers saved in host registers */
env-exception_index = -1;
-siglongjmp(env-jmp_env, 1);
+siglongjmp(cpu-jmp_env, 1);
}
#endif
@@ -284,7 +286,7 @@ int cpu_exec(CPUArchState *env)
/* prepare setjmp context for exception handling */
for(;;) {
-if (sigsetjmp(env-jmp_env, 0) == 0) {
+if (sigsetjmp(cpu-jmp_env, 0) == 0) {
/* if an exception is pending, we execute it here */
if (env-exception_index = 0) {
if (env-exception_index = EXCP_INTERRUPT) {
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 4272094..5fbdc9c 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -24,7 +24,6 @@
#endif
#include config.h
-#include setjmp.h
#include inttypes.h
#include qemu/osdep.h
#include qemu/queue.h
@@ -141,7 +140,6 @@ typedef struct CPUWatchpoint {
CPUWatchpoint *watchpoint_hit; \
\
/* Core interrupt code */ \
-sigjmp_buf jmp_env; \
int exception_index;\
\
/* user data */ \
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index ada8a5a..04bfd72 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -21,6 +21,7 @@
#define QEMU_CPU_H
#include signal.h
+#include setjmp.h
#include hw/qdev-core.h
#include exec/hwaddr.h
#include qemu/queue.h
@@ -216,6 +217,7 @@ struct CPUState {
uint32_t interrupt_request;
int singlestep_enabled;
int64_t icount_extra;
+sigjmp_buf jmp_env;
AddressSpace *as;
MemoryListener *tcg_as_listener;
diff --git a/user-exec.c b/user-exec.c
index d850d41..dec636e 100644
--- a/user-exec.c
+++ b/user-exec.c
@@ -52,6 +52,7 @@ static void exception_action(CPUArchState *env1)
*/
void cpu_resume_from_signal(CPUArchState *env1, void *puc)
{
+CPUState *cpu = ENV_GET_CPU(env1);
#ifdef __linux__
struct ucontext *uc = puc;
#elif defined(__OpenBSD__)
@@ -71,7 +72,7 @@ void cpu_resume_from_signal(CPUArchState *env1, void *puc)
#endif
}
env1-exception_index = -1;
-siglongjmp(env1-jmp_env, 1);
+siglongjmp(cpu-jmp_env, 1);
}
/* 'pc' is the host PC at which the exception was raised. 'address' is
--
1.8.4.5
[Qemu-devel] [PULL v2 for-2.0 05/24] iotests: Test corruption during COW request
From: Max Reitz mre...@redhat.com Extend test file 060 by a test case for corruption occuring concurrently to a COW request. QEMU should not crash but rather return an appropriate error message. Signed-off-by: Max Reitz mre...@redhat.com Signed-off-by: Stefan Hajnoczi stefa...@redhat.com --- tests/qemu-iotests/060 | 26 ++ tests/qemu-iotests/060.out | 15 +++ 2 files changed, 41 insertions(+) diff --git a/tests/qemu-iotests/060 b/tests/qemu-iotests/060 index af8ed9f..f0116aa 100755 --- a/tests/qemu-iotests/060 +++ b/tests/qemu-iotests/060 @@ -138,6 +138,32 @@ $QEMU_IMG snapshot -a foo $TEST_IMG _check_test_img $QEMU_IO -c $OPEN_RO -c read -P 1 0 512 | _filter_qemu_io +echo +echo === Testing overlap while COW is in flight === +echo +# compat=0.10 is required in order to make the following discard actually +# unallocate the sector rather than make it a zero sector - we want COW, after +# all. +IMGOPTS='compat=0.10' _make_test_img 1G +# Write two clusters, the second one enforces creation of an L2 table after +# the first data cluster. +$QEMU_IO -c 'write 0k 64k' -c 'write 512M 64k' $TEST_IMG | _filter_qemu_io +# Discard the first cluster. This cluster will soon enough be reallocated and +# used for COW. +$QEMU_IO -c 'discard 0k 64k' $TEST_IMG | _filter_qemu_io +# Now, corrupt the image by marking the second L2 table cluster as free. +poke_file $TEST_IMG '131084' \x00\x00 # 0x2000c +# Start a write operation requiring COW on the image stopping it right before +# doing the read; then, trigger the corruption prevention by writing anything to +# any unallocated cluster, leading to an attempt to overwrite the second L2 +# table. Finally, resume the COW write and see it fail (but not crash). +echo open -o file.driver=blkdebug $TEST_IMG +break cow_read 0 +aio_write 0k 1k +wait_break 0 +write 64k 64k +resume 0 | $QEMU_IO | _filter_qemu_io + # success, all done echo *** done rm -f $seq.full diff --git a/tests/qemu-iotests/060.out b/tests/qemu-iotests/060.out index 6c7bdbb..a517948 100644 --- a/tests/qemu-iotests/060.out +++ b/tests/qemu-iotests/060.out @@ -78,4 +78,19 @@ read 512/512 bytes at offset 0 No errors were found on the image. read 512/512 bytes at offset 0 512 bytes, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) + +=== Testing overlap while COW is in flight === + +Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 +wrote 65536/65536 bytes at offset 0 +64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +wrote 65536/65536 bytes at offset 536870912 +64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +discard 65536/65536 bytes at offset 0 +64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +qcow2: Preventing invalid write on metadata (overlaps with active L2 table); image marked as corrupt. +blkdebug: Suspended request '0' +write failed: Input/output error +blkdebug: Resuming request '0' +aio_write failed: No medium found *** done -- 1.8.5.3
[Qemu-devel] [PULL for-2.0-rc0 49/58] cpu-exec: Change cpu_resume_from_signal() argument to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
cpu-exec.c | 4 +---
exec.c | 2 +-
hw/i386/kvmvapic.c | 2 +-
include/exec/exec-all.h | 2 +-
target-i386/helper.c| 2 +-
target-lm32/helper.c| 2 +-
target-xtensa/helper.c | 2 +-
translate-all.c | 6 +++---
user-exec.c | 3 +--
9 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index c689ef9..0914d3c 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -33,10 +33,8 @@ void cpu_loop_exit(CPUState *cpu)
restored in a state compatible with the CPU emulator
*/
#if defined(CONFIG_SOFTMMU)
-void cpu_resume_from_signal(CPUArchState *env, void *puc)
+void cpu_resume_from_signal(CPUState *cpu, void *puc)
{
-CPUState *cpu = ENV_GET_CPU(env);
-
/* XXX: restore cpu registers saved in host registers */
cpu-exception_index = -1;
diff --git a/exec.c b/exec.c
index 03ae5fe..7b377cd 100644
--- a/exec.c
+++ b/exec.c
@@ -1608,7 +1608,7 @@ static void check_watchpoint(int offset, int len_mask,
int flags)
} else {
cpu_get_tb_cpu_state(env, pc, cs_base, cpu_flags);
tb_gen_code(cpu, pc, cs_base, cpu_flags, 1);
-cpu_resume_from_signal(env, NULL);
+cpu_resume_from_signal(cpu, NULL);
}
}
} else {
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index 2a9d87a..a1c3d1c 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@ -449,7 +449,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU
*cpu, target_ulong ip)
if (!kvm_enabled()) {
cs-current_tb = NULL;
tb_gen_code(cs, current_pc, current_cs_base, current_flags, 1);
-cpu_resume_from_signal(env, NULL);
+cpu_resume_from_signal(cs, NULL);
}
}
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index a3e7faa..01b8eba 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -83,7 +83,7 @@ int cpu_gen_code(CPUArchState *env, struct TranslationBlock
*tb,
bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc);
void page_size_init(void);
-void QEMU_NORETURN cpu_resume_from_signal(CPUArchState *env1, void *puc);
+void QEMU_NORETURN cpu_resume_from_signal(CPUState *cpu, void *puc);
void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
TranslationBlock *tb_gen_code(CPUState *cpu,
target_ulong pc, target_ulong cs_base, int flags,
diff --git a/target-i386/helper.c b/target-i386/helper.c
index ad61062..8c70d62 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1102,7 +1102,7 @@ void breakpoint_handler(CPUX86State *env)
if (check_hw_breakpoints(env, false)) {
raise_exception(env, EXCP01_DB);
} else {
-cpu_resume_from_signal(env, NULL);
+cpu_resume_from_signal(cs, NULL);
}
}
} else {
diff --git a/target-lm32/helper.c b/target-lm32/helper.c
index 8be5bed..7de783b 100644
--- a/target-lm32/helper.c
+++ b/target-lm32/helper.c
@@ -135,7 +135,7 @@ void lm32_debug_excp_handler(CPULM32State *env)
if (check_watchpoints(env)) {
raise_exception(env, EXCP_WATCHPOINT);
} else {
-cpu_resume_from_signal(env, NULL);
+cpu_resume_from_signal(cs, NULL);
}
}
} else {
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index 8a9cb0a..94dcd94 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -92,7 +92,7 @@ void xtensa_breakpoint_handler(CPUXtensaState *env)
if (cause) {
debug_exception_env(env, cause);
}
-cpu_resume_from_signal(env, NULL);
+cpu_resume_from_signal(cs, NULL);
}
}
}
diff --git a/translate-all.c b/translate-all.c
index df85f9f..0aa4f76 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -1113,7 +1113,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start,
tb_page_addr_t end,
itself */
cpu-current_tb = NULL;
tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1);
-cpu_resume_from_signal(env, NULL);
+cpu_resume_from_signal(cpu, NULL);
}
#endif
}
@@ -1213,7 +1213,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr,
if (locked) {
mmap_unlock();
}
-cpu_resume_from_signal(env, puc);
+cpu_resume_from_signal(cpu, puc);
}
#endif
}
@@ -1476,7 +1476,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
repeating the fault, which is horribly inefficient.
Better would be to execute just this insn uncached, or generate a
second new TB. */
-cpu_resume_from_signal(env, NULL);
+cpu_resume_from_signal(cpu, NULL);
}
void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr)
diff
[Qemu-devel] [PULL for-2.0-rc0 22/58] target-sparc: Implement CPUClass::parse_features() for SPARCCPU
Factor cpu_model parsing out of cpu_sparc_find_by_name() by passing
cpu_sparc_find_by_name() the name portion only and calling
CPUClass::parse_features() from cpu_sparc_register() afterwards.
Tested-by: Mark Cave-Ayland mark.cave-ayl...@ilande.co.uk
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-sparc/cpu.c | 82 --
1 file changed, 49 insertions(+), 33 deletions(-)
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 9870991..c4ef204 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -70,16 +70,32 @@ static void sparc_cpu_reset(CPUState *s)
env-cache_control = 0;
}
-static int cpu_sparc_register(CPUSPARCState *env, const char *cpu_model)
+static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
{
+CPUClass *cc = CPU_GET_CLASS(cpu);
+CPUSPARCState *env = cpu-env;
+char *s = g_strdup(cpu_model);
+char *featurestr, *name = strtok(s, ,);
sparc_def_t def1, *def = def1;
+Error *err = NULL;
-if (cpu_sparc_find_by_name(def, cpu_model) 0) {
+if (cpu_sparc_find_by_name(def, name) 0) {
+g_free(s);
return -1;
}
env-def = g_new0(sparc_def_t, 1);
memcpy(env-def, def, sizeof(*def));
+
+featurestr = strtok(NULL, ,);
+cc-parse_features(CPU(cpu), featurestr, err);
+g_free(s);
+if (err) {
+error_report(%s, error_get_pretty(err));
+error_free(err);
+return -1;
+}
+
#if defined(CONFIG_USER_ONLY)
if ((env-def-features CPU_FEATURE_FLOAT)) {
env-def-features |= CPU_FEATURE_FLOAT128;
@@ -104,12 +120,10 @@ static int cpu_sparc_register(CPUSPARCState *env, const
char *cpu_model)
SPARCCPU *cpu_sparc_init(const char *cpu_model)
{
SPARCCPU *cpu;
-CPUSPARCState *env;
cpu = SPARC_CPU(object_new(TYPE_SPARC_CPU));
-env = cpu-env;
-if (cpu_sparc_register(env, cpu_model) 0) {
+if (cpu_sparc_register(cpu, cpu_model) 0) {
object_unref(OBJECT(cpu));
return NULL;
}
@@ -510,16 +524,10 @@ static void add_flagname_to_bitmaps(const char *flagname,
uint32_t *features)
error_report(CPU feature %s not found, flagname);
}
-static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model)
+static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *name)
{
unsigned int i;
const sparc_def_t *def = NULL;
-char *s = g_strdup(cpu_model);
-char *featurestr, *name = strtok(s, ,);
-uint32_t plus_features = 0;
-uint32_t minus_features = 0;
-uint64_t iu_version;
-uint32_t fpu_version, mmu_version, nwindows;
for (i = 0; i ARRAY_SIZE(sparc_defs); i++) {
if (strcasecmp(name, sparc_defs[i].name) == 0) {
@@ -527,11 +535,24 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def,
const char *cpu_model)
}
}
if (!def) {
-goto error;
+return -1;
}
memcpy(cpu_def, def, sizeof(*def));
+return 0;
+}
-featurestr = strtok(NULL, ,);
+static void sparc_cpu_parse_features(CPUState *cs, char *features,
+ Error **errp)
+{
+SPARCCPU *cpu = SPARC_CPU(cs);
+sparc_def_t *cpu_def = cpu-env.def;
+char *featurestr;
+uint32_t plus_features = 0;
+uint32_t minus_features = 0;
+uint64_t iu_version;
+uint32_t fpu_version, mmu_version, nwindows;
+
+featurestr = features ? strtok(features, ,) : NULL;
while (featurestr) {
char *val;
@@ -546,8 +567,8 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def,
const char *cpu_model)
iu_version = strtoll(val, err, 0);
if (!*val || *err) {
-error_report(bad numerical value %s, val);
-goto error;
+error_setg(errp, bad numerical value %s, val);
+return;
}
cpu_def-iu_version = iu_version;
#ifdef DEBUG_FEATURES
@@ -558,8 +579,8 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def,
const char *cpu_model)
fpu_version = strtol(val, err, 0);
if (!*val || *err) {
-error_report(bad numerical value %s, val);
-goto error;
+error_setg(errp, bad numerical value %s, val);
+return;
}
cpu_def-fpu_version = fpu_version;
#ifdef DEBUG_FEATURES
@@ -570,8 +591,8 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def,
const char *cpu_model)
mmu_version = strtol(val, err, 0);
if (!*val || *err) {
-error_report(bad numerical value %s, val);
-goto error;
+error_setg(errp, bad numerical value %s, val);
+return;
}
cpu_def-mmu_version = mmu_version;
#ifdef DEBUG_FEATURES
@@ -583,21 +604,21 @@ static int
[Qemu-devel] [PULL for-2.0-rc0 53/58] target-cris: Replace DisasContext::env field with CRISCPU
This cleans up repeated cris_env_get_cpu() for cpu_abort().
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-cris/translate.c | 16
target-cris/translate_v10.c | 16
2 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 3e26b9b..724f920 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -74,7 +74,7 @@ static TCGv env_pc;
/* This is the state at translation time. */
typedef struct DisasContext {
-CPUCRISState *env;
+CRISCPU *cpu;
target_ulong pc, ppc;
/* Decoder. */
@@ -129,7 +129,7 @@ static void gen_BUG(DisasContext *dc, const char *file, int
line)
{
printf(BUG: pc=%x %s %d\n, dc-pc, file, line);
qemu_log(BUG: pc=%x %s %d\n, dc-pc, file, line);
-cpu_abort(CPU(cris_env_get_cpu(dc-env)), %s:%d\n, file, line);
+cpu_abort(CPU(dc-cpu), %s:%d\n, file, line);
}
static const char *regnames[] =
@@ -272,7 +272,7 @@ static int cris_fetch(CPUCRISState *env, DisasContext *dc,
uint32_t addr,
break;
}
default:
-cpu_abort(CPU(cris_env_get_cpu(dc-env)), Invalid fetch size %d\n,
size);
+cpu_abort(CPU(dc-cpu), Invalid fetch size %d\n, size);
break;
}
return r;
@@ -1125,7 +1125,7 @@ static inline void cris_prepare_jmp (DisasContext *dc,
unsigned int type)
static void gen_load64(DisasContext *dc, TCGv_i64 dst, TCGv addr)
{
-int mem_index = cpu_mmu_index(dc-env);
+int mem_index = cpu_mmu_index(dc-cpu-env);
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
@@ -1139,7 +1139,7 @@ static void gen_load64(DisasContext *dc, TCGv_i64 dst,
TCGv addr)
static void gen_load(DisasContext *dc, TCGv dst, TCGv addr,
unsigned int size, int sign)
{
-int mem_index = cpu_mmu_index(dc-env);
+int mem_index = cpu_mmu_index(dc-cpu-env);
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
@@ -1154,7 +1154,7 @@ static void gen_load(DisasContext *dc, TCGv dst, TCGv
addr,
static void gen_store (DisasContext *dc, TCGv addr, TCGv val,
unsigned int size)
{
-int mem_index = cpu_mmu_index(dc-env);
+int mem_index = cpu_mmu_index(dc-cpu-env);
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
@@ -3170,7 +3170,7 @@ gen_intermediate_code_internal(CRISCPU *cpu,
TranslationBlock *tb,
* delayslot, like in real hw.
*/
pc_start = tb-pc ~1;
-dc-env = env;
+dc-cpu = cpu;
dc-tb = tb;
gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
@@ -3391,7 +3391,7 @@ gen_intermediate_code_internal(CRISCPU *cpu,
TranslationBlock *tb,
#if !DISAS_CRIS
if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
log_target_disas(env, pc_start, dc-pc - pc_start,
- dc-env-pregs[PR_VR]);
+ env-pregs[PR_VR]);
qemu_log(\nisize=%d osize=%td\n,
dc-pc - pc_start, tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf);
}
diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c
index 3f27456..2ad2b14 100644
--- a/target-cris/translate_v10.c
+++ b/target-cris/translate_v10.c
@@ -96,7 +96,7 @@ static void gen_store_v10_conditional(DisasContext *dc, TCGv
addr, TCGv val,
static void gen_store_v10(DisasContext *dc, TCGv addr, TCGv val,
unsigned int size)
{
-int mem_index = cpu_mmu_index(dc-env);
+int mem_index = cpu_mmu_index(dc-cpu-env);
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
@@ -340,7 +340,7 @@ static unsigned int dec10_quick_imm(DisasContext *dc)
default:
LOG_DIS(pc=%x mode=%x quickimm %d r%d r%d\n,
dc-pc, dc-mode, dc-opcode, dc-src, dc-dst);
-cpu_abort(CPU(cris_env_get_cpu(dc-env)), Unhandled quickimm\n);
+cpu_abort(CPU(dc-cpu), Unhandled quickimm\n);
break;
}
return 2;
@@ -651,7 +651,7 @@ static unsigned int dec10_reg(DisasContext *dc)
case 2: tmp = 1; break;
case 1: tmp = 0; break;
default:
-cpu_abort(CPU(cris_env_get_cpu(dc-env)), Unhandled
BIAP);
+cpu_abort(CPU(dc-cpu), Unhandled BIAP);
break;
}
@@ -669,7 +669,7 @@ static unsigned int dec10_reg(DisasContext *dc)
default:
LOG_DIS(pc=%x reg %d r%d r%d\n, dc-pc,
dc-opcode, dc-src, dc-dst);
-cpu_abort(CPU(cris_env_get_cpu(dc-env)), Unhandled opcode);
+cpu_abort(CPU(dc-cpu), Unhandled opcode);
break;
}
[Qemu-devel] [PULL for-2.0-rc0 18/58] target-i386: Prepare CPUClass::class_by_name for X86CPU
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
Reviewed-by: Eduardo Habkost ehabk...@redhat.com
Tested-by: Eduardo Habkost ehabk...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-i386/cpu.c | 24 +---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index ea20332..9f5c78e 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -490,6 +490,15 @@ static void add_flagname_to_bitmaps(const char *flagname,
}
}
+static ObjectClass *x86_cpu_class_by_name(const char *cpu_model)
+{
+if (cpu_model == NULL) {
+return NULL;
+}
+
+return object_class_by_name(TYPE_X86_CPU);
+}
+
typedef struct X86CPUDefinition {
const char *name;
uint32_t level;
@@ -1890,6 +1899,7 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState
*icc_bridge,
Error **errp)
{
X86CPU *cpu = NULL;
+ObjectClass *oc;
gchar **model_pieces;
char *name, *features;
char *typename;
@@ -1903,7 +1913,12 @@ X86CPU *cpu_x86_create(const char *cpu_model,
DeviceState *icc_bridge,
name = model_pieces[0];
features = model_pieces[1];
-cpu = X86_CPU(object_new(TYPE_X86_CPU));
+oc = x86_cpu_class_by_name(name);
+if (oc == NULL) {
+error_setg(error, Unable to find CPU definition: %s, name);
+goto out;
+}
+cpu = X86_CPU(object_new(object_class_get_name(oc)));
x86_cpu_load_def(cpu, name, error);
if (error) {
goto out;
@@ -1934,8 +1949,10 @@ X86CPU *cpu_x86_create(const char *cpu_model,
DeviceState *icc_bridge,
out:
if (error != NULL) {
error_propagate(errp, error);
-object_unref(OBJECT(cpu));
-cpu = NULL;
+if (cpu) {
+object_unref(OBJECT(cpu));
+cpu = NULL;
+}
}
g_strfreev(model_pieces);
return cpu;
@@ -2748,6 +2765,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc,
void *data)
cc-reset = x86_cpu_reset;
cc-reset_dump_flags = CPU_DUMP_FPU | CPU_DUMP_CCOP;
+cc-class_by_name = x86_cpu_class_by_name;
cc-has_work = x86_cpu_has_work;
cc-do_interrupt = x86_cpu_do_interrupt;
cc-dump_state = x86_cpu_dump_state;
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 32/58] cpu: Move tb_jmp_cache field from CPU_COMMON to CPUState
Clear it on reset.
Signed-off-by: Andreas Färber afaer...@suse.de
---
cpu-exec.c | 6 --
cputlb.c| 2 +-
include/exec/cpu-defs.h | 4
include/qom/cpu.h | 4
qom/cpu.c | 1 +
translate-all.c | 15 ++-
6 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 9d98f21..dd8da53 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -118,6 +118,7 @@ static TranslationBlock *tb_find_slow(CPUArchState *env,
target_ulong cs_base,
uint64_t flags)
{
+CPUState *cpu = ENV_GET_CPU(env);
TranslationBlock *tb, **ptb1;
unsigned int h;
tb_page_addr_t phys_pc, phys_page1;
@@ -165,12 +166,13 @@ static TranslationBlock *tb_find_slow(CPUArchState *env,
tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
}
/* we add the TB in the virtual pc hash table */
-env-tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
+cpu-tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
return tb;
}
static inline TranslationBlock *tb_find_fast(CPUArchState *env)
{
+CPUState *cpu = ENV_GET_CPU(env);
TranslationBlock *tb;
target_ulong cs_base, pc;
int flags;
@@ -179,7 +181,7 @@ static inline TranslationBlock *tb_find_fast(CPUArchState
*env)
always be the same before a given translated block
is executed. */
cpu_get_tb_cpu_state(env, pc, cs_base, flags);
-tb = env-tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
+tb = cpu-tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
if (unlikely(!tb || tb-pc != pc || tb-cs_base != cs_base ||
tb-flags != flags)) {
tb = tb_find_slow(env, pc, cs_base, flags);
diff --git a/cputlb.c b/cputlb.c
index 0fbaa39..0eb1801 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -58,7 +58,7 @@ void tlb_flush(CPUArchState *env, int flush_global)
cpu-current_tb = NULL;
memset(env-tlb_table, -1, sizeof(env-tlb_table));
-memset(env-tb_jmp_cache, 0, sizeof(env-tb_jmp_cache));
+memset(cpu-tb_jmp_cache, 0, sizeof(cpu-tb_jmp_cache));
env-tlb_flush_addr = -1;
env-tlb_flush_mask = 0;
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index d036e8e..4272094 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -61,9 +61,6 @@ typedef uint64_t target_ulong;
#define EXCP_HALTED 0x10003 /* cpu is halted (waiting for external event)
*/
#define EXCP_YIELD 0x10004 /* cpu wants to yield timeslice to another */
-#define TB_JMP_CACHE_BITS 12
-#define TB_JMP_CACHE_SIZE (1 TB_JMP_CACHE_BITS)
-
/* Only the bottom TB_JMP_PAGE_BITS of the jump cache hash bits vary for
addresses on the same page. The top bits are the same. This allows
TLB invalidation to quickly clear a subset of the hash table. */
@@ -135,7 +132,6 @@ typedef struct CPUWatchpoint {
#define CPU_COMMON \
/* soft mmu support */ \
CPU_COMMON_TLB \
-struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
\
/* from this point: preserved by CPU reset */ \
/* ice debug support */ \
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 3156b16..ada8a5a 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -153,6 +153,9 @@ typedef struct icount_decr_u16 {
struct KVMState;
struct kvm_run;
+#define TB_JMP_CACHE_BITS 12
+#define TB_JMP_CACHE_SIZE (1 TB_JMP_CACHE_BITS)
+
/**
* CPUState:
* @cpu_index: CPU index (informative).
@@ -219,6 +222,7 @@ struct CPUState {
void *env_ptr; /* CPUArchState */
struct TranslationBlock *current_tb;
+struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
struct GDBRegisterState *gdb_regs;
int gdb_num_regs;
int gdb_num_g_regs;
diff --git a/qom/cpu.c b/qom/cpu.c
index a4c5073..fada2d4 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -244,6 +244,7 @@ static void cpu_common_reset(CPUState *cpu)
cpu-icount_extra = 0;
cpu-icount_decr.u32 = 0;
cpu-can_do_io = 0;
+memset(cpu-tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof(void *));
}
static bool cpu_common_has_work(CPUState *cs)
diff --git a/translate-all.c b/translate-all.c
index 6bb3933..c067011 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -704,9 +704,7 @@ void tb_flush(CPUArchState *env1)
tcg_ctx.tb_ctx.nb_tbs = 0;
CPU_FOREACH(cpu) {
-CPUArchState *env = cpu-env_ptr;
-
-memset(env-tb_jmp_cache, 0, sizeof(env-tb_jmp_cache));
+memset(cpu-tb_jmp_cache, 0, sizeof(cpu-tb_jmp_cache));
}
memset(tcg_ctx.tb_ctx.tb_phys_hash, 0,
sizeof(tcg_ctx.tb_ctx.tb_phys_hash));
@@ -857,10 +855,8 @@ void tb_phys_invalidate(TranslationBlock *tb,
[Qemu-devel] [PULL for-2.0-rc0 31/58] cpu: Move icount_decr field from CPU_COMMON to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
cpu-exec.c| 4 ++--
cpus.c| 13 ++---
include/exec/cpu-defs.h | 20
include/exec/gen-icount.h | 6 --
include/qom/cpu.h | 19 +++
qom/cpu.c | 1 +
translate-all.c | 15 ---
7 files changed, 40 insertions(+), 38 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 4a03d83..9d98f21 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -649,7 +649,7 @@ int cpu_exec(CPUArchState *env)
/* Instruction counter expired. */
int insns_left;
tb = (TranslationBlock *)(next_tb ~TB_EXIT_MASK);
-insns_left = env-icount_decr.u32;
+insns_left = cpu-icount_decr.u32;
if (cpu-icount_extra insns_left = 0) {
/* Refill decrementer and continue execution. */
cpu-icount_extra += insns_left;
@@ -659,7 +659,7 @@ int cpu_exec(CPUArchState *env)
insns_left = cpu-icount_extra;
}
cpu-icount_extra -= insns_left;
-env-icount_decr.u16.low = insns_left;
+cpu-icount_decr.u16.low = insns_left;
} else {
if (insns_left 0) {
/* Execute remaining instructions. */
diff --git a/cpus.c b/cpus.c
index e9c17ae..1104d61 100644
--- a/cpus.c
+++ b/cpus.c
@@ -139,11 +139,10 @@ static int64_t cpu_get_icount_locked(void)
icount = qemu_icount;
if (cpu) {
-CPUArchState *env = cpu-env_ptr;
if (!cpu_can_do_io(cpu)) {
fprintf(stderr, Bad clock read\n);
}
-icount -= (env-icount_decr.u16.low + cpu-icount_extra);
+icount -= (cpu-icount_decr.u16.low + cpu-icount_extra);
}
return qemu_icount_bias + (icount icount_time_shift);
}
@@ -1249,8 +1248,8 @@ static int tcg_cpu_exec(CPUArchState *env)
int64_t count;
int64_t deadline;
int decr;
-qemu_icount -= (env-icount_decr.u16.low + cpu-icount_extra);
-env-icount_decr.u16.low = 0;
+qemu_icount -= (cpu-icount_decr.u16.low + cpu-icount_extra);
+cpu-icount_decr.u16.low = 0;
cpu-icount_extra = 0;
deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL);
@@ -1267,7 +1266,7 @@ static int tcg_cpu_exec(CPUArchState *env)
qemu_icount += count;
decr = (count 0x) ? 0x : count;
count -= decr;
-env-icount_decr.u16.low = decr;
+cpu-icount_decr.u16.low = decr;
cpu-icount_extra = count;
}
ret = cpu_exec(env);
@@ -1277,8 +1276,8 @@ static int tcg_cpu_exec(CPUArchState *env)
if (use_icount) {
/* Fold pending instructions back into the
instruction counter, and clear the interrupt flag. */
-qemu_icount -= (env-icount_decr.u16.low + cpu-icount_extra);
-env-icount_decr.u32 = 0;
+qemu_icount -= (cpu-icount_decr.u16.low + cpu-icount_extra);
+cpu-icount_decr.u32 = 0;
cpu-icount_extra = 0;
}
return ret;
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 8f9871c..d036e8e 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -118,18 +118,6 @@ QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1
CPU_TLB_ENTRY_BITS));
#endif
-#ifdef HOST_WORDS_BIGENDIAN
-typedef struct icount_decr_u16 {
-uint16_t high;
-uint16_t low;
-} icount_decr_u16;
-#else
-typedef struct icount_decr_u16 {
-uint16_t low;
-uint16_t high;
-} icount_decr_u16;
-#endif
-
typedef struct CPUBreakpoint {
target_ulong pc;
int flags; /* BP_* */
@@ -149,14 +137,6 @@ typedef struct CPUWatchpoint {
CPU_COMMON_TLB \
struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
\
-/* Number of cycles left, with interrupt flag in high bit. \
- This allows a single read-compare-cbranch-write sequence to test \
- for both decrementer underflow and exceptions. */ \
-union { \
-uint32_t u32; \
-icount_decr_u16 u16;\
-} icount_decr; \
-\
/* from this point: preserved by CPU reset */ \
/* ice debug support */ \
QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints;
[Qemu-devel] [PULL for-2.0-rc0 50/58] cputlb: Change tlb_unprotect_code_phys() argument to CPUState
Note that the argument is unused.
Signed-off-by: Andreas Färber afaer...@suse.de
---
cputlb.c | 2 +-
include/exec/cputlb.h | 2 +-
translate-all.c | 6 +++---
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index 6b2cdb2..343ede2 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -119,7 +119,7 @@ void tlb_protect_code(ram_addr_t ram_addr)
/* update the TLB so that writes in physical page 'phys_addr' are no longer
tested for self modifying code */
-void tlb_unprotect_code_phys(CPUArchState *env, ram_addr_t ram_addr,
+void tlb_unprotect_code_phys(CPUState *cpu, ram_addr_t ram_addr,
target_ulong vaddr)
{
cpu_physical_memory_set_dirty_flag(ram_addr, DIRTY_MEMORY_CODE);
diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h
index e1eb4d9..31df03c 100644
--- a/include/exec/cputlb.h
+++ b/include/exec/cputlb.h
@@ -22,7 +22,7 @@
#if !defined(CONFIG_USER_ONLY)
/* cputlb.c */
void tlb_protect_code(ram_addr_t ram_addr);
-void tlb_unprotect_code_phys(CPUArchState *env, ram_addr_t ram_addr,
+void tlb_unprotect_code_phys(CPUState *cpu, ram_addr_t ram_addr,
target_ulong vaddr);
void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, uintptr_t start,
uintptr_t length);
diff --git a/translate-all.c b/translate-all.c
index 0aa4f76..e35fcbe 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -1007,7 +1007,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start,
tb_page_addr_t end,
{
TranslationBlock *tb, *tb_next, *saved_tb;
CPUState *cpu = current_cpu;
-#if defined(TARGET_HAS_PRECISE_SMC) || !defined(CONFIG_USER_ONLY)
+#if defined(TARGET_HAS_PRECISE_SMC)
CPUArchState *env = NULL;
#endif
tb_page_addr_t tb_start, tb_end;
@@ -1032,7 +1032,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start,
tb_page_addr_t end,
/* build code bitmap */
build_page_bitmap(p);
}
-#if defined(TARGET_HAS_PRECISE_SMC) || !defined(CONFIG_USER_ONLY)
+#if defined(TARGET_HAS_PRECISE_SMC)
if (cpu != NULL) {
env = cpu-env_ptr;
}
@@ -1102,7 +1102,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start,
tb_page_addr_t end,
if (!p-first_tb) {
invalidate_page_bitmap(p);
if (is_cpu_write_access) {
-tlb_unprotect_code_phys(env, start, cpu-mem_io_vaddr);
+tlb_unprotect_code_phys(cpu, start, cpu-mem_io_vaddr);
}
}
#endif
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 36/58] cpu: Move watchpoint fields from CPU_COMMON to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
cpu-exec.c | 5 +++--
exec.c | 33 -
gdbstub.c | 8
include/exec/cpu-defs.h | 10 --
include/qom/cpu.h | 10 ++
linux-user/main.c | 5 +++--
target-i386/cpu.h | 2 +-
target-i386/helper.c| 7 ---
target-i386/kvm.c | 8
target-lm32/cpu.h | 2 +-
target-lm32/helper.c| 7 ---
target-xtensa/cpu.h | 2 +-
target-xtensa/helper.c | 8 +---
13 files changed, 60 insertions(+), 47 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 798dc08..d7c21d3 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -200,10 +200,11 @@ void cpu_set_debug_excp_handler(CPUDebugExcpHandler
*handler)
static void cpu_handle_debug_exception(CPUArchState *env)
{
+CPUState *cpu = ENV_GET_CPU(env);
CPUWatchpoint *wp;
-if (!env-watchpoint_hit) {
-QTAILQ_FOREACH(wp, env-watchpoints, entry) {
+if (!cpu-watchpoint_hit) {
+QTAILQ_FOREACH(wp, cpu-watchpoints, entry) {
wp-flags = ~BP_WATCHPOINT_HIT;
}
}
diff --git a/exec.c b/exec.c
index 26ed9cc..ee5eff7 100644
--- a/exec.c
+++ b/exec.c
@@ -485,7 +485,7 @@ void cpu_exec_init(CPUArchState *env)
cpu-cpu_index = cpu_index;
cpu-numa_node = 0;
QTAILQ_INIT(env-breakpoints);
-QTAILQ_INIT(env-watchpoints);
+QTAILQ_INIT(cpu-watchpoints);
#ifndef CONFIG_USER_ONLY
cpu-as = address_space_memory;
cpu-thread_id = qemu_get_thread_id();
@@ -542,6 +542,7 @@ int cpu_watchpoint_insert(CPUArchState *env, target_ulong
addr, target_ulong len
int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong
len,
int flags, CPUWatchpoint **watchpoint)
{
+CPUState *cpu = ENV_GET_CPU(env);
target_ulong len_mask = ~(len - 1);
CPUWatchpoint *wp;
@@ -559,10 +560,11 @@ int cpu_watchpoint_insert(CPUArchState *env, target_ulong
addr, target_ulong len
wp-flags = flags;
/* keep all GDB-injected watchpoints in front */
-if (flags BP_GDB)
-QTAILQ_INSERT_HEAD(env-watchpoints, wp, entry);
-else
-QTAILQ_INSERT_TAIL(env-watchpoints, wp, entry);
+if (flags BP_GDB) {
+QTAILQ_INSERT_HEAD(cpu-watchpoints, wp, entry);
+} else {
+QTAILQ_INSERT_TAIL(cpu-watchpoints, wp, entry);
+}
tlb_flush_page(env, addr);
@@ -575,10 +577,11 @@ int cpu_watchpoint_insert(CPUArchState *env, target_ulong
addr, target_ulong len
int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_ulong
len,
int flags)
{
+CPUState *cpu = ENV_GET_CPU(env);
target_ulong len_mask = ~(len - 1);
CPUWatchpoint *wp;
-QTAILQ_FOREACH(wp, env-watchpoints, entry) {
+QTAILQ_FOREACH(wp, cpu-watchpoints, entry) {
if (addr == wp-vaddr len_mask == wp-len_mask
flags == (wp-flags ~BP_WATCHPOINT_HIT)) {
cpu_watchpoint_remove_by_ref(env, wp);
@@ -591,7 +594,9 @@ int cpu_watchpoint_remove(CPUArchState *env, target_ulong
addr, target_ulong len
/* Remove a specific watchpoint by reference. */
void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint)
{
-QTAILQ_REMOVE(env-watchpoints, watchpoint, entry);
+CPUState *cpu = ENV_GET_CPU(env);
+
+QTAILQ_REMOVE(cpu-watchpoints, watchpoint, entry);
tlb_flush_page(env, watchpoint-vaddr);
@@ -601,9 +606,10 @@ void cpu_watchpoint_remove_by_ref(CPUArchState *env,
CPUWatchpoint *watchpoint)
/* Remove all matching watchpoints. */
void cpu_watchpoint_remove_all(CPUArchState *env, int mask)
{
+CPUState *cpu = ENV_GET_CPU(env);
CPUWatchpoint *wp, *next;
-QTAILQ_FOREACH_SAFE(wp, env-watchpoints, entry, next) {
+QTAILQ_FOREACH_SAFE(wp, cpu-watchpoints, entry, next) {
if (wp-flags mask)
cpu_watchpoint_remove_by_ref(env, wp);
}
@@ -799,6 +805,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
int prot,
target_ulong *address)
{
+CPUState *cpu = ENV_GET_CPU(env);
hwaddr iotlb;
CPUWatchpoint *wp;
@@ -818,7 +825,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
/* Make accesses to pages with watchpoints go via the
watchpoint trap routines. */
-QTAILQ_FOREACH(wp, env-watchpoints, entry) {
+QTAILQ_FOREACH(wp, cpu-watchpoints, entry) {
if (vaddr == (wp-vaddr TARGET_PAGE_MASK)) {
/* Avoid trapping reads of pages with a write breakpoint. */
if ((prot PAGE_WRITE) || (wp-flags BP_MEM_READ)) {
@@ -1579,7 +1586,7 @@ static void check_watchpoint(int offset, int len_mask,
int flags)
CPUWatchpoint *wp;
int cpu_flags;
-if (env-watchpoint_hit) {
+if (cpu-watchpoint_hit) {
/* We re-entered the check after replacing the TB.
[Qemu-devel] [PULL for-2.0-rc0 58/58] user-exec: Change exception_action() argument to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
user-exec.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/user-exec.c b/user-exec.c
index 3b795c1..bc58056 100644
--- a/user-exec.c
+++ b/user-exec.c
@@ -38,11 +38,12 @@
//#define DEBUG_SIGNAL
-static void exception_action(CPUArchState *env1)
+static void exception_action(CPUState *cpu)
{
-CPUState *cpu = ENV_GET_CPU(env1);
-
#if defined(TARGET_I386)
+X86CPU *x86_cpu = X86_CPU(cpu);
+CPUX86State *env1 = x86_cpu-env;
+
raise_exception_err(env1, cpu-exception_index, env1-error_code);
#else
cpu_loop_exit(cpu);
@@ -86,7 +87,6 @@ static inline int handle_cpu_signal(uintptr_t pc, unsigned
long address,
{
CPUState *cpu;
CPUClass *cc;
-CPUArchState *env;
int ret;
#if defined(DEBUG_SIGNAL)
@@ -105,7 +105,6 @@ static inline int handle_cpu_signal(uintptr_t pc, unsigned
long address,
cpu = current_cpu;
cc = CPU_GET_CLASS(cpu);
-env = cpu-env_ptr;
/* see if it is an MMU fault */
g_assert(cc-handle_mmu_fault);
ret = cc-handle_mmu_fault(cpu, address, is_write, MMU_USER_IDX);
@@ -121,7 +120,7 @@ static inline int handle_cpu_signal(uintptr_t pc, unsigned
long address,
/* we restore the process signal mask as the sigreturn should
do it (XXX: use sigsetjmp) */
sigprocmask(SIG_SETMASK, old_set, NULL);
-exception_action(env);
+exception_action(cpu);
/* never comes here */
return 1;
--
1.8.4.5
[Qemu-devel] [RFC 06/12] target-ppc: Eliminate Unused Variable in decSetSubnormal
This patch eliminates an unused variable in the decSetSubnormal
routine. The variable dnexp is declared and eventually set but
never used. This triggers a unused-but-set-variable warning, which
can fail QEMU compilation.
Signed-off-by: Tom Musta tommu...@gmail.com
---
libdecnumber/decNumber.c |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/libdecnumber/decNumber.c b/libdecnumber/decNumber.c
index c0429e5..f60837b 100644
--- a/libdecnumber/decNumber.c
+++ b/libdecnumber/decNumber.c
@@ -7398,7 +7398,6 @@ static void decSetMaxValue(decNumber *dn, decContext
*set) {
/* -- */
static void decSetSubnormal(decNumber *dn, decContext *set, Int *residue,
uInt *status) {
- Int dnexp; /* saves original exponent */
decContext workset;/* work */
Int etiny, adjust; /* .. */
@@ -7443,7 +7442,6 @@ static void decSetSubnormal(decNumber *dn, decContext
*set, Int *residue,
/* adjust0, so need to rescale the result so exponent becomes Etiny */
/* [this code is similar to that in rescale] */
- dnexp=dn-exponent; /* save exponent */
workset=*set;/* clone rounding, etc. */
workset.digits=dn-digits-adjust;/* set requested length */
workset.emin-=adjust;/* and adjust emin to match */
--
1.7.1
[Qemu-devel] [RFC 07/12] target-ppc: Enable Building of libdecnumber
This patch enables compilation of the newly added libdecnumber library code. Object file targets are added to Makefile.target using the newly added flag CONFIG_LIBDECNUMBER. The flag is added to the PowerPC targets (ppc[64]-linux-user, ppc[64]-softmmu). Signed-off-by: Tom Musta tommu...@gmail.com --- Makefile.target |5 + default-configs/ppc-linux-user.mak |1 + default-configs/ppc-softmmu.mak |1 + default-configs/ppc64-linux-user.mak |1 + default-configs/ppc64-softmmu.mak|1 + 5 files changed, 9 insertions(+), 0 deletions(-) diff --git a/Makefile.target b/Makefile.target index ba12340..8d31da9 100644 --- a/Makefile.target +++ b/Makefile.target @@ -82,6 +82,11 @@ obj-y += disas.o obj-$(call notempty,$(TARGET_XML_FILES)) += gdbstub-xml.o obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o +obj-$(CONFIG_LIBDECNUMBER) += libdecnumber/decContext.o +obj-$(CONFIG_LIBDECNUMBER) += libdecnumber/decNumber.o +obj-$(CONFIG_LIBDECNUMBER) += libdecnumber/dpd/decimal64.o +obj-$(CONFIG_LIBDECNUMBER) += libdecnumber/dpd/decimal128.o + # # Linux user emulator target diff --git a/default-configs/ppc-linux-user.mak b/default-configs/ppc-linux-user.mak index 6273df2..260ba41 100644 --- a/default-configs/ppc-linux-user.mak +++ b/default-configs/ppc-linux-user.mak @@ -1 +1,2 @@ # Default configuration for ppc-linux-user +CONFIG_LIBDECNUMBER=y diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak index 07c51ce..33f8d84 100644 --- a/default-configs/ppc-softmmu.mak +++ b/default-configs/ppc-softmmu.mak @@ -49,3 +49,4 @@ CONFIG_OPENPIC_KVM=$(and $(CONFIG_E500),$(CONFIG_KVM)) CONFIG_MC146818RTC=y CONFIG_ETSEC=y CONFIG_ISA_TESTDEV=y +CONFIG_LIBDECNUMBER=y diff --git a/default-configs/ppc64-linux-user.mak b/default-configs/ppc64-linux-user.mak index 422d3fb..e731ce0 100644 --- a/default-configs/ppc64-linux-user.mak +++ b/default-configs/ppc64-linux-user.mak @@ -1 +1,2 @@ # Default configuration for ppc64-linux-user +CONFIG_LIBDECNUMBER=y diff --git a/default-configs/ppc64-softmmu.mak b/default-configs/ppc64-softmmu.mak index e2beac6..37a15b7 100644 --- a/default-configs/ppc64-softmmu.mak +++ b/default-configs/ppc64-softmmu.mak @@ -58,3 +58,4 @@ CONFIG_I82374=y CONFIG_I8257=y CONFIG_MC146818RTC=y CONFIG_ISA_TESTDEV=y +CONFIG_LIBDECNUMBER=y -- 1.7.1
[Qemu-devel] [RFC 10/12] target-ppc: Introduce DFP Helper Utilities
This patch adds a new helper file to the PowerPC implementation (dfp_helper.c).
This first version of the file declares a structure that will be used by various
Decimal Floating Point (DFP) instructions. It also implements utilities that
will initialize such a structure for either a long, 64-bit DFP instruction with
two operands, or an extended, 128-bit (aka quad) DFP instruction with two
operands.
Since there is not yet any code that invokes these utilities, a temporary
pointer
array is declared; this avoids 'defined but not used' warnings and thus
preserves
build bisection.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/Makefile.objs |1 +
target-ppc/dfp_helper.c | 111 ++
2 files changed, 112 insertions(+), 0 deletions(-)
create mode 100644 target-ppc/dfp_helper.c
diff --git a/target-ppc/Makefile.objs b/target-ppc/Makefile.objs
index 3cb23e0..a7ae392 100644
--- a/target-ppc/Makefile.objs
+++ b/target-ppc/Makefile.objs
@@ -6,6 +6,7 @@ obj-$(TARGET_PPC64) += mmu-hash64.o arch_dump.o
endif
obj-$(CONFIG_KVM) += kvm.o kvm_ppc.o
obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o
+obj-y += dfp_helper.o
obj-y += excp_helper.o
obj-y += fpu_helper.o
obj-y += int_helper.o
diff --git a/target-ppc/dfp_helper.c b/target-ppc/dfp_helper.c
new file mode 100644
index 000..3c5988a
--- /dev/null
+++ b/target-ppc/dfp_helper.c
@@ -0,0 +1,111 @@
+/*
+ * PowerPC Decimal Floating Point (DPF) emulation helpers for QEMU.
+ *
+ * Copyright (c) 2014 Tom Musta
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see http://www.gnu.org/licenses/.
+ */
+
+#include cpu.h
+#include helper.h
+
+#define DECNUMDIGITS 34
+#include libdecnumber/decContext.h
+#include libdecnumber/decNumber.h
+#include libdecnumber/decDouble.h
+#include libdecnumber/dpd/decimal64.h
+#include libdecnumber/dpd/decimal128.h
+
+#if defined(HOST_WORDS_BIGENDIAN)
+#define HI_IDX 0
+#define LO_IDX 1
+#else
+#define HI_IDX 1
+#define LO_IDX 0
+#endif
+
+struct PPC_DFP {
+CPUPPCState *env;
+uint64_t t64[2], a64[2], b64[2];
+decNumber t, a, b;
+decContext context;
+uint8_t crbf;
+};
+
+static void ppc_dfp_prepare_rounding_mode(decContext *context, uint64_t fpscr)
+{
+enum rounding rnd;
+
+switch ((fpscr 32) 0x7) {
+case 0:
+rnd = DEC_ROUND_HALF_EVEN;
+break;
+case 1:
+rnd = DEC_ROUND_DOWN;
+break;
+case 2:
+ rnd = DEC_ROUND_CEILING;
+ break;
+case 3:
+ rnd = DEC_ROUND_FLOOR;
+ break;
+case 4:
+ rnd = DEC_ROUND_HALF_UP;
+ break;
+case 5:
+ rnd = DEC_ROUND_HALF_DOWN;
+ break;
+case 6:
+ rnd = DEC_ROUND_UP;
+ break;
+case 7:
+ rnd = DEC_ROUND_05UP;
+ break;
+}
+
+decContextSetRounding(context, rnd);
+}
+
+static void ppc_dfp_prepare_decimal64_fra_frb(struct PPC_DFP *dfp, uint64_t *a,
+uint64_t *b, CPUPPCState *env)
+{
+decContextDefault(dfp-context, DEC_INIT_DECIMAL64);
+ppc_dfp_prepare_rounding_mode(dfp-context, env-fpscr);
+dfp-a64[0] = *a;
+dfp-b64[0] = *b;
+decimal64ToNumber((decimal64 *)dfp-a64, dfp-a);
+decimal64ToNumber((decimal64 *)dfp-b64, dfp-b);
+dfp-env = env;
+}
+
+static void ppc_dfp_prepare_decimal128_fra_frb(struct PPC_DFP *dfp, uint64_t
*a,
+uint64_t *b, CPUPPCState *env)
+{
+decContextDefault(dfp-context, DEC_INIT_DECIMAL128);
+ppc_dfp_prepare_rounding_mode(dfp-context, env-fpscr);
+dfp-a64[0] = a[HI_IDX];
+dfp-a64[1] = a[LO_IDX];
+dfp-b64[0] = b[HI_IDX];
+dfp-b64[1] = b[LO_IDX];
+dfp-env = env;
+decimal128ToNumber((decimal128 *)dfp-a64, dfp-a);
+decimal128ToNumber((decimal128 *)dfp-b64, dfp-b);
+}
+
+void *_TmpAvoidDefinedButNotUsedWarnings_[] = {
+(void *)ppc_dfp_prepare_decimal64_fra_frb,
+(void *)ppc_dfp_prepare_decimal128_fra_frb,
+};
+
+
--
1.7.1
[Qemu-devel] [PULL for-2.0-rc0 47/58] exec: Change cpu_watchpoint_{insert, remove{, _by_ref, _all}} argument
Use CPUState. This lets us drop a few local env usages.
Signed-off-by: Andreas Färber afaer...@suse.de
---
exec.c| 34 +-
gdbstub.c | 17 +
include/exec/cpu-all.h| 6 --
include/qom/cpu.h | 7 +++
linux-user/main.c | 5 +++--
target-i386/cpu.c | 2 +-
target-i386/helper.c | 11 ---
target-i386/machine.c | 3 ++-
target-lm32/helper.c | 7 +--
target-xtensa/op_helper.c | 9 ++---
10 files changed, 58 insertions(+), 43 deletions(-)
diff --git a/exec.c b/exec.c
index 6f8b2ca..e89653e 100644
--- a/exec.c
+++ b/exec.c
@@ -33,6 +33,7 @@
#include hw/xen/xen.h
#include qemu/timer.h
#include qemu/config-file.h
+#include qemu/error-report.h
#include exec/memory.h
#include sysemu/dma.h
#include exec/address-spaces.h
@@ -527,30 +528,30 @@ static void breakpoint_invalidate(CPUState *cpu,
target_ulong pc)
#endif /* TARGET_HAS_ICE */
#if defined(CONFIG_USER_ONLY)
-void cpu_watchpoint_remove_all(CPUArchState *env, int mask)
+void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
{
}
-int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong
len,
+int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
int flags, CPUWatchpoint **watchpoint)
{
return -ENOSYS;
}
#else
/* Add a watchpoint. */
-int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong
len,
+int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
int flags, CPUWatchpoint **watchpoint)
{
-CPUState *cpu = ENV_GET_CPU(env);
-target_ulong len_mask = ~(len - 1);
+CPUArchState *env = cpu-env_ptr;
+vaddr len_mask = ~(len - 1);
CPUWatchpoint *wp;
/* sanity checks: allow power-of-2 lengths, deny unaligned watchpoints */
if ((len (len - 1)) || (addr ~len_mask) ||
len == 0 || len TARGET_PAGE_SIZE) {
-fprintf(stderr, qemu: tried to set invalid watchpoint at
-TARGET_FMT_lx , len= TARGET_FMT_lu \n, addr, len);
+error_report(tried to set invalid watchpoint at %
+ VADDR_PRIx , len=% VADDR_PRIu, addr, len);
return -EINVAL;
}
wp = g_malloc(sizeof(*wp));
@@ -574,17 +575,16 @@ int cpu_watchpoint_insert(CPUArchState *env, target_ulong
addr, target_ulong len
}
/* Remove a specific watchpoint. */
-int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_ulong
len,
+int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
int flags)
{
-CPUState *cpu = ENV_GET_CPU(env);
-target_ulong len_mask = ~(len - 1);
+vaddr len_mask = ~(len - 1);
CPUWatchpoint *wp;
QTAILQ_FOREACH(wp, cpu-watchpoints, entry) {
if (addr == wp-vaddr len_mask == wp-len_mask
flags == (wp-flags ~BP_WATCHPOINT_HIT)) {
-cpu_watchpoint_remove_by_ref(env, wp);
+cpu_watchpoint_remove_by_ref(cpu, wp);
return 0;
}
}
@@ -592,9 +592,9 @@ int cpu_watchpoint_remove(CPUArchState *env, target_ulong
addr, target_ulong len
}
/* Remove a specific watchpoint by reference. */
-void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint)
+void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
{
-CPUState *cpu = ENV_GET_CPU(env);
+CPUArchState *env = cpu-env_ptr;
QTAILQ_REMOVE(cpu-watchpoints, watchpoint, entry);
@@ -604,14 +604,14 @@ void cpu_watchpoint_remove_by_ref(CPUArchState *env,
CPUWatchpoint *watchpoint)
}
/* Remove all matching watchpoints. */
-void cpu_watchpoint_remove_all(CPUArchState *env, int mask)
+void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
{
-CPUState *cpu = ENV_GET_CPU(env);
CPUWatchpoint *wp, *next;
QTAILQ_FOREACH_SAFE(wp, cpu-watchpoints, entry, next) {
-if (wp-flags mask)
-cpu_watchpoint_remove_by_ref(env, wp);
+if (wp-flags mask) {
+cpu_watchpoint_remove_by_ref(cpu, wp);
+}
}
}
#endif
diff --git a/gdbstub.c b/gdbstub.c
index 0176b3f..cd10781 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -657,8 +657,7 @@ static int gdb_breakpoint_insert(target_ulong addr,
target_ulong len, int type)
case GDB_WATCHPOINT_READ:
case GDB_WATCHPOINT_ACCESS:
CPU_FOREACH(cpu) {
-env = cpu-env_ptr;
-err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
+err = cpu_watchpoint_insert(cpu, addr, len, xlat_gdb_type[type],
NULL);
if (err)
break;
@@ -695,8 +694,7 @@ static int gdb_breakpoint_remove(target_ulong addr,
target_ulong len, int type)
case GDB_WATCHPOINT_READ:
case GDB_WATCHPOINT_ACCESS:
CPU_FOREACH(cpu) {
-env = cpu-env_ptr;
-err =
Re: [Qemu-devel] [PATCH] blockdev: Refuse to open encrypted image unless paused
Il 13/03/2014 16:00, Markus Armbruster ha scritto:
Paolo Bonzini pbonz...@redhat.com writes:
Il 13/03/2014 14:18, Markus Armbruster ha scritto:
Paolo Bonzini pbonz...@redhat.com writes:
Il 12/03/2014 18:00, Markus Armbruster ha scritto:
+} else if (!runstate_check(RUN_STATE_PRELAUNCH)
+ !runstate_check(RUN_STATE_PAUSED)) { /* HACK */
Why not if (runstate_is_running())?
The predicate actually wanted here is monitor command 'cont' required
to get the guest running, because 'cont' is where the protection is.
My run state test is a crude approximation.
Got it. Then you need to add at least a check for
runstate_check(RUN_STATE_INMIGRATE), otherwise you break incoming
migration.
You're right: main() goes from RUN_STATE_PRELAUNCH to
RUN_STATE_INMIGRATE right when it sees -incoming.
Actually, I think only SAVE_VM/RESTORE_VM/DEBUG are
problematic, but I understand why you preferred a conservative
test (sufficient condition, not necessary).
Exactly.
You are singling out prelaunch and inmigrate because drive_init
will reset autostart to 0 for an encrypted image, right?
Yes.
Then with the check modified,
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Paolo
[Qemu-devel] [PATCH] main-loop: Suppress I/O thread spun warnings for qtest
When running under qtest we don't actually have any vcpu threads
to be starved, so the warning about the I/O thread spinning isn't
relevant, and the way qtest manipulates the simulated clock means
the warning is produced a lot as a false positive. Suppress it if
qtest_enabled(), so 'make check' output is less noisy.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
main-loop.c | 3 ++-
stubs/Makefile.objs | 1 +
stubs/qtest.c | 14 ++
3 files changed, 17 insertions(+), 1 deletion(-)
create mode 100644 stubs/qtest.c
diff --git a/main-loop.c b/main-loop.c
index c3c9c28..8a85493 100644
--- a/main-loop.c
+++ b/main-loop.c
@@ -25,6 +25,7 @@
#include qemu-common.h
#include qemu/timer.h
#include qemu/sockets.h // struct in_addr needed for libslirp.h
+#include sysemu/qtest.h
#include slirp/libslirp.h
#include qemu/main-loop.h
#include block/aio.h
@@ -208,7 +209,7 @@ static int os_host_main_loop_wait(int64_t timeout)
if (!timeout (spin_counter MAX_MAIN_LOOP_SPIN)) {
static bool notified;
-if (!notified) {
+if (!notified !qtest_enabled()) {
fprintf(stderr,
main-loop: WARNING: I/O thread spun for %d iterations\n,
MAX_MAIN_LOOP_SPIN);
diff --git a/stubs/Makefile.objs b/stubs/Makefile.objs
index df3aa7a..6f06fca 100644
--- a/stubs/Makefile.objs
+++ b/stubs/Makefile.objs
@@ -28,3 +28,4 @@ stub-obj-y += vmstate.o
stub-obj-$(CONFIG_WIN32) += fd-register.o
stub-obj-y += cpus.o
stub-obj-y += kvm.o
+stub-obj-y += qtest.o
diff --git a/stubs/qtest.c b/stubs/qtest.c
new file mode 100644
index 000..e671ed8
--- /dev/null
+++ b/stubs/qtest.c
@@ -0,0 +1,14 @@
+/*
+ * qtest stubs
+ *
+ * Copyright (c) 2014 Linaro Limited
+ * Written by Peter Maydell
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include qemu-common.h
+
+/* Needed for qtest_allowed() */
+bool qtest_allowed;
--
1.9.0
[Qemu-devel] [RFC 08/12] target-ppc: Define FPR Pointer Type for Helpers
This patch defines a floating pointer register pointer type in the PowerPC helper header. The type will be used to pass FPR register operands to Decimal Floating Point (DFP) helpers. A pointer is used because the quadword forms of PowerPC DFP instructions operate on adjacent pairs of floating point registers and thus can be thought of as arrays of length 2. Signed-off-by: Tom Musta tommu...@gmail.com --- target-ppc/helper.h |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 99f10de..1bebc8e 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -614,4 +614,8 @@ DEF_HELPER_3(store_601_batl, void, env, i32, tl) DEF_HELPER_3(store_601_batu, void, env, i32, tl) #endif +#define dh_alias_fprp ptr +#define dh_ctype_fprp uint64_t * +#define dh_is_signed_fprp dh_is_signed_ptr + #include exec/def-helper.h -- 1.7.1
[Qemu-devel] [PULL for-2.0-rc0 51/58] exec: Change memory_region_section_get_iotlb() argument to CPUState
It no longer needs CPUArchState since moving watchpoints to CPUState.
Signed-off-by: Andreas Färber afaer...@suse.de
---
cputlb.c | 2 +-
exec.c| 3 +--
include/exec/cputlb.h | 2 +-
3 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index 343ede2..8a00330 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -261,7 +261,7 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr,
}
code_address = address;
-iotlb = memory_region_section_get_iotlb(env, section, vaddr, paddr, xlat,
+iotlb = memory_region_section_get_iotlb(cpu, section, vaddr, paddr, xlat,
prot, address);
index = (vaddr TARGET_PAGE_BITS) (CPU_TLB_SIZE - 1);
diff --git a/exec.c b/exec.c
index 7b377cd..82580c5 100644
--- a/exec.c
+++ b/exec.c
@@ -799,14 +799,13 @@ static void cpu_physical_memory_set_dirty_tracking(bool
enable)
in_migration = enable;
}
-hwaddr memory_region_section_get_iotlb(CPUArchState *env,
+hwaddr memory_region_section_get_iotlb(CPUState *cpu,
MemoryRegionSection *section,
target_ulong vaddr,
hwaddr paddr, hwaddr xlat,
int prot,
target_ulong *address)
{
-CPUState *cpu = ENV_GET_CPU(env);
hwaddr iotlb;
CPUWatchpoint *wp;
diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h
index 31df03c..b8ecd6f 100644
--- a/include/exec/cputlb.h
+++ b/include/exec/cputlb.h
@@ -36,7 +36,7 @@ void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr);
MemoryRegionSection *
address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat,
hwaddr *plen);
-hwaddr memory_region_section_get_iotlb(CPUArchState *env,
+hwaddr memory_region_section_get_iotlb(CPUState *cpu,
MemoryRegionSection *section,
target_ulong vaddr,
hwaddr paddr, hwaddr xlat,
--
1.8.4.5
[Qemu-devel] [RFC 02/12] target-ppc: Prepare libdecnumber for QEMU include structure
This patch modifies the libdecnumber source code so that it fits properly with
QEMU's include directory structure. Specifically, directives of the form
#include xxx.h
are modified to look like:
#include libdecnumber/xxx.h
Signed-off-by: Tom Musta tommu...@gmail.com
---
include/libdecnumber/decContext.h |2 +-
include/libdecnumber/decDouble.h |2 +-
include/libdecnumber/decNumber.h |4 ++--
include/libdecnumber/decNumberLocal.h |2 +-
include/libdecnumber/decQuad.h|2 +-
include/libdecnumber/dpd/decimal128.h |2 +-
include/libdecnumber/dpd/decimal64.h |2 +-
libdecnumber/decContext.c |6 +++---
libdecnumber/decNumber.c |6 +++---
libdecnumber/dpd/decimal128.c |8
libdecnumber/dpd/decimal64.c | 12 ++--
11 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/include/libdecnumber/decContext.h
b/include/libdecnumber/decContext.h
index cdbb244..2e8f2e1 100644
--- a/include/libdecnumber/decContext.h
+++ b/include/libdecnumber/decContext.h
@@ -232,7 +232,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.
If not, see
/* decContext routines */
- #include decContextSymbols.h
+ #include libdecnumber/decContextSymbols.h
extern decContext * decContextClearStatus(decContext *, uint32_t);
extern decContext * decContextDefault(decContext *, int32_t);
diff --git a/include/libdecnumber/decDouble.h b/include/libdecnumber/decDouble.h
index 136bb9d..ddbafd1 100644
--- a/include/libdecnumber/decDouble.h
+++ b/include/libdecnumber/decDouble.h
@@ -50,7 +50,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If
not, see
#define DECDOUBLE_Ehigh (DECDOUBLE_Emax + DECDOUBLE_Bias -
(DECDOUBLE_Pmax-1))
/* Required includes */
- #include decContext.h
+ #include libdecnumber/decContext.h
#include decQuad.h
/* The decDouble decimal 64-bit type, accessible by various types */
diff --git a/include/libdecnumber/decNumber.h b/include/libdecnumber/decNumber.h
index 5cf18ab..0e912db 100644
--- a/include/libdecnumber/decNumber.h
+++ b/include/libdecnumber/decNumber.h
@@ -34,7 +34,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If
not, see
#define DECAUTHOR Mike Cowlishaw /* Who to blame */
#if !defined(DECCONTEXT)
-#include decContext.h
+#include libdecnumber/decContext.h
#endif
/* Bit settings for decNumber.bits */
@@ -106,7 +106,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.
If not, see
/* decNumber public functions and macros */
/* */
- #include decNumberSymbols.h
+ #include libdecnumber/decNumberSymbols.h
/* Conversions */
decNumber * decNumberFromInt32(decNumber *, int32_t);
diff --git a/include/libdecnumber/decNumberLocal.h
b/include/libdecnumber/decNumberLocal.h
index 71c8467..431e4e6 100644
--- a/include/libdecnumber/decNumberLocal.h
+++ b/include/libdecnumber/decNumberLocal.h
@@ -39,7 +39,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If
not, see
#include stdlib.h/* for abs */
#include string.h/* for memset, strcpy */
- #include dconfig.h /* for WORDS_BIGENDIAN */
+ #include libdecnumber/dconfig.h
/* Conditional code flag -- set this to match hardware platform */
/* 1=little-endian, 0=big-endian */
diff --git a/include/libdecnumber/decQuad.h b/include/libdecnumber/decQuad.h
index c8ec11c..ed91c39 100644
--- a/include/libdecnumber/decQuad.h
+++ b/include/libdecnumber/decQuad.h
@@ -52,7 +52,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If
not, see
#define DECQUAD_Ehigh (DECQUAD_Emax + DECQUAD_Bias - (DECQUAD_Pmax-1))
/* Required include*/
- #include decContext.h
+ #include libdecnumber/decContext.h
/* The decQuad decimal 128-bit type, accessible by various types */
typedef union {
diff --git a/include/libdecnumber/dpd/decimal128.h
b/include/libdecnumber/dpd/decimal128.h
index 9fc532b..ee29b2d 100644
--- a/include/libdecnumber/dpd/decimal128.h
+++ b/include/libdecnumber/dpd/decimal128.h
@@ -55,7 +55,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If
not, see
#define DECNUMDIGITS DECIMAL128_Pmax /* size if not already defined*/
#endif
#ifndef DECNUMBER
-#include decNumber.h /* context and number library */
+#include libdecnumber/decNumber.h
#endif
/* Decimal 128-bit type, accessible by bytes */
diff --git a/include/libdecnumber/dpd/decimal64.h
[Qemu-devel] [RFC 00/12] target-ppc: Decimal Floating Point
This patch series provides a prototype of Decimal Floating Point (DFP) instruction support in QEMU. The topic was briefly discussed here: http://lists.nongnu.org/archive/html/qemu-ppc/2014-02/msg00129.html I. Overview The core of the DFP model is a library named libdecnumber, which is a sub-library of GCC's libdfp. Libdecnumber's model uses an expanded internal representation of a decimal floating point number as: - exponent (base 10) - the number of digits (aka declets) - flags (sign bit and special bits for NaNs and infinities) - an array of units. Each unit contains DECPUN declets. Libdecnumber provides routines for various arithmetic operations (e.g. decNumberAdd for addition) as well as converters for going to/from binary form. PowerPC's support of DFP uses Densely Packed Decimal (DPD) format. The standard floating point registers are re-used to hold DFP operands. There are typically PowerPC instructions for both the long (64 bit) and extended (128 bit, aka quad) formats. The extended format instructions use adjacent pairs of FPRs to hold the 128 bit operands. II. A Simple Example PowerPC DFP instructions are implemented using helpers, which in turn use libdecnumber routines to perform the detailed computations. This is similar to how softfloat is used to model binary floating point instructions. For example, the implementation of the helper for DFP Add Long (dadd) looks like this: 1) Establish a libdecnumber context for 64-bit computation (decContext) 2) Convert the two source FPRs from DPD to decNumbers (the expanded internal representation) 3) Invoke the add operation (decNumberAdd) 4) Inspect the context's flags for various exception situations (e.g. overflow), mapping them to the corresponding FPSCR status flags. 5) Convert the summand to DPD form and store into the target FPR. The helper for the DPD Add Extended (daddq) is nearly identical. It differs only in that it establishes a 128 bit context and the conversions are from and to 128 bit DPD format. III. Integration of libdecnumber in QEMU The appoach taken here is direct and simple: 1) A copy of libdecnumber code is imported into QEMU. The header files are placed under include/libdecnumber and the code is placed under libdecnumber. A minimalist approach is taken -- only the source required to support PPC DFP instruction models is imported. 2) The code is modified to account for this structure (see patch 02/12) 3) The libdecnumber configuration script is jettisoned. Instead, the configuration header that is normally generated is modified to integrate properly with QEMU's configuration. See patch 03/12. 4) Some trivial modifications to source are made to address compiler warnings. See patches 04/12 - 06/12 5) Compilation is enabled for PowerPC emulation models (see patch 07/12). Tom Musta (12): target-ppc: Introduce libdecnumber Code target-ppc: Prepare libdecnumber for QEMU include structure target-ppc: Modify dconfig.h to Integrate with QEMU target-ppc: Change gstdint.h to stdint.h target-ppc: Eliminate redundant declarations target-ppc: Eliminate Unused Variable in decSetSubnormal target-ppc: Enable Building of libdecnumber target-ppc: Define FPR Pointer Type for Helpers target-ppc: Introduce Translation Macros for DFP Arithmetic Forms target-ppc: Introduce DFP Helper Utilities target-ppc: Introduce DFP Post Processor Utilities target-ppc: Introduce DFP Add Makefile.target |5 + default-configs/ppc-linux-user.mak |1 + default-configs/ppc-softmmu.mak |1 + default-configs/ppc64-linux-user.mak |1 + default-configs/ppc64-softmmu.mak|1 + include/libdecnumber/dconfig.h | 35 + include/libdecnumber/decCommonSymbols.h | 14 + include/libdecnumber/decContext.h| 253 + include/libdecnumber/decContextSymbols.h | 44 + include/libdecnumber/decDPD.h| 1211 include/libdecnumber/decDPDSymbols.h | 26 + include/libdecnumber/decDouble.h | 161 + include/libdecnumber/decDoubleSymbols.h | 165 + include/libdecnumber/decNumber.h | 195 + include/libdecnumber/decNumberLocal.h| 662 +++ include/libdecnumber/decNumberSymbols.h | 143 + include/libdecnumber/decQuad.h | 183 + include/libdecnumber/decQuadSymbols.h| 160 + include/libdecnumber/dpd/decimal128.h| 96 + include/libdecnumber/dpd/decimal128Local.h | 42 + include/libdecnumber/dpd/decimal128Symbols.h | 48 + include/libdecnumber/dpd/decimal64.h | 96 + include/libdecnumber/dpd/decimal64Symbols.h | 48 + libdecnumber/decContext.c| 427 ++ libdecnumber/decNumber.c | 8115 ++ libdecnumber/dpd/decimal128.c
Re: [Qemu-devel] different IDTs of the same VCPU
Il 13/03/2014 13:59, Alexander Binun ha scritto:
Dear Friends,
Thanks for your assistance!
We would like to ask you a question about the KVM internals.
Our module includes a timer which (once in every second) fetches the IDT value of
every online VCPU in the system using the kvm_x86_ops-get_idt ; the code looks
like:
struct kvm_vcpu *curr_vcpu;
struct desc_ptr dt;
list_for_each_entry(kvm, vms_list, vm_list)
{
for (i = 0; i kvm-online_vcpus.counter; i++)
{
curr_vcpu = kvm-vcpus[i];
kvm_x86_ops-get_idt(curr_vcpu, dt);
}
}
We have noticed that get_idt returns DIFFERENT values for the same
VCPU (i.e. for the same value of i that refers to a given VCPU). We
cannot understand this issue; could you explain ?
It is very strange since nobody changes the IDT value (as , for example,
rootkits do).
At the very least, running nested virtualization would lead to different
IDT values.
But more simply, on Intel you can hardly do anything with kvm_x86_ops or
kvm_vcpu except on the same physical CPU that is in vcpu-cpu. The
state is not in memory, it is cached inside the physical CPU.
There is no easy solution to this without modifying KVM. You can add a
request bit to KVM's vcpu-requests field, kick the vcpu and do the
check in vcpu_enter_guest.
Paolo
[Qemu-devel] [PULL for-2.0-rc0 55/58] cputlb: Change tlb_flush_page() argument to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
cputlb.c | 4 +--
exec.c | 7 ++
include/exec/exec-all.h | 4 +--
target-alpha/sys_helper.c| 2 +-
target-arm/helper.c | 14 ---
target-cris/mmu.c| 3 ++-
target-cris/op_helper.c | 12 ++---
target-i386/misc_helper.c| 4 ++-
target-i386/svm_helper.c | 3 ++-
target-microblaze/mmu.c | 3 ++-
target-mips/helper.c | 8 --
target-openrisc/sys_helper.c | 4 +--
target-ppc/mmu_helper.c | 58 +---
target-s390x/mem_helper.c| 6 ++---
target-s390x/misc_helper.c | 6 +++--
target-sh4/helper.c | 19 +--
target-sparc/ldst_helper.c | 9 ---
target-xtensa/op_helper.c| 10 +---
18 files changed, 106 insertions(+), 70 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index 2281053..9a12248 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -77,9 +77,9 @@ static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry,
target_ulong addr)
}
}
-void tlb_flush_page(CPUArchState *env, target_ulong addr)
+void tlb_flush_page(CPUState *cpu, target_ulong addr)
{
-CPUState *cpu = ENV_GET_CPU(env);
+CPUArchState *env = cpu-env_ptr;
int i;
int mmu_idx;
diff --git a/exec.c b/exec.c
index 5224b31..c031932 100644
--- a/exec.c
+++ b/exec.c
@@ -543,7 +543,6 @@ int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr
len,
int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
int flags, CPUWatchpoint **watchpoint)
{
-CPUArchState *env = cpu-env_ptr;
vaddr len_mask = ~(len - 1);
CPUWatchpoint *wp;
@@ -567,7 +566,7 @@ int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr
len,
QTAILQ_INSERT_TAIL(cpu-watchpoints, wp, entry);
}
-tlb_flush_page(env, addr);
+tlb_flush_page(cpu, addr);
if (watchpoint)
*watchpoint = wp;
@@ -594,11 +593,9 @@ int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr
len,
/* Remove a specific watchpoint by reference. */
void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
{
-CPUArchState *env = cpu-env_ptr;
-
QTAILQ_REMOVE(cpu-watchpoints, watchpoint, entry);
-tlb_flush_page(env, watchpoint-vaddr);
+tlb_flush_page(cpu, watchpoint-vaddr);
g_free(watchpoint);
}
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 01b8eba..33633a2 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -98,14 +98,14 @@ void tb_invalidate_phys_range(tb_page_addr_t start,
tb_page_addr_t end,
#if !defined(CONFIG_USER_ONLY)
void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as);
/* cputlb.c */
-void tlb_flush_page(CPUArchState *env, target_ulong addr);
+void tlb_flush_page(CPUState *cpu, target_ulong addr);
void tlb_flush(CPUArchState *env, int flush_global);
void tlb_set_page(CPUArchState *env, target_ulong vaddr,
hwaddr paddr, int prot,
int mmu_idx, target_ulong size);
void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr);
#else
-static inline void tlb_flush_page(CPUArchState *env, target_ulong addr)
+static inline void tlb_flush_page(CPUState *cpu, target_ulong addr)
{
}
diff --git a/target-alpha/sys_helper.c b/target-alpha/sys_helper.c
index 035810c..5f7d7dd 100644
--- a/target-alpha/sys_helper.c
+++ b/target-alpha/sys_helper.c
@@ -69,7 +69,7 @@ void helper_tbia(CPUAlphaState *env)
void helper_tbis(CPUAlphaState *env, uint64_t p)
{
-tlb_flush_page(env, p);
+tlb_flush_page(CPU(alpha_env_get_cpu(env)), p);
}
void helper_tb_flush(CPUAlphaState *env)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 0a9c6fc..1fda6be 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -342,7 +342,9 @@ static void tlbimva_write(CPUARMState *env, const
ARMCPRegInfo *ri,
uint64_t value)
{
/* Invalidate single TLB entry by MVA and ASID (TLBIMVA) */
-tlb_flush_page(env, value TARGET_PAGE_MASK);
+ARMCPU *cpu = arm_env_get_cpu(env);
+
+tlb_flush_page(CPU(cpu), value TARGET_PAGE_MASK);
}
static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri,
@@ -356,7 +358,9 @@ static void tlbimvaa_write(CPUARMState *env, const
ARMCPRegInfo *ri,
uint64_t value)
{
/* Invalidate single entry by MVA, all ASIDs (TLBIMVAA) */
-tlb_flush_page(env, value TARGET_PAGE_MASK);
+ARMCPU *cpu = arm_env_get_cpu(env);
+
+tlb_flush_page(CPU(cpu), value TARGET_PAGE_MASK);
}
static const ARMCPRegInfo cp_reginfo[] = {
@@ -1686,16 +1690,18 @@ static void tlbi_aa64_va_write(CPUARMState *env, const
ARMCPRegInfo *ri,
uint64_t value)
{
/* Invalidate by VA (AArch64 version) */
+ARMCPU *cpu = arm_env_get_cpu(env);
uint64_t pageaddr = value 12;
-tlb_flush_page(env, pageaddr);
+
[Qemu-devel] [Bug 1292037] Re: Solaris 10 x86 guest crashes qemu with -icount 1 option
** Information type changed from Public Security to Public ** Description changed: ** Information type changed from Public to Public Security ** Information type changed from Public Security to Public -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1292037 Title: Solaris 10 x86 guest crashes qemu with -icount 1 option Status in QEMU: New Bug description: Commit: f53f3d0a00b6df39ce8dfca942608e5b6a9a4f71 on qemu.git Solaris image: Solaris 10 x86 (32 bit) command: ./i386-softmmu/qemu-system-i386 -hda image-file -m 2G -icount 1 -monitor stdio Crashes saying: qemu: Fatal: Raised interrupt while not in I/O function Host: ubuntu x86_64 3.2.0-56 generic intel xeon E5649 @ 2.53GHz To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1292037/+subscriptions
Re: [Qemu-devel] Building QMP in qemu-nbd
Il 13/03/2014 15:40, Benoît Canet ha scritto: Hi, I want to make qemu-nbd QMP aware so the cloud stack my customer work on could start lxc containers with qcow2 KVM images and still benefit from the quorum and snapshot goodness. Yes, blockdev can help for this. In the meanwhile, could you start a dummy guest (-M none -m 1 -machine accel=qtest -display none -nodefaults consumes ~16M here) and use the embedded NBD server? Stefan mentioned the nice idea of splitting qapi-schema.json in small files in a subdirectory so qemu-nbd could use only the block related commands. Eric: What do you think of this idea ? Do you have variants of this idea ? Weren't there patches to add include directives to qapi-schema.json? Paolo
[Qemu-devel] [PULL for-2.0-rc0 37/58] cpu: Move breakpoints field from CPU_COMMON to CPUState
Most targets were using offsetof(CPUFooState, breakpoints) to determine
how much of CPUFooState to clear on reset. Use the next field after
CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise.
Signed-off-by: Andreas Färber afaer...@suse.de
---
exec.c| 21 +
include/exec/cpu-defs.h | 10 --
include/qom/cpu.h | 9 +
linux-user/main.c | 4 ++--
target-alpha/translate.c | 4 ++--
target-arm/cpu.c | 2 +-
target-arm/translate-a64.c| 4 ++--
target-arm/translate.c| 4 ++--
target-cris/cpu.c | 2 +-
target-cris/cpu.h | 4 ++--
target-cris/translate.c | 5 +++--
target-i386/cpu.c | 2 +-
target-i386/cpu.h | 3 ++-
target-i386/helper.c | 3 ++-
target-i386/translate.c | 4 ++--
target-lm32/cpu.c | 2 +-
target-lm32/cpu.h | 3 ++-
target-lm32/helper.c | 2 +-
target-lm32/translate.c | 5 +++--
target-m68k/cpu.c | 2 +-
target-m68k/cpu.h | 1 +
target-m68k/translate.c | 4 ++--
target-microblaze/cpu.c | 2 +-
target-microblaze/translate.c | 5 +++--
target-mips/cpu.c | 2 +-
target-mips/cpu.h | 1 +
target-mips/translate.c | 4 ++--
target-moxie/cpu.c| 2 +-
target-moxie/translate.c | 4 ++--
target-openrisc/cpu.c | 6 +-
target-openrisc/cpu.h | 1 +
target-openrisc/translate.c | 5 +++--
target-ppc/translate.c| 4 ++--
target-s390x/cpu.c| 4 ++--
target-s390x/translate.c | 4 ++--
target-sh4/cpu.c | 2 +-
target-sh4/cpu.h | 1 +
target-sh4/translate.c| 4 ++--
target-sparc/cpu.c| 2 +-
target-sparc/cpu.h| 1 +
target-sparc/translate.c | 4 ++--
target-unicore32/translate.c | 4 ++--
target-xtensa/translate.c | 5 +++--
43 files changed, 94 insertions(+), 73 deletions(-)
diff --git a/exec.c b/exec.c
index ee5eff7..6d9e13a 100644
--- a/exec.c
+++ b/exec.c
@@ -484,7 +484,7 @@ void cpu_exec_init(CPUArchState *env)
}
cpu-cpu_index = cpu_index;
cpu-numa_node = 0;
-QTAILQ_INIT(env-breakpoints);
+QTAILQ_INIT(cpu-breakpoints);
QTAILQ_INIT(cpu-watchpoints);
#ifndef CONFIG_USER_ONLY
cpu-as = address_space_memory;
@@ -621,6 +621,7 @@ int cpu_breakpoint_insert(CPUArchState *env, target_ulong
pc, int flags,
CPUBreakpoint **breakpoint)
{
#if defined(TARGET_HAS_ICE)
+CPUState *cpu = ENV_GET_CPU(env);
CPUBreakpoint *bp;
bp = g_malloc(sizeof(*bp));
@@ -630,12 +631,12 @@ int cpu_breakpoint_insert(CPUArchState *env, target_ulong
pc, int flags,
/* keep all GDB-injected breakpoints in front */
if (flags BP_GDB) {
-QTAILQ_INSERT_HEAD(env-breakpoints, bp, entry);
+QTAILQ_INSERT_HEAD(cpu-breakpoints, bp, entry);
} else {
-QTAILQ_INSERT_TAIL(env-breakpoints, bp, entry);
+QTAILQ_INSERT_TAIL(cpu-breakpoints, bp, entry);
}
-breakpoint_invalidate(ENV_GET_CPU(env), pc);
+breakpoint_invalidate(cpu, pc);
if (breakpoint) {
*breakpoint = bp;
@@ -650,9 +651,10 @@ int cpu_breakpoint_insert(CPUArchState *env, target_ulong
pc, int flags,
int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags)
{
#if defined(TARGET_HAS_ICE)
+CPUState *cpu = ENV_GET_CPU(env);
CPUBreakpoint *bp;
-QTAILQ_FOREACH(bp, env-breakpoints, entry) {
+QTAILQ_FOREACH(bp, cpu-breakpoints, entry) {
if (bp-pc == pc bp-flags == flags) {
cpu_breakpoint_remove_by_ref(env, bp);
return 0;
@@ -668,9 +670,11 @@ int cpu_breakpoint_remove(CPUArchState *env, target_ulong
pc, int flags)
void cpu_breakpoint_remove_by_ref(CPUArchState *env, CPUBreakpoint *breakpoint)
{
#if defined(TARGET_HAS_ICE)
-QTAILQ_REMOVE(env-breakpoints, breakpoint, entry);
+CPUState *cpu = ENV_GET_CPU(env);
-breakpoint_invalidate(ENV_GET_CPU(env), breakpoint-pc);
+QTAILQ_REMOVE(cpu-breakpoints, breakpoint, entry);
+
+breakpoint_invalidate(cpu, breakpoint-pc);
g_free(breakpoint);
#endif
@@ -680,9 +684,10 @@ void cpu_breakpoint_remove_by_ref(CPUArchState *env,
CPUBreakpoint *breakpoint)
void cpu_breakpoint_remove_all(CPUArchState *env, int mask)
{
#if defined(TARGET_HAS_ICE)
+CPUState *cpu = ENV_GET_CPU(env);
CPUBreakpoint *bp, *next;
-QTAILQ_FOREACH_SAFE(bp, env-breakpoints, entry, next) {
+QTAILQ_FOREACH_SAFE(bp, cpu-breakpoints, entry, next) {
if (bp-flags mask)
cpu_breakpoint_remove_by_ref(env, bp);
}
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 31aac69..2dd6206 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -114,19 +114,9 @@ QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1
Re: [Qemu-devel] [PULL for-2.0-rc0 00/58] QOM CPUState patch queue 2014-03-13
On 13/03/14 15:54, Andreas Färber wrote: Hello Peter, This is my current QOM CPU patch queue. Please pull. Since this touches on bsd-user code, request to apply the build fix first. NB: I was only able to test x86/ppc/arm KVM this time; s390x KVM was re-reviewed only. A basic start of a guest on s390 was successful. No further testing done, though.
Re: [Qemu-devel] Building QMP in qemu-nbd
On 03/13/2014 08:40 AM, Benoît Canet wrote: Hi, I want to make qemu-nbd QMP aware so the cloud stack my customer work on could start lxc containers with qcow2 KVM images and still benefit from the quorum and snapshot goodness. Stefan mentioned the nice idea of splitting qapi-schema.json in small files in a subdirectory so qemu-nbd could use only the block related commands. Eric: What do you think of this idea ? See Lluís' work on creating an include directive (although it needs a respin to use a json5 syntax): https://lists.gnu.org/archive/html/qemu-devel/2014-03/msg00017.html So I'm definitely in favor of splitting the schema file into smaller per-topic sections. -- Eric Blake eblake redhat com+1-919-301-3266 Libvirt virtualization library http://libvirt.org signature.asc Description: OpenPGP digital signature
[Qemu-devel] [V2 PATCH 2/6] util: Add AES ShiftRows and InvShiftRows Tables
This patch adds tables that implement the Advanced Encryption Standard (AES)
ShiftRows
and InvShiftRows transformations. These are commonly used in instruction
models.
Signed-off-by: Tom Musta tommu...@gmail.com
Reviewed-by: Richard Henderson r...@twiddle.net
---
include/qemu/aes.h |4
util/aes.c |8
2 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/include/qemu/aes.h b/include/qemu/aes.h
index a4044f5..c45bc57 100644
--- a/include/qemu/aes.h
+++ b/include/qemu/aes.h
@@ -26,6 +26,10 @@ void AES_cbc_encrypt(const unsigned char *in, unsigned char
*out,
extern const uint8_t AES_sbox[256];
extern const uint8_t AES_isbox[256];
+/* AES ShiftRows and InvShiftRows */
+extern const uint8_t AES_shifts[16];
+extern const uint8_t AES_ishifts[16];
+
/*
AES_Te0[x] = S [x].[02, 01, 01, 03];
AES_Te1[x] = S [x].[03, 02, 01, 01];
diff --git a/util/aes.c b/util/aes.c
index eeb644b..c26cf55 100644
--- a/util/aes.c
+++ b/util/aes.c
@@ -108,6 +108,14 @@ const uint8_t AES_isbox[256] = {
0xE1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0C, 0x7D,
};
+const uint8_t AES_shifts[16] = {
+0, 5, 10, 15, 4, 9, 14, 3, 8, 13, 2, 7, 12, 1, 6, 11
+};
+
+const uint8_t AES_ishifts[16] = {
+0, 13, 10, 7, 4, 1, 14, 11, 8, 5, 2, 15, 12, 9, 6, 3
+};
+
/*
AES_Te0[x] = S [x].[02, 01, 01, 03];
AES_Te1[x] = S [x].[03, 02, 01, 01];
--
1.7.1
[Qemu-devel] [PULL for-2.0-rc0 08/58] target-unicore32: Clean up ENV_GET_CPU() usage
Commit fdfba1a298ae26dd44bcfdb0429314139a0bc55a added a usage of
ENV_GET_CPU() macro in target-specific code.
Use uc32_env_get_cpu() instead.
Cc: Edgar E. Iglesias edgar.igles...@xilinx.com
Cc: Peter Maydell peter.mayd...@linaro.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-unicore32/softmmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-unicore32/softmmu.c b/target-unicore32/softmmu.c
index 22defc6..9552f69 100644
--- a/target-unicore32/softmmu.c
+++ b/target-unicore32/softmmu.c
@@ -121,7 +121,7 @@ static int get_phys_addr_ucv2(CPUUniCore32State *env,
uint32_t address,
int access_type, int is_user, uint32_t *phys_ptr, int *prot,
target_ulong *page_size)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(uc32_env_get_cpu(env));
int code;
uint32_t table;
uint32_t desc;
--
1.8.4.5
Re: [Qemu-devel] [PATCH v4 2/3] qapi: Add a primitive to include other files from a QAPI schema file
The Tuesday 04 Mar 2014 à 09:02:57 (+0100), Markus Armbruster wrote :
Eric Blake ebl...@redhat.com writes:
On 03/03/2014 08:27 AM, Markus Armbruster wrote:
+The QAPI schema definitions can be modularized using the 'include'
directive:
+
+ include(sub-system/qapi.json)
And now it isn't JSON anymore.
To keep it JSON, use syntax like
{ include: sub-system/qapi.json }
I actually think this looks nicer - makes the file more consistent.
I suspect qapi.py would look nicer, too :)
If you absolutely must make it non-JSON, you better rename the .json
files.
Hmm, we already are non-JSON, because we use ' instead of for no sane
reason.
A weak argument: ' is easier than to type (at least on US keyboards -
no shift key required).
Another weak argument: using ' in the qapi files vs. in actual QMP
makes it easy to interleave discussions about semantics vs. examples of
those semantics in use (you can see whether a code snippet is talking
about qapi or wire format based on what quoting it used)
Our files are already non-JSON due to comments (JSON has no notion of #
introducing a comment to ignore text to the next newline). But both our
use of comments and our use of ' instead of can be remedied in a
one-pass sed script to get a true JSON output if such is needed, at
least as long as we don't need to quote any characters in the schema.
Therefore, I agree that making the include syntax closer to true JSON is
desirable, whether or not we also decide to use in the files to begin
with. I don't see any way around the fact that JSON doesn't define
comments, vs. our absolute need for comments in our schema files, though.
We certainly can't do without comments.
JSON is designed for easy data exchange, but we use it as programming
language syntax. Its restrictions make sense for easy data exchange,
but hurt our use. We're not the first ones experiencing that pain:
http://json5.org/
No idea how much momentum this JSON5 thingy has...
Our JSON parser accepts ' as an extension, to save us quoting in C
strings. That reason doesn't apply to .json files.
Is it a problem if they are not pure JSON? In the end, they are parsed by
qapi.py (which already knows about file syntax), and having a separate
syntax
for includes makes it somewhat easier to spot when that happens.
I don't particularly care whether schema syntax is pure JSON, some
bastardized variation of JSON, or something else entirely. But as long
as we advertize schema files it as .json, they better contain JSON. If
they contain something else, they should be called something else.
Maybe .qapi? But the name qapi-schema.qapi sounds redundant...
schema.qapi?
Switch to JSON5 and call it qapi-schema.json5?
Hmm don't we want something that python and other language know how to parse out
of the box ? Or will we write yet another delicate work of art to parse it ?
Best regards
Benoît
Re: [Qemu-devel] [PATCH buildfix] oslib-posix: Fix build on FreeBSD
On 13 March 2014 13:27, Andreas Färber andreas.faer...@web.de wrote: Commit 10f5bff622cad71645e22c027b77ac31e51008ef (util: Split out exec_dir from os_find_datadir) moved code from os-posix.c to util/oslib-posix.c but forgot to move a FreeBSD #include alongside, needed for CTL_KERN among others. Cc: Fam Zheng f...@redhat.com Cc: Paolo Bonzini pbonz...@redhat.com Signed-off-by: Andreas Färber andreas.faer...@web.de Applied to master, thanks. -- PMM
[Qemu-devel] [RFC 05/12] target-ppc: Eliminate redundant declarations
This patch eliminates redundant declarations of symbols DPD2BIN and BIN2DPD. These will trigger 'redundant redeclaration of ?XXX?' warnings and thus may fail QEMU compilation. Signed-off-by: Tom Musta tommu...@gmail.com --- libdecnumber/dpd/decimal128.c |2 -- libdecnumber/dpd/decimal64.c |2 -- 2 files changed, 0 insertions(+), 4 deletions(-) diff --git a/libdecnumber/dpd/decimal128.c b/libdecnumber/dpd/decimal128.c index c0f5786..3183612 100644 --- a/libdecnumber/dpd/decimal128.c +++ b/libdecnumber/dpd/decimal128.c @@ -45,8 +45,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see /* Utility routines and tables [in decimal64.c] */ extern const uInt COMBEXP[32], COMBMSD[32]; -extern const uShort DPD2BIN[1024]; -extern const uShort BIN2DPD[1000]; /* [not used] */ extern const uByte BIN2CHAR[4001]; extern void decDigitsFromDPD(decNumber *, const uInt *, Int); diff --git a/libdecnumber/dpd/decimal64.c b/libdecnumber/dpd/decimal64.c index 53386ab..ccd7f6b 100644 --- a/libdecnumber/dpd/decimal64.c +++ b/libdecnumber/dpd/decimal64.c @@ -45,8 +45,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see /* Utility routines and tables [in decimal64.c]; externs for C++ */ extern const uInt COMBEXP[32], COMBMSD[32]; -extern const uShort DPD2BIN[1024]; -extern const uShort BIN2DPD[1000]; extern const uByte BIN2CHAR[4001]; extern void decDigitsFromDPD(decNumber *, const uInt *, Int); -- 1.7.1
Re: [Qemu-devel] SMBIOS vs. NUMA (was: Build full type 19 tables)
On Thu, 13 Mar 2014 10:37:52 -0400 Gabriel L. Somlo gso...@gmail.com wrote: On Thu, Mar 13, 2014 at 09:04:52AM +0100, Gerd Hoffmann wrote: Should we just assert((ram_size 10) 0x8000), and officially limit guests to 2T ? No. Not fully sure what reasonable behavier would be in case more than 2T are present. I guess either not generating type16 entries at all or simply fill in the maximum value we can represent. Well, there's an extended maximum capacity field available starting with smbios v2.7, which is an uint64_t counting bytes. Bumping the few other types up to 2.7 shouldn't be too onerous, but I have no idea how well the various currently supported OSs would react to smbios suddenly going v2.7... Then, a type20 node is assigned to the sub-4G portion of the first Type17 device, and another type20 node is assigned to the over-4G portion of the same. From then on, type20 nodes correspond to the rest of the 16G-or-less type17 devices pretty much on a 1:1 basis. Hmm, not sure why type20 entries are handled the way they are. I think it would make more sense to have one type20 entry per e820 ram entry, similar to type19. Type20 entries have pointers to type17 (memory_device_handle) and type19 (memory_array_mapped_address_handle). Which, if you turn it upside down could be interpreted as every type 17 dimm needs (at least) a type20 device mapped address to point at it. If the e820 table will contain more than just two E820_RAM entries, and therefore we'll have more than the two Type19 nodes on the bottom row, what are the rules for extending the rest of the figure accordingly (i.e. how do we hook together more Type17 and Type20 nodes to go along with the extra Type19 nodes) ? See above for type19+20. type17 represents the dimms, so where the memory is actually mapped doesn't matter there. Lets simply sum up all memory, then split into 16g pieces and create a type17 entry for each piece. At least initially. That's pretty much what happens now. If we decide to use e820 instead of simply (below_4g, above_4g), I'd like add some sort of assertion that would alert anyone who might start adding extra entries into e820 beyond the current two (below_4g and above_4g) :) After memory hotplug is in I might add e820 entries after above_4g for present at boot hotpluggable DIMMDevices. They would have 1:1 mapping i.e. t19-t20-t17 and belong only to 1 node.
[Qemu-devel] [RFC 09/12] target-ppc: Introduce Translation Macros for DFP Arithmetic Forms
This patch adds macros to the PowerPC translate.c file that will
be used by the Decimal Floating Point (DFP) arithmetic instructions.
These instruction forms have a target operand (FRT) and two source
operands (FRA, FRB). These forms also use the Rc bit to
set the CR6 field of the PowerPC Condition Register (CR6), which is
always a copy of bits 32-35 of the Floating Point Status and Control
Register (FPSCR).
The quadword form instructions use pairs of floating point registers.
In these instructions, the FRT, FRA and FRB instruction fields must
be even; this is handled via the illegal mask that is passed to the
GEN_HANDLER_E macro.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/translate.c | 63
1 files changed, 63 insertions(+), 0 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 91c33dc..26bfebc 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -8180,6 +8180,58 @@ static void gen_xxsldwi(DisasContext *ctx)
tcg_temp_free_i64(xtl);
}
+/*** Decimal Floating Point ***/
+
+static inline TCGv_ptr gen_fprp_ptr(int reg)
+{
+TCGv_ptr r = tcg_temp_new_ptr();
+tcg_gen_addi_ptr(r, cpu_env, offsetof(CPUPPCState, fpr[reg]));
+return r;
+}
+
+#if defined(TARGET_PPC64)
+static void gen_set_cr6_from_fpscr(DisasContext *ctx)
+{
+TCGv_i32 tmp = tcg_temp_new_i32();
+tcg_gen_trunc_tl_i32(tmp, cpu_fpscr);
+tcg_gen_shri_i32(cpu_crf[1], tmp, 28);
+tcg_temp_free_i32(tmp);
+}
+#else
+static void gen_set_cr6_from_fpscr(DisasContext *ctx)
+{
+tcg_gen_shri_tl(cpu_crf[1], cpu_fpscr, 28);
+}
+#endif
+
+#define _GEN_DFP_TAB(name, op1, op2) \
+static void gen_##name(DisasContext *ctx)\
+{\
+TCGv_ptr rd, ra, rb; \
+if (unlikely(!ctx-fpu_enabled)) { \
+gen_exception(ctx, POWERPC_EXCP_FPU);\
+return; \
+}\
+gen_update_nip(ctx, ctx-nip - 4); \
+rd = gen_fprp_ptr(rD(ctx-opcode)); \
+ra = gen_fprp_ptr(rA(ctx-opcode)); \
+rb = gen_fprp_ptr(rB(ctx-opcode)); \
+gen_helper_##name(cpu_env, rd, ra, rb); \
+if (unlikely(Rc(ctx-opcode) != 0)) {\
+gen_set_cr6_from_fpscr(ctx); \
+}\
+tcg_temp_free_ptr(rd); \
+tcg_temp_free_ptr(ra); \
+tcg_temp_free_ptr(rb); \
+}
+
+#define GEN_DFP_TAB(name, op1, op2) \
+_GEN_DFP_TAB(name, op1, op2)\
+_GEN_DFP_TAB(name##q, op1, op2)
+
+/* Avoid 'defined but not used' warnings ... this will be removed in */
+/* a subsequent patch. */
+void *_TempCr6_[] = { (void *)gen_set_cr6_from_fpscr, };
/*** SPE extension ***/
/* Register moves */
@@ -10999,6 +11051,17 @@ GEN_XXSEL_ROW(0x1F)
GEN_XX3FORM_DM(xxpermdi, 0x08, 0x01),
+#undef _GEN_DFP_TAB
+#undef GEN_DFP_TAB
+#define GEN_DFP_TAB_LONG(name, op1, op2) \
+GEN_HANDLER_E(name, 0x3B, op1, op2, 0, PPC_NONE, PPC2_DFP)
+
+#define GEN_DFP_TAB_QUAD(name, op1, op2) \
+GEN_HANDLER_E(name, 0x3F, op1, op2, 0x00210800, PPC_NONE, PPC2_DFP)
+
+#define GEN_DFP_TAB(name, op1, op2) \
+GEN_DFP_TAB_LONG(name, op1, op2),\
+GEN_DFP_TAB_QUAD(name##q, op1, op2),
#undef GEN_SPE
#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type,
PPC_NONE)
--
1.7.1
[Qemu-devel] virtio-serial broken in qemu.git (was: Re: [PULL for-2.0-rc0 25/31] virtio-console: QOM cast cleanup for VirtConsole)
git bisect is unsure, but one of these commits seems to have completely broken virtio-serial. There are only 'skip'ped commits left to test. The first bad commit could be any of: 0399a3819b27083ba69b88a9baa9025facab85bd 2ef66625f3a8978dcbbad773e6813f747971381e We cannot bisect more! Anyhow, the error is: hw/char/virtio-console.c:132:virtconsole_realize: Object 0x7f85482fb8a0 is not an instance of type virtconsole The full log including command line is attached. Rich. -- Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones virt-p2v converts physical machines to virtual machines. Boot with a live CD or over the network (PXE) and turn machines into KVM guests. http://libguestfs.org/virt-v2v *IMPORTANT NOTICE * * When reporting bugs, include the COMPLETE, UNEDITED * output below in your bug report. * LIBGUESTFS_HV=/home/rjones/d/qemu/x86_64-softmmu/qemu-system-x86_64 PATH=/usr/local/bin:/usr/bin:/bin:/usr/local/sbin:/usr/sbin:/home/rjones/.local/bin:/home/rjones/bin SELinux: Enforcing guestfs_get_append: (null) guestfs_get_autosync: 1 guestfs_get_backend: libvirt guestfs_get_backend_settings: [] guestfs_get_cachedir: /var/tmp guestfs_get_direct: 0 guestfs_get_hv: /home/rjones/d/qemu/x86_64-softmmu/qemu-system-x86_64 guestfs_get_memsize: 500 guestfs_get_network: 0 guestfs_get_path: /usr/lib64/guestfs guestfs_get_pgroup: 0 guestfs_get_program: libguestfs-test-tool guestfs_get_recovery_proc: 1 guestfs_get_selinux: 0 guestfs_get_smp: 1 guestfs_get_tmpdir: /tmp guestfs_get_trace: 0 guestfs_get_verbose: 1 host_cpu: x86_64 Launching appliance, timeout set to 600 seconds. libguestfs: launch: program=libguestfs-test-tool libguestfs: launch: version=1.25.44fedora=21,release=1.fc21,libvirt libguestfs: launch: backend registered: unix libguestfs: launch: backend registered: uml libguestfs: launch: backend registered: libvirt libguestfs: launch: backend registered: direct libguestfs: launch: backend=libvirt libguestfs: launch: tmpdir=/tmp/libguestfsKgILEw libguestfs: launch: umask=0002 libguestfs: launch: euid=1000 libguestfs: libvirt version = 1001003 (1.1.3) libguestfs: guest random name = guestfs-194p50rg5rpq1l6z libguestfs: [0ms] connect to libvirt libguestfs: opening libvirt handle: URI = qemu:///session, auth = default+wrapper, flags = 0 libguestfs: successfully opened libvirt handle: conn = 0x7f780fc31f50 libguestfs: qemu version (reported by libvirt) = 1007000 (1.7.0) libguestfs: [01629ms] get libvirt capabilities libguestfs: [01633ms] parsing capabilities XML libguestfs: [01634ms] build appliance libguestfs: [01634ms] begin building supermin appliance libguestfs: [01634ms] run supermin libguestfs: command: run: /usr/bin/supermin libguestfs: command: run: \ --build libguestfs: command: run: \ --verbose libguestfs: command: run: \ --if-newer libguestfs: command: run: \ --lock /var/tmp/.guestfs-1000/lock libguestfs: command: run: \ --copy-kernel libguestfs: command: run: \ -f ext2 libguestfs: command: run: \ --host-cpu x86_64 libguestfs: command: run: \ /usr/lib64/guestfs/supermin.d libguestfs: command: run: \ -o /var/tmp/.guestfs-1000/appliance.d supermin: version: 5.1.4 supermin: package handler: fedora/rpm supermin: acquiring lock on /var/tmp/.guestfs-1000/lock supermin: if-newer: output does not need rebuilding libguestfs: [01639ms] finished building supermin appliance libguestfs: command: run: qemu-img libguestfs: command: run: \ create libguestfs: command: run: \ -f qcow2 libguestfs: command: run: \ -o backing_file=/var/tmp/.guestfs-1000/appliance.d/root,backing_fmt=raw libguestfs: command: run: \ /tmp/libguestfsKgILEw/overlay2 Formatting '/tmp/libguestfsKgILEw/overlay2', fmt=qcow2 size=4294967296 backing_file='/var/tmp/.guestfs-1000/appliance.d/root' backing_fmt='raw' encryption=off cluster_size=65536 lazy_refcounts=off libguestfs: [02148ms] create libvirt XML libguestfs: libvirt XML:\n?xml version=1.0?\ndomain type=kvm xmlns:qemu=http://libvirt.org/schemas/domain/qemu/1.0;\n nameguestfs-194p50rg5rpq1l6z/name\n memory unit=MiB500/memory\n currentMemory unit=MiB500/currentMemory\n cpu mode=host-passthrough\nmodel fallback=allow/\n /cpu\n vcpu1/vcpu\n clock offset=utc\ntimer name=rtc tickpolicy=catchup/\ntimer name=pit tickpolicy=delay/\ntimer name=hpet present=no/\n /clock\n os\ntypehvm/type\n kernel/var/tmp/.guestfs-1000/appliance.d/kernel/kernel\n initrd/var/tmp/.guestfs-1000/appliance.d/initrd/initrd\n cmdlinepanic=1 console=ttyS0 udevtimeout=600 no_timer_check acpi=off printk.time=1 cgroup_disable=memory root=/dev/sdb selinux=0 guestfs_verbose=1 TERM=xterm-256color/cmdline\n /os\n seclabel type=none/\n on_rebootdestroy/on_reboot\n devices\n emulator/home/rjones/d/qemu/x86_64-softmmu/qemu-system-x86_64/emulator\n
[Qemu-devel] [PULL for-2.0-rc0 04/58] target-i386: Clean up ENV_GET_CPU() usage
Commits fdfba1a298ae26dd44bcfdb0429314139a0bc55a,
f606604f1c10b60ef294f1b9b229426521a365e3 and
2c17449b3022ca9623c4a7e2a504a4150ac4ad30 added usages of ENV_GET_CPU()
macro in target-specific code.
Use x86_env_get_cpu() or reuse existing X86CPU variable instead.
Cc: Edgar E. Iglesias edgar.igles...@xilinx.com
Cc: Peter Maydell peter.mayd...@linaro.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-i386/helper.c | 2 +-
target-i386/seg_helper.c | 2 +-
target-i386/smm_helper.c | 2 +-
target-i386/svm_helper.c | 16 +---
4 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 55c0457..11c7219 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -515,7 +515,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong
addr,
int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
int is_write1, int mmu_idx)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(x86_env_get_cpu(env));
uint64_t ptep, pte;
target_ulong pde_addr, pte_addr;
int error_code, is_dirty, prot, page_size, is_write, is_user;
diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index 959212b..9dda02d 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -1131,7 +1131,7 @@ static void do_interrupt_user(CPUX86State *env, int
intno, int is_int,
static void handle_even_inj(CPUX86State *env, int intno, int is_int,
int error_code, int is_hw, int rm)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(x86_env_get_cpu(env));
uint32_t event_inj = ldl_phys(cs-as, env-vm_vmcb + offsetof(struct vmcb,
control.event_inj));
diff --git a/target-i386/smm_helper.c b/target-i386/smm_helper.c
index 71c64b2..35901c9 100644
--- a/target-i386/smm_helper.c
+++ b/target-i386/smm_helper.c
@@ -181,8 +181,8 @@ void do_smm_enter(X86CPU *cpu)
void helper_rsm(CPUX86State *env)
{
-CPUState *cs = ENV_GET_CPU(env);
X86CPU *cpu = x86_env_get_cpu(env);
+CPUState *cs = CPU(cpu);
target_ulong sm_state;
int i, offset;
uint32_t val;
diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c
index b38d450..bc33e61 100644
--- a/target-i386/svm_helper.c
+++ b/target-i386/svm_helper.c
@@ -88,7 +88,8 @@ void helper_svm_check_io(CPUX86State *env, uint32_t port,
uint32_t param,
static inline void svm_save_seg(CPUX86State *env, hwaddr addr,
const SegmentCache *sc)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(x86_env_get_cpu(env));
+
stw_phys(cs-as, addr + offsetof(struct vmcb_seg, selector),
sc-selector);
stq_phys(cs-as, addr + offsetof(struct vmcb_seg, base),
@@ -102,7 +103,7 @@ static inline void svm_save_seg(CPUX86State *env, hwaddr
addr,
static inline void svm_load_seg(CPUX86State *env, hwaddr addr,
SegmentCache *sc)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(x86_env_get_cpu(env));
unsigned int flags;
sc-selector = lduw_phys(cs-as,
@@ -125,7 +126,7 @@ static inline void svm_load_seg_cache(CPUX86State *env,
hwaddr addr,
void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(x86_env_get_cpu(env));
target_ulong addr;
uint32_t event_inj;
uint32_t int_ctl;
@@ -365,7 +366,7 @@ void helper_vmmcall(CPUX86State *env)
void helper_vmload(CPUX86State *env, int aflag)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(x86_env_get_cpu(env));
target_ulong addr;
cpu_svm_check_intercept_param(env, SVM_EXIT_VMLOAD, 0);
@@ -405,7 +406,7 @@ void helper_vmload(CPUX86State *env, int aflag)
void helper_vmsave(CPUX86State *env, int aflag)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(x86_env_get_cpu(env));
target_ulong addr;
cpu_svm_check_intercept_param(env, SVM_EXIT_VMSAVE, 0);
@@ -486,7 +487,7 @@ void helper_invlpga(CPUX86State *env, int aflag)
void helper_svm_check_intercept_param(CPUX86State *env, uint32_t type,
uint64_t param)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(x86_env_get_cpu(env));
if (likely(!(env-hflags HF_SVMI_MASK))) {
return;
@@ -568,7 +569,8 @@ void cpu_svm_check_intercept_param(CPUX86State *env,
uint32_t type,
void helper_svm_check_io(CPUX86State *env, uint32_t port, uint32_t param,
uint32_t next_eip_addend)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(x86_env_get_cpu(env));
+
if (env-intercept (1ULL (SVM_EXIT_IOIO - SVM_EXIT_INTR))) {
/* FIXME: this should be read in at vmrun (faster this way?) */
uint64_t addr = ldq_phys(cs-as, env-vm_vmcb +
--
1.8.4.5
Re: [Qemu-devel] virtio-serial broken in qemu.git (was: Re: [PULL for-2.0-rc0 25/31] virtio-console: QOM cast cleanup for VirtConsole)
On Thu, Mar 13, 2014 at 03:32:05PM +, Richard W.M. Jones wrote: Anyhow, the error is: hw/char/virtio-console.c:132:virtconsole_realize: Object 0x7f85482fb8a0 is not an instance of type virtconsole The full log including command line is attached. Sorry, I realize that libvirt hid the command line. The command line and log was: 2014-03-13 15:31:25.718+: starting up LC_ALL=C PATH=/usr/local/bin:/usr/bin:/bin:/usr/local/sbin:/usr/sbin:/home/rjones/.local/bin:/home/rjones/bin HOME=/home/rjones USER=rjones LOGNAME=rjones QEMU_AUDIO_DRV=none TMPDIR=/var/tmp /home/rjones/d/qemu/x86_64-softmmu/qemu-system-x86_64 -name guestfs-194p50rg5rpq1l6z -S -machine pc-i440fx-2.0,accel=kvm,usb=off -cpu host -m 500 -realtime mlock=off -smp 1,sockets=1,cores=1,threads=1 -uuid 54abc82b-46c8-4c8c-9152-97272a1d8325 -nographic -no-user-config -nodefaults -chardev socket,id=charmonitor,path=/home/rjones/.config/libvirt/qemu/lib/guestfs-194p50rg5rpq1l6z.monitor,server,nowait -mon chardev=charmonitor,id=monitor,mode=control -rtc base=utc,driftfix=slew -global kvm-pit.lost_tick_policy=discard -no-hpet -no-reboot -no-acpi -kernel /var/tmp/.guestfs-1000/appliance.d/kernel -initrd /var/tmp/.guestfs-1000/appliance.d/initrd -append panic=1 console=ttyS0 udevtimeout=600 no_timer_check acpi=off printk.time=1 cgroup_disable=memory root=/dev/sdb selinux=0 guestfs_verbose=1 TERM=xterm-256color -device piix3-usb-uhci,id=usb,bus=pci.0,addr=0x1.0x2 -device virtio-scsi-pci,id=scsi0,bus=pci.0,addr=0x2 -device virtio-serial-pci,id=virtio-serial0,bus=pci.0,addr=0x3 -drive file=/tmp/libguestfsKgILEw/scratch.1,if=none,id=drive-scsi0-0-0-0,format=raw,cache=unsafe -device scsi-hd,bus=scsi0.0,channel=0,scsi-id=0,lun=0,drive=drive-scsi0-0-0-0,id=scsi0-0-0-0,bootindex=1 -drive file=/tmp/libguestfsKgILEw/overlay2,if=none,id=drive-scsi0-0-1-0,format=qcow2,cache=unsafe -device scsi-hd,bus=scsi0.0,channel=0,scsi-id=1,lun=0,drive=drive-scsi0-0-1-0,id=scsi0-0-1-0 -chardev socket,id=charserial0,path=/tmp/libguestfsKgILEw/console.sock -device isa-serial,chardev=charserial0,id=serial0 -chardev socket,id=charchannel0,path=/tmp/libguestfsKgILEw/guestfsd.sock -device virtserialport,bus=virtio-serial0.0,nr=1,chardev=charchannel0,id=channel0,name=org.libguestfs.channel.0 -device virtio-balloon-pci,id=balloon0,bus=pci.0,addr=0x4 Domain id=2 is tainted: custom-argv Domain id=2 is tainted: host-cpu hw/char/virtio-console.c:132:virtconsole_realize: Object 0x7f85482fb8a0 is not an instance of type virtconsole 2014-03-13 15:31:25.922+: shutting down Rich. -- Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones Read my programming blog: http://rwmj.wordpress.com Fedora now supports 80 OCaml packages (the OPEN alternative to F#)
[Qemu-devel] [PATCH qom-next] virtio-console-test: Test virtserialport as well
A test is only as good as its coverage - testing virtserialport in
addition to virtconsole shows that commit
0399a3819b27083ba69b88a9baa9025facab85bd (virtio-console: QOM cast
cleanup for VirtConsole) broke virtserialport.
Reported-by: Richard W.M. Jones rjo...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
tests/virtio-console-test.c | 19 +--
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/tests/virtio-console-test.c b/tests/virtio-console-test.c
index f98f5af2..6be96e8 100644
--- a/tests/virtio-console-test.c
+++ b/tests/virtio-console-test.c
@@ -13,8 +13,18 @@
#include qemu/osdep.h
/* Tests only initialization so far. TODO: Replace with functional tests */
-static void pci_nop(void)
+static void console_pci_nop(void)
{
+qtest_start(-device virtio-serial-pci,id=vser0
+-device virtconsole,bus=vser0.0);
+qtest_end();
+}
+
+static void serialport_pci_nop(void)
+{
+qtest_start(-device virtio-serial-pci,id=vser0
+-device virtserialport,bus=vser0.0);
+qtest_end();
}
int main(int argc, char **argv)
@@ -22,13 +32,10 @@ int main(int argc, char **argv)
int ret;
g_test_init(argc, argv, NULL);
-qtest_add_func(/virtio/console/pci/nop, pci_nop);
+qtest_add_func(/virtio/console/pci/nop, console_pci_nop);
+qtest_add_func(/virtio/serialport/pci/nop, serialport_pci_nop);
-qtest_start(-device virtio-serial-pci,id=vser0
--device virtconsole,bus=vser0.0);
ret = g_test_run();
-qtest_end();
-
return ret;
}
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 40/58] translate-all: Change cpu_restore_state() argument to CPUState
This lets us drop some local variables in tlb_fill() functions.
Signed-off-by: Andreas Färber afaer...@suse.de
---
hw/i386/kvmvapic.c| 2 +-
include/exec/exec-all.h | 2 +-
target-alpha/helper.c | 2 +-
target-alpha/mem_helper.c | 7 ++-
target-arm/op_helper.c| 2 +-
target-cris/op_helper.c | 2 +-
target-i386/helper.c | 2 +-
target-i386/mem_helper.c | 2 +-
target-lm32/op_helper.c | 5 +
target-m68k/op_helper.c | 5 +
target-microblaze/op_helper.c | 5 +
target-mips/op_helper.c | 2 +-
target-moxie/helper.c | 6 ++
target-openrisc/mmu_helper.c | 5 +
target-ppc/mmu_helper.c | 2 +-
target-s390x/mem_helper.c | 5 +
target-s390x/misc_helper.c| 2 +-
target-sh4/op_helper.c| 7 ++-
target-sparc/helper.c | 20 ++--
target-sparc/ldst_helper.c| 8 +++-
target-unicore32/op_helper.c | 5 +
target-xtensa/op_helper.c | 6 --
translate-all.c | 3 ++-
user-exec.c | 2 +-
24 files changed, 46 insertions(+), 63 deletions(-)
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index 6cf5d41..39d516a 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@ -406,7 +406,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU
*cpu, target_ulong ip)
}
if (!kvm_enabled()) {
-cpu_restore_state(env, cs-mem_io_pc);
+cpu_restore_state(cs, cs-mem_io_pc);
cpu_get_tb_cpu_state(env, current_pc, current_cs_base,
current_flags);
}
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 80277ea..cf5cd71 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -80,7 +80,7 @@ void restore_state_to_opc(CPUArchState *env, struct
TranslationBlock *tb,
void cpu_gen_init(void);
int cpu_gen_code(CPUArchState *env, struct TranslationBlock *tb,
int *gen_code_size_ptr);
-bool cpu_restore_state(CPUArchState *env, uintptr_t searched_pc);
+bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc);
void page_size_init(void);
void QEMU_NORETURN cpu_resume_from_signal(CPUArchState *env1, void *puc);
diff --git a/target-alpha/helper.c b/target-alpha/helper.c
index 45f73e0..305dd67 100644
--- a/target-alpha/helper.c
+++ b/target-alpha/helper.c
@@ -526,7 +526,7 @@ void QEMU_NORETURN dynamic_excp(CPUAlphaState *env,
uintptr_t retaddr,
cs-exception_index = excp;
env-error_code = error;
if (retaddr) {
-cpu_restore_state(env, retaddr);
+cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
}
diff --git a/target-alpha/mem_helper.c b/target-alpha/mem_helper.c
index 1957c56..5964bdc 100644
--- a/target-alpha/mem_helper.c
+++ b/target-alpha/mem_helper.c
@@ -105,7 +105,7 @@ static void do_unaligned_access(CPUAlphaState *env,
target_ulong addr,
uint32_t insn;
if (retaddr) {
-cpu_restore_state(env, retaddr);
+cpu_restore_state(cs, retaddr);
}
pc = env-pc;
@@ -159,11 +159,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
is_write,
ret = alpha_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (unlikely(ret != 0)) {
-AlphaCPU *cpu = ALPHA_CPU(cs);
-CPUAlphaState *env = cpu-env;
-
if (retaddr) {
-cpu_restore_state(env, retaddr);
+cpu_restore_state(cs, retaddr);
}
/* Exception index and error code are already set */
cpu_loop_exit(cs);
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index f8e535e..21ff58e 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -87,7 +87,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
int mmu_idx,
if (retaddr) {
/* now we have a real cpu fault */
-cpu_restore_state(env, retaddr);
+cpu_restore_state(cs, retaddr);
}
raise_exception(env, cs-exception_index);
}
diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c
index d80b6c9..d28bd61 100644
--- a/target-cris/op_helper.c
+++ b/target-cris/op_helper.c
@@ -67,7 +67,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
int mmu_idx,
if (unlikely(ret)) {
if (retaddr) {
/* now we have a real cpu fault */
-if (cpu_restore_state(env, retaddr)) {
+if (cpu_restore_state(cs, retaddr)) {
/* Evaluate flags after retranslation. */
helper_top_evaluate_flags(env);
}
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 59736d7..cb29aa4 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1263,7 +1263,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess
access)
cpu_interrupt(cs, CPU_INTERRUPT_TPR);
} else {
-cpu_restore_state(env, cs-mem_io_pc);
+cpu_restore_state(cs,
Re: [Qemu-devel] [PATCH v4 2/3] qapi: Add a primitive to include other files from a QAPI schema file
On 03/13/2014 09:33 AM, Benoît Canet wrote: We certainly can't do without comments. JSON is designed for easy data exchange, but we use it as programming language syntax. Its restrictions make sense for easy data exchange, but hurt our use. We're not the first ones experiencing that pain: http://json5.org/ No idea how much momentum this JSON5 thingy has... If we 's,#,//,', our comments magically fall in line with JSON5 syntax; everything else in our files is already compliant with JSON5. Switch to JSON5 and call it qapi-schema.json5? This actually seems like a rather nice idea - but due to our choice of comments, it means rewriting the bulk of the file and tweaking our parser. Hmm don't we want something that python and other language know how to parse out of the box ? Or will we write yet another delicate work of art to parse it ? Our existing parser would only need to learn a new comment syntax to parse the subset of JSON5 that we currently actually use. Parsing FULL JSON5 would mean also learning about trailing commas, unquoted names in name:value pairs, multiline strings, and alternative numeric representations. But a point made on the JSON5 page is that ES5 JavaScript already parses JSON5, just as it already parses original JSON. -- Eric Blake eblake redhat com+1-919-301-3266 Libvirt virtualization library http://libvirt.org signature.asc Description: OpenPGP digital signature
[Qemu-devel] [PULL for-2.0-rc0 46/58] target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-ppc/cpu-qom.h| 8 +---
target-ppc/mmu-hash32.c | 5 +++--
target-ppc/mmu-hash32.h | 2 +-
target-ppc/mmu-hash64.c | 5 +++--
target-ppc/mmu-hash64.h | 2 +-
target-ppc/mmu_helper.c | 2 +-
6 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index b17c024..47dc8e6 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -38,6 +38,8 @@
#define POWERPC_CPU_GET_CLASS(obj) \
OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
+typedef struct PowerPCCPU PowerPCCPU;
+
/**
* PowerPCCPUClass:
* @parent_realize: The parent class' realize handler.
@@ -71,7 +73,7 @@ typedef struct PowerPCCPUClass {
void (*init_proc)(CPUPPCState *env);
int (*check_pow)(CPUPPCState *env);
#if defined(CONFIG_SOFTMMU)
-int (*handle_mmu_fault)(CPUPPCState *env, target_ulong eaddr, int rwx,
+int (*handle_mmu_fault)(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
int mmu_idx);
#endif
} PowerPCCPUClass;
@@ -83,14 +85,14 @@ typedef struct PowerPCCPUClass {
*
* A PowerPC CPU.
*/
-typedef struct PowerPCCPU {
+struct PowerPCCPU {
/* private */
CPUState parent_obj;
/* public */
CPUPPCState env;
int cpu_dt_id;
-} PowerPCCPU;
+};
static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
{
diff --git a/target-ppc/mmu-hash32.c b/target-ppc/mmu-hash32.c
index aa87084..6a4d6a8 100644
--- a/target-ppc/mmu-hash32.c
+++ b/target-ppc/mmu-hash32.c
@@ -381,10 +381,11 @@ static hwaddr ppc_hash32_pte_raddr(target_ulong sr,
ppc_hash_pte32_t pte,
return (rpn ~mask) | (eaddr mask);
}
-int ppc_hash32_handle_mmu_fault(CPUPPCState *env, target_ulong eaddr, int rwx,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
int mmu_idx)
{
-CPUState *cs = CPU(ppc_env_get_cpu(env));
+CPUState *cs = CPU(cpu);
+CPUPPCState *env = cpu-env;
target_ulong sr;
hwaddr pte_offset;
ppc_hash_pte32_t pte;
diff --git a/target-ppc/mmu-hash32.h b/target-ppc/mmu-hash32.h
index e193a6d..d515d4f 100644
--- a/target-ppc/mmu-hash32.h
+++ b/target-ppc/mmu-hash32.h
@@ -5,7 +5,7 @@
hwaddr get_pteg_offset32(CPUPPCState *env, hwaddr hash);
hwaddr ppc_hash32_get_phys_page_debug(CPUPPCState *env, target_ulong addr);
-int ppc_hash32_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
int mmu_idx);
/*
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 7186c0d..98cfb35 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -454,10 +454,11 @@ static hwaddr ppc_hash64_pte_raddr(ppc_slb_t *slb,
ppc_hash_pte64_t pte,
return (rpn ~mask) | (eaddr mask);
}
-int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong eaddr,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr,
int rwx, int mmu_idx)
{
-CPUState *cs = CPU(ppc_env_get_cpu(env));
+CPUState *cs = CPU(cpu);
+CPUPPCState *env = cpu-env;
ppc_slb_t *slb;
hwaddr pte_offset;
ppc_hash_pte64_t pte;
diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
index 26f7341..49e385d 100644
--- a/target-ppc/mmu-hash64.h
+++ b/target-ppc/mmu-hash64.h
@@ -7,7 +7,7 @@
void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env);
int ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs);
hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr);
-int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
int mmu_idx);
void ppc_hash64_store_hpte(CPUPPCState *env, target_ulong index,
target_ulong pte0, target_ulong pte1);
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index 2a94f3d..c75b4f2 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -2902,7 +2902,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
is_write, int mmu_idx,
int ret;
if (pcc-handle_mmu_fault) {
-ret = pcc-handle_mmu_fault(env, addr, is_write, mmu_idx);
+ret = pcc-handle_mmu_fault(cpu, addr, is_write, mmu_idx);
} else {
ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx);
}
--
1.8.4.5
[Qemu-devel] [RFC 11/12] target-ppc: Introduce DFP Post Processor Utilities
This patch adds post-processing utilities to the PowerPC Decimal Floating
Point (DFP) helper code. Post-processors are small routines that execute
after a preliminary DFP result is computed. They are used, among other
things, to compute status bits.
This patch defines a function type for post processors as well as a
generic routine to run a list (array) of post-processors. It also
adds several post processors that will be used in subsequent
instructions.
NOTE: This is not the complete set of post processors; it is the minimal
set required to demonstrate the two instructions implemented in this
patch series.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/dfp_helper.c | 140 +++
1 files changed, 140 insertions(+), 0 deletions(-)
diff --git a/target-ppc/dfp_helper.c b/target-ppc/dfp_helper.c
index 3c5988a..a3381ef 100644
--- a/target-ppc/dfp_helper.c
+++ b/target-ppc/dfp_helper.c
@@ -103,9 +103,149 @@ static void ppc_dfp_prepare_decimal128_fra_frb(struct
PPC_DFP *dfp, uint64_t *a,
decimal128ToNumber((decimal128 *)dfp-b64, dfp-b);
}
+#define FP_FX (1ull FPSCR_FX)
+#define FP_FEX (1ull FPSCR_FEX)
+#define FP_OX (1ull FPSCR_OX)
+#define FP_OE (1ull FPSCR_OE)
+#define FP_UX (1ull FPSCR_UX)
+#define FP_UE (1ull FPSCR_UE)
+#define FP_XX (1ull FPSCR_XX)
+#define FP_XE (1ull FPSCR_XE)
+#define FP_VX (1ull FPSCR_VX)
+#define FP_VXSNAN (1ull FPSCR_VXSNAN)
+#define FP_VXISI(1ull FPSCR_VXISI)
+#define FP_VE (1ull FPSCR_VE)
+#define FP_FI (1ull FPSCR_FI)
+
+static void ppc_dfp_set_FPSCR_flag(struct PPC_DFP *dfp, uint64_t flag,
+uint64_t enabled)
+{
+dfp-env-fpscr |= (flag | FP_FX);
+if (dfp-env-fpscr enabled) {
+dfp-env-fpscr |= FP_FEX;
+}
+}
+
+typedef void (*PPC_DFP_PostProc)(struct PPC_DFP *);
+
+static void ppc_dfp_set_FPRF_from_FRT_with_context(struct PPC_DFP *dfp,
+decContext *context)
+{
+uint64_t fprf = 0;
+
+/* construct FPRF */
+switch (decNumberClass(dfp-t, context)) {
+case DEC_CLASS_SNAN:
+fprf = 0x01;
+break;
+case DEC_CLASS_QNAN:
+fprf = 0x11;
+break;
+case DEC_CLASS_NEG_INF:
+fprf = 0x09;
+break;
+case DEC_CLASS_NEG_NORMAL:
+fprf = 0x08;
+break;
+case DEC_CLASS_NEG_SUBNORMAL:
+fprf = 0x18;
+break;
+case DEC_CLASS_NEG_ZERO:
+fprf = 0x12;
+break;
+case DEC_CLASS_POS_ZERO:
+fprf = 0x02;
+break;
+case DEC_CLASS_POS_SUBNORMAL:
+fprf = 0x14;
+break;
+case DEC_CLASS_POS_NORMAL:
+fprf = 0x04;
+break;
+case DEC_CLASS_POS_INF:
+fprf = 0x05;
+break;
+default:
+assert(0); /* should never get here */
+}
+dfp-env-fpscr = ~(0x1F 12);
+dfp-env-fpscr |= (fprf 12);
+}
+
+static void ppc_dfp_set_FPRF_from_FRT(struct PPC_DFP *dfp)
+{
+ppc_dfp_set_FPRF_from_FRT_with_context(dfp, dfp-context);
+}
+
+static void ppc_dfp_check_for_OX(struct PPC_DFP *dfp)
+{
+if (dfp-context.status DEC_Overflow) {
+ppc_dfp_set_FPSCR_flag(dfp, FP_OX, FP_OE);
+}
+}
+
+static void ppc_dfp_check_for_UX(struct PPC_DFP *dfp)
+{
+if (dfp-context.status DEC_Underflow) {
+ppc_dfp_set_FPSCR_flag(dfp, FP_UX, FP_UE);
+}
+}
+
+static void ppc_dfp_check_for_XX(struct PPC_DFP *dfp)
+{
+if (dfp-context.status DEC_Inexact) {
+ppc_dfp_set_FPSCR_flag(dfp, FP_XX | FP_FI, FP_XE);
+}
+}
+
+static void ppc_dfp_check_for_VXSNAN(struct PPC_DFP *dfp)
+{
+if (dfp-context.status DEC_Invalid_operation) {
+if (decNumberIsSNaN(dfp-a) || decNumberIsSNaN(dfp-b)) {
+ppc_dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXSNAN, FP_VE);
+}
+}
+}
+
+static void ppc_dfp_check_for_VXISI(struct PPC_DFP *dfp, int testForSameSign)
+{
+if (dfp-context.status DEC_Invalid_operation) {
+if (decNumberIsInfinite(dfp-a) decNumberIsInfinite(dfp-b)) {
+int same = decNumberClass(dfp-a, dfp-context) ==
+ decNumberClass(dfp-b, dfp-context);
+if ((same testForSameSign) || (!same !testForSameSign)) {
+ppc_dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXISI, FP_VE);
+}
+}
+}
+}
+
+static void ppc_dfp_check_for_VXISI_add(struct PPC_DFP *dfp)
+{
+ppc_dfp_check_for_VXISI(dfp, 0);
+}
+
+static void ppc_dfp_run_post_processors(struct PPC_DFP *dfp,
+PPC_DFP_PostProc post_processors[], const size_t n)
+{
+int i;
+
+for (i = 0; i n; i++) {
+post_processors[i](dfp);
+}
+}
+
+
void *_TmpAvoidDefinedButNotUsedWarnings_[] = {
(void *)ppc_dfp_prepare_decimal64_fra_frb,
(void *)ppc_dfp_prepare_decimal128_fra_frb,
+(void *)ppc_dfp_run_post_processors,
+(void *)ppc_dfp_set_FPRF_from_FRT,
+(void *)ppc_dfp_check_for_OX,
+(void
Re: [Qemu-devel] [PATCH qom-next] virtio-console-test: Test virtserialport as well
On Thu, Mar 13, 2014 at 04:51:10PM +0100, Andreas Färber wrote: A test is only as good as its coverage - testing virtserialport in addition to virtconsole shows that commit 0399a3819b27083ba69b88a9baa9025facab85bd (virtio-console: QOM cast cleanup for VirtConsole) broke virtserialport. This patch demonstrates the error for me when I use 'make check' in qemu.git, so ACK. Rich. -- Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones virt-top is 'top' for virtual machines. Tiny program with many powerful monitoring features, net stats, disk stats, logging, etc. http://people.redhat.com/~rjones/virt-top
[Qemu-devel] [PULL v2 for-2.0 08/24] rfifolock: add recursive FIFO lock
QemuMutex does not guarantee fairness and cannot be acquired
recursively:
Fairness means each locker gets a turn and the scheduler cannot cause
starvation.
Recursive locking is useful for composition, it allows a sequence of
locking operations to be invoked atomically by acquiring the lock around
them.
This patch adds RFifoLock, a recursive lock that guarantees FIFO order.
Its first user is added in the next patch.
RFifoLock has one additional feature: it can be initialized with an
optional contention callback. The callback is invoked whenever a thread
must wait for the lock. For example, it can be used to poke the current
owner so that they release the lock soon.
Signed-off-by: Stefan Hajnoczi stefa...@redhat.com
---
include/qemu/rfifolock.h | 54
tests/Makefile | 2 ++
tests/test-rfifolock.c | 91
util/Makefile.objs | 1 +
util/rfifolock.c | 78 +
5 files changed, 226 insertions(+)
create mode 100644 include/qemu/rfifolock.h
create mode 100644 tests/test-rfifolock.c
create mode 100644 util/rfifolock.c
diff --git a/include/qemu/rfifolock.h b/include/qemu/rfifolock.h
new file mode 100644
index 000..b23ab53
--- /dev/null
+++ b/include/qemu/rfifolock.h
@@ -0,0 +1,54 @@
+/*
+ * Recursive FIFO lock
+ *
+ * Copyright Red Hat, Inc. 2013
+ *
+ * Authors:
+ * Stefan Hajnoczi stefa...@redhat.com
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
+
+#ifndef QEMU_RFIFOLOCK_H
+#define QEMU_RFIFOLOCK_H
+
+#include qemu/thread.h
+
+/* Recursive FIFO lock
+ *
+ * This lock provides more features than a plain mutex:
+ *
+ * 1. Fairness - enforces FIFO order.
+ * 2. Nesting - can be taken recursively.
+ * 3. Contention callback - optional, called when thread must wait.
+ *
+ * The recursive FIFO lock is heavyweight so prefer other synchronization
+ * primitives if you do not need its features.
+ */
+typedef struct {
+QemuMutex lock; /* protects all fields */
+
+/* FIFO order */
+unsigned int head; /* active ticket number */
+unsigned int tail; /* waiting ticket number */
+QemuCond cond; /* used to wait for our ticket number */
+
+/* Nesting */
+QemuThread owner_thread;/* thread that currently has ownership */
+unsigned int nesting; /* amount of nesting levels */
+
+/* Contention callback */
+void (*cb)(void *); /* called when thread must wait, with -lock
+ * held so it may not recursively lock/unlock
+ */
+void *cb_opaque;
+} RFifoLock;
+
+void rfifolock_init(RFifoLock *r, void (*cb)(void *), void *opaque);
+void rfifolock_destroy(RFifoLock *r);
+void rfifolock_lock(RFifoLock *r);
+void rfifolock_unlock(RFifoLock *r);
+
+#endif /* QEMU_RFIFOLOCK_H */
diff --git a/tests/Makefile b/tests/Makefile
index e146f81..190e596 100644
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -35,6 +35,7 @@ check-unit-y += tests/test-visitor-serialization$(EXESUF)
check-unit-y += tests/test-iov$(EXESUF)
gcov-files-test-iov-y = util/iov.c
check-unit-y += tests/test-aio$(EXESUF)
+check-unit-y += tests/test-rfifolock$(EXESUF)
check-unit-y += tests/test-throttle$(EXESUF)
gcov-files-test-aio-$(CONFIG_WIN32) = aio-win32.c
gcov-files-test-aio-$(CONFIG_POSIX) = aio-posix.c
@@ -176,6 +177,7 @@ tests/check-qjson$(EXESUF): tests/check-qjson.o
libqemuutil.a libqemustub.a
tests/check-qom-interface$(EXESUF): tests/check-qom-interface.o
$(qom-core-obj) libqemuutil.a libqemustub.a
tests/test-coroutine$(EXESUF): tests/test-coroutine.o $(block-obj-y)
libqemuutil.a libqemustub.a
tests/test-aio$(EXESUF): tests/test-aio.o $(block-obj-y) libqemuutil.a
libqemustub.a
+tests/test-rfifolock$(EXESUF): tests/test-rfifolock.o libqemuutil.a
libqemustub.a
tests/test-throttle$(EXESUF): tests/test-throttle.o $(block-obj-y)
libqemuutil.a libqemustub.a
tests/test-thread-pool$(EXESUF): tests/test-thread-pool.o $(block-obj-y)
libqemuutil.a libqemustub.a
tests/test-iov$(EXESUF): tests/test-iov.o libqemuutil.a
diff --git a/tests/test-rfifolock.c b/tests/test-rfifolock.c
new file mode 100644
index 000..0572ebb
--- /dev/null
+++ b/tests/test-rfifolock.c
@@ -0,0 +1,91 @@
+/*
+ * RFifoLock tests
+ *
+ * Copyright Red Hat, Inc. 2013
+ *
+ * Authors:
+ * Stefan Hajnoczistefa...@redhat.com
+ *
+ * This work is licensed under the terms of the GNU LGPL, version 2 or later.
+ * See the COPYING.LIB file in the top-level directory.
+ */
+
+#include glib.h
+#include qemu-common.h
+#include qemu/rfifolock.h
+
+static void test_nesting(void)
+{
+RFifoLock lock;
+
+/* Trivial test, ensure the lock is recursive */
+rfifolock_init(lock, NULL, NULL);
+rfifolock_lock(lock);
+rfifolock_lock(lock);
+rfifolock_lock(lock);
+
[Qemu-devel] [PULL for-2.0-rc0 00/58] QOM CPUState patch queue 2014-03-13
Hello Peter,
This is my current QOM CPU patch queue. Please pull.
Since this touches on bsd-user code, request to apply the build fix first.
NB: I was only able to test x86/ppc/arm KVM this time; s390x KVM was
re-reviewed only.
Regards,
Andreas
Cc: Peter Maydell peter.mayd...@linaro.org
Cc: Anthony Liguori anth...@codemonkey.ws
Cc: Eduardo Habkost ehabk...@redhat.com
Cc: Igor Mammedov imamm...@redhat.com
Cc: Christian Borntraeger borntrae...@de.ibm.com
The following changes since commit be86c53c058d75fc3938b1b54f363259f282b3d5:
Merge remote-tracking branch 'remotes/afaerber/tags/ppc-for-2.0' into staging
(2014-03-13 13:19:46 +)
are available in the git repository at:
git://github.com/afaerber/qemu-cpu.git tags/qom-cpu-for-2.0
for you to fetch changes up to 98f11363e7add1e750f76e3d81750348f0470c29:
user-exec: Change exception_action() argument to CPUState (2014-03-13
15:35:04 +0100)
QOM CPUState refactorings / X86CPU
* Deadlock fix for exit requests around CPU reset
* X86CPU x2apic for KVM
* X86CPU model subclasses
* SPARCCPU preparations for model subclasses
* -cpu arguments for arm, cris, lm32, moxie, openrisc, ppc, sh4, uc32
* m68k assertion cleanups
* CPUClass hooks for cpu.h inline functions
* Field movements from CPU_COMMON to CPUState and follow-up cleanups
Andreas Färber (48):
target-alpha: Clean up ENV_GET_CPU() usage
target-arm: Clean up ENV_GET_CPU() usage
target-i386: Clean up ENV_GET_CPU() usage
target-ppc: Clean up ENV_GET_CPU() usage
target-s390x: Clean up ENV_GET_CPU() usage
target-sparc: Clean up ENV_GET_CPU() usage
target-unicore32: Clean up ENV_GET_CPU() usage
target-xtensa: Clean up ENV_GET_CPU() usage
cpu: Turn cpu_has_work() into a CPUClass hook
target-i386: Prepare CPUClass::class_by_name for X86CPU
cpu: Introduce CPUClass::parse_features() hook
target-sparc: Use error_report() for CPU error reporting
target-sparc: Implement CPUClass::parse_features() for SPARCCPU
target-sparc: Defer SPARCCPU feature inference to QOM realize
cpu: Implement CPUClass::parse_features() for the rest of CPUs
cpu: Factor out cpu_generic_init()
cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook
cpu: Move mem_io_{pc,vaddr} fields from CPU_COMMON to CPUState
cpu: Move can_do_io field from CPU_COMMON to CPUState
cpu: Move icount_extra field from CPU_COMMON to CPUState
cpu: Move icount_decr field from CPU_COMMON to CPUState
cpu: Move tb_jmp_cache field from CPU_COMMON to CPUState
cpu: Move jmp_env field from CPU_COMMON to CPUState
cpu: Move exception_index field from CPU_COMMON to CPUState
cpu: Move opaque field from CPU_COMMON to CPUState
cpu: Move watchpoint fields from CPU_COMMON to CPUState
cpu: Move breakpoints field from CPU_COMMON to CPUState
exec: Change tlb_fill() argument to CPUState
cpu-exec: Change cpu_loop_exit() argument to CPUState
translate-all: Change cpu_restore_state() argument to CPUState
translate-all: Change cpu_restore_state_from_tb() argument to CPUState
translate-all: Change tb_check_watchpoint() argument to CPUState
translate-all: Change cpu_io_recompile() argument to CPUState
translate-all: Change tb_gen_code() argument to CPUState
translate-all: Change tb_flush_jmp_cache() argument to CPUState
target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook
exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argument
exec: Change cpu_breakpoint_{insert,remove{,_by_ref,_all}} argument
cpu-exec: Change cpu_resume_from_signal() argument to CPUState
cputlb: Change tlb_unprotect_code_phys() argument to CPUState
exec: Change memory_region_section_get_iotlb() argument to CPUState
exec: Change cpu_abort() argument to CPUState
target-cris: Replace DisasContext::env field with CRISCPU
target-microblaze: Replace DisasContext::env field with MicroBlazeCPU
cputlb: Change tlb_flush_page() argument to CPUState
cputlb: Change tlb_flush() argument to CPUState
cputlb: Change tlb_set_page() argument to CPUState
user-exec: Change exception_action() argument to CPUState
Edgar E. Iglesias (1):
cpu: Don't clear cpu-exit_request on reset
Eduardo Habkost (8):
target-i386: Rename cpu_x86_register() to x86_cpu_load_def()
target-i386: Call x86_cpu_load_def() earlier
target-i386: Rename x86_def_t to X86CPUDefinition
target-i386: Don't declare variables in the middle of blocks
target-i386: Make kvm_default_features an array
target-i386: Introduce x86_cpu_compat_disable_kvm_features()
target-i386: Enable x2apic by default on KVM
target-i386: X86CPU model subclasses
Peter Maydell (1):
target-m68k:
[Qemu-devel] [PULL for-2.0-rc0 19/58] target-i386: X86CPU model subclasses
From: Eduardo Habkost ehabk...@redhat.com
Register separate QOM types for each x86 CPU model.
This will allow management code to more easily probe what each CPU model
provides, by simply creating objects using the appropriate class name,
without having to restart QEMU.
This also allows us to eliminate the qdev_prop_set_globals_for_type()
hack to set CPU-model-specific global properties.
Instead of creating separate class_init functions for each class, I just
used class_data to store a pointer to the X86CPUDefinition struct for
each CPU model. This should make the patch shorter and easier to review.
Later we can gradually convert each X86CPUDefinition field to lists of
per-class property defaults.
The host CPU model is special, as the feature flags depend on KVM
being initialized. So it has its own class_init and instance_init
function, and feature flags are set on instance_init instead of
class_init.
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Igor Mammedov imamm...@redhat.com
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
Reviewed-by: Eduardo Habkost ehabk...@redhat.com
Tested-by: Eduardo Habkost ehabk...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-i386/cpu-qom.h | 15 +
target-i386/cpu.c | 177 +-
2 files changed, 119 insertions(+), 73 deletions(-)
diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
index 722f11a..e9b3d57 100644
--- a/target-i386/cpu-qom.h
+++ b/target-i386/cpu-qom.h
@@ -38,7 +38,17 @@
OBJECT_GET_CLASS(X86CPUClass, (obj), TYPE_X86_CPU)
/**
+ * X86CPUDefinition:
+ *
+ * CPU model definition data that was not converted to QOM per-subclass
+ * property defaults yet.
+ */
+typedef struct X86CPUDefinition X86CPUDefinition;
+
+/**
* X86CPUClass:
+ * @cpu_def: CPU model definition
+ * @kvm_required: Whether CPU model requires KVM to be enabled.
* @parent_realize: The parent class' realize handler.
* @parent_reset: The parent class' reset handler.
*
@@ -49,6 +59,11 @@ typedef struct X86CPUClass {
CPUClass parent_class;
/* public */
+/* Should be eventually replaced by subclass-specific property defaults. */
+X86CPUDefinition *cpu_def;
+
+bool kvm_required;
+
DeviceRealize parent_realize;
void (*parent_reset)(CPUState *cpu);
} X86CPUClass;
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 9f5c78e..8070c97 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -490,16 +490,35 @@ static void add_flagname_to_bitmaps(const char *flagname,
}
}
+/* CPU class name definitions: */
+
+#define X86_CPU_TYPE_SUFFIX - TYPE_X86_CPU
+#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX)
+
+/* Return type name for a given CPU model name
+ * Caller is responsible for freeing the returned string.
+ */
+static char *x86_cpu_type_name(const char *model_name)
+{
+return g_strdup_printf(X86_CPU_TYPE_NAME(%s), model_name);
+}
+
static ObjectClass *x86_cpu_class_by_name(const char *cpu_model)
{
+ObjectClass *oc;
+char *typename;
+
if (cpu_model == NULL) {
return NULL;
}
-return object_class_by_name(TYPE_X86_CPU);
+typename = x86_cpu_type_name(cpu_model);
+oc = object_class_by_name(typename);
+g_free(typename);
+return oc;
}
-typedef struct X86CPUDefinition {
+struct X86CPUDefinition {
const char *name;
uint32_t level;
uint32_t xlevel;
@@ -512,7 +531,7 @@ typedef struct X86CPUDefinition {
FeatureWordArray features;
char model_id[48];
bool cache_info_passthrough;
-} X86CPUDefinition;
+};
#define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
#define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
@@ -562,8 +581,6 @@ typedef struct X86CPUDefinition {
CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM,
CPUID_7_0_EBX_RDSEED */
-/* built-in CPU model definitions
- */
static X86CPUDefinition builtin_x86_defs[] = {
{
.name = qemu64,
@@ -1149,44 +1166,66 @@ static int cpu_x86_fill_model_id(char *str)
return 0;
}
-/* Fill a X86CPUDefinition struct with information about the host CPU, and
- * the CPU features supported by the host hardware + host kernel
+static X86CPUDefinition host_cpudef;
+
+/* class_init for the host CPU model
*
- * This function may be called only if KVM is enabled.
+ * This function may be called before KVM is initialized.
*/
-static void kvm_cpu_fill_host(X86CPUDefinition *x86_cpu_def)
+static void host_x86_cpu_class_init(ObjectClass *oc, void *data)
{
-KVMState *s = kvm_state;
+X86CPUClass *xcc = X86_CPU_CLASS(oc);
uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
-FeatureWord w;
-assert(kvm_enabled());
+xcc-kvm_required = true;
-x86_cpu_def-name = host;
-x86_cpu_def-cache_info_passthrough = true;
host_cpuid(0x0, 0, eax, ebx, ecx, edx);
-x86_cpu_vendor_words2str(x86_cpu_def-vendor, ebx, edx, ecx);
+
[Qemu-devel] [PATCH qom-next] virtio-console: Fix VIRTIO_CONSOLE() cast macro
Commit 0399a3819b27083ba69b88a9baa9025facab85bd (virtio-console: QOM
cast cleanup for VirtConsole) broke virtserialport since it shares
functions and state struct with virtconsole. Let virtconsole inherit
from virtserialport, and use virtserialport type for casting.
Note that virtio-serial-port is the abstract base type in
virtio-serial-bus.c, whereas virtserialport is the user-instantiatable
type in virtio-console.c. Therefore using TYPE_VIRTIO_CONSOLE_SERIAL_PORT.
Reported-by: Richard W.M. Jones rjo...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
hw/char/virtio-console.c | 24 ++--
1 file changed, 6 insertions(+), 18 deletions(-)
diff --git a/hw/char/virtio-console.c b/hw/char/virtio-console.c
index ffd29a8..6c8be0f 100644
--- a/hw/char/virtio-console.c
+++ b/hw/char/virtio-console.c
@@ -15,9 +15,9 @@
#include trace.h
#include hw/virtio/virtio-serial.h
-#define TYPE_VIRTIO_CONSOLE virtconsole
+#define TYPE_VIRTIO_CONSOLE_SERIAL_PORT virtserialport
#define VIRTIO_CONSOLE(obj) \
-OBJECT_CHECK(VirtConsole, (obj), TYPE_VIRTIO_CONSOLE)
+OBJECT_CHECK(VirtConsole, (obj), TYPE_VIRTIO_CONSOLE_SERIAL_PORT)
typedef struct VirtConsole {
VirtIOSerialPort parent_obj;
@@ -154,28 +154,16 @@ static void virtconsole_unrealize(DeviceState *dev, Error
**errp)
}
}
-static Property virtconsole_properties[] = {
-DEFINE_PROP_CHR(chardev, VirtConsole, chr),
-DEFINE_PROP_END_OF_LIST(),
-};
-
static void virtconsole_class_init(ObjectClass *klass, void *data)
{
-DeviceClass *dc = DEVICE_CLASS(klass);
VirtIOSerialPortClass *k = VIRTIO_SERIAL_PORT_CLASS(klass);
k-is_console = true;
-k-realize = virtconsole_realize;
-k-unrealize = virtconsole_unrealize;
-k-have_data = flush_buf;
-k-set_guest_connected = set_guest_connected;
-dc-props = virtconsole_properties;
}
static const TypeInfo virtconsole_info = {
-.name = TYPE_VIRTIO_CONSOLE,
-.parent= TYPE_VIRTIO_SERIAL_PORT,
-.instance_size = sizeof(VirtConsole),
+.name = virtconsole,
+.parent= TYPE_VIRTIO_CONSOLE_SERIAL_PORT,
.class_init= virtconsole_class_init,
};
@@ -197,7 +185,7 @@ static void virtserialport_class_init(ObjectClass *klass,
void *data)
}
static const TypeInfo virtserialport_info = {
-.name = virtserialport,
+.name = TYPE_VIRTIO_CONSOLE_SERIAL_PORT,
.parent= TYPE_VIRTIO_SERIAL_PORT,
.instance_size = sizeof(VirtConsole),
.class_init= virtserialport_class_init,
@@ -205,8 +193,8 @@ static const TypeInfo virtserialport_info = {
static void virtconsole_register_types(void)
{
-type_register_static(virtconsole_info);
type_register_static(virtserialport_info);
+type_register_static(virtconsole_info);
}
type_init(virtconsole_register_types)
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 20/58] cpu: Introduce CPUClass::parse_features() hook
Adapt the X86CPU implementation to suit the generic hook.
This involves a cleanup of error handling to cope with NULL errp.
Reviewed-by: Igor Mammedov imamm...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
include/qom/cpu.h | 2 ++
target-i386/cpu.c | 36 +---
2 files changed, 23 insertions(+), 15 deletions(-)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 89d5dd1..3703b68 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -68,6 +68,7 @@ struct TranslationBlock;
* CPUClass:
* @class_by_name: Callback to map -cpu command line model name to an
* instantiatable CPU type.
+ * @parse_features: Callback to parse command line arguments.
* @reset: Callback to reset the #CPUState to its initial state.
* @reset_dump_flags: #CPUDumpFlags to use for reset logging.
* @has_work: Callback for checking if there is work to do.
@@ -97,6 +98,7 @@ typedef struct CPUClass {
/* public */
ObjectClass *(*class_by_name)(const char *cpu_model);
+void (*parse_features)(CPUState *cpu, char *str, Error **errp);
void (*reset)(CPUState *cpu);
int reset_dump_flags;
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 8070c97..d9a8f47 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1648,8 +1648,10 @@ static inline void feat2prop(char *s)
/* Parse +feature,-feature,feature=foo CPU feature string
*/
-static void cpu_x86_parse_featurestr(X86CPU *cpu, char *features, Error **errp)
+static void x86_cpu_parse_featurestr(CPUState *cs, char *features,
+ Error **errp)
{
+X86CPU *cpu = X86_CPU(cs);
char *featurestr; /* Single 'key=value string being parsed */
/* Features to be added */
FeatureWordArray plus_features = { 0 };
@@ -1657,6 +1659,7 @@ static void cpu_x86_parse_featurestr(X86CPU *cpu, char
*features, Error **errp)
FeatureWordArray minus_features = { 0 };
uint32_t numvalue;
CPUX86State *env = cpu-env;
+Error *local_err = NULL;
featurestr = features ? strtok(features, ,) : NULL;
@@ -1675,16 +1678,16 @@ static void cpu_x86_parse_featurestr(X86CPU *cpu, char
*features, Error **errp)
numvalue = strtoul(val, err, 0);
if (!*val || *err) {
-error_setg(errp, bad numerical value %s, val);
+error_setg(local_err, bad numerical value %s, val);
goto out;
}
if (numvalue 0x8000) {
-fprintf(stderr, xlevel value shall always be =
0x8000
-, fixup will be removed in future versions\n);
+error_report(xlevel value shall always be = 0x8000
+ , fixup will be removed in future versions);
numvalue += 0x8000;
}
snprintf(num, sizeof(num), % PRIu32, numvalue);
-object_property_parse(OBJECT(cpu), num, featurestr, errp);
+object_property_parse(OBJECT(cpu), num, featurestr,
local_err);
} else if (!strcmp(featurestr, tsc-freq)) {
int64_t tsc_freq;
char *err;
@@ -1693,36 +1696,38 @@ static void cpu_x86_parse_featurestr(X86CPU *cpu, char
*features, Error **errp)
tsc_freq = strtosz_suffix_unit(val, err,
STRTOSZ_DEFSUFFIX_B, 1000);
if (tsc_freq 0 || *err) {
-error_setg(errp, bad numerical value %s, val);
+error_setg(local_err, bad numerical value %s, val);
goto out;
}
snprintf(num, sizeof(num), % PRId64, tsc_freq);
-object_property_parse(OBJECT(cpu), num, tsc-frequency, errp);
+object_property_parse(OBJECT(cpu), num, tsc-frequency,
+ local_err);
} else if (!strcmp(featurestr, hv-spinlocks)) {
char *err;
const int min = 0xFFF;
char num[32];
numvalue = strtoul(val, err, 0);
if (!*val || *err) {
-error_setg(errp, bad numerical value %s, val);
+error_setg(local_err, bad numerical value %s, val);
goto out;
}
if (numvalue min) {
-fprintf(stderr, hv-spinlocks value shall always be =
0x%x
-, fixup will be removed in future versions\n,
+error_report(hv-spinlocks value shall always be = 0x%x
+, fixup will be removed in future versions,
min);
numvalue = min;
}
snprintf(num, sizeof(num), % PRId32, numvalue);
-object_property_parse(OBJECT(cpu), num, featurestr, errp);
+
Re: [Qemu-devel] [PATCH qom-next] virtio-console: Fix VIRTIO_CONSOLE() cast macro
On Thu, Mar 13, 2014 at 05:24:36PM +0100, Andreas Färber wrote: Commit 0399a3819b27083ba69b88a9baa9025facab85bd (virtio-console: QOM cast cleanup for VirtConsole) broke virtserialport since it shares functions and state struct with virtconsole. Let virtconsole inherit from virtserialport, and use virtserialport type for casting. Note that virtio-serial-port is the abstract base type in virtio-serial-bus.c, whereas virtserialport is the user-instantiatable type in virtio-console.c. Therefore using TYPE_VIRTIO_CONSOLE_SERIAL_PORT. Reported-by: Richard W.M. Jones rjo...@redhat.com Signed-off-by: Andreas Färber afaer...@suse.de This patch fixes the problem for me, thanks. ACK. Rich. -- Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones libguestfs lets you edit virtual machines. Supports shell scripting, bindings from many languages. http://libguestfs.org
[Qemu-devel] [RFC 04/12] target-ppc: Change gstdint.h to stdint.h
This patch replaces the inclusion of gstdint.h to the standard stdint.h. Signed-off-by: Tom Musta tommu...@gmail.com --- include/libdecnumber/decContext.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/libdecnumber/decContext.h b/include/libdecnumber/decContext.h index 2e8f2e1..ffed769 100644 --- a/include/libdecnumber/decContext.h +++ b/include/libdecnumber/decContext.h @@ -51,7 +51,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define DECCFULLNAME Decimal Context Descriptor /* Verbose name */ #define DECCAUTHOR Mike Cowlishaw /* Who to blame */ - #include gstdint.h/* C99 standard integers */ + #include stdint.h /* C99 standard integers */ #include stdio.h /* for printf, etc.*/ #include signal.h /* for traps */ -- 1.7.1
[Qemu-devel] [PULL for-2.0-rc0 48/58] exec: Change cpu_breakpoint_{insert, remove{, _by_ref, _all}} argument
Use CPUState. Allows to clean up CPUArchState in gdbstub.
Signed-off-by: Andreas Färber afaer...@suse.de
---
exec.c | 20
gdbstub.c | 20
include/exec/cpu-all.h | 15 ---
include/qom/cpu.h | 15 +++
linux-user/main.c | 2 +-
target-i386/cpu.c | 2 +-
target-i386/helper.c | 4 ++--
target-i386/machine.c | 2 +-
target-lm32/helper.c | 9 +++--
9 files changed, 43 insertions(+), 46 deletions(-)
diff --git a/exec.c b/exec.c
index e89653e..03ae5fe 100644
--- a/exec.c
+++ b/exec.c
@@ -617,11 +617,10 @@ void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
#endif
/* Add a breakpoint. */
-int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags,
+int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
CPUBreakpoint **breakpoint)
{
#if defined(TARGET_HAS_ICE)
-CPUState *cpu = ENV_GET_CPU(env);
CPUBreakpoint *bp;
bp = g_malloc(sizeof(*bp));
@@ -648,15 +647,14 @@ int cpu_breakpoint_insert(CPUArchState *env, target_ulong
pc, int flags,
}
/* Remove a specific breakpoint. */
-int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags)
+int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
{
#if defined(TARGET_HAS_ICE)
-CPUState *cpu = ENV_GET_CPU(env);
CPUBreakpoint *bp;
QTAILQ_FOREACH(bp, cpu-breakpoints, entry) {
if (bp-pc == pc bp-flags == flags) {
-cpu_breakpoint_remove_by_ref(env, bp);
+cpu_breakpoint_remove_by_ref(cpu, bp);
return 0;
}
}
@@ -667,11 +665,9 @@ int cpu_breakpoint_remove(CPUArchState *env, target_ulong
pc, int flags)
}
/* Remove a specific breakpoint by reference. */
-void cpu_breakpoint_remove_by_ref(CPUArchState *env, CPUBreakpoint *breakpoint)
+void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint)
{
#if defined(TARGET_HAS_ICE)
-CPUState *cpu = ENV_GET_CPU(env);
-
QTAILQ_REMOVE(cpu-breakpoints, breakpoint, entry);
breakpoint_invalidate(cpu, breakpoint-pc);
@@ -681,15 +677,15 @@ void cpu_breakpoint_remove_by_ref(CPUArchState *env,
CPUBreakpoint *breakpoint)
}
/* Remove all matching breakpoints. */
-void cpu_breakpoint_remove_all(CPUArchState *env, int mask)
+void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
{
#if defined(TARGET_HAS_ICE)
-CPUState *cpu = ENV_GET_CPU(env);
CPUBreakpoint *bp, *next;
QTAILQ_FOREACH_SAFE(bp, cpu-breakpoints, entry, next) {
-if (bp-flags mask)
-cpu_breakpoint_remove_by_ref(env, bp);
+if (bp-flags mask) {
+cpu_breakpoint_remove_by_ref(cpu, bp);
+}
}
#endif
}
diff --git a/gdbstub.c b/gdbstub.c
index cd10781..8afe0b7 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -635,7 +635,6 @@ static const int xlat_gdb_type[] = {
static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
{
CPUState *cpu;
-CPUArchState *env;
int err = 0;
if (kvm_enabled()) {
@@ -646,10 +645,10 @@ static int gdb_breakpoint_insert(target_ulong addr,
target_ulong len, int type)
case GDB_BREAKPOINT_SW:
case GDB_BREAKPOINT_HW:
CPU_FOREACH(cpu) {
-env = cpu-env_ptr;
-err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
-if (err)
+err = cpu_breakpoint_insert(cpu, addr, BP_GDB, NULL);
+if (err) {
break;
+}
}
return err;
#ifndef CONFIG_USER_ONLY
@@ -672,7 +671,6 @@ static int gdb_breakpoint_insert(target_ulong addr,
target_ulong len, int type)
static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
{
CPUState *cpu;
-CPUArchState *env;
int err = 0;
if (kvm_enabled()) {
@@ -683,10 +681,10 @@ static int gdb_breakpoint_remove(target_ulong addr,
target_ulong len, int type)
case GDB_BREAKPOINT_SW:
case GDB_BREAKPOINT_HW:
CPU_FOREACH(cpu) {
-env = cpu-env_ptr;
-err = cpu_breakpoint_remove(env, addr, BP_GDB);
-if (err)
+err = cpu_breakpoint_remove(cpu, addr, BP_GDB);
+if (err) {
break;
+}
}
return err;
#ifndef CONFIG_USER_ONLY
@@ -708,7 +706,6 @@ static int gdb_breakpoint_remove(target_ulong addr,
target_ulong len, int type)
static void gdb_breakpoint_remove_all(void)
{
CPUState *cpu;
-CPUArchState *env;
if (kvm_enabled()) {
kvm_remove_all_breakpoints(gdbserver_state-c_cpu);
@@ -716,8 +713,7 @@ static void gdb_breakpoint_remove_all(void)
}
CPU_FOREACH(cpu) {
-env = cpu-env_ptr;
-cpu_breakpoint_remove_all(env, BP_GDB);
+cpu_breakpoint_remove_all(cpu, BP_GDB);
#ifndef CONFIG_USER_ONLY
cpu_watchpoint_remove_all(cpu, BP_GDB);
#endif
@@ -1599,7 +1595,7 @@ void gdbserver_fork(CPUArchState
[Qemu-devel] [PULL for-2.0-rc0 09/58] target-xtensa: Clean up ENV_GET_CPU() usage
Commits a00817cc4c18b7872e92765a4736fb2227cc237b and
fdfba1a298ae26dd44bcfdb0429314139a0bc55a added usages of ENV_GET_CPU()
macro in target-specific code.
Use xtensa_env_get_cpu() instead.
Cc: Max Filippov jcmvb...@gmail.com
Cc: Edgar E. Iglesias edgar.igles...@xilinx.com
Cc: Peter Maydell peter.mayd...@linaro.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-xtensa/cpu.h| 4 +++-
target-xtensa/helper.c | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 1cf5ea3..3c7fa80 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -493,6 +493,8 @@ static inline int cpu_mmu_index(CPUXtensaState *env)
static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
target_ulong *cs_base, int *flags)
{
+CPUState *cs = CPU(xtensa_env_get_cpu(env));
+
*pc = env-pc;
*cs_base = 0;
*flags = 0;
@@ -515,7 +517,7 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState
*env, target_ulong *pc,
if (xtensa_option_enabled(env-config, XTENSA_OPTION_COPROCESSOR)) {
*flags |= env-sregs[CPENABLE] XTENSA_TBFLAG_CPENABLE_SHIFT;
}
-if (ENV_GET_CPU(env)-singlestep_enabled env-exception_taken) {
+if (cs-singlestep_enabled env-exception_taken) {
*flags |= XTENSA_TBFLAG_EXCEPTION;
}
}
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index 60cb055..3cb0bbd 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -552,7 +552,7 @@ static int get_physical_addr_mmu(CPUXtensaState *env, bool
update_tlb,
static int get_pte(CPUXtensaState *env, uint32_t vaddr, uint32_t *pte)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(xtensa_env_get_cpu(env));
uint32_t paddr;
uint32_t page_size;
unsigned access;
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 06/58] target-s390x: Clean up ENV_GET_CPU() usage
Commits f606604f1c10b60ef294f1b9b229426521a365e3,
2c17449b3022ca9623c4a7e2a504a4150ac4ad30 and
5ce5944dc0ffdc43c11b5cad11e526f699aabe4c added usages of ENV_GET_CPU()
macro in target-specific code.
Use s390_env_get_cpu() instead.
Cc: Edgar E. Iglesias edgar.igles...@xilinx.com
Cc: Peter Maydell peter.mayd...@linaro.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-s390x/helper.c | 6 +++---
target-s390x/mem_helper.c | 7 ---
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index aa537e1..0bae0a3 100644
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -138,7 +138,7 @@ static int trans_bits(CPUS390XState *env, uint64_t mode)
static void trigger_prot_fault(CPUS390XState *env, target_ulong vaddr,
uint64_t mode)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(s390_env_get_cpu(env));
int ilen = ILEN_LATER_INC;
int bits = trans_bits(env, mode) | 4;
@@ -152,7 +152,7 @@ static void trigger_prot_fault(CPUS390XState *env,
target_ulong vaddr,
static void trigger_page_fault(CPUS390XState *env, target_ulong vaddr,
uint32_t type, uint64_t asc, int rw)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(s390_env_get_cpu(env));
int ilen = ILEN_LATER;
int bits = trans_bits(env, asc);
@@ -172,7 +172,7 @@ static int mmu_translate_asce(CPUS390XState *env,
target_ulong vaddr,
uint64_t asc, uint64_t asce, int level,
target_ulong *raddr, int *flags, int rw)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(s390_env_get_cpu(env));
uint64_t offs = 0;
uint64_t origin;
uint64_t new_asce;
diff --git a/target-s390x/mem_helper.c b/target-s390x/mem_helper.c
index 875ea95..db673cf 100644
--- a/target-s390x/mem_helper.c
+++ b/target-s390x/mem_helper.c
@@ -955,7 +955,7 @@ uint32_t HELPER(csp)(CPUS390XState *env, uint32_t r1,
uint64_t r2)
static uint32_t mvc_asc(CPUS390XState *env, int64_t l, uint64_t a1,
uint64_t mode1, uint64_t a2, uint64_t mode2)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(s390_env_get_cpu(env));
target_ulong src, dest;
int flags, cc = 0, i;
@@ -1010,7 +1010,7 @@ uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t l,
uint64_t a1, uint64_t a2)
/* invalidate pte */
void HELPER(ipte)(CPUS390XState *env, uint64_t pte_addr, uint64_t vaddr)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(s390_env_get_cpu(env));
uint64_t page = vaddr TARGET_PAGE_MASK;
uint64_t pte = 0;
@@ -1043,7 +1043,8 @@ void HELPER(ptlb)(CPUS390XState *env)
/* store using real address */
void HELPER(stura)(CPUS390XState *env, uint64_t addr, uint64_t v1)
{
-CPUState *cs = ENV_GET_CPU(env);
+CPUState *cs = CPU(s390_env_get_cpu(env));
+
stw_phys(cs-as, get_address(env, 0, 0, addr), (uint32_t)v1);
}
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 24/58] cpu: Implement CPUClass::parse_features() for the rest of CPUs
CPUs who do not provide their own implementation of feature parsing
will treat each option as a QOM property and set it to the supplied
value.
Signed-off-by: Andreas Färber afaer...@suse.de
---
qom/cpu.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/qom/cpu.c b/qom/cpu.c
index f36d597..4aa0bf8 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -1,7 +1,7 @@
/*
* QEMU CPU model
*
- * Copyright (c) 2012 SUSE LINUX Products GmbH
+ * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -217,6 +217,34 @@ static ObjectClass *cpu_common_class_by_name(const char
*cpu_model)
return NULL;
}
+static void cpu_common_parse_features(CPUState *cpu, char *features,
+ Error **errp)
+{
+char *featurestr; /* Single key=value string being parsed */
+char *val;
+Error *err = NULL;
+
+featurestr = features ? strtok(features, ,) : NULL;
+
+while (featurestr) {
+val = strchr(featurestr, '=');
+if (val) {
+*val = 0;
+val++;
+object_property_parse(OBJECT(cpu), val, featurestr, err);
+if (err) {
+error_propagate(errp, err);
+return;
+}
+} else {
+error_setg(errp, Expected key=value format, found %s.,
+ featurestr);
+return;
+}
+featurestr = strtok(NULL, ,);
+}
+}
+
static void cpu_common_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cpu = CPU(dev);
@@ -247,6 +275,7 @@ static void cpu_class_init(ObjectClass *klass, void *data)
CPUClass *k = CPU_CLASS(klass);
k-class_by_name = cpu_common_class_by_name;
+k-parse_features = cpu_common_parse_features;
k-reset = cpu_common_reset;
k-get_arch_id = cpu_common_get_arch_id;
k-has_work = cpu_common_has_work;
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 56/58] cputlb: Change tlb_flush() argument to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
cputlb.c | 6 +++---
exec.c | 4 +---
hw/sh4/sh7750.c| 2 +-
include/exec/exec-all.h| 4 ++--
target-alpha/cpu.c | 2 +-
target-alpha/sys_helper.c | 2 +-
target-arm/cpu.c | 2 +-
target-arm/helper.c| 39 -
target-cris/cpu.c | 2 +-
target-i386/cpu.c | 2 +-
target-i386/helper.c | 17 ++-
target-i386/machine.c | 2 +-
target-i386/svm_helper.c | 2 +-
target-lm32/cpu.c | 2 +-
target-m68k/cpu.c | 2 +-
target-microblaze/cpu.c| 2 +-
target-microblaze/mmu.c| 3 ++-
target-mips/cpu.c | 2 +-
target-mips/machine.c | 3 ++-
target-mips/op_helper.c| 4 +++-
target-moxie/cpu.c | 2 +-
target-openrisc/cpu.c | 2 +-
target-openrisc/interrupt.c| 2 +-
target-openrisc/interrupt_helper.c | 2 +-
target-openrisc/sys_helper.c | 2 +-
target-ppc/excp_helper.c | 4 ++--
target-ppc/helper_regs.h | 2 +-
target-ppc/misc_helper.c | 4 +++-
target-ppc/mmu-hash64.c| 6 --
target-ppc/mmu_helper.c| 44 --
target-ppc/translate_init.c| 2 +-
target-s390x/cpu.c | 4 ++--
target-s390x/mem_helper.c | 13 +++
target-sh4/cpu.c | 2 +-
target-sh4/helper.c| 2 +-
target-sparc/cpu.c | 2 +-
target-sparc/ldst_helper.c | 18 +---
target-sparc/machine.c | 3 ++-
target-unicore32/cpu.c | 2 +-
target-unicore32/helper.c | 4 +++-
target-xtensa/op_helper.c | 4 +++-
41 files changed, 143 insertions(+), 87 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index 9a12248..b280e81 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -46,9 +46,9 @@ int tlb_flush_count;
* entries from the TLB at any time, so flushing more entries than
* required is only an efficiency issue, not a correctness issue.
*/
-void tlb_flush(CPUArchState *env, int flush_global)
+void tlb_flush(CPUState *cpu, int flush_global)
{
-CPUState *cpu = ENV_GET_CPU(env);
+CPUArchState *env = cpu-env_ptr;
#if defined(DEBUG_TLB)
printf(tlb_flush:\n);
@@ -93,7 +93,7 @@ void tlb_flush_page(CPUState *cpu, target_ulong addr)
TARGET_FMT_lx / TARGET_FMT_lx )\n,
env-tlb_flush_addr, env-tlb_flush_mask);
#endif
-tlb_flush(env, 1);
+tlb_flush(cpu, 1);
return;
}
/* must reset current TB so that interrupts cannot modify the
diff --git a/exec.c b/exec.c
index c031932..6a0bc94 100644
--- a/exec.c
+++ b/exec.c
@@ -1834,14 +1834,12 @@ static void tcg_commit(MemoryListener *listener)
reset the modified entries */
/* XXX: slow ! */
CPU_FOREACH(cpu) {
-CPUArchState *env = cpu-env_ptr;
-
/* FIXME: Disentangle the cpu.h circular files deps so we can
directly get the right CPU from listener. */
if (cpu-tcg_as_listener != listener) {
continue;
}
-tlb_flush(env, 1);
+tlb_flush(cpu, 1);
}
}
diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c
index 1439ba4..4a39357 100644
--- a/hw/sh4/sh7750.c
+++ b/hw/sh4/sh7750.c
@@ -416,7 +416,7 @@ static void sh7750_mem_writel(void *opaque, hwaddr addr,
case SH7750_PTEH_A7:
/* If asid changes, clear all registered tlb entries. */
if ((s-cpu-env.pteh 0xff) != (mem_value 0xff)) {
-tlb_flush(s-cpu-env, 1);
+tlb_flush(CPU(s-cpu), 1);
}
s-cpu-env.pteh = mem_value;
return;
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 33633a2..4cc11bb 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -99,7 +99,7 @@ void tb_invalidate_phys_range(tb_page_addr_t start,
tb_page_addr_t end,
void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as);
/* cputlb.c */
void tlb_flush_page(CPUState *cpu, target_ulong addr);
-void tlb_flush(CPUArchState *env, int flush_global);
+void tlb_flush(CPUState *cpu, int flush_global);
void tlb_set_page(CPUArchState *env, target_ulong vaddr,
hwaddr paddr, int prot,
int mmu_idx, target_ulong size);
@@ -109,7 +109,7 @@ static inline void tlb_flush_page(CPUState *cpu,
target_ulong addr)
{
}
-static inline void tlb_flush(CPUArchState *env, int flush_global)
+static inline void tlb_flush(CPUState *cpu, int flush_global)
{
}
#endif
diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c
index 4d8263f..7ec46b9 100644
--- a/target-alpha/cpu.c
+++ b/target-alpha/cpu.c
@@ -258,7 +258,7 @@ static void
[Qemu-devel] [RFC 03/12] target-ppc: Modify dconfig.h to Integrate with QEMU
This patch modifies the dconfig.h header file so that libdecnumber code integrates correctly with QEMU. Normally, this file is generated from a configuration script, but it can be replaced with a static file for this usage within QEMU: - the WORDS_BIGENDIAN preprocessor macro is used in libdecnumber code to determines endianness. It is derived from the existing QEMU macro HOST_WORDS_BIGENDIAN which is defined in config-host.h. - the DECPUN macro determines the number of decimal digits (aka declets) per unit (byte). This is 3 for PowerPC DFP. Signed-off-by: Tom Musta tommu...@gmail.com --- include/libdecnumber/dconfig.h | 24 ++-- 1 files changed, 6 insertions(+), 18 deletions(-) diff --git a/include/libdecnumber/dconfig.h b/include/libdecnumber/dconfig.h index 91aa334..d4fed0d 100644 --- a/include/libdecnumber/dconfig.h +++ b/include/libdecnumber/dconfig.h @@ -22,26 +22,14 @@ a copy of the GCC Runtime Library Exception along with this program; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see http://www.gnu.org/licenses/. */ -#ifdef IN_LIBGCC2 +#include config-host.h -#include tconfig.h -#include coretypes.h -#include tm.h - -#ifndef LIBGCC2_WORDS_BIG_ENDIAN -#define LIBGCC2_WORDS_BIG_ENDIAN WORDS_BIG_ENDIAN -#endif - -#ifndef LIBGCC2_FLOAT_WORDS_BIG_ENDIAN -#define LIBGCC2_FLOAT_WORDS_BIG_ENDIAN LIBGCC2_WORDS_BIG_ENDIAN -#endif - -#if LIBGCC2_FLOAT_WORDS_BIG_ENDIAN +#if defined(HOST_WORDS_BIGENDIAN) #define WORDS_BIGENDIAN 1 -#endif - #else +#define WORDS_BIGENDIAN 0 +#endif -#include config.h - +#ifndef DECDPUN +#define DECDPUN 3 #endif -- 1.7.1
[Qemu-devel] [PULL for-2.0-rc0 12/58] target-i386: Call x86_cpu_load_def() earlier
From: Eduardo Habkost ehabk...@redhat.com
As we will initialize the X86CPU fields on instance_init eventually,
move the code that initializes the X86CPU data based on the CPU model
name closer to the object_new() call.
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-i386/cpu.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 241b4b2..fa56b8a 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1893,6 +1893,11 @@ X86CPU *cpu_x86_create(const char *cpu_model,
DeviceState *icc_bridge,
features = model_pieces[1];
cpu = X86_CPU(object_new(TYPE_X86_CPU));
+x86_cpu_load_def(cpu, name, error);
+if (error) {
+goto out;
+}
+
#ifndef CONFIG_USER_ONLY
if (icc_bridge == NULL) {
error_setg(error, Invalid icc-bridge value);
@@ -1902,11 +1907,6 @@ X86CPU *cpu_x86_create(const char *cpu_model,
DeviceState *icc_bridge,
object_unref(OBJECT(cpu));
#endif
-x86_cpu_load_def(cpu, name, error);
-if (error) {
-goto out;
-}
-
/* Emulate per-model subclasses for global properties */
typename = g_strdup_printf(%s- TYPE_X86_CPU, name);
qdev_prop_set_globals_for_type(DEVICE(cpu), typename, error);
--
1.8.4.5
Re: [Qemu-devel] [PATCH v3 2/2] Fix return value of vga initlization on ppc
Am 11.03.2014 10:52, schrieb Mark Wu:
On 03/10/2014 10:52 PM, Paolo Bonzini wrote:
Il 10/03/2014 15:37, Mark Wu ha scritto:
Before spapr_vga_init will returned false if the vga is specified by
the command '-device VGA' because vga_interface_type was evaluated to
VGA_NONE. With the change in previous patch of this series,
spapr_vga_init should return true if it's told that the vga will be
initialized in flow of the generic devices initialization.
To keep '-nodefaults' have the semantics of bare minimum, it adds a
check of 'has_defaults' in usb_enabled() to avoid that a USB controller
is added by '-nodefautls, -device VGA' implicitly.
This patch also makes two cleanups:
1. skip initialization for VGA_NONE
2. remove the useless 'break'
Signed-off-by: Mark Wu wu...@linux.vnet.ibm.com
---
hw/ppc/spapr.c | 4 +++-
vl.c | 3 ++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index bf46c38..5c9a154 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -781,13 +781,15 @@ static int spapr_vga_init(PCIBus *pci_bus)
{
switch (vga_interface_type) {
case VGA_NONE:
+return false;
+case VGA_DEVICE:
+return true;
case VGA_STD:
return pci_vga_init(pci_bus) != NULL;
default:
fprintf(stderr, This vga model is not supported,
currently it only supports -vga std\n);
exit(0);
-break;
}
}
diff --git a/vl.c b/vl.c
index f8f7c00..e9d8baf 100644
--- a/vl.c
+++ b/vl.c
@@ -932,7 +932,8 @@ static int parse_sandbox(QemuOpts *opts, void
*opaque)
bool usb_enabled(bool default_usb)
{
-return qemu_opt_get_bool(qemu_get_machine_opts(), usb,
default_usb);
+return qemu_opt_get_bool(qemu_get_machine_opts(), usb,
+ has_defaults default_usb);
}
#ifndef _WIN32
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Thanks a lot for the review. You contributed a lot on this patch, but I
forgot to acknowledge it in commit message.
I think re-sending a new patch to include it could cause some noise.
May I ask the maintainer add the following line
in the commit message when it's picked? Same on 1/2 in this series Thanks.
Suggested-by: Paolo Bonzini pbonz...@redhat.com
Sorry, didn't spot this yesterday, applied to ppc-next (with typo fix):
https://github.com/afaerber/qemu-cpu/commits/ppc-next
Thanks,
Andreas
P.S. Mark, please remember to include a cover letter 0/2 next time.
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [PULL v2 for-2.0 00/24] Block patches
On 13 March 2014 14:10, Stefan Hajnoczi stefa...@redhat.com wrote: v2: * Fixed merge conflict with qemu_thread_create() naming [Peter] The following changes since commit 750036a848ea913ba6343718ffa70da98f7eef6b: Merge remote-tracking branch 'remotes/afaerber/tags/prep-for-upstream' into staging (2014-03-12 17:53:37 +) are available in the git repository at: git://github.com/stefanha/qemu.git tags/block-pull-request for you to fetch changes up to 57ed25b1b08a43f29326df064d43b6420a23b5ba: block/raw-win32: bdrv_parse_filename() for hdev (2014-03-13 14:42:25 +0100) Applied, thanks. -- PMM
[Qemu-devel] [PULL for-2.0-rc0 38/58] exec: Change tlb_fill() argument to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
include/exec/exec-all.h | 2 +-
include/exec/softmmu_template.h | 8
target-alpha/mem_helper.c | 8 +---
target-arm/op_helper.c | 12 +++-
target-cris/op_helper.c | 7 ---
target-i386/mem_helper.c| 12 +++-
target-lm32/op_helper.c | 13 -
target-m68k/op_helper.c | 8 +---
target-microblaze/op_helper.c | 13 -
target-mips/op_helper.c | 7 ---
target-moxie/helper.c | 7 ---
target-openrisc/mmu_helper.c| 8 +---
target-ppc/mmu_helper.c | 9 +
target-s390x/mem_helper.c | 8 +---
target-sh4/op_helper.c | 8 +---
target-sparc/ldst_helper.c | 8 +---
target-unicore32/op_helper.c| 8 +---
target-xtensa/op_helper.c | 6 --
18 files changed, 91 insertions(+), 61 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 2179329..c8c3a11 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -332,7 +332,7 @@ bool io_mem_read(struct MemoryRegion *mr, hwaddr addr,
bool io_mem_write(struct MemoryRegion *mr, hwaddr addr,
uint64_t value, unsigned size);
-void tlb_fill(CPUArchState *env1, target_ulong addr, int is_write, int mmu_idx,
+void tlb_fill(CPUState *cpu, target_ulong addr, int is_write, int mmu_idx,
uintptr_t retaddr);
uint8_t helper_ldb_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
diff --git a/include/exec/softmmu_template.h b/include/exec/softmmu_template.h
index ac825d2..8603933 100644
--- a/include/exec/softmmu_template.h
+++ b/include/exec/softmmu_template.h
@@ -158,7 +158,7 @@ WORD_TYPE helper_le_ld_name(CPUArchState *env, target_ulong
addr, int mmu_idx,
do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
}
#endif
-tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
+tlb_fill(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
tlb_addr = env-tlb_table[mmu_idx][index].ADDR_READ;
}
@@ -240,7 +240,7 @@ WORD_TYPE helper_be_ld_name(CPUArchState *env, target_ulong
addr, int mmu_idx,
do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
}
#endif
-tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
+tlb_fill(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
tlb_addr = env-tlb_table[mmu_idx][index].ADDR_READ;
}
@@ -360,7 +360,7 @@ void helper_le_st_name(CPUArchState *env, target_ulong
addr, DATA_TYPE val,
do_unaligned_access(env, addr, 1, mmu_idx, retaddr);
}
#endif
-tlb_fill(env, addr, 1, mmu_idx, retaddr);
+tlb_fill(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr);
tlb_addr = env-tlb_table[mmu_idx][index].addr_write;
}
@@ -436,7 +436,7 @@ void helper_be_st_name(CPUArchState *env, target_ulong
addr, DATA_TYPE val,
do_unaligned_access(env, addr, 1, mmu_idx, retaddr);
}
#endif
-tlb_fill(env, addr, 1, mmu_idx, retaddr);
+tlb_fill(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr);
tlb_addr = env-tlb_table[mmu_idx][index].addr_write;
}
diff --git a/target-alpha/mem_helper.c b/target-alpha/mem_helper.c
index 23878ba..3447f82 100644
--- a/target-alpha/mem_helper.c
+++ b/target-alpha/mem_helper.c
@@ -152,14 +152,16 @@ void alpha_cpu_unassigned_access(CPUState *cs, hwaddr
addr,
NULL, it means that the function was called in C code (i.e. not
from generated code or from helper.c) */
/* XXX: fix it to restore all registers */
-void tlb_fill(CPUAlphaState *env, target_ulong addr, int is_write,
+void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
int mmu_idx, uintptr_t retaddr)
{
-AlphaCPU *cpu = alpha_env_get_cpu(env);
int ret;
-ret = alpha_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx);
+ret = alpha_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (unlikely(ret != 0)) {
+AlphaCPU *cpu = ALPHA_CPU(cs);
+CPUAlphaState *env = cpu-env;
+
if (retaddr) {
cpu_restore_state(env, retaddr);
}
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index 931536e..932f5e2 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -72,17 +72,19 @@ uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg,
uint32_t def,
#include exec/softmmu_template.h
/* try to fill the TLB and return an exception if error. If retaddr is
- NULL, it means that the function was called in C code (i.e. not
- from generated code or from helper.c) */
-void tlb_fill(CPUARMState *env, target_ulong addr, int is_write, int mmu_idx,
+ * NULL, it means that the function was called in C code (i.e. not
+ * from generated code or from helper.c)
+ */
+void tlb_fill(CPUState *cs, target_ulong
[Qemu-devel] [RFC 12/12] target-ppc: Introduce DFP Add
This patch provides the implementation for the Decimal Floating Point
(DFP) Add instructions (dadd, daddq).
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/dfp_helper.c | 35 ---
target-ppc/helper.h |3 +++
target-ppc/translate.c |8 +---
3 files changed, 32 insertions(+), 14 deletions(-)
diff --git a/target-ppc/dfp_helper.c b/target-ppc/dfp_helper.c
index a3381ef..46a83e4 100644
--- a/target-ppc/dfp_helper.c
+++ b/target-ppc/dfp_helper.c
@@ -235,17 +235,30 @@ static void ppc_dfp_run_post_processors(struct PPC_DFP
*dfp,
}
}
+#define DFP_HELPER_TAB(op, dnop, postprocs, size)
\
+void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t *a, uint64_t *b)
\
+{
\
+struct PPC_DFP dfp;
\
+ppc_dfp_prepare_decimal##size##_fra_frb(dfp, a, b, env);
\
+dnop(dfp.t, dfp.a, dfp.b, dfp.context);
\
+decimal##size##FromNumber((decimal##size *)dfp.t64, dfp.t, dfp.context);
\
+ppc_dfp_run_post_processors(dfp, postprocs, ARRAY_SIZE(postprocs));
\
+if (size == 64) {
\
+t[0] = dfp.t64[0];
\
+} else if (size == 128) {
\
+t[0] = dfp.t64[HI_IDX];
\
+t[1] = dfp.t64[LO_IDX];
\
+}
\
+}
-void *_TmpAvoidDefinedButNotUsedWarnings_[] = {
-(void *)ppc_dfp_prepare_decimal64_fra_frb,
-(void *)ppc_dfp_prepare_decimal128_fra_frb,
-(void *)ppc_dfp_run_post_processors,
-(void *)ppc_dfp_set_FPRF_from_FRT,
-(void *)ppc_dfp_check_for_OX,
-(void *)ppc_dfp_check_for_UX,
-(void *)ppc_dfp_check_for_XX,
-(void *)ppc_dfp_check_for_VXSNAN,
-(void *)ppc_dfp_check_for_VXISI_add,
+PPC_DFP_PostProc ADD_PPs[] = {
+ppc_dfp_set_FPRF_from_FRT,
+ppc_dfp_check_for_OX,
+ppc_dfp_check_for_UX,
+ppc_dfp_check_for_XX,
+ppc_dfp_check_for_VXSNAN,
+ppc_dfp_check_for_VXISI_add,
};
-
+DFP_HELPER_TAB(dadd, decNumberAdd, ADD_PPs, 64)
+DFP_HELPER_TAB(daddq, decNumberAdd, ADD_PPs, 128)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 1bebc8e..6054554 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -618,4 +618,7 @@ DEF_HELPER_3(store_601_batu, void, env, i32, tl)
#define dh_ctype_fprp uint64_t *
#define dh_is_signed_fprp dh_is_signed_ptr
+DEF_HELPER_4(dadd, void, env, fprp, fprp, fprp)
+DEF_HELPER_4(daddq, void, env, fprp, fprp, fprp)
+
#include exec/def-helper.h
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 26bfebc..de9ddb6 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -8229,9 +8229,8 @@ static void gen_##name(DisasContext *ctx)\
_GEN_DFP_TAB(name, op1, op2)\
_GEN_DFP_TAB(name##q, op1, op2)
-/* Avoid 'defined but not used' warnings ... this will be removed in */
-/* a subsequent patch. */
-void *_TempCr6_[] = { (void *)gen_set_cr6_from_fpscr, };
+GEN_DFP_TAB(dadd, 0x02, 0x00)
+
/*** SPE extension ***/
/* Register moves */
@@ -11062,6 +11061,9 @@ GEN_XX3FORM_DM(xxpermdi, 0x08, 0x01),
#define GEN_DFP_TAB(name, op1, op2) \
GEN_DFP_TAB_LONG(name, op1, op2),\
GEN_DFP_TAB_QUAD(name##q, op1, op2),
+
+GEN_DFP_TAB(dadd, 0x02, 0x00)
+
#undef GEN_SPE
#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type,
PPC_NONE)
--
1.7.1
Re: [Qemu-devel] [PATCH] blockdev: Refuse to open encrypted image unless paused
Paolo Bonzini pbonz...@redhat.com writes:
Il 13/03/2014 14:18, Markus Armbruster ha scritto:
Paolo Bonzini pbonz...@redhat.com writes:
Il 12/03/2014 18:00, Markus Armbruster ha scritto:
+} else if (!runstate_check(RUN_STATE_PRELAUNCH)
+ !runstate_check(RUN_STATE_PAUSED)) { /* HACK */
Why not if (runstate_is_running())?
The predicate actually wanted here is monitor command 'cont' required
to get the guest running, because 'cont' is where the protection is.
My run state test is a crude approximation.
Got it. Then you need to add at least a check for
runstate_check(RUN_STATE_INMIGRATE), otherwise you break incoming
migration.
You're right: main() goes from RUN_STATE_PRELAUNCH to
RUN_STATE_INMIGRATE right when it sees -incoming.
Actually, I think only SAVE_VM/RESTORE_VM/DEBUG are
problematic, but I understand why you preferred a conservative
test (sufficient condition, not necessary).
Exactly.
You are singling out prelaunch and inmigrate because drive_init
will reset autostart to 0 for an encrypted image, right?
Yes.
[Qemu-devel] [PULL for-2.0-rc0 54/58] target-microblaze: Replace DisasContext::env field with MicroBlazeCPU
This cleans up some mb_env_get_cpu() needed for cpu_abort().
Signed-off-by: Andreas Färber afaer...@suse.de
---
target-microblaze/translate.c | 87 +--
1 file changed, 43 insertions(+), 44 deletions(-)
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 4322f17..782a489 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -56,7 +56,7 @@ static TCGv env_res_val;
/* This is the state at translation time. */
typedef struct DisasContext {
-CPUMBState *env;
+MicroBlazeCPU *cpu;
target_ulong pc;
/* Decoder. */
@@ -327,8 +327,8 @@ static void dec_pattern(DisasContext *dc)
int l1;
if ((dc-tb_flags MSR_EE_FLAG)
- (dc-env-pvr.regs[2] PVR2_ILL_OPCODE_EXC_MASK)
- !((dc-env-pvr.regs[2] PVR2_USE_PCMP_INSTR))) {
+ (dc-cpu-env.pvr.regs[2] PVR2_ILL_OPCODE_EXC_MASK)
+ !((dc-cpu-env.pvr.regs[2] PVR2_USE_PCMP_INSTR))) {
tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP);
t_gen_raise_exception(dc, EXCP_HW_EXCP);
}
@@ -370,7 +370,7 @@ static void dec_pattern(DisasContext *dc)
}
break;
default:
-cpu_abort(CPU(mb_env_get_cpu(dc-env)),
+cpu_abort(CPU(dc-cpu),
unsupported pattern insn opcode=%x\n, dc-opcode);
break;
}
@@ -441,11 +441,10 @@ static inline void msr_write(DisasContext *dc, TCGv v)
static void dec_msr(DisasContext *dc)
{
-MicroBlazeCPU *cpu = mb_env_get_cpu(dc-env);
-CPUState *cs = CPU(cpu);
+CPUState *cs = CPU(dc-cpu);
TCGv t0, t1;
unsigned int sr, to, rn;
-int mem_index = cpu_mmu_index(dc-env);
+int mem_index = cpu_mmu_index(dc-cpu-env);
sr = dc-imm ((1 14) - 1);
to = dc-imm (1 14);
@@ -460,7 +459,7 @@ static void dec_msr(DisasContext *dc)
LOG_DIS(msr%s r%d imm=%x\n, clr ? clr : set,
dc-rd, dc-imm);
-if (!(dc-env-pvr.regs[2] PVR2_USE_MSR_INSTR)) {
+if (!(dc-cpu-env.pvr.regs[2] PVR2_USE_MSR_INSTR)) {
/* nop??? */
return;
}
@@ -539,7 +538,7 @@ static void dec_msr(DisasContext *dc)
tcg_gen_st_tl(cpu_R[dc-ra], cpu_env, offsetof(CPUMBState,
shr));
break;
default:
-cpu_abort(CPU(mb_env_get_cpu(dc-env)), unknown mts reg
%x\n, sr);
+cpu_abort(CPU(dc-cpu), unknown mts reg %x\n, sr);
break;
}
} else {
@@ -645,8 +644,8 @@ static void dec_mul(DisasContext *dc)
unsigned int subcode;
if ((dc-tb_flags MSR_EE_FLAG)
- (dc-env-pvr.regs[2] PVR2_ILL_OPCODE_EXC_MASK)
- !(dc-env-pvr.regs[0] PVR0_USE_HW_MUL_MASK)) {
+ (dc-cpu-env.pvr.regs[2] PVR2_ILL_OPCODE_EXC_MASK)
+ !(dc-cpu-env.pvr.regs[0] PVR0_USE_HW_MUL_MASK)) {
tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP);
t_gen_raise_exception(dc, EXCP_HW_EXCP);
return;
@@ -664,7 +663,7 @@ static void dec_mul(DisasContext *dc)
/* mulh, mulhsu and mulhu are not available if C_USE_HW_MUL is 2. */
if (subcode = 1 subcode = 3
- !((dc-env-pvr.regs[2] PVR2_USE_MUL64_MASK))) {
+ !((dc-cpu-env.pvr.regs[2] PVR2_USE_MUL64_MASK))) {
/* nop??? */
}
@@ -686,7 +685,7 @@ static void dec_mul(DisasContext *dc)
t_gen_mulu(d[0], cpu_R[dc-rd], cpu_R[dc-ra], cpu_R[dc-rb]);
break;
default:
-cpu_abort(CPU(mb_env_get_cpu(dc-env)), unknown MUL insn %x\n,
subcode);
+cpu_abort(CPU(dc-cpu), unknown MUL insn %x\n, subcode);
break;
}
done:
@@ -702,8 +701,8 @@ static void dec_div(DisasContext *dc)
u = dc-imm 2;
LOG_DIS(div\n);
-if ((dc-env-pvr.regs[2] PVR2_ILL_OPCODE_EXC_MASK)
- !((dc-env-pvr.regs[0] PVR0_USE_DIV_MASK))) {
+if ((dc-cpu-env.pvr.regs[2] PVR2_ILL_OPCODE_EXC_MASK)
+ !((dc-cpu-env.pvr.regs[0] PVR0_USE_DIV_MASK))) {
tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP);
t_gen_raise_exception(dc, EXCP_HW_EXCP);
}
@@ -724,8 +723,8 @@ static void dec_barrel(DisasContext *dc)
unsigned int s, t;
if ((dc-tb_flags MSR_EE_FLAG)
- (dc-env-pvr.regs[2] PVR2_ILL_OPCODE_EXC_MASK)
- !(dc-env-pvr.regs[0] PVR0_USE_BARREL_MASK)) {
+ (dc-cpu-env.pvr.regs[2] PVR2_ILL_OPCODE_EXC_MASK)
+ !(dc-cpu-env.pvr.regs[0] PVR0_USE_BARREL_MASK)) {
tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP);
t_gen_raise_exception(dc, EXCP_HW_EXCP);
return;
@@ -754,11 +753,10 @@ static void dec_barrel(DisasContext *dc)
static void dec_bit(DisasContext *dc)
{
-MicroBlazeCPU *cpu = mb_env_get_cpu(dc-env);
-CPUState *cs = CPU(cpu);
+CPUState *cs = CPU(dc-cpu);
TCGv t0;
unsigned int op;
-int mem_index = cpu_mmu_index(dc-env);
+int
[Qemu-devel] [PULL v2 for-2.0 14/24] iothread: stash thread ID away
Keep the thread ID around so we can report it via QMP.
There's only one problem: qemu_get_thread_id() (gettid() wrapper on
Linux) must be called from the thread itself. There is no way to get
the thread ID outside the thread.
This patch uses a condvar to wait for iothread_run() to populate the
thread_id inside the thread.
Signed-off-by: Stefan Hajnoczi stefa...@redhat.com
---
iothread.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/iothread.c b/iothread.c
index f263ee2..f90bbc3 100644
--- a/iothread.c
+++ b/iothread.c
@@ -26,7 +26,10 @@ struct IOThread {
QemuThread thread;
AioContext *ctx;
+QemuMutex init_done_lock;
+QemuCond init_done_cond;/* is thread initialization done? */
bool stopping;
+int thread_id;
};
#define IOTHREAD_GET_CLASS(obj) \
@@ -38,6 +41,11 @@ static void *iothread_run(void *opaque)
{
IOThread *iothread = opaque;
+qemu_mutex_lock(iothread-init_done_lock);
+iothread-thread_id = qemu_get_thread_id();
+qemu_cond_signal(iothread-init_done_cond);
+qemu_mutex_unlock(iothread-init_done_lock);
+
while (!iothread-stopping) {
aio_context_acquire(iothread-ctx);
while (!iothread-stopping aio_poll(iothread-ctx, true)) {
@@ -55,6 +63,8 @@ static void iothread_instance_finalize(Object *obj)
iothread-stopping = true;
aio_notify(iothread-ctx);
qemu_thread_join(iothread-thread);
+qemu_cond_destroy(iothread-init_done_cond);
+qemu_mutex_destroy(iothread-init_done_lock);
aio_context_unref(iothread-ctx);
}
@@ -64,12 +74,24 @@ static void iothread_complete(UserCreatable *obj, Error
**errp)
iothread-stopping = false;
iothread-ctx = aio_context_new();
+iothread-thread_id = -1;
+
+qemu_mutex_init(iothread-init_done_lock);
+qemu_cond_init(iothread-init_done_cond);
/* This assumes we are called from a thread with useful CPU affinity for us
* to inherit.
*/
qemu_thread_create(iothread-thread, iothread, iothread_run,
iothread, QEMU_THREAD_JOINABLE);
+
+/* Wait for initialization to complete */
+qemu_mutex_lock(iothread-init_done_lock);
+while (iothread-thread_id == -1) {
+qemu_cond_wait(iothread-init_done_cond,
+ iothread-init_done_lock);
+}
+qemu_mutex_unlock(iothread-init_done_lock);
}
static void iothread_class_init(ObjectClass *klass, void *class_data)
--
1.8.5.3
[Qemu-devel] [PULL for-2.0-rc0 42/58] translate-all: Change tb_check_watchpoint() argument to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
exec.c | 2 +-
translate-all.c | 4 ++--
translate-all.h | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/exec.c b/exec.c
index 5f7c472..7f94581 100644
--- a/exec.c
+++ b/exec.c
@@ -1605,7 +1605,7 @@ static void check_watchpoint(int offset, int len_mask,
int flags)
wp-flags |= BP_WATCHPOINT_HIT;
if (!cpu-watchpoint_hit) {
cpu-watchpoint_hit = wp;
-tb_check_watchpoint(env);
+tb_check_watchpoint(cpu);
if (wp-flags BP_STOP_BEFORE_ACCESS) {
cpu-exception_index = EXCP_DEBUG;
cpu_loop_exit(cpu);
diff --git a/translate-all.c b/translate-all.c
index adcef83..82d5fa4 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -1371,9 +1371,9 @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr
addr)
}
#endif /* TARGET_HAS_ICE !defined(CONFIG_USER_ONLY) */
-void tb_check_watchpoint(CPUArchState *env)
+void tb_check_watchpoint(CPUState *cpu)
{
-CPUState *cpu = ENV_GET_CPU(env);
+CPUArchState *env = cpu-env_ptr;
TranslationBlock *tb;
tb = tb_find_pc(cpu-mem_io_pc);
diff --git a/translate-all.h b/translate-all.h
index f7e5932..02832b2 100644
--- a/translate-all.h
+++ b/translate-all.h
@@ -22,6 +22,6 @@
/* translate-all.c */
void tb_invalidate_phys_page_fast(tb_page_addr_t start, int len);
void cpu_unlink_tb(CPUState *cpu);
-void tb_check_watchpoint(CPUArchState *env);
+void tb_check_watchpoint(CPUState *cpu);
#endif /* TRANSLATE_ALL_H */
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 39/58] cpu-exec: Change cpu_loop_exit() argument to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
cpu-exec.c| 14 ++
exec.c| 2 +-
include/exec/exec-all.h | 2 +-
target-alpha/helper.c | 4 ++--
target-alpha/mem_helper.c | 4 ++--
target-arm/op_helper.c| 8
target-cris/op_helper.c | 4 ++--
target-i386/excp_helper.c | 2 +-
target-i386/misc_helper.c | 7 +++
target-i386/seg_helper.c | 2 +-
target-i386/svm_helper.c | 8
target-lm32/op_helper.c | 6 +++---
target-m68k/op_helper.c | 6 +++---
target-microblaze/op_helper.c | 4 ++--
target-mips/op_helper.c | 4 ++--
target-moxie/helper.c | 6 +++---
target-openrisc/exception.c | 2 +-
target-openrisc/mmu_helper.c | 2 +-
target-ppc/excp_helper.c | 2 +-
target-s390x/cc_helper.c | 2 +-
target-s390x/mem_helper.c | 6 +++---
target-s390x/misc_helper.c| 10 +-
target-sh4/op_helper.c| 4 ++--
target-sparc/helper.c | 6 +++---
target-sparc/ldst_helper.c| 2 +-
target-unicore32/op_helper.c | 4 ++--
target-xtensa/op_helper.c | 4 ++--
user-exec.c | 4 ++--
28 files changed, 64 insertions(+), 67 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index d7c21d3..192620f 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -23,10 +23,8 @@
#include qemu/atomic.h
#include sysemu/qtest.h
-void cpu_loop_exit(CPUArchState *env)
+void cpu_loop_exit(CPUState *cpu)
{
-CPUState *cpu = ENV_GET_CPU(env);
-
cpu-current_tb = NULL;
siglongjmp(cpu-jmp_env, 1);
}
@@ -325,7 +323,7 @@ int cpu_exec(CPUArchState *env)
if (interrupt_request CPU_INTERRUPT_DEBUG) {
cpu-interrupt_request = ~CPU_INTERRUPT_DEBUG;
cpu-exception_index = EXCP_DEBUG;
-cpu_loop_exit(env);
+cpu_loop_exit(cpu);
}
#if defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_MIPS) || \
defined(TARGET_PPC) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) || \
@@ -334,7 +332,7 @@ int cpu_exec(CPUArchState *env)
cpu-interrupt_request = ~CPU_INTERRUPT_HALT;
cpu-halted = 1;
cpu-exception_index = EXCP_HLT;
-cpu_loop_exit(env);
+cpu_loop_exit(cpu);
}
#endif
#if defined(TARGET_I386)
@@ -349,7 +347,7 @@ int cpu_exec(CPUArchState *env)
0);
do_cpu_init(x86_cpu);
cpu-exception_index = EXCP_HALTED;
-cpu_loop_exit(env);
+cpu_loop_exit(cpu);
} else if (interrupt_request CPU_INTERRUPT_SIPI) {
do_cpu_sipi(x86_cpu);
} else if (env-hflags2 HF2_GIF_MASK) {
@@ -601,7 +599,7 @@ int cpu_exec(CPUArchState *env)
if (unlikely(cpu-exit_request)) {
cpu-exit_request = 0;
cpu-exception_index = EXCP_INTERRUPT;
-cpu_loop_exit(env);
+cpu_loop_exit(cpu);
}
spin_lock(tcg_ctx.tb_ctx.tb_lock);
tb = tb_find_fast(env);
@@ -672,7 +670,7 @@ int cpu_exec(CPUArchState *env)
}
cpu-exception_index = EXCP_INTERRUPT;
next_tb = 0;
-cpu_loop_exit(env);
+cpu_loop_exit(cpu);
}
break;
}
diff --git a/exec.c b/exec.c
index 6d9e13a..5f7c472 100644
--- a/exec.c
+++ b/exec.c
@@ -1608,7 +1608,7 @@ static void check_watchpoint(int offset, int len_mask,
int flags)
tb_check_watchpoint(env);
if (wp-flags BP_STOP_BEFORE_ACCESS) {
cpu-exception_index = EXCP_DEBUG;
-cpu_loop_exit(env);
+cpu_loop_exit(cpu);
} else {
cpu_get_tb_cpu_state(env, pc, cs_base, cpu_flags);
tb_gen_code(env, pc, cs_base, cpu_flags, 1);
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index c8c3a11..80277ea 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -89,7 +89,7 @@ TranslationBlock *tb_gen_code(CPUArchState *env,
target_ulong pc, target_ulong cs_base, int flags,
int cflags);
void cpu_exec_init(CPUArchState *env);
-void QEMU_NORETURN cpu_loop_exit(CPUArchState *env1);
+void QEMU_NORETURN cpu_loop_exit(CPUState *cpu);
int page_unprotect(target_ulong address, uintptr_t pc, void *puc);
void tb_invalidate_phys_page_range(tb_page_addr_t start,
[Qemu-devel] [PULL for-2.0-rc0 41/58] translate-all: Change cpu_restore_state_from_tb() argument to CPUState
And normalize the argument order.
Signed-off-by: Andreas Färber afaer...@suse.de
---
translate-all.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/translate-all.c b/translate-all.c
index 70d8229..adcef83 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -197,10 +197,10 @@ int cpu_gen_code(CPUArchState *env, TranslationBlock *tb,
int *gen_code_size_ptr
/* The cpu state corresponding to 'searched_pc' is restored.
*/
-static int cpu_restore_state_from_tb(TranslationBlock *tb, CPUArchState *env,
+static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
uintptr_t searched_pc)
{
-CPUState *cpu = ENV_GET_CPU(env);
+CPUArchState *env = cpu-env_ptr;
TCGContext *s = tcg_ctx;
int j;
uintptr_t tc_ptr;
@@ -255,12 +255,11 @@ static int cpu_restore_state_from_tb(TranslationBlock
*tb, CPUArchState *env,
bool cpu_restore_state(CPUState *cpu, uintptr_t retaddr)
{
-CPUArchState *env = cpu-env_ptr;
TranslationBlock *tb;
tb = tb_find_pc(retaddr);
if (tb) {
-cpu_restore_state_from_tb(tb, env, retaddr);
+cpu_restore_state_from_tb(cpu, tb, retaddr);
return true;
}
return false;
@@ -1075,7 +1074,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start,
tb_page_addr_t end,
restore the CPU state */
current_tb_modified = 1;
-cpu_restore_state_from_tb(current_tb, env, cpu-mem_io_pc);
+cpu_restore_state_from_tb(cpu, current_tb, cpu-mem_io_pc);
cpu_get_tb_cpu_state(env, current_pc, current_cs_base,
current_flags);
}
@@ -1194,7 +1193,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr,
restore the CPU state */
current_tb_modified = 1;
-cpu_restore_state_from_tb(current_tb, env, pc);
+cpu_restore_state_from_tb(cpu, current_tb, pc);
cpu_get_tb_cpu_state(env, current_pc, current_cs_base,
current_flags);
}
@@ -1382,7 +1381,7 @@ void tb_check_watchpoint(CPUArchState *env)
cpu_abort(env, check_watchpoint: could not find TB for pc=%p,
(void *)cpu-mem_io_pc);
}
-cpu_restore_state_from_tb(tb, env, cpu-mem_io_pc);
+cpu_restore_state_from_tb(cpu, tb, cpu-mem_io_pc);
tb_phys_invalidate(tb, -1);
}
@@ -1434,7 +1433,7 @@ void cpu_io_recompile(CPUArchState *env, uintptr_t
retaddr)
(void *)retaddr);
}
n = cpu-icount_decr.u16.low + tb-icount;
-cpu_restore_state_from_tb(tb, env, retaddr);
+cpu_restore_state_from_tb(cpu, tb, retaddr);
/* Calculate how many instructions had been executed before the fault
occurred. */
n = n - cpu-icount_decr.u16.low;
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 45/58] translate-all: Change tb_flush_jmp_cache() argument to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
cputlb.c | 2 +-
include/exec/cputlb.h | 2 +-
translate-all.c | 3 +--
3 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index 0eb1801..6b2cdb2 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -106,7 +106,7 @@ void tlb_flush_page(CPUArchState *env, target_ulong addr)
tlb_flush_entry(env-tlb_table[mmu_idx][i], addr);
}
-tb_flush_jmp_cache(env, addr);
+tb_flush_jmp_cache(cpu, addr);
}
/* update the TLBs so that writes to code in the virtual page 'addr'
diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h
index e21cb60..e1eb4d9 100644
--- a/include/exec/cputlb.h
+++ b/include/exec/cputlb.h
@@ -31,7 +31,7 @@ void tlb_set_dirty(CPUArchState *env, target_ulong vaddr);
extern int tlb_flush_count;
/* exec.c */
-void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr);
+void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr);
MemoryRegionSection *
address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat,
diff --git a/translate-all.c b/translate-all.c
index a7130a5..df85f9f 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -1479,9 +1479,8 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
cpu_resume_from_signal(env, NULL);
}
-void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr)
+void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr)
{
-CPUState *cpu = ENV_GET_CPU(env);
unsigned int i;
/* Discard jump cache entries for any tb which might potentially
--
1.8.4.5
[Qemu-devel] [PULL for-2.0-rc0 30/58] cpu: Move icount_extra field from CPU_COMMON to CPUState
Reset it.
Signed-off-by: Andreas Färber afaer...@suse.de
---
cpu-exec.c | 10 +-
cpus.c | 14 +++---
include/exec/cpu-defs.h | 1 -
include/qom/cpu.h | 2 ++
qom/cpu.c | 1 +
5 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 6559d5e..4a03d83 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -650,15 +650,15 @@ int cpu_exec(CPUArchState *env)
int insns_left;
tb = (TranslationBlock *)(next_tb ~TB_EXIT_MASK);
insns_left = env-icount_decr.u32;
-if (env-icount_extra insns_left = 0) {
+if (cpu-icount_extra insns_left = 0) {
/* Refill decrementer and continue execution. */
-env-icount_extra += insns_left;
-if (env-icount_extra 0x) {
+cpu-icount_extra += insns_left;
+if (cpu-icount_extra 0x) {
insns_left = 0x;
} else {
-insns_left = env-icount_extra;
+insns_left = cpu-icount_extra;
}
-env-icount_extra -= insns_left;
+cpu-icount_extra -= insns_left;
env-icount_decr.u16.low = insns_left;
} else {
if (insns_left 0) {
diff --git a/cpus.c b/cpus.c
index 05016dc..e9c17ae 100644
--- a/cpus.c
+++ b/cpus.c
@@ -143,7 +143,7 @@ static int64_t cpu_get_icount_locked(void)
if (!cpu_can_do_io(cpu)) {
fprintf(stderr, Bad clock read\n);
}
-icount -= (env-icount_decr.u16.low + env-icount_extra);
+icount -= (env-icount_decr.u16.low + cpu-icount_extra);
}
return qemu_icount_bias + (icount icount_time_shift);
}
@@ -1236,6 +1236,7 @@ int vm_stop_force_state(RunState state)
static int tcg_cpu_exec(CPUArchState *env)
{
+CPUState *cpu = ENV_GET_CPU(env);
int ret;
#ifdef CONFIG_PROFILER
int64_t ti;
@@ -1248,9 +1249,9 @@ static int tcg_cpu_exec(CPUArchState *env)
int64_t count;
int64_t deadline;
int decr;
-qemu_icount -= (env-icount_decr.u16.low + env-icount_extra);
+qemu_icount -= (env-icount_decr.u16.low + cpu-icount_extra);
env-icount_decr.u16.low = 0;
-env-icount_extra = 0;
+cpu-icount_extra = 0;
deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL);
/* Maintain prior (possibly buggy) behaviour where if no deadline
@@ -1267,7 +1268,7 @@ static int tcg_cpu_exec(CPUArchState *env)
decr = (count 0x) ? 0x : count;
count -= decr;
env-icount_decr.u16.low = decr;
-env-icount_extra = count;
+cpu-icount_extra = count;
}
ret = cpu_exec(env);
#ifdef CONFIG_PROFILER
@@ -1276,10 +1277,9 @@ static int tcg_cpu_exec(CPUArchState *env)
if (use_icount) {
/* Fold pending instructions back into the
instruction counter, and clear the interrupt flag. */
-qemu_icount -= (env-icount_decr.u16.low
-+ env-icount_extra);
+qemu_icount -= (env-icount_decr.u16.low + cpu-icount_extra);
env-icount_decr.u32 = 0;
-env-icount_extra = 0;
+cpu-icount_extra = 0;
}
return ret;
}
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 068b6c1..8f9871c 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -149,7 +149,6 @@ typedef struct CPUWatchpoint {
CPU_COMMON_TLB \
struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
\
-int64_t icount_extra; /* Instructions until next timer event. */ \
/* Number of cycles left, with interrupt flag in high bit. \
This allows a single read-compare-cbranch-write sequence to test \
for both decrementer underflow and exceptions. */ \
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index f80036e..012a7e6 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -157,6 +157,7 @@ struct kvm_run;
* @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
* CPU and return to its top level loop.
* @singlestep_enabled: Flags for single-stepping.
+ * @icount_extra: Instructions until next timer event.
* @can_do_io: Nonzero if memory-mapped IO is safe.
* @env_ptr: Pointer to subclass-specific CPUArchState field.
* @current_tb: Currently executing TB.
@@ -196,6 +197,7 @@ struct CPUState {
volatile sig_atomic_t tcg_exit_req;
uint32_t interrupt_request;
int
Re: [Qemu-devel] [PATCH v3 05/10] raven: set a correct PCI I/O memory region
Am 05.11.2013 00:09, schrieb Hervé Poussineau: PCI I/O region is 0x3f80 bytes starting at 0x8000. Do not use global QEMU I/O region, which is only 64KB. Signed-off-by: Hervé Poussineau hpous...@reactos.org With this patch I get only a blank screen in OHW/Etch. Regards, Andreas
Re: [Qemu-devel] [PULL for-2.0-rc0 00/58] QOM CPUState patch queue 2014-03-13
On 13 March 2014 14:54, Andreas Färber afaer...@suse.de wrote: Hello Peter, This is my current QOM CPU patch queue. Please pull. Since this touches on bsd-user code, request to apply the build fix first. NB: I was only able to test x86/ppc/arm KVM this time; s390x KVM was re-reviewed only. Regards, Andreas Cc: Peter Maydell peter.mayd...@linaro.org Cc: Anthony Liguori anth...@codemonkey.ws Cc: Eduardo Habkost ehabk...@redhat.com Cc: Igor Mammedov imamm...@redhat.com Cc: Christian Borntraeger borntrae...@de.ibm.com The following changes since commit be86c53c058d75fc3938b1b54f363259f282b3d5: Merge remote-tracking branch 'remotes/afaerber/tags/ppc-for-2.0' into staging (2014-03-13 13:19:46 +) are available in the git repository at: git://github.com/afaerber/qemu-cpu.git tags/qom-cpu-for-2.0 for you to fetch changes up to 98f11363e7add1e750f76e3d81750348f0470c29: user-exec: Change exception_action() argument to CPUState (2014-03-13 15:35:04 +0100) Fails to compile on systems without CONFIG_INT128 (eg 32 bit host): /root/qemu/target-s390x/int_helper.c: In function ‘helper_divu64’: /root/qemu/target-s390x/int_helper.c:111:9: error: passing argument 1 of ‘cpu_abort’ from incompatible pointer type [-Werror] In file included from /root/qemu/include/exec/cpu-all.h:26:0, from /root/qemu/target-s390x/cpu.h:41, from /root/qemu/target-s390x/int_helper.c:21: /root/qemu/include/qom/cpu.h:620:37: note: expected ‘struct CPUState *’ but argument is of type ‘struct CPUS390XState *’ cc1: all warnings being treated as errors thanks -- PMM
[Qemu-devel] [PULL for-2.0-rc0 44/58] translate-all: Change tb_gen_code() argument to CPUState
Signed-off-by: Andreas Färber afaer...@suse.de
---
cpu-exec.c | 4 ++--
exec.c | 2 +-
hw/i386/kvmvapic.c | 2 +-
include/exec/exec-all.h | 2 +-
translate-all.c | 9 +
5 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 192620f..c689ef9 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -103,7 +103,7 @@ static void cpu_exec_nocache(CPUArchState *env, int
max_cycles,
if (max_cycles CF_COUNT_MASK)
max_cycles = CF_COUNT_MASK;
-tb = tb_gen_code(env, orig_tb-pc, orig_tb-cs_base, orig_tb-flags,
+tb = tb_gen_code(cpu, orig_tb-pc, orig_tb-cs_base, orig_tb-flags,
max_cycles);
cpu-current_tb = tb;
/* execute the generated code */
@@ -156,7 +156,7 @@ static TranslationBlock *tb_find_slow(CPUArchState *env,
}
not_found:
/* if no translated code available, then translate it now */
-tb = tb_gen_code(env, pc, cs_base, flags, 0);
+tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
found:
/* Move the last found TB to the head of the list */
diff --git a/exec.c b/exec.c
index 7f94581..6f8b2ca 100644
--- a/exec.c
+++ b/exec.c
@@ -1611,7 +1611,7 @@ static void check_watchpoint(int offset, int len_mask,
int flags)
cpu_loop_exit(cpu);
} else {
cpu_get_tb_cpu_state(env, pc, cs_base, cpu_flags);
-tb_gen_code(env, pc, cs_base, cpu_flags, 1);
+tb_gen_code(cpu, pc, cs_base, cpu_flags, 1);
cpu_resume_from_signal(env, NULL);
}
}
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index 39d516a..2a9d87a 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@ -448,7 +448,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU
*cpu, target_ulong ip)
if (!kvm_enabled()) {
cs-current_tb = NULL;
-tb_gen_code(env, current_pc, current_cs_base, current_flags, 1);
+tb_gen_code(cs, current_pc, current_cs_base, current_flags, 1);
cpu_resume_from_signal(env, NULL);
}
}
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 727dc3c..a3e7faa 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -85,7 +85,7 @@ void page_size_init(void);
void QEMU_NORETURN cpu_resume_from_signal(CPUArchState *env1, void *puc);
void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
-TranslationBlock *tb_gen_code(CPUArchState *env,
+TranslationBlock *tb_gen_code(CPUState *cpu,
target_ulong pc, target_ulong cs_base, int flags,
int cflags);
void cpu_exec_init(CPUArchState *env);
diff --git a/translate-all.c b/translate-all.c
index 83c7907..a7130a5 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -938,10 +938,11 @@ static void build_page_bitmap(PageDesc *p)
}
}
-TranslationBlock *tb_gen_code(CPUArchState *env,
+TranslationBlock *tb_gen_code(CPUState *cpu,
target_ulong pc, target_ulong cs_base,
int flags, int cflags)
{
+CPUArchState *env = cpu-env_ptr;
TranslationBlock *tb;
uint8_t *tc_ptr;
tb_page_addr_t phys_pc, phys_page2;
@@ -,7 +1112,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start,
tb_page_addr_t end,
modifying the memory. It will ensure that it cannot modify
itself */
cpu-current_tb = NULL;
-tb_gen_code(env, current_pc, current_cs_base, current_flags, 1);
+tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1);
cpu_resume_from_signal(env, NULL);
}
#endif
@@ -1208,7 +1209,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr,
modifying the memory. It will ensure that it cannot modify
itself */
cpu-current_tb = NULL;
-tb_gen_code(env, current_pc, current_cs_base, current_flags, 1);
+tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1);
if (locked) {
mmap_unlock();
}
@@ -1469,7 +1470,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
tb_phys_invalidate(tb, -1);
/* FIXME: In theory this could raise an exception. In practice
we have already translated the block once so it's probably ok. */
-tb_gen_code(env, pc, cs_base, flags, cflags);
+tb_gen_code(cpu, pc, cs_base, flags, cflags);
/* TODO: If env-pc != tb-pc (i.e. the faulting instruction was not
the first in the TB) then we end up generating a whole new TB and
repeating the fault, which is horribly inefficient.
--
1.8.4.5
