Re: [Qemu-devel] [PATCH 05/16] hw/devices: Move Blizzard declarations into a new header
On 1/7/19 7:39 AM, Thomas Huth wrote:
> On 2019-01-04 18:58, Philippe Mathieu-Daudé wrote:
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> MAINTAINERS | 1 +
>> hw/arm/nseries.c | 1 +
>> hw/display/blizzard.c | 2 +-
>> include/hw/devices.h | 7 ---
>> include/hw/display/blizzard.h | 21 +
>> 5 files changed, 24 insertions(+), 8 deletions(-)
>> create mode 100644 include/hw/display/blizzard.h
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index dff4b98401..156ce9a698 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -640,6 +640,7 @@ M: Peter Maydell
>> L: qemu-...@nongnu.org
>> S: Odd Fixes
>> F: hw/arm/nseries.c
>> +F: include/hw/display/blizzard.h
>
> While you're at it, also add an entry for hw/display/blizzard.c here?
Good idea :)
>
>> Palm
>> M: Andrzej Zaborowski
>> diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c
>> index 906b7ca22d..9521be1cef 100644
>> --- a/hw/arm/nseries.c
>> +++ b/hw/arm/nseries.c
>> @@ -31,6 +31,7 @@
>> #include "hw/boards.h"
>> #include "hw/i2c/i2c.h"
>> #include "hw/devices.h"
>> +#include "hw/display/blizzard.h"
>> #include "hw/block/flash.h"
>> #include "hw/hw.h"
>> #include "hw/bt.h"
>> diff --git a/hw/display/blizzard.c b/hw/display/blizzard.c
>> index 291abe6fca..471bd0ed99 100644
>> --- a/hw/display/blizzard.c
>> +++ b/hw/display/blizzard.c
>> @@ -21,7 +21,7 @@
>> #include "qemu/osdep.h"
>> #include "qemu-common.h"
>> #include "ui/console.h"
>> -#include "hw/devices.h"
>> +#include "hw/display/blizzard.h"
>> #include "ui/pixel_ops.h"
>>
>> typedef void (*blizzard_fn_t)(uint8_t *, const uint8_t *, unsigned int);
>> diff --git a/include/hw/devices.h b/include/hw/devices.h
>> index 5ad134232c..25f895b330 100644
>> --- a/include/hw/devices.h
>> +++ b/include/hw/devices.h
>> @@ -28,13 +28,6 @@ void tsc2005_set_transform(void *opaque,
>> MouseTransformInfo *info);
>> /* stellaris_input.c */
>> void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode);
>>
>> -/* blizzard.c */
>> -void *s1d13745_init(qemu_irq gpio_int);
>> -void s1d13745_write(void *opaque, int dc, uint16_t value);
>> -void s1d13745_write_block(void *opaque, int dc,
>> -void *buf, size_t len, int pitch);
>> -uint16_t s1d13745_read(void *opaque, int dc);
>> -
>> /* cbus.c */
>> typedef struct {
>> qemu_irq clk;
>> diff --git a/include/hw/display/blizzard.h b/include/hw/display/blizzard.h
>> new file mode 100644
>> index 00..8132557da1
>> --- /dev/null
>> +++ b/include/hw/display/blizzard.h
>> @@ -0,0 +1,21 @@
>> +/*
>> + * Epson S1D13744/S1D13745 (Blizzard/Hailstorm/Tornado) LCD/TV controller.
>> + *
>> + * Copyright (C) 2008 Nokia Corporation
>> + * Written by Andrzej Zaborowski
>
> I don't think that this e-mail address is still valid since that company
> has been bought up > 10 years ago... so it likely does not make sense to
> mention it in new files anymore. So just mention the name?
Sure, I had no idea.
TIL: check email domain when moving emails.
>> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
>> + * See the COPYING file in the top-level directory.
>> + */
>> +#ifndef HW_DISPLAY_BLIZZARD_H
>> +#define HW_DISPLAY_BLIZZARD_H
>> +
>> +#include "hw/irq.h"
>> +
>> +void *s1d13745_init(qemu_irq gpio_int);
>> +void s1d13745_write(void *opaque, int dc, uint16_t value);
>> +void s1d13745_write_block(void *opaque, int dc,
>> + void *buf, size_t len, int pitch);
>> +uint16_t s1d13745_read(void *opaque, int dc);
>> +
>> +#endif
>>
>
> Reviewed-by: Thomas Huth
Thanks!
Re: [Qemu-devel] [PATCH 03/16] hw/devices: Remove unused TC6393XB_RAM definition
On 1/7/19 7:32 AM, Thomas Huth wrote: > On 2019-01-04 18:58, Philippe Mathieu-Daudé wrote: >> Introduced in 64b40bc54a9, this definition is no more used since >> a0b753dfd39. Remove it. >> >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> include/hw/devices.h | 1 - >> 1 file changed, 1 deletion(-) >> >> diff --git a/include/hw/devices.h b/include/hw/devices.h >> index 0e27feb0c2..4019b3be17 100644 >> --- a/include/hw/devices.h >> +++ b/include/hw/devices.h >> @@ -51,7 +51,6 @@ void retu_key_event(void *retu, int state); >> >> /* tc6393xb.c */ >> typedef struct TC6393xbState TC6393xbState; >> -#define TC6393XB_RAM0x11 /* amount of ram for Video and USB */ >> TC6393xbState *tc6393xb_init(struct MemoryRegion *sysmem, >> uint32_t base, qemu_irq irq); >> void tc6393xb_gpio_out_set(TC6393xbState *s, int line, >> > > I think I'd simply squash this into the next patch and mention it in the > patch description there that you removed the #define. OK.
Re: [Qemu-devel] [PATCH v4] Support u-boot noload images for arm as used by, NetBSD/evbarm GENERIC kernel.
On 06/01/2019 22:56, no-re...@patchew.org wrote: Patchew URL: https://patchew.org/QEMU/d19529f5-841e-ea06-fe7d-86ccfd528...@gmail.com/ Hi, This series seems to have some coding style problems. See output below for more information: The files being touched have lots of coding style problems already. I'm avoiding i) fixing these in the same diff for clarity and ii) in the case of IH_TYPE_KERNEL_NOLOAD, following existing formatting. I'll send v5 with the loadaddr api documentation formatting fix. Nick
Re: [Qemu-devel] [PATCH 15/16] hw/devices: Move SMSC 91C111 declaration into a new header
On 2019-01-04 18:58, Philippe Mathieu-Daudé wrote: > This commit finally deletes "hw/devices.h". > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/arm/gumstix.c | 2 +- > hw/arm/integratorcp.c | 2 +- > hw/arm/mainstone.c | 2 +- > hw/arm/realview.c | 2 +- > hw/arm/versatilepb.c | 2 +- > hw/net/smc91c111.c | 2 +- > include/hw/devices.h | 11 --- > include/hw/net/smc91c111.h | 18 ++ > 8 files changed, 24 insertions(+), 17 deletions(-) > delete mode 100644 include/hw/devices.h > create mode 100644 include/hw/net/smc91c111.h [...] > diff --git a/include/hw/net/smc91c111.h b/include/hw/net/smc91c111.h > new file mode 100644 > index 00..46f7d9a5d4 > --- /dev/null > +++ b/include/hw/net/smc91c111.h > @@ -0,0 +1,18 @@ > +/* > + * SMSC 91C111 Ethernet interface emulation > + * > + * Copyright (c) 2005 CodeSourcery, LLC. > + * Written by Paul Brook > + * > + * This code is licensed under the GPL I'd like to suggest to use here GPLv2+, too, since just "GPL" is quite inaccurate. > + */ > + > +#ifndef HW_NET_SMC91C111_H > +#define HW_NET_SMC91C111_H > + > +#include "hw/irq.h" > +#include "net/net.h" > + > +void smc91c111_init(NICInfo *, uint32_t, qemu_irq); > + > +#endif > Thomas
Re: [Qemu-devel] [PATCH 13/16] hw/net/ne2000-isa: Add guards to the header
On 2019-01-04 18:58, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > include/hw/net/ne2000-isa.h | 6 ++ > 1 file changed, 6 insertions(+) > > diff --git a/include/hw/net/ne2000-isa.h b/include/hw/net/ne2000-isa.h > index ff2bed9c95..527337c454 100644 > --- a/include/hw/net/ne2000-isa.h > +++ b/include/hw/net/ne2000-isa.h > @@ -6,6 +6,10 @@ > * This work is licensed under the terms of the GNU GPL, version 2 or later. > * See the COPYING file in the top-level directory. > */ > + > +#ifndef HW_NET_NE2K_ISA_H > +#define HW_NET_NE2K_ISA_H > + > #include "hw/hw.h" > #include "hw/qdev.h" > #include "hw/isa/isa.h" > @@ -31,3 +35,5 @@ static inline ISADevice *isa_ne2000_init(ISABus *bus, int > base, int irq, > } > return d; > } > + > +#endif > Reviewed-by: Thomas Huth
Re: [Qemu-devel] [PATCH 12/16] hw/devices: Move LAN9118 declarations into a new header
On 2019-01-04 18:58, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/arm/kzm.c | 2 +-
> hw/arm/mps2.c| 2 +-
> hw/arm/realview.c| 1 +
> hw/arm/vexpress.c| 2 +-
> hw/net/lan9118.c | 2 +-
> include/hw/devices.h | 3 ---
> include/hw/net/lan9118.h | 21 +
> 7 files changed, 26 insertions(+), 7 deletions(-)
> create mode 100644 include/hw/net/lan9118.h
>
> diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
> index 864c7bd411..139934c4ec 100644
> --- a/hw/arm/kzm.c
> +++ b/hw/arm/kzm.c
> @@ -22,7 +22,7 @@
> #include "qemu/error-report.h"
> #include "exec/address-spaces.h"
> #include "net/net.h"
> -#include "hw/devices.h"
> +#include "hw/net/lan9118.h"
> #include "hw/char/serial.h"
> #include "sysemu/qtest.h"
>
> diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
> index e3d698ba6c..54b7395849 100644
> --- a/hw/arm/mps2.c
> +++ b/hw/arm/mps2.c
> @@ -36,7 +36,7 @@
> #include "hw/timer/cmsdk-apb-timer.h"
> #include "hw/timer/cmsdk-apb-dualtimer.h"
> #include "hw/misc/mps2-scc.h"
> -#include "hw/devices.h"
> +#include "hw/net/lan9118.h"
> #include "net/net.h"
>
> typedef enum MPS2FPGAType {
> diff --git a/hw/arm/realview.c b/hw/arm/realview.c
> index 242f5a87b6..e9983c8763 100644
> --- a/hw/arm/realview.c
> +++ b/hw/arm/realview.c
> @@ -15,6 +15,7 @@
> #include "hw/arm/arm.h"
> #include "hw/arm/primecell.h"
> #include "hw/devices.h"
> +#include "hw/net/lan9118.h"
> #include "hw/pci/pci.h"
> #include "net/net.h"
> #include "sysemu/sysemu.h"
> diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
> index c02d18ee61..12e2c3986f 100644
> --- a/hw/arm/vexpress.c
> +++ b/hw/arm/vexpress.c
> @@ -28,7 +28,7 @@
> #include "hw/sysbus.h"
> #include "hw/arm/arm.h"
> #include "hw/arm/primecell.h"
> -#include "hw/devices.h"
> +#include "hw/net/lan9118.h"
> #include "hw/i2c/i2c.h"
> #include "net/net.h"
> #include "sysemu/sysemu.h"
> diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c
> index a6269d9463..a428b16eda 100644
> --- a/hw/net/lan9118.c
> +++ b/hw/net/lan9118.c
> @@ -14,7 +14,7 @@
> #include "hw/sysbus.h"
> #include "net/net.h"
> #include "net/eth.h"
> -#include "hw/devices.h"
> +#include "hw/net/lan9118.h"
> #include "sysemu/sysemu.h"
> #include "hw/ptimer.h"
> #include "qemu/log.h"
> diff --git a/include/hw/devices.h b/include/hw/devices.h
> index ba9034050b..ebc45c8799 100644
> --- a/include/hw/devices.h
> +++ b/include/hw/devices.h
> @@ -8,7 +8,4 @@
> /* smc91c111.c */
> void smc91c111_init(NICInfo *, uint32_t, qemu_irq);
>
> -/* lan9118.c */
> -void lan9118_init(NICInfo *, uint32_t, qemu_irq);
> -
> #endif
> diff --git a/include/hw/net/lan9118.h b/include/hw/net/lan9118.h
> new file mode 100644
> index 00..340d6681b7
> --- /dev/null
> +++ b/include/hw/net/lan9118.h
> @@ -0,0 +1,21 @@
> +/*
> + * SMSC LAN9118 Ethernet interface emulation
> + *
> + * Copyright (c) 2009 CodeSourcery, LLC.
> + * Written by Paul Brook
> + *
> + * This code is licensed under the GNU GPL v2
> + *
> + * Contributions after 2012-01-13 are licensed under the terms of the
> + * GNU GPL, version 2 or (at your option) any later version.
Since your contribution here is after 2012 and the file content is also
just a trivial one-line prototype, please change the license code to say
GPLv2+ only right from the start. We should avoid these v2 + v2+
statements in new files.
> + */
> +
> +#ifndef HW_NET_LAN9118_H
> +#define HW_NET_LAN9118_H
> +
> +#include "hw/irq.h"
> +#include "net/net.h"
> +
> +void lan9118_init(NICInfo *, uint32_t, qemu_irq);
> +
> +#endif
>
Thomas
Re: [Qemu-devel] [PATCH 11/16] typedefs: Remove PS2State
On 2019-01-04 18:58, Philippe Mathieu-Daudé wrote: > PS2State is only used in "hw/input/ps2.h", there is no > need to expose it via "qemu/typedefs.h". > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/hw/input/ps2.h | 2 ++ > include/qemu/typedefs.h | 1 - > 2 files changed, 2 insertions(+), 1 deletion(-) > > diff --git a/include/hw/input/ps2.h b/include/hw/input/ps2.h > index 213aa16aa3..b60455d4f6 100644 > --- a/include/hw/input/ps2.h > +++ b/include/hw/input/ps2.h > @@ -31,6 +31,8 @@ > #define PS2_MOUSE_BUTTON_SIDE 0x08 > #define PS2_MOUSE_BUTTON_EXTRA 0x10 > > +typedef struct PS2State PS2State; > + > /* ps2.c */ > void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg); > void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg); > diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h > index 927b340bb4..181f8fa68e 100644 > --- a/include/qemu/typedefs.h > +++ b/include/qemu/typedefs.h > @@ -82,7 +82,6 @@ typedef struct PixelFormat PixelFormat; > typedef struct PostcopyDiscardState PostcopyDiscardState; > typedef struct Property Property; > typedef struct PropertyInfo PropertyInfo; > -typedef struct PS2State PS2State; > typedef struct QEMUBH QEMUBH; > typedef struct QemuConsole QemuConsole; > typedef struct QemuDmaBuf QemuDmaBuf; > Reviewed-by: Thomas Huth
Re: [Qemu-devel] [PATCH 09/16] hw/devices: Move TI touchscreen declarations into a new header
On 2019-01-04 18:58, Philippe Mathieu-Daudé wrote: > Since uWireSlave is only used in this new header, there is no > need to expose it via "qemu/typedefs.h". > > Signed-off-by: Philippe Mathieu-Daudé > --- > MAINTAINERS | 2 ++ > hw/arm/nseries.c| 2 +- > hw/arm/palm.c | 2 +- > hw/input/tsc2005.c | 2 +- > hw/input/tsc210x.c | 4 ++-- > include/hw/arm/omap.h | 6 +- > include/hw/devices.h| 14 -- > include/hw/input/ti_uwire_tsc.h | 28 I'd maybe rather name the new file "tsc2xxx.h" instead, so that it resembles the names of the .c files. Just my 0.02 €. Thomas
Re: [Qemu-devel] [PATCH 08/16] MAINTAINERS: Add missing entries for the TI touchscreen devices
On 2019-01-04 18:58, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > MAINTAINERS | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index f571b29077..03872552ee 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -640,6 +640,7 @@ M: Peter Maydell > L: qemu-...@nongnu.org > S: Odd Fixes > F: hw/arm/nseries.c > +F: hw/input/tsc2*.c > F: include/hw/display/blizzard.h > F: include/hw/misc/cbus.h > > @@ -649,6 +650,7 @@ M: Peter Maydell > L: qemu-...@nongnu.org > S: Odd Fixes > F: hw/arm/palm.c > +F: hw/input/tsc2*.c The Palm machine does not seem to use tsc2005, does it? So I think this entry here is wrong. Thomas
Re: [Qemu-devel] [PATCH v3] Add getsockopt for settable SOL_IPV6 options
Le 07/01/2019 à 06:50, Tom Deseyn a écrit : > Hi Laurent, > > Can you please take a look at the updated patch? Should I add braces for > code-style? Yes, new code must follow code-style. Older is only updated when we modify it for something else. Thanks, Laurent
Re: [Qemu-devel] [PATCH 06/16] hw/devices: Move CBus declarations into a new header
On 2019-01-04 18:58, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> MAINTAINERS| 1 +
> hw/arm/nseries.c | 1 +
> hw/misc/cbus.c | 2 +-
> include/hw/devices.h | 14 --
> include/hw/misc/cbus.h | 31 +++
> 5 files changed, 34 insertions(+), 15 deletions(-)
> create mode 100644 include/hw/misc/cbus.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 156ce9a698..63ed6636ef 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -641,6 +641,7 @@ L: qemu-...@nongnu.org
> S: Odd Fixes
> F: hw/arm/nseries.c
> F: include/hw/display/blizzard.h
> +F: include/hw/misc/cbus.h
(note: I've added an entry for cbus.c here:
https://lists.gnu.org/archive/html/qemu-devel/2019-01/msg00097.html
you likely got to rebase this patch in case it hits master before
your patch)
> Palm
> M: Andrzej Zaborowski
> diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c
> index 9521be1cef..ac876b5878 100644
> --- a/hw/arm/nseries.c
> +++ b/hw/arm/nseries.c
> @@ -32,6 +32,7 @@
> #include "hw/i2c/i2c.h"
> #include "hw/devices.h"
> #include "hw/display/blizzard.h"
> +#include "hw/misc/cbus.h"
> #include "hw/block/flash.h"
> #include "hw/hw.h"
> #include "hw/bt.h"
> diff --git a/hw/misc/cbus.c b/hw/misc/cbus.c
> index 25e337ea77..16ee704bca 100644
> --- a/hw/misc/cbus.c
> +++ b/hw/misc/cbus.c
> @@ -23,7 +23,7 @@
> #include "qemu/osdep.h"
> #include "hw/hw.h"
> #include "hw/irq.h"
> -#include "hw/devices.h"
> +#include "hw/misc/cbus.h"
> #include "sysemu/sysemu.h"
>
> //#define DEBUG
> diff --git a/include/hw/devices.h b/include/hw/devices.h
> index 25f895b330..8b649541b1 100644
> --- a/include/hw/devices.h
> +++ b/include/hw/devices.h
> @@ -28,18 +28,4 @@ void tsc2005_set_transform(void *opaque,
> MouseTransformInfo *info);
> /* stellaris_input.c */
> void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode);
>
> -/* cbus.c */
> -typedef struct {
> -qemu_irq clk;
> -qemu_irq dat;
> -qemu_irq sel;
> -} CBus;
> -CBus *cbus_init(qemu_irq dat_out);
> -void cbus_attach(CBus *bus, void *slave_opaque);
> -
> -void *retu_init(qemu_irq irq, int vilma);
> -void *tahvo_init(qemu_irq irq, int betty);
> -
> -void retu_key_event(void *retu, int state);
> -
> #endif
> diff --git a/include/hw/misc/cbus.h b/include/hw/misc/cbus.h
> new file mode 100644
> index 00..1ce1855ccf
> --- /dev/null
> +++ b/include/hw/misc/cbus.h
> @@ -0,0 +1,31 @@
> +/*
> + * CBUS three-pin bus and the Retu / Betty / Tahvo / Vilma / Avilma /
> + * Hinku / Vinku / Ahne / Pihi chips used in various Nokia platforms.
> + * Based on reverse-engineering of a linux driver.
> + *
> + * Copyright (C) 2008 Nokia Corporation
> + * Written by Andrzej Zaborowski
I'd drop the invalid e-mail address here, too, I think.
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + */
> +#ifndef HW_MISC_CBUS_H
> +#define HW_MISC_CBUS_H
> +
> +#include "hw/irq.h"
> +
> +typedef struct {
> +qemu_irq clk;
> +qemu_irq dat;
> +qemu_irq sel;
> +} CBus;
> +
> +CBus *cbus_init(qemu_irq dat_out);
> +void cbus_attach(CBus *bus, void *slave_opaque);
> +
> +void *retu_init(qemu_irq irq, int vilma);
> +void *tahvo_init(qemu_irq irq, int betty);
> +
> +void retu_key_event(void *retu, int state);
> +
> +#endif
>
Reviewed-by: Thomas Huth
Re: [Qemu-devel] [PATCH 00/10] spapr: introduce the 'dual' interrupt mode XICS/XIVE
On 1/7/19 5:48 AM, David Gibson wrote: > On Wed, Jan 02, 2019 at 06:57:33AM +0100, Cédric Le Goater wrote: >> Hello, >> >> This series adds a new sPAPR IRQ backend called 'dual' which supports >> both interrupt mode, the XIVE native exploitation mode and the legacy >> compatibility mode (XICS). >> >> The machine operates with the legacy mode by default and lets CAS >> negotiate a new interrupt mode. If a new mode is selected, it is >> activated after a machine reset to take into account the required >> changes. These impact the device tree layout, the interrupt presenter >> object and the exposed MMIO regions in the case of XIVE. >> >> The preliminary changes for this new IRQ backend are the introduction >> of a second interrupt presenter object under the PowerPCCPU to support >> XIVE. The qemu_irq array of each interrupt controller model is also >> made common and moved under the machine. > > Ok, I've now applied all of this series to ppc-for-4.0. Thanks, We should pursue with KVM XIVE support now. Shall I send the Linux KVM and the QEMU KVM patchsets in parallel ? I still have some work to be done on the QEMU PowerNV before resending. Thanks, C. > >> >> >> GitHub trees available here : >> >> QEMU sPAPR: >> >> https://github.com/legoater/qemu/commits/xive-next >> >> QEMU PowerNV: >> >> https://github.com/legoater/qemu/commits/powernv-3.1 >> >> Linux/KVM: >> >> https://github.com/legoater/linux/commits/xive-4.20 >> >> OPAL: >> >> https://github.com/legoater/skiboot/commits/xive >> >> Best wishes for 2019 ! >> >> C. >> >> >> >> Cédric Le Goater (10): >> spapr: modify the prototype of the cpu_intc_create() method >> ppc/xive: introduce a XiveTCTX pointer under PowerPCCPU >> ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the >> CPU >> spapr/xive: simplify the sPAPR IRQ qirq method for XIVE >> ppc: export the XICS and XIVE set_irq handlers >> pnv/psi: move the ICSState qemu_irq array under the PSI device model >> spapr: move the ICSState qemu_irq array under the machine >> ppc/xics: allow ICSState to have an offset 0 >> spapr: introduce a new sPAPR IRQ backend supporting XIVE and XICS >> spapr: enable XIVE MMIOs at reset >> >> include/hw/ppc/pnv.h| 2 +- >> include/hw/ppc/pnv_psi.h| 1 + >> include/hw/ppc/spapr.h | 1 + >> include/hw/ppc/spapr_irq.h | 6 +- >> include/hw/ppc/spapr_xive.h | 2 +- >> include/hw/ppc/xics.h | 6 +- >> include/hw/ppc/xive.h | 9 +- >> target/ppc/cpu.h| 5 +- >> hw/intc/spapr_xive.c| 23 ++- >> hw/intc/xics.c | 4 +- >> hw/intc/xics_kvm.c | 3 +- >> hw/intc/xics_spapr.c| 10 +- >> hw/intc/xive.c | 11 +- >> hw/ppc/pnv.c| 27 ++-- >> hw/ppc/pnv_core.c | 4 +- >> hw/ppc/pnv_psi.c| 7 +- >> hw/ppc/spapr.c | 12 +- >> hw/ppc/spapr_cpu_core.c | 9 +- >> hw/ppc/spapr_hcall.c| 11 ++ >> hw/ppc/spapr_irq.c | 270 ++-- >> 20 files changed, 342 insertions(+), 81 deletions(-) >> >
Re: [Qemu-devel] [PATCH 01/16] hw/arm/aspeed: Use TYPE_TMP105/TYPE_PCA9552 instead of hardcoded string
On 1/4/19 6:58 PM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. > --- > hw/arm/aspeed.c | 13 + > 1 file changed, 9 insertions(+), 4 deletions(-) > > diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c > index 5158985482..817f9e1400 100644 > --- a/hw/arm/aspeed.c > +++ b/hw/arm/aspeed.c > @@ -19,6 +19,8 @@ > #include "hw/arm/aspeed_soc.h" > #include "hw/boards.h" > #include "hw/i2c/smbus.h" > +#include "hw/misc/pca9552.h" > +#include "hw/misc/tmp105.h" > #include "qemu/log.h" > #include "sysemu/block-backend.h" > #include "hw/loader.h" > @@ -267,7 +269,8 @@ static void ast2500_evb_i2c_init(AspeedBoardState *bmc) >eeprom_buf); > > /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */ > -i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", > 0x4d); > +i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), TYPE_TMP105, > + 0x4d); > > /* The AST2500 EVB does not have an RTC. Let's pretend that one is > * plugged on the I2C bus header */ > @@ -288,13 +291,15 @@ static void witherspoon_bmc_i2c_init(AspeedBoardState > *bmc) > AspeedSoCState *soc = &bmc->soc; > uint8_t *eeprom_buf = g_malloc0(8 * 1024); > > -i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), "pca9552", > 0x60); > +i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), TYPE_PCA9552, > + 0x60); > > i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", > 0x4c); > i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", > 0x4c); > > /* The Witherspoon expects a TMP275 but a TMP105 is compatible */ > -i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "tmp105", > 0x4a); > +i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), TYPE_TMP105, > + 0x4a); > > /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is > * good enough */ > @@ -302,7 +307,7 @@ static void witherspoon_bmc_i2c_init(AspeedBoardState > *bmc) > > smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), 0x51, >eeprom_buf); > -i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "pca9552", > +i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), TYPE_PCA9552, > 0x60); > } > >
Re: [Qemu-devel] [PATCH 05/16] hw/devices: Move Blizzard declarations into a new header
On 2019-01-04 18:58, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> MAINTAINERS | 1 +
> hw/arm/nseries.c | 1 +
> hw/display/blizzard.c | 2 +-
> include/hw/devices.h | 7 ---
> include/hw/display/blizzard.h | 21 +
> 5 files changed, 24 insertions(+), 8 deletions(-)
> create mode 100644 include/hw/display/blizzard.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index dff4b98401..156ce9a698 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -640,6 +640,7 @@ M: Peter Maydell
> L: qemu-...@nongnu.org
> S: Odd Fixes
> F: hw/arm/nseries.c
> +F: include/hw/display/blizzard.h
While you're at it, also add an entry for hw/display/blizzard.c here?
> Palm
> M: Andrzej Zaborowski
> diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c
> index 906b7ca22d..9521be1cef 100644
> --- a/hw/arm/nseries.c
> +++ b/hw/arm/nseries.c
> @@ -31,6 +31,7 @@
> #include "hw/boards.h"
> #include "hw/i2c/i2c.h"
> #include "hw/devices.h"
> +#include "hw/display/blizzard.h"
> #include "hw/block/flash.h"
> #include "hw/hw.h"
> #include "hw/bt.h"
> diff --git a/hw/display/blizzard.c b/hw/display/blizzard.c
> index 291abe6fca..471bd0ed99 100644
> --- a/hw/display/blizzard.c
> +++ b/hw/display/blizzard.c
> @@ -21,7 +21,7 @@
> #include "qemu/osdep.h"
> #include "qemu-common.h"
> #include "ui/console.h"
> -#include "hw/devices.h"
> +#include "hw/display/blizzard.h"
> #include "ui/pixel_ops.h"
>
> typedef void (*blizzard_fn_t)(uint8_t *, const uint8_t *, unsigned int);
> diff --git a/include/hw/devices.h b/include/hw/devices.h
> index 5ad134232c..25f895b330 100644
> --- a/include/hw/devices.h
> +++ b/include/hw/devices.h
> @@ -28,13 +28,6 @@ void tsc2005_set_transform(void *opaque,
> MouseTransformInfo *info);
> /* stellaris_input.c */
> void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode);
>
> -/* blizzard.c */
> -void *s1d13745_init(qemu_irq gpio_int);
> -void s1d13745_write(void *opaque, int dc, uint16_t value);
> -void s1d13745_write_block(void *opaque, int dc,
> -void *buf, size_t len, int pitch);
> -uint16_t s1d13745_read(void *opaque, int dc);
> -
> /* cbus.c */
> typedef struct {
> qemu_irq clk;
> diff --git a/include/hw/display/blizzard.h b/include/hw/display/blizzard.h
> new file mode 100644
> index 00..8132557da1
> --- /dev/null
> +++ b/include/hw/display/blizzard.h
> @@ -0,0 +1,21 @@
> +/*
> + * Epson S1D13744/S1D13745 (Blizzard/Hailstorm/Tornado) LCD/TV controller.
> + *
> + * Copyright (C) 2008 Nokia Corporation
> + * Written by Andrzej Zaborowski
I don't think that this e-mail address is still valid since that company
has been bought up > 10 years ago... so it likely does not make sense to
mention it in new files anymore. So just mention the name?
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + */
> +#ifndef HW_DISPLAY_BLIZZARD_H
> +#define HW_DISPLAY_BLIZZARD_H
> +
> +#include "hw/irq.h"
> +
> +void *s1d13745_init(qemu_irq gpio_int);
> +void s1d13745_write(void *opaque, int dc, uint16_t value);
> +void s1d13745_write_block(void *opaque, int dc,
> + void *buf, size_t len, int pitch);
> +uint16_t s1d13745_read(void *opaque, int dc);
> +
> +#endif
>
Reviewed-by: Thomas Huth
Re: [Qemu-devel] [PATCH 03/16] hw/devices: Remove unused TC6393XB_RAM definition
On 2019-01-04 18:58, Philippe Mathieu-Daudé wrote: > Introduced in 64b40bc54a9, this definition is no more used since > a0b753dfd39. Remove it. > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/hw/devices.h | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/include/hw/devices.h b/include/hw/devices.h > index 0e27feb0c2..4019b3be17 100644 > --- a/include/hw/devices.h > +++ b/include/hw/devices.h > @@ -51,7 +51,6 @@ void retu_key_event(void *retu, int state); > > /* tc6393xb.c */ > typedef struct TC6393xbState TC6393xbState; > -#define TC6393XB_RAM 0x11 /* amount of ram for Video and USB */ > TC6393xbState *tc6393xb_init(struct MemoryRegion *sysmem, > uint32_t base, qemu_irq irq); > void tc6393xb_gpio_out_set(TC6393xbState *s, int line, > I think I'd simply squash this into the next patch and mention it in the patch description there that you removed the #define. Thomas
Re: [Qemu-devel] [PATCH v3] Add getsockopt for settable SOL_IPV6 options
Hi Laurent,
Can you please take a look at the updated patch? Should I add braces for
code-style?
Thanks,
Tom
On Fri, Dec 14, 2018 at 4:43 PM wrote:
> From: Tom Deseyn
>
> Thank you for reviewing Laurant.
> Sorry for missing history, I'm not used to sending patches via mail.
> I got an email about code style. For now, I'm sticking to the style
> that is used in the function.
>
> v2: default to unimplemented
> v3: match kernel behavior
>
> Signed-off-by: Tom Deseyn
> ---
> linux-user/syscall.c | 36
> 1 file changed, 36 insertions(+)
>
> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> index 280137da8c..f103437f26 100644
> --- a/linux-user/syscall.c
> +++ b/linux-user/syscall.c
> @@ -2352,6 +2352,42 @@ static abi_long do_getsockopt(int sockfd, int
> level, int optname,
> break;
> }
> break;
> +case SOL_IPV6:
> +switch (optname) {
> +case IPV6_MTU_DISCOVER:
> +case IPV6_MTU:
> +case IPV6_V6ONLY:
> +case IPV6_RECVPKTINFO:
> +case IPV6_UNICAST_HOPS:
> +case IPV6_MULTICAST_HOPS:
> +case IPV6_MULTICAST_LOOP:
> +case IPV6_RECVERR:
> +case IPV6_RECVHOPLIMIT:
> +case IPV6_2292HOPLIMIT:
> +case IPV6_CHECKSUM: {
> +void* target_addr;
> +if (get_user_u32(len, optlen))
> +return -TARGET_EFAULT;
> +if (len < 0)
> +return -TARGET_EINVAL;
> +lv = sizeof(val);
> +ret = get_errno(getsockopt(sockfd, level, optname, &val,
> &lv));
> +if (ret < 0)
> +return ret;
> +if (lv < len)
> +len = lv;
> +if (put_user_u32(len, optlen))
> +return -TARGET_EFAULT;
> +target_addr = lock_user(VERIFY_WRITE, optval_addr, len, 0);
> +tswap32s((uint32_t*)&val);
> +memcpy(target_addr, &val, len);
> +unlock_user(target_addr, optval_addr, len);
> +break;
> +}
> +default:
> +goto unimplemented;
> +}
> +break;
> default:
> unimplemented:
> gemu_log("getsockopt level=%d optname=%d not yet supported\n",
> --
> 2.19.2
>
>
Re: [Qemu-devel] [PATCH 00/10] spapr: introduce the 'dual' interrupt mode XICS/XIVE
On Wed, Jan 02, 2019 at 06:57:33AM +0100, Cédric Le Goater wrote: > Hello, > > This series adds a new sPAPR IRQ backend called 'dual' which supports > both interrupt mode, the XIVE native exploitation mode and the legacy > compatibility mode (XICS). > > The machine operates with the legacy mode by default and lets CAS > negotiate a new interrupt mode. If a new mode is selected, it is > activated after a machine reset to take into account the required > changes. These impact the device tree layout, the interrupt presenter > object and the exposed MMIO regions in the case of XIVE. > > The preliminary changes for this new IRQ backend are the introduction > of a second interrupt presenter object under the PowerPCCPU to support > XIVE. The qemu_irq array of each interrupt controller model is also > made common and moved under the machine. Ok, I've now applied all of this series to ppc-for-4.0. > > > GitHub trees available here : > > QEMU sPAPR: > > https://github.com/legoater/qemu/commits/xive-next > > QEMU PowerNV: > > https://github.com/legoater/qemu/commits/powernv-3.1 > > Linux/KVM: > > https://github.com/legoater/linux/commits/xive-4.20 > > OPAL: > > https://github.com/legoater/skiboot/commits/xive > > Best wishes for 2019 ! > > C. > > > > Cédric Le Goater (10): > spapr: modify the prototype of the cpu_intc_create() method > ppc/xive: introduce a XiveTCTX pointer under PowerPCCPU > ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the > CPU > spapr/xive: simplify the sPAPR IRQ qirq method for XIVE > ppc: export the XICS and XIVE set_irq handlers > pnv/psi: move the ICSState qemu_irq array under the PSI device model > spapr: move the ICSState qemu_irq array under the machine > ppc/xics: allow ICSState to have an offset 0 > spapr: introduce a new sPAPR IRQ backend supporting XIVE and XICS > spapr: enable XIVE MMIOs at reset > > include/hw/ppc/pnv.h| 2 +- > include/hw/ppc/pnv_psi.h| 1 + > include/hw/ppc/spapr.h | 1 + > include/hw/ppc/spapr_irq.h | 6 +- > include/hw/ppc/spapr_xive.h | 2 +- > include/hw/ppc/xics.h | 6 +- > include/hw/ppc/xive.h | 9 +- > target/ppc/cpu.h| 5 +- > hw/intc/spapr_xive.c| 23 ++- > hw/intc/xics.c | 4 +- > hw/intc/xics_kvm.c | 3 +- > hw/intc/xics_spapr.c| 10 +- > hw/intc/xive.c | 11 +- > hw/ppc/pnv.c| 27 ++-- > hw/ppc/pnv_core.c | 4 +- > hw/ppc/pnv_psi.c| 7 +- > hw/ppc/spapr.c | 12 +- > hw/ppc/spapr_cpu_core.c | 9 +- > hw/ppc/spapr_hcall.c| 11 ++ > hw/ppc/spapr_irq.c | 270 ++-- > 20 files changed, 342 insertions(+), 81 deletions(-) > -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson signature.asc Description: PGP signature
Re: [Qemu-devel] [PATCH 08/10] ppc/xics: allow ICSState to have an offset 0
On Thu, Jan 03, 2019 at 06:45:25PM +0100, Cédric Le Goater wrote:
> On 1/3/19 5:33 AM, David Gibson wrote:
> > On Wed, Jan 02, 2019 at 06:57:41AM +0100, Cédric Le Goater wrote:
> >> commit 15ed653fa49a ("ppc/xics: An ICS with offset 0 is assumed to be
> >> uninitialized") introduced an extra check on the ICS offset which is
> >> not strictly necessary.
> >
> > The commit message for that suggests it was added to make pnv easier.
> > I take it you no longer need this for the current or expected pnv
> > code?
>
> This is really just a runtime check which makes sure that the
> ICSState offset is initialized by the FW before being used.
>
> The problem is more global. It comes from the fact the ICSState
> offset in QEMU and the XICS offset in KVM is hardcoded to 0x1000.
>
> Thinking aloud :
>
> May be we should default the offset to 0 and introduce a service
> to set the value in QEMU and KVM.
>
> The 'dual' interrupt mode (using the qirq array at the machine level)
> needs the IRQ number space of the XIVE and XICS interrupt mode to
> be in sync, that is to start a 0x0, even if the lower 4K are ignored
> in XICS.
>
> So the 'dual' mode tunes the offset to 0 once the ICSState is created
> and ignores the lower 4K when initializing the KVM XICS device.
Hm, ok.
I've applied patches 5..8.
>
> C.
>
> >> Revert the change to be able to map the XICS IRQ number space on the
> >> XIVE IRQ number space.
> >
> >
> >
> >>
> >> Signed-off-by: Cédric Le Goater
> >> ---
> >> include/hw/ppc/xics.h | 3 +--
> >> 1 file changed, 1 insertion(+), 2 deletions(-)
> >>
> >> diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
> >> index 7668c381a887..07508cbd217e 100644
> >> --- a/include/hw/ppc/xics.h
> >> +++ b/include/hw/ppc/xics.h
> >> @@ -139,8 +139,7 @@ struct ICSState {
> >>
> >> static inline bool ics_valid_irq(ICSState *ics, uint32_t nr)
> >> {
> >> -return (ics->offset != 0) && (nr >= ics->offset)
> >> -&& (nr < (ics->offset + ics->nr_irqs));
> >> +return (nr >= ics->offset) && (nr < (ics->offset + ics->nr_irqs));
> >> }
> >>
> >> struct ICSIRQState {
> >
>
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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Re: [Qemu-devel] Why one virtio-pci device has two different DeviceState?
On Sat, Jan 5, 2019 at 10:42 AM Peter Maydell wrote: > > On Fri, 4 Jan 2019 at 20:23, Jintack Lim wrote: > > I was wondering why one virtio-pci device has two different > > DeviceState? - one directly from VirtIOPCIProxy and the other from > > VirtIO such as VirtIONet. As an example, they are denoted as > > qdev and vdev respectively in virtio_net_pci_realize(). > > It's been a while since I looked at this, but there are two > basic issues underlying the weird way virtio devices are > set up: > (1) PCI is not the only "transport" -- the VirtIONet etc > are shared with other transports like MMIO or the S390 ones > (2) retaining back-compatibility matters a lot here: we need > command lines to still work, and also the migration data > stream needs to stay compatible > Some of the way the devices are reflects the way we started > with a design where there was only a single device (eg the > pci virtio-net device) and then refactored it to support > multiple transports while retaining back compatibility. Thanks for the insight, Peter. That make sense!! Thanks, Jintack > > > I thought that just one DeviceState is enough for any device in QEMU. > > Maybe I'm missing something fundamental here. > > This isn't generally true, it's just that a lot of > our devices are of the simple straightforward kind > where that's true. It's also possible for an > implementation of a device to be as a combination > of other devices, which is what we have here. > virtio-pci-net is-a PCIDevice (which in turn is-a Device), > but it has-a VirtIONet device (which is-a Device) as > part of its implementation. > (It's also possible to manually create the pci > transport and the virtio-net backend separately > and connect them together without the virtio-pci-net > device at all. That's more often used with non-pci > transports but it works for pci too.) > > You can also see a similar thing with a lot of the > "container" SoC objects like TYPE_ASPEED_SOC, which > is a subclass of DeviceState, but is implemented > using a dozen different objects all of which are > themselves DeviceState subclasses. > > thanks > -- PMM >
Re: [Qemu-devel] [PATCH v2] spapr: return from post_load method when RTC import fails
On Fri, Jan 04, 2019 at 02:30:50PM +0100, Cédric Le Goater wrote:
> The error value can be squashed by the section handling radix migration.
> Simply bail out if an error occurs when the RTC offset is imported.
>
> This fixes the Coverity issue CID 1398591.
>
> Fixes: d39c90f5f3ae ("spapr: Fix migration of Radix guests")
> Signed-off-by: Cédric Le Goater
Applied to ppc-for-4.0, thanks.
> ---
>
> Changes since v1 :
>
> - Added Coverity issue CID
>
> hw/ppc/spapr.c | 9 +++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index f1725313e979..64397ee91ef0 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -1748,12 +1748,17 @@ static int spapr_post_load(void *opaque, int
> version_id)
> return err;
> }
>
> -/* In earlier versions, there was no separate qdev for the PAPR
> +/*
> + * In earlier versions, there was no separate qdev for the PAPR
> * RTC, so the RTC offset was stored directly in sPAPREnvironment.
> * So when migrating from those versions, poke the incoming offset
> - * value into the RTC device */
> + * value into the RTC device
> + */
> if (version_id < 3) {
> err = spapr_rtc_import_offset(&spapr->rtc, spapr->rtc_offset);
> +if (err) {
> +return err;
> +}
> }
>
> if (kvm_enabled() && spapr->patb_entry) {
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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Re: [Qemu-devel] [PATCH v2 3/3] util/cutils: Move function documentations to the header
On Fri, Jan 04, 2019 at 07:12:08PM +0100, Philippe Mathieu-Daudé wrote:
> Many functions have documentation before the implementation in
> cutils.c. Since we expect documentation around the prototype
> declaration in headers, move the comments in cutils.h.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: David Gibson
> ---
> include/qemu/cutils.h | 224 ++
> util/cutils.c | 185 --
> 2 files changed, 224 insertions(+), 185 deletions(-)
>
> diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h
> index 644f2d75bd..f41b00ad37 100644
> --- a/include/qemu/cutils.h
> +++ b/include/qemu/cutils.h
> @@ -47,6 +47,7 @@
> *bytes and then add a NUL
> */
> void pstrcpy(char *buf, int buf_size, const char *str);
> +
> /**
> * strpadcpy:
> * @buf: buffer to copy string into
> @@ -60,6 +61,7 @@ void pstrcpy(char *buf, int buf_size, const char *str);
> * first @buf_size characters of @str, with no terminator.
> */
> void strpadcpy(char *buf, int buf_size, const char *str, char pad);
> +
> /**
> * pstrcat:
> * @buf: buffer containing existing string
> @@ -77,6 +79,7 @@ void strpadcpy(char *buf, int buf_size, const char *str,
> char pad);
> * Returns: @buf.
> */
> char *pstrcat(char *buf, int buf_size, const char *s);
> +
> /**
> * strstart:
> * @str: string to test
> @@ -94,6 +97,7 @@ char *pstrcat(char *buf, int buf_size, const char *s);
> * Returns: true if @str starts with prefix @val, false otherwise.
> */
> int strstart(const char *str, const char *val, const char **ptr);
> +
> /**
> * stristart:
> * @str: string to test
> @@ -110,6 +114,7 @@ int strstart(const char *str, const char *val, const char
> **ptr);
> * false otherwise.
> */
> int stristart(const char *str, const char *val, const char **ptr);
> +
> /**
> * qemu_strnlen:
> * @s: string
> @@ -126,6 +131,7 @@ int stristart(const char *str, const char *val, const
> char **ptr);
> * Returns: length of @s in bytes, or @max_len, whichever is smaller.
> */
> int qemu_strnlen(const char *s, int max_len);
> +
> /**
> * qemu_strsep:
> * @input: pointer to string to parse
> @@ -147,6 +153,16 @@ int qemu_strnlen(const char *s, int max_len);
> * Returns: the pointer originally in @input.
> */
> char *qemu_strsep(char **input, const char *delim);
> +
> +/**
> + * qemu_strchrnul:
> + *
> + * @s: String to parse.
> + * @c: Character to find.
> + *
> + * Searches for the first occurrence of @c in @s, and returns a pointer
> + * to the trailing null byte if none was found.
> + */
> #ifdef HAVE_STRCHRNUL
> static inline const char *qemu_strchrnul(const char *s, int c)
> {
> @@ -155,27 +171,235 @@ static inline const char *qemu_strchrnul(const char
> *s, int c)
> #else
> const char *qemu_strchrnul(const char *s, int c);
> #endif
> +
> time_t mktimegm(struct tm *tm);
> int qemu_fdatasync(int fd);
> int fcntl_setfl(int fd, int flag);
> int qemu_parse_fd(const char *param);
> +
> +/**
> + * qemu_strtoi:
> + *
> + * Convert string @nptr to an integer, and store it in @result.
> + *
> + * This is a wrapper around strtol() that is harder to misuse.
> + * Semantics of @nptr, @endptr, @base match strtol() with differences
> + * noted below.
> + *
> + * @nptr may be null, and no conversion is performed then.
> + *
> + * If no conversion is performed, store @nptr in *@endptr and return
> + * -EINVAL.
> + *
> + * If @endptr is null, and the string isn't fully converted, return
> + * -EINVAL. This is the case when the pointer that would be stored in
> + * a non-null @endptr points to a character other than '\0'.
> + *
> + * If the conversion overflows @result, store INT_MAX in @result,
> + * and return -ERANGE.
> + *
> + * If the conversion underflows @result, store INT_MIN in @result,
> + * and return -ERANGE.
> + *
> + * Else store the converted value in @result, and return zero.
> + */
> int qemu_strtoi(const char *nptr, const char **endptr, int base,
> int *result);
> +
> +/**
> + * qemu_strtoui:
> + *
> + * Convert string @nptr to an unsigned integer, and store it in @result.
> + *
> + * This is a wrapper around strtoul() that is harder to misuse.
> + * Semantics of @nptr, @endptr, @base match strtoul() with differences
> + * noted below.
> + *
> + * @nptr may be null, and no conversion is performed then.
> + *
> + * If no conversion is performed, store @nptr in *@endptr and return
> + * -EINVAL.
> + *
> + * If @endptr is null, and the string isn't fully converted, return
> + * -EINVAL. This is the case when the pointer that would be stored in
> + * a non-null @endptr points to a character other than '\0'.
> + *
> + * If the conversion overflows @result, store UINT_MAX in @result,
> + * and return -ERANGE.
> + *
> + * Else store the converted value in @result, and return zero.
> + *
> + * Note that a number with a leading minus sign gets converted without
> + * the minus sign, chec
Re: [Qemu-devel] [PATCH v2 1/3] util/cutils: Move size_to_str() from "qemu-common.h" to "cutils.h"
On Fri, Jan 04, 2019 at 07:12:06PM +0100, Philippe Mathieu-Daudé wrote:
> The size_to_str() function doesn't need to be in a generic header.
>
> It makes also sens to find this function in the same header than
> the opposite string to size functions: qemu_strtosz*().
> Note than this function is already implemented in util/cutils.c.
>
> Since we introduce a new function in a header, we document it,
> using the previous comment from the source file.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: David Gibson
> ---
> include/qemu-common.h| 1 -
> include/qemu/cutils.h| 13 +
> qapi/string-output-visitor.c | 2 +-
> util/cutils.c| 6 --
> 4 files changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/include/qemu-common.h b/include/qemu-common.h
> index ed60ba251d..760527294f 100644
> --- a/include/qemu-common.h
> +++ b/include/qemu-common.h
> @@ -153,7 +153,6 @@ void qemu_hexdump(const char *buf, FILE *fp, const char
> *prefix, size_t size);
> int parse_debug_env(const char *name, int max, int initial);
>
> const char *qemu_ether_ntoa(const MACAddr *mac);
> -char *size_to_str(uint64_t val);
> void page_size_init(void);
>
> /* returns non-zero if dump is in progress, otherwise zero is
> diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h
> index d2dad3057c..9ee40470e3 100644
> --- a/include/qemu/cutils.h
> +++ b/include/qemu/cutils.h
> @@ -157,6 +157,19 @@ int qemu_strtosz(const char *nptr, const char **end,
> uint64_t *result);
> int qemu_strtosz_MiB(const char *nptr, const char **end, uint64_t *result);
> int qemu_strtosz_metric(const char *nptr, const char **end, uint64_t
> *result);
>
> +/**
> + * size_to_str:
> + *
> + * Return human readable string for size @val.
> + * Use IEC binary units like KiB, MiB, and so forth.
> + *
> + * @val: The value to format.
> + * Can be anything that uint64_t allows (no more than "16 EiB").
> + *
> + * Caller is responsible for passing it to g_free().
> + */
> +char *size_to_str(uint64_t val);
> +
> /* used to print char* safely */
> #define STR_OR_NULL(str) ((str) ? (str) : "null")
>
> diff --git a/qapi/string-output-visitor.c b/qapi/string-output-visitor.c
> index 7ab64468d9..edf268b373 100644
> --- a/qapi/string-output-visitor.c
> +++ b/qapi/string-output-visitor.c
> @@ -11,9 +11,9 @@
> */
>
> #include "qemu/osdep.h"
> -#include "qemu-common.h"
> #include "qapi/string-output-visitor.h"
> #include "qapi/visitor-impl.h"
> +#include "qemu/cutils.h"
> #include "qemu/host-utils.h"
> #include
> #include "qemu/range.h"
> diff --git a/util/cutils.c b/util/cutils.c
> index e098debdc0..a8a3a3ba3b 100644
> --- a/util/cutils.c
> +++ b/util/cutils.c
> @@ -816,12 +816,6 @@ const char *qemu_ether_ntoa(const MACAddr *mac)
> return ret;
> }
>
> -/*
> - * Return human readable string for size @val.
> - * @val can be anything that uint64_t allows (no more than "16 EiB").
> - * Use IEC binary units like KiB, MiB, and so forth.
> - * Caller is responsible for passing it to g_free().
> - */
> char *size_to_str(uint64_t val)
> {
> static const char *suffixes[] = { "", "Ki", "Mi", "Gi", "Ti", "Pi", "Ei"
> };
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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Re: [Qemu-devel] [PATCH v2 2/3] util/cutils: Move ctype macros to "cutils.h"
On Fri, Jan 04, 2019 at 07:12:07PM +0100, Philippe Mathieu-Daudé wrote: > Introduced in cd390083ad1, these macros don't need to be in > a generic header. > Add documentation to justify their use. > > Reviewed-by: Stefano Garzarella > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: David Gibson > --- > v2: Fixed checkpatch warnings (tabs) > --- > hw/core/bus.c | 2 +- > hw/core/qdev-properties.c | 1 + > hw/s390x/s390-virtio-ccw.c | 1 + > hw/scsi/scsi-generic.c | 2 +- > include/qemu-common.h | 16 > include/qemu/cutils.h | 25 + > qapi/qapi-util.c | 2 +- > qobject/json-parser.c | 1 - > target/ppc/monitor.c | 1 + > ui/keymaps.c | 1 + > util/id.c | 2 +- > util/readline.c| 1 - > 12 files changed, 33 insertions(+), 22 deletions(-) > > diff --git a/hw/core/bus.c b/hw/core/bus.c > index 4651f24486..dceb144075 100644 > --- a/hw/core/bus.c > +++ b/hw/core/bus.c > @@ -18,7 +18,7 @@ > */ > > #include "qemu/osdep.h" > -#include "qemu-common.h" > +#include "qemu/cutils.h" > #include "hw/qdev.h" > #include "qapi/error.h" > > diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c > index 943dc2654b..3bdebac361 100644 > --- a/hw/core/qdev-properties.c > +++ b/hw/core/qdev-properties.c > @@ -1,4 +1,5 @@ > #include "qemu/osdep.h" > +#include "qemu/cutils.h" > #include "net/net.h" > #include "hw/qdev.h" > #include "qapi/error.h" > diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c > index fd9d0b0542..ed23bb7b3a 100644 > --- a/hw/s390x/s390-virtio-ccw.c > +++ b/hw/s390x/s390-virtio-ccw.c > @@ -11,6 +11,7 @@ > */ > > #include "qemu/osdep.h" > +#include "qemu/cutils.h" > #include "qapi/error.h" > #include "cpu.h" > #include "hw/boards.h" > diff --git a/hw/scsi/scsi-generic.c b/hw/scsi/scsi-generic.c > index 7237b4162e..86f65fd474 100644 > --- a/hw/scsi/scsi-generic.c > +++ b/hw/scsi/scsi-generic.c > @@ -12,8 +12,8 @@ > */ > > #include "qemu/osdep.h" > +#include "qemu/cutils.h" > #include "qapi/error.h" > -#include "qemu-common.h" > #include "qemu/error-report.h" > #include "hw/scsi/scsi.h" > #include "hw/scsi/emulation.h" > diff --git a/include/qemu-common.h b/include/qemu-common.h > index 760527294f..ed43ae286d 100644 > --- a/include/qemu-common.h > +++ b/include/qemu-common.h > @@ -33,22 +33,6 @@ int qemu_main(int argc, char **argv, char **envp); > void qemu_get_timedate(struct tm *tm, int offset); > int qemu_timedate_diff(struct tm *tm); > > -#define qemu_isalnum(c) isalnum((unsigned char)(c)) > -#define qemu_isalpha(c) isalpha((unsigned char)(c)) > -#define qemu_iscntrl(c) iscntrl((unsigned char)(c)) > -#define qemu_isdigit(c) isdigit((unsigned char)(c)) > -#define qemu_isgraph(c) isgraph((unsigned char)(c)) > -#define qemu_islower(c) islower((unsigned char)(c)) > -#define qemu_isprint(c) isprint((unsigned char)(c)) > -#define qemu_ispunct(c) ispunct((unsigned char)(c)) > -#define qemu_isspace(c) isspace((unsigned char)(c)) > -#define qemu_isupper(c) isupper((unsigned char)(c)) > -#define qemu_isxdigit(c) isxdigit((unsigned char)(c)) > -#define qemu_tolower(c) tolower((unsigned char)(c)) > -#define qemu_toupper(c) toupper((unsigned char)(c)) > -#define qemu_isascii(c) isascii((unsigned char)(c)) > -#define qemu_toascii(c) toascii((unsigned char)(c)) > - > void *qemu_oom_check(void *ptr); > > ssize_t qemu_write_full(int fd, const void *buf, size_t count) > diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h > index 9ee40470e3..644f2d75bd 100644 > --- a/include/qemu/cutils.h > +++ b/include/qemu/cutils.h > @@ -3,6 +3,31 @@ > > #include "qemu/fprintf-fn.h" > > +/** > + * unsigned ctype macros: > + * > + * The standards require that the argument for these functions > + * is either EOF or a value that is representable in the type > + * unsigned char. If the argument is of type char, it must be > + * cast to unsigned char. This is what these macros do, > + * avoiding 'signed to unsigned' conversion warnings. > + */ > +#define qemu_isalnum(c) isalnum((unsigned char)(c)) > +#define qemu_isalpha(c) isalpha((unsigned char)(c)) > +#define qemu_iscntrl(c) iscntrl((unsigned char)(c)) > +#define qemu_isdigit(c) isdigit((unsigned char)(c)) > +#define qemu_isgraph(c) isgraph((unsigned char)(c)) > +#define qemu_islower(c) islower((unsigned char)(c)) > +#define qemu_isprint(c) isprint((unsigned char)(c)) > +#define qemu_ispunct(c) ispunct((unsigned char)(c)) > +#define qemu_isspace(c) isspace((unsigned char)(c)) > +#define qemu_isupper(c) isupper((unsigned char)(c)) > +#define qemu_isxdigit(c)isxdigit((unsigned char)(c)) > +#define qemu_tolower(c) tolower((unsigned char)(c))
Re: [Qemu-devel] [RFC] Questions on the I/O performance of emulated host cdrom device
ping
On 2018/12/29 14:33, Ying Fang wrote:
> Hi.
> Recently one of our customer complained about the I/O performance of QEMU
> emulated host cdrom device.
> I did some investigation on it and there was still some point I could not
> figure out. So I had to ask for your help.
>
> Here is the application scenario setup by our customer.
> filename.iso/dev/sr0 /dev/cdrom
> remote client--> host(cdemu) --> Linux VM
> (1)A remote client maps an iso file to x86 host machine through network using
> tcp.
> (2)The cdemu daemon then load it as a local virtual cdrom disk drive.
> (3)A VM is launched with the virtual cdrom disk drive configured.
> The VM can make use of this virtual cdrom to install an OS in the iso file.
>
> The network bandwith btw the remote client and host is 100Mbps, we test I/O
> perf using: dd if=/dev/sr0 of=/dev/null bs=32K count=10.
> And we have
> (1) I/O perf of host side /dev/sr0 is 11MB/s;
> (2) I/O perf of /dev/cdrom inside VM is 3.8MB/s.
>
> As we can see, I/O perf of cdrom inside the VM is about 34.5% compared with
> host side.
> FlameGraph is used to find out the bottleneck of this operation and we find
> out that too much time is occupied by calling *bdrv_is_inserted*.
> Then we dig into the code and figure out that the ioctl in
> *cdrom_is_inserted* takes too much time, because it triggers
> io_schdule_timeout in kernel.
> In the code path of emulated cdrom device, each DMA I/O request consists of
> several *bdrv_is_inserted*, which degrades the I/O performance by about 31%
> in our test.
> static bool cdrom_is_inserted(BlockDriverState *bs)
> {
> BDRVRawState *s = bs->opaque;
> int ret;
>
> ret = ioctl(s->fd, CDROM_DRIVE_STATUS, CDSL_CURRENT);
> return ret == CDS_DISC_OK;
> }
> A flamegraph svg file (cdrom.svg) is attachieved in this email to show the
> code timing profile we've tested.
>
> So here is my question.
> (1) Why do we regularly check the presence of a cdrom disk drive in the code
> path? Can we do it asynchronously?
> (2) Can we drop some check point in the code path to improve the performance?
> Thanks.
>
Re: [Qemu-devel] [PATCH v4] Support u-boot noload images for arm as used by, NetBSD/evbarm GENERIC kernel.
On Sun, 6 Jan 2019, Nick Hudson wrote:
noload kernels are loaded with the u-boot image header and as a result
the header size needs adding to the entry point. Fake up a hdr so the
kernel image is loaded at the right address and the entry point is
adjusted appropriately.
The default location for the uboot file is 32MiB above bottom of DRAM.
This matches the recommendation in Documentation/arm/Booting.
Clarify the load_uimage API to state the passing of a load address when an
image doesn't specify one, or when loading a ramdisk is expected.
Adjust callers of load_uimage, etc.
---
hw/arm/boot.c | 8 +---
hw/core/loader.c | 19 ---
hw/core/uboot_image.h | 1 +
hw/microblaze/boot.c | 2 +-
hw/nios2/boot.c| 2 +-
hw/ppc/e500.c | 1 +
hw/ppc/ppc440_bamboo.c | 2 +-
hw/ppc/sam460ex.c | 2 +-
include/hw/loader.h| 7 ++-
9 files changed, 33 insertions(+), 11 deletions(-)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 94fce12802..c7a67af7a9 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -30,8 +30,9 @@
* Documentation/arm/Booting and Documentation/arm64/booting.txt
* They have different preferred image load offsets from system RAM base.
*/
-#define KERNEL_ARGS_ADDR 0x100
-#define KERNEL_LOAD_ADDR 0x0001
+#define KERNEL_ARGS_ADDR 0x100
+#define KERNEL_NOLOAD_ADDR 0x0200
+#define KERNEL_LOAD_ADDR 0x0001
#define KERNEL64_LOAD_ADDR 0x0008
#define ARM64_TEXT_OFFSET_OFFSET8
@@ -1082,7 +1083,8 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info
*info)
}
entry = elf_entry;
if (kernel_size < 0) {
-kernel_size = load_uimage_as(info->kernel_filename, &entry, NULL,
+uint64_t loadaddr = info->loader_start + KERNEL_NOLOAD_ADDR;
+kernel_size = load_uimage_as(info->kernel_filename, &entry, &loadaddr,
&is_linux, NULL, NULL, as);
}
if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && kernel_size < 0) {
diff --git a/hw/core/loader.c b/hw/core/loader.c
index fa41842280..c7182dfa64 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -613,13 +613,26 @@ static int load_uboot_image(const char *filename, hwaddr
*ep, hwaddr *loadaddr,
goto out;
if (hdr->ih_type != image_type) {
-fprintf(stderr, "Wrong image type %d, expected %d\n", hdr->ih_type,
-image_type);
-goto out;
+if (!(image_type == IH_TYPE_KERNEL &&
+hdr->ih_type == IH_TYPE_KERNEL_NOLOAD)) {
So this is now effectively
(hdr->ih_type != image_type && !(image_type == IH_TYPE_KERNEL && hdr->ih_type
== IH_TYPE_KERNEL_NOLOAD))
Maybe you don't need two if-s just one with this condition?
+fprintf(stderr, "Wrong image type %d, expected %d\n", hdr->ih_type,
+image_type);
+goto out;
+}
}
/* TODO: Implement other image types. */
switch (hdr->ih_type) {
+case IH_TYPE_KERNEL_NOLOAD:
+if (!loadaddr || *loadaddr == LOAD_UIMAGE_LOADADDR_INVALID) {
+fprintf(stderr, "this image format (kernel_noload) cannot be "
+"loaded on this machine type");
+goto out;
+}
+
+hdr->ih_load = *loadaddr + sizeof(*hdr);
+hdr->ih_ep += hdr->ih_load;
+/* fall through */
case IH_TYPE_KERNEL:
address = hdr->ih_load;
if (translate_fn) {
diff --git a/hw/core/uboot_image.h b/hw/core/uboot_image.h
index 34c11a70a6..608022de6e 100644
--- a/hw/core/uboot_image.h
+++ b/hw/core/uboot_image.h
@@ -124,6 +124,7 @@
#define IH_TYPE_SCRIPT 6 /* Script file */
#define IH_TYPE_FILESYSTEM 7 /* Filesystem Image (any type) */
#define IH_TYPE_FLATDT 8 /* Binary Flat Device Tree Blob */
+#define IH_TYPE_KERNEL_NOLOAD 14 /* OS Kernel Image (noload) */
Do we want to make this an enum like in recent U-Boot? (Not suggesting we
should just asking if you're touching this anyway.)
/*
* Compression Types
diff --git a/hw/microblaze/boot.c b/hw/microblaze/boot.c
index 35bfeda7aa..489ab839b7 100644
--- a/hw/microblaze/boot.c
+++ b/hw/microblaze/boot.c
@@ -156,7 +156,7 @@ void microblaze_load_kernel(MicroBlazeCPU *cpu, hwaddr
ddr_base,
/* If it wasn't an ELF image, try an u-boot image. */
if (kernel_size < 0) {
-hwaddr uentry, loadaddr;
+hwaddr uentry, loadaddr = LOAD_UIMAGE_LOADADDR_INVALID;
kernel_size = load_uimage(kernel_filename, &uentry, &loadaddr, 0,
NULL, NULL);
diff --git a/hw/nios2/boot.c b/hw/nios2/boot.c
index 4bb5b601d3..ed5cb28e94 100644
--- a/hw/nios2/boot.c
+++ b/hw/nios2/boot.c
@@ -161,7 +161,7 @@ void nios2_load_kernel(Nios2CPU *cpu, hwaddr ddr_base,
/* If it wasn't an ELF image, try an u-boot image. */
if (kernel_size < 0) {
-hwaddr uentry, loadaddr;
+hwaddr uentry, loadaddr = LOAD_UIMAGE_LOADADDR
Re: [Qemu-devel] [PATCH v4] Support u-boot noload images for arm as used by, NetBSD/evbarm GENERIC kernel.
Patchew URL: https://patchew.org/QEMU/d19529f5-841e-ea06-fe7d-86ccfd528...@gmail.com/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PATCH v4] Support u-boot noload images for arm as used by, NetBSD/evbarm GENERIC kernel. Type: series Message-id: d19529f5-841e-ea06-fe7d-86ccfd528...@gmail.com === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1 total=$(git log --oneline $BASE.. | wc -l) failed=0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram commits="$(git log --format=%H --reverse $BASE..)" for c in $commits; do echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..." if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then failed=1 echo fi n=$((n+1)) done exit $failed === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 Switched to a new branch 'test' e2a15da Support u-boot noload images for arm as used by, NetBSD/evbarm GENERIC kernel. === OUTPUT BEGIN === Checking PATCH 1/1: Support u-boot noload images for arm as used by, NetBSD/evbarm GENERIC kernel ERROR: code indent should never use tabs #89: FILE: hw/core/uboot_image.h:127: +#define IH_TYPE_KERNEL_NOLOAD 14^I/* OS Kernel Image (noload)^I*/$ WARNING: line over 80 characters #171: FILE: include/hw/loader.h:183: + * @loadaddr: load address if none specified in the image or when loading a ramdisk. WARNING: line over 80 characters #173: FILE: include/hw/loader.h:185: + *LOAD_UIMAGE_LOADADDR_INVALID (images which do not specify a load address ERROR: Missing Signed-off-by: line(s) total: 2 errors, 2 warnings, 111 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/d19529f5-841e-ea06-fe7d-86ccfd528...@gmail.com/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
[Qemu-devel] [PATCH 3/3] target/arm: Use vector minmax expanders for aarch32
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 33b1860148..f3f172f384 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -6368,6 +6368,25 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
tcg_gen_gvec_cmp(u ? TCG_COND_GEU : TCG_COND_GE, size,
rd_ofs, rn_ofs, rm_ofs, vec_size, vec_size);
return 0;
+
+case NEON_3R_VMAX:
+if (u) {
+tcg_gen_gvec_umax(size, rd_ofs, rn_ofs, rm_ofs,
+ vec_size, vec_size);
+} else {
+tcg_gen_gvec_smax(size, rd_ofs, rn_ofs, rm_ofs,
+ vec_size, vec_size);
+}
+return 0;
+case NEON_3R_VMIN:
+if (u) {
+tcg_gen_gvec_umin(size, rd_ofs, rn_ofs, rm_ofs,
+ vec_size, vec_size);
+} else {
+tcg_gen_gvec_smin(size, rd_ofs, rn_ofs, rm_ofs,
+ vec_size, vec_size);
+}
+return 0;
}
if (size == 3) {
@@ -6533,12 +6552,6 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
case NEON_3R_VQRSHL:
GEN_NEON_INTEGER_OP_ENV(qrshl);
break;
-case NEON_3R_VMAX:
-GEN_NEON_INTEGER_OP(max);
-break;
-case NEON_3R_VMIN:
-GEN_NEON_INTEGER_OP(min);
-break;
case NEON_3R_VABD:
GEN_NEON_INTEGER_OP(abd);
break;
--
2.17.2
[Qemu-devel] [PATCH 2/3] target/arm: Use vector minmax expanders for aarch64
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 35 ++-
1 file changed, 14 insertions(+), 21 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 2d6f8c1b4f..bef21ada71 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -10452,6 +10452,20 @@ static void disas_simd_3same_int(DisasContext *s,
uint32_t insn)
}
switch (opcode) {
+case 0x0c: /* SMAX, UMAX */
+if (u) {
+gen_gvec_fn3(s, is_q, rd, rn, rm, tcg_gen_gvec_umax, size);
+} else {
+gen_gvec_fn3(s, is_q, rd, rn, rm, tcg_gen_gvec_smax, size);
+}
+return;
+case 0x0d: /* SMIN, UMIN */
+if (u) {
+gen_gvec_fn3(s, is_q, rd, rn, rm, tcg_gen_gvec_umin, size);
+} else {
+gen_gvec_fn3(s, is_q, rd, rn, rm, tcg_gen_gvec_smin, size);
+}
+return;
case 0x10: /* ADD, SUB */
if (u) {
gen_gvec_fn3(s, is_q, rd, rn, rm, tcg_gen_gvec_sub, size);
@@ -10613,27 +10627,6 @@ static void disas_simd_3same_int(DisasContext *s,
uint32_t insn)
genenvfn = fns[size][u];
break;
}
-case 0xc: /* SMAX, UMAX */
-{
-static NeonGenTwoOpFn * const fns[3][2] = {
-{ gen_helper_neon_max_s8, gen_helper_neon_max_u8 },
-{ gen_helper_neon_max_s16, gen_helper_neon_max_u16 },
-{ tcg_gen_smax_i32, tcg_gen_umax_i32 },
-};
-genfn = fns[size][u];
-break;
-}
-
-case 0xd: /* SMIN, UMIN */
-{
-static NeonGenTwoOpFn * const fns[3][2] = {
-{ gen_helper_neon_min_s8, gen_helper_neon_min_u8 },
-{ gen_helper_neon_min_s16, gen_helper_neon_min_u16 },
-{ tcg_gen_smin_i32, tcg_gen_umin_i32 },
-};
-genfn = fns[size][u];
-break;
-}
case 0xe: /* SABD, UABD */
case 0xf: /* SABA, UABA */
{
--
2.17.2
Re: [Qemu-devel] [Bug 1701835] Re: floating-point operation bugs in qemu-alpha
On 1/7/19 8:20 AM, Bruno Haible wrote: > No, it is not fixed: even with this patch the program that fetches the > fpcr still prints 600e8000, and the various program crashes > still occur. Are you sure you rebuilt properly? The fpcr prints 680e8000 here. r~
[Qemu-devel] [PATCH 0/3] target/arm: Vector expansion improvments.
Based-on: <20190104223116.14037-1-richard.hender...@linaro.org> which is queued in my tcg-next branch. Patch 1 removes some conditionals that were added to the generic expander. The other two make use of the new min/max vector expanders. r~ Richard Henderson (3): target/arm: Rely on optimization within tcg_gen_gvec_or target/arm: Use vector minmax expanders for aarch64 target/arm: Use vector minmax expanders for aarch32 target/arm/translate-a64.c | 41 ++ target/arm/translate-sve.c | 6 +- target/arm/translate.c | 37 -- 3 files changed, 38 insertions(+), 46 deletions(-) -- 2.17.2
[Qemu-devel] [PATCH 1/3] target/arm: Rely on optimization within tcg_gen_gvec_or
Since we're now handling a == b generically, we no longer need
to do it by hand within target/arm/.
Reviewed-by: David Gibson
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 6 +-
target/arm/translate-sve.c | 6 +-
target/arm/translate.c | 12 +++-
3 files changed, 5 insertions(+), 19 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index e1da1e4d6f..2d6f8c1b4f 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -10152,11 +10152,7 @@ static void disas_simd_3same_logic(DisasContext *s,
uint32_t insn)
gen_gvec_fn3(s, is_q, rd, rn, rm, tcg_gen_gvec_andc, 0);
return;
case 2: /* ORR */
-if (rn == rm) { /* MOV */
-gen_gvec_fn2(s, is_q, rd, rn, tcg_gen_gvec_mov, 0);
-} else {
-gen_gvec_fn3(s, is_q, rd, rn, rm, tcg_gen_gvec_or, 0);
-}
+gen_gvec_fn3(s, is_q, rd, rn, rm, tcg_gen_gvec_or, 0);
return;
case 3: /* ORN */
gen_gvec_fn3(s, is_q, rd, rn, rm, tcg_gen_gvec_orc, 0);
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index b15b615ceb..3a2eb51566 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -280,11 +280,7 @@ static bool trans_AND_zzz(DisasContext *s, arg_rrr_esz *a)
static bool trans_ORR_zzz(DisasContext *s, arg_rrr_esz *a)
{
-if (a->rn == a->rm) { /* MOV */
-return do_mov_z(s, a->rd, a->rn);
-} else {
-return do_vector3_z(s, tcg_gen_gvec_or, 0, a->rd, a->rn, a->rm);
-}
+return do_vector3_z(s, tcg_gen_gvec_or, 0, a->rd, a->rn, a->rm);
}
static bool trans_EOR_zzz(DisasContext *s, arg_rrr_esz *a)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 7c4675ffd8..33b1860148 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -6294,15 +6294,9 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
tcg_gen_gvec_andc(0, rd_ofs, rn_ofs, rm_ofs,
vec_size, vec_size);
break;
-case 2:
-if (rn == rm) {
-/* VMOV */
-tcg_gen_gvec_mov(0, rd_ofs, rn_ofs, vec_size, vec_size);
-} else {
-/* VORR */
-tcg_gen_gvec_or(0, rd_ofs, rn_ofs, rm_ofs,
-vec_size, vec_size);
-}
+case 2: /* VORR */
+tcg_gen_gvec_or(0, rd_ofs, rn_ofs, rm_ofs,
+vec_size, vec_size);
break;
case 3: /* VORN */
tcg_gen_gvec_orc(0, rd_ofs, rn_ofs, rm_ofs,
--
2.17.2
[Qemu-devel] [Bug 1701835] Re: floating-point operation bugs in qemu-alpha
No, it is not fixed: even with this patch the program that fetches the fpcr still prints 600e8000, and the various program crashes still occur. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1701835 Title: floating-point operation bugs in qemu-alpha Status in QEMU: New Bug description: When running the gnulib testsuite, I'm seeing test failures in the tests for libm functions cbrt cbrtf ceil ceilf coshf exp2 exp2f floor floorf fma fmaf fmal frexp frexpf hypot hypotf hypotl ilogb ilogbf isfinite isinf isnan isnand isnanf ldexp ldexpf ldexpl log1p log1pf log2 log2f logb logbf logbl rint rintf rintl signbit sqrt sqrtf strtod that I don't see when running the same (statically linked) executables in a VM, through qemu-system-alpha. How to reproduce: - Using gnulib, run ./gnulib-tool --create-testdir --dir=../testdir-math --single-configure cbrt cbrtf ceil ceilf coshf exp2 exp2f float floor floorf fma fmaf fmal frexp frexpf hypot hypotf hypotl ilogb ilogbf isfinite isinf isnan isnand isnanf ldexp ldexpf ldexpl log1p log1pf log2 log2f logb logbf logbl math printf-frexp rint rintf rintl round roundf signbit sqrt sqrtf strtod trunc truncf - Copy the resulting directory to a VM running Linux 2.6.26 with qemu-system-alpha. - There, configure and build the package: mkdir build-native-static; cd build-native-static; ../configure CPPFLAGS="-Wall" LDFLAGS="-static"; make; make check Only 4 tests fail. - Copy the resulting binaries back to the original x86_64 machine. - Set environment variables for using qemu-alpha. - Here, 50 tests fail that did not fail originally: $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-cbrt ../../gltests/test-cbrt.h:39: assertion 'err > - L_(4.0) * L_(16.0) / TWO_MANT_DIG && err < L_(4.0) * L_(16.0) / TWO_MANT_DIG' failed Aborted (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-ceil1 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-ceil2 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-ceilf1 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-ceilf2 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-coshf ../../gltests/test-coshf.c:37: assertion 'y >= 1.1854652f && y <= 1.1854653f' failed Aborted (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-float Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-floor1 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-floor2 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-floorf1 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-floorf2 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-fma1 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-fma2 ../../gltests/test-fma2.h:116: assertion 'result == expected' failed Aborted (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-fmaf1 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-fmaf2 ../../gltests/test-fma2.h:116: assertion 'result == expected' failed Aborted (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-fmal2 ../../gltests/test-fma2.h:116: assertion 'result == expected' failed Aborted (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-frexp Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-frexpf Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-hypot Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-hypotf Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-hypotl ../../gltests/test-hypot.h:41: assertion 'z == HUGEVAL' failed Aborted (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-ilogb Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-ilogbf Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isfinite Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isinf Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isnan Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isnand-nolibm Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isnand Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isnanf-nolibm Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isnanf Floating point except
[Qemu-devel] [PATCH v4] Support u-boot noload images for arm as used by, NetBSD/evbarm GENERIC kernel.
noload kernels are loaded with the u-boot image header and as a result
the header size needs adding to the entry point. Fake up a hdr so the
kernel image is loaded at the right address and the entry point is
adjusted appropriately.
The default location for the uboot file is 32MiB above bottom of DRAM.
This matches the recommendation in Documentation/arm/Booting.
Clarify the load_uimage API to state the passing of a load address when an
image doesn't specify one, or when loading a ramdisk is expected.
Adjust callers of load_uimage, etc.
---
hw/arm/boot.c | 8 +---
hw/core/loader.c | 19 ---
hw/core/uboot_image.h | 1 +
hw/microblaze/boot.c | 2 +-
hw/nios2/boot.c| 2 +-
hw/ppc/e500.c | 1 +
hw/ppc/ppc440_bamboo.c | 2 +-
hw/ppc/sam460ex.c | 2 +-
include/hw/loader.h| 7 ++-
9 files changed, 33 insertions(+), 11 deletions(-)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 94fce12802..c7a67af7a9 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -30,8 +30,9 @@
* Documentation/arm/Booting and Documentation/arm64/booting.txt
* They have different preferred image load offsets from system RAM base.
*/
-#define KERNEL_ARGS_ADDR 0x100
-#define KERNEL_LOAD_ADDR 0x0001
+#define KERNEL_ARGS_ADDR 0x100
+#define KERNEL_NOLOAD_ADDR 0x0200
+#define KERNEL_LOAD_ADDR 0x0001
#define KERNEL64_LOAD_ADDR 0x0008
#define ARM64_TEXT_OFFSET_OFFSET8
@@ -1082,7 +1083,8 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info
*info)
}
entry = elf_entry;
if (kernel_size < 0) {
-kernel_size = load_uimage_as(info->kernel_filename, &entry, NULL,
+uint64_t loadaddr = info->loader_start + KERNEL_NOLOAD_ADDR;
+kernel_size = load_uimage_as(info->kernel_filename, &entry, &loadaddr,
&is_linux, NULL, NULL, as);
}
if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && kernel_size < 0) {
diff --git a/hw/core/loader.c b/hw/core/loader.c
index fa41842280..c7182dfa64 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -613,13 +613,26 @@ static int load_uboot_image(const char *filename, hwaddr
*ep, hwaddr *loadaddr,
goto out;
if (hdr->ih_type != image_type) {
-fprintf(stderr, "Wrong image type %d, expected %d\n", hdr->ih_type,
-image_type);
-goto out;
+if (!(image_type == IH_TYPE_KERNEL &&
+hdr->ih_type == IH_TYPE_KERNEL_NOLOAD)) {
+fprintf(stderr, "Wrong image type %d, expected %d\n", hdr->ih_type,
+image_type);
+goto out;
+}
}
/* TODO: Implement other image types. */
switch (hdr->ih_type) {
+case IH_TYPE_KERNEL_NOLOAD:
+if (!loadaddr || *loadaddr == LOAD_UIMAGE_LOADADDR_INVALID) {
+fprintf(stderr, "this image format (kernel_noload) cannot be "
+"loaded on this machine type");
+goto out;
+}
+
+hdr->ih_load = *loadaddr + sizeof(*hdr);
+hdr->ih_ep += hdr->ih_load;
+/* fall through */
case IH_TYPE_KERNEL:
address = hdr->ih_load;
if (translate_fn) {
diff --git a/hw/core/uboot_image.h b/hw/core/uboot_image.h
index 34c11a70a6..608022de6e 100644
--- a/hw/core/uboot_image.h
+++ b/hw/core/uboot_image.h
@@ -124,6 +124,7 @@
#define IH_TYPE_SCRIPT 6 /* Script file */
#define IH_TYPE_FILESYSTEM 7 /* Filesystem Image (any type) */
#define IH_TYPE_FLATDT 8 /* Binary Flat Device Tree Blob */
+#define IH_TYPE_KERNEL_NOLOAD 14 /* OS Kernel Image (noload) */
/*
* Compression Types
diff --git a/hw/microblaze/boot.c b/hw/microblaze/boot.c
index 35bfeda7aa..489ab839b7 100644
--- a/hw/microblaze/boot.c
+++ b/hw/microblaze/boot.c
@@ -156,7 +156,7 @@ void microblaze_load_kernel(MicroBlazeCPU *cpu, hwaddr
ddr_base,
/* If it wasn't an ELF image, try an u-boot image. */
if (kernel_size < 0) {
-hwaddr uentry, loadaddr;
+hwaddr uentry, loadaddr = LOAD_UIMAGE_LOADADDR_INVALID;
kernel_size = load_uimage(kernel_filename, &uentry, &loadaddr, 0,
NULL, NULL);
diff --git a/hw/nios2/boot.c b/hw/nios2/boot.c
index 4bb5b601d3..ed5cb28e94 100644
--- a/hw/nios2/boot.c
+++ b/hw/nios2/boot.c
@@ -161,7 +161,7 @@ void nios2_load_kernel(Nios2CPU *cpu, hwaddr ddr_base,
/* If it wasn't an ELF image, try an u-boot image. */
if (kernel_size < 0) {
-hwaddr uentry, loadaddr;
+hwaddr uentry, loadaddr = LOAD_UIMAGE_LOADADDR_INVALID;
kernel_size = load_uimage(kernel_filename, &uentry, &loadaddr, 0,
NULL, NULL);
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index b20fea0dfc..0581e9e3d4 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -995,6 +995,7 @@ void ppce500_init(MachineState *machine)
Re: [Qemu-devel] How to add a new target architecture
On 1/6/19 11:11 PM, Yoshinori Sato wrote: > Hello. > I written Renesas RX port. > It is works to boot linux kernel of minimal configuration. > > I'd like to merge this into the qmeu release and I need some > advice on how to proceed. > I tried reading wiki.qemu.org, but I could not find useful > information about adding subsystems. > > git repository is bellow. > git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git You'll need to produce a patch set that applies to master. The easiest way is probably to merge master, diff, and then apply the diff to a new branch. Try to split the diff into a few logical parts, e.g. target/rx/, hw/rx/, and last to enable the port in configure. The patch set should follow the CODING_STYLE. You can use ./scripts/check_patch.pl to help find coding style problems. Your patch set should modify MAINTAINERS to group all of the rx related files, and list whoever is going to maintain the port going forward, e.g. yourself. r~
Re: [Qemu-devel] [RFC PATCH] stm32f103: Add initial skeleton of STM32 F103 SoC
On Thu, Jan 03, 2019 at 01:33:08PM -0800, Alistair Francis wrote:
> On Wed, Dec 26, 2018 at 11:08 AM Priit Laes wrote:
> >
> > Initial barebone SoC implementation for STM32F103
> > with "Blue Pill" board source for testing.
> >
> > Code is based on both nrf51/microbit and stm32f205.
> >
> > Although code loads and seems to be at the right
> > addresses it does not yet run:
> >
> > ./arm-softmmu/qemu-system-arm -nographic \
> > -machine stm32bluepill \
> > -kernel \
> > libopencm3-miniblink/bin/stm32/bluepill.bin
> > QEMU 3.1.50 monitor - type 'help' for more information
> > (qemu) QEMU 3.1.50 monitor - type 'help' for more information
> > (qemu) gdbserver
> > Waiting for gdb connection on device 'tcp::1234'
> >
> > $ arm-none-eabi-gdb \
> > libopencm3-miniblink/bin/stm32/bluepill.elf
> > (gdb) target remote tcp::1234
> > Remote debugging using tcp::1234
> > blocking_handler () at ../../cm3/vector.c:103
> > 103 {
> > (gdb) bt
> > Backtrace stopped: previous frame identical to this frame (corrupt stack?)
> > (gdb) info line
> > Line 103 of "../../cm3/vector.c" starts at address 0x8000380 \
> > and ends at 0x8000382 .
> >
> > Any ideas?
>
> Have you tried running QEMU with the -d option (-d in_asm is a good
> place to start)? Does that shed any light on what is happening?
Thanks for the tips, it actually was working, but just went into
infinite loop (which is probably caused by unimplemented peripheral
register access, or something else).
Also, what helped in addition to (-d in_asm):
-S freezes CPU at startup (so one can singlestep with gdb)
-s starts gdbserver on tcp::1234
Thanks! :)
>
> Alistair
>
> >
> > Signed-off-by: Priit Laes
> > ---
> > default-configs/arm-softmmu.mak | 1 +
> > hw/arm/Makefile.objs| 1 +
> > hw/arm/stm32f103_blue_pill.c| 78
> > hw/arm/stm32f103_soc.c | 92 +
> > include/hw/arm/stm32f103_soc.h | 54 +++
> > 5 files changed, 226 insertions(+)
> > create mode 100644 hw/arm/stm32f103_blue_pill.c
> > create mode 100644 hw/arm/stm32f103_soc.c
> > create mode 100644 include/hw/arm/stm32f103_soc.h
> >
> > diff --git a/default-configs/arm-softmmu.mak
> > b/default-configs/arm-softmmu.mak
> > index 2420491aac..7a55e523e1 100644
> > --- a/default-configs/arm-softmmu.mak
> > +++ b/default-configs/arm-softmmu.mak
> > @@ -95,6 +95,7 @@ CONFIG_RASPI=y
> > CONFIG_REALVIEW=y
> > CONFIG_ZAURUS=y
> > CONFIG_ZYNQ=y
> > +CONFIG_STM32F103_SOC=y
> > CONFIG_STM32F2XX_TIMER=y
> > CONFIG_STM32F2XX_USART=y
> > CONFIG_STM32F2XX_SYSCFG=y
> > diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
> > index 50c7b4a927..7f59a9349d 100644
> > --- a/hw/arm/Makefile.objs
> > +++ b/hw/arm/Makefile.objs
> > @@ -24,6 +24,7 @@ obj-$(CONFIG_OMAP) += omap1.o omap2.o
> > obj-$(CONFIG_STRONGARM) += strongarm.o
> > obj-$(CONFIG_ALLWINNER_A10) += allwinner-a10.o cubieboard.o
> > obj-$(CONFIG_RASPI) += bcm2835_peripherals.o bcm2836.o raspi.o
> > +obj-$(CONFIG_STM32F103_SOC) += stm32f103_soc.o stm32f103_blue_pill.o
> > obj-$(CONFIG_STM32F205_SOC) += stm32f205_soc.o
> > obj-$(CONFIG_XLNX_ZYNQMP_ARM) += xlnx-zynqmp.o xlnx-zcu102.o
> > obj-$(CONFIG_XLNX_VERSAL) += xlnx-versal.o xlnx-versal-virt.o
> > diff --git a/hw/arm/stm32f103_blue_pill.c b/hw/arm/stm32f103_blue_pill.c
> > new file mode 100644
> > index 00..09dd69aa71
> > --- /dev/null
> > +++ b/hw/arm/stm32f103_blue_pill.c
> > @@ -0,0 +1,78 @@
> > +/*
> > + * STM32F103C8 Blue Pill development board Machine Model
> > + *
> > + * Copyright (c) 2018 Priit Laes
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a
> > copy
> > + * of this software and associated documentation files (the "Software"),
> > to deal
> > + * in the Software without restriction, including without limitation the
> > rights
> > + * to use, copy, modify, merge, publish, distribute, sublicense, and/or
> > sell
> > + * copies of the Software, and to permit persons to whom the Software is
> > + * furnished to do so, subject to the following conditions:
> > + *
> > + * The above copyright notice and this permission notice shall be included
> > in
> > + * all copies or substantial portions of the Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> > OR
> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > OTHER
> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > FROM,
> > + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> > IN
> > + * THE SOFTWARE.
> > + */
> > +
> > +#include "qemu/osdep.h"
> > +#include "qapi/error.h"
> > +#include "hw/boards.h"
> > +#include "hw/arm/arm.h"
> > +#include "exec/addr
[Qemu-devel] How to add a new target architecture
Hello. I written Renesas RX port. It is works to boot linux kernel of minimal configuration. I'd like to merge this into the qmeu release and I need some advice on how to proceed. I tried reading wiki.qemu.org, but I could not find useful information about adding subsystems. git repository is bellow. git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git This requires some fixes and cleanups. Thanks. -- Yosinori Sato
Re: [Qemu-devel] [PATCH v1 0/3] Upstream more RISC-V fork patches
On 1/5/19 9:23 AM, Alistair Francis wrote: > This is one of the big patches that the RISC-V fork has that we don't. > After this it should be straight forward to upstream the remaining > patches. > > Michael Clark (3): > RISC-V: Implement modular CSR helper interface > RISC-V: Implement atomic mip/sip CSR updates > RISC-V: Implement existential predicates for CSRs Reviewed-by: Richard Henderson r~
Re: [Qemu-devel] [PULL 3/3] tests: vm: auto_install OpenBSD
On Sat, Jan 5, 2019 at 9:39 PM Fam Zheng wrote:
> +self.ssh_root("shutdown -p now")
could use `halt -p` as a more direct/obvious/effective command
[Qemu-devel] [Bug 1701835] Re: floating-point operation bugs in qemu-alpha
Should be fixed by: http://lists.nongnu.org/archive/html/qemu-devel/2019-01/msg00726.html -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1701835 Title: floating-point operation bugs in qemu-alpha Status in QEMU: New Bug description: When running the gnulib testsuite, I'm seeing test failures in the tests for libm functions cbrt cbrtf ceil ceilf coshf exp2 exp2f floor floorf fma fmaf fmal frexp frexpf hypot hypotf hypotl ilogb ilogbf isfinite isinf isnan isnand isnanf ldexp ldexpf ldexpl log1p log1pf log2 log2f logb logbf logbl rint rintf rintl signbit sqrt sqrtf strtod that I don't see when running the same (statically linked) executables in a VM, through qemu-system-alpha. How to reproduce: - Using gnulib, run ./gnulib-tool --create-testdir --dir=../testdir-math --single-configure cbrt cbrtf ceil ceilf coshf exp2 exp2f float floor floorf fma fmaf fmal frexp frexpf hypot hypotf hypotl ilogb ilogbf isfinite isinf isnan isnand isnanf ldexp ldexpf ldexpl log1p log1pf log2 log2f logb logbf logbl math printf-frexp rint rintf rintl round roundf signbit sqrt sqrtf strtod trunc truncf - Copy the resulting directory to a VM running Linux 2.6.26 with qemu-system-alpha. - There, configure and build the package: mkdir build-native-static; cd build-native-static; ../configure CPPFLAGS="-Wall" LDFLAGS="-static"; make; make check Only 4 tests fail. - Copy the resulting binaries back to the original x86_64 machine. - Set environment variables for using qemu-alpha. - Here, 50 tests fail that did not fail originally: $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-cbrt ../../gltests/test-cbrt.h:39: assertion 'err > - L_(4.0) * L_(16.0) / TWO_MANT_DIG && err < L_(4.0) * L_(16.0) / TWO_MANT_DIG' failed Aborted (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-ceil1 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-ceil2 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-ceilf1 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-ceilf2 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-coshf ../../gltests/test-coshf.c:37: assertion 'y >= 1.1854652f && y <= 1.1854653f' failed Aborted (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-float Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-floor1 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-floor2 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-floorf1 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-floorf2 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-fma1 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-fma2 ../../gltests/test-fma2.h:116: assertion 'result == expected' failed Aborted (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-fmaf1 Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-fmaf2 ../../gltests/test-fma2.h:116: assertion 'result == expected' failed Aborted (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-fmal2 ../../gltests/test-fma2.h:116: assertion 'result == expected' failed Aborted (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-frexp Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-frexpf Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-hypot Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-hypotf Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-hypotl ../../gltests/test-hypot.h:41: assertion 'z == HUGEVAL' failed Aborted (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-ilogb Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-ilogbf Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isfinite Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isinf Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isnan Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isnand-nolibm Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isnand Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isnanf-nolibm Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-isnanf Floating point exception (core dumped) $ ~/inst-qemu/2.9.0/bin/qemu-alpha test-l
Re: [Qemu-devel] [PATCH v2] osdep: Make MIN/MAX evaluate arguments only once
On 1/6/19 11:38 AM, Eric Blake wrote:
> +/*
> + * Automatic type deduction, to be used as:
> + * QEMU_TYPEOF(expr) name = expr;
> + */
> +#if QEMU_GNUC_PREREQ(4, 9)
> +# define QEMU_TYPEOF(a) __auto_type
> +#else
> +# define QEMU_TYPEOF(a) typeof(a)
> +#endif
What's wrong with always using typeof? This seems like it leaves potential odd
bugs affecting gcc-4.8.
> +#undef MIN
> +#define MIN(a, b)\
> +({ \
> +QEMU_TYPEOF((a) + 0) _a = (a) + 0; \
> +QEMU_TYPEOF((b) + 0) _b = (b) + 0; \
If you're promoting the type, why don't you want to promote to the common type
between A and B? E.g.
__typeof((a) + (b)) _a = (a), _b = (b);
After all, that's what the result type of (p ? _a : _b) will be.
r~
