[PULL v2 19/73] cpu: introduce cpu_in_exclusive_context()

2019-10-24 Thread Alex Bennée
From: "Emilio G. Cota" 

Suggested-by: Alex Bennée 
Reviewed-by: Alex Bennée 
Signed-off-by: Emilio G. Cota 
[AJB: moved inside start/end_exclusive fns + cleanup]
Signed-off-by: Alex Bennée 
Reviewed-by: Richard Henderson 

diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 48272c781b7..81c33d6475d 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -238,8 +238,6 @@ void cpu_exec_step_atomic(CPUState *cpu)
 uint32_t flags;
 uint32_t cflags = 1;
 uint32_t cf_mask = cflags & CF_HASH_MASK;
-/* volatile because we modify it between setjmp and longjmp */
-volatile bool in_exclusive_region = false;
 
 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
@@ -253,7 +251,6 @@ void cpu_exec_step_atomic(CPUState *cpu)
 
 /* Since we got here, we know that parallel_cpus must be true.  */
 parallel_cpus = false;
-in_exclusive_region = true;
 cc->cpu_exec_enter(cpu);
 /* execute the generated code */
 trace_exec_tb(tb, pc);
@@ -273,7 +270,7 @@ void cpu_exec_step_atomic(CPUState *cpu)
 assert_no_pages_locked();
 }
 
-if (in_exclusive_region) {
+if (cpu_in_exclusive_context(cpu)) {
 /* We might longjump out of either the codegen or the
  * execution, so must make sure we only end the exclusive
  * region if we started it.
diff --git a/cpus-common.c b/cpus-common.c
index af3385a2968..eaf590cb387 100644
--- a/cpus-common.c
+++ b/cpus-common.c
@@ -200,11 +200,15 @@ void start_exclusive(void)
  * section until end_exclusive resets pending_cpus to 0.
  */
 qemu_mutex_unlock(&qemu_cpu_list_lock);
+
+current_cpu->in_exclusive_context = true;
 }
 
 /* Finish an exclusive operation.  */
 void end_exclusive(void)
 {
+current_cpu->in_exclusive_context = false;
+
 qemu_mutex_lock(&qemu_cpu_list_lock);
 atomic_set(&pending_cpus, 0);
 qemu_cond_broadcast(&exclusive_resume);
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 031f587e512..07f2ab05903 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -372,6 +372,7 @@ struct CPUState {
 bool unplug;
 bool crash_occurred;
 bool exit_request;
+bool in_exclusive_context;
 uint32_t cflags_next_tb;
 /* updates protected by BQL */
 uint32_t interrupt_request;
@@ -783,6 +784,18 @@ void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, 
run_on_cpu_data data)
  */
 void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func, 
run_on_cpu_data data);
 
+/**
+ * cpu_in_exclusive_context()
+ * @cpu: The vCPU to check
+ *
+ * Returns true if @cpu is an exclusive context, for example running
+ * something which has previously been queued via async_safe_run_on_cpu().
+ */
+static inline bool cpu_in_exclusive_context(const CPUState *cpu)
+{
+return cpu->in_exclusive_context;
+}
+
 /**
  * qemu_get_cpu:
  * @index: The CPUState@cpu_index value of the CPU to obtain.
-- 
2.20.1




[PULL v2 52/73] configure: add --enable-plugins

2019-10-24 Thread Alex Bennée
This adds the basic boilerplate feature enable option for the build.
We shall expand it later.

[AJB: split from larger patch]
Signed-off-by: Alex Bennée 
Reviewed-by: Richard Henderson 

diff --git a/configure b/configure
index d6fbcf45e4f..2995559ed21 100755
--- a/configure
+++ b/configure
@@ -498,6 +498,7 @@ libxml2=""
 debug_mutex="no"
 libpmem=""
 default_devices="yes"
+plugins="no"
 
 supported_cpu="no"
 supported_os="no"
@@ -1529,6 +1530,10 @@ for opt do
   ;;
   --disable-xkbcommon) xkbcommon=no
   ;;
+  --enable-plugins) plugins="yes"
+  ;;
+  --disable-plugins) plugins="no"
+  ;;
   *)
   echo "ERROR: unknown option $opt"
   echo "Try '$0 --help' for more information"
@@ -1710,6 +1715,8 @@ Advanced options (experts only):
   --enable-profilerprofiler support
   --enable-debug-stack-usage
track the maximum stack usage of stacks created by 
qemu_alloc_stack
+  --enable-plugins
+   enable plugins via shared library loading
 
 Optional features, enabled with --enable-FEATURE and
 disabled with --disable-FEATURE, default is enabled if available:
@@ -6442,6 +6449,7 @@ echo "capstone  $capstone"
 echo "libpmem support   $libpmem"
 echo "libudev   $libudev"
 echo "default devices   $default_devices"
+echo "plugin support$plugins"
 
 if test "$supported_cpu" = "no"; then
 echo
@@ -7272,6 +7280,11 @@ if test "$sheepdog" = "yes" ; then
   echo "CONFIG_SHEEPDOG=y" >> $config_host_mak
 fi
 
+if test "$plugins" = "yes" ; then
+echo "CONFIG_PLUGIN=y" >> $config_host_mak
+LIBS="-ldl $LIBS"
+fi
+
 if test "$tcg_interpreter" = "yes"; then
   QEMU_INCLUDES="-iquote \$(SRC_PATH)/tcg/tci $QEMU_INCLUDES"
 elif test "$ARCH" = "sparc64" ; then
-- 
2.20.1




[PULL v2 22/73] plugin: add user-facing API

2019-10-24 Thread Alex Bennée
From: "Emilio G. Cota" 

Add the API first to ease review.

Signed-off-by: Emilio G. Cota 
Signed-off-by: Alex Bennée 
Reviewed-by: Richard Henderson 

diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h
new file mode 100644
index 000..d9c1ca3b4cf
--- /dev/null
+++ b/include/qemu/qemu-plugin.h
@@ -0,0 +1,351 @@
+/*
+ * Copyright (C) 2017, Emilio G. Cota 
+ * Copyright (C) 2019, Linaro
+ *
+ * License: GNU GPL, version 2 or later.
+ *   See the COPYING file in the top-level directory.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#ifndef QEMU_PLUGIN_API_H
+#define QEMU_PLUGIN_API_H
+
+#include 
+#include 
+
+/*
+ * For best performance, build the plugin with -fvisibility=hidden so that
+ * QEMU_PLUGIN_LOCAL is implicit. Then, just mark qemu_plugin_install with
+ * QEMU_PLUGIN_EXPORT. For more info, see
+ *   https://gcc.gnu.org/wiki/Visibility
+ */
+#if defined _WIN32 || defined __CYGWIN__
+  #ifdef BUILDING_DLL
+#define QEMU_PLUGIN_EXPORT __declspec(dllexport)
+  #else
+#define QEMU_PLUGIN_EXPORT __declspec(dllimport)
+  #endif
+  #define QEMU_PLUGIN_LOCAL
+#else
+  #if __GNUC__ >= 4
+#define QEMU_PLUGIN_EXPORT __attribute__((visibility("default")))
+#define QEMU_PLUGIN_LOCAL  __attribute__((visibility("hidden")))
+  #else
+#define QEMU_PLUGIN_EXPORT
+#define QEMU_PLUGIN_LOCAL
+  #endif
+#endif
+
+typedef uint64_t qemu_plugin_id_t;
+
+/**
+ * qemu_plugin_install() - Install a plugin
+ * @id: this plugin's opaque ID
+ * @argc: number of arguments
+ * @argv: array of arguments (@argc elements)
+ *
+ * All plugins must export this symbol.
+ *
+ * Note: Calling qemu_plugin_uninstall() from this function is a bug. To raise
+ * an error during install, return !0.
+ *
+ * Note: @argv remains valid throughout the lifetime of the loaded plugin.
+ */
+QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id_t id, int argc,
+   char **argv);
+
+/*
+ * Prototypes for the various callback styles we will be registering
+ * in the following functions.
+ */
+typedef void (*qemu_plugin_simple_cb_t)(qemu_plugin_id_t id);
+
+typedef void (*qemu_plugin_udata_cb_t)(qemu_plugin_id_t id, void *userdata);
+
+typedef void (*qemu_plugin_vcpu_simple_cb_t)(qemu_plugin_id_t id,
+ unsigned int vcpu_index);
+
+typedef void (*qemu_plugin_vcpu_udata_cb_t)(unsigned int vcpu_index,
+void *userdata);
+
+/**
+ * qemu_plugin_uninstall() - Uninstall a plugin
+ * @id: this plugin's opaque ID
+ * @cb: callback to be called once the plugin has been removed
+ *
+ * Do NOT assume that the plugin has been uninstalled once this function
+ * returns. Plugins are uninstalled asynchronously, and therefore the given
+ * plugin receives callbacks until @cb is called.
+ *
+ * Note: Calling this function from qemu_plugin_install() is a bug.
+ */
+void qemu_plugin_uninstall(qemu_plugin_id_t id, qemu_plugin_simple_cb_t cb);
+
+/**
+ * qemu_plugin_reset() - Reset a plugin
+ * @id: this plugin's opaque ID
+ * @cb: callback to be called once the plugin has been reset
+ *
+ * Unregisters all callbacks for the plugin given by @id.
+ *
+ * Do NOT assume that the plugin has been reset once this function returns.
+ * Plugins are reset asynchronously, and therefore the given plugin receives
+ * callbacks until @cb is called.
+ */
+void qemu_plugin_reset(qemu_plugin_id_t id, qemu_plugin_simple_cb_t cb);
+
+/**
+ * qemu_plugin_register_vcpu_init_cb() - register a vCPU initialization 
callback
+ * @id: plugin ID
+ * @cb: callback function
+ *
+ * The @cb function is called every time a vCPU is initialized.
+ *
+ * See also: qemu_plugin_register_vcpu_exit_cb()
+ */
+void qemu_plugin_register_vcpu_init_cb(qemu_plugin_id_t id,
+   qemu_plugin_vcpu_simple_cb_t cb);
+
+/**
+ * qemu_plugin_register_vcpu_exit_cb() - register a vCPU exit callback
+ * @id: plugin ID
+ * @cb: callback function
+ *
+ * The @cb function is called every time a vCPU exits.
+ *
+ * See also: qemu_plugin_register_vcpu_init_cb()
+ */
+void qemu_plugin_register_vcpu_exit_cb(qemu_plugin_id_t id,
+   qemu_plugin_vcpu_simple_cb_t cb);
+
+/**
+ * qemu_plugin_register_vcpu_idle_cb() - register a vCPU idle callback
+ * @id: plugin ID
+ * @cb: callback function
+ *
+ * The @cb function is called every time a vCPU idles.
+ */
+void qemu_plugin_register_vcpu_idle_cb(qemu_plugin_id_t id,
+   qemu_plugin_vcpu_simple_cb_t cb);
+
+/**
+ * qemu_plugin_register_vcpu_resume_cb() - register a vCPU resume callback
+ * @id: plugin ID
+ * @cb: callback function
+ *
+ * The @cb function is called every time a vCPU resumes execution.
+ */
+void qemu_plugin_register_vcpu_resume_cb(qemu_plugin_id_t id,
+ qemu_plugin_vcpu_simple_cb_t cb);
+
+/*
+ * Opaque types that the plugin is given during the tran

[PULL v2 59/73] tests/plugin: add sample plugins

2019-10-24 Thread Alex Bennée
From: "Emilio G. Cota" 

Pass arguments with -plugin=libfoo.so,arg=bar,arg=baz

Signed-off-by: Emilio G. Cota 
Signed-off-by: Alex Bennée 
Reviewed-by: Richard Henderson 

diff --git a/configure b/configure
index eabe84af6ed..f77c4dc09a6 100755
--- a/configure
+++ b/configure
@@ -7903,6 +7903,7 @@ DIRS="$DIRS roms/seabios roms/vgabios"
 LINKS="Makefile"
 LINKS="$LINKS tests/tcg/lm32/Makefile po/Makefile"
 LINKS="$LINKS tests/tcg/Makefile.target tests/fp/Makefile"
+LINKS="$LINKS tests/plugin/Makefile"
 LINKS="$LINKS pc-bios/optionrom/Makefile pc-bios/keymaps"
 LINKS="$LINKS pc-bios/s390-ccw/Makefile"
 LINKS="$LINKS roms/seabios/Makefile roms/vgabios/Makefile"
diff --git a/tests/plugin/Makefile b/tests/plugin/Makefile
new file mode 100644
index 000..f9a3546ea32
--- /dev/null
+++ b/tests/plugin/Makefile
@@ -0,0 +1,28 @@
+BUILD_DIR := $(CURDIR)/../..
+
+include $(BUILD_DIR)/config-host.mak
+include $(SRC_PATH)/rules.mak
+
+$(call set-vpath, $(SRC_PATH)/tests/plugin)
+
+NAMES :=
+NAMES += bb
+NAMES += empty
+NAMES += insn
+NAMES += mem
+
+SONAMES := $(addsuffix .so,$(addprefix lib,$(NAMES)))
+
+QEMU_CFLAGS += -fPIC
+QEMU_CFLAGS += -I$(SRC_PATH)/include/qemu
+
+all: $(SONAMES)
+
+lib%.so: %.o
+   $(CC) -shared -Wl,-soname,$@ -o $@ $^ $(LDLIBS)
+
+clean:
+   rm -f *.o *.so *.d
+   rm -Rf .libs
+
+.PHONY: all clean
diff --git a/tests/plugin/bb.c b/tests/plugin/bb.c
new file mode 100644
index 000..45e1de5bd68
--- /dev/null
+++ b/tests/plugin/bb.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2018, Emilio G. Cota 
+ *
+ * License: GNU GPL, version 2 or later.
+ *   See the COPYING file in the top-level directory.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+static uint64_t bb_count;
+static uint64_t insn_count;
+static bool do_inline;
+
+static void plugin_exit(qemu_plugin_id_t id, void *p)
+{
+g_autofree gchar *out;
+out = g_strdup_printf("bb's: %" PRIu64", insns: %" PRIu64 "\n",
+  bb_count, insn_count);
+qemu_plugin_outs(out);
+}
+
+static void vcpu_tb_exec(unsigned int cpu_index, void *udata)
+{
+unsigned long n_insns = (unsigned long)udata;
+
+insn_count += n_insns;
+bb_count++;
+}
+
+static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb)
+{
+unsigned long n_insns = qemu_plugin_tb_n_insns(tb);
+
+if (do_inline) {
+qemu_plugin_register_vcpu_tb_exec_inline(tb, 
QEMU_PLUGIN_INLINE_ADD_U64,
+ &bb_count, 1);
+qemu_plugin_register_vcpu_tb_exec_inline(tb, 
QEMU_PLUGIN_INLINE_ADD_U64,
+ &insn_count, n_insns);
+} else {
+qemu_plugin_register_vcpu_tb_exec_cb(tb, vcpu_tb_exec,
+ QEMU_PLUGIN_CB_NO_REGS,
+ (void *)n_insns);
+}
+}
+
+QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id_t id,
+   const qemu_info_t *info,
+   int argc, char **argv)
+{
+if (argc && strcmp(argv[0], "inline") == 0) {
+do_inline = true;
+}
+
+qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans);
+qemu_plugin_register_atexit_cb(id, plugin_exit, NULL);
+return 0;
+}
diff --git a/tests/plugin/empty.c b/tests/plugin/empty.c
new file mode 100644
index 000..3f60f690278
--- /dev/null
+++ b/tests/plugin/empty.c
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2018, Emilio G. Cota 
+ *
+ * License: GNU GPL, version 2 or later.
+ *   See the COPYING file in the top-level directory.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+/*
+ * Empty TB translation callback.
+ * This allows us to measure the overhead of injecting and then
+ * removing empty instrumentation.
+ */
+static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb)
+{ }
+
+QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id_t id,
+   const qemu_info_t *info,
+   int argc, char **argv)
+{
+qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans);
+return 0;
+}
diff --git a/tests/plugin/insn.c b/tests/plugin/insn.c
new file mode 100644
index 000..e5fd07fb64b
--- /dev/null
+++ b/tests/plugin/insn.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2018, Emilio G. Cota 
+ *
+ * License: GNU GPL, version 2 or later.
+ *   See the COPYING file in the top-level directory.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+static uint64_t insn_count;
+static bool do_inline;
+
+static void vcpu_insn_exec_before(unsigned int cpu_index, void *udata)
+{
+insn_count++;
+}
+
+static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb)
+{
+size_t n = qemu_plugin_tb_n_insns(tb);
+size_t i;
+
+for (i = 0; i < n; i++) {
+ 

[PULL v2 54/73] plugin: expand the plugin_init function to include an info block

2019-10-24 Thread Alex Bennée
This provides a limited amount of info to plugins about the guest
system that will allow them to make some additional decisions on
setup.

Signed-off-by: Alex Bennée 

diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h
index c213d1dd19f..784f1dfc3da 100644
--- a/include/qemu/qemu-plugin.h
+++ b/include/qemu/qemu-plugin.h
@@ -38,9 +38,27 @@
 
 typedef uint64_t qemu_plugin_id_t;
 
+typedef struct {
+/* string describing architecture */
+const char *target_name;
+/* is this a full system emulation? */
+bool system_emulation;
+union {
+/*
+ * smp_vcpus may change if vCPUs can be hot-plugged, max_vcpus
+ * is the system-wide limit.
+ */
+struct {
+int smp_vcpus;
+int max_vcpus;
+} system;
+};
+} qemu_info_t;
+
 /**
  * qemu_plugin_install() - Install a plugin
  * @id: this plugin's opaque ID
+ * @info: a block describing some details about the guest
  * @argc: number of arguments
  * @argv: array of arguments (@argc elements)
  *
@@ -49,10 +67,14 @@ typedef uint64_t qemu_plugin_id_t;
  * Note: Calling qemu_plugin_uninstall() from this function is a bug. To raise
  * an error during install, return !0.
  *
+ * Note: @info is only live during the call. Copy any information we
+ * want to keep.
+ *
  * Note: @argv remains valid throughout the lifetime of the loaded plugin.
  */
-QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id_t id, int argc,
-   char **argv);
+QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id_t id,
+   const qemu_info_t *info,
+   int argc, char **argv);
 
 /*
  * Prototypes for the various callback styles we will be registering
diff --git a/plugins/loader.c b/plugins/loader.c
index eaedff577c3..ce724ed5839 100644
--- a/plugins/loader.c
+++ b/plugins/loader.c
@@ -28,6 +28,10 @@
 #include "hw/core/cpu.h"
 #include "cpu.h"
 #include "exec/exec-all.h"
+#ifndef CONFIG_USER_ONLY
+#include "hw/boards.h"
+#endif
+
 #include "plugin.h"
 
 /*
@@ -58,7 +62,7 @@ QemuOptsList qemu_plugin_opts = {
 },
 };
 
-typedef int (*qemu_plugin_install_func_t)(qemu_plugin_id_t, int, char **);
+typedef int (*qemu_plugin_install_func_t)(qemu_plugin_id_t, const qemu_info_t 
*, int, char **);
 
 extern struct qemu_plugin_state plugin;
 
@@ -145,7 +149,7 @@ static uint64_t xorshift64star(uint64_t x)
 return x * UINT64_C(2685821657736338717);
 }
 
-static int plugin_load(struct qemu_plugin_desc *desc)
+static int plugin_load(struct qemu_plugin_desc *desc, const qemu_info_t *info)
 {
 qemu_plugin_install_func_t install;
 struct qemu_plugin_ctx *ctx;
@@ -193,7 +197,7 @@ static int plugin_load(struct qemu_plugin_desc *desc)
 }
 QTAILQ_INSERT_TAIL(&plugin.ctxs, ctx, entry);
 ctx->installing = true;
-rc = install(ctx->id, desc->argc, desc->argv);
+rc = install(ctx->id, info, desc->argc, desc->argv);
 ctx->installing = false;
 if (rc) {
 error_report("%s: qemu_plugin_install returned error code %d",
@@ -241,11 +245,22 @@ static void plugin_desc_free(struct qemu_plugin_desc 
*desc)
 int qemu_plugin_load_list(QemuPluginList *head)
 {
 struct qemu_plugin_desc *desc, *next;
+g_autofree qemu_info_t *info = g_new0(qemu_info_t, 1);
+
+info->target_name = TARGET_NAME;
+#ifndef CONFIG_USER_ONLY
+MachineState *ms = MACHINE(qdev_get_machine());
+info->system_emulation = true;
+info->system.smp_vcpus = ms->smp.cpus;
+info->system.max_vcpus = ms->smp.max_cpus;
+#else
+info->system_emulation = false;
+#endif
 
 QTAILQ_FOREACH_SAFE(desc, head, entry, next) {
 int err;
 
-err = plugin_load(desc);
+err = plugin_load(desc, info);
 if (err) {
 return err;
 }
-- 
2.20.1




[PULL v2 56/73] plugin: add qemu_plugin_outs helper

2019-10-24 Thread Alex Bennée
Having the plugins grab stdout and spew stuff there is a bit ugly and
certainly makes the tests look ugly. Provide a hook back into QEMU
which can be redirected as needed.

Signed-off-by: Alex Bennée 
Reviewed-by: Aaron Lindsay 

diff --git a/include/qemu/log.h b/include/qemu/log.h
index b097a6cae11..a91105b2adc 100644
--- a/include/qemu/log.h
+++ b/include/qemu/log.h
@@ -45,6 +45,7 @@ static inline bool qemu_log_separate(void)
 /* LOG_TRACE (1 << 15) is defined in log-for-trace.h */
 #define CPU_LOG_TB_OP_IND  (1 << 16)
 #define CPU_LOG_TB_FPU (1 << 17)
+#define CPU_LOG_PLUGIN (1 << 18)
 
 /* Lock output for a series of related logs.  Since this is not needed
  * for a single qemu_log / qemu_log_mask / qemu_log_mask_and_addr, we
diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h
index ddf267fbfe0..a00a7deb461 100644
--- a/include/qemu/qemu-plugin.h
+++ b/include/qemu/qemu-plugin.h
@@ -384,4 +384,10 @@ int qemu_plugin_n_vcpus(void);
 /* returns -1 in user-mode */
 int qemu_plugin_n_max_vcpus(void);
 
+/**
+ * qemu_plugin_outs() - output string via QEMU's logging system
+ * @string: a string
+ */
+void qemu_plugin_outs(const char *string);
+
 #endif /* QEMU_PLUGIN_API_H */
diff --git a/plugins/api.c b/plugins/api.c
index 5adc4d25a1e..fa1d9f276d3 100644
--- a/plugins/api.c
+++ b/plugins/api.c
@@ -331,3 +331,11 @@ int qemu_plugin_n_max_vcpus(void)
 return get_ms()->smp.max_cpus;
 #endif
 }
+
+/*
+ * Plugin output
+ */
+void qemu_plugin_outs(const char *string)
+{
+qemu_log_mask(CPU_LOG_PLUGIN, "%s", string);
+}
diff --git a/plugins/qemu-plugins.symbols b/plugins/qemu-plugins.symbols
index 267ec381b4a..4bdb381f48e 100644
--- a/plugins/qemu-plugins.symbols
+++ b/plugins/qemu-plugins.symbols
@@ -36,4 +36,5 @@
   qemu_plugin_vcpu_for_each;
   qemu_plugin_n_vcpus;
   qemu_plugin_n_max_vcpus;
+  qemu_plugin_outs;
 };
diff --git a/util/log.c b/util/log.c
index 1d1b33f7d9f..1ca13059eef 100644
--- a/util/log.c
+++ b/util/log.c
@@ -273,6 +273,9 @@ const QEMULogItem qemu_log_items[] = {
 { CPU_LOG_TB_NOCHAIN, "nochain",
   "do not chain compiled TBs so that \"exec\" and \"cpu\" show\n"
   "complete traces" },
+#ifdef CONFIG_PLUGIN
+{ CPU_LOG_PLUGIN, "plugin", "output from TCG plugins\n"},
+#endif
 { 0, NULL, NULL },
 };
 
-- 
2.20.1




[PULL v2 65/73] tests/plugin: add a hotblocks plugin

2019-10-24 Thread Alex Bennée
This is a simple plugin to track which translation blocks are call
most often. As we don't have a view of the internals of TCG we can
only work by the address of the start of the block so we also need to
tracks how often the address is translated.

As there will be multiple blocks starting at the same address. We can
try and work around this by futzing the value to feed to the hash with
the insn count.

Signed-off-by: Alex Bennée 
Reviewed-by: Richard Henderson 

diff --git a/tests/plugin/Makefile b/tests/plugin/Makefile
index f9a3546ea32..e74940eaac5 100644
--- a/tests/plugin/Makefile
+++ b/tests/plugin/Makefile
@@ -10,6 +10,7 @@ NAMES += bb
 NAMES += empty
 NAMES += insn
 NAMES += mem
+NAMES += hotblocks
 
 SONAMES := $(addsuffix .so,$(addprefix lib,$(NAMES)))
 
diff --git a/tests/plugin/hotblocks.c b/tests/plugin/hotblocks.c
new file mode 100644
index 000..1bd183849a1
--- /dev/null
+++ b/tests/plugin/hotblocks.c
@@ -0,0 +1,143 @@
+/*
+ * Copyright (C) 2019, Alex Bennée 
+ *
+ * License: GNU GPL, version 2 or later.
+ *   See the COPYING file in the top-level directory.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+static bool do_inline;
+
+/* Plugins need to take care of their own locking */
+static GMutex lock;
+static GHashTable *hotblocks;
+static guint64 limit = 20;
+
+/*
+ * Counting Structure
+ *
+ * The internals of the TCG are not exposed to plugins so we can only
+ * get the starting PC for each block. We cheat this slightly by
+ * xor'ing the number of instructions to the hash to help
+ * differentiate.
+ */
+typedef struct {
+uint64_t start_addr;
+uint64_t exec_count;
+int  trans_count;
+unsigned long insns;
+} ExecCount;
+
+static gint cmp_exec_count(gconstpointer a, gconstpointer b)
+{
+ExecCount *ea = (ExecCount *) a;
+ExecCount *eb = (ExecCount *) b;
+return ea->exec_count > eb->exec_count ? -1 : 1;
+}
+
+static void plugin_exit(qemu_plugin_id_t id, void *p)
+{
+g_autoptr(GString) report = g_string_new("collected ");
+GList *counts, *it;
+int i;
+
+g_mutex_lock(&lock);
+g_string_append_printf(report, "%d entries in the hash table\n",
+   g_hash_table_size(hotblocks));
+counts = g_hash_table_get_values(hotblocks);
+it = g_list_sort(counts, cmp_exec_count);
+
+if (it) {
+g_string_append_printf(report, "pc, tcount, icount, ecount\n");
+
+for (i = 0; i < limit && it->next; i++, it = it->next) {
+ExecCount *rec = (ExecCount *) it->data;
+g_string_append_printf(report, "%#016"PRIx64", %d, %ld, 
%"PRId64"\n",
+   rec->start_addr, rec->trans_count,
+   rec->insns, rec->exec_count);
+}
+
+g_list_free(it);
+g_mutex_unlock(&lock);
+}
+
+qemu_plugin_outs(report->str);
+}
+
+static void plugin_init(void)
+{
+hotblocks = g_hash_table_new(NULL, g_direct_equal);
+}
+
+static void vcpu_tb_exec(unsigned int cpu_index, void *udata)
+{
+ExecCount *cnt;
+uint64_t hash = (uint64_t) udata;
+
+g_mutex_lock(&lock);
+cnt = (ExecCount *) g_hash_table_lookup(hotblocks, (gconstpointer) hash);
+/* should always succeed */
+g_assert(cnt);
+cnt->exec_count++;
+g_mutex_unlock(&lock);
+}
+
+/*
+ * When do_inline we ask the plugin to increment the counter for us.
+ * Otherwise a helper is inserted which calls the vcpu_tb_exec
+ * callback.
+ */
+static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb)
+{
+ExecCount *cnt;
+uint64_t pc = qemu_plugin_tb_vaddr(tb);
+unsigned long insns = qemu_plugin_tb_n_insns(tb);
+uint64_t hash = pc ^ insns;
+
+g_mutex_lock(&lock);
+cnt = (ExecCount *) g_hash_table_lookup(hotblocks, (gconstpointer) hash);
+if (cnt) {
+cnt->trans_count++;
+} else {
+cnt = g_new0(ExecCount, 1);
+cnt->start_addr = pc;
+cnt->trans_count = 1;
+cnt->insns = insns;
+g_hash_table_insert(hotblocks, (gpointer) hash, (gpointer) cnt);
+}
+
+g_mutex_unlock(&lock);
+
+if (do_inline) {
+qemu_plugin_register_vcpu_tb_exec_inline(tb, 
QEMU_PLUGIN_INLINE_ADD_U64,
+ &cnt->exec_count, 1);
+} else {
+qemu_plugin_register_vcpu_tb_exec_cb(tb, vcpu_tb_exec,
+ QEMU_PLUGIN_CB_NO_REGS,
+ (void *)hash);
+}
+}
+
+QEMU_PLUGIN_EXPORT
+int qemu_plugin_install(qemu_plugin_id_t id, const qemu_info_t *info,
+int argc, char **argv)
+{
+if (argc && strcmp(argv[0], "inline") == 0) {
+do_inline = true;
+}
+
+plugin_init();
+
+qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans);
+qemu_plugin_register_atexit_cb(id, plugin_exit, NULL);
+return 0;
+}
-- 
2.20.1




[PULL v2 11/73] tests/vm/netbsd: Disable IPv6

2019-10-24 Thread Alex Bennée
From: Eduardo Habkost 

Workaround for issues when the host has no IPv6 connectivity.

Signed-off-by: Eduardo Habkost 
Reviewed-by: Thomas Huth 
Message-Id: <20191018181705.17957-4-ehabk...@redhat.com>
Signed-off-by: Alex Bennée 

diff --git a/tests/vm/netbsd b/tests/vm/netbsd
index 9558a672efa..d4dd1929f2d 100755
--- a/tests/vm/netbsd
+++ b/tests/vm/netbsd
@@ -63,6 +63,13 @@ class NetBSDVM(basevm.BaseVM):
 """
 poweroff = "/sbin/poweroff"
 
+# Workaround for NetBSD + IPv6 + slirp issues.
+# NetBSD seems to ignore the ICMPv6 Destination Unreachable
+# messages generated by slirp.  When the host has no IPv6
+# connectivity, this causes every connection to ftp.NetBSD.org
+# take more than a minute to be established.
+ipv6 = False
+
 def build_image(self, img):
 cimg = self._download_with_cache(self.link, sha512sum=self.csum)
 img_tmp = img + ".tmp"
-- 
2.20.1




[PULL v2 53/73] plugin: add API symbols to qemu-plugins.symbols

2019-10-24 Thread Alex Bennée
From: "Emilio G. Cota" 

Signed-off-by: Emilio G. Cota 
[AJB: moved into plugins]
Signed-off-by: Alex Bennée 
Reviewed-by: Richard Henderson 

diff --git a/Makefile b/Makefile
index 94d25185511..bd6376d295f 100644
--- a/Makefile
+++ b/Makefile
@@ -74,6 +74,12 @@ CONFIG_ALL=y
 config-host.mak: $(SRC_PATH)/configure $(SRC_PATH)/pc-bios $(SRC_PATH)/VERSION
@echo $@ is out-of-date, running configure
@./config.status
+
+# Force configure to re-run if the API symbols are updated
+ifeq ($(CONFIG_PLUGIN),y)
+config-host.mak: $(SRC_PATH)/plugins/qemu-plugins.symbols
+endif
+
 else
 config-host.mak:
 ifneq ($(filter-out $(UNCHECKED_GOALS),$(MAKECMDGOALS)),$(if 
$(MAKECMDGOALS),,fail))
@@ -737,6 +743,7 @@ distclean: clean
rm -f qemu-doc.fn qemu-doc.fns qemu-doc.info qemu-doc.ky qemu-doc.kys
rm -f qemu-doc.log qemu-doc.pdf qemu-doc.pg qemu-doc.toc qemu-doc.tp
rm -f qemu-doc.vr qemu-doc.txt
+   rm -f qemu-plugins-ld.symbols qemu-plugins-ld64.symbols
rm -f config.log
rm -f linux-headers/asm
rm -f docs/version.texi
diff --git a/configure b/configure
index 2995559ed21..eabe84af6ed 100755
--- a/configure
+++ b/configure
@@ -30,6 +30,7 @@ TMPO="${TMPDIR1}/${TMPB}.o"
 TMPCXX="${TMPDIR1}/${TMPB}.cxx"
 TMPE="${TMPDIR1}/${TMPB}.exe"
 TMPMO="${TMPDIR1}/${TMPB}.mo"
+TMPTXT="${TMPDIR1}/${TMPB}.txt"
 
 rm -f config.log
 
@@ -5476,6 +5477,61 @@ if compile_prog "" "" ; then
   atomic64=yes
 fi
 
+#
+# See if --dynamic-list is supported by the linker
+ld_dynamic_list="no"
+if test "$static" = "no" ; then
+cat > $TMPTXT < $TMPC <
+void foo(void);
+
+void foo(void)
+{
+  printf("foo\n");
+}
+
+int main(void)
+{
+  foo();
+  return 0;
+}
+EOF
+
+if compile_prog "" "-Wl,--dynamic-list=$TMPTXT" ; then
+ld_dynamic_list="yes"
+fi
+fi
+
+#
+# See if -exported_symbols_list is supported by the linker
+
+ld_exported_symbols_list="no"
+if test "$static" = "no" ; then
+cat > $TMPTXT <> $config_host_mak
 LIBS="-ldl $LIBS"
+# Copy the export object list to the build dir
+if test "$ld_dynamic_list" = "yes" ; then
+   echo "CONFIG_HAS_LD_DYNAMIC_LIST=yes" >> $config_host_mak
+   ld_symbols=qemu-plugins-ld.symbols
+   cp "$source_path/plugins/qemu-plugins.symbols" $ld_symbols
+elif test "$ld_exported_symbols_list" = "yes" ; then
+   echo "CONFIG_HAS_LD_EXPORTED_SYMBOLS_LIST=yes" >> $config_host_mak
+   ld64_symbols=qemu-plugins-ld64.symbols
+   echo "# Automatically generated by configure - do not modify" > 
$ld64_symbols
+   grep 'qemu_' "$source_path/plugins/qemu-plugins.symbols" | sed 's/;//g' 
| \
+   sed -E 's/^[[:space:]]*(.*)/_\1/' >> $ld64_symbols
+else
+   error_exit \
+   "If \$plugins=yes, either \$ld_dynamic_list or " \
+   "\$ld_exported_symbols_list should have been set to 'yes'."
+fi
 fi
 
 if test "$tcg_interpreter" = "yes"; then
diff --git a/plugins/.gitignore b/plugins/.gitignore
new file mode 100644
index 000..7b8aaa1f109
--- /dev/null
+++ b/plugins/.gitignore
@@ -0,0 +1,2 @@
+qemu-plugins-ld.symbols
+qemu-plugins-ld64.symbols
diff --git a/plugins/Makefile.objs b/plugins/Makefile.objs
index 95baabf3d2f..6f14d91ccb9 100644
--- a/plugins/Makefile.objs
+++ b/plugins/Makefile.objs
@@ -5,3 +5,17 @@
 obj-y += loader.o
 obj-y += core.o
 obj-y += api.o
+
+# Abuse -libs suffix to only link with --dynamic-list/-exported_symbols_list
+# when the final binary includes the plugin object.
+#
+# Note that simply setting LDFLAGS is not enough: we build binaries that
+# never link plugin.o, and the linker might fail (at least ld64 does)
+# if the symbols in the list are not in the output binary.
+ifdef CONFIG_HAS_LD_DYNAMIC_LIST
+api.o-libs := -Wl,--dynamic-list=$(BUILD_DIR)/qemu-plugins-ld.symbols
+else
+ifdef CONFIG_HAS_LD_EXPORTED_SYMBOLS_LIST
+api.o-libs := -Wl,-exported_symbols_list,$(BUILD_DIR)/qemu-plugins-ld64.symbols
+endif
+endif
diff --git a/plugins/qemu-plugins.symbols b/plugins/qemu-plugins.symbols
new file mode 100644
index 000..40c0d1abd2f
--- /dev/null
+++ b/plugins/qemu-plugins.symbols
@@ -0,0 +1,38 @@
+{
+  qemu_plugin_uninstall;
+  qemu_plugin_reset;
+  qemu_plugin_register_vcpu_init_cb;
+  qemu_plugin_register_vcpu_exit_cb;
+  qemu_plugin_register_vcpu_idle_cb;
+  qemu_plugin_register_vcpu_resume_cb;
+  qemu_plugin_register_vcpu_insn_exec_cb;
+  qemu_plugin_register_vcpu_insn_exec_inline;
+  qemu_plugin_register_vcpu_mem_cb;
+  qemu_plugin_register_vcpu_mem_haddr_cb;
+  qemu_plugin_register_vcpu_mem_inline;
+  qemu_plugin_ram_addr_from_host;
+  qemu_plugin_register_vcpu_tb_trans_cb;
+  qemu_plugin_register_vcpu_tb_exec_cb;
+  qemu_plugin_register_vcpu_tb_exec_inline;
+  qemu_plugin_register_flush_cb;
+  qemu_plugin_register_vcpu_syscall_cb;
+  qemu_plugin_register_vcpu_syscall_ret_cb;
+  qemu_plugin_register_atexit_cb;
+  qemu_plugin_tb_n_insns;
+  qemu_plugin_tb_get_

[PULL v2 21/73] docs/devel: add plugins.rst design document

2019-10-24 Thread Alex Bennée
This is mostly extracted from Emilio's more verbose commit comments
with some additional verbiage from me.

Signed-off-by: Alex Bennée 
Reviewed-by: Richard Henderson 

diff --git a/docs/devel/index.rst b/docs/devel/index.rst
index 1ec61fcfed9..2ff058bae38 100644
--- a/docs/devel/index.rst
+++ b/docs/devel/index.rst
@@ -22,3 +22,4 @@ Contents:
decodetree
secure-coding-practices
tcg
+   plugins
diff --git a/docs/devel/plugins.rst b/docs/devel/plugins.rst
new file mode 100644
index 000..b18fb6729e3
--- /dev/null
+++ b/docs/devel/plugins.rst
@@ -0,0 +1,112 @@
+..
+   Copyright (C) 2017, Emilio G. Cota 
+   Copyright (c) 2019, Linaro Limited
+   Written by Emilio Cota and Alex Bennée
+
+
+QEMU TCG Plugins
+
+
+QEMU TCG plugins provide a way for users to run experiments taking
+advantage of the total system control emulation can have over a guest.
+It provides a mechanism for plugins to subscribe to events during
+translation and execution and optionally callback into the plugin
+during these events. TCG plugins are unable to change the system state
+only monitor it passively. However they can do this down to an
+individual instruction granularity including potentially subscribing
+to all load and store operations.
+
+API Stability
+=
+
+This is a new feature for QEMU and it does allow people to develop
+out-of-tree plugins that can be dynamically linked into a running QEMU
+process. However the project reserves the right to change or break the
+API should it need to do so. The best way to avoid this is to submit
+your plugin upstream so they can be updated if/when the API changes.
+
+
+Exposure of QEMU internals
+--
+
+The plugin architecture actively avoids leaking implementation details
+about how QEMU's translation works to the plugins. While there are
+conceptions such as translation time and translation blocks the
+details are opaque to plugins. The plugin is able to query select
+details of instructions and system configuration only through the
+exported *qemu_plugin* functions. The types used to describe
+instructions and events are opaque to the plugins themselves.
+
+Usage
+=
+
+The QEMU binary needs to be compiled for plugin support:
+
+::
+configure --enable-plugins
+
+Once built a program can be run with multiple plugins loaded each with
+their own arguments:
+
+::
+$QEMU $OTHER_QEMU_ARGS \
+  -plugin tests/plugin/libhowvec.so,arg=inline,arg=hint \
+  -plugin tests/plugin/libhotblocks.so
+
+Arguments are plugin specific and can be used to modify their
+behaviour. In this case the howvec plugin is being asked to use inline
+ops to count and break down the hint instructions by type.
+
+Plugin Life cycle
+=
+
+First the plugin is loaded and the public qemu_plugin_install function
+is called. The plugin will then register callbacks for various plugin
+events. Generally plugins will register a handler for the *atexit*
+if they want to dump a summary of collected information once the
+program/system has finished running.
+
+When a registered event occurs the plugin callback is invoked. The
+callbacks may provide additional information. In the case of a
+translation event the plugin has an option to enumerate the
+instructions in a block of instructions and optionally register
+callbacks to some or all instructions when they are executed.
+
+There is also a facility to add an inline event where code to
+increment a counter can be directly inlined with the translation.
+Currently only a simple increment is supported. This is not atomic so
+can miss counts. If you want absolute precision you should use a
+callback which can then ensure atomicity itself.
+
+Finally when QEMU exits all the registered *atexit* callbacks are
+invoked.
+
+Internals
+=
+
+Locking
+---
+
+We have to ensure we cannot deadlock, particularly under MTTCG. For
+this we acquire a lock when called from plugin code. We also keep the
+list of callbacks under RCU so that we do not have to hold the lock
+when calling the callbacks. This is also for performance, since some
+callbacks (e.g. memory access callbacks) might be called very
+frequently.
+
+  * A consequence of this is that we keep our own list of CPUs, so that
+we do not have to worry about locking order wrt cpu_list_lock.
+  * Use a recursive lock, since we can get registration calls from
+callbacks.
+
+As a result registering/unregistering callbacks is "slow", since it
+takes a lock. But this is very infrequent; we want performance when
+calling (or not calling) callbacks, not when registering them. Using
+RCU is great for this.
+
+We support the uninstallation of a plugin at any time (e.g. from
+plugin callbacks). This allows plugins to remove themselves if they no
+longer want to instrument the code. This operation is asynchronous
+which means callbacks may still occur after the uninstall operation is
+requested. The plugin isn't comple

[PULL v2 12/73] travis.yml: cache the clang sanitizer build

2019-10-24 Thread Alex Bennée
Hopefully we'll see the same benefits as the other builds.

Signed-off-by: Alex Bennée 
Reviewed-by: Philippe Mathieu-Daudé 

diff --git a/.travis.yml b/.travis.yml
index da6a2063fca..c43597f1331 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -189,6 +189,7 @@ matrix:
 
 - env:
 - CONFIG="--target-list=${MAIN_SOFTMMU_TARGETS} "
+- CACHE_NAME="${TRAVIS_BRANCH}-linux-clang-sanitize"
   compiler: clang
   before_script:
 - ./configure ${CONFIG} --extra-cflags="-fsanitize=undefined -Werror" 
|| { cat config.log && exit 1; }
-- 
2.20.1




[PULL v2 06/73] travis.yml: Test the release tarball

2019-10-24 Thread Alex Bennée
From: Philippe Mathieu-Daudé 

Add a job to generate the release tarball and build/install few
QEMU targets from it.

Ideally we should build the 'efi' target from the 'roms' directory,
but it is too time consuming.

This job is only triggered when a tag starting with 'v' is pushed,
which is the case with release candidate tags.

Signed-off-by: Philippe Mathieu-Daudé 
Message-Id: <20191007160450.3619-1-phi...@redhat.com>
Signed-off-by: Alex Bennée 

diff --git a/.travis.yml b/.travis.yml
index 7e0d4ad2b31..f2b679fe701 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -343,3 +343,26 @@ matrix:
 - 
CONFIG="--target-list=xtensa-softmmu,arm-softmmu,aarch64-softmmu,alpha-softmmu"
 - TEST_CMD="make -j3 check-tcg V=1"
 - CACHE_NAME="${TRAVIS_BRANCH}-linux-gcc-default"
+
+
+# Release builds
+# The make-release script expect a QEMU version, so our tag must start 
with a 'v'.
+# This is the case when release candidate tags are created.
+- if: tag IS present AND tag =~ /^v\d+\.\d+(\.\d+)?(-\S*)?$/
+  env:
+# We want to build from the release tarball
+- BUILD_DIR="release/build/dir" SRC_DIR="../../.."
+- BASE_CONFIG="--prefix=$PWD/dist"
+- 
CONFIG="--target-list=x86_64-softmmu,aarch64-softmmu,armeb-linux-user,ppc-linux-user"
+- TEST_CMD="make install -j3"
+- QEMU_VERSION="${TRAVIS_TAG:1}"
+- CACHE_NAME="${TRAVIS_BRANCH}-linux-gcc-default"
+  before_script:
+- command -v ccache && ccache --zero-stats
+- mkdir -p ${BUILD_DIR} && cd ${BUILD_DIR}
+  script:
+- make -C ${SRC_DIR} qemu-${QEMU_VERSION}.tar.bz2
+- ls -l ${SRC_DIR}/qemu-${QEMU_VERSION}.tar.bz2
+- tar -xf ${SRC_DIR}/qemu-${QEMU_VERSION}.tar.bz2 && cd 
qemu-${QEMU_VERSION}
+- ./configure ${BASE_CONFIG} ${CONFIG} || { cat config.log && exit 1; }
+- make install
-- 
2.20.1




[PULL v2 09/73] tests/vm: netbsd autoinstall, using serial console

2019-10-24 Thread Alex Bennée
From: Gerd Hoffmann 

Instead of fetching the prebuilt image from patchew download the install
iso and prepare the image locally.  Install to disk, using the serial
console.  Create qemu user, configure ssh login.  Install packages
needed for qemu builds.

Signed-off-by: Gerd Hoffmann 
Reviewed-by: Kamil Rytarowski 
Tested-by: Thomas Huth 
[ehabkost: rebased to latest qemu.git master]
Signed-off-by: Eduardo Habkost 
Message-Id: <20191018181705.17957-2-ehabk...@redhat.com>
[AJB: add sha512sum, rm path check]
Signed-off-by: Alex Bennée 

diff --git a/tests/vm/basevm.py b/tests/vm/basevm.py
index b5d1479bee9..4921e47f9f2 100755
--- a/tests/vm/basevm.py
+++ b/tests/vm/basevm.py
@@ -92,19 +92,25 @@ class BaseVM(object):
 logging.info("KVM not available, not using -enable-kvm")
 self._data_args = []
 
-def _download_with_cache(self, url, sha256sum=None):
+def _download_with_cache(self, url, sha256sum=None, sha512sum=None):
 def check_sha256sum(fname):
 if not sha256sum:
 return True
 checksum = subprocess.check_output(["sha256sum", fname]).split()[0]
 return sha256sum == checksum.decode("utf-8")
 
+def check_sha512sum(fname):
+if not sha512sum:
+return True
+checksum = subprocess.check_output(["sha512sum", fname]).split()[0]
+return sha512sum == checksum.decode("utf-8")
+
 cache_dir = os.path.expanduser("~/.cache/qemu-vm/download")
 if not os.path.exists(cache_dir):
 os.makedirs(cache_dir)
 fname = os.path.join(cache_dir,
  hashlib.sha1(url.encode("utf-8")).hexdigest())
-if os.path.exists(fname) and check_sha256sum(fname):
+if os.path.exists(fname) and check_sha256sum(fname) and 
check_sha512sum(fname):
 return fname
 logging.debug("Downloading %s to %s...", url, fname)
 subprocess.check_call(["wget", "-c", url, "-O", fname + ".download"],
diff --git a/tests/vm/netbsd b/tests/vm/netbsd
index ee9eaeab504..9558a672efa 100755
--- a/tests/vm/netbsd
+++ b/tests/vm/netbsd
@@ -2,10 +2,11 @@
 #
 # NetBSD VM image
 #
-# Copyright 2017 Red Hat Inc.
+# Copyright 2017-2019 Red Hat Inc.
 #
 # Authors:
 #  Fam Zheng 
+#  Gerd Hoffmann 
 #
 # This code is licensed under the GPL version 2 or later.  See
 # the COPYING file in the top-level directory.
@@ -13,30 +14,197 @@
 
 import os
 import sys
+import time
 import subprocess
 import basevm
 
 class NetBSDVM(basevm.BaseVM):
 name = "netbsd"
 arch = "x86_64"
+
+link = 
"https://cdn.netbsd.org/pub/NetBSD/NetBSD-8.1/images/NetBSD-8.1-amd64.iso";
+csum = 
"718f275b7e0879599bdac95630c5e3f2184700032fdb6cdebf3bdd63687898c48ff3f08f57b89f4437a86cdd8ea07c01a39d432dbb37e1e4b008f4985f98da3f"
+size = "20G"
+pkgs = [
+# tools
+"git-base",
+"pkgconf",
+"xz",
+"python37",
+
+# gnu tools
+"bash",
+"gmake",
+"gsed",
+"flex", "bison",
+
+# libs: crypto
+"gnutls",
+
+# libs: images
+"jpeg",
+"png",
+
+   # libs: ui
+"SDL2",
+"gtk3+",
+"libxkbcommon",
+]
+
 BUILD_SCRIPT = """
 set -e;
-rm -rf /var/tmp/qemu-test.*
-cd $(mktemp -d /var/tmp/qemu-test.XX);
+rm -rf /home/qemu/qemu-test.*
+cd $(mktemp -d /home/qemu/qemu-test.XX);
+mkdir src build; cd src;
 tar -xf /dev/rld1a;
-./configure --python=python2.7 {configure_opts};
+cd ../build
+../src/configure --python=python3.7 --disable-opengl {configure_opts};
 gmake --output-sync -j{jobs} {target} {verbose};
 """
+poweroff = "/sbin/poweroff"
 
 def build_image(self, img):
-cimg = 
self._download_with_cache("http://download.patchew.org/netbsd-7.1-amd64.img.xz";,
- 
sha256sum='b633d565b0eac3d02015cd0c81440bd8a7a8df8512615ac1ee05d318be015732')
-img_tmp_xz = img + ".tmp.xz"
+cimg = self._download_with_cache(self.link, sha512sum=self.csum)
 img_tmp = img + ".tmp"
-sys.stderr.write("Extracting the image...\n")
-subprocess.check_call(["ln", "-f", cimg, img_tmp_xz])
-subprocess.check_call(["xz", "--keep", "-dvf", img_tmp_xz])
+iso = img + ".install.iso"
+
+self.print_step("Preparing iso and disk image")
+subprocess.check_call(["ln", "-f", cimg, iso])
+subprocess.check_call(["qemu-img", "create", "-f", "qcow2",
+   img_tmp, self.size])
+
+self.print_step("Booting installer")
+self.boot(img_tmp, extra_args = [
+"-bios", "pc-bios/bios-256k.bin",
+"-machine", "graphics=off",
+"-cdrom", iso
+])
+self.console_init()
+self.console_wait("Primary Bootstrap")
+
+# serial console boot menu output doesn't

[PULL v2 13/73] gitlab-ci.yml: Use libvdeplug-dev to compile-test the VDE network backend

2019-10-24 Thread Alex Bennée
From: Thomas Huth 

The libvdeplug-dev package is required to compile-test net/vde.c.

Signed-off-by: Thomas Huth 
Message-Id: <20191016131002.29663-1-th...@redhat.com>
Signed-off-by: Alex Bennée 

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index ed8067f5cf9..be57c6a454a 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -5,7 +5,7 @@ before_script:
 build-system1:
  script:
  - apt-get install -y -qq libgtk-3-dev libvte-dev nettle-dev libcacard-dev
-  libusb-dev libvde-dev libspice-protocol-dev libgl1-mesa-dev
+  libusb-dev libvde-dev libspice-protocol-dev libgl1-mesa-dev 
libvdeplug-dev
  - ./configure --enable-werror --target-list="aarch64-softmmu alpha-softmmu
   cris-softmmu hppa-softmmu lm32-softmmu moxie-softmmu microblazeel-softmmu
   mips64el-softmmu m68k-softmmu ppc-softmmu riscv64-softmmu sparc-softmmu"
-- 
2.20.1




[PULL v2 00/73] tcg plugins and testing updates

2019-10-24 Thread Alex Bennée
The following changes since commit 81c1f71eeb874c4cbbb9c5c4d1a1dc0ba7391dff:

  Merge remote-tracking branch 
'remotes/ehabkost/tags/machine-next-pull-request' into staging (2019-10-24 
10:43:20 +0100)

are available in the Git repository at:

  https://github.com/stsquad/qemu.git tags/pull-testing-and-plugins-241019-2

for you to fetch changes up to 18900c2d7901680457b51b3ad3f684ef9cba8b64:

  travis.yml: enable linux-gcc-debug-tcg cache (2019-10-24 22:31:29 +0100)


Core TCG plugin support and testing updates

  - TCG plugin support
  - netbsd VM autoinstall
  - various Travis dependency updates
  - enable tcg debug for check-tcg
  - additional Xcode build for Cirrus
  - dependency tweak for gitlab


Alex Bennée (30):
  travis.yml: reduce scope of the --enable-debug build
  travis.yml: bump Xcode 10 to latest dot release
  cirrus.yml: add latest Xcode build target
  travis.yml: cache the clang sanitizer build
  travis.yml: --enable-debug-tcg to check-tcg
  tests/docker: set HOST_ARCH if we don't have ARCH
  tests/docker: update Travis image to a more current version
  trace: add mmu_index to mem_info
  docs/devel: add plugins.rst design document
  plugin: add implementation of the api
  plugins: implement helpers for resolving hwaddr
  cputlb: ensure _cmmu helper functions follow the naming standard
  configure: add --enable-plugins
  plugin: expand the plugin_init function to include an info block
  plugin: add qemu_plugin_insn_disas helper
  plugin: add qemu_plugin_outs helper
  tests/tcg/Makefile.target: fix path to config-host.mak
  tests/tcg: set QEMU_OPTS for all cris runs
  tests/tcg: move "virtual" tests to EXTRA_TESTS
  tests/tcg: drop test-i386-fprem from TESTS when not SLOW
  tests/tcg: enable plugin testing
  tests/plugin: add a hotblocks plugin
  tests/plugin: add instruction execution breakdown
  tests/plugin: add hotpages to analyse memory access patterns
  accel/stubs: reduce headers from tcg-stub
  include/exec: wrap cpu_ldst.h in CONFIG_TCG
  .travis.yml: add --enable-plugins tests
  scripts/checkpatch.pl: don't complain about (foo, /* empty */)
  MAINTAINERS: add me for the TCG plugins code
  travis.yml: enable linux-gcc-debug-tcg cache

Eduardo Habkost (2):
  tests/vm: Let subclasses disable IPv6
  tests/vm/netbsd: Disable IPv6

Emilio G. Cota (32):
  trace: expand mem_info:size_shift to 4 bits
  cpu: introduce cpu_in_exclusive_context()
  translate-all: use cpu_in_exclusive_work_context() in tb_flush
  plugin: add user-facing API
  plugin: add core code
  queue: add QTAILQ_REMOVE_SEVERAL
  cputlb: document get_page_addr_code
  cputlb: introduce get_page_addr_code_hostp
  tcg: add tcg_gen_st_ptr
  plugin-gen: add module for TCG-related code
  atomic_template: add inline trace/plugin helpers
  tcg: let plugins instrument virtual memory accesses
  translate-all: notify plugin code of tb_flush
  *-user: notify plugin of exit
  *-user: plugin syscalls
  cpu: hook plugin vcpu events
  plugin-gen: add plugin_insn_append
  translator: add translator_ld{ub,sw,uw,l,q}
  target/arm: fetch code with translator_ld
  target/ppc: fetch code with translator_ld
  target/sh4: fetch code with translator_ld
  target/i386: fetch code with translator_ld
  target/hppa: fetch code with translator_ld
  target/m68k: fetch code with translator_ld
  target/alpha: fetch code with translator_ld
  target/riscv: fetch code with translator_ld
  target/sparc: fetch code with translator_ld
  target/xtensa: fetch code with translator_ld
  target/openrisc: fetch code with translator_ld
  translator: inject instrumentation from plugins
  plugin: add API symbols to qemu-plugins.symbols
  tests/plugin: add sample plugins

Gerd Hoffmann (1):
  tests/vm: netbsd autoinstall, using serial console

Lluís Vilanova (2):
  vl: support -plugin option
  linux-user: support -plugin option

Philippe Mathieu-Daudé (1):
  travis.yml: Test the release tarball

Thomas Huth (5):
  travis.yml: Add libvdeplug-dev to compile-test net/vde.c
  travis.yml: Use libsdl2 instead of libsdl1.2, and install libsdl2-image
  travis.yml: Use newer version of libgnutls and libpng
  travis.yml: Fix the ccache lines
  gitlab-ci.yml: Use libvdeplug-dev to compile-test the VDE network backend

 .cirrus.yml   |  11 +
 .gitlab-ci.yml|   2 +-
 .shippable.yml|   2 -
 .travis.yml   |  69 ++-
 MAINTAINERS   |   6 +
 Makefile  |  16 +-
 Makefile.target   |   2 +

[PULL v2 08/73] cirrus.yml: add latest Xcode build target

2019-10-24 Thread Alex Bennée
CirrusCI provides a mojave-xcode alias for the latest Xcode available.
Let's use it to make sure we track the latest releases.

Signed-off-by: Alex Bennée 

diff --git a/.cirrus.yml b/.cirrus.yml
index 8326a3a4b16..27efc48619b 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -25,3 +25,14 @@ macos_task:
 - ./configure --python=/usr/local/bin/python3 || { cat config.log; exit 1; 
}
 - gmake -j$(sysctl -n hw.ncpu)
 - gmake check -j$(sysctl -n hw.ncpu)
+
+macos_xcode_task:
+  osx_instance:
+# this is an alias for the latest Xcode
+image: mojave-xcode
+  install_script:
+- brew install pkg-config gnu-sed glib pixman make sdl2
+  script:
+- ./configure --cc=clang || { cat config.log; exit 1; }
+- gmake -j$(sysctl -n hw.ncpu)
+- gmake check -j$(sysctl -n hw.ncpu)
-- 
2.20.1




[PULL v2 01/73] travis.yml: reduce scope of the --enable-debug build

2019-10-24 Thread Alex Bennée
Adding debug makes things run a bit slower so lets not hammer all the
targets.

Signed-off-by: Alex Bennée 
Reviewed-by: Philippe Mathieu-Daudé 

diff --git a/.travis.yml b/.travis.yml
index d0b9e099b9c..7d90b87540f 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -124,12 +124,13 @@ matrix:
 - CACHE_NAME="${TRAVIS_BRANCH}-linux-gcc-default"
 
 
+# --enable-debug implies --enable-debug-tcg, also runs quite a bit slower
 - env:
-- CONFIG="--enable-debug --enable-debug-tcg --disable-user"
+- CONFIG="--enable-debug --target-list=${MAIN_SOFTMMU_TARGETS}"
 - CACHE_NAME="${TRAVIS_BRANCH}-linux-gcc-debug"
 
 
-# TCG debug can be run just on it's own and is mostly agnostic to 
user/softmmu distinctions
+# TCG debug can be run just on its own and is mostly agnostic to 
user/softmmu distinctions
 - env:
 - CONFIG="--enable-debug-tcg --disable-system"
 - CACHE_NAME="${TRAVIS_BRANCH}-linux-gcc-debug"
-- 
2.20.1




[PULL v2 03/73] travis.yml: Use libsdl2 instead of libsdl1.2, and install libsdl2-image

2019-10-24 Thread Alex Bennée
From: Thomas Huth 

We've removed support for SDL 1.2 quite a while ago already, so let's
use SDL 2 now in Travis to get test coverage for SDL again.
And while we're at it, also add libsdl2-image-dev which can be used
by QEMU nowadays, too.

Signed-off-by: Thomas Huth 
Message-Id: <20191009170701.14756-3-th...@redhat.com>
Signed-off-by: Alex Bennée 

diff --git a/.travis.yml b/.travis.yml
index 7be2a9949f5..b446e04e8ae 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -39,7 +39,8 @@ addons:
   - libpixman-1-dev
   - libpng12-dev
   - librados-dev
-  - libsdl1.2-dev
+  - libsdl2-dev
+  - libsdl2-image-dev
   - libseccomp-dev
   - libspice-protocol-dev
   - libspice-server-dev
@@ -309,7 +310,8 @@ matrix:
 - libpixman-1-dev
 - libpng12-dev
 - librados-dev
-- libsdl1.2-dev
+- libsdl2-dev
+- libsdl2-image-dev
 - libseccomp-dev
 - libspice-protocol-dev
 - libspice-server-dev
-- 
2.20.1




[PULL v2 07/73] travis.yml: bump Xcode 10 to latest dot release

2019-10-24 Thread Alex Bennée
According to:

  https://docs.travis-ci.com/user/reference/osx/#macos-version

we have 10.3 available so lets use it. I don't know what Apple's
deprecation policy is for Xcode because it requires an AppleID to find
out.

Signed-off-by: Alex Bennée 
Reviewed-by: Philippe Mathieu-Daudé 

diff --git a/.travis.yml b/.travis.yml
index f2b679fe701..da6a2063fca 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -247,7 +247,7 @@ matrix:
 - env:
 - 
CONFIG="--target-list=i386-softmmu,ppc-softmmu,ppc64-softmmu,m68k-softmmu,x86_64-softmmu"
   os: osx
-  osx_image: xcode10.2
+  osx_image: xcode10.3
   compiler: clang
 
 
-- 
2.20.1




[PULL v2 10/73] tests/vm: Let subclasses disable IPv6

2019-10-24 Thread Alex Bennée
From: Eduardo Habkost 

The mechanism will be used to work around issues related to IPv6
on the netbsd image builder.

Signed-off-by: Eduardo Habkost 
Reviewed-by: Thomas Huth 
Reviewed-by: Philippe Mathieu-Daudé 
Message-Id: <20191018181705.17957-3-ehabk...@redhat.com>
Signed-off-by: Alex Bennée 

diff --git a/tests/vm/basevm.py b/tests/vm/basevm.py
index 4921e47f9f2..59bd1d31fbe 100755
--- a/tests/vm/basevm.py
+++ b/tests/vm/basevm.py
@@ -57,6 +57,8 @@ class BaseVM(object):
 arch = "#arch"
 # command to halt the guest, can be overridden by subclasses
 poweroff = "poweroff"
+# enable IPv6 networking
+ipv6 = True
 def __init__(self, debug=False, vcpus=None):
 self._guest = None
 self._tmpdir = os.path.realpath(tempfile.mkdtemp(prefix="vm-test-",
@@ -81,7 +83,8 @@ class BaseVM(object):
 self._args = [ \
 "-nodefaults", "-m", "4G",
 "-cpu", "max",
-"-netdev", "user,id=vnet,hostfwd=:127.0.0.1:0-:22",
+"-netdev", "user,id=vnet,hostfwd=:127.0.0.1:0-:22" +
+   (",ipv6=no" if not self.ipv6 else ""),
 "-device", "virtio-net-pci,netdev=vnet",
 "-vnc", "127.0.0.1:0,to=20"]
 if vcpus and vcpus > 1:
-- 
2.20.1




Re: [PATCH 7/7] cpu: Add `machine` parameter to query-cpu-definitions

2019-10-24 Thread Markus Armbruster
Eduardo Habkost  writes:

> The new parameter can be used by management software to query for
> CPU model alias information for multiple machines without
> restarting QEMU.
>
> Signed-off-by: Eduardo Habkost 
> ---
>  qapi/machine-target.json   | 14 +++-
>  target/arm/helper.c|  4 ++-
>  target/i386/cpu.c  | 16 +++--
>  target/mips/helper.c   |  4 ++-
>  target/ppc/translate_init.inc.c|  4 ++-
>  target/s390x/cpu_models.c  |  4 ++-
>  tests/acceptance/x86_cpu_model_versions.py | 42 ++
>  7 files changed, 81 insertions(+), 7 deletions(-)
>
> diff --git a/qapi/machine-target.json b/qapi/machine-target.json
> index 55310a6aa2..7bff3811fe 100644
> --- a/qapi/machine-target.json
> +++ b/qapi/machine-target.json
> @@ -281,6 +281,10 @@

This is CpuDefinitionInfo.

>  #
>  # @alias-of: Name of CPU model this model is an alias for.  The target of the
>  #CPU model alias may change depending on the machine type.
> +#If the @machine argument was provided to query-cpu-definitions,
> +#alias information that machine type will be returned.

"for that machine type"

> +#If @machine is not provided, alias information for
> +#the current machine will be returned.
>  #Management software is supposed to translate CPU model aliases
>  #in the VM configuration, because aliases may stop being
>  #migration-safe in the future (since 4.1)
> @@ -317,9 +321,17 @@
   ##
   # @query-cpu-definitions:
>  #
>  # Return a list of supported virtual CPU definitions
>  #
> +# @machine: Name of machine type.  The command returns some data
> +#   that machine-specific.  This overrides the machine type

"that is machine-specific"

> +#   used to look up that information.  This can be used,
> +#   for example, to query machine-specific CPU model aliases
> +#   without restarting QEMU (since 4.2)
> +#
>  # Returns: a list of CpuDefInfo
>  #
>  # Since: 1.2.0
>  ##
> -{ 'command': 'query-cpu-definitions', 'returns': ['CpuDefinitionInfo'],
> +{ 'command': 'query-cpu-definitions',
> +  'data': { '*machine': 'str' },
> +  'returns': ['CpuDefinitionInfo'],
>'if': 'defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_I386) 
> || defined(TARGET_S390X) || defined(TARGET_MIPS)' }

I'm afraid the doc comment is less than clear.  Before I can suggest
improvements, I have questions.

Looks like @alias-of is the only part of the return value that changes
when I re-run query-cpu-definitions with another @machine argument.
Correct?

How is this going to be used?  Will management software run
query-cpu-definitions for each machine type returned by query-machines?
Or just for a few of them?

> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 0d9a2d2ab7..96f9fe7fff 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -6965,7 +6965,9 @@ static void arm_cpu_add_definition(gpointer data, 
> gpointer user_data)
>  *cpu_list = entry;
>  }
>  
> -CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
> +CpuDefinitionInfoList *qmp_query_cpu_definitions(bool has_machine,
> + const char *machine,
> + Error **errp)
>  {
>  CpuDefinitionInfoList *cpu_list = NULL;
>  GSList *list;
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 67d1eca4ed..ae633793ed 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -4078,11 +4078,23 @@ static void x86_cpu_definition_entry(gpointer data, 
> gpointer user_data)
>  args->cpu_list = entry;
>  }
>  
> -CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
> +CpuDefinitionInfoList *qmp_query_cpu_definitions(bool has_machine,
> + const char *machine,
> + Error **errp)
>  {
>  X86CPUDefinitionArgs args = { .cpu_list = NULL };
>  GSList *list;
> -MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
> +MachineClass *mc;
> +
> +if (!has_machine) {
> +mc = MACHINE_GET_CLASS(qdev_get_machine());
> +} else {
> +mc = machine_find_class(machine);
> +if (!mc) {
> +error_setg(errp, "Machine type '%s' not found", machine);
> +return NULL;
> +}
> +}
>  
>  args.default_version = default_cpu_version_for_machine(mc);
>  list = get_sorted_cpu_model_list();
> diff --git a/target/mips/helper.c b/target/mips/helper.c
> index a2b6459b05..a73c767462 100644
> --- a/target/mips/helper.c
> +++ b/target/mips/helper.c
> @@ -1481,7 +1481,9 @@ static void mips_cpu_add_definition(gpointer data, 
> gpointer user_data)
>  *cpu_list = entry;
>  }
>  
> -CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
> +CpuDefiniti

[PULL v2 04/73] travis.yml: Use newer version of libgnutls and libpng

2019-10-24 Thread Alex Bennée
From: Thomas Huth 

libgnutls-dev and libpng12-dev are not available in newer versions
of Ubuntu anymore, so installing these packages fails e.g. in the
new arm64 containers on Travis. Let's use newer versions of these
packages by default instead. (The old versions still get tested in
the "gcc-9" build).

Signed-off-by: Thomas Huth 
Message-Id: <20191009170701.14756-4-th...@redhat.com>
Signed-off-by: Alex Bennée 

diff --git a/.travis.yml b/.travis.yml
index b446e04e8ae..e65e53f3d7e 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -29,7 +29,7 @@ addons:
   - libcap-dev
   - libcap-ng-dev
   - libgcc-4.8-dev
-  - libgnutls-dev
+  - libgnutls28-dev
   - libgtk-3-dev
   - libiscsi-dev
   - liblttng-ust-dev
@@ -37,7 +37,7 @@ addons:
   - libnfs-dev
   - libnss3-dev
   - libpixman-1-dev
-  - libpng12-dev
+  - libpng-dev
   - librados-dev
   - libsdl2-dev
   - libsdl2-image-dev
-- 
2.20.1




[PULL v2 02/73] travis.yml: Add libvdeplug-dev to compile-test net/vde.c

2019-10-24 Thread Alex Bennée
From: Thomas Huth 

This library is needed to compile the VDE network backend.

Signed-off-by: Thomas Huth 
Message-Id: <20191009170701.14756-2-th...@redhat.com>
Signed-off-by: Alex Bennée 
Reviewed-by: Philippe Mathieu-Daudé 

diff --git a/.travis.yml b/.travis.yml
index 7d90b87540f..7be2a9949f5 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -46,6 +46,7 @@ addons:
   - libssh-dev
   - liburcu-dev
   - libusb-1.0-0-dev
+  - libvdeplug-dev
   - libvte-2.91-dev
   - sparse
   - uuid-dev
-- 
2.20.1




[PULL v2 05/73] travis.yml: Fix the ccache lines

2019-10-24 Thread Alex Bennée
From: Thomas Huth 

The "command -v ccache && ccache ..." likely were supposed to test
the availability of ccache before running the program. But this
shell construct causes Travis to abort if ccache is not available.
Use an if-statement instead to fix this problem.

Signed-off-by: Thomas Huth 
Reviewed-by: Philippe Mathieu-Daudé 
Tested-by: Philippe Mathieu-Daudé 
Message-Id: <20191009170701.14756-5-th...@redhat.com>
Signed-off-by: Alex Bennée 

diff --git a/.travis.yml b/.travis.yml
index e65e53f3d7e..7e0d4ad2b31 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -91,13 +91,13 @@ git:
 
 before_script:
   - if [ "$TRAVIS_OS_NAME" == "osx" ] ; then export 
PATH="/usr/local/opt/ccache/libexec:$PATH" ; fi
-  - command -v ccache && ccache --zero-stats
+  - if command -v ccache ; then ccache --zero-stats ; fi
   - mkdir -p ${BUILD_DIR} && cd ${BUILD_DIR}
   - ${SRC_DIR}/configure ${BASE_CONFIG} ${CONFIG} || { cat config.log && exit 
1; }
 script:
   - make -j3 && travis_retry ${TEST_CMD}
 after_script:
-  - command -v ccache && ccache --show-stats
+  - if command -v ccache ; then ccache --show-stats ; fi
 
 
 matrix:
-- 
2.20.1




Re: [PATCH v13 06/12] numa: Extend CLI to provide memory latency and bandwidth information

2019-10-24 Thread Tao Xu

On 10/23/2019 11:28 PM, Igor Mammedov wrote:

On Sun, 20 Oct 2019 19:11:19 +0800
Tao Xu  wrote:

[...]

+#
+# @access-bandwidth: access bandwidth (MB/s)
+#
+# @read-bandwidth: read bandwidth (MB/s)
+#
+# @write-bandwidth: write bandwidth (MB/s)

I think units here are not appropriate, values stored in fields are
minimal base units only and nothing else (i.e. ps and B/s)

Eric suggest me to drop picoseconds. So here I can use ns. For 
bandwidth, if we use B/s here, does it let user or developer to 
misunderstand that the smallest unit is B/s ?



  @item -numa 
node[,mem=@var{size}][,cpus=@var{firstcpu}[-@var{lastcpu}]][,nodeid=@var{node}][,initiator=@var{initiator}]
  @itemx -numa 
node[,memdev=@var{id}][,cpus=@var{firstcpu}[-@var{lastcpu}]][,nodeid=@var{node}][,initiator=@var{initiator}]
  @itemx -numa dist,src=@var{source},dst=@var{destination},val=@var{distance}
  @itemx -numa 
cpu,node-id=@var{node}[,socket-id=@var{x}][,core-id=@var{y}][,thread-id=@var{z}]
+@itemx -numa 
hmat-lb,initiator=@var{node},target=@var{node},hierarchy=@var{str},data-type=@var{str}[,latency=@var{lat}][,bandwidth=@var{bw}]

   
^^^ ^^^
Using the same 'str' for 2 different enums is confusing.
Suggest for 1st use 'level' and for the second just 'type'


Ok


  @findex -numa
  Define a NUMA node and assign RAM and VCPUs to it.
  Set the NUMA distance from a source node to a destination node.
+Set the ACPI Heterogeneous Memory Attributes for the given nodes.
  
  Legacy VCPU assignment uses @samp{cpus} option where

  @var{firstcpu} and @var{lastcpu} are CPU indexes. Each
@@ -256,6 +259,50 @@ specified resources, it just assigns existing resources to 
NUMA
  nodes. This means that one still has to use the @option{-m},
  @option{-smp} options to allocate RAM and VCPUs respectively.
  
+Use @samp{hmat-lb} to set System Locality Latency and Bandwidth Information

+between initiator and target NUMA nodes in ACPI Heterogeneous Attribute Memory 
Table (HMAT).
+Initiator NUMA node can create memory requests, usually including one or more 
processors.

s/including/it has/


+Target NUMA node contains addressable memory.
+
+In @samp{hmat-lb} option, @var{node} are NUMA node IDs. @var{str} of 
'hierarchy'
+is the memory hierarchy of the target NUMA node: if @var{str} is 'memory', the 
structure
+represents the memory performance; if @var{str} is 
'first-level|second-level|third-level',
+this structure represents aggregated performance of memory side caches for 
each domain.
+@var{str} of 'data-type' is type of data represented by this structure 
instance:
+if 'hierarchy' is 'memory', 'data-type' is 'access|read|write' 
latency(nanoseconds)

is nanoseconds is right here? Looking at previous patches default value of 
suffix-less
should be picoseconds. I'd just drop '(nanoseconds)'. User will use appropriate 
suffix.


OK, I will drop it.

+or 'access|read|write' bandwidth(MB/s) of the target memory; if 'hierarchy' is

ditto (MB/s), probably should be Bytes/s for default suffix-less value
(well, I'm not sure how to express it better)



But last version, we let !QEMU_IS_ALIGNED(node->bandwidth, MiB) as error.

+'first-level|second-level|third-level', 'data-type' is 'access|read|write' hit 
latency
+or 'access|read|write' hit bandwidth of the target memory side cache.
+
+@var{lat} of 'latency' is latency value, the possible value and units are
+NUM[ps|ns|us] (picosecond|nanosecond|microsecond), the recommended unit is 
'ns'. @var{bw}
+is bandwidth value, the possible value and units are NUM[M|G|T], mean that



+the bandwidth value are NUM MB/s, GB/s or TB/s. Note that max NUM is 65534,
+if NUM is 0, means the corresponding latency or bandwidth information is not 
provided.
+And if input numbers without any unit, the latency unit will be 'ps' and the 
bandwidth
+will be MB/s.

  1st: above is applicable to both bw and lat values and should be documented 
as such
  2nd: 'max NUM is 65534' when different suffixes is fleeting target,
   spec says that entry with 0x is unreachable, so how about documenting
   unreachable value as 0x (then CLI parsing code will
   exclude it from range detection and acpi table building code translate it
   to internal 0x it could fit into the tables)



If we input 0x, qemu will raise error that parameter 
expect a size value.





Re: [RFC v2 00/22] intel_iommu: expose Shared Virtual Addressing to VM

2019-10-24 Thread no-reply
Patchew URL: 
https://patchew.org/QEMU/1571920483-3382-1-git-send-email-yi.l@intel.com/



Hi,

This series failed the docker-mingw@fedora build test. Please find the testing 
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.

=== TEST SCRIPT BEGIN ===
#! /bin/bash
export ARCH=x86_64
make docker-image-fedora V=1 NETWORK=1
time make docker-test-mingw@fedora J=14 NETWORK=1
=== TEST SCRIPT END ===

  CC  hw/pci/pci_host.o
  CC  hw/pci/pcie.o
/tmp/qemu-test/src/hw/pci-host/designware.c: In function 
'designware_pcie_host_realize':
/tmp/qemu-test/src/hw/pci-host/designware.c:693:31: error: incompatible type 
for argument 2 of 'pci_setup_iommu'
 pci_setup_iommu(pci->bus, designware_iommu_ops, s);
   ^~~~
In file included from /tmp/qemu-test/src/include/hw/pci/msi.h:24,
---
/tmp/qemu-test/src/include/hw/pci/pci.h:495:54: note: expected 'const 
PCIIOMMUOps *' {aka 'const struct PCIIOMMUOps *'} but argument is of type 
'PCIIOMMUOps' {aka 'const struct PCIIOMMUOps'}
 void pci_setup_iommu(PCIBus *bus, const PCIIOMMUOps *iommu_ops, void *opaque);
   ~~~^
make: *** [/tmp/qemu-test/src/rules.mak:69: hw/pci-host/designware.o] Error 1
make: *** Waiting for unfinished jobs
Traceback (most recent call last):
  File "./tests/docker/docker.py", line 662, in 
---
raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', 
'--label', 'com.qemu.instance.uuid=c26679928a9c432d9832978acd80e20b', '-u', 
'1003', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=', 
'-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', '-e', 
'SHOW_ENV=', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', 
'/home/patchew2/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', 
'/var/tmp/patchew-tester-tmp-c5ij2tri/src/docker-src.2019-10-25-02.27.27.16595:/var/tmp/qemu:z,ro',
 'qemu:fedora', '/var/tmp/qemu/run', 'test-mingw']' returned non-zero exit 
status 2.
filter=--filter=label=com.qemu.instance.uuid=c26679928a9c432d9832978acd80e20b
make[1]: *** [docker-run] Error 1
make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-c5ij2tri/src'
make: *** [docker-run-test-mingw@fedora] Error 2

real2m45.686s
user0m7.841s


The full log is available at
http://patchew.org/logs/1571920483-3382-1-git-send-email-yi.l@intel.com/testing.docker-mingw@fedora/?type=message.
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Re: [RFC v2 00/22] intel_iommu: expose Shared Virtual Addressing to VM

2019-10-24 Thread no-reply
Patchew URL: 
https://patchew.org/QEMU/1571920483-3382-1-git-send-email-yi.l@intel.com/



Hi,

This series failed the docker-quick@centos7 build test. Please find the testing 
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.

=== TEST SCRIPT BEGIN ===
#!/bin/bash
make docker-image-centos7 V=1 NETWORK=1
time make docker-test-quick@centos7 SHOW_ENV=1 J=14 NETWORK=1
=== TEST SCRIPT END ===

  CC  hw/pci/pci_host.o
  CC  hw/pci/pcie.o
/tmp/qemu-test/src/hw/pci-host/designware.c: In function 
'designware_pcie_host_realize':
/tmp/qemu-test/src/hw/pci-host/designware.c:693:5: error: incompatible type for 
argument 2 of 'pci_setup_iommu'
 pci_setup_iommu(pci->bus, designware_iommu_ops, s);
 ^
In file included from /tmp/qemu-test/src/include/hw/pci/msi.h:24:0,
---
/tmp/qemu-test/src/include/hw/pci/pci.h:495:6: note: expected 'const struct 
PCIIOMMUOps *' but argument is of type 'PCIIOMMUOps'
 void pci_setup_iommu(PCIBus *bus, const PCIIOMMUOps *iommu_ops, void *opaque);
  ^
make: *** [hw/pci-host/designware.o] Error 1
make: *** Waiting for unfinished jobs
Traceback (most recent call last):
  File "./tests/docker/docker.py", line 662, in 
---
raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', 
'--label', 'com.qemu.instance.uuid=092c0f9750e6454780dcead436e6bc2c', '-u', 
'1001', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=', 
'-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', '-e', 
'SHOW_ENV=1', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', 
'/home/patchew/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', 
'/var/tmp/patchew-tester-tmp-ih3zhzs3/src/docker-src.2019-10-25-02.18.26.32058:/var/tmp/qemu:z,ro',
 'qemu:centos7', '/var/tmp/qemu/run', 'test-quick']' returned non-zero exit 
status 2.
filter=--filter=label=com.qemu.instance.uuid=092c0f9750e6454780dcead436e6bc2c
make[1]: *** [docker-run] Error 1
make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-ih3zhzs3/src'
make: *** [docker-run-test-quick@centos7] Error 2

real3m8.783s
user0m8.093s


The full log is available at
http://patchew.org/logs/1571920483-3382-1-git-send-email-yi.l@intel.com/testing.docker-quick@centos7/?type=message.
---
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Re: [PATCH v5 06/11] qapi: add failover negotiated event

2019-10-24 Thread Markus Armbruster
We ask patch submitters to cc: subject matter experts for review.  You
did.  When such patches touch the QAPI schema, it's best to cc the qapi
schema maintainers (Eric Blake and me) as well, because we can't require
all subject matter experts to be fluent in the QAPI schema language and
conventions.  I found this one more or less by chance.

Jens Freimann  writes:

> This event is sent to let libvirt know that VIRTIO_NET_F_STANDBY
> feature was not negotiated during virtio feature negotiation. If this
> event is received it means any primary devices hotplugged before
> this were were never really added to QEMU devices.

Too many negations for my poor old brain to process.

>
> Signed-off-by: Jens Freimann 
> ---
>  qapi/net.json | 16 
>  1 file changed, 16 insertions(+)
>
> diff --git a/qapi/net.json b/qapi/net.json
> index 728990f4fb..8c5f3f1fb2 100644
> --- a/qapi/net.json
> +++ b/qapi/net.json
> @@ -737,3 +737,19 @@
>  ##
>  { 'command': 'announce-self', 'boxed': true,
>'data' : 'AnnounceParameters'}
> +
> +##
> +# @FAILOVER_NEGOTIATED:
> +#
> +# Emitted when VIRTIO_NET_F_STANDBY was negotiated during feature negotiation
> +#
> +# Since: 4.2
> +#
> +# Example:
> +#
> +# <- { "event": "FAILOVER_NEGOTIATED",
> +#  "data": {} }
> +#
> +##
> +{ 'event': 'FAILOVER_NEGOTIATED',
> +  'data': {} }

The commit message at least tries to explain intended use.  The doc
string does not.  Should it?




[PATCH v5] ssi: xilinx_spips: Skip spi bus update for a few register writes

2019-10-24 Thread Sai Pavan Boddu
A few configuration register writes need not update the spi bus state, so just
return after register write.

Signed-off-by: Sai Pavan Boddu 
---

Changes for V2:
Just skip update of spips cs and fifos
Update commit message accordingly
Changes for V4:
Avoid checking for zynqmp qspi
Skip spi bus update for few of the registers Changes for V4:
Move the register list to existing switch case above.
Change for V5:
Fixed Commit message.

 hw/ssi/xilinx_spips.c | 22 ++
 1 file changed, 18 insertions(+), 4 deletions(-)

diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index a309c71..0d6c2e1 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -109,6 +109,7 @@
 #define R_GPIO  (0x30 / 4)
 #define R_LPBK_DLY_ADJ  (0x38 / 4)
 #define R_LPBK_DLY_ADJ_RESET (0x33)
+#define R_IOU_TAPDLY_BYPASS (0x3C / 4)
 #define R_TXD1  (0x80 / 4)
 #define R_TXD2  (0x84 / 4)
 #define R_TXD3  (0x88 / 4)
@@ -139,6 +140,8 @@
 #define R_LQSPI_STS (0xA4 / 4)
 #define LQSPI_STS_WR_RECVD  (1 << 1)
 
+#define R_DUMMY_CYCLE_EN(0xC8 / 4)
+#define R_ECO   (0xF8 / 4)
 #define R_MOD_ID(0xFC / 4)
 
 #define R_GQSPI_SELECT  (0x144 / 4)
@@ -970,6 +973,7 @@ static void xilinx_spips_write(void *opaque, hwaddr addr,
 {
 int mask = ~0;
 XilinxSPIPS *s = opaque;
+bool try_flush = true;
 
 DB_PRINT_L(0, "addr=" TARGET_FMT_plx " = %x\n", addr, (unsigned)value);
 addr >>= 2;
@@ -1019,13 +1023,23 @@ static void xilinx_spips_write(void *opaque, hwaddr 
addr,
 tx_data_bytes(&s->tx_fifo, (uint32_t)value, 3,
   s->regs[R_CONFIG] & R_CONFIG_ENDIAN);
 goto no_reg_update;
+/* Skip SPI bus update for below registers writes */
+case R_GPIO:
+case R_LPBK_DLY_ADJ:
+case R_IOU_TAPDLY_BYPASS:
+case R_DUMMY_CYCLE_EN:
+case R_ECO:
+try_flush = false;
+break;
 }
 s->regs[addr] = (s->regs[addr] & ~mask) | (value & mask);
 no_reg_update:
-xilinx_spips_update_cs_lines(s);
-xilinx_spips_check_flush(s);
-xilinx_spips_update_cs_lines(s);
-xilinx_spips_update_ixr(s);
+if (try_flush) {
+xilinx_spips_update_cs_lines(s);
+xilinx_spips_check_flush(s);
+xilinx_spips_update_cs_lines(s);
+xilinx_spips_update_ixr(s);
+}
 }
 
 static const MemoryRegionOps spips_ops = {
-- 
2.7.4




Re: QMP netdev_add multiple dnssearch values

2019-10-24 Thread Markus Armbruster
Alex Kirillov  writes:

> Hi,
>
> I'm trying to create a user (slirp) interface with several `dnssearch` values 
> using QMP.
> But every variant I pass can't do that.

What exactly goes wrong?  Does the QMP command fail?  Does it succeed
but the network backend incorrectly?

> According to the QAPI schema it should be like:
>
> {
>     "execute": "netdev_add",
>     "arguments": {
>         "id": "netdev0",
>         "type": "user",
>         "dnssearch": [
>             {
>                 "str": "8.8.8.8"
>             },
>             {
>                 "str": "8.8.4.4"
>             }
>         ]
>     }
> }
>
> I looked through code and find out that `dnssearch` is passing to the 
> `slirp_dnssearch` (net/slirp.c),
> but the only way to execute this function correctly is to pass simply string 
> (like "example.org") to `dnssearch` OR to use command line options.
>
>
> What is the correct form of QMP command that I should use?
>
>
> P.S. Looks like fields `hostfwd` and `guestfwd` has the same issue.
>
> -- 
> Alex Kirillov
> Yandex.Cloud




Re: [PULL 00/11] MIPS queue for October 24th, 2019

2019-10-24 Thread no-reply
Patchew URL: 
https://patchew.org/QEMU/1571915195-4381-1-git-send-email-aleksandar.marko...@rt-rk.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [PULL 00/11] MIPS queue for October 24th, 2019
Type: series
Message-id: 1571915195-4381-1-git-send-email-aleksandar.marko...@rt-rk.com

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Switched to a new branch 'test'
54710a8 target/mips: Add support for emulation of CRC32 group of instructions
d8645d0 target/mips: msa: Split helpers for PCK.
e3c1ee9 target/mips: msa: Split helpers for S.
6bb4421 target/mips: msa: Split helpers for HADD_.
0f4cc5e target/mips: msa: Split helpers for ADD<_A|S_A|S_S|S_U|V>.
009d120 target/mips: msa: Split helpers for ILV.
cfe231b target/mips: msa: Split helpers for _.
34a0fab target/mips: msa: Split helpers for _A.
c169d7e MAINTAINERS: Update mail address of Aleksandar Rikalo
832615f target/mips: Clean up op_helper.c
d177c65 target/mips: Clean up helper.c

=== OUTPUT BEGIN ===
1/11 Checking commit d177c65047a3 (target/mips: Clean up helper.c)
2/11 Checking commit 832615f56fef (target/mips: Clean up op_helper.c)
ERROR: spaces required around that '*' (ctx:WxV)
#1060: FILE: target/mips/op_helper.c:3871:
+  float_status *status)  \
^

total: 1 errors, 0 warnings, 1681 lines checked

Patch 2/11 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/11 Checking commit c169d7e49e4c (MAINTAINERS: Update mail address of 
Aleksandar Rikalo)
4/11 Checking commit 34a0fabb8579 (target/mips: msa: Split helpers for 
_A.)
5/11 Checking commit cfe231b2ea70 (target/mips: msa: Split helpers for 
_.)
6/11 Checking commit 009d120710e1 (target/mips: msa: Split helpers for 
ILV.)
7/11 Checking commit 0f4cc5edd2d0 (target/mips: msa: Split helpers for 
ADD<_A|S_A|S_S|S_U|V>.)
8/11 Checking commit 6bb44211f0a5 (target/mips: msa: Split helpers for 
HADD_.)
9/11 Checking commit e3c1ee9fd9b7 (target/mips: msa: Split helpers for 
S.)
10/11 Checking commit d8645d096706 (target/mips: msa: Split helpers for 
PCK.)
11/11 Checking commit 54710a87852c (target/mips: Add support for emulation of 
CRC32 group of instructions)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/1571915195-4381-1-git-send-email-aleksandar.marko...@rt-rk.com/testing.checkpatch/?type=message.
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[PATCH v5 1/2] hw: rtc: Add Goldfish RTC device

2019-10-24 Thread Anup Patel
This patch adds model for Google Goldfish virtual platform RTC device.

We will be adding Goldfish RTC device to the QEMU RISC-V virt machine
for providing real date-time to Guest Linux. The corresponding Linux
driver for Goldfish RTC device is already available in upstream Linux.

For now, VM migration support is available but untested for Goldfish RTC
device. It will be hardened in-future when we implement VM migration for
KVM RISC-V.

Signed-off-by: Anup Patel 
---
 hw/rtc/Kconfig|   3 +
 hw/rtc/Makefile.objs  |   1 +
 hw/rtc/goldfish_rtc.c | 288 ++
 hw/rtc/trace-events   |   4 +
 include/hw/rtc/goldfish_rtc.h |  46 ++
 5 files changed, 342 insertions(+)
 create mode 100644 hw/rtc/goldfish_rtc.c
 create mode 100644 include/hw/rtc/goldfish_rtc.h

diff --git a/hw/rtc/Kconfig b/hw/rtc/Kconfig
index 45daa8d655..bafe6ac2c9 100644
--- a/hw/rtc/Kconfig
+++ b/hw/rtc/Kconfig
@@ -21,3 +21,6 @@ config MC146818RTC
 
 config SUN4V_RTC
 bool
+
+config GOLDFISH_RTC
+bool
diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs
index 8dc9fcd3a9..aa208d0d10 100644
--- a/hw/rtc/Makefile.objs
+++ b/hw/rtc/Makefile.objs
@@ -11,3 +11,4 @@ common-obj-$(CONFIG_EXYNOS4) += exynos4210_rtc.o
 obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
 common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
 common-obj-$(CONFIG_ASPEED_SOC) += aspeed_rtc.o
+common-obj-$(CONFIG_GOLDFISH_RTC) += goldfish_rtc.o
diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c
new file mode 100644
index 00..f71f6eaab0
--- /dev/null
+++ b/hw/rtc/goldfish_rtc.c
@@ -0,0 +1,288 @@
+/*
+ * Goldfish virtual platform RTC
+ *
+ * Copyright (C) 2019 Western Digital Corporation or its affiliates.
+ *
+ * For more details on Google Goldfish virtual platform refer:
+ * 
https://android.googlesource.com/platform/external/qemu/+/master/docs/GOLDFISH-VIRTUAL-HARDWARE.TXT
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2 or later, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+
+#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "hw/rtc/goldfish_rtc.h"
+#include "migration/vmstate.h"
+#include "hw/irq.h"
+#include "hw/qdev-properties.h"
+#include "hw/sysbus.h"
+#include "qemu/timer.h"
+#include "sysemu/sysemu.h"
+#include "qemu/cutils.h"
+#include "qemu/log.h"
+
+#include "trace.h"
+
+#define RTC_TIME_LOW0x00
+#define RTC_TIME_HIGH   0x04
+#define RTC_ALARM_LOW   0x08
+#define RTC_ALARM_HIGH  0x0c
+#define RTC_IRQ_ENABLED 0x10
+#define RTC_CLEAR_ALARM 0x14
+#define RTC_ALARM_STATUS0x18
+#define RTC_CLEAR_INTERRUPT 0x1c
+
+static void goldfish_rtc_update(GoldfishRTCState *s)
+{
+qemu_set_irq(s->irq, (s->irq_pending & s->irq_enabled) ? 1 : 0);
+}
+
+static void goldfish_rtc_interrupt(void *opaque)
+{
+GoldfishRTCState *s = (GoldfishRTCState *)opaque;
+
+s->alarm_running = 0;
+s->irq_pending = 1;
+goldfish_rtc_update(s);
+}
+
+static uint64_t goldfish_rtc_get_count(GoldfishRTCState *s)
+{
+return s->tick_offset + (uint64_t)qemu_clock_get_ns(rtc_clock);
+}
+
+static void goldfish_rtc_clear_alarm(GoldfishRTCState *s)
+{
+timer_del(s->timer);
+s->alarm_running = 0;
+}
+
+static void goldfish_rtc_set_alarm(GoldfishRTCState *s)
+{
+uint64_t ticks = goldfish_rtc_get_count(s);
+uint64_t event = s->alarm_next;
+
+if (event <= ticks) {
+goldfish_rtc_clear_alarm(s);
+goldfish_rtc_interrupt(s);
+} else {
+/*
+ * We should be setting timer expiry to:
+ * qemu_clock_get_ns(rtc_clock) + (event - ticks)
+ * but this is equivalent to:
+ * event - s->tick_offset
+ */
+timer_mod(s->timer, event - s->tick_offset);
+s->alarm_running = 1;
+}
+}
+
+static uint64_t goldfish_rtc_read(void *opaque, hwaddr offset,
+  unsigned size)
+{
+GoldfishRTCState *s = opaque;
+uint64_t r = 0;
+
+switch (offset) {
+case RTC_TIME_LOW:
+r = goldfish_rtc_get_count(s) & 0x;
+break;
+case RTC_TIME_HIGH:
+r = goldfish_rtc_get_count(s) >> 32;
+break;
+case RTC_ALARM_LOW:
+r = s->alarm_next & 0x;
+break;
+case RTC_ALARM_HIGH:
+r = s->alarm_next >> 32;
+break;
+case RTC_IRQ_ENABLED:
+r = s->irq_enabled;
+break;
+case RTC_ALARM_STATUS:
+r = s->alarm_running;

[PATCH v5 2/2] riscv: virt: Use Goldfish RTC device

2019-10-24 Thread Anup Patel
We extend QEMU RISC-V virt machine by adding Goldfish RTC device
to it. This will allow Guest Linux to sync it's local date/time
with Host date/time via RTC device.

Signed-off-by: Anup Patel 
Reviewed-by: Palmer Dabbelt 
Acked-by: Palmer Dabbelt 
Reviewed-by: Alistair Francis 
---
 hw/riscv/Kconfig|  1 +
 hw/riscv/virt.c | 15 +++
 include/hw/riscv/virt.h |  2 ++
 3 files changed, 18 insertions(+)

diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig
index fb19b2df3a..b33753c780 100644
--- a/hw/riscv/Kconfig
+++ b/hw/riscv/Kconfig
@@ -34,6 +34,7 @@ config RISCV_VIRT
 select PCI
 select HART
 select SERIAL
+select GOLDFISH_RTC
 select VIRTIO_MMIO
 select PCI_EXPRESS_GENERIC_BRIDGE
 select SIFIVE
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index d36f5625ec..95c42ab993 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -57,6 +57,7 @@ static const struct MemmapEntry {
 [VIRT_DEBUG] =   {0x0, 0x100 },
 [VIRT_MROM] ={ 0x1000,   0x11000 },
 [VIRT_TEST] ={   0x10,0x1000 },
+[VIRT_RTC] = {   0x101000,0x1000 },
 [VIRT_CLINT] =   {  0x200,   0x1 },
 [VIRT_PLIC] ={  0xc00, 0x400 },
 [VIRT_UART0] =   { 0x1000, 0x100 },
@@ -310,6 +311,17 @@ static void create_fdt(RISCVVirtState *s, const struct 
MemmapEntry *memmap,
 qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle);
 qemu_fdt_setprop_cell(fdt, nodename, "interrupts", UART0_IRQ);
 
+nodename = g_strdup_printf("/rtc@%lx",
+(long)memmap[VIRT_RTC].base);
+qemu_fdt_add_subnode(fdt, nodename);
+qemu_fdt_setprop_string(fdt, nodename, "compatible",
+"google,goldfish-rtc");
+qemu_fdt_setprop_cells(fdt, nodename, "reg",
+0x0, memmap[VIRT_RTC].base,
+0x0, memmap[VIRT_RTC].size);
+qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle);
+qemu_fdt_setprop_cell(fdt, nodename, "interrupts", RTC_IRQ);
+
 qemu_fdt_add_subnode(fdt, "/chosen");
 qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename);
 if (cmdline) {
@@ -496,6 +508,9 @@ static void riscv_virt_board_init(MachineState *machine)
 0, qdev_get_gpio_in(DEVICE(s->plic), UART0_IRQ), 399193,
 serial_hd(0), DEVICE_LITTLE_ENDIAN);
 
+sysbus_create_simple("goldfish_rtc", memmap[VIRT_RTC].base,
+qdev_get_gpio_in(DEVICE(s->plic), RTC_IRQ));
+
 g_free(plic_hart_config);
 }
 
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
index 6e5fbe5d3b..e6423258d3 100644
--- a/include/hw/riscv/virt.h
+++ b/include/hw/riscv/virt.h
@@ -37,6 +37,7 @@ enum {
 VIRT_DEBUG,
 VIRT_MROM,
 VIRT_TEST,
+VIRT_RTC,
 VIRT_CLINT,
 VIRT_PLIC,
 VIRT_UART0,
@@ -49,6 +50,7 @@ enum {
 
 enum {
 UART0_IRQ = 10,
+RTC_IRQ = 11,
 VIRTIO_IRQ = 1, /* 1 to 8 */
 VIRTIO_COUNT = 8,
 PCIE_IRQ = 0x20, /* 32 to 35 */
-- 
2.17.1




[PATCH v5 0/2] RTC support for QEMU RISC-V virt machine

2019-10-24 Thread Anup Patel
This series adds RTC device to QEMU RISC-V virt machine. We have
selected Goldfish RTC device model for this. It's a pretty simple
synthetic device with few MMIO registers and no dependency external
clock. The driver for Goldfish RTC is already available in Linux so
we just need to enable it in Kconfig for RISCV and also update Linux
defconfigs.

We have tested this series with Linux-5.4-rc4 plus defconfig changes
available in 'goldfish_rtc_v2' branch of:
https://github.com/avpatel/linux.git

Changes since v4:
 - Fixed typo in trace event usage
 - Moved goldfish_rtc.h to correct location

Changes since v3:
 - Address all nit comments from Alistair

Changes since v2:
 - Rebased on RTC code refactoring

Changes since v1:
 - Implemented VMState save/restore callbacks

Anup Patel (2):
  hw: rtc: Add Goldfish RTC device
  riscv: virt: Use Goldfish RTC device

 hw/riscv/Kconfig  |   1 +
 hw/riscv/virt.c   |  15 ++
 hw/rtc/Kconfig|   3 +
 hw/rtc/Makefile.objs  |   1 +
 hw/rtc/goldfish_rtc.c | 288 ++
 hw/rtc/trace-events   |   4 +
 include/hw/riscv/virt.h   |   2 +
 include/hw/rtc/goldfish_rtc.h |  46 ++
 8 files changed, 360 insertions(+)
 create mode 100644 hw/rtc/goldfish_rtc.c
 create mode 100644 include/hw/rtc/goldfish_rtc.h

--
2.17.1



RE: [PATCH v4 1/2] hw: rtc: Add Goldfish RTC device

2019-10-24 Thread Anup Patel


> -Original Message-
> From: Alistair Francis 
> Sent: Friday, October 25, 2019 5:40 AM
> To: Anup Patel 
> Cc: Peter Maydell ; Palmer Dabbelt
> ; Alistair Francis ; Sagar
> Karandikar ; Bastian Koppelmann
> ; Atish Patra ;
> qemu-ri...@nongnu.org; qemu-devel@nongnu.org; Anup Patel
> 
> Subject: Re: [PATCH v4 1/2] hw: rtc: Add Goldfish RTC device
> 
> On Tue, Oct 22, 2019 at 11:37 PM Anup Patel  wrote:
> >
> > This patch adds model for Google Goldfish virtual platform RTC device.
> >
> > We will be adding Goldfish RTC device to the QEMU RISC-V virt machine
> > for providing real date-time to Guest Linux. The corresponding Linux
> > driver for Goldfish RTC device is already available in upstream Linux.
> >
> > For now, VM migration support is available but untested for Goldfish
> > RTC device. It will be hardened in-future when we implement VM
> > migration for KVM RISC-V.
> >
> > Signed-off-by: Anup Patel 
> > ---
> >  hw/rtc/Kconfig  |   3 +
> >  hw/rtc/Makefile.objs|   1 +
> >  hw/rtc/goldfish_rtc.c   | 288 
> >  hw/rtc/trace-events |   4 +
> >  include/hw/timer/goldfish_rtc.h |  46 +
> >  5 files changed, 342 insertions(+)
> >  create mode 100644 hw/rtc/goldfish_rtc.c  create mode 100644
> > include/hw/timer/goldfish_rtc.h
> >
> > diff --git a/hw/rtc/Kconfig b/hw/rtc/Kconfig index
> > 45daa8d655..bafe6ac2c9 100644
> > --- a/hw/rtc/Kconfig
> > +++ b/hw/rtc/Kconfig
> > @@ -21,3 +21,6 @@ config MC146818RTC
> >
> >  config SUN4V_RTC
> >  bool
> > +
> > +config GOLDFISH_RTC
> > +bool
> > diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs index
> > 8dc9fcd3a9..aa208d0d10 100644
> > --- a/hw/rtc/Makefile.objs
> > +++ b/hw/rtc/Makefile.objs
> > @@ -11,3 +11,4 @@ common-obj-$(CONFIG_EXYNOS4) +=
> exynos4210_rtc.o
> >  obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
> >  common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
> >  common-obj-$(CONFIG_ASPEED_SOC) += aspeed_rtc.o
> > +common-obj-$(CONFIG_GOLDFISH_RTC) += goldfish_rtc.o
> > diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c new file
> > mode 100644 index 00..f49a8e4489
> > --- /dev/null
> > +++ b/hw/rtc/goldfish_rtc.c
> > @@ -0,0 +1,288 @@
> > +/*
> > + * Goldfish virtual platform RTC
> > + *
> > + * Copyright (C) 2019 Western Digital Corporation or its affiliates.
> > + *
> > + * For more details on Google Goldfish virtual platform refer:
> > + *
> >
> +https://android.googlesource.com/platform/external/qemu/+/master/doc
> s
> > +/GOLDFISH-VIRTUAL-HARDWARE.TXT
> > + *
> > + * This program is free software; you can redistribute it and/or
> > +modify it
> > + * under the terms and conditions of the GNU General Public License,
> > + * version 2 or later, as published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope it will be useful, but
> > +WITHOUT
> > + * ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY
> > +or
> > + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
> > +License for
> > + * more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > +along with
> > + * this program.  If not, see .
> > + */
> > +
> > +#include "qemu/osdep.h"
> > +#include "qemu-common.h"
> > +#include "hw/timer/goldfish_rtc.h"

I think goldfish_rtc.h should be under include/hw/rtc directory.

I will move it.

> > +#include "migration/vmstate.h"
> > +#include "hw/irq.h"
> > +#include "hw/qdev-properties.h"
> > +#include "hw/sysbus.h"
> > +#include "qemu/timer.h"
> > +#include "sysemu/sysemu.h"
> > +#include "qemu/cutils.h"
> > +#include "qemu/log.h"
> > +
> > +#include "trace.h"
> > +
> > +#define RTC_TIME_LOW0x00
> > +#define RTC_TIME_HIGH   0x04
> > +#define RTC_ALARM_LOW   0x08
> > +#define RTC_ALARM_HIGH  0x0c
> > +#define RTC_IRQ_ENABLED 0x10
> > +#define RTC_CLEAR_ALARM 0x14
> > +#define RTC_ALARM_STATUS0x18
> > +#define RTC_CLEAR_INTERRUPT 0x1c
> > +
> > +static void goldfish_rtc_update(GoldfishRTCState *s) {
> > +qemu_set_irq(s->irq, (s->irq_pending & s->irq_enabled) ? 1 : 0);
> > +}
> > +
> > +static void goldfish_rtc_interrupt(void *opaque) {
> > +GoldfishRTCState *s = (GoldfishRTCState *)opaque;
> > +
> > +s->alarm_running = 0;
> > +s->irq_pending = 1;
> > +goldfish_rtc_update(s);
> > +}
> > +
> > +static uint64_t goldfish_rtc_get_count(GoldfishRTCState *s) {
> > +return s->tick_offset + (uint64_t)qemu_clock_get_ns(rtc_clock);
> > +}
> > +
> > +static void goldfish_rtc_clear_alarm(GoldfishRTCState *s) {
> > +timer_del(s->timer);
> > +s->alarm_running = 0;
> > +}
> > +
> > +static void goldfish_rtc_set_alarm(GoldfishRTCState *s) {
> > +uint64_t ticks = goldfish_rtc_get_count(s);
> > +uint64_t event = s->alarm_next;
> > +
> > +if (event <= ticks) {
> > +goldfish_rtc_clear_alarm(s);
> > +g

Re: [PATCH v6 0/9] Packed virtqueue for virtio

2019-10-24 Thread Jason Wang



On 2019/10/25 上午1:13, Eugenio Pérez wrote:

Hi:

This is an updated version of packed virtqueue support based on Wei and Jason's
V5, mainly solving the clang leak detector error CI gave.

Please review.

Changes from V5:
- Fix qemu's CI asan error.
- Move/copy rcu comments.
- Merge duplicated vdev->broken check between split and packet version.

Eugenio Pérez (3):
   virtio: Free rng and blk virqueues
   virtio: add some rcu comments
   virtio: Move vdev->broken check to dispatch drop_all

Jason Wang (4):
   virtio: basic packed virtqueue support
   virtio: event suppression support for packed ring
   vhost_net: enable packed ring support
   virtio: add property to enable packed virtqueue

Wei Xu (2):
   virtio: basic structure for packed ring
   virtio: device/driverr area size calculation refactor for split ring



Looks good to me.

Just two nits:

I tend to squash patch 8 and patch 9 into the patch that introduces 
those issues and split patch 3 into two parts.


Btw, if you wish you can add your s-o-b to the series.

Do you want to post a new version or I can tweak them by myself?

Thanks




  hw/block/virtio-blk.c   |7 +-
  hw/char/virtio-serial-bus.c |2 +-
  hw/net/vhost_net.c  |2 +
  hw/scsi/virtio-scsi.c   |3 +-
  hw/virtio/virtio-rng.c  |1 +
  hw/virtio/virtio.c  | 1154 ++-
  include/hw/virtio/virtio.h  |   14 +-
  7 files changed, 1045 insertions(+), 138 deletions(-)






[PATCH] i386: Use g_autofree in a few places

2019-10-24 Thread Eduardo Habkost
Get rid of 12 explicit g_free() calls.

Signed-off-by: Eduardo Habkost 
---
 target/i386/cpu.c | 41 +
 1 file changed, 13 insertions(+), 28 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 0de8a22e1e..59b7aaf580 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1671,11 +1671,8 @@ static char *x86_cpu_type_name(const char *model_name)
 
 static ObjectClass *x86_cpu_class_by_name(const char *cpu_model)
 {
-ObjectClass *oc;
-char *typename = x86_cpu_type_name(cpu_model);
-oc = object_class_by_name(typename);
-g_free(typename);
-return oc;
+g_autofree char *typename = x86_cpu_type_name(cpu_model);
+return object_class_by_name(typename);
 }
 
 static char *x86_cpu_class_get_model_name(X86CPUClass *cc)
@@ -3407,7 +3404,6 @@ static void mark_unavailable_features(X86CPU *cpu, 
FeatureWord w, uint64_t mask,
 CPUX86State *env = &cpu->env;
 FeatureWordInfo *f = &feature_word_info[w];
 int i;
-char *feat_word_str;
 
 if (!cpu->force_features) {
 env->features[w] &= ~mask;
@@ -3420,13 +3416,12 @@ static void mark_unavailable_features(X86CPU *cpu, 
FeatureWord w, uint64_t mask,
 
 for (i = 0; i < 64; ++i) {
 if ((1ULL << i) & mask) {
-feat_word_str = feature_word_description(f, i);
+g_autofree char *feat_word_str = feature_word_description(f, i);
 warn_report("%s: %s%s%s [bit %d]",
 verbose_prefix,
 feat_word_str,
 f->feat_names[i] ? "." : "",
 f->feat_names[i] ? f->feat_names[i] : "", i);
-g_free(feat_word_str);
 }
 }
 }
@@ -3928,17 +3923,14 @@ static gint x86_cpu_list_compare(gconstpointer a, 
gconstpointer b)
 ObjectClass *class_b = (ObjectClass *)b;
 X86CPUClass *cc_a = X86_CPU_CLASS(class_a);
 X86CPUClass *cc_b = X86_CPU_CLASS(class_b);
-char *name_a, *name_b;
 int ret;
 
 if (cc_a->ordering != cc_b->ordering) {
 ret = cc_a->ordering - cc_b->ordering;
 } else {
-name_a = x86_cpu_class_get_model_name(cc_a);
-name_b = x86_cpu_class_get_model_name(cc_b);
+g_autofree char *name_a = x86_cpu_class_get_model_name(cc_a);
+g_autofree char *name_b = x86_cpu_class_get_model_name(cc_b);
 ret = strcmp(name_a, name_b);
-g_free(name_a);
-g_free(name_b);
 }
 return ret;
 }
@@ -3976,9 +3968,9 @@ static void x86_cpu_list_entry(gpointer data, gpointer 
user_data)
 {
 ObjectClass *oc = data;
 X86CPUClass *cc = X86_CPU_CLASS(oc);
-char *name = x86_cpu_class_get_model_name(cc);
-char *desc = g_strdup(cc->model_description);
-char *alias_of = x86_cpu_class_get_alias_of(cc);
+g_autofree char *name = x86_cpu_class_get_model_name(cc);
+g_autofree char *desc = g_strdup(cc->model_description);
+g_autofree char *alias_of = x86_cpu_class_get_alias_of(cc);
 
 if (!desc && alias_of) {
 if (cc->model && cc->model->version == CPU_VERSION_AUTO) {
@@ -3992,9 +3984,6 @@ static void x86_cpu_list_entry(gpointer data, gpointer 
user_data)
 }
 
 qemu_printf("x86 %-20s  %-48s\n", name, desc);
-g_free(name);
-g_free(desc);
-g_free(alias_of);
 }
 
 /* list available CPU models and flags */
@@ -4433,7 +4422,7 @@ static void x86_cpu_cpudef_class_init(ObjectClass *oc, 
void *data)
 
 static void x86_register_cpu_model_type(const char *name, X86CPUModel *model)
 {
-char *typename = x86_cpu_type_name(name);
+g_autofree char *typename = x86_cpu_type_name(name);
 TypeInfo ti = {
 .name = typename,
 .parent = TYPE_X86_CPU,
@@ -4442,14 +4431,12 @@ static void x86_register_cpu_model_type(const char 
*name, X86CPUModel *model)
 };
 
 type_register(&ti);
-g_free(typename);
 }
 
 static void x86_register_cpudef_types(X86CPUDefinition *def)
 {
 X86CPUModel *m;
 const X86CPUVersionDefinition *vdef;
-char *name;
 
 /* AMD aliases are handled at runtime based on CPUID vendor, so
  * they shouldn't be set on the CPU model table.
@@ -4469,11 +4456,11 @@ static void x86_register_cpudef_types(X86CPUDefinition 
*def)
 
 for (vdef = x86_cpu_def_get_versions(def); vdef->version; vdef++) {
 X86CPUModel *m = g_new0(X86CPUModel, 1);
+g_autofree char *name =
+x86_cpu_versioned_model_name(def, vdef->version);
 m->cpudef = def;
 m->version = vdef->version;
-name = x86_cpu_versioned_model_name(def, vdef->version);
 x86_register_cpu_model_type(name, m);
-g_free(name);
 
 if (vdef->alias) {
 X86CPUModel *am = g_new0(X86CPUModel, 1);
@@ -5545,9 +5532,8 @@ static void x86_cpu_realizefn(DeviceState *dev, Error 
**errp)
 
 if (xcc->host_cpuid_required) {
 if (!accel_uses_host_cpuid()) {
-char *name = x86_cpu_class_get_model_name(xcc);
+g_autofree char *name = 

[PATCH 6/7] i386: Don't use default_cpu_version() inside query-cpu-definitions

2019-10-24 Thread Eduardo Habkost
We will change query-cpu-definitions to have a new `machine`
parameter.  Make the machine-specific parts of that code explicit
instead of calling default_cpu_version(), so we can change it to
use the new parameter later.

As the code now has a dependency on MachineClass, wrap it inside
a !CONFIG_USER_ONLY ifdef.  The function was never used by
*-user, anyway.

This patch shouldn't introduce any behavior change.  Results of
query-cpu-definition will be exactly the same.

Signed-off-by: Eduardo Habkost 
---
 target/i386/cpu.c | 31 ++-
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 5dbd379331..67d1eca4ed 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3877,6 +3877,7 @@ static void x86_cpu_get_unavailable_features(Object *obj, 
Visitor *v,
 visit_type_strList(v, "unavailable-features", &result, errp);
 }
 
+#ifndef CONFIG_USER_ONLY
 /* Check for missing features that may prevent the CPU class from
  * running using the current machine and accelerator.
  */
@@ -3914,6 +3915,7 @@ static void 
x86_cpu_class_check_missing_features(X86CPUClass *xcc,
 
 object_unref(OBJECT(xc));
 }
+#endif
 
 /* Print all cpuid feature names in featureset
  */
@@ -4039,11 +4041,17 @@ void x86_cpu_list(void)
 g_list_free(names);
 }
 
+#ifndef CONFIG_USER_ONLY
+typedef struct X86CPUDefinitionArgs {
+CpuDefinitionInfoList *cpu_list;
+X86CPUVersion default_version;
+} X86CPUDefinitionArgs;
+
 static void x86_cpu_definition_entry(gpointer data, gpointer user_data)
 {
 ObjectClass *oc = data;
 X86CPUClass *cc = X86_CPU_CLASS(oc);
-CpuDefinitionInfoList **cpu_list = user_data;
+X86CPUDefinitionArgs *args = user_data;
 CpuDefinitionInfoList *entry;
 CpuDefinitionInfo *info;
 
@@ -4059,25 +4067,30 @@ static void x86_cpu_definition_entry(gpointer data, 
gpointer user_data)
  * Old machine types won't report aliases, so that alias translation
  * doesn't break compatibility with previous QEMU versions.
  */
-if (default_cpu_version() != CPU_VERSION_LEGACY) {
-info->alias_of = x86_cpu_class_get_alias_of(cc, default_cpu_version());
+if (args->default_version != CPU_VERSION_LEGACY) {
+info->alias_of = x86_cpu_class_get_alias_of(cc, args->default_version);
 info->has_alias_of = !!info->alias_of;
 }
 
 entry = g_malloc0(sizeof(*entry));
 entry->value = info;
-entry->next = *cpu_list;
-*cpu_list = entry;
+entry->next = args->cpu_list;
+args->cpu_list = entry;
 }
 
 CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
 {
-CpuDefinitionInfoList *cpu_list = NULL;
-GSList *list = get_sorted_cpu_model_list();
-g_slist_foreach(list, x86_cpu_definition_entry, &cpu_list);
+X86CPUDefinitionArgs args = { .cpu_list = NULL };
+GSList *list;
+MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
+
+args.default_version = default_cpu_version_for_machine(mc);
+list = get_sorted_cpu_model_list();
+g_slist_foreach(list, x86_cpu_definition_entry, &args);
 g_slist_free(list);
-return cpu_list;
+return args.cpu_list;
 }
+#endif
 
 static uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
bool migratable_only)
-- 
2.21.0




[PATCH 5/7] i386: Remove x86_cpu_set_default_version() function

2019-10-24 Thread Eduardo Habkost
We will introduce code that will return machine-type-specific
from other machines (not the current one), so we'll need a helper
for getting the default CPU version from a machine class.

With the new helper, we don't need the machine init function to
call x86_cpu_set_default_version() anymore: we can just look at
the machine class of the current machine.  Replace the
default_cpu_version static variable with a default_cpu_version()
function that will look at qdev_get_machine().

Signed-off-by: Eduardo Habkost 
---
 include/hw/i386/pc.h |  5 -
 target/i386/cpu.h|  6 --
 hw/i386/pc.c |  3 ---
 target/i386/cpu.c| 28 
 4 files changed, 24 insertions(+), 18 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 37bfd95113..00ac726ebc 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -113,7 +113,10 @@ typedef struct PCMachineClass {
 
 /* Compat options: */
 
-/* Default CPU model version.  See x86_cpu_set_default_version(). */
+/*
+ * Default CPU model version for CPU models having
+ * version == CPU_VERSION_AUTO.
+ */
 int default_cpu_version;
 
 /* ACPI compat: */
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index cedb5bc205..aa17c79b43 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2168,12 +2168,6 @@ void x86_cpu_change_kvm_default(const char *prop, const 
char *value);
 
 typedef int X86CPUVersion;
 
-/*
- * Set default CPU model version for CPU models having
- * version == CPU_VERSION_AUTO.
- */
-void x86_cpu_set_default_version(X86CPUVersion version);
-
 /* Return name of 32-bit register, from a R_* constant */
 const char *get_register_name_32(unsigned int reg);
 
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 4b1904237e..64ec995172 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1503,9 +1503,6 @@ void pc_cpus_init(PCMachineState *pcms)
 const CPUArchIdList *possible_cpus;
 MachineState *ms = MACHINE(pcms);
 MachineClass *mc = MACHINE_GET_CLASS(pcms);
-PCMachineClass *pcmc = PC_MACHINE_CLASS(mc);
-
-x86_cpu_set_default_version(pcmc->default_cpu_version);
 
 /* Calculates the limit to CPU APIC ID values
  *
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 8cecc669b3..5dbd379331 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -57,6 +57,7 @@
 #include "hw/xen/xen.h"
 #include "hw/i386/apic_internal.h"
 #include "hw/boards.h"
+#include "hw/i386/pc.h"
 #endif
 
 #include "disas/capstone.h"
@@ -3165,14 +3166,25 @@ static PropValue tcg_default_props[] = {
 };
 
 
-X86CPUVersion default_cpu_version = CPU_VERSION_LATEST;
+#ifdef CONFIG_USER_ONLY
+static X86CPUVersion default_cpu_version(void)
+{
+return CPU_VERSION_LATEST;
+}
+#else
+static X86CPUVersion default_cpu_version_for_machine(MachineClass *mc)
+{
+PCMachineClass *pcmc =
+(PCMachineClass *)object_class_dynamic_cast(OBJECT_CLASS(mc), 
TYPE_PC_MACHINE);
+return pcmc ? pcmc->default_cpu_version : CPU_VERSION_LATEST;
+}
 
-void x86_cpu_set_default_version(X86CPUVersion version)
+static X86CPUVersion default_cpu_version(void)
 {
-/* Translating CPU_VERSION_AUTO to CPU_VERSION_AUTO doesn't make sense */
-assert(version != CPU_VERSION_AUTO);
-default_cpu_version = version;
+return 
default_cpu_version_for_machine(MACHINE_GET_CLASS(qdev_get_machine()));
 }
+#endif
+
 
 static X86CPUVersion x86_cpu_model_last_version(const X86CPUModel *model)
 {
@@ -4047,8 +4059,8 @@ static void x86_cpu_definition_entry(gpointer data, 
gpointer user_data)
  * Old machine types won't report aliases, so that alias translation
  * doesn't break compatibility with previous QEMU versions.
  */
-if (default_cpu_version != CPU_VERSION_LEGACY) {
-info->alias_of = x86_cpu_class_get_alias_of(cc, default_cpu_version);
+if (default_cpu_version() != CPU_VERSION_LEGACY) {
+info->alias_of = x86_cpu_class_get_alias_of(cc, default_cpu_version());
 info->has_alias_of = !!info->alias_of;
 }
 
@@ -4119,7 +4131,7 @@ static void x86_cpu_apply_props(X86CPU *cpu, PropValue 
*props)
 static void x86_cpu_apply_version_props(X86CPU *cpu, X86CPUModel *model)
 {
 const X86CPUVersionDefinition *vdef;
-X86CPUVersion version = x86_cpu_model_resolve_version(model, 
default_cpu_version);
+X86CPUVersion version = x86_cpu_model_resolve_version(model, 
default_cpu_version());
 
 if (version == CPU_VERSION_LEGACY) {
 return;
-- 
2.21.0




[PATCH 2/7] i386: Add default_version parameter to CPU version functions

2019-10-24 Thread Eduardo Habkost
Not all CPU version lookup code will use default_cpu_version:
we'll change query-cpu-definitions to optionally get a machine
type argument.  Make CPU version resolving functions get an
explicit default_version argument.

All callers are being changed to use default_cpu_version as
argument, so no behavior is being changed yet.

Signed-off-by: Eduardo Habkost 
---
 target/i386/cpu.c | 16 +---
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 5b7c5b1177..843f8c4b68 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3187,11 +3187,12 @@ static X86CPUVersion x86_cpu_model_last_version(const 
X86CPUModel *model)
 }
 
 /* Return the actual version being used for a specific CPU model */
-static X86CPUVersion x86_cpu_model_resolve_version(const X86CPUModel *model)
+static X86CPUVersion x86_cpu_model_resolve_version(const X86CPUModel *model,
+   X86CPUVersion 
default_version)
 {
 X86CPUVersion v = model->version;
 if (v == CPU_VERSION_AUTO) {
-v = default_cpu_version;
+v = default_version;
 }
 if (v == CPU_VERSION_LATEST) {
 return x86_cpu_model_last_version(model);
@@ -3958,14 +3959,15 @@ static char *x86_cpu_class_get_model_id(X86CPUClass *xc)
 return r;
 }
 
-static char *x86_cpu_class_get_alias_of(X86CPUClass *cc)
+static char *x86_cpu_class_get_alias_of(X86CPUClass *cc,
+X86CPUVersion default_version)
 {
 X86CPUVersion version;
 
 if (!cc->model || !cc->model->is_alias) {
 return NULL;
 }
-version = x86_cpu_model_resolve_version(cc->model);
+version = x86_cpu_model_resolve_version(cc->model, default_version);
 if (version <= 0) {
 return NULL;
 }
@@ -3978,7 +3980,7 @@ static void x86_cpu_list_entry(gpointer data, gpointer 
user_data)
 X86CPUClass *cc = X86_CPU_CLASS(oc);
 g_autofree char *name = x86_cpu_class_get_model_name(cc);
 g_autofree char *desc = g_strdup(cc->model_description);
-g_autofree char *alias_of = x86_cpu_class_get_alias_of(cc);
+g_autofree char *alias_of = x86_cpu_class_get_alias_of(cc, 
default_cpu_version);
 
 if (!desc && alias_of) {
 if (cc->model && cc->model->version == CPU_VERSION_AUTO) {
@@ -4045,7 +4047,7 @@ static void x86_cpu_definition_entry(gpointer data, 
gpointer user_data)
  * doesn't break compatibility with previous QEMU versions.
  */
 if (default_cpu_version != CPU_VERSION_LEGACY) {
-info->alias_of = x86_cpu_class_get_alias_of(cc);
+info->alias_of = x86_cpu_class_get_alias_of(cc, default_cpu_version);
 info->has_alias_of = !!info->alias_of;
 }
 
@@ -4116,7 +4118,7 @@ static void x86_cpu_apply_props(X86CPU *cpu, PropValue 
*props)
 static void x86_cpu_apply_version_props(X86CPU *cpu, X86CPUModel *model)
 {
 const X86CPUVersionDefinition *vdef;
-X86CPUVersion version = x86_cpu_model_resolve_version(model);
+X86CPUVersion version = x86_cpu_model_resolve_version(model, 
default_cpu_version);
 
 if (version == CPU_VERSION_LEGACY) {
 return;
-- 
2.21.0




[PATCH 4/7] machine: machine_find_class() function

2019-10-24 Thread Eduardo Habkost
Move find_machine() from vl.c to core/machine.c and rename it to
machine_find_class(), so it can be reused by other code.

The function won't reuse the results of the previous
object_class_get_list() call like it did in vl.c, but this
shouldn't be a problem because the function is expected to be
called only once during regular QEMU usage.

Signed-off-by: Eduardo Habkost 
---
 include/hw/boards.h |  1 +
 hw/core/machine.c   | 16 
 vl.c| 17 +
 3 files changed, 18 insertions(+), 16 deletions(-)

diff --git a/include/hw/boards.h b/include/hw/boards.h
index de45087f34..0ab7138c63 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -76,6 +76,7 @@ void machine_set_cpu_numa_node(MachineState *machine,
Error **errp);
 
 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char 
*type);
+MachineClass *machine_find_class(const char *name);
 
 
 /**
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 1689ad3bf8..53dae1cd08 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1143,6 +1143,22 @@ void machine_run_board_init(MachineState *machine)
 machine_class->init(machine);
 }
 
+MachineClass *machine_find_class(const char *name)
+{
+g_autoptr(GSList) machines = object_class_get_list(TYPE_MACHINE, false);
+GSList *el;
+
+for (el = machines; el; el = el->next) {
+MachineClass *mc = el->data;
+
+if (!strcmp(mc->name, name) || !g_strcmp0(mc->alias, name)) {
+return mc;
+}
+}
+
+return NULL;
+}
+
 static const TypeInfo machine_info = {
 .name = TYPE_MACHINE,
 .parent = TYPE_OBJECT,
diff --git a/vl.c b/vl.c
index 4489cfb2bb..8901455ee7 100644
--- a/vl.c
+++ b/vl.c
@@ -1306,21 +1306,6 @@ static int usb_parse(const char *cmdline)
 
 MachineState *current_machine;
 
-static MachineClass *find_machine(const char *name, GSList *machines)
-{
-GSList *el;
-
-for (el = machines; el; el = el->next) {
-MachineClass *mc = el->data;
-
-if (!strcmp(mc->name, name) || !g_strcmp0(mc->alias, name)) {
-return mc;
-}
-}
-
-return NULL;
-}
-
 static MachineClass *find_default_machine(GSList *machines)
 {
 GSList *el;
@@ -2485,7 +2470,7 @@ static MachineClass *machine_parse(const char *name, 
GSList *machines)
 exit(0);
 }
 
-mc = find_machine(name, machines);
+mc = machine_find_class(name);
 if (!mc) {
 error_report("unsupported machine type");
 error_printf("Use -machine help to list supported machines\n");
-- 
2.21.0




[PATCH 0/7] i386: Add `machine` parameter to query-cpu-definitions

2019-10-24 Thread Eduardo Habkost
We had introduced versioned CPU models in QEMU 4.1, including a
method for querying for CPU model versions using
query-cpu-definitions.  This only has one problem: fetching CPU
alias information for multiple machine types required restarting
QEMU for each machine being queried.

This series adds a new `machine` parameter to
query-cpu-definitions, that can be used to query CPU model alias
information for multiple machines without restarting QEMU.

Eduardo Habkost (7):
  i386: Use g_autofree at x86_cpu_list_entry()
  i386: Add default_version parameter to CPU version functions
  i386: Don't use default_cpu_version at "-cpu help"
  machine: machine_find_class() function
  i386: Remove x86_cpu_set_default_version() function
  i386: Don't use default_cpu_version() inside query-cpu-definitions
  cpu: Add `machine` parameter to query-cpu-definitions

 qapi/machine-target.json   | 14 +++-
 include/hw/boards.h|  1 +
 include/hw/i386/pc.h   |  5 +-
 target/i386/cpu.h  |  6 --
 hw/core/machine.c  | 16 
 hw/i386/pc.c   |  3 -
 target/arm/helper.c|  4 +-
 target/i386/cpu.c  | 93 +++---
 target/mips/helper.c   |  4 +-
 target/ppc/translate_init.inc.c|  4 +-
 target/s390x/cpu_models.c  |  4 +-
 vl.c   | 17 +---
 tests/acceptance/x86_cpu_model_versions.py | 42 ++
 13 files changed, 154 insertions(+), 59 deletions(-)

-- 
2.21.0




[PATCH 3/7] i386: Don't use default_cpu_version at "-cpu help"

2019-10-24 Thread Eduardo Habkost
The output of "-cpu help" doesn't change depending on the machine
type, already.  We can remove usage of default_cpu_version and
keep output exactly the same.

Signed-off-by: Eduardo Habkost 
---
 target/i386/cpu.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 843f8c4b68..8cecc669b3 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3980,10 +3980,11 @@ static void x86_cpu_list_entry(gpointer data, gpointer 
user_data)
 X86CPUClass *cc = X86_CPU_CLASS(oc);
 g_autofree char *name = x86_cpu_class_get_model_name(cc);
 g_autofree char *desc = g_strdup(cc->model_description);
-g_autofree char *alias_of = x86_cpu_class_get_alias_of(cc, 
default_cpu_version);
 
-if (!desc && alias_of) {
-if (cc->model && cc->model->version == CPU_VERSION_AUTO) {
+if (!desc && cc->model && cc->model->is_alias) {
+g_autofree char *alias_of =
+x86_cpu_class_get_alias_of(cc, CPU_VERSION_AUTO);
+if (!alias_of) {
 desc = g_strdup("(alias configured by machine type)");
 } else {
 desc = g_strdup_printf("(alias of %s)", alias_of);
-- 
2.21.0




[PATCH 1/7] i386: Use g_autofree at x86_cpu_list_entry()

2019-10-24 Thread Eduardo Habkost
Make the code shorter and simpler.

Signed-off-by: Eduardo Habkost 
---
 target/i386/cpu.c | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 0de8a22e1e..5b7c5b1177 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3976,9 +3976,9 @@ static void x86_cpu_list_entry(gpointer data, gpointer 
user_data)
 {
 ObjectClass *oc = data;
 X86CPUClass *cc = X86_CPU_CLASS(oc);
-char *name = x86_cpu_class_get_model_name(cc);
-char *desc = g_strdup(cc->model_description);
-char *alias_of = x86_cpu_class_get_alias_of(cc);
+g_autofree char *name = x86_cpu_class_get_model_name(cc);
+g_autofree char *desc = g_strdup(cc->model_description);
+g_autofree char *alias_of = x86_cpu_class_get_alias_of(cc);
 
 if (!desc && alias_of) {
 if (cc->model && cc->model->version == CPU_VERSION_AUTO) {
@@ -3992,9 +3992,6 @@ static void x86_cpu_list_entry(gpointer data, gpointer 
user_data)
 }
 
 qemu_printf("x86 %-20s  %-48s\n", name, desc);
-g_free(name);
-g_free(desc);
-g_free(alias_of);
 }
 
 /* list available CPU models and flags */
-- 
2.21.0




[PATCH 7/7] cpu: Add `machine` parameter to query-cpu-definitions

2019-10-24 Thread Eduardo Habkost
The new parameter can be used by management software to query for
CPU model alias information for multiple machines without
restarting QEMU.

Signed-off-by: Eduardo Habkost 
---
 qapi/machine-target.json   | 14 +++-
 target/arm/helper.c|  4 ++-
 target/i386/cpu.c  | 16 +++--
 target/mips/helper.c   |  4 ++-
 target/ppc/translate_init.inc.c|  4 ++-
 target/s390x/cpu_models.c  |  4 ++-
 tests/acceptance/x86_cpu_model_versions.py | 42 ++
 7 files changed, 81 insertions(+), 7 deletions(-)

diff --git a/qapi/machine-target.json b/qapi/machine-target.json
index 55310a6aa2..7bff3811fe 100644
--- a/qapi/machine-target.json
+++ b/qapi/machine-target.json
@@ -281,6 +281,10 @@
 #
 # @alias-of: Name of CPU model this model is an alias for.  The target of the
 #CPU model alias may change depending on the machine type.
+#If the @machine argument was provided to query-cpu-definitions,
+#alias information that machine type will be returned.
+#If @machine is not provided, alias information for
+#the current machine will be returned.
 #Management software is supposed to translate CPU model aliases
 #in the VM configuration, because aliases may stop being
 #migration-safe in the future (since 4.1)
@@ -317,9 +321,17 @@
 #
 # Return a list of supported virtual CPU definitions
 #
+# @machine: Name of machine type.  The command returns some data
+#   that machine-specific.  This overrides the machine type
+#   used to look up that information.  This can be used,
+#   for example, to query machine-specific CPU model aliases
+#   without restarting QEMU (since 4.2)
+#
 # Returns: a list of CpuDefInfo
 #
 # Since: 1.2.0
 ##
-{ 'command': 'query-cpu-definitions', 'returns': ['CpuDefinitionInfo'],
+{ 'command': 'query-cpu-definitions',
+  'data': { '*machine': 'str' },
+  'returns': ['CpuDefinitionInfo'],
   'if': 'defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_I386) || 
defined(TARGET_S390X) || defined(TARGET_MIPS)' }
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 0d9a2d2ab7..96f9fe7fff 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6965,7 +6965,9 @@ static void arm_cpu_add_definition(gpointer data, 
gpointer user_data)
 *cpu_list = entry;
 }
 
-CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
+CpuDefinitionInfoList *qmp_query_cpu_definitions(bool has_machine,
+ const char *machine,
+ Error **errp)
 {
 CpuDefinitionInfoList *cpu_list = NULL;
 GSList *list;
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 67d1eca4ed..ae633793ed 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -4078,11 +4078,23 @@ static void x86_cpu_definition_entry(gpointer data, 
gpointer user_data)
 args->cpu_list = entry;
 }
 
-CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
+CpuDefinitionInfoList *qmp_query_cpu_definitions(bool has_machine,
+ const char *machine,
+ Error **errp)
 {
 X86CPUDefinitionArgs args = { .cpu_list = NULL };
 GSList *list;
-MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
+MachineClass *mc;
+
+if (!has_machine) {
+mc = MACHINE_GET_CLASS(qdev_get_machine());
+} else {
+mc = machine_find_class(machine);
+if (!mc) {
+error_setg(errp, "Machine type '%s' not found", machine);
+return NULL;
+}
+}
 
 args.default_version = default_cpu_version_for_machine(mc);
 list = get_sorted_cpu_model_list();
diff --git a/target/mips/helper.c b/target/mips/helper.c
index a2b6459b05..a73c767462 100644
--- a/target/mips/helper.c
+++ b/target/mips/helper.c
@@ -1481,7 +1481,9 @@ static void mips_cpu_add_definition(gpointer data, 
gpointer user_data)
 *cpu_list = entry;
 }
 
-CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
+CpuDefinitionInfoList *qmp_query_cpu_definitions(bool has_machine,
+ const char *machine,
+ Error **errp)
 {
 CpuDefinitionInfoList *cpu_list = NULL;
 GSList *list;
diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
index ba726dec4d..4493309c4c 100644
--- a/target/ppc/translate_init.inc.c
+++ b/target/ppc/translate_init.inc.c
@@ -10350,7 +10350,9 @@ static void ppc_cpu_defs_entry(gpointer data, gpointer 
user_data)
 *first = entry;
 }
 
-CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
+CpuDefinitionInfoList *qmp_query_cpu_definitions(bool has_machine,
+ const char *machine,
+ 

Re: [PATCH v4 2/2] virtio-net: prevent offloads reset on migration

2019-10-24 Thread Jason Wang



On 2019/10/24 下午9:53, Mikhail Sennikovsky wrote:

Hi Guys,

Sorry I was on vacation last week, so did not track it much.
Seems like the patch has not been applied yet. Is this because there
are still some concerns about the way of fixing the problem?

Regards,
Mikhail



Applied.

Thanks




Re: [RFC v4 PATCH 00/49] Initial support of multi-process qemu

2019-10-24 Thread no-reply
Patchew URL: https://patchew.org/QEMU/cover.1571905346.git.jag.ra...@oracle.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [RFC v4 PATCH 00/49] Initial support of multi-process qemu
Type: series
Message-id: cover.1571905346.git.jag.ra...@oracle.com

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
75d605b multi-process: add configure and usage information
1724569 multi-process: add the concept description to 
docs/devel/qemu-multiprocess
15328b7 multi-process: Enable support for multiple devices in remote
5cf79267 multi-process/mig: Restore the VMSD in remote process
97c15c9 multi-process/mig: Synchronize runstate of remote process
1b67b17 multi-process/mig: refactor runstate_check into common file
55e4b53 multi-process/mig: Load VMSD in the proxy object
7e1b819 multi-process/mig: Send VMSD of remote to the Proxy object
399f9bf multi-process/mig: Enable VMSD save in the Proxy object
645fc27 multi-process/mig: build migration module in the remote process
f0265a7 multi-process: prevent duplicate memory initialization in remote
a0faf9e multi-process/mon: Initialize QMP module for remote processes
58310d9 multi-process/mon: Refactor monitor/chardev functions out of vl.c
ae4fd02 multi-process/mon: enable QMP module support in the remote process
d7e2191 multi-process/mon: stub functions to enable QMP module for remote 
process
2c67c85 multi-process/mon: choose HMP commands based on target
cb5ab3e multi-process: perform device reset in the remote process
3214409 multi-process: Use separate MMIO communication channel
c34c47f multi-process: handle heartbeat messages in remote process
ccd9230 multi-process: send heartbeat messages to remote
f4991d6 multi-process: add parse_cmdline in remote process
a90d6c6 multi-process: add remote options parser
d616c9d multi-process: add remote option
45c18dd multi-process: refractor vl.c code to re-use in remote
57b6105 multi-process: Introduce build flags to separate remote process code
1295409 multi-process: add processing of remote drive and device command line
e876f72 multi-process: remote: add create_done condition
effa3f0 multi-process: remote: use fd for socket from parent process
de69c89 multi-process: remote: add setup_devices and setup_drive msg processing
afc658d multi-process: add qdev_proxy_add to create proxy devices
70e0f47 multi-process: configure remote side devices
701a141 multi-process: create IOHUB object to handle irq
613c372 multi-process: Synchronize remote memory
f5183a9 multi-process: Add LSI device proxy object
7778ec0 multi-process: PCI BAR read/write handling for proxy & remote endpoints
736d74d mutli-process: build remote command line args
650f3d1 multi-process: introduce proxy object
9374d1a multi-process: remote process initialization
1965b18 multi-process: setup memory manager for remote device
719f823 multi-process: setup a machine object for remote device process
59bdda6 multi-process: setup PCI host bridge for remote device
139cdee multi-process: add functions to synchronize proxy and remote endpoints
1b3c1f0 multi-process: define mpqemu-link object
ac130ca multi-process: build system for remote device process
93774c4 multi-process: Add config option for multi-process QEMU
7e5f9b2 multi-process: Add stub functions to facilate build of multi-process
73740e6 multi-process: add a command line option for debug file
59f2f7d multi-process: util: Add qemu_thread_cancel() to cancel running thread
18b29a1 multi-process: memory: alloc RAM from file at offset

=== OUTPUT BEGIN ===
1/49 Checking commit 18b29a1306b2 (multi-process: memory: alloc RAM from file 
at offset)
2/49 Checking commit 59f2f7d24d20 (multi-process: util: Add 
qemu_thread_cancel() to cancel running thread)
3/49 Checking commit 73740e6eff21 (multi-process: add a command line option for 
debug file)
4/49 Checking commit 7e5f9b26d48c (multi-process: Add stub functions to 
facilate build of multi-process)
ERROR: suspect code indent for conditional statements (4, 4)
#137: FILE: accel/stubs/tcg-stub.c:109:
+while (1) {
+}

WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#151: 
new file mode 100644

total: 1 errors, 1 warnings, 376 lines checked

Patch 4/49 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

5/49 Checking commit 93774c4a2c28 (multi-process: Add config option for 
multi-process QEMU)
6/49 Checking commit ac130ca326fe (multi-process: build system for remote 
device process)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#286: 
new file mode 100644

total: 0 errors, 1 warn

Re: [RFC v4 PATCH 00/49] Initial support of multi-process qemu

2019-10-24 Thread no-reply
Patchew URL: https://patchew.org/QEMU/cover.1571905346.git.jag.ra...@oracle.com/



Hi,

This series failed the docker-mingw@fedora build test. Please find the testing 
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.

=== TEST SCRIPT BEGIN ===
#! /bin/bash
export ARCH=x86_64
make docker-image-fedora V=1 NETWORK=1
time make docker-test-mingw@fedora J=14 NETWORK=1
=== TEST SCRIPT END ===

  CC  util/aio-wait.o
  CC  util/thread-pool.o

Warning, treated as error:
/tmp/qemu-test/src/docs/devel/index.rst:13:toctree contains reference to 
nonexisting document 'multi-process'
  CC  util/qemu-timer.o
  CC  util/main-loop.o
make: *** [Makefile:1003: docs/devel/index.html] Error 2
make: *** Waiting for unfinished jobs
Traceback (most recent call last):
  File "./tests/docker/docker.py", line 662, in 
---
raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', 
'--label', 'com.qemu.instance.uuid=f573792346ea4c8cb0e6066fdd1f1ddf', '-u', 
'1003', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=', 
'-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', '-e', 
'SHOW_ENV=', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', 
'/home/patchew2/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', 
'/var/tmp/patchew-tester-tmp-pe_jt46w/src/docker-src.2019-10-24-22.05.58.3272:/var/tmp/qemu:z,ro',
 'qemu:fedora', '/var/tmp/qemu/run', 'test-mingw']' returned non-zero exit 
status 2.
filter=--filter=label=com.qemu.instance.uuid=f573792346ea4c8cb0e6066fdd1f1ddf
make[1]: *** [docker-run] Error 1
make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-pe_jt46w/src'
make: *** [docker-run-test-mingw@fedora] Error 2

real2m19.037s
user0m7.875s


The full log is available at
http://patchew.org/logs/cover.1571905346.git.jag.ra...@oracle.com/testing.docker-mingw@fedora/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-de...@redhat.com

Re: [RFC PATCH] iothread: add set_iothread_poll_* commands

2019-10-24 Thread Zhenyu Ye



On 2019/10/24 22:38, Dr. David Alan Gilbert wrote:
> * Zhenyu Ye (yezhen...@huawei.com) wrote:
>>
>>
>> On 2019/10/24 21:56, Dr. David Alan Gilbert wrote:
>>> * Zhenyu Ye (yezhen...@huawei.com) wrote:


 On 2019/10/23 23:19, Stefan Hajnoczi wrote:
> On Tue, Oct 22, 2019 at 04:12:03PM +0800, yezhenyu (A) wrote:
>> Since qemu2.9, QEMU added three AioContext poll parameters to struct
>> IOThread: poll_max_ns, poll_grow and poll_shrink. These properties are
>> used to control iothread polling time.
>>
>> However, there isn't properly hmp commands to adjust them when the VM is
>> alive. It's useful to adjust them online when observing the impact of
>> different property value on performance.
>>
>> This patch add three hmp commands to adjust iothread poll-* properties
>> for special iothread:
>>
>> set_iothread_poll_max_ns: set the maximum polling time in ns;
>> set_iothread_poll_grow: set how many ns will be added to polling time;
>> set_iothread_poll_shrink: set how many ns will be removed from polling
>> time.
>>
>> Signed-off-by: Zhenyu Ye 
>> ---
>> hmp-commands.hx | 42 
>> hmp.c | 30 +++
>> hmp.h | 3 ++
>> include/sysemu/iothread.h | 6 +++
>> iothread.c | 80 +++
>> qapi/misc.json | 23 +++
>> 6 files changed, 184 insertions(+)
>
> poll-max-ns, poll-grow, poll-shrink are properties of IOThread objects.
> They can already be modified at runtime using:
>
>   $ qemu -object iothread,id=iothread1
>   (qemu) qom-set /objects/iothread1 poll-max-ns 10
>
> I think there is no need for a patch.
>
> Stefan
>

 Thanks for your review. I have considered using the `qom-set` command to 
 modify
 IOThread object's properties, however, this command is not friendly to 
 primary
 users. The help info for this command is only:

 qom-set path property value -- set QOM property

 It's almost impossible to get the correct `path` parameter for primary 
 user.
>>>
>>> Is this just a matter of documenting how to do it?
>>>
>>> It sounds like there's no need for a new QMP command though;  if you
>>> want an easier HMP command I'd probably still take it (because HMP is ok
>>> at having things for convenience) - but not if it turns out that just
>>> adding a paragraph of documentation is enough.
>>>
>>> Dave
>>>
>>
>> I will show the differences in QMP and HMP:
>> If I want to set iothread1.poll-max-ns=1000 and iothread1.poll-grow=2:
>>
>> Without this patch:
>> QMP command:
>>
>> qom-set /objects/iothread1 poll-max-ns 1000
>> qom-set /objects/iothread1 poll-grow 2
>>
>> HMP command:
>>
>> { "execute": "qom-set", "arguments": { "path": "/objects/iothread1",
>>"property": "poll-max-ns", 
>> "value": 1000 } }
>> { "execute": "qom-set", "arguments": { "path": "/objects/iothread1",
>>"property": "poll-grow", "value": 
>> 2} }
>>
>> with this patch:
>> QMP command:
>>
>> iothread_set_parameter iothread1 max-ns 1000
>> iothread_set_parameter iothread1 grow 2
>>
>> HMP command:
>>
>> { "execute": "set-iothread-poll-params", "arguments': { "iothread-id": 
>> "iothread1",
>> "max-ns": 1000, 
>> "grow": 2 } }
>>
>>
>> I think the inconvenience of qom-set is how to get the correct `path` 
>> parameter.
>> Anyway, I will consider your advice.
> 
> So it depends how obvious the path is;  if it's just   /objects/
> followed by whatever you used with id=  when you created the iothread
> then I think it's easy - we just need to update the docs.
> Is there a case where it's harder to know?
> 
> Dave
> 

You are right, it's just /objects/ followed by the id. Maybe we just need
to update the docs for qom-set.

>>
 This patch provides a more convenient and easy-use hmp&qmp interface to 
 modify
 these IOThread properties. I think this patch still has a little value.

 And I can implement this patch compactly by reusing your code.

 Waiting for your reply.

>>> --
>>> Dr. David Alan Gilbert / dgilb...@redhat.com / Manchester, UK
>>>
>>>
>>> .
>>>
>>
> --
> Dr. David Alan Gilbert / dgilb...@redhat.com / Manchester, UK
> 
> 
> .
> 




Re: [RFC v4 PATCH 00/49] Initial support of multi-process qemu

2019-10-24 Thread no-reply
Patchew URL: https://patchew.org/QEMU/cover.1571905346.git.jag.ra...@oracle.com/



Hi,

This series failed the docker-quick@centos7 build test. Please find the testing 
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.

=== TEST SCRIPT BEGIN ===
#!/bin/bash
make docker-image-centos7 V=1 NETWORK=1
time make docker-test-quick@centos7 SHOW_ENV=1 J=14 NETWORK=1
=== TEST SCRIPT END ===

  TESTiotest-qcow2: 268
Failures: 071 099 120 184 186
Failed 5 of 109 iotests
make: *** [check-tests/check-block.sh] Error 1
make: *** Waiting for unfinished jobs
  TESTcheck-qtest-aarch64: tests/qos-test
Traceback (most recent call last):
---
raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', 
'--label', 'com.qemu.instance.uuid=7fcd537d324f4e2997dd5a6e772bce59', '-u', 
'1001', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=', 
'-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', '-e', 
'SHOW_ENV=1', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', 
'/home/patchew/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', 
'/var/tmp/patchew-tester-tmp-k9w5q7fm/src/docker-src.2019-10-24-21.54.49.17993:/var/tmp/qemu:z,ro',
 'qemu:centos7', '/var/tmp/qemu/run', 'test-quick']' returned non-zero exit 
status 2.
filter=--filter=label=com.qemu.instance.uuid=7fcd537d324f4e2997dd5a6e772bce59
make[1]: *** [docker-run] Error 1
make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-k9w5q7fm/src'
make: *** [docker-run-test-quick@centos7] Error 2

real13m26.478s
user0m8.947s


The full log is available at
http://patchew.org/logs/cover.1571905346.git.jag.ra...@oracle.com/testing.docker-quick@centos7/?type=message.
---
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Please send your feedback to patchew-de...@redhat.com

Re: [PATCH v13 01/12] util/cutils: Add qemu_strtotime_ps()

2019-10-24 Thread Tao Xu

On 10/24/2019 9:20 PM, Eduardo Habkost wrote:

On Thu, Oct 24, 2019 at 10:54:57AM +0100, Daniel P. Berrangé wrote:

On Sun, Oct 20, 2019 at 07:11:14PM +0800, Tao Xu wrote:

To convert strings with time suffixes to numbers, support time unit are
"ps" for picosecond, "ns" for nanosecond, "us" for microsecond, "ms"
for millisecond or "s" for second.

Signed-off-by: Tao Xu 
---

No changes in v13.
---
  include/qemu/cutils.h |  1 +
  util/cutils.c | 82 +++
  2 files changed, 83 insertions(+)


This really ought to have an addition to the unit tests to validating
the parsing, both success and error scenarios, so that we're clear on
exactly what strings are accepted & rejected.


Unit tests are in patch 02/12.  It's a good idea to squash
patches 01 and 02 together.


Yes it is in 02/12. OK I will squash them.



Re: [PATCH v4 1/2] hw: rtc: Add Goldfish RTC device

2019-10-24 Thread Alistair Francis
On Tue, Oct 22, 2019 at 11:37 PM Anup Patel  wrote:
>
> This patch adds model for Google Goldfish virtual platform RTC device.
>
> We will be adding Goldfish RTC device to the QEMU RISC-V virt machine
> for providing real date-time to Guest Linux. The corresponding Linux
> driver for Goldfish RTC device is already available in upstream Linux.
>
> For now, VM migration support is available but untested for Goldfish RTC
> device. It will be hardened in-future when we implement VM migration for
> KVM RISC-V.
>
> Signed-off-by: Anup Patel 
> ---
>  hw/rtc/Kconfig  |   3 +
>  hw/rtc/Makefile.objs|   1 +
>  hw/rtc/goldfish_rtc.c   | 288 
>  hw/rtc/trace-events |   4 +
>  include/hw/timer/goldfish_rtc.h |  46 +
>  5 files changed, 342 insertions(+)
>  create mode 100644 hw/rtc/goldfish_rtc.c
>  create mode 100644 include/hw/timer/goldfish_rtc.h
>
> diff --git a/hw/rtc/Kconfig b/hw/rtc/Kconfig
> index 45daa8d655..bafe6ac2c9 100644
> --- a/hw/rtc/Kconfig
> +++ b/hw/rtc/Kconfig
> @@ -21,3 +21,6 @@ config MC146818RTC
>
>  config SUN4V_RTC
>  bool
> +
> +config GOLDFISH_RTC
> +bool
> diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs
> index 8dc9fcd3a9..aa208d0d10 100644
> --- a/hw/rtc/Makefile.objs
> +++ b/hw/rtc/Makefile.objs
> @@ -11,3 +11,4 @@ common-obj-$(CONFIG_EXYNOS4) += exynos4210_rtc.o
>  obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
>  common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
>  common-obj-$(CONFIG_ASPEED_SOC) += aspeed_rtc.o
> +common-obj-$(CONFIG_GOLDFISH_RTC) += goldfish_rtc.o
> diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c
> new file mode 100644
> index 00..f49a8e4489
> --- /dev/null
> +++ b/hw/rtc/goldfish_rtc.c
> @@ -0,0 +1,288 @@
> +/*
> + * Goldfish virtual platform RTC
> + *
> + * Copyright (C) 2019 Western Digital Corporation or its affiliates.
> + *
> + * For more details on Google Goldfish virtual platform refer:
> + * 
> https://android.googlesource.com/platform/external/qemu/+/master/docs/GOLDFISH-VIRTUAL-HARDWARE.TXT
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2 or later, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * You should have received a copy of the GNU General Public License along 
> with
> + * this program.  If not, see .
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu-common.h"
> +#include "hw/timer/goldfish_rtc.h"
> +#include "migration/vmstate.h"
> +#include "hw/irq.h"
> +#include "hw/qdev-properties.h"
> +#include "hw/sysbus.h"
> +#include "qemu/timer.h"
> +#include "sysemu/sysemu.h"
> +#include "qemu/cutils.h"
> +#include "qemu/log.h"
> +
> +#include "trace.h"
> +
> +#define RTC_TIME_LOW0x00
> +#define RTC_TIME_HIGH   0x04
> +#define RTC_ALARM_LOW   0x08
> +#define RTC_ALARM_HIGH  0x0c
> +#define RTC_IRQ_ENABLED 0x10
> +#define RTC_CLEAR_ALARM 0x14
> +#define RTC_ALARM_STATUS0x18
> +#define RTC_CLEAR_INTERRUPT 0x1c
> +
> +static void goldfish_rtc_update(GoldfishRTCState *s)
> +{
> +qemu_set_irq(s->irq, (s->irq_pending & s->irq_enabled) ? 1 : 0);
> +}
> +
> +static void goldfish_rtc_interrupt(void *opaque)
> +{
> +GoldfishRTCState *s = (GoldfishRTCState *)opaque;
> +
> +s->alarm_running = 0;
> +s->irq_pending = 1;
> +goldfish_rtc_update(s);
> +}
> +
> +static uint64_t goldfish_rtc_get_count(GoldfishRTCState *s)
> +{
> +return s->tick_offset + (uint64_t)qemu_clock_get_ns(rtc_clock);
> +}
> +
> +static void goldfish_rtc_clear_alarm(GoldfishRTCState *s)
> +{
> +timer_del(s->timer);
> +s->alarm_running = 0;
> +}
> +
> +static void goldfish_rtc_set_alarm(GoldfishRTCState *s)
> +{
> +uint64_t ticks = goldfish_rtc_get_count(s);
> +uint64_t event = s->alarm_next;
> +
> +if (event <= ticks) {
> +goldfish_rtc_clear_alarm(s);
> +goldfish_rtc_interrupt(s);
> +} else {
> +/*
> + * We should be setting timer expiry to:
> + * qemu_clock_get_ns(rtc_clock) + (event - ticks)
> + * but this is equivalent to:
> + * event - s->tick_offset
> + */
> +timer_mod(s->timer, event - s->tick_offset);
> +s->alarm_running = 1;
> +}
> +}
> +
> +static uint64_t goldfish_rtc_read(void *opaque, hwaddr offset,
> +  unsigned size)
> +{
> +GoldfishRTCState *s = (GoldfishRTCState *)opaque;

This shouldn't be cast, use GOLDFISH_RTC(opaque) instead

> +uint64_t r = 0;
> +
> +switch (offset) {
> +case RTC_TIME_LOW:
> +r =

Re: [PATCH v2 0/4] apic: Fix migration breakage of >255 vcpus

2019-10-24 Thread Peter Xu
On Thu, Oct 24, 2019 at 01:49:11PM -0400, John Snow wrote:
> 
> 
> On 10/23/19 4:17 AM, Kevin Wolf wrote:
> > The important difference here is legacy IDE (which works) vs. AHCI
> > (which doesn't work). If you add a -device ahci to the -M pc case, it
> > starts failing, too.
> > 
> > Not sure why AHCI fails, but I'll just CC John who is the lucky
> > maintainer of this device. :-)
> 
> Hm... It looks like SeaBIOS is identifying the drive correctly and
> perfectly well, but we're failing at boot_disk(u8 bootdrv, int
> checksig), about here:
> 
> call16_int(0x13, &br);
> 
> if (br.flags & F_CF) {
> printf("Boot failed: could not read the boot disk\n\n");
> return;
> }
> 
> Looking at AHCI tracing (From the QEMU side), it looks like we set up
> the drive correctly, and then never touch the port ever again -- I don't
> see an attempted read on QEMU's end.
> 
> I'll need to look through SeaBIOS source for hints, I'm not sure right
> yet. If anyone is more familiar with the SeaBIOS boot code, maybe they
> can give a pointer faster than I'll figure it out myself.

Hi, John,

I don't know seabios well, but I did have a pointer in my previous
email on where it faulted.  It seems to me that the issue is that
SeaBIOS may have got incorrect secs/cyls/heads information (and
explicitly setting secs=1,cyls=1,heads=1 on the block device fixes the
issue).

Thanks,

-- 
Peter Xu



[PATCH] Semihost SYS_READC implementation (v4)

2019-10-24 Thread Keith Packard
Provides a blocking call to read a character from the console using
semihosting.chardev, if specified. This takes some careful command
line options to use stdio successfully as the serial ports, monitor
and semihost all want to use stdio. Here's a sample set of command
line options which share stdio betwen semihost, monitor and serial
ports:

qemu \
-chardev stdio,mux=on,id=stdio0 \
-serial chardev:stdio0 \
-semihosting-config enable=on,chardev=stdio0 \
-mon chardev=stdio0,mode=readline

This creates a chardev hooked to stdio and then connects all of the
subsystems to it. A shorter mechanism would be good to hear about.

v2:
Add implementation in linux-user/arm/semihost.c

v3:  (thanks to Paolo Bonzini )
Replace hand-rolled fifo with fifo8
Avoid mixing code and declarations
Remove spurious (void) cast of function parameters
Define qemu_semihosting_console_init when CONFIG_USER_ONLY

v4:
Add qemu_semihosting_console_init to stubs/semihost.c for
hosts that don't support semihosting

Signed-off-by: Keith Packard 
---
 hw/semihosting/console.c  | 73 +++
 include/hw/semihosting/console.h  | 12 +
 include/hw/semihosting/semihost.h |  4 ++
 linux-user/arm/semihost.c | 24 ++
 target/arm/arm-semi.c |  3 +-
 vl.c  |  3 ++
 6 files changed, 117 insertions(+), 2 deletions(-)

diff --git a/hw/semihosting/console.c b/hw/semihosting/console.c
index b4b17c8afb..197bff079b 100644
--- a/hw/semihosting/console.c
+++ b/hw/semihosting/console.c
@@ -98,3 +98,76 @@ void qemu_semihosting_console_outc(CPUArchState *env, 
target_ulong addr)
   __func__, addr);
 }
 }
+
+#include 
+#include "chardev/char-fe.h"
+#include "sysemu/sysemu.h"
+#include "qemu/main-loop.h"
+#include "qapi/error.h"
+#include "qemu/fifo8.h"
+
+#define FIFO_SIZE   1024
+
+typedef struct SemihostingConsole {
+CharBackend backend;
+pthread_mutex_t mutex;
+pthread_cond_t  cond;
+boolgot;
+Fifo8   fifo;
+} SemihostingConsole;
+
+static SemihostingConsole console = {
+.mutex = PTHREAD_MUTEX_INITIALIZER,
+.cond = PTHREAD_COND_INITIALIZER
+};
+
+static int console_can_read(void *opaque)
+{
+SemihostingConsole *c = opaque;
+int ret;
+pthread_mutex_lock(&c->mutex);
+ret = (int) fifo8_num_free(&c->fifo);
+pthread_mutex_unlock(&c->mutex);
+return ret;
+}
+
+static void console_read(void *opaque, const uint8_t *buf, int size)
+{
+SemihostingConsole *c = opaque;
+pthread_mutex_lock(&c->mutex);
+while (size-- && !fifo8_is_full(&c->fifo)) {
+fifo8_push(&c->fifo, *buf++);
+}
+pthread_cond_broadcast(&c->cond);
+pthread_mutex_unlock(&c->mutex);
+}
+
+target_ulong qemu_semihosting_console_inc(CPUArchState *env)
+{
+uint8_t ch;
+SemihostingConsole *c = &console;
+qemu_mutex_unlock_iothread();
+pthread_mutex_lock(&c->mutex);
+while (fifo8_is_empty(&c->fifo)) {
+pthread_cond_wait(&c->cond, &c->mutex);
+}
+ch = fifo8_pop(&c->fifo);
+pthread_mutex_unlock(&c->mutex);
+qemu_mutex_lock_iothread();
+return (target_ulong) ch;
+}
+
+void qemu_semihosting_console_init(void)
+{
+Chardev *chr = semihosting_get_chardev();
+
+if  (chr) {
+fifo8_create(&console.fifo, FIFO_SIZE);
+qemu_chr_fe_init(&console.backend, chr, &error_abort);
+qemu_chr_fe_set_handlers(&console.backend,
+ console_can_read,
+ console_read,
+ NULL, NULL, &console,
+ NULL, true);
+}
+}
diff --git a/include/hw/semihosting/console.h b/include/hw/semihosting/console.h
index 9be9754bcd..f7d5905b41 100644
--- a/include/hw/semihosting/console.h
+++ b/include/hw/semihosting/console.h
@@ -37,6 +37,18 @@ int qemu_semihosting_console_outs(CPUArchState *env, 
target_ulong s);
  */
 void qemu_semihosting_console_outc(CPUArchState *env, target_ulong c);
 
+/**
+ * qemu_semihosting_console_inc:
+ * @env: CPUArchState
+ *
+ * Receive single character from debug console. This
+ * may be the remote gdb session if a softmmu guest is currently being
+ * debugged.
+ *
+ * Returns: character read or -1 on error
+ */
+target_ulong qemu_semihosting_console_inc(CPUArchState *env);
+
 /**
  * qemu_semihosting_log_out:
  * @s: pointer to string
diff --git a/include/hw/semihosting/semihost.h 
b/include/hw/semihosting/semihost.h
index 60fc42d851..b8ce5117ae 100644
--- a/include/hw/semihosting/semihost.h
+++ b/include/hw/semihosting/semihost.h
@@ -56,6 +56,9 @@ static inline Chardev *semihosting_get_chardev(void)
 {
 return NULL;
 }
+static inline void qemu_semihosting_console_init(void)
+{
+}
 #else /* !CONFIG_USER_ONLY */
 bool semihosting_enabled(void);
 SemihostingTarget semihosting_get_target(void);

Re: qemu crashing when attaching an ISO file to a virtio-scsi CD-ROM device through libvirt

2019-10-24 Thread Fernando Casas Schössow
BTW just to be clear, qemu is crashing in this scenario *only* if 
iothread is enabled for the guest.
Without iothread enabled the operation is completed without any 
problems.

On jue, oct 24, 2019 at 11:07 PM, Fernando Casas Schössow 
 wrote:
> Today I updated to qemu 4.0.1 since this was the latest version 
> available for Alpine and I can confirm that I can repro the issue 
> with this version as well.
> Not sure if relevant but I can also confirm that the problem happens 
> with Windows Server 2012 R2 but also with Linux guests (it doesn't 
> matter if the guest use uefi or bios firmware). I made this tests 
> just to discard things.
> 
> Also as discussed I compiled qemu with debug symbols, repro the 
> problem, collected a core dump and run both through gdb. This is the 
> result:
> 
> (gdb) thread apply all bt
> 
> Thread 42 (LWP 33704):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fee02380b64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 41 (LWP 33837):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedc1ad5b64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 40 (LWP 33719):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fee02266b64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 39 (LWP 33696):
> #0 0x7fee04233171 in syscall () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee02be8b64 in ?? ()
> #2 0x0030 in ?? ()
> #3 0x7fee02be2540 in ?? ()
> #4 0x7fee02be2500 in ?? ()
> #5 0x7fee02be2548 in ?? ()
> #6 0x55d7e4987f28 in rcu_gp_event ()
> #7 0x in ?? ()
> 
> Thread 38 (LWP 33839):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedc1a83b64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 37 (LWP 33841):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedc1737b64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 36 (LWP 33863):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedb8c83b64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 35 (LWP 33842):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedc170eb64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 34 (LWP 33862):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedb8cacb64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 33 (LWP 33843):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedc16e5b64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 32 (LWP 33861):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedb8cd5b64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 31 (LWP 33844):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedc16bcb64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 30 (LWP 33858):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedb8e83b64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 29 (LWP 33845):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedc1693b64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 28 (LWP 33857):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedb8eacb64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 27 (LWP 33846):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedc166ab64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 26 (LWP 33856):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedb8ed5b64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 25 (LWP 33847):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
> #1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
> #2 0x7fedc142ab64 in ?? ()
> #3 0x in ?? ()
> 
> Thread 24 (LWP 33855):
> #0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
>

Re: [PATCH 3/3] Acceptance Tests: use avocado tags for machine type

2019-10-24 Thread Wainer dos Santos Moschetta

Hello,

On 9/24/19 4:45 PM, Cleber Rosa wrote:

The same way the arch tag is being used as a fallback for the arch
parameter, let's do the same for QEMU's machine and avoid some boiler
plate code.

This requires a bump in the Avocado version, as starting with 72.0,
the characters supported in tags are less strict.

Signed-off-by: Cleber Rosa 
---
  docs/devel/testing.rst | 18 
  tests/acceptance/avocado_qemu/__init__.py  |  5 ++
  tests/acceptance/boot_linux_console.py | 15 +-
  tests/acceptance/cpu_queries.py|  2 +-
  tests/acceptance/linux_initrd.py   |  2 +-
  tests/acceptance/linux_ssh_mips_malta.py   |  5 --
  tests/acceptance/machine_m68k_nextcube.py  | 21 ++---
  tests/acceptance/x86_cpu_model_versions.py | 53 --
  8 files changed, 71 insertions(+), 50 deletions(-)



Reviewed-by: Wainer dos Santos Moschetta 




diff --git a/docs/devel/testing.rst b/docs/devel/testing.rst
index bf75675fb0..1816ada919 100644
--- a/docs/devel/testing.rst
+++ b/docs/devel/testing.rst
@@ -744,6 +744,17 @@ name.  If one is not given explicitly, it will either be 
set to
  ``None``, or, if the test is tagged with one (and only one)
  ``:avocado: tags=arch:VALUE`` tag, it will be set to ``VALUE``.
  
+machine

+~~~
+
+The machine type that will be set to all QEMUMachine instances created
+by the test.
+
+The ``machine`` attribute will be set to the test parameter of the same
+name.  If one is not given explicitly, it will either be set to
+``None``, or, if the test is tagged with one (and only one)
+``:avocado: tags=machine:VALUE`` tag, it will be set to ``VALUE``.
+
  qemu_bin
  
  
@@ -779,6 +790,13 @@ architecture of a kernel or disk image to boot a VM with.

  This parameter has a direct relation with the ``arch`` attribute.  If
  not given, it will default to None.
  
+machine

+~~~
+
+The machine type that will be set to all QEMUMachine instances created
+by the test.
+
+
  qemu_bin
  
  
diff --git a/tests/acceptance/avocado_qemu/__init__.py b/tests/acceptance/avocado_qemu/__init__.py

index 02775bafcf..fb5d6616bc 100644
--- a/tests/acceptance/avocado_qemu/__init__.py
+++ b/tests/acceptance/avocado_qemu/__init__.py
@@ -69,6 +69,9 @@ class Test(avocado.Test):
  self.arch = self.params.get('arch',
  default=self._get_unique_tag_val('arch'))
  
+self.machine = self.params.get('machine',

+   
default=self._get_unique_tag_val('machine'))
+
  default_qemu_bin = pick_default_qemu_bin(arch=self.arch)
  self.qemu_bin = self.params.get('qemu_bin',
  default=default_qemu_bin)
@@ -90,6 +93,8 @@ class Test(avocado.Test):
  name = str(uuid.uuid4())
  if self._vms.get(name) is None:
  self._vms[name] = self._new_vm(*args)
+if self.machine is not None:
+self._vms[name].set_machine(self.machine)
  return self._vms[name]
  
  def tearDown(self):

diff --git a/tests/acceptance/boot_linux_console.py 
b/tests/acceptance/boot_linux_console.py
index 8a9a314ab4..3d2a53d4c8 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -82,7 +82,6 @@ class BootLinuxConsole(Test):
  kernel_hash = '23bebd2680757891cf7adedb033532163a792495'
  kernel_path = self.fetch_asset(kernel_url, asset_hash=kernel_hash)
  
-self.vm.set_machine('pc')

  self.vm.set_console()
  kernel_command_line = self.KERNEL_COMMON_COMMAND_LINE + 
'console=ttyS0'
  self.vm.add_args('-kernel', kernel_path,
@@ -105,7 +104,6 @@ class BootLinuxConsole(Test):
  kernel_path = self.extract_from_deb(deb_path,
  
'/boot/vmlinux-2.6.32-5-4kc-malta')
  
-self.vm.set_machine('malta')

  self.vm.set_console()
  kernel_command_line = self.KERNEL_COMMON_COMMAND_LINE + 
'console=ttyS0'
  self.vm.add_args('-kernel', kernel_path,
@@ -138,7 +136,6 @@ class BootLinuxConsole(Test):
  kernel_path = self.extract_from_deb(deb_path,
  
'/boot/vmlinux-2.6.32-5-5kc-malta')
  
-self.vm.set_machine('malta')

  self.vm.set_console()
  kernel_command_line = self.KERNEL_COMMON_COMMAND_LINE + 
'console=ttyS0'
  self.vm.add_args('-kernel', kernel_path,
@@ -171,7 +168,6 @@ class BootLinuxConsole(Test):
  with open(initrd_path, 'wb') as f_out:
  shutil.copyfileobj(f_in, f_out)
  
-self.vm.set_machine('malta')

  self.vm.set_console()
  kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE
 + 'console=ttyS0 console=tty '
@@ -197,7 +193,6 @@ class BootLinuxConsole(Test):
  with open(kernel_path, 'wb') as f_out:
  shutil.copyfileobj(

Re: [PATCH 2/3] Acceptance tests: introduce utility method for tags unique vals

2019-10-24 Thread Wainer dos Santos Moschetta

Hi Cleber,

On 9/24/19 4:45 PM, Cleber Rosa wrote:

Currently a test can describe the target architecture binary that it
should primarily be run with, be setting a single tag value.

The same approach is expected to be done with other QEMU aspects to be
tested, for instance, the machine type and accelerator, so let's
generalize the logic into a utility method.

Signed-off-by: Cleber Rosa 
---
  tests/acceptance/avocado_qemu/__init__.py | 19 +--
  1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/tests/acceptance/avocado_qemu/__init__.py 
b/tests/acceptance/avocado_qemu/__init__.py
index bd41e0443c..02775bafcf 100644
--- a/tests/acceptance/avocado_qemu/__init__.py
+++ b/tests/acceptance/avocado_qemu/__init__.py
@@ -54,14 +54,21 @@ def pick_default_qemu_bin(arch=None):
  
  
  class Test(avocado.Test):

+def _get_unique_tag_val(self, tag_name):
+"""
+Gets a tag value, if unique for a key
+"""
+vals = self.tags.get(tag_name, [])
+if len(vals) == 1:



An small optimization:

if vals:

  return vals.pop()



+return vals.pop()
+return None


Does it allows to express a scenario like "I want my test method to run 
on x86_64 and aarch64" using tags? If so, _get_unique_tag_val logic 
returns None for multi-value tags (e.g. 'tags=arch:x86_64,arch:aarch64').


Thanks,

Wainer


+
  def setUp(self):
  self._vms = {}
-arches = self.tags.get('arch', [])
-if len(arches) == 1:
-arch = arches.pop()
-else:
-arch = None
-self.arch = self.params.get('arch', default=arch)
+
+self.arch = self.params.get('arch',
+default=self._get_unique_tag_val('arch'))
+
  default_qemu_bin = pick_default_qemu_bin(arch=self.arch)
  self.qemu_bin = self.params.get('qemu_bin',
  default=default_qemu_bin)





Re: [PATCH qemu] spapr: Add /choses to FDT only at reset time to preserve kernel and initramdisk

2019-10-24 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20191024041308.5673-1-...@ozlabs.ru/



Hi,

This series failed the docker-quick@centos7 build test. Please find the testing 
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.

=== TEST SCRIPT BEGIN ===
#!/bin/bash
make docker-image-centos7 V=1 NETWORK=1
time make docker-test-quick@centos7 SHOW_ENV=1 J=14 NETWORK=1
=== TEST SCRIPT END ===

  TESTiotest-qcow2: 268
Failures: 192
Failed 1 of 109 iotests
make: *** [check-tests/check-block.sh] Error 1
Traceback (most recent call last):
  File "./tests/docker/docker.py", line 662, in 
sys.exit(main())
---
raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', 
'--label', 'com.qemu.instance.uuid=5d5462280d174ce88f8f69048bbd8b1f', '-u', 
'1003', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=', 
'-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', '-e', 
'SHOW_ENV=1', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', 
'/home/patchew2/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', 
'/var/tmp/patchew-tester-tmp-5s094kqm/src/docker-src.2019-10-24-16.56.10.18617:/var/tmp/qemu:z,ro',
 'qemu:centos7', '/var/tmp/qemu/run', 'test-quick']' returned non-zero exit 
status 2.
filter=--filter=label=com.qemu.instance.uuid=5d5462280d174ce88f8f69048bbd8b1f
make[1]: *** [docker-run] Error 1
make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-5s094kqm/src'
make: *** [docker-run-test-quick@centos7] Error 2

real14m14.511s
user0m8.352s


The full log is available at
http://patchew.org/logs/20191024041308.5673-1-...@ozlabs.ru/testing.docker-quick@centos7/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-de...@redhat.com

Re: qemu crashing when attaching an ISO file to a virtio-scsi CD-ROM device through libvirt

2019-10-24 Thread Fernando Casas Schössow
Today I updated to qemu 4.0.1 since this was the latest version 
available for Alpine and I can confirm that I can repro the issue with 
this version as well.
Not sure if relevant but I can also confirm that the problem happens 
with Windows Server 2012 R2 but also with Linux guests (it doesn't 
matter if the guest use uefi or bios firmware). I made this tests just 
to discard things.

Also as discussed I compiled qemu with debug symbols, repro the 
problem, collected a core dump and run both through gdb. This is the 
result:

(gdb) thread apply all bt

Thread 42 (LWP 33704):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fee02380b64 in ?? ()
#3 0x in ?? ()

Thread 41 (LWP 33837):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedc1ad5b64 in ?? ()
#3 0x in ?? ()

Thread 40 (LWP 33719):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fee02266b64 in ?? ()
#3 0x in ?? ()

Thread 39 (LWP 33696):
#0 0x7fee04233171 in syscall () from /lib/ld-musl-x86_64.so.1
#1 0x7fee02be8b64 in ?? ()
#2 0x0030 in ?? ()
#3 0x7fee02be2540 in ?? ()
#4 0x7fee02be2500 in ?? ()
#5 0x7fee02be2548 in ?? ()
#6 0x55d7e4987f28 in rcu_gp_event ()
#7 0x in ?? ()

Thread 38 (LWP 33839):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedc1a83b64 in ?? ()
#3 0x in ?? ()

Thread 37 (LWP 33841):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedc1737b64 in ?? ()
#3 0x in ?? ()

Thread 36 (LWP 33863):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedb8c83b64 in ?? ()
#3 0x in ?? ()

Thread 35 (LWP 33842):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedc170eb64 in ?? ()
#3 0x in ?? ()

Thread 34 (LWP 33862):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedb8cacb64 in ?? ()
#3 0x in ?? ()

Thread 33 (LWP 33843):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedc16e5b64 in ?? ()
#3 0x in ?? ()

Thread 32 (LWP 33861):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedb8cd5b64 in ?? ()
#3 0x in ?? ()

Thread 31 (LWP 33844):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedc16bcb64 in ?? ()
#3 0x in ?? ()

Thread 30 (LWP 33858):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedb8e83b64 in ?? ()
#3 0x in ?? ()

Thread 29 (LWP 33845):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedc1693b64 in ?? ()
#3 0x in ?? ()

Thread 28 (LWP 33857):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedb8eacb64 in ?? ()
#3 0x in ?? ()

Thread 27 (LWP 33846):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedc166ab64 in ?? ()
#3 0x in ?? ()

Thread 26 (LWP 33856):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedb8ed5b64 in ?? ()
#3 0x in ?? ()

Thread 25 (LWP 33847):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedc142ab64 in ?? ()
#3 0x in ?? ()

Thread 24 (LWP 33855):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedb8efeb64 in ?? ()
#3 0x in ?? ()

Thread 23 (LWP 33848):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedbd0feb64 in ?? ()
#3 0x in ?? ()

Thread 22 (LWP 33854):
#0 0x7fee04252080 in ?? () from /lib/ld-musl-x86_64.so.1
#1 0x7fee0424f4b6 in ?? () from /lib/ld-musl-x86_64.so.1
#2 0x7fedbd031b64 in 

Re: [PATCH 3/3] qemu-timer: reuse MIN macro in qemu_timeout_ns_to_ms

2019-10-24 Thread Eric Blake

On 10/24/19 1:11 PM, Laurent Vivier wrote:

Le 24/10/2019 à 20:03, Eric Blake a écrit :

On 10/24/19 12:31 PM, Laurent Vivier wrote:

Le 23/10/2019 à 14:26, Frediano Ziglio a écrit :

Signed-off-by: Frediano Ziglio 
---
   util/qemu-timer.c | 6 +-
   1 file changed, 1 insertion(+), 5 deletions(-)







Applied to my trivial-patches branch.

I've updated the patch to remove the two useless casts.

Eric, if you want to add your R-b, I can add it to the queued patch.


I don't see it queued on https://github.com/vivier/qemu/branches yet,


Sorry, forgot to push it.


but if removing the two casts is the only difference from the original:

Reviewed-by: Eric Blake 



Added and pushed (branch trivial-patches), you can check.


Looks good.

--
Eric Blake, Principal Software Engineer
Red Hat, Inc.   +1-919-301-3226
Virtualization:  qemu.org | libvirt.org




Re: [PATCH v3 5/6] hppa: Add emulation of Artist graphics

2019-10-24 Thread Mark Cave-Ayland
On 22/10/2019 21:59, Sven Schnelle wrote:

> This adds emulation of Artist graphics good enough
> to get a Text console on both Linux and HP-UX. The
> X11 server from HP-UX also works.
> 
> Signed-off-by: Sven Schnelle 
> ---
>  hw/display/Kconfig   |3 +
>  hw/display/Makefile.objs |1 +
>  hw/display/artist.c  | 1336 ++
>  hw/display/trace-events  |9 +
>  hw/hppa/Kconfig  |1 +
>  hw/hppa/hppa_hardware.h  |1 +
>  hw/hppa/machine.c|   10 +
>  7 files changed, 1361 insertions(+)
>  create mode 100644 hw/display/artist.c
> 
> diff --git a/hw/display/Kconfig b/hw/display/Kconfig
> index cbdf7b1a67..953631afb6 100644
> --- a/hw/display/Kconfig
> +++ b/hw/display/Kconfig
> @@ -91,6 +91,9 @@ config TCX
>  config CG3
>  bool
>  
> +config ARTIST
> +bool
> +
>  config VGA
>  bool
>  
> diff --git a/hw/display/Makefile.objs b/hw/display/Makefile.objs
> index 5a4066383b..5f63294149 100644
> --- a/hw/display/Makefile.objs
> +++ b/hw/display/Makefile.objs
> @@ -39,6 +39,7 @@ common-obj-$(CONFIG_SM501) += sm501.o
>  common-obj-$(CONFIG_TCX) += tcx.o
>  common-obj-$(CONFIG_CG3) += cg3.o
>  common-obj-$(CONFIG_NEXTCUBE) += next-fb.o
> +common-obj-$(CONFIG_ARTIST) += artist.o
>  
>  obj-$(CONFIG_VGA) += vga.o
>  
> diff --git a/hw/display/artist.c b/hw/display/artist.c
> new file mode 100644
> index 00..9b285b3993
> --- /dev/null
> +++ b/hw/display/artist.c
> @@ -0,0 +1,1336 @@
> +/*
> + * QEMU HP Artist Emulation
> + *
> + * Copyright (c) 2019 Sven Schnelle 
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu-common.h"
> +#include "qemu/error-report.h"
> +#include "qemu/typedefs.h"
> +#include "qemu/log.h"
> +#include "qemu/module.h"
> +#include "qapi/error.h"
> +#include "hw/sysbus.h"
> +#include "hw/loader.h"
> +#include "hw/qdev-core.h"
> +#include "hw/qdev-properties.h"
> +#include "migration/vmstate.h"
> +#include "ui/console.h"
> +#include "trace.h"
> +
> +#define TYPE_ARTIST "artist"
> +#define ARTIST(obj) OBJECT_CHECK(ARTISTState, (obj), TYPE_ARTIST)
> +
> +struct vram_buffer {
> +uint8_t *data;
> +int size;
> +int width;
> +int height;
> +};
> +
> +typedef struct ARTISTState {
> +SysBusDevice parent_obj;
> +
> +QemuConsole *con;
> +MemoryRegion vram_mem;
> +MemoryRegion reg;
> +uint8_t *vram;
> +
> +struct vram_buffer vram_buffer[16];
> +
> +uint16_t width;
> +uint16_t height;
> +uint16_t depth;
> +
> +uint32_t fg_color;
> +uint32_t bg_color;
> +
> +uint32_t vram_char_y;
> +uint32_t vram_bitmask;
> +
> +uint32_t vram_start;
> +uint32_t vram_pos;
> +
> +uint32_t vram_size;
> +
> +uint32_t blockmove_source;
> +uint32_t blockmove_dest;
> +uint32_t blockmove_size;
> +
> +uint32_t line_size;
> +uint32_t line_end;
> +uint32_t line_xy;
> +uint32_t line_pattern_start;
> +uint32_t line_pattern_skip;
> +
> +uint32_t cursor_pos;
> +
> +uint32_t cursor_height;
> +uint32_t cursor_width;
> +
> +uint32_t plane_mask;
> +
> +uint32_t reg_100080;
> +uint32_t reg_300200;
> +uint32_t reg_300208;
> +uint32_t reg_300218;
> +
> +uint32_t cmap_bm_access;
> +uint32_t dst_bm_access;
> +uint32_t src_bm_access;
> +uint32_t control_plane;
> +uint32_t transfer_data;
> +uint32_t image_bitmap_op;
> +
> +uint32_t font_write1;
> +uint32_t font_write2;
> +uint32_t font_write_pos_y;
> +
> +int draw_line_pattern;
> +} ARTISTState;
> +
> +typedef enum {
> +ARTIST_BUFFER_AP = 1,
> +ARTIST_BUFFER_OVERLAY = 2,
> +ARTIST_BUFFER_CURSOR1 = 6,
> +ARTIST_BUFFER_CURSOR2 = 7,
> +ARTIST_BUFFER_ATTRIBUTE = 13,
> +ARTIST_BUFFER_CMAP = 15,
> +} artist_buffer_t;
> +
> +typedef enum {
> +VRAM_IDX = 0x1004a0,
> +VRAM_BITMASK = 0x1005a0,
> +VRAM_WRITE_INCR_X = 0x100600,
> +VRAM_WRITE_INCR_X2 = 0x100604,
> +VRAM_WRITE_INCR_Y = 0x100620,
> +VRAM_START = 0x100800,
> +BLOCK_MOVE_SIZE = 0x100804,
> +BLOCK_MOVE_SOURCE = 0x100808,
> +TRANSFER_DATA = 0x100820,
> +FONT_WRITE_INCR_Y = 0x1008a0,
> +VRAM_START_TRIGGER = 0x100a00,
> +VRAM_SIZE_TRIGGER = 0x100a04,
> +FONT_WRITE_START = 0x100aa0,
> +BLOCK_MOVE_DEST_TRIGGER = 0x100b00,
> +BLOCK_MOVE_SIZE_TRIGGER = 0x100b04,
> +LINE_XY = 0x100ccc,
> +PATTERN_LINE_START = 0x100ecc,
> +LINE_SIZE = 0x100e04,
> +LINE_END = 0x100e44,
> +CMAP_BM_ACCESS = 0x118000,
> +DST_BM_ACCESS = 0x118004,
> +SRC_BM_ACCESS = 0x118008,
> +CONTROL_PLANE = 0x11800c,
> +FG_COLOR = 0x118010,
> +BG_COLOR = 0x118014,
> +PLANE_MASK = 0x118018,
> +IMAGE_BITMAP_OP = 0x11801c,
> +CURSOR_POS = 0x300100,
> +CURSOR_CTRL = 0x300104,
> +} artist_reg_t;
> +
> +typedef enum {
> +ARTIST_ROP_CLEAR = 0,
> +ARTIST_ROP_COPY = 3,
> +ARTIST_ROP_XOR = 6,
> +ART

Re: [PULL 03/39] Updated Bulgarian translation (19) - 4.1.0

2019-10-24 Thread Paolo Bonzini
On 24/10/19 21:54, Aleksandar Markovic wrote:
> 
> 24.10.2019. 16.26, "Paolo Bonzini"  > је написао/ла:
>>
>> From: Alexander Shopov mailto:a...@kambanaria.org>>
>>
>> Signed-off-by: Alexander Shopov  >
>> Message-Id: <20191019120534.27479-2-...@kambanaria.org
> >
>> Signed-off-by: Paolo Bonzini  >
>> ---
>>  po/bg.po | 10 +-
>>  1 file changed, 5 insertions(+), 5 deletions(-)
>>
> 
> How come my "Reviewed-by" is not recorded here? It is not a big deal,
> just curious how it happened.

I had applied it locally before you sent your review.

Paolo




Re: [PATCH v5 02/11] pci: add option for net failover

2019-10-24 Thread Jens Freimann

On Thu, Oct 24, 2019 at 10:52:36AM -0600, Alex Williamson wrote:

On Thu, 24 Oct 2019 11:37:54 +0200
Jens Freimann  wrote:

[...]

>

>While reviewing, I realized that we shouldn't have this check for below 
reasons.
>
>1. It is user's responsibility to pass networking device.
>But its ok to check the class, if PCI Device is passed.
>So class comparison should be inside the pci_check().

I'm not sure I understand this point, could you please elaborate?
You're suggesting to move the check for the class into the check for
pci_is_express?


Seems like the suggestion is that net_failover_pair_id should be an
option on the base class of PCIDevice (DeviceState?) and only if it's a
PCI device would we check the class code.  But there are dependencies
at the hotplug controller, which I think is why this is currently
specific to PCI.


Yes, It doesn't support acpi, shpc,... hotplug as of now. It
shouldn't be hard to add but I'd like to do it as a follow-on series.


However, it's an interesting point about pci_is_express().  This test
is really just meant to check whether the hotplug controller supports
this feature, which is only implemented in pciehp via this series.
There's a bit of a mismatch though that pcie_is_express() checks
whether the device is express, not whether the bus it sits on is
express.  I think we really want the latter, so maybe this should be:

pci_bus_is_express(pci_get_bus(dev)

For example this feature should work if I plug an e1000 (not e1000e)
into an express slot, but not if I plug an e1000e into a conventional
slot.


I'll try this and test. 


Thanks!

regards,
Jens 





Re: [PATCH v5 06/11] qapi: add failover negotiated event

2019-10-24 Thread Jens Freimann

On Thu, Oct 24, 2019 at 06:32:45PM +0100, Dr. David Alan Gilbert wrote:

* Jens Freimann (jfreim...@redhat.com) wrote:

This event is sent to let libvirt know that VIRTIO_NET_F_STANDBY
feature was not negotiated during virtio feature negotiation. If this
event is received it means any primary devices hotplugged before
this were were never really added to QEMU devices.

Signed-off-by: Jens Freimann 


Can I just understand a bit more about what the meaning of this is.

Say my VM boots:
  a) BIOS
  b) Boot loader
  c) Linux
  d) Reboots
 (possibly a',b', different c')

When would I get that event?
When can libvirt know it can use it?


The event is sent every time we do feature negotiation for the virtio-net
device, so you'll get it during Linux boot and reboots.

In v6, I add a data field 'id' to the event to pass the device id. 


regards,
Jens 





Re: [Qemu-devel] [PATCH] Acceptance tests: refactor wait_for_console_pattern

2019-10-24 Thread Wainer dos Santos Moschetta

Hi Cleber,

On 9/16/19 1:40 PM, Cleber Rosa wrote:

The same utility method is already present in two different test
files, so let's consolidate it into a single utility function.

Signed-off-by: Cleber Rosa 
---
  tests/acceptance/avocado_qemu/__init__.py | 26 +
  tests/acceptance/boot_linux_console.py| 47 +++
  tests/acceptance/linux_ssh_mips_malta.py  | 18 ++---
  3 files changed, 42 insertions(+), 49 deletions(-)

diff --git a/tests/acceptance/avocado_qemu/__init__.py 
b/tests/acceptance/avocado_qemu/__init__.py
index bd41e0443c..a0fe16e47f 100644
--- a/tests/acceptance/avocado_qemu/__init__.py
+++ b/tests/acceptance/avocado_qemu/__init__.py
@@ -8,6 +8,7 @@
  # This work is licensed under the terms of the GNU GPL, version 2 or
  # later.  See the COPYING file in the top-level directory.
  
+import logging

  import os
  import sys
  import uuid
@@ -53,6 +54,31 @@ def pick_default_qemu_bin(arch=None):
  return qemu_bin_from_src_dir_path
  
  
+def wait_for_console_pattern(test, success_message,

+ failure_message='Kernel panic - not syncing'):
+"""
+Waits for messages to appear on the console, while logging the content
+
+:param test: an Avocado test containing a VM that will have its console
+ read and probed for a success or failure message
+:type test: :class:`avocado_qemu.Test`
+:param success_message: if this message appears, test succeeds
+:param failure_message: if this message appears, test fails
+"""
+console = test.vm.console_socket.makefile()
+console_logger = logging.getLogger('console')
+while True:
+msg = console.readline().strip()
+if not msg:
+continue
+console_logger.debug(msg)
+if success_message in msg:
+break
+if failure_message in msg:
+fail = 'Failure message found in console: %s' % failure_message
+test.fail(fail)
+
+


Note to self: it would be useful if wait_for_console_pattern could 
return the read lines. Example of use: a test case waits the kernel to 
boot - if succeed - then it can check if SMP topology is expected by 
parsing the console lines.


Regardless, this change looks good to me.

Reviewed-by: Wainer dos Santos Moschetta 



  class Test(avocado.Test):
  def setUp(self):
  self._vms = {}
diff --git a/tests/acceptance/boot_linux_console.py 
b/tests/acceptance/boot_linux_console.py
index 8a9a314ab4..9ff2213874 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -9,12 +9,12 @@
  # later.  See the COPYING file in the top-level directory.
  
  import os

-import logging
  import lzma
  import gzip
  import shutil
  
  from avocado_qemu import Test

+from avocado_qemu import wait_for_console_pattern
  from avocado.utils import process
  from avocado.utils import archive
  
@@ -29,31 +29,10 @@ class BootLinuxConsole(Test):
  
  KERNEL_COMMON_COMMAND_LINE = 'printk.time=0 '
  
-def wait_for_console_pattern(self, success_message,

- failure_message='Kernel panic - not syncing'):
-"""
-Waits for messages to appear on the console, while logging the content
-
-:param success_message: if this message appears, test succeeds
-:param failure_message: if this message appears, test fails
-"""
-console = self.vm.console_socket.makefile()
-console_logger = logging.getLogger('console')
-while True:
-msg = console.readline().strip()
-if not msg:
-continue
-console_logger.debug(msg)
-if success_message in msg:
-break
-if failure_message in msg:
-fail = 'Failure message found in console: %s' % failure_message
-self.fail(fail)
-
  def exec_command_and_wait_for_pattern(self, command, success_message):
  command += '\n'
  self.vm.console_socket.sendall(command.encode())
-self.wait_for_console_pattern(success_message)
+wait_for_console_pattern(self, success_message)
  
  def extract_from_deb(self, deb, path):

  """
@@ -89,7 +68,7 @@ class BootLinuxConsole(Test):
   '-append', kernel_command_line)
  self.vm.launch()
  console_pattern = 'Kernel command line: %s' % kernel_command_line
-self.wait_for_console_pattern(console_pattern)
+wait_for_console_pattern(self, console_pattern)
  
  def test_mips_malta(self):

  """
@@ -112,7 +91,7 @@ class BootLinuxConsole(Test):
   '-append', kernel_command_line)
  self.vm.launch()
  console_pattern = 'Kernel command line: %s' % kernel_command_line
-self.wait_for_console_pattern(console_pattern)
+wait_for_console_pattern(self, console_pattern)
  
  def test_mips64el_malta(self):

 

Re: [PATCH v5 02/11] pci: add option for net failover

2019-10-24 Thread Jens Freimann

On Thu, Oct 24, 2019 at 06:22:27PM +0100, Dr. David Alan Gilbert wrote:

* Jens Freimann (jfreim...@redhat.com) wrote:

This patch adds a net_failover_pair_id property to PCIDev which is
used to link the primary device in a failover pair (the PCI dev) to
a standby (a virtio-net-pci) device.

It only supports ethernet devices. Also currently it only supports
PCIe devices. QEMU will exit with an error message otherwise.

Signed-off-by: Jens Freimann 
---
 hw/pci/pci.c | 17 +
 include/hw/pci/pci.h |  3 +++
 2 files changed, 20 insertions(+)

diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index aa05c2b9b2..fa9b5219f8 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -75,6 +75,8 @@ static Property pci_props[] = {
 QEMU_PCIE_LNKSTA_DLLLA_BITNR, true),
 DEFINE_PROP_BIT("x-pcie-extcap-init", PCIDevice, cap_present,
 QEMU_PCIE_EXTCAP_INIT_BITNR, true),
+DEFINE_PROP_STRING("net_failover_pair_id", PCIDevice,
+net_failover_pair_id),


Should we just make this 'failover_pair_id' - then when someone in the
future figures out how to make it work for something else (e.g.
multipath block devices) then it's all good?


Yes, I see no reason why not to rename it. 


Thanks!

regards,
Jens




Re: [libvirt] [RFC PATCH 19/19] qapi: Implement -compat deprecated-output=hide for events

2019-10-24 Thread Markus Armbruster
Daniel P. Berrangé  writes:

> On Thu, Oct 24, 2019 at 02:34:58PM +0200, Markus Armbruster wrote:
>> This policy suppresses deprecated events, and thus permits "testing
>> the future".
>
> One thing that occurs to me is that this is a fairly passive impact
> on libvirt. eg it may well be not at all obvious if libvirt is behaving
> in a broken way due to an event not being emitted, as the code in
> question simply won't be triggered.

Intented use of -compat deprecated-input=error,deprecated-output=hide is
"testing the future": make QEMU behave as if the deprecated features
were already gone.  Can be useful when you want to test code that deals
with the anticipated future *now*.

It can also be used to ferret out unknown uses of deprecated interfaces:
run test suite with it, see what fails.  But as you note, the
deprecated-output=hide part is somewhat problematic in that role.

> With the current QMP this situation is unavoidable since QEMU doesn't
> know which events the client (libvirt) is actually using. QEMU just
> unconditionally emits all events.
>
> I've often wondered if we should have the client explicitly tell
> QEMU which events it wants to receive as part of the QMP greeting
> handshake.
>
> ie, libvirt knows which events it can handle. QEMU knows which
> events it can emit, and reports this via capabilities which
> libvirt probes.
>
> So on connecting libvirt can tell QEMU exactly which evnets it
> wants to get back. QEMU is now able to explicitly tell libvirt
> it has asked for a deprecated event, and so the logic from the
> "deprecated-input" option can take effect.

QEMU already reports its events via introspection.  What's missing is an
event subscription mechanism.  Should be feasible.

Additional benefit: can reduce I/O.

> We'd not need "deprecated-output" at that point.

If deprecated-input=error makes subscribing to a deprecated event fail,
we don't need deprecated-output=hide for events.

But events are not the only output: there's also command returns.

Consider query-cpus-fast.  Returns list of CpuInfoFast.  CpuInfoFast
member @arch is deprecated.  deprecated-output=hide should hide it,
except it's not implemented in this series.

This is also "a fairly passive impact on libvirt", I'm afraid.

We have some 40 events, and having libvirt subscribe to the ones it
actually uses is obviously practical.

I doubt the subscription idea scales up to return values.




Re: [PATCH v2 00/20] hw/i386/pc: Split PIIX3 southbridge from i440FX northbridge

2019-10-24 Thread Aleksandar Markovic
On Friday, October 18, 2019, Philippe Mathieu-Daudé 
wrote:

> Changes since v1 [0]:
> - Removed patch reintroducing DO_UPCAST() use (thuth)
> - Took various patches out to reduce series (thuth)
> - Added review tags (thanks all for reviewing!)
>
>
Philippe,

Do you intend to submit v3? The softfreeze is close.

A.



> $ git backport-diff -u pc_split_i440fx_piix-v1 -r mc146818rtc_init..
> Key:
> [] : patches are identical
> [] : number of functional differences between upstream/downstream patch
> [down] : patch is downstream-only
> The flags [FC] indicate (F)unctional and (C)ontextual differences,
> respectively
>
> 001/20:[] [--] 'MAINTAINERS: Keep PIIX4 South Bridge separate from PC
> Chipsets'
> 002/20:[0011] [FC] 'piix4: add Reset Control Register'
> 003/20:[0014] [FC] 'piix4: add a i8259 interrupt controller as specified
> in datasheet'
> 004/20:[] [--] 'Revert "irq: introduce qemu_irq_proxy()"'
> 005/20:[] [--] 'piix4: rename PIIX4 object to piix4-isa'
> 006/20:[] [-C] 'piix4: add a i8257 dma controller as specified in
> datasheet'
> 007/20:[] [-C] 'piix4: add a i8254 pit controller as specified in
> datasheet'
> 008/20:[] [-C] 'piix4: add a mc146818rtc controller as specified in
> datasheet'
> 009/20:[] [--] 'hw/mips/mips_malta: Create IDE hard drive array
> dynamically'
> 010/20:[] [--] 'hw/mips/mips_malta: Extract the PIIX4 creation code as
> piix4_create()'
> 011/20:[] [--] 'hw/isa/piix4: Move piix4_create() to hw/isa/piix4.c'
> 012/20:[] [--] 'hw/i386: Remove obsolete LoadStateHandler::load_state_old
> handlers'
> 013/20:[] [--] 'hw/pci-host/piix: Extract piix3_create()'
> 014/20:[0010] [FC] 'hw/pci-host/piix: Move RCR_IOPORT register definition'
> 015/20:[] [--] 'hw/pci-host/piix: Define and use the PIIX IRQ Route
> Control Registers'
> 016/20:[] [--] 'hw/pci-host/piix: Move i440FX declarations to
> hw/pci-host/i440fx.h'
> 017/20:[] [--] 'hw/pci-host/piix: Fix code style issues'
> 018/20:[0012] [FC] 'hw/pci-host/piix: Extract PIIX3 functions to
> hw/isa/piix3.c'
> 019/20:[] [--] 'hw/pci-host: Rename incorrectly named 'piix' as
> 'i440fx''
> 020/20:[] [-C] 'hw/pci-host/i440fx: Remove the last PIIX3 traces'
>
> Previous cover:
>
> This series is a rework of "piix4: cleanup and improvements" [1]
> from Hervé, and my "remove i386/pc dependency: PIIX cleanup" [2].
>
> Still trying to remove the strong X86/PC dependency 2 years later,
> one step at a time.
> Here we split the PIIX3 southbridge from i440FX northbridge.
> The i440FX northbridge is only used by the PC machine, while the
> PIIX southbridge is also used by the Malta MIPS machine.
>
> This is also a step forward using KConfig with the Malta board.
> Without this split, it was impossible to compile the Malta without
> pulling various X86 pieces of code.
>
> The overall design cleanup is not yet perfect, but enough to post
> as a series.
>
> Now that the PIIX3 code is extracted, the code duplication with the
> PIIX4 chipset is obvious. Not worth improving for now because it
> isn't broken.
>
> [0] https://lists.gnu.org/archive/html/qemu-devel/2019-10/msg03685.html
> [1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg500737.html
> [2] https://www.mail-archive.com/qemu-devel@nongnu.org/msg504081.html
>
> Based-on: <20191018133547.10936-1-phi...@redhat.com>
> mc146818rtc: Allow call object_initialize(MC146818_RTC) instead of
> rtc_init()
> 20191018133547.10936-1-philmd@redhat.com">https://mid.mail-archive.com/20191018133547.10936-1-philmd@redhat.com
>
> Hervé Poussineau (5):
>   piix4: Add the Reset Control Register
>   piix4: Add a i8259 Interrupt Controller as specified in datasheet
>   piix4: Rename PIIX4 object to piix4-isa
>   piix4: Add a i8257 DMA Controller as specified in datasheet
>   piix4: Add a i8254 PIT Controller as specified in datasheet
>
> Philippe Mathieu-Daudé (15):
>   MAINTAINERS: Keep PIIX4 South Bridge separate from PC Chipsets
>   Revert "irq: introduce qemu_irq_proxy()"
>   piix4: Add a MC146818 RTC Controller as specified in datasheet
>   hw/mips/mips_malta: Create IDE hard drive array dynamically
>   hw/mips/mips_malta: Extract the PIIX4 creation code as piix4_create()
>   hw/isa/piix4: Move piix4_create() to hw/isa/piix4.c
>   hw/i386: Remove obsolete LoadStateHandler::load_state_old handlers
>   hw/pci-host/piix: Extract piix3_create()
>   hw/pci-host/piix: Move RCR_IOPORT register definition
>   hw/pci-host/piix: Define and use the PIIX IRQ Route Control Registers
>   hw/pci-host/piix: Move i440FX declarations to hw/pci-host/i440fx.h
>   hw/pci-host/piix: Fix code style issues
>   hw/pci-host/piix: Extract PIIX3 functions to hw/isa/piix3.c
>   hw/pci-host: Rename incorrectly named 'piix' as 'i440fx'
>   hw/pci-host/i440fx: Remove the last PIIX3 traces
>
>  MAINTAINERS  |  14 +-
>  hw/acpi/pcihp.c  |   2 +-
>  hw/acpi/piix4.c  |  42 +--
>  hw/core/irq.c|  14 -
>  hw

Re: [PULL 03/39] Updated Bulgarian translation (19) - 4.1.0

2019-10-24 Thread Aleksandar Markovic
24.10.2019. 16.26, "Paolo Bonzini"  је написао/ла:
>
> From: Alexander Shopov 
>
> Signed-off-by: Alexander Shopov 
> Message-Id: <20191019120534.27479-2-...@kambanaria.org>
> Signed-off-by: Paolo Bonzini 
> ---
>  po/bg.po | 10 +-
>  1 file changed, 5 insertions(+), 5 deletions(-)
>

How come my "Reviewed-by" is not recorded here? It is not a big deal, just
curious how it happened.

A.

> diff --git a/po/bg.po b/po/bg.po
> index 3d8c353..98c57e5 100644
> --- a/po/bg.po
> +++ b/po/bg.po
> @@ -1,14 +1,14 @@
>  # Bulgarian translation of qemu po-file.
> -# Copyright (C) 2016 Alexander Shopov 
> +# Copyright (C) 2016, 2019 Alexander Shopov 
>  # This file is distributed under the same license as the qemu package.
> -# Alexander Shopov , 2016.
> +# Alexander Shopov , 2016, 2019.
>  #
>  msgid ""
>  msgstr ""
> -"Project-Id-Version: QEMU 2.6.50\n"
> +"Project-Id-Version: QEMU 4.1.0\n"
>  "Report-Msgid-Bugs-To: qemu-devel@nongnu.org\n"
>  "POT-Creation-Date: 2018-07-18 07:56+0200\n"
> -"PO-Revision-Date: 2016-06-09 15:54+0300\n"
> +"PO-Revision-Date: 2019-10-19 13:14+0200\n"
>  "Last-Translator: Alexander Shopov \n"
>  "Language-Team: Bulgarian \n"
>  "Language: bg\n"
> @@ -66,7 +66,7 @@ msgid "Detach Tab"
>  msgstr "Към самостоятелен подпрозорец"
>
>  msgid "Show Menubar"
> -msgstr ""
> +msgstr "Лента за менюто"
>
>  msgid "_Machine"
>  msgstr "_Машина"
> --
> 1.8.3.1
>
>
>


Re: [PATCH v3 00/16] hw/arm/raspi: Add thermal/timer, improve address space, run U-boot

2019-10-24 Thread Philippe Mathieu-Daudé

On 10/24/19 5:31 PM, Peter Maydell wrote:

On Thu, 24 Oct 2019 at 14:42, Peter Maydell  wrote:


On Sun, 20 Oct 2019 at 00:47, Philippe Mathieu-Daudé  wrote:


Since v2:
- fixed issue in videocore address space
- allow to start with some cores OFF (to boot firmwares)
- add proof-of-concept test for '-smp cores=1' and U-boot
- fixed my email setup

Previous cover:

Hi,

Some patches from v1 are already merged. This v2 addresses the
review comment from v1, and add patches to clean the memory
space when using multiple cores.

Laurent, if you test U-Boot with this patchset again, do you mind
replying with a "Tested-by:" tag?

The next patchset is probably about the interrupt controller blocks,
then will come another one about the MBox/Properties.

The last patch is unrelated to the series, but since I cleaned this
for the raspi and the highbank is the only board with the same issue,
I included the patch in this series.


I'm going to apply 1-10 and 14 to target-arm.next.
(I've reviewed 10, and the rest have been reviewed.)


...but that causes tests/boot-serial-test to throw
a clang sanitizer error and then hang:

e104462:bionic:clang$ QTEST_QEMU_BINARY=arm-softmmu/qemu-system-arm
./tests/boot-serial-test
/arm/boot-serial/raspi2:
/home/petmay01/linaro/qemu-from-laptop/qemu/memory.c:2517:27: runtime
error: null pointer passed as argument 2, which is declared to never
be null
/usr/include/stdlib.h:819:6: note: nonnull attribute specified here

The offending patch is "hw/arm/bcm2836: Use per CPU address spaces"
(patch 7). So I'm dropping 7/8/9.


With -bios, raspi.c::setup_boot() we call
 -> load_image_targphys[_as]
-> rom_add_file_fixed_as
   -> rom_add_file with mr=NULL, as=set

vl.c::main() call
 -> rom_check_and_register_reset

if (!rom->mr) {
as = rom->as;
}
section = memory_region_find(rom->mr
 ? rom->mr
 : get_system_memory(),
 rom->addr, 1);

In my patches I stop using system_memory, each CPU use its
own AS view on the GPU AXI bus.

Apparently we can not (yet) live without a system_memory bus.

At this point I can use the RAM memory region because
setup_boot() is called from raspi_init().

What is odd is load_image_targphys[_as]() get a 'addr' argument
(as an offset within the address space) but load_image_mr() don't
take offset, only loads at base (offset=0). Neither it takes a
'max_sz' argument.

This snippet fixed the issue:

-- >8 --
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 569d85c11a..eb84f74dc7 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -111,7 +111,8 @@ static void reset_secondary(ARMCPU *cpu, const 
struct arm_boot_info *info)

 cpu_set_pc(cs, info->smp_loader_start);
 }

-static void setup_boot(MachineState *machine, int version, size_t ram_size)
+static void setup_boot(MachineState *machine, int version,
+   MemoryRegion *ram, size_t ram_size)
 {
 static struct arm_boot_info binfo;
 int r;
@@ -149,9 +150,9 @@ static void setup_boot(MachineState *machine, int 
version, size_t ram_size)

  */
 if (machine->firmware) {
 hwaddr firmware_addr = version == 3 ? FIRMWARE_ADDR_3 : 
FIRMWARE_ADDR_2;

+
 /* load the firmware image (typically kernel.img) */
-r = load_image_targphys(machine->firmware, firmware_addr,
-ram_size - firmware_addr);
+r = load_image_mr(machine->firmware, firmware_addr, ram);
 if (r < 0) {
 error_report("Failed to load firmware from %s", 
machine->firmware);

 exit(1);
@@ -211,7 +212,7 @@ static void raspi_init(MachineState *machine, int 
version)


 vcram_size = object_property_get_uint(OBJECT(&s->soc), "vcram-size",
   &error_abort);
-setup_boot(machine, version, machine->ram_size - vcram_size);
+setup_boot(machine, version, &s->ram, machine->ram_size - vcram_size);
 }

 static void raspi2_init(MachineState *machine)
diff --git a/hw/core/loader.c b/hw/core/loader.c
index a3f5333258..0f11d1104a 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -137,7 +137,7 @@ int load_image_targphys_as(const char *filename,
 return size;
 }

-int load_image_mr(const char *filename, MemoryRegion *mr)
+int load_image_mr(const char *filename, hwaddr addr, MemoryRegion *mr)
 {
 int size;

@@ -152,7 +152,7 @@ int load_image_mr(const char *filename, MemoryRegion 
*mr)

 return -1;
 }
 if (size > 0) {
-if (rom_add_file_mr(filename, mr, -1) < 0) {
+if (rom_add_file_mr(filename, addr, mr, -1) < 0) {
 return -1;
 }
 }
diff --git a/include/hw/loader.h b/include/hw/loader.h
index 48a96cd559..9cb47707de 100644
--- a/include/hw/loader.h
+++ b/include/hw/loader.h
@@ -65,6 +65,7 @@ int load_image_targphys(const char *filename, hwaddr,
 /**
  * load_image_mr: load an image into a memory region

Re: [libvirt] [RFC PATCH 18/19] qapi: Include a warning in the response to a deprecated command

2019-10-24 Thread Markus Armbruster
Daniel P. Berrangé  writes:

> On Thu, Oct 24, 2019 at 02:34:57PM +0200, Markus Armbruster wrote:
>> Looks like this
>> 
>> ---> {"execute": "query-cpus"}
>> <--- {"return": [...], "warnings": [{"class": "CommandNotFound", "desc": 
>> "command is deprecated"}]}
>> 
>> Management applications may want to log such warnings.
>> 
>> This commit is not for merging as is, because
>> 
>> * docs/interop/qmp-spec.txt needs an update for the new success
>>   response member "warnings".
>> 
>> * I'd like to see a prospective user before I extend the QMP protocol.
>>   If you have specific plans to put them to use, let me know.
>
> Thinking about libvirt's usage of QMP
>
>  - A public API call may result in many QMP commands being run.
>  - Public APIs don't have any convenient way to report deprecated
>usage synchronously at runtime.
>  - The set of QMP comamnds used by libvirt is a private impl
>detail that a mgmt app shouldn't know about
>
> Some (most) deprecations will be things targetted at libvirt
> developers, where libvirt just needs fixing to use some new
> alternative instead.

Based on what we've deprecated so far: most, for a large value of
"most".

> Other deprecations where there's no replacement provided by QEMU
> are things where an application might need to be told to stop
> using the feature. From libvirt's public API POV the feature
> likely won't be deprecated, only the specific usage of that
> feature with the QEMU driver. eg consider QEMU decides to
> stop POSTCOPY migration for some reason. Its deprecated from
> POV of QEMU & QMP commands. If Xen or ESX support POSTCOPY
> though, its not deprecated from libvirt's API POV. In many
> ways this becomes a capabilities reporting problem between
> libvirt & the application. Libvirt needs to tell the app which
> features they can use, given their curent open libvirt connection
> and VM instance(s).

Makes sense.

> So, either way, I don't think the QMP deprecations are something
> we would want to expose to applications 'as is', since they're
> either not something an app dev can fix, or they need rephrasing
> in terms of the libvirt API/config feature the app is using, or
> translating into a way for libvirt to expose capabilities to apps.

Makes sense, too.

> Libvirt could potentially log the deprecation warning in the per
> QEMU VM log file. If end users see such log messages they'll
> probably file support tickets / bug reports against libvirt and/or
> the mgmt app, which will alert their maintainers to the fact. THis
> could be useful if the maintainers missed the QEMU documentation
> update listing the deprecation. It could be annoying if libvirt
> knows it is deprecated though, and intentionally is still using
> it in this particular version, with plans already present to fix
> it in future.   So if libvirt does log the deprecations to the
> VM log file, we'll probably want to /not/ log certain deprecations
> that we're intentionally ignoring (temporarily).

Makes sense, too.

Logging the complete QMP traffic can be invaluable when troubleshooting,
and is unlikely to make users report the warnings to libvirt developers.
But that's a different log / a higher debug level.

> In theory libvirt could see the deprecation reply and take
> different action, but I don't much like that idea. It is too

That way is madness :)

> late becasue we've already run the command, and its providing
> a second way to deal with capabilities. We should be able to
> query/probe the right way to invoke commands upfront, so that
> we avoid using deprecated stuff in the first place.

PATCH 15 makes deprecation visible in introspection.  Like all of this
series, it's limited to commands and events.  Extending to arguments and
return values feels feasible, and I'm willing to do the work.

Argument *values* are a different ballgame.  Schema support for "this
argument is deprecated" is straightforward (tack feature "deprecated" to
it).  Support for "this argument value is deprecated" is not (except for
enumerations, where we can tack feature "deprecated" to the enumeration
value).  Same for return values, combinations of arguments, and so
forth.  Not sure how relevant these are in practice.

I'm not sure how useful the "deprecated" feature will be for guiding
decisions on which interface to use.  I imagine there's typically a list
of interfaces libvirt can use, ordered by "desirability", and the most
desirable interface known to work gets used.  If $new_way is workable,
you use it, else you fall back to $old_way.  Whether $old_way is
deprecated is immaterial.

The "deprecated" feature could be used for dynamic checking, i.e. check
the commands sent to QEMU against the output of query-qmp-schema.  But
that merely duplicates the check QEMU does when it receives it.

Static checking would be more interesting, if we can pull it off.

>> * The same warning should be included in a deprecated event.
>> 
>> * Emitting the same warning over and over again might be a

Re: [PULL 00/51] target-arm queue

2019-10-24 Thread Mark Cave-Ayland
On 24/10/2019 19:18, Philippe Mathieu-Daudé wrote:

> On 10/24/19 6:26 PM, Peter Maydell wrote:
>> Probably the last arm pullreq before softfreeze...
>>
>> The following changes since commit 58560ad254fbda71d4daa6622d71683190070ee2:
>>
>>    Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.2-20191024' 
>> into
>> staging (2019-10-24 16:22:58 +0100)
>>
>> are available in the Git repository at:
>>
>>    https://git.linaro.org/people/pmaydell/qemu-arm.git 
>> tags/pull-target-arm-20191024
>>
>> for you to fetch changes up to a01a4a3e85ae8f6fe21adbedc80f7013faabdcf4:
>>
>>    hw/arm/highbank: Use AddressSpace when using write_secondary_boot() 
>> (2019-10-24
>> 17:16:30 +0100)
>>
>> 
>> target-arm queue:
>>   * raspi boards: some cleanup
>>   * raspi: implement the bcm2835 system timer device
>>   * raspi: implement a dummy thermal sensor
>>   * KVM: support providing SVE to the guest
>>   * misc devices: switch to ptimer transaction API
>>   * cache TB flag state to improve performance of cpu_get_tb_cpu_state
>>   * aspeed: Add an AST2600 eval board
>>
>> 
>> Andrew Jones (9):
>>    target/arm/monitor: Introduce qmp_query_cpu_model_expansion
>>    tests: arm: Introduce cpu feature tests
>>    target/arm: Allow SVE to be disabled via a CPU property
>>    target/arm/cpu64: max cpu: Introduce sve properties
>>    target/arm/kvm64: Add kvm_arch_get/put_sve
>>    target/arm/kvm64: max cpu: Enable SVE when available
>>    target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features
>>    target/arm/cpu64: max cpu: Support sve properties with KVM
>>    target/arm/kvm: host cpu: Add support for sve properties
>>
>> Cédric Le Goater (2):
>>    hw/gpio: Fix property accessors of the AST2600 GPIO 1.8V model
>>    aspeed: Add an AST2600 eval board
>>
>> Peter Maydell (8):
>>    hw/net/fsl_etsec/etsec.c: Switch to transaction-based ptimer API
>>    hw/timer/xilinx_timer.c: Switch to transaction-based ptimer API
>>    hw/dma/xilinx_axidma.c: Switch to transaction-based ptimer API
>>    hw/timer/slavio_timer: Remove useless check for NULL t->timer
>>    hw/timer/slavio_timer.c: Switch to transaction-based ptimer API
>>    hw/timer/grlib_gptimer.c: Switch to transaction-based ptimer API
>>    hw/m68k/mcf5206.c: Switch to transaction-based ptimer API
>>    hw/watchdog/milkymist-sysctl.c: Switch to transaction-based ptimer API
>>
>> Philippe Mathieu-Daudé (8):
>>    hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
>>    hw/arm/bcm2835_peripherals: Use the thermal sensor block
>>    hw/timer/bcm2835: Add the BCM2835 SYS_timer
>>    hw/arm/bcm2835_peripherals: Use the SYS_timer
>>    hw/arm/bcm2836: Make the SoC code modular
>>    hw/arm/bcm2836: Rename cpus[] as cpu[].core
>>    hw/arm/raspi: Use AddressSpace when using 
>> arm_boot::write_secondary_boot
>>    hw/arm/highbank: Use AddressSpace when using write_secondary_boot()
>>
>> Richard Henderson (24):
>>    target/arm: Split out rebuild_hflags_common
>>    target/arm: Split out rebuild_hflags_a64
>>    target/arm: Split out rebuild_hflags_common_32
>>    target/arm: Split arm_cpu_data_is_big_endian
>>    target/arm: Split out rebuild_hflags_m32
>>    target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state
>>    target/arm: Split out rebuild_hflags_a32
>>    target/arm: Split out rebuild_hflags_aprofile
>>    target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in 
>> cpu_get_tb_cpu_state
>>    target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state
>>    target/arm: Hoist computation of TBFLAG_A32.VFPEN
>>    target/arm: Add arm_rebuild_hflags
>>    target/arm: Split out arm_mmu_idx_el
>>    target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state
>>    target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32})
>>    target/arm: Rebuild hflags at EL changes
>>    target/arm: Rebuild hflags at MSR writes
>>    target/arm: Rebuild hflags at CPSR writes
>>    target/arm: Rebuild hflags at Xscale SCTLR writes
>>    target/arm: Rebuild hflags for M-profile
>>    target/arm: Rebuild hflags for M-profile NVIC
>>    linux-user/aarch64: Rebuild hflags for TARGET_WORDS_BIGENDIAN
>

Re: [PATCH v2 12/14] hw/rtc/mc146818: Include mc146818rtc_regs.h a bit less

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:04, Philippe Mathieu-Daudé a écrit :
> Only 2 source files require the "mc146818rtc_regs.h" header.
> Instead of having it processed 12 times, by all objects
> using "mc146818rtc.h", include it directly where used.
> 
> Reviewed-by: Alistair Francis 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/rtc/mc146818rtc.c | 1 +
>  hw/timer/hpet.c  | 1 +
>  include/hw/rtc/mc146818rtc.h | 1 -
>  3 files changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c
> index ced15f764f..9d4ed54f65 100644
> --- a/hw/rtc/mc146818rtc.c
> +++ b/hw/rtc/mc146818rtc.c
> @@ -35,6 +35,7 @@
>  #include "sysemu/reset.h"
>  #include "sysemu/runstate.h"
>  #include "hw/rtc/mc146818rtc.h"
> +#include "hw/rtc/mc146818rtc_regs.h"
>  #include "migration/vmstate.h"
>  #include "qapi/error.h"
>  #include "qapi/qapi-commands-misc-target.h"
> diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
> index 02bf8a8ce8..9f17aaa278 100644
> --- a/hw/timer/hpet.c
> +++ b/hw/timer/hpet.c
> @@ -34,6 +34,7 @@
>  #include "hw/timer/hpet.h"
>  #include "hw/sysbus.h"
>  #include "hw/rtc/mc146818rtc.h"
> +#include "hw/rtc/mc146818rtc_regs.h"
>  #include "migration/vmstate.h"
>  #include "hw/timer/i8254.h"
>  
> diff --git a/include/hw/rtc/mc146818rtc.h b/include/hw/rtc/mc146818rtc.h
> index 2e9331637a..7fa59d4279 100644
> --- a/include/hw/rtc/mc146818rtc.h
> +++ b/include/hw/rtc/mc146818rtc.h
> @@ -10,7 +10,6 @@
>  #define HW_RTC_MC146818RTC_H
>  
>  #include "hw/isa/isa.h"
> -#include "hw/rtc/mc146818rtc_regs.h"
>  
>  #define TYPE_MC146818_RTC "mc146818rtc"
>  
> 

Applied to my trivial-patches branch.

Thanks,
Laurent



Re: [PATCH] Semihost SYS_READC implementation (v3)

2019-10-24 Thread Paolo Bonzini
On 24/10/19 19:33, no-re...@patchew.org wrote:
> Patchew URL: 
> https://patchew.org/QEMU/20191023192640.13125-1-kei...@keithp.com/
> 
> 
> 
> Hi,
> 
> This series failed the docker-quick@centos7 build test. Please find the 
> testing commands and
> their output below. If you have Docker installed, you can probably reproduce 
> it
> locally.
> 
> === TEST SCRIPT BEGIN ===
> #!/bin/bash
> make docker-image-centos7 V=1 NETWORK=1
> time make docker-test-quick@centos7 SHOW_ENV=1 J=14 NETWORK=1
> === TEST SCRIPT END ===
> 
>   CC  aarch64-softmmu/target/arm/translate-sve.o
> ../vl.o: In function `main':
> /tmp/qemu-test/src/vl.c:4385: undefined reference to 
> `qemu_semihosting_console_init'
> collect2: error: ld returned 1 exit status
> make[1]: *** [qemu-system-x86_64] Error 1
> make: *** [x86_64-softmmu/all] Error 2
> make: *** Waiting for unfinished jobs
>   LINKaarch64-softmmu/qemu-system-aarch64
> Traceback (most recent call last):
> ---
> raise CalledProcessError(retcode, cmd)
> subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', 
> '--label', 'com.qemu.instance.uuid=3c82d370996f429bb4be7fef56e7247b', '-u', 
> '1001', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=', 
> '-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', 
> '-e', 'SHOW_ENV=1', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', 
> '/home/patchew/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', 
> '/var/tmp/patchew-tester-tmp-nju6kwxi/src/docker-src.2019-10-24-13.29.33.24205:/var/tmp/qemu:z,ro',
>  'qemu:centos7', '/var/tmp/qemu/run', 'test-quick']' returned non-zero exit 
> status 2.
> filter=--filter=label=com.qemu.instance.uuid=3c82d370996f429bb4be7fef56e7247b
> make[1]: *** [docker-run] Error 1
> make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-nju6kwxi/src'
> make: *** [docker-run-test-quick@centos7] Error 2

Looks like you need to add a dummy implementation of the new function to
stubs/semihost.c, for use in targets that don't support semihosting.

Thanks,

Paolo




Re: [PATCH v2 10/14] hw: Move Exynos4210 RTC from hw/timer/ to hw/rtc/ subdirectory

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:04, Philippe Mathieu-Daudé a écrit :
> Move RTC devices under the hw/rtc/ subdirectory.
> 
> Reviewed-by: Alistair Francis 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/rtc/Makefile.objs   | 1 +
>  hw/{timer => rtc}/exynos4210_rtc.c | 0
>  hw/timer/Makefile.objs | 1 -
>  3 files changed, 1 insertion(+), 1 deletion(-)
>  rename hw/{timer => rtc}/exynos4210_rtc.c (100%)
> 
> diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs
> index 543a550a0f..3d4763fc26 100644
> --- a/hw/rtc/Makefile.objs
> +++ b/hw/rtc/Makefile.objs
> @@ -7,5 +7,6 @@ endif
>  common-obj-$(CONFIG_PL031) += pl031.o
>  common-obj-$(CONFIG_TWL92230) += twl92230.o
>  common-obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp-rtc.o
> +common-obj-$(CONFIG_EXYNOS4) += exynos4210_rtc.o
>  obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
>  common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
> diff --git a/hw/timer/exynos4210_rtc.c b/hw/rtc/exynos4210_rtc.c
> similarity index 100%
> rename from hw/timer/exynos4210_rtc.c
> rename to hw/rtc/exynos4210_rtc.c
> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
> index 294465ef47..33191d74cb 100644
> --- a/hw/timer/Makefile.objs
> +++ b/hw/timer/Makefile.objs
> @@ -19,7 +19,6 @@ common-obj-$(CONFIG_NRF51_SOC) += nrf51_timer.o
>  common-obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
>  common-obj-$(CONFIG_EXYNOS4) += exynos4210_mct.o
>  common-obj-$(CONFIG_EXYNOS4) += exynos4210_pwm.o
> -common-obj-$(CONFIG_EXYNOS4) += exynos4210_rtc.o
>  common-obj-$(CONFIG_OMAP) += omap_gptimer.o
>  common-obj-$(CONFIG_OMAP) += omap_synctimer.o
>  common-obj-$(CONFIG_PXA2XX) += pxa2xx_timer.o
> 

Applied to my trivial-patches branch.

Thanks,
Laurent



Re: [PATCH v2 14/14] hw/rtc/aspeed_rtc: Remove unused includes

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:04, Philippe Mathieu-Daudé a écrit :
> The system  include is already provided by "osdep.h"
> (the scripts/clean-includes file clean such headers).
> 
> Commit 64552b6be47 suggests we don't need to include "hw/irq.h":
> 
> Move the qemu_irq and qemu_irq_handler typedefs from hw/irq.h to
> qemu/typedefs.h, and then include hw/irq.h only where it's still
> needed.
> 
> Reviewed-by: Cédric Le Goater 
> Reviewed-by: Alistair Francis 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  include/hw/rtc/aspeed_rtc.h | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/include/hw/rtc/aspeed_rtc.h b/include/hw/rtc/aspeed_rtc.h
> index 3fde854ad9..b94a710268 100644
> --- a/include/hw/rtc/aspeed_rtc.h
> +++ b/include/hw/rtc/aspeed_rtc.h
> @@ -8,9 +8,6 @@
>  #ifndef HW_RTC_ASPEED_RTC_H
>  #define HW_RTC_ASPEED_RTC_H
>  
> -#include 
> -
> -#include "hw/irq.h"
>  #include "hw/sysbus.h"
>  
>  typedef struct AspeedRtcState {
> 

Applied to my trivial-patches branch.

Thanks,
Laurent



Re: [PATCH v2 13/14] hw/rtc/xlnx-zynqmp-rtc: Remove unused "ptimer.h" include

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:04, Philippe Mathieu-Daudé a écrit :
> The "hw/ptimer.h" header is not used, remove it.
> 
> Reviewed-by: Alistair Francis 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/rtc/xlnx-zynqmp-rtc.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/hw/rtc/xlnx-zynqmp-rtc.c b/hw/rtc/xlnx-zynqmp-rtc.c
> index f9f09b7296..2bcd14d779 100644
> --- a/hw/rtc/xlnx-zynqmp-rtc.c
> +++ b/hw/rtc/xlnx-zynqmp-rtc.c
> @@ -32,7 +32,6 @@
>  #include "qemu/log.h"
>  #include "qemu/module.h"
>  #include "hw/irq.h"
> -#include "hw/ptimer.h"
>  #include "qemu/cutils.h"
>  #include "sysemu/sysemu.h"
>  #include "trace.h"
> 

Applied to my trivial-patches branch.

Thanks,
Laurent



Re: [PATCH v2 11/14] hw: Move Aspeed RTC from hw/timer/ to hw/rtc/ subdirectory

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:04, Philippe Mathieu-Daudé a écrit :
> Move RTC devices under the hw/rtc/ subdirectory.
> 
> Reviewed-by: Cédric Le Goater 
> Reviewed-by: Alistair Francis 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/rtc/Makefile.objs   | 1 +
>  hw/{timer => rtc}/aspeed_rtc.c | 2 +-
>  hw/rtc/trace-events| 4 
>  hw/timer/Makefile.objs | 2 +-
>  hw/timer/trace-events  | 4 
>  include/hw/arm/aspeed_soc.h| 2 +-
>  include/hw/{timer => rtc}/aspeed_rtc.h | 6 +++---
>  7 files changed, 11 insertions(+), 10 deletions(-)
>  rename hw/{timer => rtc}/aspeed_rtc.c (99%)
>  rename include/hw/{timer => rtc}/aspeed_rtc.h (84%)
> 
> diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs
> index 3d4763fc26..8dc9fcd3a9 100644
> --- a/hw/rtc/Makefile.objs
> +++ b/hw/rtc/Makefile.objs
> @@ -10,3 +10,4 @@ common-obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp-rtc.o
>  common-obj-$(CONFIG_EXYNOS4) += exynos4210_rtc.o
>  obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
>  common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
> +common-obj-$(CONFIG_ASPEED_SOC) += aspeed_rtc.o
> diff --git a/hw/timer/aspeed_rtc.c b/hw/rtc/aspeed_rtc.c
> similarity index 99%
> rename from hw/timer/aspeed_rtc.c
> rename to hw/rtc/aspeed_rtc.c
> index 5313017353..3ca1183558 100644
> --- a/hw/timer/aspeed_rtc.c
> +++ b/hw/rtc/aspeed_rtc.c
> @@ -8,7 +8,7 @@
>  
>  #include "qemu/osdep.h"
>  #include "qemu-common.h"
> -#include "hw/timer/aspeed_rtc.h"
> +#include "hw/rtc/aspeed_rtc.h"
>  #include "migration/vmstate.h"
>  #include "qemu/log.h"
>  #include "qemu/timer.h"
> diff --git a/hw/rtc/trace-events b/hw/rtc/trace-events
> index 7f1945ad4c..d6749f4616 100644
> --- a/hw/rtc/trace-events
> +++ b/hw/rtc/trace-events
> @@ -13,3 +13,7 @@ pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x 
> value 0x%08x"
>  pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
>  pl031_alarm_raised(void) "alarm raised"
>  pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
> +
> +# aspeed-rtc.c
> +aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 
> 0x%08" PRIx64
> +aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 
> 0x%08" PRIx64
> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
> index 33191d74cb..83091770df 100644
> --- a/hw/timer/Makefile.objs
> +++ b/hw/timer/Makefile.objs
> @@ -29,7 +29,7 @@ common-obj-$(CONFIG_MIPS_CPS) += mips_gictimer.o
>  common-obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o
>  
>  common-obj-$(CONFIG_STM32F2XX_TIMER) += stm32f2xx_timer.o
> -common-obj-$(CONFIG_ASPEED_SOC) += aspeed_timer.o aspeed_rtc.o
> +common-obj-$(CONFIG_ASPEED_SOC) += aspeed_timer.o
>  
>  common-obj-$(CONFIG_CMSDK_APB_TIMER) += cmsdk-apb-timer.o
>  common-obj-$(CONFIG_CMSDK_APB_DUALTIMER) += cmsdk-apb-dualtimer.o
> diff --git a/hw/timer/trace-events b/hw/timer/trace-events
> index 1459d07237..e18b87fc96 100644
> --- a/hw/timer/trace-events
> +++ b/hw/timer/trace-events
> @@ -66,10 +66,6 @@ cmsdk_apb_dualtimer_read(uint64_t offset, uint64_t data, 
> unsigned size) "CMSDK A
>  cmsdk_apb_dualtimer_write(uint64_t offset, uint64_t data, unsigned size) 
> "CMSDK APB dualtimer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
>  cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: reset"
>  
> -# hw/timer/aspeed-rtc.c
> -aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 
> 0x%08" PRIx64
> -aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 
> 0x%08" PRIx64
> -
>  # nrf51_timer.c
>  nrf51_timer_read(uint64_t addr, uint32_t value, unsigned size) "read addr 
> 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
>  nrf51_timer_write(uint64_t addr, uint32_t value, unsigned size) "write addr 
> 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
> diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
> index ab5052b12c..5a443006ed 100644
> --- a/include/hw/arm/aspeed_soc.h
> +++ b/include/hw/arm/aspeed_soc.h
> @@ -17,7 +17,7 @@
>  #include "hw/misc/aspeed_sdmc.h"
>  #include "hw/misc/aspeed_xdma.h"
>  #include "hw/timer/aspeed_timer.h"
> -#include "hw/timer/aspeed_rtc.h"
> +#include "hw/rtc/aspeed_rtc.h"
>  #include "hw/i2c/aspeed_i2c.h"
>  #include "hw/ssi/aspeed_smc.h"
>  #include "hw/watchdog/wdt_aspeed.h"
> diff --git a/include/hw/timer/aspeed_rtc.h b/include/hw/rtc/aspeed_rtc.h
> similarity index 84%
> rename from include/hw/timer/aspeed_rtc.h
> rename to include/hw/rtc/aspeed_rtc.h
> index 15ba42912b..3fde854ad9 100644
> --- a/include/hw/timer/aspeed_rtc.h
> +++ b/include/hw/rtc/aspeed_rtc.h
> @@ -5,8 +5,8 @@
>   * Copyright 2019 IBM Corp
>   * SPDX-License-Identifier: GPL-2.0-or-later
>   */
> -#ifndef ASPEED_RTC_H
> -#define ASPEED_RTC_H
> +#ifndef HW_RTC_ASPEED_RTC_H
> +#define HW_RTC_ASPEED_RTC_H
>  
>  #include 
>  
> @@ -27,4 +27,4 @@ typedef struct AspeedRtcState {
>  #define TYPE_ASPEED_RTC "aspeed.rtc"
>  #define ASPEED_RTC(obj) OB

Re: [PATCH 3/3] qemu-timer: reuse MIN macro in qemu_timeout_ns_to_ms

2019-10-24 Thread Laurent Vivier
Le 24/10/2019 à 20:03, Eric Blake a écrit :
> On 10/24/19 12:31 PM, Laurent Vivier wrote:
>> Le 23/10/2019 à 14:26, Frediano Ziglio a écrit :
>>> Signed-off-by: Frediano Ziglio 
>>> ---
>>>   util/qemu-timer.c | 6 +-
>>>   1 file changed, 1 insertion(+), 5 deletions(-)
>>>
> 
>>>
>>
>> Applied to my trivial-patches branch.
>>
>> I've updated the patch to remove the two useless casts.
>>
>> Eric, if you want to add your R-b, I can add it to the queued patch.
> 
> I don't see it queued on https://github.com/vivier/qemu/branches yet,

Sorry, forgot to push it.

> but if removing the two casts is the only difference from the original:
> 
> Reviewed-by: Eric Blake 
> 

Added and pushed (branch trivial-patches), you can check.

Thanks,
Laurent



Re: [PATCH v3 21/33] lance: replace PROP_PTR with PROP_LINK

2019-10-24 Thread Eduardo Habkost
On Thu, Oct 24, 2019 at 12:52:28PM +0100, Peter Maydell wrote:
> On Thu, 24 Oct 2019 at 12:48, Philippe Mathieu-Daudé  
> wrote:
> > Just wondering, if we had a "bus_address" property to the abstract
> > SysBus class (and eventually "bus_name" for later) we could create/map
> > sysbus devices from command line?
> 
> I don't think this is a good plan -- users shouldn't have to know
> about the memory map of their boards. Plus it doesn't deal with
> the complications of multiple address spaces, DMA, wiring up
> irq lines to an interrupt controller, SoC reset handling,
> clocks, power-managment...  Command line -device was designed
> for pluggable devices, where in the world of real hardware
> the device can be physically plugged and unplugged and there's
> a clear interface that can be modelled. You can't add an
> extra UART to an embedded board in real hardware either.
> 
> The only plausible argument I've seen for command-line
> plugging of embedded devices is as a sort of side-effect
> of having a configuration language syntax for them for
> the purpose of being able to write board models as
> data-driven config files rather than in C code. But
> that would be a lot of design and engineering work, and
> if we want that I think we should approach it forwards,
> not arrive at it backwards by adding gradual tweaks like
> 'address' properties to devices.

The QEMU community spent years designing QOM and QMP with that
goal.  Which other pieces to you consider to be missing, to
make you reject making gradual changes towards it?

I agree we shouldn't be introducing new external interfaces
without careful thought.  But I welcome gradual internal API
changes that are helpful for our long term goals.

-- 
Eduardo




Re: [PATCH v2 05/14] hw: Move M41T80 device from hw/timer/ to hw/rtc/ subdirectory

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:03, Philippe Mathieu-Daudé a écrit :
> The M41T80 is a Real Time Clock, not a timer.
> Move it under the hw/rtc/ subdirectory.
> 
> Reviewed-by: Alistair Francis 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  MAINTAINERS| 2 +-
>  hw/rtc/Kconfig | 4 
>  hw/rtc/Makefile.objs   | 1 +
>  hw/{timer => rtc}/m41t80.c | 0
>  hw/timer/Kconfig   | 4 
>  hw/timer/Makefile.objs | 1 -
>  6 files changed, 6 insertions(+), 6 deletions(-)
>  rename hw/{timer => rtc}/m41t80.c (100%)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5d85424a33..0dfaa05d17 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1113,7 +1113,7 @@ F: hw/ppc/sam460ex.c
>  F: hw/ppc/ppc440_pcix.c
>  F: hw/display/sm501*
>  F: hw/ide/sii3112.c
> -F: hw/timer/m41t80.c
> +F: hw/rtc/m41t80.c
>  F: pc-bios/canyonlands.dt[sb]
>  F: pc-bios/u-boot-sam460ex-20100605.bin
>  F: roms/u-boot-sam460ex
> diff --git a/hw/rtc/Kconfig b/hw/rtc/Kconfig
> index 159c233517..434b20b2b1 100644
> --- a/hw/rtc/Kconfig
> +++ b/hw/rtc/Kconfig
> @@ -1,3 +1,7 @@
> +config M41T80
> +bool
> +depends on I2C
> +
>  config M48T59
>  bool
>  
> diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs
> index c87f81405e..89e8e48c64 100644
> --- a/hw/rtc/Makefile.objs
> +++ b/hw/rtc/Makefile.objs
> @@ -1,3 +1,4 @@
> +common-obj-$(CONFIG_M41T80) += m41t80.o
>  common-obj-$(CONFIG_M48T59) += m48t59.o
>  ifeq ($(CONFIG_ISA_BUS),y)
>  common-obj-$(CONFIG_M48T59) += m48t59-isa.o
> diff --git a/hw/timer/m41t80.c b/hw/rtc/m41t80.c
> similarity index 100%
> rename from hw/timer/m41t80.c
> rename to hw/rtc/m41t80.c
> diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig
> index a57e9b59fc..a6b668b255 100644
> --- a/hw/timer/Kconfig
> +++ b/hw/timer/Kconfig
> @@ -20,10 +20,6 @@ config HPET
>  config I8254
>  bool
>  
> -config M41T80
> -bool
> -depends on I2C
> -
>  config TWL92230
>  bool
>  depends on I2C
> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
> index fe2d1fbc40..2fb12162a6 100644
> --- a/hw/timer/Makefile.objs
> +++ b/hw/timer/Makefile.objs
> @@ -6,7 +6,6 @@ common-obj-$(CONFIG_CADENCE) += cadence_ttc.o
>  common-obj-$(CONFIG_DS1338) += ds1338.o
>  common-obj-$(CONFIG_HPET) += hpet.o
>  common-obj-$(CONFIG_I8254) += i8254_common.o i8254.o
> -common-obj-$(CONFIG_M41T80) += m41t80.o
>  common-obj-$(CONFIG_PUV3) += puv3_ost.o
>  common-obj-$(CONFIG_TWL92230) += twl92230.o
>  common-obj-$(CONFIG_XILINX) += xilinx_timer.o
> 

Applied to my trivial-patches branch.

Thanks,
Laurent



Re: [PATCH v2 09/14] hw: Move Xilinx ZynqMP RTC from hw/timer/ to hw/rtc/ subdirectory

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:03, Philippe Mathieu-Daudé a écrit :
> Move RTC devices under the hw/rtc/ subdirectory.
> 
> Remove Alistair outdated email address (see commit c22e580c2ad).
> 
> Reviewed-by: Alistair Francis 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/rtc/Makefile.objs| 1 +
>  hw/rtc/trace-events | 3 +++
>  hw/{timer => rtc}/xlnx-zynqmp-rtc.c | 2 +-
>  hw/timer/Makefile.objs  | 1 -
>  hw/timer/trace-events   | 3 ---
>  include/hw/arm/xlnx-zynqmp.h| 2 +-
>  include/hw/{timer => rtc}/xlnx-zynqmp-rtc.h | 6 +++---
>  7 files changed, 9 insertions(+), 9 deletions(-)
>  rename hw/{timer => rtc}/xlnx-zynqmp-rtc.c (99%)
>  rename include/hw/{timer => rtc}/xlnx-zynqmp-rtc.h (95%)
> 
> diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs
> index b195863291..543a550a0f 100644
> --- a/hw/rtc/Makefile.objs
> +++ b/hw/rtc/Makefile.objs
> @@ -6,5 +6,6 @@ common-obj-$(CONFIG_M48T59) += m48t59-isa.o
>  endif
>  common-obj-$(CONFIG_PL031) += pl031.o
>  common-obj-$(CONFIG_TWL92230) += twl92230.o
> +common-obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp-rtc.o
>  obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
>  common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
> diff --git a/hw/rtc/trace-events b/hw/rtc/trace-events
> index ac9e0e0fba..7f1945ad4c 100644
> --- a/hw/rtc/trace-events
> +++ b/hw/rtc/trace-events
> @@ -4,6 +4,9 @@
>  sun4v_rtc_read(uint64_t addr, uint64_t value) "read: addr 0x%" PRIx64 " 
> value 0x%" PRIx64
>  sun4v_rtc_write(uint64_t addr, uint64_t value) "write: addr 0x%" PRIx64 " 
> value 0x%" PRIx64
>  
> +# xlnx-zynqmp-rtc.c
> +xlnx_zynqmp_rtc_gettime(int year, int month, int day, int hour, int min, int 
> sec) "Get time from host: %d-%d-%d %2d:%02d:%02d"
> +
>  # pl031.c
>  pl031_irq_state(int level) "irq state %d"
>  pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
> diff --git a/hw/timer/xlnx-zynqmp-rtc.c b/hw/rtc/xlnx-zynqmp-rtc.c
> similarity index 99%
> rename from hw/timer/xlnx-zynqmp-rtc.c
> rename to hw/rtc/xlnx-zynqmp-rtc.c
> index 5692db98c2..f9f09b7296 100644
> --- a/hw/timer/xlnx-zynqmp-rtc.c
> +++ b/hw/rtc/xlnx-zynqmp-rtc.c
> @@ -36,7 +36,7 @@
>  #include "qemu/cutils.h"
>  #include "sysemu/sysemu.h"
>  #include "trace.h"
> -#include "hw/timer/xlnx-zynqmp-rtc.h"
> +#include "hw/rtc/xlnx-zynqmp-rtc.h"
>  #include "migration/vmstate.h"
>  
>  #ifndef XLNX_ZYNQMP_RTC_ERR_DEBUG
> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
> index 70b61b69c7..294465ef47 100644
> --- a/hw/timer/Makefile.objs
> +++ b/hw/timer/Makefile.objs
> @@ -14,7 +14,6 @@ common-obj-$(CONFIG_IMX) += imx_epit.o
>  common-obj-$(CONFIG_IMX) += imx_gpt.o
>  common-obj-$(CONFIG_LM32) += lm32_timer.o
>  common-obj-$(CONFIG_MILKYMIST) += milkymist-sysctl.o
> -common-obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp-rtc.o
>  common-obj-$(CONFIG_NRF51_SOC) += nrf51_timer.o
>  
>  common-obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
> diff --git a/hw/timer/trace-events b/hw/timer/trace-events
> index ce34b967db..1459d07237 100644
> --- a/hw/timer/trace-events
> +++ b/hw/timer/trace-events
> @@ -70,9 +70,6 @@ cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: reset"
>  aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 
> 0x%08" PRIx64
>  aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 
> 0x%08" PRIx64
>  
> -# xlnx-zynqmp-rtc.c
> -xlnx_zynqmp_rtc_gettime(int year, int month, int day, int hour, int min, int 
> sec) "Get time from host: %d-%d-%d %2d:%02d:%02d"
> -
>  # nrf51_timer.c
>  nrf51_timer_read(uint64_t addr, uint32_t value, unsigned size) "read addr 
> 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
>  nrf51_timer_write(uint64_t addr, uint32_t value, unsigned size) "write addr 
> 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> index d7483c3b42..53076fa29a 100644
> --- a/include/hw/arm/xlnx-zynqmp.h
> +++ b/include/hw/arm/xlnx-zynqmp.h
> @@ -29,7 +29,7 @@
>  #include "hw/dma/xlnx-zdma.h"
>  #include "hw/display/xlnx_dp.h"
>  #include "hw/intc/xlnx-zynqmp-ipi.h"
> -#include "hw/timer/xlnx-zynqmp-rtc.h"
> +#include "hw/rtc/xlnx-zynqmp-rtc.h"
>  #include "hw/cpu/cluster.h"
>  #include "target/arm/cpu.h"
>  
> diff --git a/include/hw/timer/xlnx-zynqmp-rtc.h 
> b/include/hw/rtc/xlnx-zynqmp-rtc.h
> similarity index 95%
> rename from include/hw/timer/xlnx-zynqmp-rtc.h
> rename to include/hw/rtc/xlnx-zynqmp-rtc.h
> index 97e32322ed..6fa1cb2f43 100644
> --- a/include/hw/timer/xlnx-zynqmp-rtc.h
> +++ b/include/hw/rtc/xlnx-zynqmp-rtc.h
> @@ -3,7 +3,7 @@
>   *
>   * Copyright (c) 2017 Xilinx Inc.
>   *
> - * Written-by: Alistair Francis 
> + * Written-by: Alistair Francis
>   *
>   * Permission is hereby granted, free of charge, to any person obtaining a 
> copy
>   * of this software and associated documentation files (the "Software"), to 
> deal
> @@ -24,8 +24,8 @@
>   * THE SOFTWARE.

Re: [PULL 00/51] target-arm queue

2019-10-24 Thread Philippe Mathieu-Daudé

On 10/24/19 6:26 PM, Peter Maydell wrote:

Probably the last arm pullreq before softfreeze...

The following changes since commit 58560ad254fbda71d4daa6622d71683190070ee2:

   Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.2-20191024' 
into staging (2019-10-24 16:22:58 +0100)

are available in the Git repository at:

   https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20191024

for you to fetch changes up to a01a4a3e85ae8f6fe21adbedc80f7013faabdcf4:

   hw/arm/highbank: Use AddressSpace when using write_secondary_boot() 
(2019-10-24 17:16:30 +0100)


target-arm queue:
  * raspi boards: some cleanup
  * raspi: implement the bcm2835 system timer device
  * raspi: implement a dummy thermal sensor
  * KVM: support providing SVE to the guest
  * misc devices: switch to ptimer transaction API
  * cache TB flag state to improve performance of cpu_get_tb_cpu_state
  * aspeed: Add an AST2600 eval board


Andrew Jones (9):
   target/arm/monitor: Introduce qmp_query_cpu_model_expansion
   tests: arm: Introduce cpu feature tests
   target/arm: Allow SVE to be disabled via a CPU property
   target/arm/cpu64: max cpu: Introduce sve properties
   target/arm/kvm64: Add kvm_arch_get/put_sve
   target/arm/kvm64: max cpu: Enable SVE when available
   target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features
   target/arm/cpu64: max cpu: Support sve properties with KVM
   target/arm/kvm: host cpu: Add support for sve properties

Cédric Le Goater (2):
   hw/gpio: Fix property accessors of the AST2600 GPIO 1.8V model
   aspeed: Add an AST2600 eval board

Peter Maydell (8):
   hw/net/fsl_etsec/etsec.c: Switch to transaction-based ptimer API
   hw/timer/xilinx_timer.c: Switch to transaction-based ptimer API
   hw/dma/xilinx_axidma.c: Switch to transaction-based ptimer API
   hw/timer/slavio_timer: Remove useless check for NULL t->timer
   hw/timer/slavio_timer.c: Switch to transaction-based ptimer API
   hw/timer/grlib_gptimer.c: Switch to transaction-based ptimer API
   hw/m68k/mcf5206.c: Switch to transaction-based ptimer API
   hw/watchdog/milkymist-sysctl.c: Switch to transaction-based ptimer API

Philippe Mathieu-Daudé (8):
   hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
   hw/arm/bcm2835_peripherals: Use the thermal sensor block
   hw/timer/bcm2835: Add the BCM2835 SYS_timer
   hw/arm/bcm2835_peripherals: Use the SYS_timer
   hw/arm/bcm2836: Make the SoC code modular
   hw/arm/bcm2836: Rename cpus[] as cpu[].core
   hw/arm/raspi: Use AddressSpace when using arm_boot::write_secondary_boot
   hw/arm/highbank: Use AddressSpace when using write_secondary_boot()

Richard Henderson (24):
   target/arm: Split out rebuild_hflags_common
   target/arm: Split out rebuild_hflags_a64
   target/arm: Split out rebuild_hflags_common_32
   target/arm: Split arm_cpu_data_is_big_endian
   target/arm: Split out rebuild_hflags_m32
   target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state
   target/arm: Split out rebuild_hflags_a32
   target/arm: Split out rebuild_hflags_aprofile
   target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state
   target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state
   target/arm: Hoist computation of TBFLAG_A32.VFPEN
   target/arm: Add arm_rebuild_hflags
   target/arm: Split out arm_mmu_idx_el
   target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state
   target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32})
   target/arm: Rebuild hflags at EL changes
   target/arm: Rebuild hflags at MSR writes
   target/arm: Rebuild hflags at CPSR writes
   target/arm: Rebuild hflags at Xscale SCTLR writes
   target/arm: Rebuild hflags for M-profile
   target/arm: Rebuild hflags for M-profile NVIC
   linux-user/aarch64: Rebuild hflags for TARGET_WORDS_BIGENDIAN
   linux-user/arm: Rebuild hflags for TARGET_WORDS_BIGENDIAN
   target/arm: Rely on hflags correct in cpu_get_tb_cpu_state

  hw/misc/Makefile.objs|   1 +
  hw/timer/Makefile.objs   |   1 +
  tests/Makefile.include   |   5 +-
  qapi/machine-target.json |   6 +-
  hw/net/fsl_etsec/etsec.h |   1 -
  include/hw/arm/aspeed.h  |   1 +
  include/hw/arm/bcm2835_peripherals.h |   5 +-
  include/hw/arm/bcm2836.h |   4 +-
  include/hw/arm/raspi_platform.h  |   1 +
  include/hw/misc/bcm2835_thermal.h|  27 ++
  include/hw/timer/bcm2835_systmr.h|  33 +++
  include/qemu/bitops.h|   1 +
  target/arm/cpu.h | 105 +--
  target/arm/helper.h  |   4 +
  target/arm/internals.h   |   9 +

Re: [PATCH v2 08/14] hw: Move DS1338 device from hw/timer/ to hw/rtc/ subdirectory

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:03, Philippe Mathieu-Daudé a écrit :
> The DS1338 is a Real Time Clock, not a timer.
> Move it under the hw/rtc/ subdirectory.
> 
> Reviewed-by: Alistair Francis 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/rtc/Kconfig | 4 
>  hw/rtc/Makefile.objs   | 1 +
>  hw/{timer => rtc}/ds1338.c | 0
>  hw/timer/Kconfig   | 4 
>  hw/timer/Makefile.objs | 1 -
>  5 files changed, 5 insertions(+), 5 deletions(-)
>  rename hw/{timer => rtc}/ds1338.c (100%)
> 
> diff --git a/hw/rtc/Kconfig b/hw/rtc/Kconfig
> index dff9d60946..45daa8d655 100644
> --- a/hw/rtc/Kconfig
> +++ b/hw/rtc/Kconfig
> @@ -1,3 +1,7 @@
> +config DS1338
> +bool
> +depends on I2C
> +
>  config M41T80
>  bool
>  depends on I2C
> diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs
> index 810a38ee7b..b195863291 100644
> --- a/hw/rtc/Makefile.objs
> +++ b/hw/rtc/Makefile.objs
> @@ -1,3 +1,4 @@
> +common-obj-$(CONFIG_DS1338) += ds1338.o
>  common-obj-$(CONFIG_M41T80) += m41t80.o
>  common-obj-$(CONFIG_M48T59) += m48t59.o
>  ifeq ($(CONFIG_ISA_BUS),y)
> diff --git a/hw/timer/ds1338.c b/hw/rtc/ds1338.c
> similarity index 100%
> rename from hw/timer/ds1338.c
> rename to hw/rtc/ds1338.c
> diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig
> index 9357875f28..a990f9fe35 100644
> --- a/hw/timer/Kconfig
> +++ b/hw/timer/Kconfig
> @@ -9,10 +9,6 @@ config ARM_MPTIMER
>  config A9_GTIMER
>  bool
>  
> -config DS1338
> -bool
> -depends on I2C
> -
>  config HPET
>  bool
>  default y if PC
> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
> index 23be70b71d..70b61b69c7 100644
> --- a/hw/timer/Makefile.objs
> +++ b/hw/timer/Makefile.objs
> @@ -3,7 +3,6 @@ common-obj-$(CONFIG_ARM_MPTIMER) += arm_mptimer.o
>  common-obj-$(CONFIG_ARM_V7M) += armv7m_systick.o
>  common-obj-$(CONFIG_A9_GTIMER) += a9gtimer.o
>  common-obj-$(CONFIG_CADENCE) += cadence_ttc.o
> -common-obj-$(CONFIG_DS1338) += ds1338.o
>  common-obj-$(CONFIG_HPET) += hpet.o
>  common-obj-$(CONFIG_I8254) += i8254_common.o i8254.o
>  common-obj-$(CONFIG_PUV3) += puv3_ost.o
> 

Applied to my trivial-patches branch.

Thanks,
Laurent



Re: [PATCH 3/3] qemu-timer: reuse MIN macro in qemu_timeout_ns_to_ms

2019-10-24 Thread Laurent Vivier
Le 23/10/2019 à 14:26, Frediano Ziglio a écrit :
> Signed-off-by: Frediano Ziglio 
> ---
>  util/qemu-timer.c | 6 +-
>  1 file changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/util/qemu-timer.c b/util/qemu-timer.c
> index d428fec567..094a20a05a 100644
> --- a/util/qemu-timer.c
> +++ b/util/qemu-timer.c
> @@ -322,11 +322,7 @@ int qemu_timeout_ns_to_ms(int64_t ns)
>  ms = DIV_ROUND_UP(ns, SCALE_MS);
>  
>  /* To avoid overflow problems, limit this to 2^31, i.e. approx 25 days */
> -if (ms > (int64_t) INT32_MAX) {
> -ms = INT32_MAX;
> -}
> -
> -return (int) ms;
> +return (int) MIN(ms, (int64_t) INT32_MAX);
>  }
>  
>  
> 

Applied to my trivial-patches branch.

I've updated the patch to remove the two useless casts.

Eric, if you want to add your R-b, I can add it to the queued patch.

Thanks,
Laurent





Re: [PATCH v2 07/14] hw: Move TWL92230 device from hw/timer/ to hw/rtc/ subdirectory

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:03, Philippe Mathieu-Daudé a écrit :
> The TWL92230 is an "energy management device" companion with
> a RTC. Since we mostly model the RTC, move it under the hw/rtc/
> subdirectory.
> 
> Reviewed-by: Alistair Francis 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  MAINTAINERS  | 2 +-
>  hw/rtc/Kconfig   | 4 
>  hw/rtc/Makefile.objs | 1 +
>  hw/{timer => rtc}/twl92230.c | 0
>  hw/timer/Kconfig | 4 
>  hw/timer/Makefile.objs   | 1 -
>  6 files changed, 6 insertions(+), 6 deletions(-)
>  rename hw/{timer => rtc}/twl92230.c (100%)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 31e4fbf579..daa92cbff0 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -663,7 +663,7 @@ F: hw/display/blizzard.c
>  F: hw/input/lm832x.c
>  F: hw/input/tsc2005.c
>  F: hw/misc/cbus.c
> -F: hw/timer/twl92230.c
> +F: hw/rtc/twl92230.c
>  F: include/hw/display/blizzard.h
>  F: include/hw/input/tsc2xxx.h
>  F: include/hw/misc/cbus.h
> diff --git a/hw/rtc/Kconfig b/hw/rtc/Kconfig
> index cc7fead764..dff9d60946 100644
> --- a/hw/rtc/Kconfig
> +++ b/hw/rtc/Kconfig
> @@ -8,6 +8,10 @@ config M48T59
>  config PL031
>  bool
>  
> +config TWL92230
> +bool
> +depends on I2C
> +
>  config MC146818RTC
>  bool
>  
> diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs
> index 4621b37bc2..810a38ee7b 100644
> --- a/hw/rtc/Makefile.objs
> +++ b/hw/rtc/Makefile.objs
> @@ -4,5 +4,6 @@ ifeq ($(CONFIG_ISA_BUS),y)
>  common-obj-$(CONFIG_M48T59) += m48t59-isa.o
>  endif
>  common-obj-$(CONFIG_PL031) += pl031.o
> +common-obj-$(CONFIG_TWL92230) += twl92230.o
>  obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
>  common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
> diff --git a/hw/timer/twl92230.c b/hw/rtc/twl92230.c
> similarity index 100%
> rename from hw/timer/twl92230.c
> rename to hw/rtc/twl92230.c
> diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig
> index b04c928136..9357875f28 100644
> --- a/hw/timer/Kconfig
> +++ b/hw/timer/Kconfig
> @@ -20,10 +20,6 @@ config HPET
>  config I8254
>  bool
>  
> -config TWL92230
> -bool
> -depends on I2C
> -
>  config ALTERA_TIMER
>  bool
>  select PTIMER
> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
> index 034bd30255..23be70b71d 100644
> --- a/hw/timer/Makefile.objs
> +++ b/hw/timer/Makefile.objs
> @@ -7,7 +7,6 @@ common-obj-$(CONFIG_DS1338) += ds1338.o
>  common-obj-$(CONFIG_HPET) += hpet.o
>  common-obj-$(CONFIG_I8254) += i8254_common.o i8254.o
>  common-obj-$(CONFIG_PUV3) += puv3_ost.o
> -common-obj-$(CONFIG_TWL92230) += twl92230.o
>  common-obj-$(CONFIG_XILINX) += xilinx_timer.o
>  common-obj-$(CONFIG_SLAVIO) += slavio_timer.o
>  common-obj-$(CONFIG_ETRAXFS) += etraxfs_timer.o
> 

Applied to my trivial-patches branch.

Thanks,
Laurent



Re: [PATCH 2/3] event_notifier: avoid dandling file descriptor in event_notifier_cleanup

2019-10-24 Thread Laurent Vivier
Le 23/10/2019 à 14:26, Frediano Ziglio a écrit :
> If rfd is equal to wfd the file descriptor is closed but
> rfd will still have the closed value.
> The EventNotifier structure should not be used again after calling
> event_notifier_cleanup or should be initialized again but make
> sure to not have dandling file descriptors around.
> 
> Signed-off-by: Frediano Ziglio 
> ---
>  util/event_notifier-posix.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/util/event_notifier-posix.c b/util/event_notifier-posix.c
> index 73c4046b58..00d93204f9 100644
> --- a/util/event_notifier-posix.c
> +++ b/util/event_notifier-posix.c
> @@ -80,8 +80,8 @@ void event_notifier_cleanup(EventNotifier *e)
>  {
>  if (e->rfd != e->wfd) {
>  close(e->rfd);
> -e->rfd = -1;
>  }
> +e->rfd = -1;
>  close(e->wfd);
>  e->wfd = -1;
>  }
> 

Applied to my trivial-patches branch.

Thanks,
Laurent



Re: [PATCH v2 06/14] hw: Move sun4v hypervisor RTC from hw/timer/ to hw/rtc/ subdirectory

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:03, Philippe Mathieu-Daudé a écrit :
> Move RTC devices under the hw/rtc/ subdirectory.
> 
> Reviewed-by: Alistair Francis 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  MAINTAINERS   |  4 ++--
>  hw/rtc/Kconfig|  3 +++
>  hw/rtc/Makefile.objs  |  1 +
>  hw/{timer => rtc}/sun4v-rtc.c |  2 +-
>  hw/rtc/trace-events   |  4 
>  hw/sparc64/niagara.c  |  2 +-
>  hw/timer/Kconfig  |  3 ---
>  hw/timer/Makefile.objs|  1 -
>  hw/timer/trace-events |  4 
>  include/hw/rtc/sun4v-rtc.h| 19 +++
>  include/hw/timer/sun4v-rtc.h  |  1 -
>  11 files changed, 31 insertions(+), 13 deletions(-)
>  rename hw/{timer => rtc}/sun4v-rtc.c (98%)
>  create mode 100644 include/hw/rtc/sun4v-rtc.h
>  delete mode 100644 include/hw/timer/sun4v-rtc.h
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 0dfaa05d17..31e4fbf579 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1165,8 +1165,8 @@ Sun4v
>  M: Artyom Tarasenko 
>  S: Maintained
>  F: hw/sparc64/niagara.c
> -F: hw/timer/sun4v-rtc.c
> -F: include/hw/timer/sun4v-rtc.h
> +F: hw/rtc/sun4v-rtc.c
> +F: include/hw/rtc/sun4v-rtc.h
>  
>  Leon3
>  M: Fabien Chouteau 
> diff --git a/hw/rtc/Kconfig b/hw/rtc/Kconfig
> index 434b20b2b1..cc7fead764 100644
> --- a/hw/rtc/Kconfig
> +++ b/hw/rtc/Kconfig
> @@ -10,3 +10,6 @@ config PL031
>  
>  config MC146818RTC
>  bool
> +
> +config SUN4V_RTC
> +bool
> diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs
> index 89e8e48c64..4621b37bc2 100644
> --- a/hw/rtc/Makefile.objs
> +++ b/hw/rtc/Makefile.objs
> @@ -5,3 +5,4 @@ common-obj-$(CONFIG_M48T59) += m48t59-isa.o
>  endif
>  common-obj-$(CONFIG_PL031) += pl031.o
>  obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
> +common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
> diff --git a/hw/timer/sun4v-rtc.c b/hw/rtc/sun4v-rtc.c
> similarity index 98%
> rename from hw/timer/sun4v-rtc.c
> rename to hw/rtc/sun4v-rtc.c
> index 54272a822f..ada01b5774 100644
> --- a/hw/timer/sun4v-rtc.c
> +++ b/hw/rtc/sun4v-rtc.c
> @@ -13,7 +13,7 @@
>  #include "hw/sysbus.h"
>  #include "qemu/module.h"
>  #include "qemu/timer.h"
> -#include "hw/timer/sun4v-rtc.h"
> +#include "hw/rtc/sun4v-rtc.h"
>  #include "trace.h"
>  
>  
> diff --git a/hw/rtc/trace-events b/hw/rtc/trace-events
> index 54c94ac557..ac9e0e0fba 100644
> --- a/hw/rtc/trace-events
> +++ b/hw/rtc/trace-events
> @@ -1,5 +1,9 @@
>  # See docs/devel/tracing.txt for syntax documentation.
>  
> +# sun4v-rtc.c
> +sun4v_rtc_read(uint64_t addr, uint64_t value) "read: addr 0x%" PRIx64 " 
> value 0x%" PRIx64
> +sun4v_rtc_write(uint64_t addr, uint64_t value) "write: addr 0x%" PRIx64 " 
> value 0x%" PRIx64
> +
>  # pl031.c
>  pl031_irq_state(int level) "irq state %d"
>  pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
> diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c
> index 167143bffe..dfa0817eae 100644
> --- a/hw/sparc64/niagara.c
> +++ b/hw/sparc64/niagara.c
> @@ -30,7 +30,7 @@
>  #include "hw/misc/unimp.h"
>  #include "hw/loader.h"
>  #include "hw/sparc/sparc64.h"
> -#include "hw/timer/sun4v-rtc.h"
> +#include "hw/rtc/sun4v-rtc.h"
>  #include "exec/address-spaces.h"
>  #include "sysemu/block-backend.h"
>  #include "qemu/error-report.h"
> diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig
> index a6b668b255..b04c928136 100644
> --- a/hw/timer/Kconfig
> +++ b/hw/timer/Kconfig
> @@ -35,9 +35,6 @@ config ALLWINNER_A10_PIT
>  config STM32F2XX_TIMER
>  bool
>  
> -config SUN4V_RTC
> -bool
> -
>  config CMSDK_APB_TIMER
>  bool
>  select PTIMER
> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
> index 2fb12162a6..034bd30255 100644
> --- a/hw/timer/Makefile.objs
> +++ b/hw/timer/Makefile.objs
> @@ -35,7 +35,6 @@ common-obj-$(CONFIG_ALLWINNER_A10_PIT) += 
> allwinner-a10-pit.o
>  common-obj-$(CONFIG_STM32F2XX_TIMER) += stm32f2xx_timer.o
>  common-obj-$(CONFIG_ASPEED_SOC) += aspeed_timer.o aspeed_rtc.o
>  
> -common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
>  common-obj-$(CONFIG_CMSDK_APB_TIMER) += cmsdk-apb-timer.o
>  common-obj-$(CONFIG_CMSDK_APB_DUALTIMER) += cmsdk-apb-dualtimer.o
>  common-obj-$(CONFIG_MSF2) += mss-timer.o
> diff --git a/hw/timer/trace-events b/hw/timer/trace-events
> index 6936fe8573..ce34b967db 100644
> --- a/hw/timer/trace-events
> +++ b/hw/timer/trace-events
> @@ -70,10 +70,6 @@ cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: 
> reset"
>  aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 
> 0x%08" PRIx64
>  aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 
> 0x%08" PRIx64
>  
> -# sun4v-rtc.c
> -sun4v_rtc_read(uint64_t addr, uint64_t value) "read: addr 0x%" PRIx64 " 
> value 0x%" PRIx64
> -sun4v_rtc_write(uint64_t addr, uint64_t value) "write: addr 0x%" PRIx64 " 
> value 0x%" PRIx64
> -
>  # xlnx-zynqmp-rtc.c
>  xlnx_zynqmp_rtc_gettime(int year, int month, int day, int hour, int min, int 
> sec) "Get time from ho

Re: [PATCH v5 02/11] pci: add option for net failover

2019-10-24 Thread Laine Stump

On 10/23/19 5:15 PM, Alex Williamson wrote:

On Wed, 23 Oct 2019 22:31:37 +0200
Jens Freimann  wrote:


On Wed, Oct 23, 2019 at 02:02:11PM -0600, Alex Williamson wrote:

On Wed, 23 Oct 2019 21:30:35 +0200
Jens Freimann  wrote:
  

On Wed, Oct 23, 2019 at 12:06:48PM -0600, Alex Williamson wrote:

On Wed, 23 Oct 2019 10:27:02 +0200
Jens Freimann  wrote:

[...]

Are there also multi-function considerations that
should be prevented or documented?  For example, if a user tries to
configure both the primary and failover NICs in the same slot, I assume
bad things will happen.


   I would have expected that this is already checked in pci code, but
it is not. I tried it and when I put both devices into the same slot
they are both unplugged from the guest during boot but nothing else
happens. I don't know what triggers that unplug of the devices.

I'm not aware of any other problems regarding multi-function, which
doesn't mean there aren't any.


Hmm, was the hidden device at function #0?  The guest won't find any
functions if function #0 isn't present, but I don't know what would
trigger the hotplug.  The angle I'm thinking is that we only have slot
level granularity for hotplug, so any sort of automatic hotplug of a
slot should probably think about bystander devices within the slot.


Yes that would be a problem, but isn't it the same in the non-failover case
where a user configures it wrong? The slot where the device is plugged is not
chosen automatically it's configured by the user, no? I might be mixing 
something
up here.  I have no idea yet how to check if a slot is already populated, but
I'll think about it.


I don't think libvirt will automatically make use of multifunction
endpoints, except maybe for some built-in devices, so yes it probably
would be up to the user to explicitly create a multifunction device.


Correct. The only place libvirt will ever assign devices anywhere except 
function 0 is when we are adding pcie-root-ports - those are combined 
8-per-slot in order to conserve space on pcie.0 (this permits us to have 
up to 240 PCIe devices without needing to resort to upstream/downstream 
switches).




But are there other scenarios that generate an automatic hot-unplug?
If a user creates a multifunction slot and then triggers a hot-unplug
themselves, it's easy to place the blame on the user if the result is
unexpected, but is it so obviously a user configuration error if the
hotplug occurs as an automatic response to a migration?  I'm not as
sure about that.


I guess that's all a matter of opinion. If the user never enters in any 
PCI address info and it's all handled by someone else, then I wouldn't 
expect them to know exactly where the devices were (and only vaguely 
understand that their hostdev network interface is going to be unplugged 
during migration). In that case (as long as it's libvirt assigning the 
PCI addresses) the situation we're considering would never ever happen, 
so it's a non-issue.


If, on the other hand, the user wants to mess around assigning PCI 
addresses themselves, then they get to pick up all the pieces. It might 
be nice if they could be given a clue about why it broke though.




As indicated, I don't know whether this should just be documented or if
we should spend time preventing it, but someone, somewhere will
probably think it's a good idea to put their primary and failover NIC
in the same slot and be confused that the underlying mechanisms cannot
support it.  It doesn't appear that it would be too difficult to test
QEMU_PCI_CAP_MULTIFUNCTION (not set) and PCI_FUNC (is 0) for the
primary, but maybe I'm just being paranoid.  Thanks,


If, as you claim, it's not difficult, then I guess why not?




Re: [PATCH 1/3] util/async: avoid useless cast

2019-10-24 Thread Laurent Vivier
Le 23/10/2019 à 14:26, Frediano Ziglio a écrit :
> event_notifier_dummy_cb is already compatible with EventNotifierHandler.
> 
> Signed-off-by: Frediano Ziglio 
> ---
>  util/async.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/util/async.c b/util/async.c
> index ca83e32c7f..b1fa5319e5 100644
> --- a/util/async.c
> +++ b/util/async.c
> @@ -429,7 +429,6 @@ AioContext *aio_context_new(Error **errp)
>  
>  aio_set_event_notifier(ctx, &ctx->notifier,
> false,
> -   (EventNotifierHandler *)
> event_notifier_dummy_cb,
> event_notifier_poll);
>  #ifdef CONFIG_LINUX_AIO
> 

Applied to my trivial-patches branch.

Thanks,
Laurent



Re: [PATCH v2 0/3] Convert sparc devices to new ptimer API

2019-10-24 Thread Philippe Mathieu-Daudé

On 10/24/19 8:04 PM, Mark Cave-Ayland wrote:

On 24/10/2019 13:19, Peter Maydell wrote:


On Mon, 21 Oct 2019 at 14:43, Peter Maydell  wrote:


This patchset converts the devices used by sparc machines to the new
ptimer API.

Currently the ptimer design uses a QEMU bottom-half as its mechanism
for calling back into the device model using the ptimer when the
timer has expired.  Unfortunately this design is fatally flawed,
because it means that there is a lag between the ptimer updating its
own state and the device callback function updating device state, and
guest accesses to device registers between the two can return
inconsistent device state. This was reported as a bug in a specific
timer device but it's a problem with the generic ptimer code:
https://bugs.launchpad.net/qemu/+bug/177

The updates to the individual ptimer devices are straightforward:
we need to add begin/commit calls around the various places that
modify the ptimer state, and use the new ptimer_init() function
to create the timer.

Changes v1->v2:
  * patches 2 and 3 are the old 1 and 2 and have been reviewed
  * patch 1 is new and removes a pointless NULL check; without
this we'd probably have got Coverity errors when patch 3
added a use of t->timer before the check for it being NULL


I'm going to apply these to target-arm.next; I know they haven't
been on list long but the change since v1 is only minor and
they've all been reviewed.


Thanks Peter! Not sure if you saw my Tested-by tag last week for the slavio 
(sun4m)
parts, but there were no obvious regressions that I could see under 
qemu-system-sparc.


This was on v1:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg653861.html




Re: [PATCH v2 04/14] hw: Move M48T59 device from hw/timer/ to hw/rtc/ subdirectory

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:03, Philippe Mathieu-Daudé a écrit :
> The M48T59 is a Real Time Clock, not a timer.
> Move it under the hw/rtc/ subdirectory.
> 
> Reviewed-by: Alistair Francis 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
> v2: delete include/hw/timer/m48t59.h (dgibson)
> ---
>  MAINTAINERS |  4 +-
>  hw/ppc/ppc405_boards.c  |  2 +-
>  hw/ppc/prep.c   |  2 +-
>  hw/rtc/Kconfig  |  3 ++
>  hw/rtc/Makefile.objs|  4 ++
>  hw/{timer => rtc}/m48t59-internal.h |  0
>  hw/{timer => rtc}/m48t59-isa.c  |  4 +-
>  hw/{timer => rtc}/m48t59.c  |  2 +-
>  hw/sparc/sun4m.c|  2 +-
>  hw/sparc64/sun4u.c  |  2 +-
>  hw/timer/Kconfig|  3 --
>  hw/timer/Makefile.objs  |  4 --
>  include/hw/rtc/m48t59.h | 57 +
>  include/hw/timer/m48t59.h   | 32 
>  14 files changed, 73 insertions(+), 48 deletions(-)
>  rename hw/{timer => rtc}/m48t59-internal.h (100%)
>  rename hw/{timer => rtc}/m48t59-isa.c (98%)
>  rename hw/{timer => rtc}/m48t59.c (99%)
>  create mode 100644 include/hw/rtc/m48t59.h
>  delete mode 100644 include/hw/timer/m48t59.h
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index e3255cdbf2..5d85424a33 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1064,9 +1064,9 @@ F: hw/pci-host/prep.[hc]
>  F: hw/isa/i82378.c
>  F: hw/isa/pc87312.c
>  F: hw/dma/i82374.c
> -F: hw/timer/m48t59-isa.c
> +F: hw/rtc/m48t59-isa.c
>  F: include/hw/isa/pc87312.h
> -F: include/hw/timer/m48t59.h
> +F: include/hw/rtc/m48t59.h
>  F: pc-bios/ppc_rom.bin
>  
>  sPAPR
> diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
> index 388cae0b43..1f721feed6 100644
> --- a/hw/ppc/ppc405_boards.c
> +++ b/hw/ppc/ppc405_boards.c
> @@ -29,7 +29,7 @@
>  #include "cpu.h"
>  #include "hw/ppc/ppc.h"
>  #include "ppc405.h"
> -#include "hw/timer/m48t59.h"
> +#include "hw/rtc/m48t59.h"
>  #include "hw/block/flash.h"
>  #include "sysemu/sysemu.h"
>  #include "sysemu/qtest.h"
> diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
> index 3a51536e1a..862345c2ac 100644
> --- a/hw/ppc/prep.c
> +++ b/hw/ppc/prep.c
> @@ -25,7 +25,7 @@
>  
>  #include "qemu/osdep.h"
>  #include "cpu.h"
> -#include "hw/timer/m48t59.h"
> +#include "hw/rtc/m48t59.h"
>  #include "hw/char/serial.h"
>  #include "hw/block/fdc.h"
>  #include "net/net.h"
> diff --git a/hw/rtc/Kconfig b/hw/rtc/Kconfig
> index 7ffd702268..159c233517 100644
> --- a/hw/rtc/Kconfig
> +++ b/hw/rtc/Kconfig
> @@ -1,3 +1,6 @@
> +config M48T59
> +bool
> +
>  config PL031
>  bool
>  
> diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs
> index 3cac0d5a63..c87f81405e 100644
> --- a/hw/rtc/Makefile.objs
> +++ b/hw/rtc/Makefile.objs
> @@ -1,2 +1,6 @@
> +common-obj-$(CONFIG_M48T59) += m48t59.o
> +ifeq ($(CONFIG_ISA_BUS),y)
> +common-obj-$(CONFIG_M48T59) += m48t59-isa.o
> +endif
>  common-obj-$(CONFIG_PL031) += pl031.o
>  obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
> diff --git a/hw/timer/m48t59-internal.h b/hw/rtc/m48t59-internal.h
> similarity index 100%
> rename from hw/timer/m48t59-internal.h
> rename to hw/rtc/m48t59-internal.h
> diff --git a/hw/timer/m48t59-isa.c b/hw/rtc/m48t59-isa.c
> similarity index 98%
> rename from hw/timer/m48t59-isa.c
> rename to hw/rtc/m48t59-isa.c
> index 5e5432abfd..7fde854c0f 100644
> --- a/hw/timer/m48t59-isa.c
> +++ b/hw/rtc/m48t59-isa.c
> @@ -1,5 +1,5 @@
>  /*
> - * QEMU M48T59 and M48T08 NVRAM emulation (ISA bus interface
> + * QEMU M48T59 and M48T08 NVRAM emulation (ISA bus interface)
>   *
>   * Copyright (c) 2003-2005, 2007 Jocelyn Mayer
>   * Copyright (c) 2013 Hervé Poussineau
> @@ -26,7 +26,7 @@
>  #include "qemu/osdep.h"
>  #include "hw/isa/isa.h"
>  #include "hw/qdev-properties.h"
> -#include "hw/timer/m48t59.h"
> +#include "hw/rtc/m48t59.h"
>  #include "m48t59-internal.h"
>  #include "qemu/module.h"
>  
> diff --git a/hw/timer/m48t59.c b/hw/rtc/m48t59.c
> similarity index 99%
> rename from hw/timer/m48t59.c
> rename to hw/rtc/m48t59.c
> index a9fc2f981a..fc592b9fb1 100644
> --- a/hw/timer/m48t59.c
> +++ b/hw/rtc/m48t59.c
> @@ -27,7 +27,7 @@
>  #include "qemu-common.h"
>  #include "hw/irq.h"
>  #include "hw/qdev-properties.h"
> -#include "hw/timer/m48t59.h"
> +#include "hw/rtc/m48t59.h"
>  #include "qemu/timer.h"
>  #include "sysemu/runstate.h"
>  #include "sysemu/sysemu.h"
> diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
> index 6c5a17a020..2aaa5bf1ae 100644
> --- a/hw/sparc/sun4m.c
> +++ b/hw/sparc/sun4m.c
> @@ -31,7 +31,7 @@
>  #include "qemu/error-report.h"
>  #include "qemu/timer.h"
>  #include "hw/sparc/sun4m_iommu.h"
> -#include "hw/timer/m48t59.h"
> +#include "hw/rtc/m48t59.h"
>  #include "migration/vmstate.h"
>  #include "hw/sparc/sparc32_dma.h"
>  #include "hw/block/fdc.h"
> diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
> index 1ded2a4c9a..955082773b 100644
> --- a/hw/sparc64/sun4u.c
> +++ b/hw/sparc64/sun4u.c
> @

[Bug 1849644] Re: QEMU VNC websocket proxy requires non-standard 'binary' subprotocol

2019-10-24 Thread Daniel Berrange
It isn't mandatory to use a standardized subprotocol, all that's
required is that the client & server agree

  https://developer.mozilla.org/en-
US/docs/Web/HTTP/Protocol_upgrade_mechanism

  "The subprotocols may be selected from the IANA WebSocket Subprotocol
Name Registry or may be a custom name jointly understood by the client
and the server."

QEMU used/required 'binary' because that is what noVNC used when the
QEMU websockets code was first implemented.

It appears that noVNC was changed though to not send a "binary"
subprotocol in

  commit f8318361b1b62c4d76b091132d4a8ccfdd2957e4
  Author: Pierre Ossman 
  Date:   Sat Oct 14 12:45:56 2017 +0200

Remove wsProtocols setting

It isn't in use anymore since we deprecated support for Base64 mode.

>From QEMU's POV looks like we'll need to tweak code to treat 'binary'
and no sub-protocol as being equivalent.

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1849644

Title:
  QEMU VNC websocket proxy requires non-standard 'binary' subprotocol

Status in QEMU:
  New

Bug description:
  When running a machine using "-vnc" and the "websocket" option QEMU
  seems to require the subprotocol called 'binary'. This subprotocol
  does not exist in the WebSocket specification. In fact it has never
  existed in the spec, in one of the very early drafts of WebSockets it
  was briefly mentioned but it never made it to a final version.

  When the WebSocket server requires a non-standard subprotocol any
  WebSocket client that works correctly won't be able to connect.

  One example of such a client is noVNC, it tells the server that it
  doesn't want to use any subprotocol. QEMU's WebSocket proxy doesn't
  let noVNC connect. If noVNC is modified to ask for 'binary' it will
  work, this is, however, incorrect behavior.

  Looking at the code in "io/channel-websock.c" it seems it's quite
  hard-coded to binary:

  Look at line 58 and 433 here:
  https://git.qemu.org/?p=qemu.git;a=blob;f=io/channel-websock.c

  This code has to be made more dynamic, and shouldn't require binary.

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Re: [PATCH v2 00/14] hw: Split RTC devices from hw/timer/ to hw/rtc/

2019-10-24 Thread Philippe Mathieu-Daudé

On 10/24/19 7:36 PM, Laurent Vivier wrote:

On 24/10/2019 17:51, Peter Maydell wrote:

On Fri, 4 Oct 2019 at 00:04, Philippe Mathieu-Daudé  wrote:


Since v1: https://lists.gnu.org/archive/html/qemu-devel/2019-09/msg03334.html
- addressed review comments (described in patches 3 and 4)
- added R-b/A-b tags

Whole series now reviewed.


for the arm parts:
Acked-by: Peter Maydell 



I'm going to queue this series in qemu-trivial queue, so I guess your
Acked-by is for patches 2, 10 and 11?


ARM: 2, 7-11, 13-14:

  hw: Move PL031 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move TWL92230 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move DS1338 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move Xilinx ZynqMP RTC from hw/timer/ to hw/rtc/ subdirectory
  hw: Move Exynos4210 RTC from hw/timer/ to hw/rtc/ subdirectory
  hw: Move Aspeed RTC from hw/timer/ to hw/rtc/ subdirectory
  hw/rtc/xlnx-zynqmp-rtc: Remove unused "ptimer.h" include
  hw/rtc/aspeed_rtc: Remove unused includes

PPC: 3-5

  hw: Move MC146818 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move M48T59 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move M41T80 device from hw/timer/ to hw/rtc/ subdirectory

SPARC: 6

  hw: Move sun4v hypervisor RTC from hw/timer/ to hw/rtc/ subdirectory



Re: [PATCH v2 03/14] hw: Move MC146818 device from hw/timer/ to hw/rtc/ subdirectory

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:03, Philippe Mathieu-Daudé a écrit :
> The MC146818 is a Real Time Clock, not a timer.
> Move it under the hw/rtc/ subdirectory.
> 
> Use copyright statement from 80cabfad163 for "hw/rtc/mc146818rtc.h".
> 
> Reviewed-by: Alistair Francis 
> Acked-by: David Gibson 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
> v2: Use SPDX identifier (thuth)
> ---
>  MAINTAINERS  |  4 ++--
>  hw/alpha/dp264.c |  2 +-
>  hw/hppa/machine.c|  2 +-
>  hw/i386/acpi-build.c |  2 +-
>  hw/i386/pc.c |  2 +-
>  hw/i386/pc_q35.c |  2 +-
>  hw/mips/mips_fulong2e.c  |  2 +-
>  hw/mips/mips_jazz.c  |  2 +-
>  hw/mips/mips_malta.c |  2 +-
>  hw/mips/mips_r4k.c   |  2 +-
>  hw/ppc/pnv.c |  2 +-
>  hw/ppc/prep.c|  2 +-
>  hw/rtc/Kconfig   |  3 +++
>  hw/rtc/Makefile.objs |  1 +
>  hw/{timer => rtc}/mc146818rtc.c  |  2 +-
>  hw/timer/Kconfig |  3 ---
>  hw/timer/Makefile.objs   |  2 --
>  hw/timer/hpet.c  |  2 +-
>  include/hw/{timer => rtc}/mc146818rtc.h  | 14 +++---
>  include/hw/{timer => rtc}/mc146818rtc_regs.h |  5 +++--
>  tests/rtc-test.c |  2 +-
>  21 files changed, 34 insertions(+), 26 deletions(-)
>  rename hw/{timer => rtc}/mc146818rtc.c (99%)
>  rename include/hw/{timer => rtc}/mc146818rtc.h (58%)
>  rename include/hw/{timer => rtc}/mc146818rtc_regs.h (96%)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 92d27f1206..e3255cdbf2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1263,7 +1263,7 @@ F: hw/misc/debugexit.c
>  F: hw/misc/pc-testdev.c
>  F: hw/timer/hpet*
>  F: hw/timer/i8254*
> -F: hw/timer/mc146818rtc*
> +F: hw/rtc/mc146818rtc*
>  F: hw/watchdog/wdt_ib700.c
>  F: hw/watchdog/wdt_i6300esb.c
>  F: include/hw/display/vga.h
> @@ -1275,7 +1275,7 @@ F: include/hw/isa/i8259_internal.h
>  F: include/hw/isa/superio.h
>  F: include/hw/timer/hpet.h
>  F: include/hw/timer/i8254*
> -F: include/hw/timer/mc146818rtc*
> +F: include/hw/rtc/mc146818rtc*
>  
>  Machine core
>  M: Eduardo Habkost 
> diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
> index 51feee8558..51b3cf7a61 100644
> --- a/hw/alpha/dp264.c
> +++ b/hw/alpha/dp264.c
> @@ -14,7 +14,7 @@
>  #include "alpha_sys.h"
>  #include "qemu/error-report.h"
>  #include "sysemu/sysemu.h"
> -#include "hw/timer/mc146818rtc.h"
> +#include "hw/rtc/mc146818rtc.h"
>  #include "hw/ide.h"
>  #include "hw/timer/i8254.h"
>  #include "hw/isa/superio.h"
> diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
> index 2736ce835e..6598e2469d 100644
> --- a/hw/hppa/machine.c
> +++ b/hw/hppa/machine.c
> @@ -12,7 +12,7 @@
>  #include "qemu/error-report.h"
>  #include "sysemu/reset.h"
>  #include "sysemu/sysemu.h"
> -#include "hw/timer/mc146818rtc.h"
> +#include "hw/rtc/mc146818rtc.h"
>  #include "hw/ide.h"
>  #include "hw/timer/i8254.h"
>  #include "hw/char/serial.h"
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 4e0f9f425a..fb53e0b691 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -45,7 +45,7 @@
>  #include "hw/acpi/vmgenid.h"
>  #include "hw/boards.h"
>  #include "sysemu/tpm_backend.h"
> -#include "hw/timer/mc146818rtc_regs.h"
> +#include "hw/rtc/mc146818rtc_regs.h"
>  #include "migration/vmstate.h"
>  #include "hw/mem/memory-device.h"
>  #include "sysemu/numa.h"
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index bcda50efcc..061cdb77f8 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -42,7 +42,7 @@
>  #include "elf.h"
>  #include "migration/vmstate.h"
>  #include "multiboot.h"
> -#include "hw/timer/mc146818rtc.h"
> +#include "hw/rtc/mc146818rtc.h"
>  #include "hw/dma/i8257.h"
>  #include "hw/timer/i8254.h"
>  #include "hw/input/i8042.h"
> diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
> index 8fad20f314..748fc2ee15 100644
> --- a/hw/i386/pc_q35.c
> +++ b/hw/i386/pc_q35.c
> @@ -33,7 +33,7 @@
>  #include "hw/loader.h"
>  #include "sysemu/arch_init.h"
>  #include "hw/i2c/smbus_eeprom.h"
> -#include "hw/timer/mc146818rtc.h"
> +#include "hw/rtc/mc146818rtc.h"
>  #include "hw/xen/xen.h"
>  #include "sysemu/kvm.h"
>  #include "kvm_i386.h"
> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
> index cf537dd7e6..03a27e1767 100644
> --- a/hw/mips/mips_fulong2e.c
> +++ b/hw/mips/mips_fulong2e.c
> @@ -39,7 +39,7 @@
>  #include "hw/ide.h"
>  #include "elf.h"
>  #include "hw/isa/vt82c686.h"
> -#include "hw/timer/mc146818rtc.h"
> +#include "hw/rtc/mc146818rtc.h"
>  #include "hw/timer/i8254.h"
>  #include "exec/address-spaces.h"
>  #include "sysemu/qtest.h"
> diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
> index c967b97d80

[PATCH v6 7/9] virtio: add property to enable packed virtqueue

2019-10-24 Thread Eugenio Pérez
From: Jason Wang 

Signed-off-by: Jason Wang 
Reviewed-by: Jens Freimann 
---
 include/hw/virtio/virtio.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h
index d123d5b181..40ddeafadb 100644
--- a/include/hw/virtio/virtio.h
+++ b/include/hw/virtio/virtio.h
@@ -285,7 +285,9 @@ typedef struct VirtIORNGConf VirtIORNGConf;
 DEFINE_PROP_BIT64("any_layout", _state, _field, \
   VIRTIO_F_ANY_LAYOUT, true), \
 DEFINE_PROP_BIT64("iommu_platform", _state, _field, \
-  VIRTIO_F_IOMMU_PLATFORM, false)
+  VIRTIO_F_IOMMU_PLATFORM, false), \
+DEFINE_PROP_BIT64("packed", _state, _field, \
+  VIRTIO_F_RING_PACKED, false)
 
 hwaddr virtio_queue_get_desc_addr(VirtIODevice *vdev, int n);
 bool virtio_queue_enabled(VirtIODevice *vdev, int n);
-- 
2.16.5




Re: [PATCH v2 0/4] apic: Fix migration breakage of >255 vcpus

2019-10-24 Thread John Snow



On 10/23/19 4:17 AM, Kevin Wolf wrote:
> The important difference here is legacy IDE (which works) vs. AHCI
> (which doesn't work). If you add a -device ahci to the -M pc case, it
> starts failing, too.
> 
> Not sure why AHCI fails, but I'll just CC John who is the lucky
> maintainer of this device. :-)

Hm... It looks like SeaBIOS is identifying the drive correctly and
perfectly well, but we're failing at boot_disk(u8 bootdrv, int
checksig), about here:

call16_int(0x13, &br);

if (br.flags & F_CF) {
printf("Boot failed: could not read the boot disk\n\n");
return;
}

Looking at AHCI tracing (From the QEMU side), it looks like we set up
the drive correctly, and then never touch the port ever again -- I don't
see an attempted read on QEMU's end.

I'll need to look through SeaBIOS source for hints, I'm not sure right
yet. If anyone is more familiar with the SeaBIOS boot code, maybe they
can give a pointer faster than I'll figure it out myself.

--js




Re: [PATCH v2 02/14] hw: Move PL031 device from hw/timer/ to hw/rtc/ subdirectory

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:03, Philippe Mathieu-Daudé a écrit :
> The PL031 is a Real Time Clock, not a timer.
> Move it under the hw/rtc/ subdirectory.
> 
> Reviewed-by: Alistair Francis 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  MAINTAINERS   | 4 ++--
>  Makefile.objs | 1 +
>  hw/Kconfig| 1 +
>  hw/Makefile.objs  | 1 +
>  hw/arm/musca.c| 2 +-
>  hw/rtc/Kconfig| 2 ++
>  hw/rtc/Makefile.objs  | 1 +
>  hw/{timer => rtc}/pl031.c | 2 +-
>  hw/rtc/trace-events   | 8 
>  hw/timer/Kconfig  | 3 ---
>  hw/timer/Makefile.objs| 1 -
>  hw/timer/trace-events | 7 ---
>  include/hw/{timer => rtc}/pl031.h | 5 +++--
>  13 files changed, 21 insertions(+), 17 deletions(-)
>  create mode 100644 hw/rtc/Kconfig
>  create mode 100644 hw/rtc/Makefile.objs
>  rename hw/{timer => rtc}/pl031.c (99%)
>  create mode 100644 hw/rtc/trace-events
>  rename include/hw/{timer => rtc}/pl031.h (93%)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 21264eae9c..92d27f1206 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -495,8 +495,8 @@ F: hw/intc/pl190.c
>  F: hw/sd/pl181.c
>  F: hw/ssi/pl022.c
>  F: include/hw/ssi/pl022.h
> -F: hw/timer/pl031.c
> -F: include/hw/timer/pl031.h
> +F: hw/rtc/pl031.c
> +F: include/hw/rtc/pl031.h
>  F: include/hw/arm/primecell.h
>  F: hw/timer/cmsdk-apb-timer.c
>  F: include/hw/timer/cmsdk-apb-timer.h
> diff --git a/Makefile.objs b/Makefile.objs
> index abcbd89654..11ba1a36bd 100644
> --- a/Makefile.objs
> +++ b/Makefile.objs
> @@ -173,6 +173,7 @@ trace-events-subdirs += hw/pci-host
>  trace-events-subdirs += hw/ppc
>  trace-events-subdirs += hw/rdma
>  trace-events-subdirs += hw/rdma/vmw
> +trace-events-subdirs += hw/rtc
>  trace-events-subdirs += hw/s390x
>  trace-events-subdirs += hw/scsi
>  trace-events-subdirs += hw/sd
> diff --git a/hw/Kconfig b/hw/Kconfig
> index b45db3c813..4b53fee4d0 100644
> --- a/hw/Kconfig
> +++ b/hw/Kconfig
> @@ -27,6 +27,7 @@ source pci-host/Kconfig
>  source pcmcia/Kconfig
>  source pci/Kconfig
>  source rdma/Kconfig
> +source rtc/Kconfig
>  source scsi/Kconfig
>  source sd/Kconfig
>  source semihosting/Kconfig
> diff --git a/hw/Makefile.objs b/hw/Makefile.objs
> index ece6cc3755..fd9750e5f2 100644
> --- a/hw/Makefile.objs
> +++ b/hw/Makefile.objs
> @@ -26,6 +26,7 @@ devices-dirs-y += nvram/
>  devices-dirs-y += pci/
>  devices-dirs-$(CONFIG_PCI) += pci-bridge/ pci-host/
>  devices-dirs-y += pcmcia/
> +devices-dirs-y += rtc/
>  devices-dirs-$(CONFIG_SCSI) += scsi/
>  devices-dirs-y += sd/
>  devices-dirs-y += ssi/
> diff --git a/hw/arm/musca.c b/hw/arm/musca.c
> index 68db4b5b38..ba99dd1941 100644
> --- a/hw/arm/musca.c
> +++ b/hw/arm/musca.c
> @@ -32,7 +32,7 @@
>  #include "hw/misc/tz-mpc.h"
>  #include "hw/misc/tz-ppc.h"
>  #include "hw/misc/unimp.h"
> -#include "hw/timer/pl031.h"
> +#include "hw/rtc/pl031.h"
>  
>  #define MUSCA_NUMIRQ_MAX 96
>  #define MUSCA_PPC_MAX 3
> diff --git a/hw/rtc/Kconfig b/hw/rtc/Kconfig
> new file mode 100644
> index 00..8a4383bca9
> --- /dev/null
> +++ b/hw/rtc/Kconfig
> @@ -0,0 +1,2 @@
> +config PL031
> +bool
> diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs
> new file mode 100644
> index 00..3e1eb42563
> --- /dev/null
> +++ b/hw/rtc/Makefile.objs
> @@ -0,0 +1 @@
> +common-obj-$(CONFIG_PL031) += pl031.o
> diff --git a/hw/timer/pl031.c b/hw/rtc/pl031.c
> similarity index 99%
> rename from hw/timer/pl031.c
> rename to hw/rtc/pl031.c
> index 2b3e261006..3a982752a2 100644
> --- a/hw/timer/pl031.c
> +++ b/hw/rtc/pl031.c
> @@ -13,7 +13,7 @@
>  
>  #include "qemu/osdep.h"
>  #include "qemu-common.h"
> -#include "hw/timer/pl031.h"
> +#include "hw/rtc/pl031.h"
>  #include "migration/vmstate.h"
>  #include "hw/irq.h"
>  #include "hw/qdev-properties.h"
> diff --git a/hw/rtc/trace-events b/hw/rtc/trace-events
> new file mode 100644
> index 00..54c94ac557
> --- /dev/null
> +++ b/hw/rtc/trace-events
> @@ -0,0 +1,8 @@
> +# See docs/devel/tracing.txt for syntax documentation.
> +
> +# pl031.c
> +pl031_irq_state(int level) "irq state %d"
> +pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
> +pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
> +pl031_alarm_raised(void) "alarm raised"
> +pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
> diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig
> index eefc95f35e..27c5dce09e 100644
> --- a/hw/timer/Kconfig
> +++ b/hw/timer/Kconfig
> @@ -27,9 +27,6 @@ config M41T80
>  config M48T59
>  bool
>  
> -config PL031
> -bool
> -
>  config TWL92230
>  bool
>  depends on I2C
> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
> index f407523aa4..9f64f6e11e 100644
> --- a/hw/timer/Makefile.objs
> +++ b/hw/timer/Makefile.objs
> @@ -11,7 +11,6 @@ common-obj-$(CONFIG_M48T59) += m48t59.o
>  ifeq ($(CONFIG_ISA_BUS),y)
>  common

[PATCH v6 4/9] virtio: basic packed virtqueue support

2019-10-24 Thread Eugenio Pérez
From: Jason Wang 

This patch implements basic support for the packed virtqueue. Compare
the split virtqueue which has three rings, packed virtqueue only have
one which is supposed to have better cache utilization and more
hardware friendly.

Please refer virtio specification for more information.

Signed-off-by: Wei Xu 
Signed-off-by: Jason Wang 
---
 hw/block/virtio-blk.c   |   2 +-
 hw/char/virtio-serial-bus.c |   2 +-
 hw/scsi/virtio-scsi.c   |   3 +-
 hw/virtio/virtio.c  | 900 
 include/hw/virtio/virtio.h  |  10 +-
 5 files changed, 837 insertions(+), 80 deletions(-)

diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c
index ba846fe9dc..7dbdeaaab9 100644
--- a/hw/block/virtio-blk.c
+++ b/hw/block/virtio-blk.c
@@ -1052,7 +1052,7 @@ static void virtio_blk_save_device(VirtIODevice *vdev, 
QEMUFile *f)
 qemu_put_be32(f, virtio_get_queue_index(req->vq));
 }
 
-qemu_put_virtqueue_element(f, &req->elem);
+qemu_put_virtqueue_element(vdev, f, &req->elem);
 req = req->next;
 }
 qemu_put_sbyte(f, 0);
diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c
index 4e0ed829ae..33259042a9 100644
--- a/hw/char/virtio-serial-bus.c
+++ b/hw/char/virtio-serial-bus.c
@@ -708,7 +708,7 @@ static void virtio_serial_save_device(VirtIODevice *vdev, 
QEMUFile *f)
 if (elem_popped) {
 qemu_put_be32s(f, &port->iov_idx);
 qemu_put_be64s(f, &port->iov_offset);
-qemu_put_virtqueue_element(f, port->elem);
+qemu_put_virtqueue_element(vdev, f, port->elem);
 }
 }
 }
diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/virtio-scsi.c
index ee52aa7d17..e8b2b64d09 100644
--- a/hw/scsi/virtio-scsi.c
+++ b/hw/scsi/virtio-scsi.c
@@ -190,11 +190,12 @@ static void virtio_scsi_save_request(QEMUFile *f, 
SCSIRequest *sreq)
 {
 VirtIOSCSIReq *req = sreq->hba_private;
 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(req->dev);
+VirtIODevice *vdev = VIRTIO_DEVICE(req->dev);
 uint32_t n = virtio_get_queue_index(req->vq) - 2;
 
 assert(n < vs->conf.num_queues);
 qemu_put_be32s(f, &n);
-qemu_put_virtqueue_element(f, &req->elem);
+qemu_put_virtqueue_element(vdev, f, &req->elem);
 }
 
 static void *virtio_scsi_load_request(QEMUFile *f, SCSIRequest *sreq)
diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
index 74cc10fad9..6e7a034d2a 100644
--- a/hw/virtio/virtio.c
+++ b/hw/virtio/virtio.c
@@ -96,6 +96,7 @@ typedef struct VRingPackedDescEvent {
 struct VirtQueue
 {
 VRing vring;
+VirtQueueElement *used_elems;
 
 /* Next head to pop */
 uint16_t last_avail_idx;
@@ -160,6 +161,7 @@ static void virtio_init_region_cache(VirtIODevice *vdev, 
int n)
 VRingMemoryRegionCaches *new = NULL;
 hwaddr addr, size;
 int64_t len;
+bool packed;
 
 
 addr = vq->vring.desc;
@@ -168,8 +170,10 @@ static void virtio_init_region_cache(VirtIODevice *vdev, 
int n)
 }
 new = g_new0(VRingMemoryRegionCaches, 1);
 size = virtio_queue_get_desc_size(vdev, n);
+packed = virtio_vdev_has_feature(vq->vdev, VIRTIO_F_RING_PACKED) ?
+   true : false;
 len = address_space_cache_init(&new->desc, vdev->dma_as,
-   addr, size, false);
+   addr, size, packed);
 if (len < size) {
 virtio_error(vdev, "Cannot map desc");
 goto err_desc;
@@ -225,8 +229,8 @@ void virtio_queue_update_rings(VirtIODevice *vdev, int n)
 }
 
 /* Called within rcu_read_lock().  */
-static void vring_desc_read(VirtIODevice *vdev, VRingDesc *desc,
-MemoryRegionCache *cache, int i)
+static void vring_split_desc_read(VirtIODevice *vdev, VRingDesc *desc,
+  MemoryRegionCache *cache, int i)
 {
 address_space_read_cached(cache, i * sizeof(VRingDesc),
   desc, sizeof(VRingDesc));
@@ -370,6 +374,95 @@ int virtio_queue_ready(VirtQueue *vq)
 return vq->vring.avail != 0;
 }
 
+static void vring_packed_desc_read_flags(VirtIODevice *vdev,
+ uint16_t *flags,
+ MemoryRegionCache *cache,
+ int i)
+{
+address_space_read_cached(cache,
+  i * sizeof(VRingPackedDesc) +
+  offsetof(VRingPackedDesc, flags),
+  flags, sizeof(*flags));
+virtio_tswap16s(vdev, flags);
+}
+
+static void vring_packed_desc_read(VirtIODevice *vdev,
+   VRingPackedDesc *desc,
+   MemoryRegionCache *cache,
+   int i, bool strict_order)
+{
+hwaddr off = i * sizeof(VRingPackedDesc);
+
+vring_packed_desc_read_flags(vdev, &desc->flags, cache, i);
+
+if (strict_order) {
+/* Mak

Re: [PATCH v2 01/14] hw/timer: Compile devices not target-dependent as common object

2019-10-24 Thread Laurent Vivier
Le 04/10/2019 à 01:03, Philippe Mathieu-Daudé a écrit :
> All these devices do not contain any target-specific. While most
> of them are arch-specific, they are shared between different
> targets of the same arch family (ARM and AArch64, MIPS32/MIPS64,
> endianess, ...).
> Put them into common-obj-y to compile them once for all targets.
> 
> Reviewed-by: Alistair Francis 
> Reviewed-by: Thomas Huth 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/timer/Makefile.objs | 22 +++---
>  1 file changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
> index 123d92c969..f407523aa4 100644
> --- a/hw/timer/Makefile.objs
> +++ b/hw/timer/Makefile.objs
> @@ -25,20 +25,20 @@ common-obj-$(CONFIG_MILKYMIST) += milkymist-sysctl.o
>  common-obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp-rtc.o
>  common-obj-$(CONFIG_NRF51_SOC) += nrf51_timer.o
>  
> -obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
> -obj-$(CONFIG_EXYNOS4) += exynos4210_mct.o
> -obj-$(CONFIG_EXYNOS4) += exynos4210_pwm.o
> -obj-$(CONFIG_EXYNOS4) += exynos4210_rtc.o
> -obj-$(CONFIG_OMAP) += omap_gptimer.o
> -obj-$(CONFIG_OMAP) += omap_synctimer.o
> -obj-$(CONFIG_PXA2XX) += pxa2xx_timer.o
> -obj-$(CONFIG_SH4) += sh_timer.o
> -obj-$(CONFIG_DIGIC) += digic-timer.o
> -obj-$(CONFIG_MIPS_CPS) += mips_gictimer.o
> +common-obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
> +common-obj-$(CONFIG_EXYNOS4) += exynos4210_mct.o
> +common-obj-$(CONFIG_EXYNOS4) += exynos4210_pwm.o
> +common-obj-$(CONFIG_EXYNOS4) += exynos4210_rtc.o
> +common-obj-$(CONFIG_OMAP) += omap_gptimer.o
> +common-obj-$(CONFIG_OMAP) += omap_synctimer.o
> +common-obj-$(CONFIG_PXA2XX) += pxa2xx_timer.o
> +common-obj-$(CONFIG_SH4) += sh_timer.o
> +common-obj-$(CONFIG_DIGIC) += digic-timer.o
> +common-obj-$(CONFIG_MIPS_CPS) += mips_gictimer.o
>  
>  obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
>  
> -obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o
> +common-obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o
>  
>  common-obj-$(CONFIG_STM32F2XX_TIMER) += stm32f2xx_timer.o
>  common-obj-$(CONFIG_ASPEED_SOC) += aspeed_timer.o aspeed_rtc.o
> 

Applied to my trivial-patches branch.

Thanks,
Laurent



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