[PATCH 2/2] target/ppc: Fix ISA v3.0 (POWER9) slbia implementation

[Nicholas Piggin]

Linux using the hash MMU ("disable_radix" command line) on a POWER9
machine quickly hits translation bugs due to using v3.0 slbia
features that are not implemented in TCG. Add them.

Signed-off-by: Nicholas Piggin 
---
 target/ppc/helper.h |  2 +-
 target/ppc/mmu-hash64.c | 57 -
 target/ppc/translate.c  |  5 +++-
 3 files changed, 55 insertions(+), 9 deletions(-)

diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index ee1498050d..2dfa1c6942 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -615,7 +615,7 @@ DEF_HELPER_FLAGS_3(store_slb, TCG_CALL_NO_RWG, void, env, 
tl, tl)
 DEF_HELPER_2(load_slb_esid, tl, env, tl)
 DEF_HELPER_2(load_slb_vsid, tl, env, tl)
 DEF_HELPER_2(find_slb_vsid, tl, env, tl)
-DEF_HELPER_FLAGS_1(slbia, TCG_CALL_NO_RWG, void, env)
+DEF_HELPER_FLAGS_2(slbia, TCG_CALL_NO_RWG, void, env, i32)
 DEF_HELPER_FLAGS_2(slbie, TCG_CALL_NO_RWG, void, env, tl)
 DEF_HELPER_FLAGS_2(slbieg, TCG_CALL_NO_RWG, void, env, tl)
 #endif
diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
index 373d44de74..deb1c13a66 100644
--- a/target/ppc/mmu-hash64.c
+++ b/target/ppc/mmu-hash64.c
@@ -95,9 +95,10 @@ void dump_slb(PowerPCCPU *cpu)
 }
 }
 
-void helper_slbia(CPUPPCState *env)
+void helper_slbia(CPUPPCState *env, uint32_t ih)
 {
 PowerPCCPU *cpu = env_archcpu(env);
+int starting_entry;
 int n;
 
 /*
@@ -111,18 +112,59 @@ void helper_slbia(CPUPPCState *env)
  * expected that slbmte is more common than slbia, and slbia is usually
  * going to evict valid SLB entries, so that tradeoff is unlikely to be a
  * good one.
+ *
+ * ISA v2.05 introduced IH field with values 0,1,2,6. These all invalidate
+ * the same SLB entries (everything but entry 0), but differ in what
+ * "lookaside information" is invalidated. TCG can ignore this and flush
+ * everything.
+ *
+ * ISA v3.0 introduced additional values 3,4,7, which change what SLBs are
+ * invalidated.
  */
 
-/* XXX: Warning: slbia never invalidates the first segment */
-for (n = 1; n < cpu->hash64_opts->slb_size; n++) {
-ppc_slb_t *slb = >slb[n];
+env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH;
+
+starting_entry = 1; /* default for IH=0,1,2,6 */
+
+if (env->mmu_model == POWERPC_MMU_3_00) {
+switch (ih) {
+case 0x7:
+/* invalidate no SLBs, but all lookaside information */
+return;
 
-if (slb->esid & SLB_ESID_V) {
-slb->esid &= ~SLB_ESID_V;
+case 0x3:
+case 0x4:
+/* also considers SLB entry 0 */
+starting_entry = 0;
+break;
+
+case 0x5:
+/* treat undefined values as ih==0, and warn */
+qemu_log_mask(LOG_GUEST_ERROR,
+  "slbia undefined IH field %u.\n", ih);
+break;
+
+default:
+/* 0,1,2,6 */
+break;
 }
 }
 
-env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH;
+for (n = starting_entry; n < cpu->hash64_opts->slb_size; n++) {
+ppc_slb_t *slb = >slb[n];
+
+if (!(slb->esid & SLB_ESID_V)) {
+continue;
+}
+if (env->mmu_model == POWERPC_MMU_3_00) {
+if (ih == 0x3 && (slb->vsid & SLB_VSID_C) == 0) {
+/* preserves entries with a class value of 0 */
+continue;
+}
+}
+
+slb->esid &= ~SLB_ESID_V;
+}
 }
 
 static void __helper_slbie(CPUPPCState *env, target_ulong addr,
@@ -136,6 +178,7 @@ static void __helper_slbie(CPUPPCState *env, target_ulong 
addr,
 return;
 }
 
+env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH;
 if (slb->esid & SLB_ESID_V) {
 slb->esid &= ~SLB_ESID_V;
 
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index eb0ddba850..e514732a09 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -5027,12 +5027,15 @@ static void gen_tlbsync(DisasContext *ctx)
 /* slbia */
 static void gen_slbia(DisasContext *ctx)
 {
+uint32_t ih = (ctx->opcode >> 21) & 0x7;
+TCGv_i32 t0 = tcg_const_i32(ih);
+
 #if defined(CONFIG_USER_ONLY)
 GEN_PRIV;
 #else
 CHK_SV;
 
-gen_helper_slbia(cpu_env);
+gen_helper_slbia(cpu_env, t0);
 #endif /* defined(CONFIG_USER_ONLY) */
 }
 
-- 
2.23.0

[PATCH 1/2] target/ppc: Fix slbia TLB invalidation gap

[Nicholas Piggin]

slbia must invalidate TLBs even if it does not remove a valid SLB
entry, because slbmte can overwrite valid entries without removing
their TLBs.

As the architecture says, slbia invalidates all lookaside information,
not conditionally based on if it removed valid entries.

It does not seem possible for POWER8 or earlier Linux kernels to hit
this bug because it never changes its kernel SLB translations, and it
should always have valid entries if any accesses are made to usespace
regions. However other operating systems which may modify SLB entry 0
or do more fancy things with segments might be affected.

When POWER9 slbia support is added in the next patch, this becomes a
real problem because some new slbia variants don't invalidate all
non-zero entries.

Signed-off-by: Nicholas Piggin 
---
 target/ppc/mmu-hash64.c | 21 +++--
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
index 34f6009b1e..373d44de74 100644
--- a/target/ppc/mmu-hash64.c
+++ b/target/ppc/mmu-hash64.c
@@ -100,20 +100,29 @@ void helper_slbia(CPUPPCState *env)
 PowerPCCPU *cpu = env_archcpu(env);
 int n;
 
+/*
+ * slbia must always flush all TLB (which is equivalent to ERAT in ppc
+ * architecture). Matching on SLB_ESID_V is not good enough, because slbmte
+ * can overwrite a valid SLB without flushing its lookaside information.
+ *
+ * It would be possible to keep the TLB in synch with the SLB by flushing
+ * when a valid entry is overwritten by slbmte, and therefore slbia would
+ * not have to flush unless it evicts a valid SLB entry. However it is
+ * expected that slbmte is more common than slbia, and slbia is usually
+ * going to evict valid SLB entries, so that tradeoff is unlikely to be a
+ * good one.
+ */
+
 /* XXX: Warning: slbia never invalidates the first segment */
 for (n = 1; n < cpu->hash64_opts->slb_size; n++) {
 ppc_slb_t *slb = >slb[n];
 
 if (slb->esid & SLB_ESID_V) {
 slb->esid &= ~SLB_ESID_V;
-/*
- * XXX: given the fact that segment size is 256 MB or 1TB,
- *  and we still don't have a tlb_flush_mask(env, n, mask)
- *  in QEMU, we just invalidate all TLBs
- */
-env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH;
 }
 }
+
+env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH;
 }
 
 static void __helper_slbie(CPUPPCState *env, target_ulong addr,
-- 
2.23.0

[Bug 1859418] Re: disk driver with iothread setting hangs live migrations

[Launchpad Bug Tracker]

[Expired for QEMU because there has been no activity for 60 days.]

** Changed in: qemu
   Status: Incomplete => Expired

-- 
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1859418

Title:
  disk driver with iothread setting hangs live migrations

Status in QEMU:
  Expired

Bug description:
  Per report raised at
  https://bugzilla.redhat.com/show_bug.cgi?id=1790093

  Description of problem:

  A disk driver definition using iothread parameter causes live
  migration with copy storage to hang during or just before the final
  ram sync stage.

  Interestingly, having the scsi controller as a separate iothread does
  not trigger the issue.

  Version-Release number of selected component (if applicable):

  I can reproduce this on centos7 with qemu-ev and with centos 8:

  qemu-kvm-ev-2.12.0-33.1.el7_7.4.x86_64
  qemu-kvm-2.12.0-65.module_el8.0.0+189+f9babebb.5.x86_64

  Steps to Reproduce:
  1. Create a definition with 1 iothread on the disk image:



  2. Issue a live migrate request like: virsh migrate --live --copy-storage-all 
vm qemu+tcp://remote/system
  3. Live migrate on source copies storage and then hangs at 80-99%, I guess 
during the ram copy phase.

  Keeping exactly the same config but without the iothread on the disk
  driver has successful migrations every time.

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1859418/+subscriptions

Re: [PATCH RESEND v2] block/nvme: introduce PMR support from NVMe 1.4 spec

[Andrzej Jakowski]

On 3/17/20 4:23 AM, Stefan Hajnoczi wrote:
>> Code is posted here
>> https://github.com/AndrzejJakowski/qemu/commit/3a7762a1d13ff1543d1da430748eb24e38faab6f
>>
>> QEMU command line:
>>
>> # below are just relevant pieces of configuration, other stuff omitted
>> # tried different setting (e.g. pmem=on and pmem=off)
>>
>> ./x86_64-softmmu/qemu-system-x86_64 ... \
>> -object 
>> memory-backend-file,id=mem1,share=off,pmem=on,mem-path=../nvme_pmr.bin,size=$((1*1024*1024))
>>  \
> share=off is MAP_PRIVATE.  If persistence is desired then share=on
> should be used.
> 
> However, this shouldn't affect "system_reset" behavior since the QEMU
> process still has the same mapped file open.
> 

Hi Stefan,

Thx!! share=off setting was the problem. I confirmed with my simple test
that persistence is achieved.
I didn't find API to perform flush (msync). Any suggestion what function to use?

Given that host memory backend is working I think my patch is almost ready for 
resubmission -- let me know if there are any other comments.

Andrzej

>> -drive file=../nvme.bin,format=raw,if=none,id=nvme_emulated \
>> -device nvme,drive=nvme_emulated,serial="test serial",pmrdev=mem1
>>
>> In VM:
>> My persisent memory region is exposed PCI BAR
>> Region 2: Memory at fe00 (64-bit, prefetchable) [size=1M]
>>
>> So I perform reads/writes from/to following adress 0xfe00 (decimal 
>> 4261412864)
>>
>> dd if=test.bin of=/dev/mem bs=1 count=30 seek=4261412864
>> dd if=/dev/mem of=test1.bin bs=1 count=30 skip=4261412864
> Did you verify that the guest kernel is really accessing the BAR?  I
> remember that distro kernels often ship with options that make
> /dev/mem of limited use because it's considered insecure.
> 
>> On VMM I didn't observe that backing file has been updated and after power 
>> cycling VM
>> I see old junk when reading PMR region.
> Did you check that the pmrdev mmap region contains the data the guest
> wrote before power cycling?
> 
>> Also from include/qemu/pmem.h it looks like pmem_persist() will cause qemu 
>> to exit
>> if libpmem is not installed:
> The libpmem support only needs to be used when the pmem=on option was
> given.  If there isn't a physical pmem device then it doesn't need to
> be used.
> 
> Stefan

Re: [PULL 0/4] Python queue for 5.0 soft freeze

[no-reply]

Patchew URL: 
https://patchew.org/QEMU/20200318011217.2102748-1-ehabk...@redhat.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [PULL 0/4] Python queue for 5.0 soft freeze
Message-id: 20200318011217.2102748-1-ehabk...@redhat.com
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
1b4f6f3 MAINTAINERS: add simplebench
57b42b6 scripts/simplebench: add example usage of simplebench
99ea4d7 scripts/simplebench: add qemu/bench_block_job.py
196f97d scripts/simplebench: add simplebench.py

=== OUTPUT BEGIN ===
1/4 Checking commit 196f97d8566d (scripts/simplebench: add simplebench.py)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#16: 
new file mode 100644

ERROR: please use python3 interpreter
#21: FILE: scripts/simplebench/simplebench.py:1:
+#!/usr/bin/env python

total: 1 errors, 1 warnings, 128 lines checked

Patch 1/4 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

2/4 Checking commit 99ea4d73bba8 (scripts/simplebench: add 
qemu/bench_block_job.py)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#16: 
new file mode 100755

ERROR: please use python3 interpreter
#21: FILE: scripts/simplebench/bench_block_job.py:1:
+#!/usr/bin/env python

total: 1 errors, 1 warnings, 119 lines checked

Patch 2/4 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/4 Checking commit 57b42b691f7b (scripts/simplebench: add example usage of 
simplebench)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#21: 
new file mode 100644

total: 0 errors, 1 warnings, 80 lines checked

Patch 3/4 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
4/4 Checking commit 1b4f6f3850f4 (MAINTAINERS: add simplebench)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200318011217.2102748-1-ehabk...@redhat.com/testing.checkpatch/?type=message.
---
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Please send your feedback to patchew-de...@redhat.com

Re: [PATCH] ppc/spapr: Set the effective address provided flag in mc error log.

[Mahesh J Salgaonkar]

On 2020-03-17 17:11:22 Tue, Greg Kurz wrote:
> On Tue, 17 Mar 2020 08:51:50 -0700 (PDT)
> no-re...@patchew.org wrote:
> 
> > Patchew URL: 
> > https://patchew.org/QEMU/158444819283.31599.12155058652686614304.stgit@jupiter/
> > 
> > 
> > 
> > Hi,
> > 
> > This series seems to have some coding style problems. See output below for
> > more information:
> > 
> > Subject: [PATCH] ppc/spapr: Set the effective address provided flag in mc 
> > error log.
> > Message-id: 158444819283.31599.12155058652686614304.stgit@jupiter
> > Type: series
> > 
> > === TEST SCRIPT BEGIN ===
> > #!/bin/bash
> > git rev-parse base > /dev/null || exit 0
> > git config --local diff.renamelimit 0
> > git config --local diff.renames True
> > git config --local diff.algorithm histogram
> > ./scripts/checkpatch.pl --mailback base..
> > === TEST SCRIPT END ===
> > 
> > Switched to a new branch 'test'
> > 62d8ada ppc/spapr: Set the effective address provided flag in mc error log.
> > 
> > === OUTPUT BEGIN ===
> > ERROR: code indent should never use tabs
> > #57: FILE: hw/ppc/spapr_events.c:739:
> > +^Iswitch (ext_elog->mc.error_type) {$
> > 
> 
> Yeah no tabs allowed in the QEMU code (see CODING_STYLE.rst).
> 
> If your editor is emacs, you can consider setting these:
> 
>   (setq indent-tabs-mode nil)
>   (setq c-basic-offset 4))

My bad. Will fix it and respin v2.

Thanks,
-Mahesh.

Re: [PATCH v3 0/5] vfio/pci: Fix up breakage against split irqchip and INTx

[no-reply]

Patchew URL: https://patchew.org/QEMU/20200317195042.282977-1-pet...@redhat.com/



Hi,

This series failed the docker-mingw@fedora build test. Please find the testing 
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.

=== TEST SCRIPT BEGIN ===
#! /bin/bash
export ARCH=x86_64
make docker-image-fedora V=1 NETWORK=1
time make docker-test-mingw@fedora J=14 NETWORK=1
=== TEST SCRIPT END ===

  LINKx86_64-softmmu/qemu-system-x86_64w.exe
hw/intc/ioapic.o: In function `ioapic_eoi_broadcast':
/tmp/qemu-test/src/hw/intc/ioapic.c:258: undefined reference to 
`kvm_resample_fd_notify'
collect2: error: ld returned 1 exit status
make[1]: *** [Makefile:207: qemu-system-x86_64w.exe] Error 1
make: *** [Makefile:527: x86_64-softmmu/all] Error 2
make: *** Waiting for unfinished jobs
  LINKaarch64-softmmu/qemu-system-aarch64w.exe
  GEN aarch64-softmmu/qemu-system-aarch64.exe
---
raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', 
'--label', 'com.qemu.instance.uuid=58e111de5d2740baaed092c9da2bbf52', '-u', 
'1003', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=', 
'-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', '-e', 
'SHOW_ENV=', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', 
'/home/patchew2/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', 
'/var/tmp/patchew-tester-tmp-xbwc233p/src/docker-src.2020-03-17-22.51.50.5035:/var/tmp/qemu:z,ro',
 'qemu:fedora', '/var/tmp/qemu/run', 'test-mingw']' returned non-zero exit 
status 2.
filter=--filter=label=com.qemu.instance.uuid=58e111de5d2740baaed092c9da2bbf52
make[1]: *** [docker-run] Error 1
make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-xbwc233p/src'
make: *** [docker-run-test-mingw@fedora] Error 2

real4m18.007s
user0m8.397s


The full log is available at
http://patchew.org/logs/20200317195042.282977-1-pet...@redhat.com/testing.docker-mingw@fedora/?type=message.
---
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Please send your feedback to patchew-de...@redhat.com

Re: [PATCH 0/2] net/colo-compare.c: Expose more COLO internal

[Jason Wang]

On 2020/3/17 下午4:25, Zhang, Chen wrote:

Hi Jason,

No news for a while.
Please review this series when you have time.

Thanks
Zhang Chen



Sorry for the delay.

Patch looks good to me.

But it can not be applied cleanly on master.

Please rebase and send V2 (btw, I notice some typos in the commit log, 
please try to fix them as well).


Thanks

RE: [PATCH v7 00/13] APIC ID fixes for AMD EPYC CPU model

[Moger, Babu]

[AMD Official Use Only - Internal Distribution Only]



> -Original Message-
> From: Eduardo Habkost 
> Sent: Tuesday, March 17, 2020 6:46 PM
> To: Moger, Babu 
> Cc: marcel.apfelb...@gmail.com; pbonz...@redhat.com; r...@twiddle.net;
> m...@redhat.com; imamm...@redhat.com; qemu-devel@nongnu.org
> Subject: Re: [PATCH v7 00/13] APIC ID fixes for AMD EPYC CPU model
> 
> On Tue, Mar 17, 2020 at 07:22:06PM -0400, Eduardo Habkost wrote:
> > On Thu, Mar 12, 2020 at 11:28:47AM -0500, Babu Moger wrote:
> > > Eduardo, Can you please queue the series if there are no concerns.
> > > Thanks
> >
> > I had queued it for today's pull request, but it looks like it
> > breaks "make check".  See
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Ftravis-
> ci.org%2Fgithub%2Fehabkost%2Fqemu%2Fjobs%2F663529282data=02%7
> C01%7Cbabu.moger%40amd.com%7C43bba959c4d34e3be5fd08d7cacd634d%7
> C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637200855817408351&
> amp;sdata=cfjMVDKMgByvtUIqqGtcjNWGAf3PKFKxDLaS1eVME3U%3Dre
> served=0
> >
> >   PASS 4 bios-tables-test /x86_64/acpi/piix4/ipmi
> >   Could not access KVM kernel module: No such file or directory
> >   qemu-system-x86_64: -accel kvm: failed to initialize kvm: No such file or
> directory
> >   qemu-system-x86_64: falling back to tcg
> >   qemu-system-x86_64: Invalid CPU [socket: 0, die: 0, core: 1, thread: 0] 
> > with
> APIC ID 1, valid index range 0:5
> >   Broken pipe
> >   /home/travis/build/ehabkost/qemu/tests/qtest/libqtest.c:166: kill_qemu()
> tried to terminate QEMU process but encountered exit status 1 (expected 0)
> >   Aborted (core dumped)
> >   ERROR - too few tests run (expected 17, got 4)
> >   /home/travis/build/ehabkost/qemu/tests/Makefile.include:633: recipe for
> target 'check-qtest-x86_64' failed
> >   make: *** [check-qtest-x86_64] Error 1
> 
> Failure is at the /x86_64/acpi/piix4/cpuhp test case:
> 
>   $ QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64
> QTEST_QEMU_IMG=qemu-img tests/qtest/bios-tables-test -m=quick --verbose -
> -debug-log
>   [...]
>   {*LOG(start):{/x86_64/acpi/piix4/cpuhp}:LOG*}
>   # starting QEMU: exec x86_64-softmmu/qemu-system-x86_64 -qtest
> unix:/tmp/qtest-2052313.sock -qtest-log /dev/null -chardev
> socket,path=/tmp/qtest-2052313.qmp,id=char0 -mon
> chardev=char0,mode=control -display none -machine pc,kernel-irqchip=off -
> accel kvm -accel tcg -net none -display none -smp
> 2,cores=3,sockets=2,maxcpus=6 -object memory-backend-
> ram,id=ram0,size=64M -object memory-backend-ram,id=ram1,size=64M -numa
> node,memdev=ram0 -numa node,memdev=ram1 -numa dist,src=0,dst=1,val=21
> -drive id=hd0,if=none,file=tests/acpi-test-disk-PVjFru,format=raw -device ide-
> hd,drive=hd0  -accel qtest
>   {*LOG(message):{starting QEMU: exec x86_64-softmmu/qemu-system-x86_64
> -qtest unix:/tmp/qtest-2052313.sock -qtest-log /dev/null -chardev
> socket,path=/tmp/qtest-2052313.qmp,id=char0 -mon
> chardev=char0,mode=control -display none -machine pc,kernel-irqchip=off -
> accel kvm -accel tcg -net none -display none -smp
> 2,cores=3,sockets=2,maxcpus=6 -object memory-backend-
> ram,id=ram0,size=64M -object memory-backend-ram,id=ram1,size=64M -numa
> node,memdev=ram0 -numa node,memdev=ram1 -numa dist,src=0,dst=1,val=21
> -drive id=hd0,if=none,file=tests/acpi-test-disk-PVjFru,format=raw -device ide-
> hd,drive=hd0  -accel qtest}:LOG*}
>   qemu-system-x86_64: Invalid CPU [socket: 0, die: 0, core: 1, thread: 0] with
> APIC ID 1, valid index range 0:5
>   Broken pipe

The ms->smp.cpus Is not initialized to max cpus in this case. Looks like 
smp_parse did not run in this path.
For that reason the apicid is not initialized for all the cpus. Following patch 
fixes the problem.
I will test all the combinations and send the patch tomorrow. Let me know which 
tree I should use the to
generate the patch. It appears some patches are already pulled. I can send top 
of
 git://github.com/ehabkost/qemu.git (x86-next).

diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index 023dce1dbd..1eeb7b9732 100644
--- a/hw/i386/x86.c
+++ b/hw/i386/x86.c
@@ -156,7 +156,7 @@ void x86_cpus_init(X86MachineState *x86ms, int 
default_cpu_version)
   ms->smp.max_cpus - 1) + 
1;
 possible_cpus = mc->possible_cpu_arch_ids(ms);

-for (i = 0; i < ms->smp.cpus; i++) {
+for (i = 0; i < ms->possible_cpus->len; i++) {
 ms->possible_cpus->cpus[i].arch_id =
 x86_cpu_apic_id_from_index(x86ms, i);
 }

> 
> 
> >
> >
> > >
> > > On 3/11/20 5:52 PM, Babu Moger wrote:
> > > > This series fixes APIC ID encoding problem reported on AMD EPYC cpu
> models.
> > > >
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.
> redhat.com%2Fshow_bug.cgi%3Fid%3D1728166data=02%7C01%7Cbabu.
> moger%40amd.com%7C43bba959c4d34e3be5fd08d7cacd634d%7C3dd8961fe4
> 884e608e11a82d994e183d%7C0%7C0%7C637200855817408351sdata=m
> E%2FiWq9sB2Jp9GtQesFZtU2lGT4MU6IVgm7HxhyfO9w%3Dreserved=0
> > > >
> > > > 

Re: [PATCH 0/6] hw/net: Make Net/CanBus can_receive() handlers return a boolean

[Jason Wang]

On 2020/3/17 下午6:47, Philippe Mathieu-Daudé wrote:

Ping?

This series is fully reviewed. 



Sorry for the delay.

Applied.

Thanks

Re: [PATCH v3 2/2] net: tulip: add .can_recieve routine

[Jason Wang]

On 2020/3/17 下午6:49, P J P wrote:

+-- On Tue, 17 Mar 2020, Jason Wang wrote --+
| > +-- On Fri, 6 Mar 2020, Stefan Hajnoczi wrote --+
| > | > +static int
| > | > +tulip_can_receive(NetClientState *nc)
| > | > +{
| > | > +TULIPState *s = qemu_get_nic_opaque(nc);
| > | > +
| > | > +if (s->rx_frame_len || tulip_rx_stopped(s)) {
| > | > +return false;
| > | > +}
|
| Btw, what's the point of checking rx_frame_len here?

tulip_can_recive() is called from tulip_receive(). IIUC non zero(0)
'rx_frame_len' hints that s->rs_frame[] buffer still has unread data bytes and
it can not receive new bytes. The check was earlier in tulip_receive().



Right, so need to make sure qemu_flush_ququed_packets() was called when 
rx_frame_len is zero.


Thanks





Thank you.
--
Prasad J Pandit / Red Hat Product Security Team
8685 545E B54C 486B C6EB 271E E285 8B5A F050 DE8D

Re: [PATCH V2] vhost: correctly turn on VIRTIO_F_IOMMU_PLATFORM

[Jason Wang]

On 2020/3/17 下午10:13, Peter Xu wrote:

On Tue, Mar 17, 2020 at 11:04:26AM +0800, Jason Wang wrote:

On 2020/3/17 上午2:14, Peter Xu wrote:

On Mon, Mar 16, 2020 at 01:19:54PM -0400, Michael S. Tsirkin wrote:

On Fri, Mar 13, 2020 at 12:31:22PM -0400, Peter Xu wrote:

On Fri, Mar 13, 2020 at 11:29:59AM -0400, Michael S. Tsirkin wrote:

On Fri, Mar 13, 2020 at 01:44:46PM +0100, Halil Pasic wrote:

[..]

CCing Tom. @Tom does vhost-vsock work for you with SEV and current qemu?

Also, one can specify iommu_platform=on on a device that ain't a part of
a secure-capable VM, just for the fun of it. And that breaks
vhost-vsock. Or is setting iommu_platform=on only valid if
qemu-system-s390x is protected virtualization capable?

BTW, I don't have a strong opinion on the fixes tag. We currently do not
recommend setting iommu_platform, and thus I don't think we care too
much about past qemus having problems with it.

Regards,
Halil

Let's just say if we do have a Fixes: tag we want to set it correctly to
the commit that needs this fix.


I finally did some digging regarding the performance degradation. For
s390x the performance degradation on vhost-net was introduced by commit
076a93d797 ("exec: simplify address_space_get_iotlb_entry"). Before
IOMMUTLBEntry.addr_mask used to be based on plen, which in turn was
calculated as the rest of the memory regions size (from address), and
covered most of the guest address space. That is we didn't have a whole
lot of IOTLB API overhead.

With commit 076a93d797 I see IOMMUTLBEntry.addr_mask == 0xfff which comes
as ~TARGET_PAGE_MASK from flatview_do_translate(). To have things working
properly I applied 75e5b70e6, b021d1c044, and d542800d1e on the level of
076a93d797 and 076a93d797~1.

Peter, what's your take on this one?

Commit 076a93d797 was one of the patchset where we want to provide
sensible IOTLB entries and also that should start to work with huge
pages.

So the issue bundamentally is that it
never produces entries larger than page size.

Wasteful even just with huge pages, all the more
so which passthrough which could have giga-byte
entries.

Want to try fixing that?

Yes we can fix that, but I'm still not sure whether changing the
interface of address_space_get_iotlb_entry() to cover adhoc regions is
a good idea, because I think it's still a memory core API and imho it
would still be good to have IOTLBs returned to be what the hardware
will be using (always page aligned IOTLBs).  Also it would still be
not ideal because vhost backend will still need to send the MISSING
messages and block for each of the continuous guest memory ranges
registered, so there will still be misterious delay.  Not to say
logically all the caches can be invalidated too so in that sense I
think it's as hacky as the vhost speedup patch mentioned below..

Ideally I think vhost should be able to know when PT is enabled or
disabled for the device, so the vhost backend (kernel or userspace)
should be able to directly use GPA for DMA.  That might need some new
vhost interface.

Yes but I think we don't need another API since we can send GPA->HVA mapping
via device IOTLB API when we find there's no DMA translation at all (either
PT or no vIOMMU).

Jason,

Do you mean what we've worked on before?

https://lists.gnu.org/archive/html/qemu-devel/2017-06/msg00574.html

(I just read the previous discussion on that patch, it seems to be
  exactly what we've discussed again...)

Thanks,



Right, something like that. But it's not urgent now consider this patch 
has been merged.


Thanks

[PULL 12/13] hw/i386: Update structures to save the number of nodes per package

[Eduardo Habkost]

From: Babu Moger 

Update structures X86CPUTopoIDs and CPUX86State to hold the number of
nodes per package. This is required to build EPYC mode topology.

Signed-off-by: Babu Moger 
Reviewed-by: Igor Mammedov 
Acked-by: Michael S. Tsirkin 
Message-Id: <158396720035.58170.1973738805301006456.st...@naples-babu.amd.com>
---
 hw/i386/pc.c   |  1 +
 hw/i386/x86.c  |  1 +
 include/hw/i386/topology.h |  1 +
 target/i386/cpu.c  |  1 +
 target/i386/cpu.h  |  1 +
 tests/test-x86-cpuid.c | 40 +++---
 6 files changed, 25 insertions(+), 20 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 05e7f1090f..ee89fcd1c3 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1525,6 +1525,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
 init_topo_info(_info, x86ms);
 
 env->nr_dies = x86ms->smp_dies;
+env->nr_nodes = topo_info.nodes_per_pkg;
 
 /*
  * If APIC ID is not set,
diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index 41b884605f..87b73fe33c 100644
--- a/hw/i386/x86.c
+++ b/hw/i386/x86.c
@@ -62,6 +62,7 @@ inline void init_topo_info(X86CPUTopoInfo *topo_info,
 {
 MachineState *ms = MACHINE(x86ms);
 
+topo_info->nodes_per_pkg = ms->numa_state->num_nodes / ms->smp.sockets;
 topo_info->dies_per_pkg = x86ms->smp_dies;
 topo_info->cores_per_die = ms->smp.cores;
 topo_info->threads_per_core = ms->smp.threads;
diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h
index ba52d49079..04f01e2a09 100644
--- a/include/hw/i386/topology.h
+++ b/include/hw/i386/topology.h
@@ -53,6 +53,7 @@ typedef struct X86CPUTopoIDs {
 } X86CPUTopoIDs;
 
 typedef struct X86CPUTopoInfo {
+unsigned nodes_per_pkg;
 unsigned dies_per_pkg;
 unsigned cores_per_die;
 unsigned threads_per_core;
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index f1ac572efd..34b511f078 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6957,6 +6957,7 @@ static void x86_cpu_initfn(Object *obj)
 FeatureWord w;
 
 env->nr_dies = 1;
+env->nr_nodes = 1;
 cpu_set_cpustate_pointers(cpu);
 
 object_property_add(obj, "family", "int",
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 68b186d258..7e9e963d78 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1609,6 +1609,7 @@ typedef struct CPUX86State {
 TPRAccess tpr_access_type;
 
 unsigned nr_dies;
+unsigned nr_nodes;
 } CPUX86State;
 
 struct kvm_msrs;
diff --git a/tests/test-x86-cpuid.c b/tests/test-x86-cpuid.c
index bfabc0403a..049030a50e 100644
--- a/tests/test-x86-cpuid.c
+++ b/tests/test-x86-cpuid.c
@@ -31,12 +31,12 @@ static void test_topo_bits(void)
 X86CPUTopoInfo topo_info = {0};
 
 /* simple tests for 1 thread per core, 1 core per die, 1 die per package */
-topo_info = (X86CPUTopoInfo) {1, 1, 1};
+topo_info = (X86CPUTopoInfo) {0, 1, 1, 1};
 g_assert_cmpuint(apicid_smt_width(_info), ==, 0);
 g_assert_cmpuint(apicid_core_width(_info), ==, 0);
 g_assert_cmpuint(apicid_die_width(_info), ==, 0);
 
-topo_info = (X86CPUTopoInfo) {1, 1, 1};
+topo_info = (X86CPUTopoInfo) {0, 1, 1, 1};
 g_assert_cmpuint(x86_apicid_from_cpu_idx(_info, 0), ==, 0);
 g_assert_cmpuint(x86_apicid_from_cpu_idx(_info, 1), ==, 1);
 g_assert_cmpuint(x86_apicid_from_cpu_idx(_info, 2), ==, 2);
@@ -45,39 +45,39 @@ static void test_topo_bits(void)
 
 /* Test field width calculation for multiple values
  */
-topo_info = (X86CPUTopoInfo) {1, 1, 2};
+topo_info = (X86CPUTopoInfo) {0, 1, 1, 2};
 g_assert_cmpuint(apicid_smt_width(_info), ==, 1);
-topo_info = (X86CPUTopoInfo) {1, 1, 3};
+topo_info = (X86CPUTopoInfo) {0, 1, 1, 3};
 g_assert_cmpuint(apicid_smt_width(_info), ==, 2);
-topo_info = (X86CPUTopoInfo) {1, 1, 4};
+topo_info = (X86CPUTopoInfo) {0, 1, 1, 4};
 g_assert_cmpuint(apicid_smt_width(_info), ==, 2);
 
-topo_info = (X86CPUTopoInfo) {1, 1, 14};
+topo_info = (X86CPUTopoInfo) {0, 1, 1, 14};
 g_assert_cmpuint(apicid_smt_width(_info), ==, 4);
-topo_info = (X86CPUTopoInfo) {1, 1, 15};
+topo_info = (X86CPUTopoInfo) {0, 1, 1, 15};
 g_assert_cmpuint(apicid_smt_width(_info), ==, 4);
-topo_info = (X86CPUTopoInfo) {1, 1, 16};
+topo_info = (X86CPUTopoInfo) {0, 1, 1, 16};
 g_assert_cmpuint(apicid_smt_width(_info), ==, 4);
-topo_info = (X86CPUTopoInfo) {1, 1, 17};
+topo_info = (X86CPUTopoInfo) {0, 1, 1, 17};
 g_assert_cmpuint(apicid_smt_width(_info), ==, 5);
 
 
-topo_info = (X86CPUTopoInfo) {1, 30, 2};
+topo_info = (X86CPUTopoInfo) {0, 1, 30, 2};
 g_assert_cmpuint(apicid_core_width(_info), ==, 5);
-topo_info = (X86CPUTopoInfo) {1, 31, 2};
+topo_info = (X86CPUTopoInfo) {0, 1, 31, 2};
 g_assert_cmpuint(apicid_core_width(_info), ==, 5);
-topo_info = (X86CPUTopoInfo) {1, 32, 2};
+topo_info = (X86CPUTopoInfo) {0, 1, 32, 2};
 g_assert_cmpuint(apicid_core_width(_info), ==, 5);
-

[PULL 11/13] hw/i386: Remove unnecessary initialization in x86_cpu_new

[Eduardo Habkost]

From: Babu Moger 

The function pc_cpu_pre_plug takes care of initialization of CPUX86State.
So, remove the initialization here.

Suggested-by: Igor Mammedov 
Signed-off-by: Babu Moger 
Reviewed-by: Igor Mammedov 
Acked-by: Michael S. Tsirkin 
Message-Id: <158396719336.58170.11951852360759449871.st...@naples-babu.amd.com>
---
 hw/i386/x86.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index b7d94e8dfe..41b884605f 100644
--- a/hw/i386/x86.c
+++ b/hw/i386/x86.c
@@ -103,13 +103,9 @@ void x86_cpu_new(X86MachineState *x86ms, int64_t apic_id, 
Error **errp)
 {
 Object *cpu = NULL;
 Error *local_err = NULL;
-CPUX86State *env = NULL;
 
 cpu = object_new(MACHINE(x86ms)->cpu_type);
 
-env = _CPU(cpu)->env;
-env->nr_dies = x86ms->smp_dies;
-
 object_property_set_uint(cpu, apic_id, "apic-id", _err);
 object_property_set_bool(cpu, true, "realized", _err);
 
-- 
2.24.1

[PULL 04/13] i386: Add 2nd Generation AMD EPYC processors

[Eduardo Habkost]

From: "Moger, Babu" 

Adds the support for 2nd Gen AMD EPYC Processors. The model display
name will be EPYC-Rome.

Adds the following new feature bits on top of the feature bits from the
first generation EPYC models.
perfctr-core : core performance counter extensions support. Enables the VM to
   use extended performance counter support. It enables six
   programmable counters instead of four counters.
clzero   : instruction zeroes out the 64 byte cache line specified in RAX.
xsaveerptr   : XSAVE, XSAVE, FXSAVEOPT, XSAVEC, XSAVES always save error
   pointers and FXRSTOR, XRSTOR, XRSTORS always restore error
   pointers.
wbnoinvd : Write back and do not invalidate cache
ibpb : Indirect Branch Prediction Barrier
amd-stibp: Single Thread Indirect Branch Predictor
clwb : Cache Line Write Back and Retain
xsaves   : XSAVES, XRSTORS and IA32_XSS support
rdpid: Read Processor ID instruction support
umip : User-Mode Instruction Prevention support

The  Reference documents are available at
https://developer.amd.com/wp-content/resources/55803_0.54-PUB.pdf
https://www.amd.com/system/files/TechDocs/24594.pdf

Depends on following kernel commits:
40bc47b08b6e ("kvm: x86: Enumerate support for CLZERO instruction")
504ce1954fba ("KVM: x86: Expose XSAVEERPTR to the guest")
6d61e3c32248 ("kvm: x86: Expose RDPID in KVM_GET_SUPPORTED_CPUID")
52297436199d ("kvm: svm: Update svm_xsaves_supported")

Signed-off-by: Babu Moger 
Message-Id: <157314966312.23828.17684821666338093910.st...@naples-babu.amd.com>
Signed-off-by: Eduardo Habkost 
---
 target/i386/cpu.c | 102 +-
 target/i386/cpu.h |   2 +
 2 files changed, 103 insertions(+), 1 deletion(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 54f42dcd25..350b51b346 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1133,7 +1133,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = 
{
 "clzero", NULL, "xsaveerptr", NULL,
 NULL, NULL, NULL, NULL,
 NULL, "wbnoinvd", NULL, NULL,
-"ibpb", NULL, NULL, NULL,
+"ibpb", NULL, NULL, "amd-stibp",
 NULL, NULL, NULL, NULL,
 NULL, NULL, NULL, NULL,
 "amd-ssbd", "virt-ssbd", "amd-no-ssb", NULL,
@@ -1798,6 +1798,56 @@ static CPUCaches epyc_cache_info = {
 },
 };
 
+static CPUCaches epyc_rome_cache_info = {
+.l1d_cache = &(CPUCacheInfo) {
+.type = DATA_CACHE,
+.level = 1,
+.size = 32 * KiB,
+.line_size = 64,
+.associativity = 8,
+.partitions = 1,
+.sets = 64,
+.lines_per_tag = 1,
+.self_init = 1,
+.no_invd_sharing = true,
+},
+.l1i_cache = &(CPUCacheInfo) {
+.type = INSTRUCTION_CACHE,
+.level = 1,
+.size = 32 * KiB,
+.line_size = 64,
+.associativity = 8,
+.partitions = 1,
+.sets = 64,
+.lines_per_tag = 1,
+.self_init = 1,
+.no_invd_sharing = true,
+},
+.l2_cache = &(CPUCacheInfo) {
+.type = UNIFIED_CACHE,
+.level = 2,
+.size = 512 * KiB,
+.line_size = 64,
+.associativity = 8,
+.partitions = 1,
+.sets = 1024,
+.lines_per_tag = 1,
+},
+.l3_cache = &(CPUCacheInfo) {
+.type = UNIFIED_CACHE,
+.level = 3,
+.size = 16 * MiB,
+.line_size = 64,
+.associativity = 16,
+.partitions = 1,
+.sets = 16384,
+.lines_per_tag = 1,
+.self_init = true,
+.inclusive = true,
+.complex_indexing = true,
+},
+};
+
 /* The following VMX features are not supported by KVM and are left out in the
  * CPU definitions:
  *
@@ -4030,6 +4080,56 @@ static X86CPUDefinition builtin_x86_defs[] = {
 .model_id = "Hygon Dhyana Processor",
 .cache_info = _cache_info,
 },
+{
+.name = "EPYC-Rome",
+.level = 0xd,
+.vendor = CPUID_VENDOR_AMD,
+.family = 23,
+.model = 49,
+.stepping = 0,
+.features[FEAT_1_EDX] =
+CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | CPUID_CLFLUSH |
+CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA | CPUID_PGE |
+CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | CPUID_MCE |
+CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | CPUID_DE |
+CPUID_VME | CPUID_FP87,
+.features[FEAT_1_ECX] =
+CPUID_EXT_RDRAND | CPUID_EXT_F16C | CPUID_EXT_AVX |
+CPUID_EXT_XSAVE | CPUID_EXT_AES |  CPUID_EXT_POPCNT |
+CPUID_EXT_MOVBE | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
+CPUID_EXT_CX16 | CPUID_EXT_FMA | CPUID_EXT_SSSE3 |
+CPUID_EXT_MONITOR | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3,
+.features[FEAT_8000_0001_EDX] =
+CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_PDPE1GB |
+   

[PULL 07/13] cpu: Use DeviceClass reset instead of a special CPUClass reset

[Eduardo Habkost]

From: Peter Maydell 

The CPUClass has a 'reset' method.  This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE.  We don't need it any
more, as we can simply use the TYPE_DEVICE reset.  The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.

This change should not cause CPU objects to be reset more often
than they are at the moment, because:
 * nobody is directly calling device_cold_reset() or
   qdev_reset_all() on CPU objects
 * no CPU object is on a qbus, so they will not be reset either
   by somebody calling qbus_reset_all()/bus_cold_reset(), or
   by the main "reset sysbus and everything in the qbus tree"
   reset that most devices are reset by

Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.

All the changes to the files under target/ were made using the
included Coccinelle script, except:

(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
  perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c

(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:

| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = >env;
|+DeviceState *dev = DEVICE(s);
|
|-scc->parent_reset(s);
|+scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);

Signed-off-by: Peter Maydell 
Message-Id: <20200303100511.5498-1-peter.mayd...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé 
Reviewed-by: Richard Henderson 
Tested-by: Philippe Mathieu-Daudé 
Signed-off-by: Eduardo Habkost 
---
 hw/core/cpu.c  | 19 +++-
 include/hw/core/cpu.h  |  6 
 scripts/coccinelle/cpu-reset.cocci | 47 ++
 target/alpha/cpu-qom.h |  2 +-
 target/arm/cpu-qom.h   |  2 +-
 target/arm/cpu.c   |  8 ++---
 target/cris/cpu-qom.h  |  2 +-
 target/cris/cpu.c  |  8 ++---
 target/hppa/cpu-qom.h  |  2 +-
 target/i386/cpu-qom.h  |  2 +-
 target/i386/cpu.c  |  8 ++---
 target/lm32/cpu-qom.h  |  2 +-
 target/lm32/cpu.c  |  8 ++---
 target/m68k/cpu-qom.h  |  2 +-
 target/m68k/cpu.c  |  8 ++---
 target/microblaze/cpu-qom.h|  2 +-
 target/microblaze/cpu.c|  8 ++---
 target/mips/cpu-qom.h  |  2 +-
 target/mips/cpu.c  |  8 ++---
 target/moxie/cpu.c |  7 +++--
 target/moxie/cpu.h |  2 +-
 target/nios2/cpu.c |  8 ++---
 target/nios2/cpu.h |  2 +-
 target/openrisc/cpu.c  |  8 ++---
 target/openrisc/cpu.h  |  2 +-
 target/ppc/cpu-qom.h   |  2 +-
 target/ppc/translate_init.inc.c|  8 ++---
 target/riscv/cpu.c |  7 +++--
 target/riscv/cpu.h |  2 +-
 target/s390x/cpu-qom.h |  2 +-
 target/s390x/cpu.c |  8 +++--
 target/sh4/cpu-qom.h   |  2 +-
 target/sh4/cpu.c   |  8 ++---
 target/sparc/cpu-qom.h |  2 +-
 target/sparc/cpu.c |  8 ++---
 target/tilegx/cpu.c|  7 +++--
 target/tilegx/cpu.h|  2 +-
 target/tricore/cpu-qom.h   |  2 +-
 target/tricore/cpu.c   |  7 +++--
 target/xtensa/cpu-qom.h|  2 +-
 target/xtensa/cpu.c|  8 ++---
 41 files changed, 144 insertions(+), 108 deletions(-)
 create mode 100644 scripts/coccinelle/cpu-reset.cocci

diff --git a/hw/core/cpu.c b/hw/core/cpu.c
index fe65ca62ac..b889878f3c 100644
--- a/hw/core/cpu.c
+++ b/hw/core/cpu.c
@@ -239,27 +239,16 @@ void cpu_dump_statistics(CPUState *cpu, int flags)
 }
 }
 
-void cpu_class_set_parent_reset(CPUClass *cc,
-void (*child_reset)(CPUState *cpu),
-void (**parent_reset)(CPUState *cpu))
-{
-*parent_reset = cc->reset;
-cc->reset = child_reset;
-}
-
 void cpu_reset(CPUState *cpu)
 {
-CPUClass *klass = CPU_GET_CLASS(cpu);
-
-if (klass->reset != NULL) {
-(*klass->reset)(cpu);
-}
+device_cold_reset(DEVICE(cpu));
 
 trace_guest_cpu_reset(cpu);
 }
 
-static void cpu_common_reset(CPUState *cpu)
+static void cpu_common_reset(DeviceState *dev)
 {
+CPUState *cpu = 

[PULL 13/13] hw/i386: Rename apicid_from_topo_ids to x86_apicid_from_topo_ids

[Eduardo Habkost]

From: Babu Moger 

For consistency rename apicid_from_topo_ids to x86_apicid_from_topo_ids.
No functional change.

Signed-off-by: Babu Moger 
Reviewed-by: Igor Mammedov 
Acked-by: Michael S. Tsirkin 
Message-Id: <158396720748.58170.5335409429390890145.st...@naples-babu.amd.com>
---
 hw/i386/pc.c   | 2 +-
 include/hw/i386/topology.h | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ee89fcd1c3..98ee763f68 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1580,7 +1580,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
 topo_ids.die_id = cpu->die_id;
 topo_ids.core_id = cpu->core_id;
 topo_ids.smt_id = cpu->thread_id;
-cpu->apic_id = apicid_from_topo_ids(_info, _ids);
+cpu->apic_id = x86_apicid_from_topo_ids(_info, _ids);
 }
 
 cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, );
diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h
index 04f01e2a09..b9593b9905 100644
--- a/include/hw/i386/topology.h
+++ b/include/hw/i386/topology.h
@@ -112,8 +112,8 @@ static inline unsigned apicid_pkg_offset(X86CPUTopoInfo 
*topo_info)
  *
  * The caller must make sure core_id < nr_cores and smt_id < nr_threads.
  */
-static inline apic_id_t apicid_from_topo_ids(X86CPUTopoInfo *topo_info,
- const X86CPUTopoIDs *topo_ids)
+static inline apic_id_t x86_apicid_from_topo_ids(X86CPUTopoInfo *topo_info,
+ const X86CPUTopoIDs *topo_ids)
 {
 return (topo_ids->pkg_id  << apicid_pkg_offset(topo_info)) |
(topo_ids->die_id  << apicid_die_offset(topo_info)) |
@@ -165,7 +165,7 @@ static inline apic_id_t 
x86_apicid_from_cpu_idx(X86CPUTopoInfo *topo_info,
 {
 X86CPUTopoIDs topo_ids;
 x86_topo_ids_from_idx(topo_info, cpu_index, _ids);
-return apicid_from_topo_ids(topo_info, _ids);
+return x86_apicid_from_topo_ids(topo_info, _ids);
 }
 
 #endif /* HW_I386_TOPOLOGY_H */
-- 
2.24.1

[PULL 10/13] machine: Add SMP Sockets in CpuTopology

[Eduardo Habkost]

From: Babu Moger 

Store the  smp sockets in CpuTopology. The socket information required to
build the apic id in EPYC mode. Right now socket information is not passed
to down when decoding the apic id. Add the socket information here.

Signed-off-by: Babu Moger 
Reviewed-by: Eduardo Habkost 
Reviewed-by: Igor Mammedov 
Acked-by: Michael S. Tsirkin 
Message-Id: <158396718647.58170.2278448323151215741.st...@naples-babu.amd.com>
---
 hw/core/machine.c   | 1 +
 hw/i386/pc.c| 1 +
 include/hw/boards.h | 2 ++
 softmmu/vl.c| 1 +
 4 files changed, 5 insertions(+)

diff --git a/hw/core/machine.c b/hw/core/machine.c
index 4778bc6b08..b958cd1b99 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -757,6 +757,7 @@ static void smp_parse(MachineState *ms, QemuOpts *opts)
 ms->smp.cpus = cpus;
 ms->smp.cores = cores;
 ms->smp.threads = threads;
+ms->smp.sockets = sockets;
 }
 
 if (ms->smp.cpus > 1) {
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 662abb549d..05e7f1090f 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -781,6 +781,7 @@ void pc_smp_parse(MachineState *ms, QemuOpts *opts)
 ms->smp.cpus = cpus;
 ms->smp.cores = cores;
 ms->smp.threads = threads;
+ms->smp.sockets = sockets;
 x86ms->smp_dies = dies;
 }
 
diff --git a/include/hw/boards.h b/include/hw/boards.h
index c96120d15f..236d239c19 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -236,12 +236,14 @@ typedef struct DeviceMemoryState {
  * @cpus: the number of present logical processors on the machine
  * @cores: the number of cores in one package
  * @threads: the number of threads in one core
+ * @sockets: the number of sockets on the machine
  * @max_cpus: the maximum number of logical processors on the machine
  */
 typedef struct CpuTopology {
 unsigned int cpus;
 unsigned int cores;
 unsigned int threads;
+unsigned int sockets;
 unsigned int max_cpus;
 } CpuTopology;
 
diff --git a/softmmu/vl.c b/softmmu/vl.c
index 6a285925b3..1d33a28340 100644
--- a/softmmu/vl.c
+++ b/softmmu/vl.c
@@ -3946,6 +3946,7 @@ void qemu_init(int argc, char **argv, char **envp)
 current_machine->smp.max_cpus = machine_class->default_cpus;
 current_machine->smp.cores = 1;
 current_machine->smp.threads = 1;
+current_machine->smp.sockets = 1;
 
 machine_class->smp_parse(current_machine,
 qemu_opts_find(qemu_find_opts("smp-opts"), NULL));
-- 
2.24.1

[PULL 08/13] hw/i386: Introduce X86CPUTopoInfo to contain topology info

[Eduardo Habkost]

From: Babu Moger 

This is an effort to re-arrange few data structure for better readability.

1. Add X86CPUTopoInfo which will have all the topology informations
   required to build the cpu topology. There is no functional changes.

2. Introduce init_topo_info to initialize X86CPUTopoInfo members from
   X86MachineState.

3. Update x86 unit tests for new calling convention with parameter 
X86CPUTopoInfo

There is no functional changes.

Signed-off-by: Babu Moger 
Message-Id: <158396717251.58170.4499717831243474938.st...@naples-babu.amd.com>
---
 hw/i386/pc.c   | 12 +--
 hw/i386/x86.c  | 32 +---
 include/hw/i386/topology.h | 38 -
 include/hw/i386/x86.h  |  3 +++
 tests/test-x86-cpuid.c | 43 +-
 5 files changed, 81 insertions(+), 47 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index f52e84b2ba..662abb549d 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1513,6 +1513,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
 X86MachineState *x86ms = X86_MACHINE(pcms);
 unsigned int smp_cores = ms->smp.cores;
 unsigned int smp_threads = ms->smp.threads;
+X86CPUTopoInfo topo_info;
 
 if(!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) {
 error_setg(errp, "Invalid CPU type, expected cpu type: '%s'",
@@ -1520,6 +1521,8 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
 return;
 }
 
+init_topo_info(_info, x86ms);
+
 env->nr_dies = x86ms->smp_dies;
 
 /*
@@ -1575,16 +1578,14 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
 topo_ids.die_id = cpu->die_id;
 topo_ids.core_id = cpu->core_id;
 topo_ids.smt_id = cpu->thread_id;
-cpu->apic_id = apicid_from_topo_ids(x86ms->smp_dies, smp_cores,
-smp_threads, _ids);
+cpu->apic_id = apicid_from_topo_ids(_info, _ids);
 }
 
 cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, );
 if (!cpu_slot) {
 MachineState *ms = MACHINE(pcms);
 
-x86_topo_ids_from_apicid(cpu->apic_id, x86ms->smp_dies,
- smp_cores, smp_threads, _ids);
+x86_topo_ids_from_apicid(cpu->apic_id, _info, _ids);
 error_setg(errp,
 "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
 " APIC ID %" PRIu32 ", valid index range 0:%d",
@@ -1605,8 +1606,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
 /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
  * once -smp refactoring is complete and there will be CPU private
  * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
-x86_topo_ids_from_apicid(cpu->apic_id, x86ms->smp_dies,
- smp_cores, smp_threads, _ids);
+x86_topo_ids_from_apicid(cpu->apic_id, _info, _ids);
 if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) {
 error_setg(errp, "property socket-id: %u doesn't match set apic-id:"
 " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id,
diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index c6ee5aac8c..b7d94e8dfe 100644
--- a/hw/i386/x86.c
+++ b/hw/i386/x86.c
@@ -57,6 +57,16 @@
 /* Physical Address of PVH entry point read from kernel ELF NOTE */
 static size_t pvh_start_addr;
 
+inline void init_topo_info(X86CPUTopoInfo *topo_info,
+   const X86MachineState *x86ms)
+{
+MachineState *ms = MACHINE(x86ms);
+
+topo_info->dies_per_pkg = x86ms->smp_dies;
+topo_info->cores_per_die = ms->smp.cores;
+topo_info->threads_per_core = ms->smp.threads;
+}
+
 /*
  * Calculates initial APIC ID for a specific CPU index
  *
@@ -68,13 +78,14 @@ static size_t pvh_start_addr;
 uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms,
 unsigned int cpu_index)
 {
-MachineState *ms = MACHINE(x86ms);
 X86MachineClass *x86mc = X86_MACHINE_GET_CLASS(x86ms);
+X86CPUTopoInfo topo_info;
 uint32_t correct_id;
 static bool warned;
 
-correct_id = x86_apicid_from_cpu_idx(x86ms->smp_dies, ms->smp.cores,
- ms->smp.threads, cpu_index);
+init_topo_info(_info, x86ms);
+
+correct_id = x86_apicid_from_cpu_idx(_info, cpu_index);
 if (x86mc->compat_apic_id_mode) {
 if (cpu_index != correct_id && !warned && !qtest_enabled()) {
 error_report("APIC IDs set in compatibility mode, "
@@ -145,19 +156,22 @@ int64_t x86_get_default_cpu_node_id(const MachineState 
*ms, int idx)
 {
X86CPUTopoIDs topo_ids;
X86MachineState *x86ms = X86_MACHINE(ms);
+   X86CPUTopoInfo topo_info;
+
+   init_topo_info(_info, x86ms);
 
assert(idx < ms->possible_cpus->len);
x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
-x86ms->smp_dies, ms->smp.cores,
-

[PULL 09/13] hw/i386: Consolidate topology functions

[Eduardo Habkost]

From: Babu Moger 

Now that we have all the parameters in X86CPUTopoInfo, we can just
pass the structure to calculate the offsets and width.

Signed-off-by: Babu Moger 
Reviewed-by: Igor Mammedov 
Acked-by: Michael S. Tsirkin 
Message-Id: <158396717953.58170.5628042059144117669.st...@naples-babu.amd.com>
---
 include/hw/i386/topology.h | 68 -
 target/i386/cpu.c  | 23 ++---
 tests/test-x86-cpuid.c | 69 --
 3 files changed, 75 insertions(+), 85 deletions(-)

diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h
index 7ea507f376..ba52d49079 100644
--- a/include/hw/i386/topology.h
+++ b/include/hw/i386/topology.h
@@ -69,56 +69,42 @@ static unsigned apicid_bitwidth_for_count(unsigned count)
 
 /* Bit width of the SMT_ID (thread ID) field on the APIC ID
  */
-static inline unsigned apicid_smt_width(unsigned nr_dies,
-unsigned nr_cores,
-unsigned nr_threads)
+static inline unsigned apicid_smt_width(X86CPUTopoInfo *topo_info)
 {
-return apicid_bitwidth_for_count(nr_threads);
+return apicid_bitwidth_for_count(topo_info->threads_per_core);
 }
 
 /* Bit width of the Core_ID field
  */
-static inline unsigned apicid_core_width(unsigned nr_dies,
- unsigned nr_cores,
- unsigned nr_threads)
+static inline unsigned apicid_core_width(X86CPUTopoInfo *topo_info)
 {
-return apicid_bitwidth_for_count(nr_cores);
+return apicid_bitwidth_for_count(topo_info->cores_per_die);
 }
 
 /* Bit width of the Die_ID field */
-static inline unsigned apicid_die_width(unsigned nr_dies,
-unsigned nr_cores,
-unsigned nr_threads)
+static inline unsigned apicid_die_width(X86CPUTopoInfo *topo_info)
 {
-return apicid_bitwidth_for_count(nr_dies);
+return apicid_bitwidth_for_count(topo_info->dies_per_pkg);
 }
 
 /* Bit offset of the Core_ID field
  */
-static inline unsigned apicid_core_offset(unsigned nr_dies,
-  unsigned nr_cores,
-  unsigned nr_threads)
+static inline unsigned apicid_core_offset(X86CPUTopoInfo *topo_info)
 {
-return apicid_smt_width(nr_dies, nr_cores, nr_threads);
+return apicid_smt_width(topo_info);
 }
 
 /* Bit offset of the Die_ID field */
-static inline unsigned apicid_die_offset(unsigned nr_dies,
-  unsigned nr_cores,
-   unsigned nr_threads)
+static inline unsigned apicid_die_offset(X86CPUTopoInfo *topo_info)
 {
-return apicid_core_offset(nr_dies, nr_cores, nr_threads) +
-   apicid_core_width(nr_dies, nr_cores, nr_threads);
+return apicid_core_offset(topo_info) + apicid_core_width(topo_info);
 }
 
 /* Bit offset of the Pkg_ID (socket ID) field
  */
-static inline unsigned apicid_pkg_offset(unsigned nr_dies,
- unsigned nr_cores,
- unsigned nr_threads)
+static inline unsigned apicid_pkg_offset(X86CPUTopoInfo *topo_info)
 {
-return apicid_die_offset(nr_dies, nr_cores, nr_threads) +
-   apicid_die_width(nr_dies, nr_cores, nr_threads);
+return apicid_die_offset(topo_info) + apicid_die_width(topo_info);
 }
 
 /* Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID
@@ -128,16 +114,9 @@ static inline unsigned apicid_pkg_offset(unsigned nr_dies,
 static inline apic_id_t apicid_from_topo_ids(X86CPUTopoInfo *topo_info,
  const X86CPUTopoIDs *topo_ids)
 {
-unsigned nr_dies = topo_info->dies_per_pkg;
-unsigned nr_cores = topo_info->cores_per_die;
-unsigned nr_threads = topo_info->threads_per_core;
-
-return (topo_ids->pkg_id  <<
-   apicid_pkg_offset(nr_dies, nr_cores, nr_threads)) |
-   (topo_ids->die_id  <<
-   apicid_die_offset(nr_dies, nr_cores, nr_threads)) |
-   (topo_ids->core_id <<
-   apicid_core_offset(nr_dies, nr_cores, nr_threads)) |
+return (topo_ids->pkg_id  << apicid_pkg_offset(topo_info)) |
+   (topo_ids->die_id  << apicid_die_offset(topo_info)) |
+   (topo_ids->core_id << apicid_core_offset(topo_info)) |
topo_ids->smt_id;
 }
 
@@ -165,20 +144,15 @@ static inline void x86_topo_ids_from_apicid(apic_id_t 
apicid,
 X86CPUTopoInfo *topo_info,
 X86CPUTopoIDs *topo_ids)
 {
-unsigned nr_dies = topo_info->dies_per_pkg;
-unsigned nr_cores = topo_info->cores_per_die;
-unsigned nr_threads = topo_info->threads_per_core;
-
 topo_ids->smt_id = apicid &
-~(0xUL << apicid_smt_width(nr_dies, nr_cores, nr_threads));
+

[PULL 06/13] machine/memory encryption: Disable mem merge

[Eduardo Habkost]

From: "Dr. David Alan Gilbert" 

When a host is running with memory encryption, the memory isn't visible
to the host kernel; attempts to merge that memory are futile because
what it's really comparing is encrypted memory, usually encrypted
with different keys.

Automatically turn mem-merge off when memory encryption is specified.

https://bugzilla.redhat.com/show_bug.cgi?id=1796356

Signed-off-by: Dr. David Alan Gilbert 
Message-Id: <20200130175046.85850-1-dgilb...@redhat.com>
Signed-off-by: Eduardo Habkost 
---
 hw/core/machine.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/hw/core/machine.c b/hw/core/machine.c
index 9e8c06036f..4778bc6b08 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -425,6 +425,14 @@ static void machine_set_memory_encryption(Object *obj, 
const char *value,
 
 g_free(ms->memory_encryption);
 ms->memory_encryption = g_strdup(value);
+
+/*
+ * With memory encryption, the host can't see the real contents of RAM,
+ * so there's no point in it trying to merge areas.
+ */
+if (value) {
+machine_set_mem_merge(obj, false, errp);
+}
 }
 
 static bool machine_get_nvdimm(Object *obj, Error **errp)
-- 
2.24.1

[PULL 02/13] target/i386: Add new property note to versioned CPU models

[Eduardo Habkost]

From: Tao Xu 

Add additional information for -cpu help to indicate the changes in this
version of CPU model.

Suggested-by: Eduardo Habkost 
Signed-off-by: Tao Xu 
Message-Id: <20200212081328.7385-4-tao3...@intel.com>
Signed-off-by: Eduardo Habkost 
---
 target/i386/cpu.c | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index c3b5cf1369..dc78494167 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1690,6 +1690,7 @@ typedef struct PropValue {
 typedef struct X86CPUVersionDefinition {
 X86CPUVersion version;
 const char *alias;
+const char *note;
 PropValue *props;
 } X86CPUVersionDefinition;
 
@@ -1720,6 +1721,7 @@ struct X86CPUModel {
 X86CPUDefinition *cpudef;
 /* CPU model version */
 X86CPUVersion version;
+const char *note;
 /*
  * If true, this is an alias CPU model.
  * This matters only for "-cpu help" and query-cpu-definitions
@@ -4861,6 +4863,7 @@ static void x86_cpu_list_entry(gpointer data, gpointer 
user_data)
 g_autofree char *name = x86_cpu_class_get_model_name(cc);
 g_autofree char *desc = g_strdup(cc->model_description);
 g_autofree char *alias_of = x86_cpu_class_get_alias_of(cc);
+g_autofree char *model_id = x86_cpu_class_get_model_id(cc);
 
 if (!desc && alias_of) {
 if (cc->model && cc->model->version == CPU_VERSION_AUTO) {
@@ -4869,11 +4872,14 @@ static void x86_cpu_list_entry(gpointer data, gpointer 
user_data)
 desc = g_strdup_printf("(alias of %s)", alias_of);
 }
 }
+if (!desc && cc->model && cc->model->note) {
+desc = g_strdup_printf("%s [%s]", model_id, cc->model->note);
+}
 if (!desc) {
-desc = x86_cpu_class_get_model_id(cc);
+desc = g_strdup_printf("%s", model_id);
 }
 
-qemu_printf("x86 %-20s  %-48s\n", name, desc);
+qemu_printf("x86 %-20s  %-58s\n", name, desc);
 }
 
 /* list available CPU models and flags */
@@ -5350,6 +5356,7 @@ static void x86_register_cpudef_types(X86CPUDefinition 
*def)
 x86_cpu_versioned_model_name(def, vdef->version);
 m->cpudef = def;
 m->version = vdef->version;
+m->note = vdef->note;
 x86_register_cpu_model_type(name, m);
 
 if (vdef->alias) {
-- 
2.24.1

[PULL 05/13] hw/i386: Rename X86CPUTopoInfo structure to X86CPUTopoIDs

[Eduardo Habkost]

From: Babu Moger 

Rename few data structures related to X86 topology.  X86CPUTopoIDs will
have individual arch ids. Next patch introduces X86CPUTopoInfo which will
have all topology information(like cores, threads etc..).

Signed-off-by: Babu Moger 
Reviewed-by: Eduardo Habkost 
Message-Id: <158326541877.40452.17535023236841538507.st...@naples-babu.amd.com>
Signed-off-by: Eduardo Habkost 
---
 hw/i386/pc.c   | 45 --
 hw/i386/x86.c  | 18 +++
 include/hw/i386/topology.h | 44 -
 3 files changed, 57 insertions(+), 50 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 362eb2a180..f52e84b2ba 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1505,7 +1505,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
 int idx;
 CPUState *cs;
 CPUArchId *cpu_slot;
-X86CPUTopoInfo topo;
+X86CPUTopoIDs topo_ids;
 X86CPU *cpu = X86_CPU(dev);
 CPUX86State *env = >env;
 MachineState *ms = MACHINE(hotplug_dev);
@@ -1571,12 +1571,12 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
 return;
 }
 
-topo.pkg_id = cpu->socket_id;
-topo.die_id = cpu->die_id;
-topo.core_id = cpu->core_id;
-topo.smt_id = cpu->thread_id;
+topo_ids.pkg_id = cpu->socket_id;
+topo_ids.die_id = cpu->die_id;
+topo_ids.core_id = cpu->core_id;
+topo_ids.smt_id = cpu->thread_id;
 cpu->apic_id = apicid_from_topo_ids(x86ms->smp_dies, smp_cores,
-smp_threads, );
+smp_threads, _ids);
 }
 
 cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, );
@@ -1584,11 +1584,11 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
 MachineState *ms = MACHINE(pcms);
 
 x86_topo_ids_from_apicid(cpu->apic_id, x86ms->smp_dies,
- smp_cores, smp_threads, );
+ smp_cores, smp_threads, _ids);
 error_setg(errp,
 "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
 " APIC ID %" PRIu32 ", valid index range 0:%d",
-topo.pkg_id, topo.die_id, topo.core_id, topo.smt_id,
+topo_ids.pkg_id, topo_ids.die_id, topo_ids.core_id, 
topo_ids.smt_id,
 cpu->apic_id, ms->possible_cpus->len - 1);
 return;
 }
@@ -1606,34 +1606,37 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
  * once -smp refactoring is complete and there will be CPU private
  * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
 x86_topo_ids_from_apicid(cpu->apic_id, x86ms->smp_dies,
- smp_cores, smp_threads, );
-if (cpu->socket_id != -1 && cpu->socket_id != topo.pkg_id) {
+ smp_cores, smp_threads, _ids);
+if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) {
 error_setg(errp, "property socket-id: %u doesn't match set apic-id:"
-" 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, 
topo.pkg_id);
+" 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id,
+topo_ids.pkg_id);
 return;
 }
-cpu->socket_id = topo.pkg_id;
+cpu->socket_id = topo_ids.pkg_id;
 
-if (cpu->die_id != -1 && cpu->die_id != topo.die_id) {
+if (cpu->die_id != -1 && cpu->die_id != topo_ids.die_id) {
 error_setg(errp, "property die-id: %u doesn't match set apic-id:"
-" 0x%x (die-id: %u)", cpu->die_id, cpu->apic_id, topo.die_id);
+" 0x%x (die-id: %u)", cpu->die_id, cpu->apic_id, topo_ids.die_id);
 return;
 }
-cpu->die_id = topo.die_id;
+cpu->die_id = topo_ids.die_id;
 
-if (cpu->core_id != -1 && cpu->core_id != topo.core_id) {
+if (cpu->core_id != -1 && cpu->core_id != topo_ids.core_id) {
 error_setg(errp, "property core-id: %u doesn't match set apic-id:"
-" 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id, topo.core_id);
+" 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id,
+topo_ids.core_id);
 return;
 }
-cpu->core_id = topo.core_id;
+cpu->core_id = topo_ids.core_id;
 
-if (cpu->thread_id != -1 && cpu->thread_id != topo.smt_id) {
+if (cpu->thread_id != -1 && cpu->thread_id != topo_ids.smt_id) {
 error_setg(errp, "property thread-id: %u doesn't match set apic-id:"
-" 0x%x (thread-id: %u)", cpu->thread_id, cpu->apic_id, 
topo.smt_id);
+" 0x%x (thread-id: %u)", cpu->thread_id, cpu->apic_id,
+topo_ids.smt_id);
 return;
 }
-cpu->thread_id = topo.smt_id;
+cpu->thread_id = topo_ids.smt_id;
 
 if (hyperv_feat_enabled(cpu, HYPERV_FEAT_VPINDEX) &&
 !kvm_hv_vpindex_settable()) {
diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index 08246523f2..c6ee5aac8c 100644
--- 

[PULL 00/13] x86 and machine queue for 5.0 soft freeze

[Eduardo Habkost]

The following changes since commit d649689a8ecb2e276cc20d3af6d416e3c299cb17:

  Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging 
(2020-03-17 18:33:05 +)

are available in the Git repository at:

  git://github.com/ehabkost/qemu.git tags/x86-and-machine-pull-request

for you to fetch changes up to 3c6712eca07255803b61ca3d632f61a65c078c36:

  hw/i386: Rename apicid_from_topo_ids to x86_apicid_from_topo_ids (2020-03-17 
19:48:10 -0400)


x86 and machine queue for 5.0 soft freeze

Bug fixes:
* memory encryption: Disable mem merge
  (Dr. David Alan Gilbert)

Features:
* New EPYC CPU definitions (Babu Moger)
* Denventon-v2 CPU model (Tao Xu)
* New 'note' field on versioned CPU models (Tao Xu)

Cleanups:
* x86 CPU topology cleanups (Babu Moger)
* cpu: Use DeviceClass reset instead of a special CPUClass reset
  (Peter Maydell)



Babu Moger (7):
  hw/i386: Rename X86CPUTopoInfo structure to X86CPUTopoIDs
  hw/i386: Introduce X86CPUTopoInfo to contain topology info
  hw/i386: Consolidate topology functions
  machine: Add SMP Sockets in CpuTopology
  hw/i386: Remove unnecessary initialization in x86_cpu_new
  hw/i386: Update structures to save the number of nodes per package
  hw/i386: Rename apicid_from_topo_ids to x86_apicid_from_topo_ids

Dr. David Alan Gilbert (1):
  machine/memory encryption: Disable mem merge

Moger, Babu (2):
  i386: Add missing cpu feature bits in EPYC model
  i386: Add 2nd Generation AMD EPYC processors

Peter Maydell (1):
  cpu: Use DeviceClass reset instead of a special CPUClass reset

Tao Xu (2):
  target/i386: Add Denverton-v2 (no MPX) CPU model
  target/i386: Add new property note to versioned CPU models

 hw/core/cpu.c  |  19 +---
 hw/core/machine.c  |   9 ++
 hw/i386/pc.c   |  53 +
 hw/i386/x86.c  |  51 +
 include/hw/boards.h|   2 +
 include/hw/core/cpu.h  |   6 -
 include/hw/i386/topology.h | 113 +--
 include/hw/i386/x86.h  |   3 +
 scripts/coccinelle/cpu-reset.cocci |  47 
 softmmu/vl.c   |   1 +
 target/alpha/cpu-qom.h |   2 +-
 target/arm/cpu-qom.h   |   2 +-
 target/arm/cpu.c   |   8 +-
 target/cris/cpu-qom.h  |   2 +-
 target/cris/cpu.c  |   8 +-
 target/hppa/cpu-qom.h  |   2 +-
 target/i386/cpu-qom.h  |   2 +-
 target/i386/cpu.c  | 174 +
 target/i386/cpu.h  |   3 +
 target/lm32/cpu-qom.h  |   2 +-
 target/lm32/cpu.c  |   8 +-
 target/m68k/cpu-qom.h  |   2 +-
 target/m68k/cpu.c  |   8 +-
 target/microblaze/cpu-qom.h|   2 +-
 target/microblaze/cpu.c|   8 +-
 target/mips/cpu-qom.h  |   2 +-
 target/mips/cpu.c  |   8 +-
 target/moxie/cpu.c |   7 +-
 target/moxie/cpu.h |   2 +-
 target/nios2/cpu.c |   8 +-
 target/nios2/cpu.h |   2 +-
 target/openrisc/cpu.c  |   8 +-
 target/openrisc/cpu.h  |   2 +-
 target/ppc/cpu-qom.h   |   2 +-
 target/ppc/translate_init.inc.c|   8 +-
 target/riscv/cpu.c |   7 +-
 target/riscv/cpu.h |   2 +-
 target/s390x/cpu-qom.h |   2 +-
 target/s390x/cpu.c |   8 +-
 target/sh4/cpu-qom.h   |   2 +-
 target/sh4/cpu.c   |   8 +-
 target/sparc/cpu-qom.h |   2 +-
 target/sparc/cpu.c |   8 +-
 target/tilegx/cpu.c|   7 +-
 target/tilegx/cpu.h|   2 +-
 target/tricore/cpu-qom.h   |   2 +-
 target/tricore/cpu.c   |   7 +-
 target/xtensa/cpu-qom.h|   2 +-
 target/xtensa/cpu.c|   8 +-
 tests/test-x86-cpuid.c | 116 +++
 50 files changed, 490 insertions(+), 279 deletions(-)
 create mode 100644 scripts/coccinelle/cpu-reset.cocci

-- 
2.24.1

[PULL 03/13] i386: Add missing cpu feature bits in EPYC model

[Eduardo Habkost]

From: "Moger, Babu" 

Adds the following missing CPUID bits:
perfctr-core : core performance counter extensions support. Enables the VM
   to use extended performance counter support. It enables six
   programmable counters instead of 4 counters.
clzero   : instruction zeroes out the 64 byte cache line specified in RAX.
xsaveerptr   : XSAVE, XSAVE, FXSAVEOPT, XSAVEC, XSAVES always save error
   pointers and FXRSTOR, XRSTOR, XRSTORS always restore error
   pointers.
ibpb : Indirect Branch Prediction Barrie.
xsaves   : XSAVES, XRSTORS and IA32_XSS supported.

Depends on following kernel commits:
40bc47b08b6e ("kvm: x86: Enumerate support for CLZERO instruction")
504ce1954fba ("KVM: x86: Expose XSAVEERPTR to the guest")
52297436199d ("kvm: svm: Update svm_xsaves_supported")

These new features will be added in EPYC-v3. The -cpu help output after the 
change.
x86 EPYC-v1   AMD EPYC Processor
x86 EPYC-v2   AMD EPYC Processor (with IBPB)
x86 EPYC-v3   AMD EPYC Processor

Signed-off-by: Babu Moger 
Message-Id: <157314965662.23828.3063243729449408327.st...@naples-babu.amd.com>
Signed-off-by: Eduardo Habkost 
---
 target/i386/cpu.c | 17 +
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index dc78494167..54f42dcd25 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3942,10 +3942,6 @@ static X86CPUDefinition builtin_x86_defs[] = {
 CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED |
 CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLFLUSHOPT |
 CPUID_7_0_EBX_SHA_NI,
-/* Missing: XSAVES (not supported by some Linux versions,
- * including v4.1 to v4.12).
- * KVM doesn't yet expose any XSAVES state save component.
- */
 .features[FEAT_XSAVE] =
 CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
 CPUID_XSAVE_XGETBV1,
@@ -3968,6 +3964,19 @@ static X86CPUDefinition builtin_x86_defs[] = {
 { /* end of list */ }
 }
 },
+{
+.version = 3,
+.props = (PropValue[]) {
+{ "ibpb", "on" },
+{ "perfctr-core", "on" },
+{ "clzero", "on" },
+{ "xsaveerptr", "on" },
+{ "xsaves", "on" },
+{ "model-id",
+  "AMD EPYC Processor" },
+{ /* end of list */ }
+}
+},
 { /* end of list */ }
 }
 },
-- 
2.24.1

[PULL 01/13] target/i386: Add Denverton-v2 (no MPX) CPU model

[Eduardo Habkost]

From: Tao Xu 

Because MPX is being removed from the linux kernel, remove MPX feature
from Denverton.

Signed-off-by: Tao Xu 
Message-Id: <20200212081328.7385-2-tao3...@intel.com>
Signed-off-by: Eduardo Habkost 
---
 target/i386/cpu.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 92fafa2659..c3b5cf1369 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3592,6 +3592,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
 .features[FEAT_VMX_VMFUNC] = MSR_VMX_VMFUNC_EPT_SWITCHING,
 .xlevel = 0x8008,
 .model_id = "Intel Atom Processor (Denverton)",
+.versions = (X86CPUVersionDefinition[]) {
+{ .version = 1 },
+{
+.version = 2,
+.props = (PropValue[]) {
+{ "monitor", "off" },
+{ "mpx", "off" },
+{ /* end of list */ },
+},
+},
+{ /* end of list */ },
+},
 },
 {
 .name = "Snowridge",
-- 
2.24.1

[PULL 3/4] scripts/simplebench: add example usage of simplebench

[Eduardo Habkost]

From: Vladimir Sementsov-Ogievskiy 

This example may be used as a template for custom benchmark.
It illustrates three things to prepare:
 - define bench_func
 - define test environments (columns)
 - define test cases (rows)
And final call of simplebench API.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
Reviewed-by: Aleksandar Markovic 
Message-Id: <20200228071914.11746-4-vsement...@virtuozzo.com>
Signed-off-by: Eduardo Habkost 
---
 scripts/simplebench/bench-example.py | 80 
 1 file changed, 80 insertions(+)
 create mode 100644 scripts/simplebench/bench-example.py

diff --git a/scripts/simplebench/bench-example.py 
b/scripts/simplebench/bench-example.py
new file mode 100644
index 00..c642a5b891
--- /dev/null
+++ b/scripts/simplebench/bench-example.py
@@ -0,0 +1,80 @@
+#!/usr/bin/env python3
+#
+# Benchmark example
+#
+# Copyright (c) 2019 Virtuozzo International GmbH.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see .
+#
+
+import simplebench
+from bench_block_job import bench_block_copy, drv_file, drv_nbd
+
+
+def bench_func(env, case):
+""" Handle one "cell" of benchmarking table. """
+return bench_block_copy(env['qemu_binary'], env['cmd'],
+case['source'], case['target'])
+
+
+# You may set the following five variables to correct values, to turn this
+# example to real benchmark.
+ssd_source = '/path-to-raw-source-image-at-ssd'
+ssd_target = '/path-to-raw-target-image-at-ssd'
+hdd_target = '/path-to-raw-source-image-at-hdd'
+nbd_ip = 'nbd-ip-addr'
+nbd_port = 'nbd-port-number'
+
+# Test-cases are "rows" in benchmark resulting table, 'id' is a caption for
+# the row, other fields are handled by bench_func.
+test_cases = [
+{
+'id': 'ssd -> ssd',
+'source': drv_file(ssd_source),
+'target': drv_file(ssd_target)
+},
+{
+'id': 'ssd -> hdd',
+'source': drv_file(ssd_source),
+'target': drv_file(hdd_target)
+},
+{
+'id': 'ssd -> nbd',
+'source': drv_file(ssd_source),
+'target': drv_nbd(nbd_ip, nbd_port)
+},
+]
+
+# Test-envs are "columns" in benchmark resulting table, 'id is a caption for
+# the column, other fields are handled by bench_func.
+test_envs = [
+{
+'id': 'backup-1',
+'cmd': 'blockdev-backup',
+'qemu_binary': '/path-to-qemu-binary-1'
+},
+{
+'id': 'backup-2',
+'cmd': 'blockdev-backup',
+'qemu_binary': '/path-to-qemu-binary-2'
+},
+{
+'id': 'mirror',
+'cmd': 'blockdev-mirror',
+'qemu_binary': '/path-to-qemu-binary-1'
+}
+]
+
+result = simplebench.bench(bench_func, test_envs, test_cases, count=3)
+print(simplebench.ascii(result))
-- 
2.24.1

[PULL 4/4] MAINTAINERS: add simplebench

[Eduardo Habkost]

From: Vladimir Sementsov-Ogievskiy 

Signed-off-by: Vladimir Sementsov-Ogievskiy 
Reviewed-by: Aleksandar Markovic 
Message-Id: <20200228071914.11746-5-vsement...@virtuozzo.com>
Signed-off-by: Eduardo Habkost 
---
 MAINTAINERS | 5 +
 1 file changed, 5 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7364af0d8b..9b462ef009 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2142,6 +2142,11 @@ F: python/qemu/*py
 F: scripts/*.py
 F: tests/*.py
 
+Benchmark util
+M: Vladimir Sementsov-Ogievskiy 
+S: Maintained
+F: scripts/simplebench/
+
 QAPI
 M: Markus Armbruster 
 M: Michael Roth 
-- 
2.24.1

[PULL 2/4] scripts/simplebench: add qemu/bench_block_job.py

[Eduardo Habkost]

From: Vladimir Sementsov-Ogievskiy 

Add block-job benchmarking helper functions.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
Reviewed-by: Aleksandar Markovic 
Message-Id: <20200228071914.11746-3-vsement...@virtuozzo.com>
Signed-off-by: Eduardo Habkost 
---
 scripts/simplebench/bench_block_job.py | 119 +
 1 file changed, 119 insertions(+)
 create mode 100755 scripts/simplebench/bench_block_job.py

diff --git a/scripts/simplebench/bench_block_job.py 
b/scripts/simplebench/bench_block_job.py
new file mode 100755
index 00..9808d696cf
--- /dev/null
+++ b/scripts/simplebench/bench_block_job.py
@@ -0,0 +1,119 @@
+#!/usr/bin/env python
+#
+# Benchmark block jobs
+#
+# Copyright (c) 2019 Virtuozzo International GmbH.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see .
+#
+
+
+import sys
+import os
+import socket
+import json
+
+sys.path.append(os.path.join(os.path.dirname(__file__), '..', '..', 'python'))
+from qemu.machine import QEMUMachine
+from qemu.qmp import QMPConnectError
+
+
+def bench_block_job(cmd, cmd_args, qemu_args):
+"""Benchmark block-job
+
+cmd   -- qmp command to run block-job (like blockdev-backup)
+cmd_args  -- dict of qmp command arguments
+qemu_args -- list of Qemu command line arguments, including path to Qemu
+ binary
+
+Returns {'seconds': int} on success and {'error': str} on failure, dict may
+contain addional 'vm-log' field. Return value is compatible with
+simplebench lib.
+"""
+
+vm = QEMUMachine(qemu_args[0], args=qemu_args[1:])
+
+try:
+vm.launch()
+except OSError as e:
+return {'error': 'popen failed: ' + str(e)}
+except (QMPConnectError, socket.timeout):
+return {'error': 'qemu failed: ' + str(vm.get_log())}
+
+try:
+res = vm.qmp(cmd, **cmd_args)
+if res != {'return': {}}:
+vm.shutdown()
+return {'error': '"{}" command failed: {}'.format(cmd, str(res))}
+
+e = vm.event_wait('JOB_STATUS_CHANGE')
+assert e['data']['status'] == 'created'
+start_ms = e['timestamp']['seconds'] * 100 + \
+e['timestamp']['microseconds']
+
+e = vm.events_wait((('BLOCK_JOB_READY', None),
+('BLOCK_JOB_COMPLETED', None),
+('BLOCK_JOB_FAILED', None)), timeout=True)
+if e['event'] not in ('BLOCK_JOB_READY', 'BLOCK_JOB_COMPLETED'):
+vm.shutdown()
+return {'error': 'block-job failed: ' + str(e),
+'vm-log': vm.get_log()}
+end_ms = e['timestamp']['seconds'] * 100 + \
+e['timestamp']['microseconds']
+finally:
+vm.shutdown()
+
+return {'seconds': (end_ms - start_ms) / 100.0}
+
+
+# Bench backup or mirror
+def bench_block_copy(qemu_binary, cmd, source, target):
+"""Helper to run bench_block_job() for mirror or backup"""
+assert cmd in ('blockdev-backup', 'blockdev-mirror')
+
+source['node-name'] = 'source'
+target['node-name'] = 'target'
+
+return bench_block_job(cmd,
+   {'job-id': 'job0', 'device': 'source',
+'target': 'target', 'sync': 'full'},
+   [qemu_binary,
+'-blockdev', json.dumps(source),
+'-blockdev', json.dumps(target)])
+
+
+def drv_file(filename):
+return {'driver': 'file', 'filename': filename,
+'cache': {'direct': True}, 'aio': 'native'}
+
+
+def drv_nbd(host, port):
+return {'driver': 'nbd',
+'server': {'type': 'inet', 'host': host, 'port': port}}
+
+
+if __name__ == '__main__':
+import sys
+
+if len(sys.argv) < 4:
+print('USAGE: {}  '
+  ' '
+  ''.format(sys.argv[0]))
+exit(1)
+
+res = bench_block_job(sys.argv[1], json.loads(sys.argv[2]), sys.argv[3:])
+if 'seconds' in res:
+print('{:.2f}'.format(res['seconds']))
+else:
+print(res)
-- 
2.24.1

[PULL 1/4] scripts/simplebench: add simplebench.py

[Eduardo Habkost]

From: Vladimir Sementsov-Ogievskiy 

Add simple benchmark table creator.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
Reviewed-by: Aleksandar Markovic 
Message-Id: <20200228071914.11746-2-vsement...@virtuozzo.com>
Signed-off-by: Eduardo Habkost 
---
 scripts/simplebench/simplebench.py | 128 +
 1 file changed, 128 insertions(+)
 create mode 100644 scripts/simplebench/simplebench.py

diff --git a/scripts/simplebench/simplebench.py 
b/scripts/simplebench/simplebench.py
new file mode 100644
index 00..59e7314ff6
--- /dev/null
+++ b/scripts/simplebench/simplebench.py
@@ -0,0 +1,128 @@
+#!/usr/bin/env python
+#
+# Simple benchmarking framework
+#
+# Copyright (c) 2019 Virtuozzo International GmbH.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see .
+#
+
+
+def bench_one(test_func, test_env, test_case, count=5, initial_run=True):
+"""Benchmark one test-case
+
+test_func   -- benchmarking function with prototype
+   test_func(env, case), which takes test_env and test_case
+   arguments and returns {'seconds': int} (which is benchmark
+   result) on success and {'error': str} on error. Returned
+   dict may contain any other additional fields.
+test_env-- test environment - opaque first argument for test_func
+test_case   -- test case - opaque second argument for test_func
+count   -- how many times to call test_func, to calculate average
+initial_run -- do initial run of test_func, which don't get into result
+
+Returns dict with the following fields:
+'runs': list of test_func results
+'average':  average seconds per run (exists only if at least one run
+succeeded)
+'delta':maximum delta between test_func result and the average
+(exists only if at least one run succeeded)
+'n-failed': number of failed runs (exists only if at least one run
+failed)
+"""
+if initial_run:
+print('  #initial run:')
+print('   ', test_func(test_env, test_case))
+
+runs = []
+for i in range(count):
+print('  #run {}'.format(i+1))
+res = test_func(test_env, test_case)
+print('   ', res)
+runs.append(res)
+
+result = {'runs': runs}
+
+successed = [r for r in runs if ('seconds' in r)]
+if successed:
+avg = sum(r['seconds'] for r in successed) / len(successed)
+result['average'] = avg
+result['delta'] = max(abs(r['seconds'] - avg) for r in successed)
+
+if len(successed) < count:
+result['n-failed'] = count - len(successed)
+
+return result
+
+
+def ascii_one(result):
+"""Return ASCII representation of bench_one() returned dict."""
+if 'average' in result:
+s = '{:.2f} +- {:.2f}'.format(result['average'], result['delta'])
+if 'n-failed' in result:
+s += '\n({} failed)'.format(result['n-failed'])
+return s
+else:
+return 'FAILED'
+
+
+def bench(test_func, test_envs, test_cases, *args, **vargs):
+"""Fill benchmark table
+
+test_func -- benchmarking function, see bench_one for description
+test_envs -- list of test environments, see bench_one
+test_cases -- list of test cases, see bench_one
+args, vargs -- additional arguments for bench_one
+
+Returns dict with the following fields:
+'envs':  test_envs
+'cases': test_cases
+'tab':   filled 2D array, where cell [i][j] is bench_one result for
+ test_cases[i] for test_envs[j] (i.e., rows are test cases and
+ columns are test environments)
+"""
+tab = {}
+results = {
+'envs': test_envs,
+'cases': test_cases,
+'tab': tab
+}
+n = 1
+n_tests = len(test_envs) * len(test_cases)
+for env in test_envs:
+for case in test_cases:
+print('Testing {}/{}: {} :: {}'.format(n, n_tests,
+   env['id'], case['id']))
+if case['id'] not in tab:
+tab[case['id']] = {}
+tab[case['id']][env['id']] = bench_one(test_func, env, case,
+   *args, **vargs)
+n += 1
+
+print('Done')
+return results
+
+
+def ascii(results):
+"""Return 

[PULL 0/4] Python queue for 5.0 soft freeze

[Eduardo Habkost]

The following changes since commit d649689a8ecb2e276cc20d3af6d416e3c299cb17:

  Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging 
(2020-03-17 18:33:05 +)

are available in the Git repository at:

  git://github.com/ehabkost/qemu.git tags/python-next-pull-request

for you to fetch changes up to f4abfc6cb037da951e7977a67171f361fc6d21d7:

  MAINTAINERS: add simplebench (2020-03-17 21:09:26 -0400)


Python queue for 5.0 soft freeze

* Add scripts/simplebench (Vladimir Sementsov-Ogievskiy)



Vladimir Sementsov-Ogievskiy (4):
  scripts/simplebench: add simplebench.py
  scripts/simplebench: add qemu/bench_block_job.py
  scripts/simplebench: add example usage of simplebench
  MAINTAINERS: add simplebench

 MAINTAINERS|   5 +
 scripts/simplebench/bench-example.py   |  80 
 scripts/simplebench/bench_block_job.py | 119 +++
 scripts/simplebench/simplebench.py | 128 +
 4 files changed, 332 insertions(+)
 create mode 100644 scripts/simplebench/bench-example.py
 create mode 100755 scripts/simplebench/bench_block_job.py
 create mode 100644 scripts/simplebench/simplebench.py

-- 
2.24.1

Re: [PULL 00/13] target: Add the Renesas RX architecture

[no-reply]

Patchew URL: https://patchew.org/QEMU/20200317163616.30027-1-f4...@amsat.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [PULL 00/13] target: Add the Renesas RX architecture
Message-id: 20200317163616.30027-1-f4...@amsat.org
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
535cf68 Add rx-softmmu
a4dec27 target/rx: Dump bytes for each insn during disassembly
d7598a8 target/rx: Collect all bytes during disassembly
dcd1fc4 target/rx: Emit all disassembly in one prt()
1f2f350 target/rx: Use prt_ldmi for XCHG_mr disassembly
732d148 target/rx: Replace operand with prt_ldmi in disassembler
4986f2e target/rx: Disassemble rx_index_addr into a string
77fa86b target/rx: RX disassembler
a5dbc2b target/rx: CPU definitions
0ca6b46 target/rx: TCG helpers
5dc4bed target/rx: TCG translation
e7b2b77 MAINTAINERS: Add entry for the Renesas RX architecture
834d435 hw/registerfields.h: Add 8bit and 16bit register macros

=== OUTPUT BEGIN ===
1/13 Checking commit 834d435694f8 (hw/registerfields.h: Add 8bit and 16bit 
register macros)
ERROR: Macros with multiple statements should be enclosed in a do - while loop
#29: FILE: include/hw/registerfields.h:25:
+#define REG8(reg, addr)   \
+enum { A_ ## reg = (addr) };  \
+enum { R_ ## reg = (addr) };

ERROR: Macros with multiple statements should be enclosed in a do - while loop
#33: FILE: include/hw/registerfields.h:29:
+#define REG16(reg, addr)  \
+enum { A_ ## reg = (addr) };  \
+enum { R_ ## reg = (addr) / 2 };

total: 2 errors, 0 warnings, 48 lines checked

Patch 1/13 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

2/13 Checking commit e7b2b77fbea2 (MAINTAINERS: Add entry for the Renesas RX 
architecture)
3/13 Checking commit 5dc4beddbcc7 (target/rx: TCG translation)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#22: 
new file mode 100644

total: 0 errors, 1 warnings, 3065 lines checked

Patch 3/13 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
4/13 Checking commit 0ca6b46ea8d2 (target/rx: TCG helpers)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#20: 
new file mode 100644

total: 0 errors, 1 warnings, 650 lines checked

Patch 4/13 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/13 Checking commit a5dbc2bd59fe (target/rx: CPU definitions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#22: 
new file mode 100644

total: 0 errors, 1 warnings, 706 lines checked

Patch 5/13 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/13 Checking commit 77fa86be9187 (target/rx: RX disassembler)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#40: 
new file mode 100644

total: 0 errors, 1 warnings, 1497 lines checked

Patch 6/13 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/13 Checking commit 4986f2ec7901 (target/rx: Disassemble rx_index_addr into a 
string)
8/13 Checking commit 732d148c748e (target/rx: Replace operand with prt_ldmi in 
disassembler)
9/13 Checking commit 1f2f350c5ea1 (target/rx: Use prt_ldmi for XCHG_mr 
disassembly)
10/13 Checking commit dcd1fc42e0a9 (target/rx: Emit all disassembly in one 
prt())
11/13 Checking commit d7598a82bf6b (target/rx: Collect all bytes during 
disassembly)
12/13 Checking commit a4dec27f7f50 (target/rx: Dump bytes for each insn during 
disassembly)
13/13 Checking commit 535cf68782f7 (Add rx-softmmu)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#69: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 13/13 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200317163616.30027-1-f4...@amsat.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-de...@redhat.com

Re: [PULL 09/61] MAINTAINERS: Add entry for Guest X86 HAXM CPUs

[Colin Xu]

On 2020-03-17 18:27, Paolo Bonzini wrote:

On 17/03/20 09:55, Colin Xu wrote:

On 2020-03-17 16:26, Paolo Bonzini wrote:

On 17/03/20 08:46, Colin Xu wrote:

Hi Paolo,

For future HAX patch, once it's "Reviewed-by" haxm maintainers and other
reviewers, do we need "SubmitAPullRequest" separately or you will do it
together with other patches?

As you prefer.  I wouldn't mind having to send fewer pull requests. :)

Paolo

Would you mind continue help HAX send pull request? It feels like easier
to track the changes when stay together with other accelerator patches.
We'll regularly check the reviewed patches and do necessary tests, and
send you a list of patches that can be queued for next pull.

What do you think?

Sure, that's okay.  The number of patches is low enough.

Paolo


Cool. Thanks a lot for the help.

Colin.

--

Best Regards,
Colin Xu

[PULL 6/6] tests/docker: make "buildah bud" output similar to "docker build"

[Cleber Rosa]

Podman users will most often be using buildah to build containers.
Among the differences between "buildah bud|build-using-dockerfile" and
a traditional "docker build" is that buildah does not run a container
during build.

To the best of my knowledge and experiments, this means that runtime
variables, such as ENV from one base image will not propagate into
another.  The end result is that the location for the cross compiler
binaries, defined in the base "qemu/debian9-mxe" image, are not passed
through this image.  Consequently, the cross compilers are not on PATH
and the build fails.

Signed-off-by: Cleber Rosa 
Acked-by: Alex Bennée 
Message-Id: <20200312193616.438922-3-cr...@redhat.com>
Signed-off-by: Cleber Rosa 
---
 tests/docker/dockerfiles/debian-win32-cross.docker | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/docker/dockerfiles/debian-win32-cross.docker 
b/tests/docker/dockerfiles/debian-win32-cross.docker
index 9d7053e59d..d16d6431bc 100644
--- a/tests/docker/dockerfiles/debian-win32-cross.docker
+++ b/tests/docker/dockerfiles/debian-win32-cross.docker
@@ -9,7 +9,7 @@ MAINTAINER Philippe Mathieu-Daudé 
 
 ENV TARGET i686
 
-ENV PATH $PATH:/usr/lib/mxe/usr/$TARGET-w64-mingw32.shared/bin
+ENV PATH 
$PATH:/usr/lib/mxe/usr/bin:/usr/lib/mxe/usr/$TARGET-w64-mingw32.shared/bin
 
 ENV PKG_CONFIG_PATH \
 $PKG_CONFIG_PATH:/usr/lib/mxe/usr/$TARGET-w64-mingw32.shared/lib/pkgconfig
-- 
2.25.1

[PULL 5/6] tests/docker: add CentOS 8 Dockerfile

[Cleber Rosa]

Which is currenly missing, and will be referenced later in the
contributed CI playbooks.

Signed-off-by: Cleber Rosa 
Reviewed-by: Alex Bennée 
Message-Id: <20200312193616.438922-2-cr...@redhat.com>
Signed-off-by: Cleber Rosa 
---
 tests/docker/dockerfiles/centos8.docker | 32 +
 1 file changed, 32 insertions(+)
 create mode 100644 tests/docker/dockerfiles/centos8.docker

diff --git a/tests/docker/dockerfiles/centos8.docker 
b/tests/docker/dockerfiles/centos8.docker
new file mode 100644
index 00..bfa0d33c9c
--- /dev/null
+++ b/tests/docker/dockerfiles/centos8.docker
@@ -0,0 +1,32 @@
+FROM centos:8.1.1911
+
+RUN dnf -y update
+ENV PACKAGES \
+SDL-devel \
+bison \
+bzip2 \
+bzip2-devel \
+dbus-daemon \
+flex \
+gcc \
+gcc-c++ \
+gettext \
+git \
+glib2-devel \
+libaio-devel \
+libepoxy-devel \
+lzo-devel \
+make \
+mesa-libEGL-devel \
+nettle-devel \
+perl-Test-Harness \
+pixman-devel \
+python36 \
+rdma-core-devel \
+spice-glib-devel \
+spice-server \
+tar \
+zlib-devel
+
+RUN dnf install -y $PACKAGES
+RUN rpm -q $PACKAGES | sort > /packages.txt
-- 
2.25.1

[PULL 3/6] Acceptance test: add "boot_linux" tests

[Cleber Rosa]

This acceptance test, validates that a full blown Linux guest can
successfully boot in QEMU.  In this specific case, the guest chosen is
Fedora version 31.

 * x86_64, pc-i440fx and pc-q35 machine types, with TCG and KVM as
   accelerators

 * aarch64 and virt machine type, with TCG and KVM as accelerators

 * ppc64 and pseries machine type with TCG as accelerator

 * s390x and s390-ccw-virtio machine type with TCG as accelerator

The Avocado vmimage utils library is used to download and cache the
Linux guest images, and from those images a snapshot image is created
and given to QEMU.  If a qemu-img binary is available in the build
directory, it's used to create the snapshot image, so that matching
qemu-system-* and qemu-img are used in the same test run.  If qemu-img
is not available in the build tree, one is attempted to be found
installed system-wide (in the $PATH).  If qemu-img is not found in the
build dir or in the $PATH, the test is canceled.

The method for checking the successful boot is based on "cloudinit"
and its "phone home" feature.  The guest is given an ISO image with
the location of the phone home server, and the information to post
(the instance ID).  Upon receiving the correct information, from the
guest, the test is considered to have PASSed.

This test is currently limited to user mode networking only, and
instructs the guest to connect to the "router" address that is hard
coded in QEMU.

To create the cloudinit ISO image that will be used to configure the
guest, the pycdlib library is also required and has been added as
requirement to the virtual environment created by "check-venv".

The console output is read by a separate thread, by means of the
Avocado datadrainer utility module.

Signed-off-by: Cleber Rosa 
Reviewed-by: Wainer dos Santos Moschetta 
Reviewed-by: Willian Rampazzo 
Tested-by: Willian Rampazzo 
Message-Id: <20200317141654.29355-3-cr...@redhat.com>
Signed-off-by: Cleber Rosa 
---
 .travis.yml|   2 +-
 tests/acceptance/boot_linux.py | 222 +
 tests/requirements.txt |   1 +
 3 files changed, 224 insertions(+), 1 deletion(-)
 create mode 100644 tests/acceptance/boot_linux.py

diff --git a/.travis.yml b/.travis.yml
index b92798ac3b..c460059a7b 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -315,7 +315,7 @@ jobs:
 - name: "GCC check-acceptance"
   dist: bionic
   env:
-- 
CONFIG="--target-list=aarch64-softmmu,alpha-softmmu,arm-softmmu,m68k-softmmu,microblaze-softmmu,mips-softmmu,mips64el-softmmu,nios2-softmmu,or1k-softmmu,ppc-softmmu,ppc64-softmmu,s390x-softmmu,sparc-softmmu,x86_64-softmmu,xtensa-softmmu"
+- CONFIG="--enable-tools 
--target-list=aarch64-softmmu,alpha-softmmu,arm-softmmu,m68k-softmmu,microblaze-softmmu,mips-softmmu,mips64el-softmmu,nios2-softmmu,or1k-softmmu,ppc-softmmu,ppc64-softmmu,s390x-softmmu,sparc-softmmu,x86_64-softmmu,xtensa-softmmu"
 - TEST_CMD="make check-acceptance"
   after_script:
 - python3 -c 'import json; r = 
json.load(open("tests/results/latest/results.json")); [print(t["logfile"]) for 
t in r["tests"] if t["status"] not in ("PASS", "SKIP")]' | xargs cat
diff --git a/tests/acceptance/boot_linux.py b/tests/acceptance/boot_linux.py
new file mode 100644
index 00..075a386300
--- /dev/null
+++ b/tests/acceptance/boot_linux.py
@@ -0,0 +1,222 @@
+# Functional test that boots a complete Linux system via a cloud image
+#
+# Copyright (c) 2018-2020 Red Hat, Inc.
+#
+# Author:
+#  Cleber Rosa 
+#
+# This work is licensed under the terms of the GNU GPL, version 2 or
+# later.  See the COPYING file in the top-level directory.
+
+import os
+
+from avocado_qemu import Test, BUILD_DIR
+
+from qemu.accel import kvm_available
+from qemu.accel import tcg_available
+
+from avocado.utils import cloudinit
+from avocado.utils import network
+from avocado.utils import vmimage
+from avocado.utils import datadrainer
+from avocado.utils.path import find_command
+
+ACCEL_NOT_AVAILABLE_FMT = "%s accelerator does not seem to be available"
+KVM_NOT_AVAILABLE = ACCEL_NOT_AVAILABLE_FMT % "KVM"
+TCG_NOT_AVAILABLE = ACCEL_NOT_AVAILABLE_FMT % "TCG"
+
+
+class BootLinux(Test):
+"""
+Boots a Linux system, checking for a successful initialization
+"""
+
+timeout = 900
+chksum = None
+
+def setUp(self):
+super(BootLinux, self).setUp()
+self.vm.add_args('-smp', '2')
+self.vm.add_args('-m', '1024')
+self.prepare_boot()
+self.prepare_cloudinit()
+
+def prepare_boot(self):
+self.log.debug('Looking for and selecting a qemu-img binary to be '
+   'used to create the bootable snapshot image')
+# If qemu-img has been built, use it, otherwise the system wide one
+# will be used.  If none is available, the test will cancel.
+qemu_img = os.path.join(BUILD_DIR, 'qemu-img')
+if not os.path.exists(qemu_img):
+qemu_img = 

[PULL 4/6] Acceptance tests: add make targets to download images

[Cleber Rosa]

The newly introduced "boot linux" tests make use of Linux images that
are larger than usual, and fall into what Avocado calls "vmimages",
and can be referred to by name, version and architecture.

The images can be downloaded automatically during the test. But, to
make for more reliable test results, this introduces a target that
will download the vmimages for the architectures that have been
configured and are available for the currently used distro (Fedora
31).

Signed-off-by: Cleber Rosa 
Reviewed-by: Willian Rampazzo 
Reviewed-by: Alex Bennée 
[Cleber: implemented suggestions by Alex, download message, check-venv target]
Message-Id: <20200317141654.29355-4-cr...@redhat.com>
Signed-off-by: Cleber Rosa 
---
 tests/Makefile.include | 20 ++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/tests/Makefile.include b/tests/Makefile.include
index 67e8fcddda..68c5d73d28 100644
--- a/tests/Makefile.include
+++ b/tests/Makefile.include
@@ -20,6 +20,8 @@ check-help:
@echo " $(MAKE) check-venv   Creates a Python venv for tests"
@echo " $(MAKE) check-clean  Clean the tests and related data"
@echo
+   @echo " $(MAKE) get-vm-imagesDownloads all images used by 
acceptance tests, according to configured targets (~350 MB each, 1.5 GB max)"
+   @echo
@echo
@echo "The variable SPEED can be set to control the gtester speed 
setting."
@echo "Default options are -k and (for $(MAKE) V=1) --verbose; they can 
be"
@@ -889,7 +891,21 @@ $(TESTS_RESULTS_DIR):
 
 check-venv: $(TESTS_VENV_DIR)
 
-check-acceptance: check-venv $(TESTS_RESULTS_DIR)
+FEDORA_31_ARCHES_CANDIDATES=$(patsubst ppc64,ppc64le,$(TARGETS))
+FEDORA_31_ARCHES := x86_64 aarch64 ppc64le s390x
+FEDORA_31_DOWNLOAD=$(filter $(FEDORA_31_ARCHES),$(FEDORA_31_ARCHES_CANDIDATES))
+
+# download one specific Fedora 31 image
+get-vm-image-fedora-31-%: check-venv
+   $(call quiet-command, \
+ $(TESTS_VENV_DIR)/bin/python -m avocado vmimage get \
+ --distro=fedora --distro-version=31 --arch=$*, \
+   "AVOCADO", "Downloading acceptance tests VM image for $*")
+
+# download all vm images, according to defined targets
+get-vm-images: check-venv $(patsubst %,get-vm-image-fedora-31-%, 
$(FEDORA_31_DOWNLOAD))
+
+check-acceptance: check-venv $(TESTS_RESULTS_DIR) get-vm-images
$(call quiet-command, \
 $(TESTS_VENV_DIR)/bin/python -m avocado \
 --show=$(AVOCADO_SHOW) run --job-results-dir=$(TESTS_RESULTS_DIR) \
@@ -900,7 +916,7 @@ check-acceptance: check-venv $(TESTS_RESULTS_DIR)
 
 # Consolidated targets
 
-.PHONY: check-block check-qapi-schema check-qtest check-unit check check-clean
+.PHONY: check-block check-qapi-schema check-qtest check-unit check check-clean 
get-vm-images
 check-qapi-schema: check-tests/qapi-schema/frontend 
check-tests/qapi-schema/doc-good.texi
 check-qtest: $(patsubst %,check-qtest-%, $(QTEST_TARGETS))
 ifeq ($(CONFIG_TOOLS),y)
-- 
2.25.1

[PULL 2/6] Acceptance tests: introduce BUILD_DIR and SOURCE_DIR

[Cleber Rosa]

Some tests may benefit from using resources from a build directory.
This introduces three variables that can help tests find resources in
those directories.

First, a BUILD_DIR is assumed to exist, given that the primary form of
running the acceptance tests is from a build directory (which may or
may not be the same as the source tree, that is, the SOURCE_DIR).

If the directory containing the acceptance tests happens to be a link
to a directory, it's assumed to it points to the source tree
(SOURCE_DIR), which is the behavior defined on the QEMU Makefiles.  If
the directory containing the acceptance tests is not a link, then a
in-tree build is assumed, and the BUILD_DIR and SOURCE_DIR have the
same value.

Signed-off-by: Cleber Rosa 
Reviewed-by: Wainer dos Santos Moschetta 
Tested-by: Wainer dos Santos Moschetta 
Reviewed-by: Willian Rampazzo 
Tested-by: Willian Rampazzo 
Message-Id: <20200317141654.29355-2-cr...@redhat.com>
Signed-off-by: Cleber Rosa 
---
 tests/acceptance/avocado_qemu/__init__.py | 25 +--
 1 file changed, 19 insertions(+), 6 deletions(-)

diff --git a/tests/acceptance/avocado_qemu/__init__.py 
b/tests/acceptance/avocado_qemu/__init__.py
index d4358eb431..59e7b4f763 100644
--- a/tests/acceptance/avocado_qemu/__init__.py
+++ b/tests/acceptance/avocado_qemu/__init__.py
@@ -16,8 +16,21 @@ import tempfile
 
 import avocado
 
-SRC_ROOT_DIR = os.path.join(os.path.dirname(__file__), '..', '..', '..')
-sys.path.append(os.path.join(SRC_ROOT_DIR, 'python'))
+#: The QEMU build root directory.  It may also be the source directory
+#: if building from the source dir, but it's safer to use BUILD_DIR for
+#: that purpose.  Be aware that if this code is moved outside of a source
+#: and build tree, it will not be accurate.
+BUILD_DIR = 
os.path.dirname(os.path.dirname(os.path.dirname(os.path.dirname(__file__
+
+if os.path.islink(os.path.dirname(os.path.dirname(__file__))):
+# The link to the acceptance tests dir in the source code directory
+lnk = os.path.dirname(os.path.dirname(__file__))
+#: The QEMU root source directory
+SOURCE_DIR = os.path.dirname(os.path.dirname(os.readlink(lnk)))
+else:
+SOURCE_DIR = BUILD_DIR
+
+sys.path.append(os.path.join(SOURCE_DIR, 'python'))
 
 from qemu.machine import QEMUMachine
 
@@ -49,10 +62,10 @@ def pick_default_qemu_bin(arch=None):
 if is_readable_executable_file(qemu_bin_relative_path):
 return qemu_bin_relative_path
 
-qemu_bin_from_src_dir_path = os.path.join(SRC_ROOT_DIR,
+qemu_bin_from_bld_dir_path = os.path.join(BUILD_DIR,
   qemu_bin_relative_path)
-if is_readable_executable_file(qemu_bin_from_src_dir_path):
-return qemu_bin_from_src_dir_path
+if is_readable_executable_file(qemu_bin_from_bld_dir_path):
+return qemu_bin_from_bld_dir_path
 
 
 def _console_interaction(test, success_message, failure_message,
@@ -153,7 +166,7 @@ class Test(avocado.Test):
 self.qemu_bin = self.params.get('qemu_bin',
 default=default_qemu_bin)
 if self.qemu_bin is None:
-self.cancel("No QEMU binary defined or found in the source tree")
+self.cancel("No QEMU binary defined or found in the build tree")
 
 def _new_vm(self, *args):
 vm = QEMUMachine(self.qemu_bin, sock_dir=tempfile.mkdtemp())
-- 
2.25.1

[PULL 1/6] python/qemu/qmp.py: QMP debug with VM label

[Cleber Rosa]

From: Oksana Vohchana 

QEMUMachine writes some messages to the default logger.
But it sometimes hard to read the output if we have requests to
more than one VM.
This patch adds a label to the logger in the debug mode.

Signed-off-by: Oksana Vohchana 
Reviewed-by: John Snow 
Reviewed-by: Wainer dos Santos Moschetta 
Reviewed-by: Cleber Rosa 
Message-Id: <20200316103203.10046-1-ovosh...@redhat.com>
Signed-off-by: Cleber Rosa 
---
 python/qemu/machine.py | 3 ++-
 python/qemu/qmp.py | 5 -
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/python/qemu/machine.py b/python/qemu/machine.py
index 183d8f3d38..f53abfa492 100644
--- a/python/qemu/machine.py
+++ b/python/qemu/machine.py
@@ -270,7 +270,8 @@ class QEMUMachine(object):
 self._vm_monitor = os.path.join(self._sock_dir,
 self._name + "-monitor.sock")
 self._remove_files.append(self._vm_monitor)
-self._qmp = qmp.QEMUMonitorProtocol(self._vm_monitor, server=True)
+self._qmp = qmp.QEMUMonitorProtocol(self._vm_monitor, server=True,
+nickname=self._name)
 
 def _post_launch(self):
 if self._qmp:
diff --git a/python/qemu/qmp.py b/python/qemu/qmp.py
index f40586eedd..d6c9b2f4b1 100644
--- a/python/qemu/qmp.py
+++ b/python/qemu/qmp.py
@@ -46,7 +46,7 @@ class QEMUMonitorProtocol:
 #: Logger object for debugging messages
 logger = logging.getLogger('QMP')
 
-def __init__(self, address, server=False):
+def __init__(self, address, server=False, nickname=None):
 """
 Create a QEMUMonitorProtocol class.
 
@@ -62,6 +62,9 @@ class QEMUMonitorProtocol:
 self.__address = address
 self.__sock = self.__get_sock()
 self.__sockfile = None
+self._nickname = nickname
+if self._nickname:
+self.logger = logging.getLogger('QMP').getChild(self._nickname)
 if server:
 self.__sock.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
 self.__sock.bind(self.__address)
-- 
2.25.1

[PULL 0/6] Python and tests (mostly acceptance) patches 2020-03-17

[Cleber Rosa]

The following changes since commit d649689a8ecb2e276cc20d3af6d416e3c299cb17:

  Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging 
(2020-03-17 18:33:05 +)

are available in the Git repository at:

  git://github.com/clebergnu/qemu.git tags/python-next-pull-request

for you to fetch changes up to a51d6a549361fd1a20dd2ac1d6a42ac0a4c708c7:

  tests/docker: make "buildah bud" output similar to "docker build" (2020-03-17 
19:16:16 -0400)


Python and tests (mostly acceptance) patches 2020-03-17



Cleber Rosa (5):
  Acceptance tests: introduce BUILD_DIR and SOURCE_DIR
  Acceptance test: add "boot_linux" tests
  Acceptance tests: add make targets to download images
  tests/docker: add CentOS 8 Dockerfile
  tests/docker: make "buildah bud" output similar to "docker build"

Oksana Vohchana (1):
  python/qemu/qmp.py: QMP debug with VM label

 .travis.yml   |   2 +-
 python/qemu/machine.py|   3 +-
 python/qemu/qmp.py|   5 +-
 tests/Makefile.include|  20 +-
 tests/acceptance/avocado_qemu/__init__.py |  25 +-
 tests/acceptance/boot_linux.py| 222 ++
 tests/docker/dockerfiles/centos8.docker   |  32 +++
 .../dockerfiles/debian-win32-cross.docker |   2 +-
 tests/requirements.txt|   1 +
 9 files changed, 300 insertions(+), 12 deletions(-)
 create mode 100644 tests/acceptance/boot_linux.py
 create mode 100644 tests/docker/dockerfiles/centos8.docker

-- 
2.25.1

[Bug 1811533] Re: Unstable Win10 guest with qemu 3.1 + huge pages + hv_stimer

[Heiko Sieger]

Also affects me when running Qemu 4.0.0 with -machine pc-q35-3.1. I get
this on the command line:

"qemu-system-x86_64: vhost_region_add_section: Overlapping but not
coherent sections at 11a000".

h/w: AMD Ryzen 3900X, Gigabyte Aorus Pro X570 (latest BIOS), kernel
5.3.0.

With -machine q35 (i.e. pc-q35-4.0) the machine crashes when soundhw is
specified. Here the quick and dirty command line:

qemu-system-x86_64 \
  -enable-kvm \
  -runas user \
  -serial none \
  -parallel none \
  -nodefaults \
  -name $vmname,process=$vmname \
  -machine pc-q35-3.1,accel=kvm,mem-merge=off,vmport=off \
-cpu 
host,kvm=off,+topoext,hv_vendor_id=1234567890ab,hv_vapic,hv_time,hv_relaxed,hv_spinlocks=0x1fff,hv_crash,hv_reset,hv_vpindex,hv_runtime,hv_synic,hv_stimer
 \
  -smp 24,sockets=1,cores=12,threads=2 \
-global ICH9-LPC.disable_s3=1 \
-global ICH9-LPC.disable_s4=1 \
  -m 48G \
-mem-path /dev/hugepages \
-mem-prealloc \
  -rtc base=localtime,clock=host,driftfix=slew  \
-soundhw hda \
-audiodev pa,id=pa1,server=/run/user/1000/pulse/native \
  -vga none \
  -nographic \
-usb \
-device usb-host,vendorid=0x046d,productid=0xc52b \
-device ioh3420,id=root_port1,chassis=1,bus=pcie.0,addr=03.0 \
-device 
vfio-pci,host=0b:00.0,id=hostdev1,bus=root_port1,addr=0x00,multifunction=on \
-device vfio-pci,host=0b:00.1,id=hostdev2,bus=root_port1,addr=0x00.1 \
  -drive if=pflash,format=raw,readonly,file=/usr/share/OVMF/OVMF_CODE.fd \
  -drive if=pflash,format=raw,file=/tmp/my_vars.fd \
...

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1811533

Title:
  Unstable Win10 guest with qemu 3.1 + huge pages + hv_stimer

Status in QEMU:
  Confirmed

Bug description:
  Host:
  Gentoo linux x86_64, kernel 4.20.1
  Qemu 3.1.0 
  CPU: Intel i7 6850K
  Chipset: X99

  Guest:
  Windows 10 Pro 64bit (1809)
  Machine type: pc-q35_3.1
  Hyper-V enlightenments: 
hv_stimer,hv_reenlightenment,hv_frequencies,hv_vapic,hv_reset,hv_synic,hv_runtime,hv_vpindex,hv_time,hv_relaxed,hv_spinlocks=0x1fff
  Memory: 16GB backed by 2MB huge pages

  Issue:
  Once guest is started, log gets flooded with:

  qemu-system-x86_64: vhost_region_add_section: Overlapping but not
  coherent sections at 103000

  or

  qemu-system-x86_64: vhost_region_add_section:Section rounded to 0
  prior to previous 1f000

  (line endings change)

  and as time goes guest loses network access (virtio-net-pci) and
  general performance diminishes to extent of freezing applications.

  Observations:
  1) problem disappears when hv_stimer is removed
  2) problem disappears when memory backing with huge pages is disabled
  3) problem disappears when machine type is downgraded to pc-q35_3.0

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1811533/+subscriptions

Re: [PULL 00/45] ppc-for-5.0 queue 20200317

[Alexey Kardashevskiy]

On 18/03/2020 09:33, David Gibson wrote:
> On Tue, Mar 17, 2020 at 11:30:31AM +0100, Paolo Bonzini wrote:
>> On 17/03/20 11:03, David Gibson wrote:
>>>   pseries: Update SLOF firmware image
>>>   ppc/spapr: Move GPRs setup to one place
>>>   pseries: Update SLOF firmware image
>>>   spapr/rtas: Reserve space for RTAS blob and log
>>>   pseries: Update SLOF firmware image
>>
>> Oh, no fake-OF patches?
> 
> Apart from some prelims that make sense on their own, no.
> 
> Not quite ready to go ahead with that, I'm afraid.

You reviewed and found problems or you did not have time for that?
Either is fine, just curious.



-- 
Alexey

Re: [PATCH] tools/virtiofsd: add support for --socket-group

[Marc-André Lureau]

Hi

On Wed, Mar 18, 2020 at 12:21 AM Alex Bennée  wrote:
>
>
> Dr. David Alan Gilbert  writes:
>
> > * Stefan Hajnoczi (stefa...@redhat.com) wrote:
> >> On Mon, Mar 16, 2020 at 10:33:31AM +, Daniel P. Berrangé wrote:
> >> > On Sat, Mar 14, 2020 at 02:33:25PM +0100, Marc-André Lureau wrote:
> >> > > Hi
> >> > >
> >> > > On Thu, Mar 12, 2020 at 11:49 AM Daniel P. Berrangé 
> >> > >  wrote:
> >> > > >
> >> > > > On Thu, Mar 12, 2020 at 10:41:42AM +, Alex Bennée wrote:
> >> > > > > If you like running QEMU as a normal user (very common for TCG 
> >> > > > > runs)
> >> > > > > but you have to run virtiofsd as a root user you run into 
> >> > > > > connection
> >> > > > > problems. Adding support for an optional --socket-group allows the
> >> > > > > users to keep using the command line.
> >> > > >
> >> > > > If we're going to support this, then I think we need to put it in
> >> > > > the vhost-user.rst specification so we standardize across backends.
> >> > > >
> >> > > >
> >> > >
> >> > > Perhaps. Otoh, I wonder if the backend spec should be more limited to
> >> > > arguments/introspection that are used by programs.
> >> > >
> >> > > In this case, I even consider --socket-path to be unnecessary, as a
> >> > > management layer can/should provide a preopened & setup fd directly.
> >> > >
> >> > > What do you think?
> >> >
> >> > I think there's value in standardization even if it is an option 
> >> > targetted
> >> > at human admins, rather than machine usage. You are right though that
> >> > something like libvirt would never use --socket-group, or --socket-path.
> >> > Even admins would benefit if all programs followed the same naming for
> >> > these.  We could document such options as "SHOULD" rather than "MUST"
> >> > IOW, we don't mandate --socket-group, but if you're going to provide a
> >> > way to control socket group, this option should be used.
> >>
> >> I agree.  It's still useful to have a convention that most vhost-user
> >> backend programs follow.
> >
> > Alex:
> >   Can you add the doc entry that Stefan and Marc-André are asking
> > for;  it's probably good they go together.
>
> Sure - is docs/interop/vhost-user.rst the master spec for vhost-user
> daemons?

So far, yes. But it might make sense to create a standalone
vhost-user-daemons.rst.



-- 
Marc-André Lureau

Re: [PATCH v7 00/13] APIC ID fixes for AMD EPYC CPU model

[Eduardo Habkost]

On Tue, Mar 17, 2020 at 07:22:06PM -0400, Eduardo Habkost wrote:
> On Thu, Mar 12, 2020 at 11:28:47AM -0500, Babu Moger wrote:
> > Eduardo, Can you please queue the series if there are no concerns.
> > Thanks
> 
> I had queued it for today's pull request, but it looks like it
> breaks "make check".  See 
> https://travis-ci.org/github/ehabkost/qemu/jobs/663529282
> 
>   PASS 4 bios-tables-test /x86_64/acpi/piix4/ipmi
>   Could not access KVM kernel module: No such file or directory
>   qemu-system-x86_64: -accel kvm: failed to initialize kvm: No such file or 
> directory
>   qemu-system-x86_64: falling back to tcg
>   qemu-system-x86_64: Invalid CPU [socket: 0, die: 0, core: 1, thread: 0] 
> with APIC ID 1, valid index range 0:5
>   Broken pipe
>   /home/travis/build/ehabkost/qemu/tests/qtest/libqtest.c:166: kill_qemu() 
> tried to terminate QEMU process but encountered exit status 1 (expected 0)
>   Aborted (core dumped)
>   ERROR - too few tests run (expected 17, got 4)
>   /home/travis/build/ehabkost/qemu/tests/Makefile.include:633: recipe for 
> target 'check-qtest-x86_64' failed
>   make: *** [check-qtest-x86_64] Error 1

Failure is at the /x86_64/acpi/piix4/cpuhp test case:

  $ QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img 
tests/qtest/bios-tables-test -m=quick --verbose --debug-log
  [...]
  {*LOG(start):{/x86_64/acpi/piix4/cpuhp}:LOG*}
  # starting QEMU: exec x86_64-softmmu/qemu-system-x86_64 -qtest 
unix:/tmp/qtest-2052313.sock -qtest-log /dev/null -chardev 
socket,path=/tmp/qtest-2052313.qmp,id=char0 -mon chardev=char0,mode=control 
-display none -machine pc,kernel-irqchip=off -accel kvm -accel tcg -net none 
-display none -smp 2,cores=3,sockets=2,maxcpus=6 -object 
memory-backend-ram,id=ram0,size=64M -object memory-backend-ram,id=ram1,size=64M 
-numa node,memdev=ram0 -numa node,memdev=ram1 -numa dist,src=0,dst=1,val=21 
-drive id=hd0,if=none,file=tests/acpi-test-disk-PVjFru,format=raw -device 
ide-hd,drive=hd0  -accel qtest
  {*LOG(message):{starting QEMU: exec x86_64-softmmu/qemu-system-x86_64 -qtest 
unix:/tmp/qtest-2052313.sock -qtest-log /dev/null -chardev 
socket,path=/tmp/qtest-2052313.qmp,id=char0 -mon chardev=char0,mode=control 
-display none -machine pc,kernel-irqchip=off -accel kvm -accel tcg -net none 
-display none -smp 2,cores=3,sockets=2,maxcpus=6 -object 
memory-backend-ram,id=ram0,size=64M -object memory-backend-ram,id=ram1,size=64M 
-numa node,memdev=ram0 -numa node,memdev=ram1 -numa dist,src=0,dst=1,val=21 
-drive id=hd0,if=none,file=tests/acpi-test-disk-PVjFru,format=raw -device 
ide-hd,drive=hd0  -accel qtest}:LOG*}
  qemu-system-x86_64: Invalid CPU [socket: 0, die: 0, core: 1, thread: 0] with 
APIC ID 1, valid index range 0:5
  Broken pipe


> 
> 
> > 
> > On 3/11/20 5:52 PM, Babu Moger wrote:
> > > This series fixes APIC ID encoding problem reported on AMD EPYC cpu 
> > > models.
> > > https://bugzilla.redhat.com/show_bug.cgi?id=1728166
> > > 
> > > Currently, the APIC ID is decoded based on the sequence
> > > sockets->dies->cores->threads. This works for most standard AMD and other
> > > vendors' configurations, but this decoding sequence does not follow that 
> > > of
> > > AMD's APIC ID enumeration strictly. In some cases this can cause CPU 
> > > topology
> > > inconsistency.  When booting a guest VM, the kernel tries to validate the
> > > topology, and finds it inconsistent with the enumeration of EPYC cpu 
> > > models.
> > > 
> > > To fix the problem we need to build the topology as per the Processor
> > > Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1
> > > Processors. The documentation is available from the bugzilla Link below.
> > > 
> > > Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
> > > 
> > > Here is the text from the PPR.
> > > Operating systems are expected to use 
> > > Core::X86::Cpuid::SizeId[ApicIdSize], the
> > > number of least significant bits in the Initial APIC ID that indicate 
> > > core ID
> > > within a processor, in constructing per-core CPUID masks.
> > > Core::X86::Cpuid::SizeId[ApicIdSize] determines the maximum number of 
> > > cores
> > > (MNC) that the processor could theoretically support, not the actual 
> > > number of
> > > cores that are actually implemented or enabled on the processor, as 
> > > indicated
> > > by Core::X86::Cpuid::SizeId[NC].
> > > Each Core::X86::Apic::ApicId[ApicId] register is preset as follows:
> > > • ApicId[6] = Socket ID.
> > > • ApicId[5:4] = Node ID.
> > > • ApicId[3] = Logical CCX L3 complex ID
> > > • ApicId[2:0]= (SMT) ? {LogicalCoreID[1:0],ThreadId} : 
> > > {1'b0,LogicalCoreID[1:0]}
> > > 
> > > v7:
> > >  Generated the patches on top of git://github.com/ehabkost/qemu.git 
> > > (x86-next).
> > >  Changes from v6.
> > >  1. Added new function x86_set_epyc_topo_handlers to override the apic id
> > > encoding handlers.
> > >  2. Separated the code to set use_epyc_apic_id_encoding and added as a 
> > > new patch
> > > as it looked 

Re: [PULL 0/5] tcg patch queue

[no-reply]

Patchew URL: 
https://patchew.org/QEMU/20200317190013.25036-1-richard.hender...@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [PULL 0/5] tcg patch queue
Message-id: 20200317190013.25036-1-richard.hender...@linaro.org
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
83eaadd tcg: Remove tcg-runtime-gvec.c DO_CMP0
e0008a5 tcg: Tidy tcg-runtime-gvec.c DUP*
8e7d6d3 tcg: Tidy tcg-runtime-gvec.c types
44bd3c5 tcg: Remove CONFIG_VECTOR16
f410c29 tcg/i386: Bound shift count expanding sari_vec

=== OUTPUT BEGIN ===
1/5 Checking commit f410c296b774 (tcg/i386: Bound shift count expanding 
sari_vec)
2/5 Checking commit 44bd3c5fbbdb (tcg: Remove CONFIG_VECTOR16)
3/5 Checking commit 8e7d6d39c529 (tcg: Tidy tcg-runtime-gvec.c types)
ERROR: spaces required around that '&' (ctx:WxO)
#442: FILE: accel/tcg/tcg-runtime-gvec.c:510:
+*(uint64_t *)(d + i) = *(uint64_t *)(a + i) &~ *(uint64_t *)(b + i);
 ^

ERROR: space prohibited after that '~' (ctx:OxW)
#442: FILE: accel/tcg/tcg-runtime-gvec.c:510:
+*(uint64_t *)(d + i) = *(uint64_t *)(a + i) &~ *(uint64_t *)(b + i);
  ^

ERROR: spaces required around that '|' (ctx:WxO)
#453: FILE: accel/tcg/tcg-runtime-gvec.c:521:
+*(uint64_t *)(d + i) = *(uint64_t *)(a + i) |~ *(uint64_t *)(b + i);
 ^

ERROR: space prohibited after that '~' (ctx:OxW)
#453: FILE: accel/tcg/tcg-runtime-gvec.c:521:
+*(uint64_t *)(d + i) = *(uint64_t *)(a + i) |~ *(uint64_t *)(b + i);
  ^

ERROR: spaces required around that '==' (ctx:WxB)
#677: FILE: accel/tcg/tcg-runtime-gvec.c:897:
+DO_CMP1(gvec_eq##SZ, uint##SZ##_t, ==)\
^

ERROR: spaces required around that '!=' (ctx:WxB)
#678: FILE: accel/tcg/tcg-runtime-gvec.c:898:
+DO_CMP1(gvec_ne##SZ, uint##SZ##_t, !=)\
^

ERROR: spaces required around that '<' (ctx:WxB)
#679: FILE: accel/tcg/tcg-runtime-gvec.c:899:
+DO_CMP1(gvec_lt##SZ, int##SZ##_t, <)  \
   ^

ERROR: spaces required around that '<=' (ctx:WxB)
#680: FILE: accel/tcg/tcg-runtime-gvec.c:900:
+DO_CMP1(gvec_le##SZ, int##SZ##_t, <=) \
   ^

ERROR: spaces required around that '<' (ctx:WxB)
#681: FILE: accel/tcg/tcg-runtime-gvec.c:901:
+DO_CMP1(gvec_ltu##SZ, uint##SZ##_t, <)\
 ^

ERROR: spaces required around that '<=' (ctx:WxB)
#682: FILE: accel/tcg/tcg-runtime-gvec.c:902:
+DO_CMP1(gvec_leu##SZ, uint##SZ##_t, <=)
 ^

total: 10 errors, 0 warnings, 630 lines checked

Patch 3/5 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

4/5 Checking commit e0008a500fbb (tcg: Tidy tcg-runtime-gvec.c DUP*)
5/5 Checking commit 83eaadd6af23 (tcg: Remove tcg-runtime-gvec.c DO_CMP0)
ERROR: spaces required around that '*' (ctx:WxV)
#30: FILE: accel/tcg/tcg-runtime-gvec.c:869:
+*(TYPE *)(d + i) = -(*(TYPE *)(a + i) OP *(TYPE *)(b + i));\
  ^

total: 1 errors, 0 warnings, 23 lines checked

Patch 5/5 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200317190013.25036-1-richard.hender...@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-de...@redhat.com

[PULL 18/20] hw/ide: Do ide_drive_get() within pci_ide_create_devs()

[John Snow]

From: BALATON Zoltan 

The pci_ide_create_devs() function takes a hd_table parameter but all
callers just pass what ide_drive_get() returns so we can do it locally
simplifying callers and removing hd_table parameter.

Signed-off-by: BALATON Zoltan 
Reviewed-by: Mark Cave-Ayland 
Reviewed-by: Markus Armbruster 
Message-id: 
e9713fdded4d212fa68ed03b844e531934226a6f.1584457537.git.bala...@eik.bme.hu
Signed-off-by: John Snow 
---
 include/hw/ide/pci.h  |  2 +-
 include/hw/southbridge/piix.h |  3 +--
 hw/alpha/dp264.c  | 13 +++--
 hw/i386/pc_piix.c |  9 +
 hw/ide/pci.c  |  4 +++-
 hw/isa/piix4.c| 10 ++
 hw/mips/mips_fulong2e.c   |  4 +---
 hw/mips/mips_malta.c  |  2 +-
 hw/sparc64/sun4u.c|  6 +-
 9 files changed, 18 insertions(+), 35 deletions(-)

diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h
index 98ffa7dfcd..dd504e5a0b 100644
--- a/include/hw/ide/pci.h
+++ b/include/hw/ide/pci.h
@@ -63,7 +63,7 @@ static inline IDEState *bmdma_active_if(BMDMAState *bmdma)
 void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d);
 void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val);
 extern MemoryRegionOps bmdma_addr_ioport_ops;
-void pci_ide_create_devs(PCIDevice *dev, DriveInfo **hd_table);
+void pci_ide_create_devs(PCIDevice *dev);
 
 extern const VMStateDescription vmstate_ide_pci;
 extern const MemoryRegionOps pci_ide_cmd_le_ops;
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index 152628c6d9..02bd741209 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -68,7 +68,6 @@ extern PCIDevice *piix4_dev;
 
 PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus);
 
-DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus,
-  I2CBus **smbus, size_t ide_buses);
+DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus);
 
 #endif
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 27595767e5..f7751b18f6 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -15,7 +15,6 @@
 #include "qemu/error-report.h"
 #include "sysemu/sysemu.h"
 #include "hw/rtc/mc146818rtc.h"
-#include "hw/ide.h"
 #include "hw/ide/pci.h"
 #include "hw/timer/i8254.h"
 #include "hw/isa/superio.h"
@@ -58,6 +57,7 @@ static void clipper_init(MachineState *machine)
 const char *initrd_filename = machine->initrd_filename;
 AlphaCPU *cpus[4];
 PCIBus *pci_bus;
+PCIDevice *pci_dev;
 ISABus *isa_bus;
 qemu_irq rtc_irq;
 long size, i;
@@ -100,15 +100,8 @@ static void clipper_init(MachineState *machine)
 isa_create_simple(isa_bus, TYPE_SMC37C669_SUPERIO);
 
 /* IDE disk setup.  */
-{
-DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
-PCIDevice *pci_dev;
-
-ide_drive_get(hd, ARRAY_SIZE(hd));
-
-pci_dev = pci_create_simple(pci_bus, -1, "cmd646-ide");
-pci_ide_create_devs(pci_dev, hd);
-}
+pci_dev = pci_create_simple(pci_bus, -1, "cmd646-ide");
+pci_ide_create_devs(pci_dev);
 
 /* Load PALcode.  Given that this is not "real" cpu palcode,
but one explicitly written for the emulation, we might as
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index c399398739..9216596ec6 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -86,7 +86,6 @@ static void pc_init1(MachineState *machine,
 int piix3_devfn = -1;
 qemu_irq smi_irq;
 GSIState *gsi_state;
-DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 BusState *idebus[MAX_IDE_BUS];
 ISADevice *rtc_state;
 MemoryRegion *ram_memory;
@@ -240,20 +239,22 @@ static void pc_init1(MachineState *machine,
 
 pc_nic_init(pcmc, isa_bus, pci_bus);
 
-ide_drive_get(hd, ARRAY_SIZE(hd));
 if (pcmc->pci_enabled) {
 PCIDevice *dev;
 
 dev = pci_create_simple(pci_bus, piix3_devfn + 1,
 xen_enabled() ? "piix3-ide-xen" : "piix3-ide");
-pci_ide_create_devs(dev, hd);
+pci_ide_create_devs(dev);
 idebus[0] = qdev_get_child_bus(>qdev, "ide.0");
 idebus[1] = qdev_get_child_bus(>qdev, "ide.1");
 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
 }
 #ifdef CONFIG_IDE_ISA
-else {
+else {
+DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 int i;
+
+ide_drive_get(hd, ARRAY_SIZE(hd));
 for (i = 0; i < MAX_IDE_BUS; i++) {
 ISADevice *dev;
 char busname[] = "ide.0";
diff --git a/hw/ide/pci.c b/hw/ide/pci.c
index e0c84392e2..97347f07f1 100644
--- a/hw/ide/pci.c
+++ b/hw/ide/pci.c
@@ -477,13 +477,15 @@ const VMStateDescription vmstate_ide_pci = {
 };
 
 /* hd_table must contain 4 block drivers */
-void pci_ide_create_devs(PCIDevice *dev, DriveInfo **hd_table)
+void pci_ide_create_devs(PCIDevice *dev)
 {
 PCIIDEState *d = PCI_IDE(dev);
+DriveInfo *hd_table[2 * MAX_IDE_DEVS];
 static const int bus[4]  = { 0, 0, 1, 1 };
 static 

RE: [PATCH v7 00/13] APIC ID fixes for AMD EPYC CPU model

[Moger, Babu]

[AMD Official Use Only - Internal Distribution Only]

Ok. I am looking at it.

> -Original Message-
> From: Eduardo Habkost 
> Sent: Tuesday, March 17, 2020 6:22 PM
> To: Moger, Babu 
> Cc: marcel.apfelb...@gmail.com; pbonz...@redhat.com; r...@twiddle.net;
> m...@redhat.com; imamm...@redhat.com; qemu-devel@nongnu.org
> Subject: Re: [PATCH v7 00/13] APIC ID fixes for AMD EPYC CPU model
> 
> On Thu, Mar 12, 2020 at 11:28:47AM -0500, Babu Moger wrote:
> > Eduardo, Can you please queue the series if there are no concerns.
> > Thanks
> 
> I had queued it for today's pull request, but it looks like it
> breaks "make check".  See
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Ftravis-
> ci.org%2Fgithub%2Fehabkost%2Fqemu%2Fjobs%2F663529282data=02%7
> C01%7Cbabu.moger%40amd.com%7Ccf8b7161fda34176840208d7caca06af%7
> C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63720084136028&
> amp;sdata=qtBc13zinZ%2BGMT1a%2BniRJk6moGNzjgPWOJU42mL%2FZnM%3D
> reserved=0
> 
>   PASS 4 bios-tables-test /x86_64/acpi/piix4/ipmi
>   Could not access KVM kernel module: No such file or directory
>   qemu-system-x86_64: -accel kvm: failed to initialize kvm: No such file or
> directory
>   qemu-system-x86_64: falling back to tcg
>   qemu-system-x86_64: Invalid CPU [socket: 0, die: 0, core: 1, thread: 0] with
> APIC ID 1, valid index range 0:5
>   Broken pipe
>   /home/travis/build/ehabkost/qemu/tests/qtest/libqtest.c:166: kill_qemu() 
> tried
> to terminate QEMU process but encountered exit status 1 (expected 0)
>   Aborted (core dumped)
>   ERROR - too few tests run (expected 17, got 4)
>   /home/travis/build/ehabkost/qemu/tests/Makefile.include:633: recipe for
> target 'check-qtest-x86_64' failed
>   make: *** [check-qtest-x86_64] Error 1
> 
> 
> >
> > On 3/11/20 5:52 PM, Babu Moger wrote:
> > > This series fixes APIC ID encoding problem reported on AMD EPYC cpu
> models.
> > >
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.
> redhat.com%2Fshow_bug.cgi%3Fid%3D1728166data=02%7C01%7Cbabu.
> moger%40amd.com%7Ccf8b7161fda34176840208d7caca06af%7C3dd8961fe48
> 84e608e11a82d994e183d%7C0%7C0%7C63720084136028sdata=uH
> 3lQsaE99WjC1kJJbnF%2FLvi1HM3rUwesp67pci5UgE%3Dreserved=0
> > >
> > > Currently, the APIC ID is decoded based on the sequence
> > > sockets->dies->cores->threads. This works for most standard AMD and other
> > > vendors' configurations, but this decoding sequence does not follow that 
> > > of
> > > AMD's APIC ID enumeration strictly. In some cases this can cause CPU
> topology
> > > inconsistency.  When booting a guest VM, the kernel tries to validate the
> > > topology, and finds it inconsistent with the enumeration of EPYC cpu 
> > > models.
> > >
> > > To fix the problem we need to build the topology as per the Processor
> > > Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1
> > > Processors. The documentation is available from the bugzilla Link below.
> > >
> > > Link:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.
> kernel.org%2Fshow_bug.cgi%3Fid%3D206537data=02%7C01%7Cbabu.m
> oger%40amd.com%7Ccf8b7161fda34176840208d7caca06af%7C3dd8961fe4884
> e608e11a82d994e183d%7C0%7C0%7C63720084136028sdata=PECu
> xeA9RJ1Wgb5X2zjFqZHFlMQFxbU6n9PkuOvqtvA%3Dreserved=0
> > >
> > > Here is the text from the PPR.
> > > Operating systems are expected to use 
> > > Core::X86::Cpuid::SizeId[ApicIdSize],
> the
> > > number of least significant bits in the Initial APIC ID that indicate 
> > > core ID
> > > within a processor, in constructing per-core CPUID masks.
> > > Core::X86::Cpuid::SizeId[ApicIdSize] determines the maximum number of
> cores
> > > (MNC) that the processor could theoretically support, not the actual 
> > > number
> of
> > > cores that are actually implemented or enabled on the processor, as
> indicated
> > > by Core::X86::Cpuid::SizeId[NC].
> > > Each Core::X86::Apic::ApicId[ApicId] register is preset as follows:
> > > • ApicId[6] = Socket ID.
> > > • ApicId[5:4] = Node ID.
> > > • ApicId[3] = Logical CCX L3 complex ID
> > > • ApicId[2:0]= (SMT) ? {LogicalCoreID[1:0],ThreadId} :
> {1'b0,LogicalCoreID[1:0]}
> > >
> > > v7:
> > >  Generated the patches on top of git://github.com/ehabkost/qemu.git (x86-
> next).
> > >  Changes from v6.
> > >  1. Added new function x86_set_epyc_topo_handlers to override the apic id
> > > encoding handlers.
> > >  2. Separated the code to set use_epyc_apic_id_encoding and added as a
> new patch
> > > as it looked more logical.
> > >  3. Fixed minor typos.
> > >
> > > v6:
> > >
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.ker
> nel.org%2Fqemu-
> devel%2F158389385028.22020.7608244627303132902.stgit%40naples-
> babu.amd.com%2Fdata=02%7C01%7Cbabu.moger%40amd.com%7Ccf8b
> 7161fda34176840208d7caca06af%7C3dd8961fe4884e608e11a82d994e183d%7
> C0%7C0%7C63720084136028sdata=NmsbgY6609%2Bi2V7K310dihj%
> 2BfAQgoq1F%2Bgs%2BtMkpw1E%3Dreserved=0
> > >  Generated 

Re: [PATCH 04/11] MAINTAINERS: Add an entry for the HVF accelerator

[Cameron Esfahani via]

Sorry I didn't see this yesterday.

We've (Apple) signed up for taking over HVF ownership.  I didn't realize I 
needed to add to the MAINTAINERS list.

Roman, we also have a bunch of pending fixes for some of the issues you've 
listed.  We're in the process of upstreaming them.

Cameron Esfahani
di...@apple.com

"All that is necessary for the triumph of evil is that good men do nothing."

Edmund Burke



> On Mar 16, 2020, at 5:12 AM, Roman Bolshakov  wrote:
> 
> Hi Philippe,
> 
> I can take the ownership if nobody wants it. At the moment I'm working
> on APIC for HVF to get kvm-unit-tests fixed.
> 
> Next items on the list (in no particular order):
> * MMX emulation
> * SSE emulation
> * qxl display
> * gdb stub
> * virtio-gpu/virgil running on metal
> * VFIO-PCI based on macOS user-space DriverKit framework
> 
> Best regards,
> Roman
> 
> On Mon, Mar 16, 2020 at 01:00:42PM +0100, Philippe Mathieu-Daudé wrote:
>> Signed-off-by: Philippe Mathieu-Daudé 
>> ---
>> Cc: Reviewed-by: Nikita Leshenko 
>> Cc: Sergio Andres Gomez Del Real 
>> Cc: Roman Bolshakov 
>> Cc: Patrick Colp 
>> Cc: Cameron Esfahani 
>> Cc: Liran Alon 
>> Cc: Heiher 
>> ---
>> MAINTAINERS | 6 ++
>> 1 file changed, 6 insertions(+)
>> 
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 7ec42a18f7..bcf40afb85 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -420,6 +420,12 @@ F: accel/stubs/hax-stub.c
>> F: target/i386/hax-all.c
>> F: include/sysemu/hax.h
>> 
>> +HVF Accelerator
>> +S: Orphan
>> +F: accel/stubs/hvf-stub.c
>> +F: target/i386/hvf/hvf.c
>> +F: include/sysemu/hvf.h
>> +
>> WHPX CPUs
>> M: Sunil Muthuswamy 
>> S: Supported
>> -- 
>> 2.21.1
>> 
> 

[PULL 15/20] hw/ide: Get rid of piix4_init function

[John Snow]

From: BALATON Zoltan 

This removes pci_piix4_ide_init() function similar to clean up done to
other ide devices.

Signed-off-by: BALATON Zoltan 
Reviewed-by: Mark Cave-Ayland 
Reviewed-by: Markus Armbruster 
Message-id: 
fe46b6536abbae77695f6d1c711a04a3f4b5481d.1584457537.git.bala...@eik.bme.hu
Signed-off-by: John Snow 
---
 include/hw/ide.h |  1 -
 hw/ide/piix.c| 12 +---
 hw/isa/piix4.c   |  4 +++-
 3 files changed, 4 insertions(+), 13 deletions(-)

diff --git a/include/hw/ide.h b/include/hw/ide.h
index 883bbaeb9b..21bd8f23f1 100644
--- a/include/hw/ide.h
+++ b/include/hw/ide.h
@@ -12,7 +12,6 @@ ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, 
int isairq,
 DriveInfo *hd0, DriveInfo *hd1);
 
 /* ide-pci.c */
-PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
 int pci_piix3_xen_ide_unplug(DeviceState *dev, bool aux);
 
 /* ide-mmio.c */
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index 8bcd6b72c2..3b2de4c312 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -208,17 +208,6 @@ static void pci_piix_ide_exitfn(PCIDevice *dev)
 }
 }
 
-/* hd_table must contain 4 block drivers */
-/* NOTE: for the PIIX4, the IRQs and IOports are hardcoded */
-PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn)
-{
-PCIDevice *dev;
-
-dev = pci_create_simple(bus, devfn, "piix4-ide");
-pci_ide_create_devs(dev, hd_table);
-return dev;
-}
-
 /* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
 static void piix3_ide_class_init(ObjectClass *klass, void *data)
 {
@@ -247,6 +236,7 @@ static const TypeInfo piix3_ide_xen_info = {
 .class_init= piix3_ide_class_init,
 };
 
+/* NOTE: for the PIIX4, the IRQs and IOports are hardcoded */
 static void piix4_ide_class_init(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 2cbdcd7700..706eb5be69 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -35,6 +35,7 @@
 #include "hw/timer/i8254.h"
 #include "hw/rtc/mc146818rtc.h"
 #include "hw/ide.h"
+#include "hw/ide/pci.h"
 #include "migration/vmstate.h"
 #include "sysemu/reset.h"
 #include "sysemu/runstate.h"
@@ -256,9 +257,10 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus 
**isa_bus,
 *isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
 }
 
+pci = pci_create_simple(pci_bus, devfn + 1, "piix4-ide");
 hd = g_new(DriveInfo *, ide_drives);
 ide_drive_get(hd, ide_drives);
-pci_piix4_ide_init(pci_bus, hd, devfn + 1);
+pci_ide_create_devs(pci, hd);
 g_free(hd);
 
 pci_create_simple(pci_bus, devfn + 2, "piix4-usb-uhci");
-- 
2.21.1

[PULL 20/20] hw/ide: Remove unneeded inclusion of hw/ide.h

[John Snow]

From: BALATON Zoltan 

After previous clean ups we can drop direct inclusion of hw/ide.h from
several places.

Signed-off-by: BALATON Zoltan 
Reviewed-by: Mark Cave-Ayland 
Reviewed-by: Markus Armbruster 
Message-id: 
a3f72b663e537701c63cec5fc9cb8ed4f4249f28.1584457537.git.bala...@eik.bme.hu
Signed-off-by: John Snow 
---
 hw/hppa/hppa_sys.h  | 1 -
 hw/hppa/machine.c   | 1 -
 hw/i386/pc_piix.c   | 1 -
 hw/isa/piix4.c  | 1 -
 hw/mips/mips_fulong2e.c | 1 -
 hw/ppc/mac_newworld.c   | 1 -
 hw/ppc/mac_oldworld.c   | 1 -
 hw/ppc/prep.c   | 1 -
 8 files changed, 8 deletions(-)

diff --git a/hw/hppa/hppa_sys.h b/hw/hppa/hppa_sys.h
index 4d08501464..0b18271cc9 100644
--- a/hw/hppa/hppa_sys.h
+++ b/hw/hppa/hppa_sys.h
@@ -5,7 +5,6 @@
 
 #include "hw/pci/pci.h"
 #include "hw/pci/pci_host.h"
-#include "hw/ide.h"
 #include "hw/boards.h"
 #include "hw/intc/i8259.h"
 
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 9175f4b790..00dd9f58d6 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -13,7 +13,6 @@
 #include "sysemu/reset.h"
 #include "sysemu/sysemu.h"
 #include "hw/rtc/mc146818rtc.h"
-#include "hw/ide.h"
 #include "hw/timer/i8254.h"
 #include "hw/char/serial.h"
 #include "hw/net/lasi_82596.h"
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 9216596ec6..e6756216f9 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -38,7 +38,6 @@
 #include "hw/pci/pci_ids.h"
 #include "hw/usb.h"
 #include "net/net.h"
-#include "hw/ide.h"
 #include "hw/ide/pci.h"
 #include "hw/irq.h"
 #include "sysemu/kvm.h"
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index cc3e5cef8c..9a10fb9b3c 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -34,7 +34,6 @@
 #include "hw/dma/i8257.h"
 #include "hw/timer/i8254.h"
 #include "hw/rtc/mc146818rtc.h"
-#include "hw/ide.h"
 #include "hw/ide/pci.h"
 #include "migration/vmstate.h"
 #include "sysemu/reset.h"
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 0f312b5a35..5040afd581 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -36,7 +36,6 @@
 #include "audio/audio.h"
 #include "qemu/log.h"
 #include "hw/loader.h"
-#include "hw/ide.h"
 #include "hw/ide/pci.h"
 #include "elf.h"
 #include "hw/isa/vt82c686.h"
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index b8189bf7a4..13164ee9d7 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -62,7 +62,6 @@
 #include "hw/char/escc.h"
 #include "hw/misc/macio/macio.h"
 #include "hw/ppc/openpic.h"
-#include "hw/ide.h"
 #include "hw/loader.h"
 #include "hw/fw-path-provider.h"
 #include "elf.h"
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 440c406eb4..2d419d82fa 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -41,7 +41,6 @@
 #include "hw/nvram/fw_cfg.h"
 #include "hw/char/escc.h"
 #include "hw/misc/macio/macio.h"
-#include "hw/ide.h"
 #include "hw/loader.h"
 #include "hw/fw-path-provider.h"
 #include "elf.h"
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 111cc80867..44be9d25a2 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -37,7 +37,6 @@
 #include "hw/boards.h"
 #include "qemu/error-report.h"
 #include "qemu/log.h"
-#include "hw/ide.h"
 #include "hw/irq.h"
 #include "hw/loader.h"
 #include "hw/rtc/mc146818rtc.h"
-- 
2.21.1

[PULL 17/20] hw/ide/pci.c: Coding style update to fix checkpatch errors

[John Snow]

From: BALATON Zoltan 

Spaces are required around a + operator and if statements should have
braces even for single line. Also make it simpler by reversing the
condition instead of breaking the loop.

Signed-off-by: BALATON Zoltan 
Reviewed-by: Mark Cave-Ayland 
Reviewed-by: Philippe Mathieu-Daudé 
Reviewed-by: Markus Armbruster 
Message-id: 
0d50336ab26a56240c8c17ca1ec6135a4092fcc9.1584457537.git.bala...@eik.bme.hu
Signed-off-by: John Snow 
---
 hw/ide/pci.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/ide/pci.c b/hw/ide/pci.c
index 4fc76c5225..e0c84392e2 100644
--- a/hw/ide/pci.c
+++ b/hw/ide/pci.c
@@ -485,9 +485,9 @@ void pci_ide_create_devs(PCIDevice *dev, DriveInfo 
**hd_table)
 int i;
 
 for (i = 0; i < 4; i++) {
-if (hd_table[i] == NULL)
-continue;
-ide_create_drive(d->bus+bus[i], unit[i], hd_table[i]);
+if (hd_table[i]) {
+ide_create_drive(d->bus + bus[i], unit[i], hd_table[i]);
+}
 }
 }
 
-- 
2.21.1

[PULL 13/20] hw/ide: Get rid of piix3_init functions

[John Snow]

From: BALATON Zoltan 

This removes pci_piix3_ide_init() and pci_piix3_xen_ide_init()
functions similar to clean up done to other ide devices.

Signed-off-by: BALATON Zoltan 
Reviewed-by: Mark Cave-Ayland 
Reviewed-by: Philippe Mathieu-Daudé 
Reviewed-by: Markus Armbruster 
Message-id: 
adddfa21552783020d64e1314318cab6d24362c3.1584457537.git.bala...@eik.bme.hu
Signed-off-by: John Snow 
---
 include/hw/ide.h  |  2 --
 hw/i386/pc_piix.c | 10 +-
 hw/ide/pci.c  |  1 +
 hw/ide/piix.c | 21 +
 4 files changed, 7 insertions(+), 27 deletions(-)

diff --git a/include/hw/ide.h b/include/hw/ide.h
index dea0ecf5be..883bbaeb9b 100644
--- a/include/hw/ide.h
+++ b/include/hw/ide.h
@@ -12,8 +12,6 @@ ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, 
int isairq,
 DriveInfo *hd0, DriveInfo *hd1);
 
 /* ide-pci.c */
-PCIDevice *pci_piix3_xen_ide_init(PCIBus *bus, DriveInfo **hd_table, int 
devfn);
-PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
 PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
 int pci_piix3_xen_ide_unplug(DeviceState *dev, bool aux);
 
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index e2d98243bc..c399398739 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -39,6 +39,7 @@
 #include "hw/usb.h"
 #include "net/net.h"
 #include "hw/ide.h"
+#include "hw/ide/pci.h"
 #include "hw/irq.h"
 #include "sysemu/kvm.h"
 #include "hw/kvm/clock.h"
@@ -242,11 +243,10 @@ static void pc_init1(MachineState *machine,
 ide_drive_get(hd, ARRAY_SIZE(hd));
 if (pcmc->pci_enabled) {
 PCIDevice *dev;
-if (xen_enabled()) {
-dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
-} else {
-dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
-}
+
+dev = pci_create_simple(pci_bus, piix3_devfn + 1,
+xen_enabled() ? "piix3-ide-xen" : "piix3-ide");
+pci_ide_create_devs(dev, hd);
 idebus[0] = qdev_get_child_bus(>qdev, "ide.0");
 idebus[1] = qdev_get_child_bus(>qdev, "ide.1");
 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
diff --git a/hw/ide/pci.c b/hw/ide/pci.c
index 1a6a287e76..4fc76c5225 100644
--- a/hw/ide/pci.c
+++ b/hw/ide/pci.c
@@ -476,6 +476,7 @@ const VMStateDescription vmstate_ide_pci = {
 }
 };
 
+/* hd_table must contain 4 block drivers */
 void pci_ide_create_devs(PCIDevice *dev, DriveInfo **hd_table)
 {
 PCIIDEState *d = PCI_IDE(dev);
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index bc575b4d70..8bcd6b72c2 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -197,15 +197,6 @@ int pci_piix3_xen_ide_unplug(DeviceState *dev, bool aux)
 return 0;
 }
 
-PCIDevice *pci_piix3_xen_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn)
-{
-PCIDevice *dev;
-
-dev = pci_create_simple(bus, devfn, "piix3-ide-xen");
-pci_ide_create_devs(dev, hd_table);
-return dev;
-}
-
 static void pci_piix_ide_exitfn(PCIDevice *dev)
 {
 PCIIDEState *d = PCI_IDE(dev);
@@ -217,17 +208,6 @@ static void pci_piix_ide_exitfn(PCIDevice *dev)
 }
 }
 
-/* hd_table must contain 4 block drivers */
-/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
-PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn)
-{
-PCIDevice *dev;
-
-dev = pci_create_simple(bus, devfn, "piix3-ide");
-pci_ide_create_devs(dev, hd_table);
-return dev;
-}
-
 /* hd_table must contain 4 block drivers */
 /* NOTE: for the PIIX4, the IRQs and IOports are hardcoded */
 PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn)
@@ -239,6 +219,7 @@ PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo 
**hd_table, int devfn)
 return dev;
 }
 
+/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
 static void piix3_ide_class_init(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
-- 
2.21.1

[PULL 19/20] hw/ide: Move MAX_IDE_DEVS define to hw/ide/internal.h

[John Snow]

From: BALATON Zoltan 

We can move this define now that less files use it to internal.h to
further reduce dependency on hw/ide.h.

Signed-off-by: BALATON Zoltan 
Reviewed-by: Mark Cave-Ayland 
Reviewed-by: Markus Armbruster 
Message-id: 
e68675d2f6252f229cf788b7cd163bb76fa3e26b.1584457537.git.bala...@eik.bme.hu
Signed-off-by: John Snow 
---
 include/hw/ide.h  | 2 --
 include/hw/ide/internal.h | 2 ++
 hw/mips/mips_r4k.c| 1 +
 3 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/hw/ide.h b/include/hw/ide.h
index d52c211f32..c5ce5da4f4 100644
--- a/include/hw/ide.h
+++ b/include/hw/ide.h
@@ -4,8 +4,6 @@
 #include "hw/isa/isa.h"
 #include "exec/memory.h"
 
-#define MAX_IDE_DEVS   2
-
 /* ide-isa.c */
 ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, int isairq,
 DriveInfo *hd0, DriveInfo *hd1);
diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h
index 1bc1fc73e5..55da35d768 100644
--- a/include/hw/ide/internal.h
+++ b/include/hw/ide/internal.h
@@ -27,6 +27,8 @@ typedef struct IDEDMAOps IDEDMAOps;
 #define TYPE_IDE_BUS "IDE"
 #define IDE_BUS(obj) OBJECT_CHECK(IDEBus, (obj), TYPE_IDE_BUS)
 
+#define MAX_IDE_DEVS 2
+
 /* Bits of HD_STATUS */
 #define ERR_STAT   0x01
 #define INDEX_STAT 0x02
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index ad8b75e286..3487013a4a 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -26,6 +26,7 @@
 #include "qemu/log.h"
 #include "hw/mips/bios.h"
 #include "hw/ide.h"
+#include "hw/ide/internal.h"
 #include "hw/loader.h"
 #include "elf.h"
 #include "hw/rtc/mc146818rtc.h"
-- 
2.21.1

[PULL 16/20] hw/ide: Remove now unneded #include "hw/pci/pci.h" from hw/ide.h

[John Snow]

From: BALATON Zoltan 

After previous patches we don't need hw/pci/pci.h any more in
hw/ide.h. Some files depended on implicit inclusion by this header
which are also fixed up here.

Signed-off-by: BALATON Zoltan 
Reviewed-by: Mark Cave-Ayland 
Reviewed-by: Philippe Mathieu-Daudé 
Reviewed-by: Markus Armbruster 
Message-id: 
444a5e34331bf1f7880541b8d46e0353f470f5a6.1584457537.git.bala...@eik.bme.hu
Signed-off-by: John Snow 
---
 hw/ide/ahci_internal.h| 1 +
 include/hw/ide.h  | 1 -
 include/hw/ide/pci.h  | 1 +
 include/hw/misc/macio/macio.h | 1 +
 4 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/hw/ide/ahci_internal.h b/hw/ide/ahci_internal.h
index 73424516da..bab0459774 100644
--- a/hw/ide/ahci_internal.h
+++ b/hw/ide/ahci_internal.h
@@ -27,6 +27,7 @@
 #include "hw/ide/ahci.h"
 #include "hw/ide/internal.h"
 #include "hw/sysbus.h"
+#include "hw/pci/pci.h"
 
 #define AHCI_MEM_BAR_SIZE 0x1000
 #define AHCI_MAX_PORTS32
diff --git a/include/hw/ide.h b/include/hw/ide.h
index 21bd8f23f1..d52c211f32 100644
--- a/include/hw/ide.h
+++ b/include/hw/ide.h
@@ -2,7 +2,6 @@
 #define HW_IDE_H
 
 #include "hw/isa/isa.h"
-#include "hw/pci/pci.h"
 #include "exec/memory.h"
 
 #define MAX_IDE_DEVS   2
diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h
index a9f2c33e68..98ffa7dfcd 100644
--- a/include/hw/ide/pci.h
+++ b/include/hw/ide/pci.h
@@ -2,6 +2,7 @@
 #define HW_IDE_PCI_H
 
 #include "hw/ide/internal.h"
+#include "hw/pci/pci.h"
 
 #define BM_STATUS_DMAING 0x01
 #define BM_STATUS_ERROR  0x02
diff --git a/include/hw/misc/macio/macio.h b/include/hw/misc/macio/macio.h
index 070a694eb5..87335a991c 100644
--- a/include/hw/misc/macio/macio.h
+++ b/include/hw/misc/macio/macio.h
@@ -27,6 +27,7 @@
 #define MACIO_H
 
 #include "hw/char/escc.h"
+#include "hw/pci/pci.h"
 #include "hw/ide/internal.h"
 #include "hw/intc/heathrow_pic.h"
 #include "hw/misc/macio/cuda.h"
-- 
2.21.1

[PULL 14/20] hw/isa/piix4.c: Introduce variable to store devfn

[John Snow]

From: BALATON Zoltan 

To avoid any problem with reassigning pci variable store devfn in a
variable instead of acessing it from the PCIDevice.

Signed-off-by: BALATON Zoltan 
Reviewed-by: Philippe Mathieu-Daudé 
Message-id: 
1020e0bfcfc6e364f967ccb2a9a3778ac174ccbe.1584457537.git.bala...@eik.bme.hu
Signed-off-by: John Snow 
---
 hw/isa/piix4.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 7edec5e149..2cbdcd7700 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -247,9 +247,10 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus 
**isa_bus,
 DriveInfo **hd;
 PCIDevice *pci;
 DeviceState *dev;
+int devfn = PCI_DEVFN(10, 0);
 
-pci = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0),
-  true, TYPE_PIIX4_PCI_DEVICE);
+pci = pci_create_simple_multifunction(pci_bus, devfn,  true,
+  TYPE_PIIX4_PCI_DEVICE);
 dev = DEVICE(pci);
 if (isa_bus) {
 *isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
@@ -257,11 +258,12 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus 
**isa_bus,
 
 hd = g_new(DriveInfo *, ide_drives);
 ide_drive_get(hd, ide_drives);
-pci_piix4_ide_init(pci_bus, hd, pci->devfn + 1);
+pci_piix4_ide_init(pci_bus, hd, devfn + 1);
 g_free(hd);
-pci_create_simple(pci_bus, pci->devfn + 2, "piix4-usb-uhci");
+
+pci_create_simple(pci_bus, devfn + 2, "piix4-usb-uhci");
 if (smbus) {
-*smbus = piix4_pm_init(pci_bus, pci->devfn + 3, 0x1100,
+*smbus = piix4_pm_init(pci_bus, devfn + 3, 0x1100,
isa_get_irq(NULL, 9), NULL, 0, NULL);
}
 
-- 
2.21.1

[PULL 09/20] via-ide: initialise IDE controller in legacy mode

[John Snow]

From: Mark Cave-Ayland 

According to both the VT82C686B and VT8231 datasheets the VIA Southbridge IDE
controller is initialised in legacy mode.

This allows Linux to correctly determine that legacy rather than PCI IRQ routing
should be used since the boot console text in the fulong2e test image changes 
from:

scsi0 : pata_via
scsi1 : pata_via
ata1: PATA max UDMA/100 cmd 0xbfd04050 ctl 0xbfd04062 \
  bmdma 0xbfd04040 irq 14
ata2: PATA max UDMA/100 cmd 0xbfd04058 ctl 0xbfd04066 \
  bmdma 0xbfd04048 irq 14

to:

scsi0 : pata_via
scsi1 : pata_via
ata1: PATA max UDMA/100 cmd 0xbfd001f0 ctl 0xbfd003f6 \
  bmdma 0xbfd04040 irq 14
ata2: PATA max UDMA/100 cmd 0xbfd00170 ctl 0xbfd00376 \
  bmdma 0xbfd04048 irq 15

Signed-off-by: Mark Cave-Ayland 
Tested-by: BALATON Zoltan 
Signed-off-by: BALATON Zoltan 
Message-id: 20200313082444.2439-6-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow 
---
 hw/ide/via.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/ide/via.c b/hw/ide/via.c
index 8363bd4802..c8835de01b 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -167,7 +167,7 @@ static void via_ide_realize(PCIDevice *dev, Error **errp)
 uint8_t *pci_conf = dev->config;
 int i;
 
-pci_config_set_prog_interface(pci_conf, 0x8f); /* native PCI ATA mode */
+pci_config_set_prog_interface(pci_conf, 0x8a); /* legacy mode */
 pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x00c0);
 dev->wmask[PCI_INTERRUPT_LINE] = 0;
 
-- 
2.21.1

[PULL 12/20] hd-geo-test: Clean up use of buf[] in create_qcow2_with_mbr()

[John Snow]

From: Markus Armbruster 

valgrind reports write unitialized bytes from buf[].  Clear them.

ASan reports we store to misaligned address in buf[].  Use stl_le_p()
for that.

Cc: Sam Eiderman 
Cc: John Snow 
Signed-off-by: Markus Armbruster 
Reviewed-by: Philippe Mathieu-Daudé 
Message-id: 20200317092354.31831-1-arm...@redhat.com
Signed-off-by: John Snow 
---
 tests/qtest/hd-geo-test.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tests/qtest/hd-geo-test.c b/tests/qtest/hd-geo-test.c
index a249800544..48e8e02d6e 100644
--- a/tests/qtest/hd-geo-test.c
+++ b/tests/qtest/hd-geo-test.c
@@ -421,7 +421,7 @@ static char *create_qcow2_with_mbr(MBRpartitions mbr, 
uint64_t sectors)
 char *raw_path = strdup(template);
 char *qcow2_path = strdup(template);
 char cmd[100 + 2 * PATH_MAX];
-uint8_t buf[512];
+uint8_t buf[512] = {};
 int i, ret, fd, offset;
 uint64_t qcow2_size = sectors * 512;
 uint8_t status, parttype, head, sector, cyl;
@@ -457,8 +457,8 @@ static char *create_qcow2_with_mbr(MBRpartitions mbr, 
uint64_t sectors)
 buf[offset + 0x6] = sector;
 buf[offset + 0x7] = cyl;
 
-(*(uint32_t *)[offset + 0x8]) = cpu_to_le32(mbr[i].start_sect);
-(*(uint32_t *)[offset + 0xc]) = cpu_to_le32(mbr[i].nr_sects);
+stl_le_p([offset + 0x8], mbr[i].start_sect);
+stl_le_p([offset + 0xc], mbr[i].nr_sects);
 
 offset += 0x10;
 }
-- 
2.21.1

[PULL 07/20] pci: Honour wmask when resetting PCI_INTERRUPT_LINE

[John Snow]

From: BALATON Zoltan 

The pci_do_device_reset() function (called from pci_device_reset)
clears the PCI_INTERRUPT_LINE config reg of devices on the bus but did
this without taking wmask into account. We'll have a device model now
that needs to set a constant value for this reg and this patch allows
to do that without additional workaround in device emulation to
reverse the effect of this PCI bus reset function.

Suggested-by: Mark Cave-Ayland 
Signed-off-by: BALATON Zoltan 
Reviewed-by: Michael S. Tsirkin 
Reviewed-by: Mark Cave-Ayland 
Tested-by: BALATON Zoltan 
Signed-off-by: Mark Cave-Ayland 
Message-id: 20200313082444.2439-4-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow 
---
 hw/pci/pci.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index e1ed6677e1..b5bc842fac 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -302,8 +302,11 @@ static void pci_do_device_reset(PCIDevice *dev)
 pci_word_test_and_clear_mask(dev->config + PCI_STATUS,
  pci_get_word(dev->wmask + PCI_STATUS) |
  pci_get_word(dev->w1cmask + PCI_STATUS));
+/* Some devices make bits of PCI_INTERRUPT_LINE read only */
+pci_byte_test_and_clear_mask(dev->config + PCI_INTERRUPT_LINE,
+  pci_get_word(dev->wmask + PCI_INTERRUPT_LINE) |
+  pci_get_word(dev->w1cmask + PCI_INTERRUPT_LINE));
 dev->config[PCI_CACHE_LINE_SIZE] = 0x0;
-dev->config[PCI_INTERRUPT_LINE] = 0x0;
 for (r = 0; r < PCI_NUM_REGIONS; ++r) {
 PCIIORegion *region = >io_regions[r];
 if (!region->size) {
-- 
2.21.1

[PULL 10/20] via-ide: allow guests to write to PCI_CLASS_PROG

[John Snow]

From: Mark Cave-Ayland 

MorphOS writes to PCI_CLASS_PROG during IDE initialisation to place the
controller in native mode, but thinks the initialisation has failed
because the native mode bits aren't set when reading the register back.

Signed-off-by: Mark Cave-Ayland 
Tested-by: BALATON Zoltan 
Signed-off-by: BALATON Zoltan 
Message-id: 20200313082444.2439-7-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow 
---
 hw/ide/via.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/ide/via.c b/hw/ide/via.c
index c8835de01b..3c4d474e48 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -170,6 +170,7 @@ static void via_ide_realize(PCIDevice *dev, Error **errp)
 pci_config_set_prog_interface(pci_conf, 0x8a); /* legacy mode */
 pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x00c0);
 dev->wmask[PCI_INTERRUPT_LINE] = 0;
+dev->wmask[PCI_CLASS_PROG] = 5;
 
 memory_region_init_io(>data_bar[0], OBJECT(d), _ide_data_le_ops,
   >bus[0], "via-ide0-data", 8);
-- 
2.21.1

[PULL 06/20] ide/via: Get rid of via_ide_init()

[John Snow]

From: BALATON Zoltan 

Follow example of CMD646 and remove via_ide_init function and do it
directly in board code instead.

Signed-off-by: BALATON Zoltan 
Reviewed-by: Mark Cave-Ayland 
Tested-by: BALATON Zoltan 
Signed-off-by: Mark Cave-Ayland 
Message-id: 20200313082444.2439-3-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow 
---
 include/hw/ide.h| 1 -
 hw/ide/via.c| 8 
 hw/mips/mips_fulong2e.c | 5 -
 3 files changed, 4 insertions(+), 10 deletions(-)

diff --git a/include/hw/ide.h b/include/hw/ide.h
index 0c7080ed92..dea0ecf5be 100644
--- a/include/hw/ide.h
+++ b/include/hw/ide.h
@@ -16,7 +16,6 @@ PCIDevice *pci_piix3_xen_ide_init(PCIBus *bus, DriveInfo 
**hd_table, int devfn);
 PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
 PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
 int pci_piix3_xen_ide_unplug(DeviceState *dev, bool aux);
-void via_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
 
 /* ide-mmio.c */
 void mmio_ide_init_drives(DeviceState *dev, DriveInfo *hd0, DriveInfo *hd1);
diff --git a/hw/ide/via.c b/hw/ide/via.c
index 84f0efff94..3153be8862 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -211,14 +211,6 @@ static void via_ide_exitfn(PCIDevice *dev)
 }
 }
 
-void via_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn)
-{
-PCIDevice *dev;
-
-dev = pci_create_simple(bus, devfn, "via-ide");
-pci_ide_create_devs(dev, hd_table);
-}
-
 static void via_ide_class_init(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 4727b1d3a4..639ba2a091 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -37,6 +37,7 @@
 #include "qemu/log.h"
 #include "hw/loader.h"
 #include "hw/ide.h"
+#include "hw/ide/pci.h"
 #include "elf.h"
 #include "hw/isa/vt82c686.h"
 #include "hw/rtc/mc146818rtc.h"
@@ -239,6 +240,7 @@ static void vt82c686b_southbridge_init(PCIBus *pci_bus, int 
slot, qemu_irq intc,
 qemu_irq *i8259;
 ISABus *isa_bus;
 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
+PCIDevice *dev;
 
 isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0));
 if (!isa_bus) {
@@ -256,8 +258,9 @@ static void vt82c686b_southbridge_init(PCIBus *pci_bus, int 
slot, qemu_irq intc,
 /* Super I/O */
 isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
 
+dev = pci_create_simple(pci_bus, PCI_DEVFN(slot, 1), "via-ide");
 ide_drive_get(hd, ARRAY_SIZE(hd));
-via_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1));
+pci_ide_create_devs(dev, hd);
 
 pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
 pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
-- 
2.21.1

[PULL 11/20] via-ide: always use legacy IRQ 14/15 routing

[John Snow]

From: Mark Cave-Ayland 

The existing code uses fixed PCI IRQ routing on IRQ 14 rather than legacy IRQ
14/15 routing as documented in the datasheet.

With the changes in this patchset guest OSs now correctly detect and configure
the VIA controller in legacy IRQ routing mode, allowing the incorrect fixed
PCI IRQ routing to be removed.

Note that this fixed legacy IRQ 14/15 routing is identical to similar behaviour
in the early PIIX IDE controllers.

Signed-off-by: Mark Cave-Ayland 
Tested-by: BALATON Zoltan 
Signed-off-by: BALATON Zoltan 
Message-id: 20200313082444.2439-8-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow 
---
 hw/ide/via.c | 5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/hw/ide/via.c b/hw/ide/via.c
index 3c4d474e48..8de4945cc1 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -113,10 +113,7 @@ static void via_ide_set_irq(void *opaque, int n, int level)
 }
 
 level = (d->config[0x70] & 0x80) || (d->config[0x78] & 0x80);
-n = pci_get_byte(d->config + PCI_INTERRUPT_LINE);
-if (n) {
-qemu_set_irq(isa_get_irq(NULL, n), level);
-}
+qemu_set_irq(isa_get_irq(NULL, 14 + n), level);
 }
 
 static void via_ide_reset(DeviceState *dev)
-- 
2.21.1

[PULL 05/20] via-ide: move registration of VMStateDescription to DeviceClass

[John Snow]

From: Mark Cave-Ayland 

Signed-off-by: Mark Cave-Ayland 
Reviewed-by: Philippe Mathieu-Daudé 
Tested-by: BALATON Zoltan 
Message-id: 20200313082444.2439-2-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow 
---
 hw/ide/via.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/hw/ide/via.c b/hw/ide/via.c
index 096de8dba0..84f0efff94 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -190,8 +190,6 @@ static void via_ide_realize(PCIDevice *dev, Error **errp)
 bmdma_setup_bar(d);
 pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, >bmdma_bar);
 
-vmstate_register(VMSTATE_IF(dev), 0, _ide_pci, d);
-
 for (i = 0; i < 2; i++) {
 ide_bus_new(>bus[i], sizeof(d->bus[i]), DEVICE(d), i, 2);
 ide_init2(>bus[i], qemu_allocate_irq(via_ide_set_irq, d, i));
@@ -227,6 +225,7 @@ static void via_ide_class_init(ObjectClass *klass, void 
*data)
 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 
 dc->reset = via_ide_reset;
+dc->vmsd = _ide_pci;
 k->realize = via_ide_realize;
 k->exit = via_ide_exitfn;
 k->vendor_id = PCI_VENDOR_ID_VIA;
-- 
2.21.1

[PULL 08/20] via-ide: ensure that PCI_INTERRUPT_LINE is hard-wired to its default value

[John Snow]

From: Mark Cave-Ayland 

Some firmwares accidentally write to PCI_INTERRUPT_LINE on startup which has
no effect on real hardware since it is hard-wired to its default value, but
causes the guest OS to become confused trying to initialise IDE devices
when running under QEMU.

Signed-off-by: Mark Cave-Ayland 
Tested-by: BALATON Zoltan 
Signed-off-by: BALATON Zoltan 
Message-id: 20200313082444.2439-5-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow 
---
 hw/ide/via.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/ide/via.c b/hw/ide/via.c
index 3153be8862..8363bd4802 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -169,7 +169,7 @@ static void via_ide_realize(PCIDevice *dev, Error **errp)
 
 pci_config_set_prog_interface(pci_conf, 0x8f); /* native PCI ATA mode */
 pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x00c0);
-dev->wmask[PCI_INTERRUPT_LINE] = 0xf;
+dev->wmask[PCI_INTERRUPT_LINE] = 0;
 
 memory_region_init_io(>data_bar[0], OBJECT(d), _ide_data_le_ops,
   >bus[0], "via-ide0-data", 8);
-- 
2.21.1

[PULL 04/20] cmd646: remove unused pci_cmd646_ide_init() function

[John Snow]

From: Mark Cave-Ayland 

Signed-off-by: Mark Cave-Ayland 
Reviewed-by: Richard Henderson 
Reviewed-by: Philippe Mathieu-Daudé 
Message-id: 20200307091313.24190-3-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow 
---
 include/hw/ide.h |  2 --
 hw/ide/cmd646.c  | 12 
 2 files changed, 14 deletions(-)

diff --git a/include/hw/ide.h b/include/hw/ide.h
index 28d8a06439..0c7080ed92 100644
--- a/include/hw/ide.h
+++ b/include/hw/ide.h
@@ -12,8 +12,6 @@ ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, 
int isairq,
 DriveInfo *hd0, DriveInfo *hd1);
 
 /* ide-pci.c */
-void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table,
- int secondary_ide_enabled);
 PCIDevice *pci_piix3_xen_ide_init(PCIBus *bus, DriveInfo **hd_table, int 
devfn);
 PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
 PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index 3c4f765bd6..699f25824d 100644
--- a/hw/ide/cmd646.c
+++ b/hw/ide/cmd646.c
@@ -314,18 +314,6 @@ static void pci_cmd646_ide_exitfn(PCIDevice *dev)
 }
 }
 
-void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table,
- int secondary_ide_enabled)
-{
-PCIDevice *dev;
-
-dev = pci_create(bus, -1, "cmd646-ide");
-qdev_prop_set_uint32(>qdev, "secondary", secondary_ide_enabled);
-qdev_init_nofail(>qdev);
-
-pci_ide_create_devs(dev, hd_table);
-}
-
 static Property cmd646_ide_properties[] = {
 DEFINE_PROP_UINT32("secondary", PCIIDEState, secondary, 0),
 DEFINE_PROP_END_OF_LIST(),
-- 
2.21.1

[PULL 00/20] Ide patches

[John Snow]

The following changes since commit 373c7068dd610e97f0b551b5a6d0a27cd6da4506:

  qemu.nsi: Install Sphinx documentation (2020-03-09 16:45:00 +)

are available in the Git repository at:

  https://github.com/jnsnow/qemu.git tags/ide-pull-request

for you to fetch changes up to 7d0776ca7f853d466b6174d96daa5c8afc43d1a4:

  hw/ide: Remove unneeded inclusion of hw/ide.h (2020-03-17 12:22:36 -0400)


Pull request



BALATON Zoltan (10):
  ide/via: Get rid of via_ide_init()
  pci: Honour wmask when resetting PCI_INTERRUPT_LINE
  hw/ide: Get rid of piix3_init functions
  hw/isa/piix4.c: Introduce variable to store devfn
  hw/ide: Get rid of piix4_init function
  hw/ide: Remove now unneded #include "hw/pci/pci.h" from hw/ide.h
  hw/ide/pci.c: Coding style update to fix checkpatch errors
  hw/ide: Do ide_drive_get() within pci_ide_create_devs()
  hw/ide: Move MAX_IDE_DEVS define to hw/ide/internal.h
  hw/ide: Remove unneeded inclusion of hw/ide.h

Mark Cave-Ayland (9):
  cmd646: register cmd646_reset() function in DeviceClass
  cmd646: register vmstate_ide_pci VMStateDescription in DeviceClass
  dp264: use pci_create_simple() to initialise the cmd646 device
  cmd646: remove unused pci_cmd646_ide_init() function
  via-ide: move registration of VMStateDescription to DeviceClass
  via-ide: ensure that PCI_INTERRUPT_LINE is hard-wired to its default
value
  via-ide: initialise IDE controller in legacy mode
  via-ide: allow guests to write to PCI_CLASS_PROG
  via-ide: always use legacy IRQ 14/15 routing

Markus Armbruster (1):
  hd-geo-test: Clean up use of buf[] in create_qcow2_with_mbr()

 hw/hppa/hppa_sys.h|  1 -
 hw/ide/ahci_internal.h|  1 +
 include/hw/ide.h  |  9 -
 include/hw/ide/internal.h |  2 ++
 include/hw/ide/pci.h  |  3 ++-
 include/hw/misc/macio/macio.h |  1 +
 include/hw/southbridge/piix.h |  3 +--
 hw/alpha/dp264.c  | 11 ---
 hw/hppa/machine.c |  1 -
 hw/i386/pc_piix.c | 18 +-
 hw/ide/cmd646.c   | 21 -
 hw/ide/pci.c  | 11 +++
 hw/ide/piix.c | 31 +--
 hw/ide/via.c  | 21 +
 hw/isa/piix4.c| 23 ++-
 hw/mips/mips_fulong2e.c   |  8 
 hw/mips/mips_malta.c  |  2 +-
 hw/mips/mips_r4k.c|  1 +
 hw/pci/pci.c  |  5 -
 hw/ppc/mac_newworld.c |  1 -
 hw/ppc/mac_oldworld.c |  1 -
 hw/ppc/prep.c |  1 -
 hw/sparc64/sun4u.c|  6 +-
 tests/qtest/hd-geo-test.c |  6 +++---
 24 files changed, 61 insertions(+), 127 deletions(-)

-- 
2.21.1

[PULL 02/20] cmd646: register vmstate_ide_pci VMStateDescription in DeviceClass

[John Snow]

From: Mark Cave-Ayland 

Signed-off-by: Mark Cave-Ayland 
Reviewed-by: Philippe Mathieu-Daudé 
Message-id: 20200307151536.32709-3-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow 
---
 hw/ide/cmd646.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index 2f11d8de24..3c4f765bd6 100644
--- a/hw/ide/cmd646.c
+++ b/hw/ide/cmd646.c
@@ -301,8 +301,6 @@ static void pci_cmd646_ide_realize(PCIDevice *dev, Error 
**errp)
 ide_register_restart_cb(>bus[i]);
 }
 g_free(irq);
-
-vmstate_register(VMSTATE_IF(dev), 0, _ide_pci, d);
 }
 
 static void pci_cmd646_ide_exitfn(PCIDevice *dev)
@@ -339,6 +337,7 @@ static void cmd646_ide_class_init(ObjectClass *klass, void 
*data)
 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 
 dc->reset = cmd646_reset;
+dc->vmsd = _ide_pci;
 k->realize = pci_cmd646_ide_realize;
 k->exit = pci_cmd646_ide_exitfn;
 k->vendor_id = PCI_VENDOR_ID_CMD;
-- 
2.21.1

[PULL 03/20] dp264: use pci_create_simple() to initialise the cmd646 device

[John Snow]

From: Mark Cave-Ayland 

Remove the call to pci_cmd646_ide_init() since global device init functions
are deprecated in preference of using qdev directly.

Signed-off-by: Mark Cave-Ayland 
Reviewed-by: Richard Henderson 
Reviewed-by: Philippe Mathieu-Daudé 
Message-id: 20200307091313.24190-2-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow 
---
 hw/alpha/dp264.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index e5350a287f..27595767e5 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -16,6 +16,7 @@
 #include "sysemu/sysemu.h"
 #include "hw/rtc/mc146818rtc.h"
 #include "hw/ide.h"
+#include "hw/ide/pci.h"
 #include "hw/timer/i8254.h"
 #include "hw/isa/superio.h"
 #include "hw/dma/i8257.h"
@@ -101,9 +102,12 @@ static void clipper_init(MachineState *machine)
 /* IDE disk setup.  */
 {
 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
+PCIDevice *pci_dev;
+
 ide_drive_get(hd, ARRAY_SIZE(hd));
 
-pci_cmd646_ide_init(pci_bus, hd, 0);
+pci_dev = pci_create_simple(pci_bus, -1, "cmd646-ide");
+pci_ide_create_devs(pci_dev, hd);
 }
 
 /* Load PALcode.  Given that this is not "real" cpu palcode,
-- 
2.21.1

[PULL 01/20] cmd646: register cmd646_reset() function in DeviceClass

[John Snow]

From: Mark Cave-Ayland 

Signed-off-by: Mark Cave-Ayland 
Reviewed-by: Philippe Mathieu-Daudé 
Message-id: 20200307151536.32709-2-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow 
---
 hw/ide/cmd646.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index 335c060673..2f11d8de24 100644
--- a/hw/ide/cmd646.c
+++ b/hw/ide/cmd646.c
@@ -207,9 +207,9 @@ static void cmd646_set_irq(void *opaque, int channel, int 
level)
 cmd646_update_irq(pd);
 }
 
-static void cmd646_reset(void *opaque)
+static void cmd646_reset(DeviceState *dev)
 {
-PCIIDEState *d = opaque;
+PCIIDEState *d = PCI_IDE(dev);
 unsigned int i;
 
 for (i = 0; i < 2; i++) {
@@ -303,7 +303,6 @@ static void pci_cmd646_ide_realize(PCIDevice *dev, Error 
**errp)
 g_free(irq);
 
 vmstate_register(VMSTATE_IF(dev), 0, _ide_pci, d);
-qemu_register_reset(cmd646_reset, d);
 }
 
 static void pci_cmd646_ide_exitfn(PCIDevice *dev)
@@ -339,6 +338,7 @@ static void cmd646_ide_class_init(ObjectClass *klass, void 
*data)
 DeviceClass *dc = DEVICE_CLASS(klass);
 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 
+dc->reset = cmd646_reset;
 k->realize = pci_cmd646_ide_realize;
 k->exit = pci_cmd646_ide_exitfn;
 k->vendor_id = PCI_VENDOR_ID_CMD;
-- 
2.21.1

Re: [PATCH v7 00/13] APIC ID fixes for AMD EPYC CPU model

[Eduardo Habkost]

On Thu, Mar 12, 2020 at 11:28:47AM -0500, Babu Moger wrote:
> Eduardo, Can you please queue the series if there are no concerns.
> Thanks

I had queued it for today's pull request, but it looks like it
breaks "make check".  See 
https://travis-ci.org/github/ehabkost/qemu/jobs/663529282

  PASS 4 bios-tables-test /x86_64/acpi/piix4/ipmi
  Could not access KVM kernel module: No such file or directory
  qemu-system-x86_64: -accel kvm: failed to initialize kvm: No such file or 
directory
  qemu-system-x86_64: falling back to tcg
  qemu-system-x86_64: Invalid CPU [socket: 0, die: 0, core: 1, thread: 0] with 
APIC ID 1, valid index range 0:5
  Broken pipe
  /home/travis/build/ehabkost/qemu/tests/qtest/libqtest.c:166: kill_qemu() 
tried to terminate QEMU process but encountered exit status 1 (expected 0)
  Aborted (core dumped)
  ERROR - too few tests run (expected 17, got 4)
  /home/travis/build/ehabkost/qemu/tests/Makefile.include:633: recipe for 
target 'check-qtest-x86_64' failed
  make: *** [check-qtest-x86_64] Error 1


> 
> On 3/11/20 5:52 PM, Babu Moger wrote:
> > This series fixes APIC ID encoding problem reported on AMD EPYC cpu models.
> > https://bugzilla.redhat.com/show_bug.cgi?id=1728166
> > 
> > Currently, the APIC ID is decoded based on the sequence
> > sockets->dies->cores->threads. This works for most standard AMD and other
> > vendors' configurations, but this decoding sequence does not follow that of
> > AMD's APIC ID enumeration strictly. In some cases this can cause CPU 
> > topology
> > inconsistency.  When booting a guest VM, the kernel tries to validate the
> > topology, and finds it inconsistent with the enumeration of EPYC cpu models.
> > 
> > To fix the problem we need to build the topology as per the Processor
> > Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1
> > Processors. The documentation is available from the bugzilla Link below.
> > 
> > Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
> > 
> > Here is the text from the PPR.
> > Operating systems are expected to use Core::X86::Cpuid::SizeId[ApicIdSize], 
> > the
> > number of least significant bits in the Initial APIC ID that indicate core 
> > ID
> > within a processor, in constructing per-core CPUID masks.
> > Core::X86::Cpuid::SizeId[ApicIdSize] determines the maximum number of cores
> > (MNC) that the processor could theoretically support, not the actual number 
> > of
> > cores that are actually implemented or enabled on the processor, as 
> > indicated
> > by Core::X86::Cpuid::SizeId[NC].
> > Each Core::X86::Apic::ApicId[ApicId] register is preset as follows:
> > • ApicId[6] = Socket ID.
> > • ApicId[5:4] = Node ID.
> > • ApicId[3] = Logical CCX L3 complex ID
> > • ApicId[2:0]= (SMT) ? {LogicalCoreID[1:0],ThreadId} : 
> > {1'b0,LogicalCoreID[1:0]}
> > 
> > v7:
> >  Generated the patches on top of git://github.com/ehabkost/qemu.git 
> > (x86-next).
> >  Changes from v6.
> >  1. Added new function x86_set_epyc_topo_handlers to override the apic id
> > encoding handlers.
> >  2. Separated the code to set use_epyc_apic_id_encoding and added as a new 
> > patch
> > as it looked more logical.
> >  3. Fixed minor typos.
> > 
> > v6:
> >  
> > https://lore.kernel.org/qemu-devel/158389385028.22020.7608244627303132902.st...@naples-babu.amd.com/
> >  Generated the patches on top of git://github.com/ehabkost/qemu.git 
> > (x86-next).
> >  Changes from v5.
> >  1. Eduardo has already queued couple of patches, submitting the rest here.
> >  2. Major change is how the EPYC mode apic id encoding handlers are loaded.
> > Added a boolean variable use_epyc_apic_id_encoding in X86CPUDefinition. 
> > The variable is will be used to tell if we need to use EPYC mode 
> > encoding.
> >  3. Eduardo reported bysectability problem with x86 unit test code.
> > Quashed the patches in 1 and 2 to resolve it. Problem was change in 
> > calling
> > conventions of topology related functions.
> >  4. Also set the use_epyc_apic_id_encoding for EPYC-Rome. This model is
> > added recently to the cpu table.
> > 
> > v5:
> >  
> > https://lore.kernel.org/qemu-devel/158326531474.40452.11433722850425537745.st...@naples-babu.amd.com/
> >  Generated the patches on top of git://github.com/ehabkost/qemu.git 
> > (x86-next).
> >  Changes from v4.
> >  1. Re-arranged the patches 2 and 4 as suggested by Igor.
> >  2. Kept the apicid handler functions inside X86MachineState as discussed.
> > These handlers are loaded from X86CPUDefinitions.
> >  3. Removed unnecessary X86CPUstate initialization from x86_cpu_new. 
> > Suggested
> > by Igor.
> >  4. And other minor changes related to patch format.
> > 
> > v4:
> >  
> > https://lore.kernel.org/qemu-devel/158161767653.48948.10578064482878399556.st...@naples-babu.amd.com/
> >  Changes from v3.
> >  1. Moved the arch_id calculation inside the function x86_cpus_init. With 
> > this change,
> > we dont need to change common numa code.(suggested by Igor)
> > 

Re: [PATCH v3 0/8] Misc hw/ide legacy clean up

[John Snow]

On 3/17/20 11:05 AM, BALATON Zoltan wrote:
> Avoid problems from reassigning variable in piix4_create and fix
> compilation problem with mips_r4k
> 
> BALATON Zoltan (8):
>   hw/ide: Get rid of piix3_init functions
>   hw/isa/piix4.c: Introduce variable to store devfn
>   hw/ide: Get rid of piix4_init function
>   hw/ide: Remove now unneded #include "hw/pci/pci.h" from hw/ide.h
>   hw/ide/pci.c: Coding style update to fix checkpatch errors
>   hw/ide: Do ide_drive_get() within pci_ide_create_devs()
>   hw/ide: Move MAX_IDE_DEVS define to hw/ide/internal.h
>   hw/ide: Remove unneeded inclusion of hw/ide.h
> 
>  hw/alpha/dp264.c  | 13 +++--
>  hw/hppa/hppa_sys.h|  1 -
>  hw/hppa/machine.c |  1 -
>  hw/i386/pc_piix.c | 18 +-
>  hw/ide/ahci_internal.h|  1 +
>  hw/ide/pci.c  | 11 +++
>  hw/ide/piix.c | 31 +--
>  hw/isa/piix4.c| 23 ++-
>  hw/mips/mips_fulong2e.c   |  5 +
>  hw/mips/mips_malta.c  |  2 +-
>  hw/mips/mips_r4k.c|  1 +
>  hw/ppc/mac_newworld.c |  1 -
>  hw/ppc/mac_oldworld.c |  1 -
>  hw/ppc/prep.c |  1 -
>  hw/sparc64/sun4u.c|  6 +-
>  include/hw/ide.h  |  6 --
>  include/hw/ide/internal.h |  2 ++
>  include/hw/ide/pci.h  |  3 ++-
>  include/hw/misc/macio/macio.h |  1 +
>  include/hw/southbridge/piix.h |  3 +--
>  20 files changed, 41 insertions(+), 90 deletions(-)
> 

Thanks, applied to my IDE tree:

https://github.com/jnsnow/qemu/commits/ide
https://github.com/jnsnow/qemu.git

--js

Re: [PATCH] tools/virtiofsd: add support for --socket-group

[Alex Bennée]

Dr. David Alan Gilbert  writes:

> * Stefan Hajnoczi (stefa...@redhat.com) wrote:
>> On Mon, Mar 16, 2020 at 10:33:31AM +, Daniel P. Berrangé wrote:
>> > On Sat, Mar 14, 2020 at 02:33:25PM +0100, Marc-André Lureau wrote:
>> > > Hi
>> > > 
>> > > On Thu, Mar 12, 2020 at 11:49 AM Daniel P. Berrangé 
>> > >  wrote:
>> > > >
>> > > > On Thu, Mar 12, 2020 at 10:41:42AM +, Alex Bennée wrote:
>> > > > > If you like running QEMU as a normal user (very common for TCG runs)
>> > > > > but you have to run virtiofsd as a root user you run into connection
>> > > > > problems. Adding support for an optional --socket-group allows the
>> > > > > users to keep using the command line.
>> > > >
>> > > > If we're going to support this, then I think we need to put it in
>> > > > the vhost-user.rst specification so we standardize across backends.
>> > > >
>> > > >
>> > > 
>> > > Perhaps. Otoh, I wonder if the backend spec should be more limited to
>> > > arguments/introspection that are used by programs.
>> > > 
>> > > In this case, I even consider --socket-path to be unnecessary, as a
>> > > management layer can/should provide a preopened & setup fd directly.
>> > > 
>> > > What do you think?
>> > 
>> > I think there's value in standardization even if it is an option targetted
>> > at human admins, rather than machine usage. You are right though that
>> > something like libvirt would never use --socket-group, or --socket-path.
>> > Even admins would benefit if all programs followed the same naming for
>> > these.  We could document such options as "SHOULD" rather than "MUST"
>> > IOW, we don't mandate --socket-group, but if you're going to provide a
>> > way to control socket group, this option should be used.
>> 
>> I agree.  It's still useful to have a convention that most vhost-user
>> backend programs follow.
>
> Alex:
>   Can you add the doc entry that Stefan and Marc-André are asking
> for;  it's probably good they go together.

Sure - is docs/interop/vhost-user.rst the master spec for vhost-user
daemons?

>
> Dave
>
>> Stefan


-- 
Alex Bennée

Re: [PATCH v10 3/3] Acceptance tests: add make targets to download images

[Cleber Rosa]

On Tue, Mar 17, 2020 at 06:36:18PM +, Alex Bennée wrote:
> 
> Cleber Rosa  writes:
> 
> > The newly introduced "boot linux" tests make use of Linux images that
> > are larger than usual, and fall into what Avocado calls "vmimages",
> > and can be referred to by name, version and architecture.
> >
> > The images can be downloaded automatically during the test. But, to
> > make for more reliable test results, this introduces a target that
> > will download the vmimages for the architectures that have been
> > configured and are available for the currently used distro (Fedora
> > 31).
> >
> > Signed-off-by: Cleber Rosa 
> > Reviewed-by: Willian Rampazzo 
> > ---
> >  tests/Makefile.include | 19 +--
> >  1 file changed, 17 insertions(+), 2 deletions(-)
> >
> > diff --git a/tests/Makefile.include b/tests/Makefile.include
> > index 67e8fcddda..9c19229a06 100644
> > --- a/tests/Makefile.include
> > +++ b/tests/Makefile.include
> > @@ -20,6 +20,8 @@ check-help:
> > @echo " $(MAKE) check-venv   Creates a Python venv for tests"
> > @echo " $(MAKE) check-clean  Clean the tests and related data"
> > @echo
> > +   @echo " $(MAKE) get-vm-imagesDownloads all images used by 
> > acceptance tests, according to configured targets (~350 MB each, 1.5 GB 
> > max)"
> > +   @echo
> 
> I'm not overly enamoured with a super long line help for something that
> is a dependency anyway but whatever...
> 
>

I had a hard time choosing the right info to put there, and I didn't
want to break the style of the majority of help messages that use a
single line.  Anyway, we can always improve that.

> > @echo
> > @echo "The variable SPEED can be set to control the gtester speed 
> > setting."
> > @echo "Default options are -k and (for $(MAKE) V=1) --verbose; they can 
> > be"
> > @@ -889,7 +891,20 @@ $(TESTS_RESULTS_DIR):
> >  
> >  check-venv: $(TESTS_VENV_DIR)
> >  
> > -check-acceptance: check-venv $(TESTS_RESULTS_DIR)
> > +FEDORA_31_ARCHES_CANDIDATES=$(patsubst ppc64,ppc64le,$(TARGETS))
> > +FEDORA_31_ARCHES := x86_64 aarch64 ppc64le s390x
> > +FEDORA_31_DOWNLOAD=$(filter 
> > $(FEDORA_31_ARCHES),$(FEDORA_31_ARCHES_CANDIDATES))
> > +
> > +# download one specific Fedora 31 image
> > +get-vm-image-fedora-31-%: $(check-venv)
> 
> Why $(check-venv) instead of check-venv
>

Good point.

> > +   $(call quiet-command, \
> > + $(TESTS_VENV_DIR)/bin/python -m avocado vmimage get \
> > + --distro=fedora --distro-version=31 --arch=$*)
> 
> Some short text for the operation would be nice (DNLD acceptance images?)
>

Another good point.

> > +
> > +# download all vm images, according to defined targets
> > +get-vm-images: $(check-venv) $(patsubst %,get-vm-image-fedora-31-%, 
> > $(FEDORA_31_DOWNLOAD))
> > +
> > +check-acceptance: check-venv $(TESTS_RESULTS_DIR) get-vm-images
> > $(call quiet-command, \
> >  $(TESTS_VENV_DIR)/bin/python -m avocado \
> >  --show=$(AVOCADO_SHOW) run 
> > --job-results-dir=$(TESTS_RESULTS_DIR) \
> > @@ -900,7 +915,7 @@ check-acceptance: check-venv $(TESTS_RESULTS_DIR)
> >  
> >  # Consolidated targets
> >  
> > -.PHONY: check-block check-qapi-schema check-qtest check-unit check 
> > check-clean
> > +.PHONY: check-block check-qapi-schema check-qtest check-unit check 
> > check-clean get-vm-images
> >  check-qapi-schema: check-tests/qapi-schema/frontend 
> > check-tests/qapi-schema/doc-good.texi
> >  check-qtest: $(patsubst %,check-qtest-%, $(QTEST_TARGETS))
> >  ifeq ($(CONFIG_TOOLS),y)
> 
> Otherwise:
> 
> Reviewed-by: Alex Bennée 
> 
>

Thanks!
- Cleber.

> -- 
> Alex Bennée
> 


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Re: [PATCH v2 6/8] target/ppc: allow ppc_cpu_do_system_reset to take an alternate vector

[David Gibson]

On Tue, Mar 17, 2020 at 11:06:15AM -0400, Programmingkid wrote:
> 
> > On Mar 17, 2020, at 7:01 AM, qemu-ppc-requ...@nongnu.org wrote:
> > 
> > Message: 3
> > Date: Tue, 17 Mar 2020 11:47:32 +0100
> > From: Cédric Le Goater 
> > To: David Gibson , Nicholas Piggin
> > 
> > Cc: qemu-...@nongnu.org, Aravinda Prasad ,
> > Ganesh Goudar , Greg Kurz ,
> > qemu-devel@nongnu.org
> > Subject: Re: [PATCH v2 6/8] target/ppc: allow ppc_cpu_do_system_reset
> > to take an alternate vector
> > Message-ID: <097148e5-78be-a294-236d-160fb5c29...@kaod.org>
> > Content-Type: text/plain; charset=windows-1252
> > 
> > On 3/17/20 12:34 AM, David Gibson wrote:
> >> On Tue, Mar 17, 2020 at 09:28:24AM +1000, Nicholas Piggin wrote:
> >>> Cédric Le Goater's on March 17, 2020 4:15 am:
>  On 3/16/20 3:26 PM, Nicholas Piggin wrote:
> > Provide for an alternate delivery location, -1 defaults to the
> > architected address.
>  
>  I don't know what is the best approach, to override the vector addr
>  computed by powerpc_excp() or use a machine class handler with 
>  cpu->vhyp.
> >>> 
> >>> Yeah it's getting a bit ad hoc and inconsistent with machine check
> >>> etc, I just figured get something minimal in there now. The whole
> >>> exception delivery needs a spring clean though.
> >> 
> 
> Currently Mac OS 9 will not restart. When someone goes to restart it
> the screen will turn black and stay that way. Could this patch solve
> this problem?

No.  It's unlikely to be related, and at this stage is used
exclusively to implement the FWNMI stuff for the pseries machine.

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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Re: [PULL 00/45] ppc-for-5.0 queue 20200317

[David Gibson]

On Tue, Mar 17, 2020 at 11:30:31AM +0100, Paolo Bonzini wrote:
> On 17/03/20 11:03, David Gibson wrote:
> >   pseries: Update SLOF firmware image
> >   ppc/spapr: Move GPRs setup to one place
> >   pseries: Update SLOF firmware image
> >   spapr/rtas: Reserve space for RTAS blob and log
> >   pseries: Update SLOF firmware image
> 
> Oh, no fake-OF patches?

Apart from some prelims that make sense on their own, no.

Not quite ready to go ahead with that, I'm afraid.

> 
> Paolo
> 
> > Cédric Le Goater (1):
> >   spapr/xive: use SPAPR_IRQ_IPI to define IPI ranges exposed to the 
> > guest
> > 
> > David Gibson (19):
> >   ppc: Remove stub support for 32-bit hypervisor mode
> >   ppc: Remove stub of PPC970 HID4 implementation
> >   target/ppc: Correct handling of real mode accesses with vhyp on hash 
> > MMU
> >   target/ppc: Introduce ppc_hash64_use_vrma() helper
> >   spapr, ppc: Remove VPM0/RMLS hacks for POWER9
> >   target/ppc: Remove RMOR register from POWER9 & POWER10
> >   target/ppc: Use class fields to simplify LPCR masking
> >   target/ppc: Streamline calculation of RMA limit from LPCR[RMLS]
> >   target/ppc: Correct RMLS table
> >   target/ppc: Only calculate RMLS derived RMA limit on demand
> >   target/ppc: Don't store VRMA SLBE persistently
> >   spapr: Don't use weird units for MIN_RMA_SLOF
> >   spapr,ppc: Simplify signature of kvmppc_rma_size()
> >   spapr: Don't attempt to clamp RMA to VRMA constraint
> >   spapr: Don't clamp RMA to 16GiB on new machine types
> >   spapr: Clean up RMA size calculation
> >   spapr: Move creation of ibm,dynamic-reconfiguration-memory dt node
> >   spapr: Move creation of ibm,architecture-vec-5 property
> >   spapr: Rename DT functions to newer naming convention
> > 
> > Greg Kurz (2):
> >   spapr: Handle pending hot plug/unplug requests at CAS
> >   ppc: Officially deprecate the CPU "compat" property
> > 
> > Nicholas Piggin (8):
> >   ppc/spapr: Fix FWNMI machine check failure handling
> >   ppc/spapr: Change FWNMI names
> >   ppc/spapr: Add FWNMI System Reset state
> >   ppc/spapr: Fix FWNMI machine check interrupt delivery
> >   ppc/spapr: Allow FWNMI on TCG
> >   target/ppc: allow ppc_cpu_do_system_reset to take an alternate vector
> >   ppc/spapr: Implement FWNMI System Reset delivery
> >   ppc/spapr: Ignore common "ibm,nmi-interlock" Linux bug
> > 
> > Philippe Mathieu-Daudé (8):
> >   hw/ppc/pnv: Fix typo in comment
> >   hw/scsi/viosrp: Add missing 'hw/scsi/srp.h' include
> >   hw/scsi/spapr_vscsi: Use SRP_MAX_IU_LEN instead of sizeof flexible 
> > array
> >   hw/scsi/spapr_vscsi: Simplify a bit
> >   hw/scsi/spapr_vscsi: Introduce req_iu() helper
> >   hw/scsi/spapr_vscsi: Do not mix SRP IU size with DMA buffer size
> >   hw/scsi/spapr_vscsi: Prevent buffer overflow
> >   hw/scsi/spapr_vscsi: Convert debug fprintf() to trace event
> > 
> > Shivaprasad G Bhat (1):
> >   spapr: Fix Coverity warning while validating nvdimm options
> > 
> > Vitaly Chikunov (1):
> >   target/ppc: Fix rlwinm on ppc64
> > 
> >  docs/system/deprecated.rst|   7 +
> >  hw/intc/spapr_xive.c  |   4 +-
> >  hw/ppc/pnv_lpc.c  |   2 +-
> >  hw/ppc/spapr.c| 980 
> > --
> >  hw/ppc/spapr_caps.c   |  19 +-
> >  hw/ppc/spapr_cpu_core.c   |  16 +-
> >  hw/ppc/spapr_events.c |  51 +-
> >  hw/ppc/spapr_hcall.c  |  15 +-
> >  hw/ppc/spapr_nvdimm.c |   7 +-
> >  hw/ppc/spapr_ovec.c   |   4 +-
> >  hw/ppc/spapr_rtas.c   |  45 +-
> >  hw/scsi/spapr_vscsi.c |  72 +--
> >  hw/scsi/trace-events  |   1 +
> >  hw/scsi/viosrp.h  |   3 +-
> >  include/hw/ppc/spapr.h|  34 +-
> >  include/hw/ppc/spapr_cpu_core.h   |   4 +-
> >  include/hw/ppc/spapr_ovec.h   |   4 +-
> >  pc-bios/README|   2 +-
> >  pc-bios/slof.bin  | Bin 931032 -> 965008 bytes
> >  roms/SLOF |   2 +-
> >  target/ppc/cpu-qom.h  |   1 +
> >  target/ppc/cpu.h  |  28 +-
> >  target/ppc/excp_helper.c  |  79 ++-
> >  target/ppc/kvm.c  |   5 +-
> >  target/ppc/kvm_ppc.h  |   7 +-
> >  target/ppc/mmu-hash64.c   | 319 +
> >  target/ppc/translate.c|  20 +-
> >  target/ppc/translate_init.inc.c   | 116 ++---
> >  tests/qtest/libqos/libqos-spapr.h |   3 +-
> >  29 files changed, 930 insertions(+), 920 deletions(-)
> > 
> 

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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Re: [PATCH v3.1 4/5] KVM: Kick resamplefd for split kernel irqchip

[Alex Williamson]

On Tue, 17 Mar 2020 18:49:23 -0400
Peter Xu  wrote:

> This is majorly only for X86 because that's the only one that supports
> split irqchip for now.
> 
> When the irqchip is split, we face a dilemma that KVM irqfd will be
> enabled, however the slow irqchip is still running in the userspace.
> It means that the resamplefd in the kernel irqfds won't take any
> effect and it will miss to ack INTx interrupts on EOIs.
> 
> One example is split irqchip with VFIO INTx, which will break if we
> use the VFIO INTx fast path.
> 
> This patch can potentially supports the VFIO fast path again for INTx,
> that the IRQ delivery will still use the fast path, while we don't
> need to trap MMIOs in QEMU for the device to emulate the EIOs (see the
> callers of vfio_eoi() hook).  However the EOI of the INTx will still
> need to be done from the userspace by caching all the resamplefds in
> QEMU and kick properly for IOAPIC EOI broadcast.
> 
> This is tricky because in this case the userspace ioapic irr &
> remote-irr will be bypassed.  However such a change will greatly boost
> performance for assigned devices using INTx irqs (TCP_RR boosts 46%
> after this patch applied).
> 
> When the userspace is responsible for the resamplefd kickup, don't
> register it on the kvm_irqfd anymore, because on newer kernels (after
> commit 654f1f13ea56, 5.2+) the KVM_IRQFD will fail if with both split
> irqchip and resamplefd.  This will make sure that the fast path will
> work for all supported kernels.
> 
> https://patchwork.kernel.org/patch/10738541/#22609933
> 
> Suggested-by: Paolo Bonzini 
> Signed-off-by: Peter Xu 
> ---
> v3.1 changelog
> - only kick resamplefd for level triggered irqs [Alex]
>  accel/kvm/kvm-all.c| 79 --
>  accel/kvm/trace-events |  1 +
>  hw/intc/ioapic.c   | 17 +
>  include/sysemu/kvm.h   |  4 +++
>  4 files changed, 99 insertions(+), 2 deletions(-)

Reviewed-by: Alex Williamson 

> diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
> index d49b74512a..9a85fd1b8f 100644
> --- a/accel/kvm/kvm-all.c
> +++ b/accel/kvm/kvm-all.c
> @@ -159,9 +159,59 @@ static const KVMCapabilityInfo 
> kvm_required_capabilites[] = {
>  static NotifierList kvm_irqchip_change_notifiers =
>  NOTIFIER_LIST_INITIALIZER(kvm_irqchip_change_notifiers);
>  
> +struct KVMResampleFd {
> +int gsi;
> +EventNotifier *resample_event;
> +QLIST_ENTRY(KVMResampleFd) node;
> +};
> +typedef struct KVMResampleFd KVMResampleFd;
> +
> +/*
> + * Only used with split irqchip where we need to do the resample fd
> + * kick for the kernel from userspace.
> + */
> +static QLIST_HEAD(, KVMResampleFd) kvm_resample_fd_list =
> +QLIST_HEAD_INITIALIZER(kvm_resample_fd_list);
> +
>  #define kvm_slots_lock(kml)  qemu_mutex_lock(&(kml)->slots_lock)
>  #define kvm_slots_unlock(kml)qemu_mutex_unlock(&(kml)->slots_lock)
>  
> +static inline void kvm_resample_fd_remove(int gsi)
> +{
> +KVMResampleFd *rfd;
> +
> +QLIST_FOREACH(rfd, _resample_fd_list, node) {
> +if (rfd->gsi == gsi) {
> +QLIST_REMOVE(rfd, node);
> +g_free(rfd);
> +break;
> +}
> +}
> +}
> +
> +static inline void kvm_resample_fd_insert(int gsi, EventNotifier *event)
> +{
> +KVMResampleFd *rfd = g_new0(KVMResampleFd, 1);
> +
> +rfd->gsi = gsi;
> +rfd->resample_event = event;
> +
> +QLIST_INSERT_HEAD(_resample_fd_list, rfd, node);
> +}
> +
> +void kvm_resample_fd_notify(int gsi)
> +{
> +KVMResampleFd *rfd;
> +
> +QLIST_FOREACH(rfd, _resample_fd_list, node) {
> +if (rfd->gsi == gsi) {
> +event_notifier_set(rfd->resample_event);
> +trace_kvm_resample_fd_notify(gsi);
> +return;
> +}
> +}
> +}
> +
>  int kvm_get_max_memslots(void)
>  {
>  KVMState *s = KVM_STATE(current_accel());
> @@ -1642,8 +1692,33 @@ static int kvm_irqchip_assign_irqfd(KVMState *s, 
> EventNotifier *event,
>  };
>  
>  if (rfd != -1) {
> -irqfd.flags |= KVM_IRQFD_FLAG_RESAMPLE;
> -irqfd.resamplefd = rfd;
> +assert(assign);
> +if (kvm_irqchip_is_split()) {
> +/*
> + * When the slow irqchip (e.g. IOAPIC) is in the
> + * userspace, KVM kernel resamplefd will not work because
> + * the EOI of the interrupt will be delivered to userspace
> + * instead, so the KVM kernel resamplefd kick will be
> + * skipped.  The userspace here mimics what the kernel
> + * provides with resamplefd, remember the resamplefd and
> + * kick it when we receive EOI of this IRQ.
> + *
> + * This is hackery because IOAPIC is mostly bypassed
> + * (except EOI broadcasts) when irqfd is used.  However
> + * this can bring much performance back for split irqchip
> + * with INTx IRQs (for VFIO, this gives 93% perf of the
> + * full fast path, 

Re: [PATCH v3 3/5] KVM: Pass EventNotifier into kvm_irqchip_assign_irqfd

[Alex Williamson]

On Tue, 17 Mar 2020 15:50:40 -0400
Peter Xu  wrote:

> So that kvm_irqchip_assign_irqfd() can have access to the
> EventNotifiers, especially the resample event.  It is needed in follow
> up patch to cache and kick resamplefds from QEMU.
> 
> Reviewed-by: Eric Auger 
> Signed-off-by: Peter Xu 
> ---
>  accel/kvm/kvm-all.c | 16 ++--
>  1 file changed, 10 insertions(+), 6 deletions(-)

Reviewed-by: Alex Williamson 

> diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
> index 439a4efe52..d49b74512a 100644
> --- a/accel/kvm/kvm-all.c
> +++ b/accel/kvm/kvm-all.c
> @@ -1628,9 +1628,13 @@ int kvm_irqchip_update_msi_route(KVMState *s, int 
> virq, MSIMessage msg,
>  return kvm_update_routing_entry(s, );
>  }
>  
> -static int kvm_irqchip_assign_irqfd(KVMState *s, int fd, int rfd, int virq,
> +static int kvm_irqchip_assign_irqfd(KVMState *s, EventNotifier *event,
> +EventNotifier *resample, int virq,
>  bool assign)
>  {
> +int fd = event_notifier_get_fd(event);
> +int rfd = resample ? event_notifier_get_fd(resample) : -1;
> +
>  struct kvm_irqfd irqfd = {
>  .fd = fd,
>  .gsi = virq,
> @@ -1735,7 +1739,9 @@ int kvm_irqchip_add_hv_sint_route(KVMState *s, uint32_t 
> vcpu, uint32_t sint)
>  return -ENOSYS;
>  }
>  
> -static int kvm_irqchip_assign_irqfd(KVMState *s, int fd, int virq, bool 
> assign)
> +static int kvm_irqchip_assign_irqfd(KVMState *s, EventNotifier *event,
> +EventNotifier *resample, int virq,
> +bool assign)
>  {
>  abort();
>  }
> @@ -1749,15 +1755,13 @@ int kvm_irqchip_update_msi_route(KVMState *s, int 
> virq, MSIMessage msg)
>  int kvm_irqchip_add_irqfd_notifier_gsi(KVMState *s, EventNotifier *n,
> EventNotifier *rn, int virq)
>  {
> -return kvm_irqchip_assign_irqfd(s, event_notifier_get_fd(n),
> -   rn ? event_notifier_get_fd(rn) : -1, virq, true);
> +return kvm_irqchip_assign_irqfd(s, n, rn, virq, true);
>  }
>  
>  int kvm_irqchip_remove_irqfd_notifier_gsi(KVMState *s, EventNotifier *n,
>int virq)
>  {
> -return kvm_irqchip_assign_irqfd(s, event_notifier_get_fd(n), -1, virq,
> -   false);
> +return kvm_irqchip_assign_irqfd(s, n, NULL, virq, false);
>  }
>  
>  int kvm_irqchip_add_irqfd_notifier(KVMState *s, EventNotifier *n,

Re: [PATCH v3 5/5] Revert "vfio/pci: Disable INTx fast path if using split irqchip"

[Alex Williamson]

On Tue, 17 Mar 2020 15:50:42 -0400
Peter Xu  wrote:

> With the resamplefd list introduced, we can savely enable VFIO INTx
> fast path again with split irqchip so it can still be faster than the
> complete slow path.
> 
> Reviewed-by: Eric Auger 
> Signed-off-by: Peter Xu 
> ---
>  hw/vfio/pci.c | 12 
>  1 file changed, 12 deletions(-)

Reviewed-by: Alex Williamson 
Acked-by: Alex Williamson 

> diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
> index 09703362df..1c0aa27386 100644
> --- a/hw/vfio/pci.c
> +++ b/hw/vfio/pci.c
> @@ -124,18 +124,6 @@ static void vfio_intx_enable_kvm(VFIOPCIDevice *vdev, 
> Error **errp)
>  return;
>  }
>  
> -if (kvm_irqchip_is_split()) {
> -/*
> - * VFIO INTx is currently not working with split kernel
> - * irqchip for level triggered interrupts.  Go the slow path
> - * as long as split is enabled so we can be at least
> - * functional (even with poor performance).
> - *
> - * TODO: Remove this after all things fixed up.
> - */
> -return;
> -}
> -
>  /* Get to a known interrupt state */
>  qemu_set_fd_handler(irq_fd, NULL, NULL, vdev);
>  vfio_mask_single_irqindex(>vbasedev, VFIO_PCI_INTX_IRQ_INDEX);

Re: [PATCH v3 1/5] vfio/pci: Disable INTx fast path if using split irqchip

[Alex Williamson]

On Tue, 17 Mar 2020 15:50:38 -0400
Peter Xu  wrote:

> It's currently broken.  Let's use the slow path to at least make it
> functional.
> 
> Tested-by: Eric Auger 
> Reviewed-by: Eric Auger 
> Signed-off-by: Peter Xu 
> ---
>  hw/vfio/pci.c | 12 
>  1 file changed, 12 insertions(+)

Reviewed-by: Alex Williamson 
Acked-by: Alex Williamson 
 
> diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
> index 5e75a95129..98e0e0c994 100644
> --- a/hw/vfio/pci.c
> +++ b/hw/vfio/pci.c
> @@ -128,6 +128,18 @@ static void vfio_intx_enable_kvm(VFIOPCIDevice *vdev, 
> Error **errp)
>  return;
>  }
>  
> +if (kvm_irqchip_is_split()) {
> +/*
> + * VFIO INTx is currently not working with split kernel
> + * irqchip for level triggered interrupts.  Go the slow path
> + * as long as split is enabled so we can be at least
> + * functional (even with poor performance).
> + *
> + * TODO: Remove this after all things fixed up.
> + */
> +return;
> +}
> +
>  /* Get to a known interrupt state */
>  qemu_set_fd_handler(irqfd.fd, NULL, NULL, vdev);
>  vfio_mask_single_irqindex(>vbasedev, VFIO_PCI_INTX_IRQ_INDEX);

Re: [PATCH v3 2/5] vfio/pci: Use kvm_irqchip_add_irqfd_notifier_gsi() for irqfds

[Alex Williamson]

On Tue, 17 Mar 2020 15:50:39 -0400
Peter Xu  wrote:

> VFIO is currently the only one left that is not using the generic
> function (kvm_irqchip_add_irqfd_notifier_gsi()) to register irqfds.
> Let VFIO use the common framework too.
> 
> Follow up patches will introduce extra features for kvm irqfd, so that
> VFIO can easily leverage that after the switch.
> 
> Reviewed-by: Eric Auger 
> Reviewed-by: Cornelia Huck 
> Signed-off-by: Peter Xu 
> ---
>  hw/vfio/pci.c | 37 +++--
>  1 file changed, 15 insertions(+), 22 deletions(-)

Reviewed-by: Alex Williamson 
Acked-by: Alex Williamson 

> diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
> index 98e0e0c994..09703362df 100644
> --- a/hw/vfio/pci.c
> +++ b/hw/vfio/pci.c
> @@ -115,11 +115,7 @@ static void vfio_intx_eoi(VFIODevice *vbasedev)
>  static void vfio_intx_enable_kvm(VFIOPCIDevice *vdev, Error **errp)
>  {
>  #ifdef CONFIG_KVM
> -struct kvm_irqfd irqfd = {
> -.fd = event_notifier_get_fd(>intx.interrupt),
> -.gsi = vdev->intx.route.irq,
> -.flags = KVM_IRQFD_FLAG_RESAMPLE,
> -};
> +int irq_fd = event_notifier_get_fd(>intx.interrupt);
>  Error *err = NULL;
>  
>  if (vdev->no_kvm_intx || !kvm_irqfds_enabled() ||
> @@ -141,7 +137,7 @@ static void vfio_intx_enable_kvm(VFIOPCIDevice *vdev, 
> Error **errp)
>  }
>  
>  /* Get to a known interrupt state */
> -qemu_set_fd_handler(irqfd.fd, NULL, NULL, vdev);
> +qemu_set_fd_handler(irq_fd, NULL, NULL, vdev);
>  vfio_mask_single_irqindex(>vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
>  vdev->intx.pending = false;
>  pci_irq_deassert(>pdev);
> @@ -152,17 +148,18 @@ static void vfio_intx_enable_kvm(VFIOPCIDevice *vdev, 
> Error **errp)
>  goto fail;
>  }
>  
> -/* KVM triggers it, VFIO listens for it */
> -irqfd.resamplefd = event_notifier_get_fd(>intx.unmask);
> -
> -if (kvm_vm_ioctl(kvm_state, KVM_IRQFD, )) {
> +if (kvm_irqchip_add_irqfd_notifier_gsi(kvm_state,
> +   >intx.interrupt,
> +   >intx.unmask,
> +   vdev->intx.route.irq)) {
>  error_setg_errno(errp, errno, "failed to setup resample irqfd");
>  goto fail_irqfd;
>  }
>  
>  if (vfio_set_irq_signaling(>vbasedev, VFIO_PCI_INTX_IRQ_INDEX, 0,
> VFIO_IRQ_SET_ACTION_UNMASK,
> -   irqfd.resamplefd, )) {
> +   event_notifier_get_fd(>intx.unmask),
> +   )) {
>  error_propagate(errp, err);
>  goto fail_vfio;
>  }
> @@ -177,12 +174,12 @@ static void vfio_intx_enable_kvm(VFIOPCIDevice *vdev, 
> Error **errp)
>  return;
>  
>  fail_vfio:
> -irqfd.flags = KVM_IRQFD_FLAG_DEASSIGN;
> -kvm_vm_ioctl(kvm_state, KVM_IRQFD, );
> +kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, >intx.interrupt,
> +  vdev->intx.route.irq);
>  fail_irqfd:
>  event_notifier_cleanup(>intx.unmask);
>  fail:
> -qemu_set_fd_handler(irqfd.fd, vfio_intx_interrupt, NULL, vdev);
> +qemu_set_fd_handler(irq_fd, vfio_intx_interrupt, NULL, vdev);
>  vfio_unmask_single_irqindex(>vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
>  #endif
>  }
> @@ -190,12 +187,6 @@ fail:
>  static void vfio_intx_disable_kvm(VFIOPCIDevice *vdev)
>  {
>  #ifdef CONFIG_KVM
> -struct kvm_irqfd irqfd = {
> -.fd = event_notifier_get_fd(>intx.interrupt),
> -.gsi = vdev->intx.route.irq,
> -.flags = KVM_IRQFD_FLAG_DEASSIGN,
> -};
> -
>  if (!vdev->intx.kvm_accel) {
>  return;
>  }
> @@ -209,7 +200,8 @@ static void vfio_intx_disable_kvm(VFIOPCIDevice *vdev)
>  pci_irq_deassert(>pdev);
>  
>  /* Tell KVM to stop listening for an INTx irqfd */
> -if (kvm_vm_ioctl(kvm_state, KVM_IRQFD, )) {
> +if (kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, 
> >intx.interrupt,
> +  vdev->intx.route.irq)) {
>  error_report("vfio: Error: Failed to disable INTx irqfd: %m");
>  }
>  
> @@ -217,7 +209,8 @@ static void vfio_intx_disable_kvm(VFIOPCIDevice *vdev)
>  event_notifier_cleanup(>intx.unmask);
>  
>  /* QEMU starts listening for interrupt events. */
> -qemu_set_fd_handler(irqfd.fd, vfio_intx_interrupt, NULL, vdev);
> +qemu_set_fd_handler(event_notifier_get_fd(>intx.interrupt),
> +vfio_intx_interrupt, NULL, vdev);
>  
>  vdev->intx.kvm_accel = false;
>  

[PATCH v3.1 4/5] KVM: Kick resamplefd for split kernel irqchip

[Peter Xu]

This is majorly only for X86 because that's the only one that supports
split irqchip for now.

When the irqchip is split, we face a dilemma that KVM irqfd will be
enabled, however the slow irqchip is still running in the userspace.
It means that the resamplefd in the kernel irqfds won't take any
effect and it will miss to ack INTx interrupts on EOIs.

One example is split irqchip with VFIO INTx, which will break if we
use the VFIO INTx fast path.

This patch can potentially supports the VFIO fast path again for INTx,
that the IRQ delivery will still use the fast path, while we don't
need to trap MMIOs in QEMU for the device to emulate the EIOs (see the
callers of vfio_eoi() hook).  However the EOI of the INTx will still
need to be done from the userspace by caching all the resamplefds in
QEMU and kick properly for IOAPIC EOI broadcast.

This is tricky because in this case the userspace ioapic irr &
remote-irr will be bypassed.  However such a change will greatly boost
performance for assigned devices using INTx irqs (TCP_RR boosts 46%
after this patch applied).

When the userspace is responsible for the resamplefd kickup, don't
register it on the kvm_irqfd anymore, because on newer kernels (after
commit 654f1f13ea56, 5.2+) the KVM_IRQFD will fail if with both split
irqchip and resamplefd.  This will make sure that the fast path will
work for all supported kernels.

https://patchwork.kernel.org/patch/10738541/#22609933

Suggested-by: Paolo Bonzini 
Signed-off-by: Peter Xu 
---
v3.1 changelog
- only kick resamplefd for level triggered irqs [Alex]
 accel/kvm/kvm-all.c| 79 --
 accel/kvm/trace-events |  1 +
 hw/intc/ioapic.c   | 17 +
 include/sysemu/kvm.h   |  4 +++
 4 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index d49b74512a..9a85fd1b8f 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -159,9 +159,59 @@ static const KVMCapabilityInfo kvm_required_capabilites[] 
= {
 static NotifierList kvm_irqchip_change_notifiers =
 NOTIFIER_LIST_INITIALIZER(kvm_irqchip_change_notifiers);
 
+struct KVMResampleFd {
+int gsi;
+EventNotifier *resample_event;
+QLIST_ENTRY(KVMResampleFd) node;
+};
+typedef struct KVMResampleFd KVMResampleFd;
+
+/*
+ * Only used with split irqchip where we need to do the resample fd
+ * kick for the kernel from userspace.
+ */
+static QLIST_HEAD(, KVMResampleFd) kvm_resample_fd_list =
+QLIST_HEAD_INITIALIZER(kvm_resample_fd_list);
+
 #define kvm_slots_lock(kml)  qemu_mutex_lock(&(kml)->slots_lock)
 #define kvm_slots_unlock(kml)qemu_mutex_unlock(&(kml)->slots_lock)
 
+static inline void kvm_resample_fd_remove(int gsi)
+{
+KVMResampleFd *rfd;
+
+QLIST_FOREACH(rfd, _resample_fd_list, node) {
+if (rfd->gsi == gsi) {
+QLIST_REMOVE(rfd, node);
+g_free(rfd);
+break;
+}
+}
+}
+
+static inline void kvm_resample_fd_insert(int gsi, EventNotifier *event)
+{
+KVMResampleFd *rfd = g_new0(KVMResampleFd, 1);
+
+rfd->gsi = gsi;
+rfd->resample_event = event;
+
+QLIST_INSERT_HEAD(_resample_fd_list, rfd, node);
+}
+
+void kvm_resample_fd_notify(int gsi)
+{
+KVMResampleFd *rfd;
+
+QLIST_FOREACH(rfd, _resample_fd_list, node) {
+if (rfd->gsi == gsi) {
+event_notifier_set(rfd->resample_event);
+trace_kvm_resample_fd_notify(gsi);
+return;
+}
+}
+}
+
 int kvm_get_max_memslots(void)
 {
 KVMState *s = KVM_STATE(current_accel());
@@ -1642,8 +1692,33 @@ static int kvm_irqchip_assign_irqfd(KVMState *s, 
EventNotifier *event,
 };
 
 if (rfd != -1) {
-irqfd.flags |= KVM_IRQFD_FLAG_RESAMPLE;
-irqfd.resamplefd = rfd;
+assert(assign);
+if (kvm_irqchip_is_split()) {
+/*
+ * When the slow irqchip (e.g. IOAPIC) is in the
+ * userspace, KVM kernel resamplefd will not work because
+ * the EOI of the interrupt will be delivered to userspace
+ * instead, so the KVM kernel resamplefd kick will be
+ * skipped.  The userspace here mimics what the kernel
+ * provides with resamplefd, remember the resamplefd and
+ * kick it when we receive EOI of this IRQ.
+ *
+ * This is hackery because IOAPIC is mostly bypassed
+ * (except EOI broadcasts) when irqfd is used.  However
+ * this can bring much performance back for split irqchip
+ * with INTx IRQs (for VFIO, this gives 93% perf of the
+ * full fast path, which is 46% perf boost comparing to
+ * the INTx slow path).
+ */
+kvm_resample_fd_insert(virq, resample);
+} else {
+irqfd.flags |= KVM_IRQFD_FLAG_RESAMPLE;
+irqfd.resamplefd = rfd;
+}
+} else if (!assign) {
+if (kvm_irqchip_is_split()) {
+

Re: [PATCH 1/4] tests/vm: write raw console log

[Cleber Rosa]

On Mon, Mar 16, 2020 at 03:22:07PM +0100, Philippe Mathieu-Daudé wrote:
> On 3/16/20 3:16 PM, Alex Bennée wrote:
> > 
> > Gerd Hoffmann  writes:
> > 
> > > Run "tail -f /var/tmp/*/qemu*console.raw" in another terminal
> > > to watch the install console.
> > > 
> > > Signed-off-by: Gerd Hoffmann 
> > 
> > I suspect this is what's breaking "make check-acceptance" so I've
> > dropped the series from testing/next for now.
> >
> >2020-03-11 12:12:30,546 stacktrace   L0039 ERROR|
> >2020-03-11 12:12:30,546 stacktrace   L0042 ERROR| Reproduced 
> > traceback from: 
> > /home/alex.bennee/lsrc/qemu.git/builds/all/tests/venv/lib/python3.6/site-packages/avocado/c\
> >ore/test.py:860
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR| Traceback (most 
> > recent call last):
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR|   File 
> > "/home/alex.bennee/lsrc/qemu.git/builds/all/tests/venv/lib/python3.6/site-packages/avocado/core/test.py",
> >  line \
> >1456, in test
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR| 
> > self.error(self.exception)
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR|   File 
> > "/home/alex.bennee/lsrc/qemu.git/builds/all/tests/venv/lib/python3.6/site-packages/avocado/core/test.py",
> >  line \
> >1064, in error
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR| raise 
> > exceptions.TestError(message)
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR| 
> > avocado.core.exceptions.TestError: Traceback (most recent call last):
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR|   File 
> > "/usr/lib/python3.6/imp.py", line 235, in load_module
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR| return 
> > load_source(name, filename, file)
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR|   File 
> > "/usr/lib/python3.6/imp.py", line 172, in load_source
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR| module = 
> > _load(spec)
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR|   File " > importlib._bootstrap>", line 684, in _load
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR|   File " > importlib._bootstrap>", line 665, in _load_unlocked
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR|   File " > importlib._bootstrap_external>", line 678, in exec_module
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR|   File " > importlib._bootstrap>", line 219, in _call_with_frames_removed
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR|   File 
> > "/home/alex.bennee/lsrc/qemu.git/builds/all/tests/acceptance/machine_mips_malta.py",
> >  line 15, in 
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR| from 
> > avocado_qemu import Test
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR|   File 
> > "/home/alex.bennee/lsrc/qemu.git/builds/all/tests/acceptance/avocado_qemu/__init__.py",
> >  line 22, in 
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR| from 
> > qemu.machine import QEMUMachine
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR|   File 
> > "/home/alex.bennee/lsrc/qemu.git/builds/all/tests/acceptance/avocado_qemu/../../../python/qemu/machine.py",
> >  lin\
> >e 27, in 
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR| from 
> > qemu.console_socket import ConsoleSocket
> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR| 
> > ModuleNotFoundError: No module named 'qemu.console_socket'
> 
> Cc'ing Wainer/Cleber in case...
>

I've applied the "[PATCH v4 00/10] tests/vm: Add support for aarch64
VMs" series and this patch (on top of d649689a8) and could not
replicate this issue with "make check-acceptance".

Maybe I'm missing some other patch?

- Cleber.

> >2020-03-11 12:12:30,547 stacktrace   L0045 ERROR|
> >2020-03-11 12:12:30,547 stacktrace   L0046 ERROR|
> >2020-03-11 12:12:30,548 test L0865 DEBUG| Local variables:
> >2020-03-11 12:12:30,561 test L0868 DEBUG|  -> self  > 'avocado.core.test.TestError'>: 
> > 1-./tests/acceptance/machine_mips_malta.py:MaltaMachineFramebuffer.tes\
> >t_mips_malta_i6400_framebuffer_logo_1core
> > 
> > 
> > > ---
> > >   tests/vm/basevm.py | 6 ++
> > >   1 file changed, 6 insertions(+)
> > > 
> > > diff --git a/tests/vm/basevm.py b/tests/vm/basevm.py
> > > index 8400b0e07f65..c53fd354d955 100644
> > > --- a/tests/vm/basevm.py
> > > +++ b/tests/vm/basevm.py
> > > @@ -213,6 +213,9 @@ class BaseVM(object):
> > >   def console_init(self, timeout = 120):
> > >   vm = self._guest
> > >   vm.console_socket.settimeout(timeout)
> > > +self.console_raw_path = os.path.join(vm._temp_dir,
> > > + vm._name + "-console.raw")
> > > +self.console_raw_file = open(self.console_raw_path, 'wb')
> > >   def console_log(self, text):
> > >   for line in 

Re: [PATCH v3 4/5] KVM: Kick resamplefd for split kernel irqchip

[Peter Xu]

On Tue, Mar 17, 2020 at 04:12:00PM -0600, Alex Williamson wrote:
> On Tue, 17 Mar 2020 17:41:08 -0400
> Peter Xu  wrote:
> 
> > On Tue, Mar 17, 2020 at 03:06:46PM -0600, Alex Williamson wrote:
> > 
> > [...]
> > 
> > > > diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
> > > > index 15747fe2c2..81a17cc2b8 100644
> > > > --- a/hw/intc/ioapic.c
> > > > +++ b/hw/intc/ioapic.c
> > > > @@ -236,8 +236,29 @@ void ioapic_eoi_broadcast(int vector)
> > > >  for (n = 0; n < IOAPIC_NUM_PINS; n++) {
> > > >  entry = s->ioredtbl[n];
> > > >  
> > > > -if ((entry & IOAPIC_VECTOR_MASK) != vector ||
> > > > -((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) != 
> > > > IOAPIC_TRIGGER_LEVEL) {
> > > > +if ((entry & IOAPIC_VECTOR_MASK) != vector) {
> > > > +continue;
> > > > +}
> > > > +
> > > > +/*
> > > > + * When IOAPIC is in the userspace while APIC is still in
> > > > + * the kernel (i.e., split irqchip), we have a trick to
> > > > + * kick the resamplefd logic for registered irqfds from
> > > > + * userspace to deactivate the IRQ.  When that happens, it
> > > > + * means the irq bypassed userspace IOAPIC (so the irr and
> > > > + * remote-irr of the table entry should be bypassed too
> > > > + * even if interrupt come).  Still kick the resamplefds if
> > > > + * they're bound to the IRQ, to make sure to EOI the
> > > > + * interrupt for the hardware correctly.
> > > > + *
> > > > + * Note: We still need to go through the irr & remote-irr
> > > > + * operations below because we don't know whether there're
> > > > + * emulated devices that are using/sharing the same IRQ.
> > > > + */
> > > > +kvm_resample_fd_notify(n);
> > > > +
> > > > +if (((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) !=
> > > > +IOAPIC_TRIGGER_LEVEL) {
> > > >  continue;
> > > >  }
> > > >
> > > 
> > > What's the logic for sending resampler notifies before testing if the
> > > ioapic entry is in level triggered mode?  vfio won't use this for
> > > anything other than level triggered.  Inserting it between these checks
> > > confused me and in my testing wasn't necessary.  Thanks,  
> > 
> > I put it there to match the kernel implementation, and IIUC Paolo
> > agreed with that too:
> > 
> > https://patchwork.kernel.org/patch/11407441/#23190969
> > 
> > Since we've discussed a few times here, I think I can talk a bit more
> > on how I understand this in case I was wrong...
> > 
> > Even if we have the fact that all the existing devices that use this
> > code should be using level-triggered IRQs, however... *If* there comes
> > an edge-triggered INTx device and we assign it using vfio-pci, vfio
> > should also mask the IRQ after it generates (according to
> > vfio_intx_handler), is that right?  Then we still need to kick the
> > resamplefd for that does-not-exist device too to make sure it'll work?
> 
> "edge-triggered INTx" is not a thing that exists.  The PCI spec defines
> interrupt pins as:
> 
>   2.2.6. Interrupt Pins (Optional)
> 
>   Interrupts on PCI are optional and defined as "level sensitive,"
>   asserted low (negative true), using open drain output drivers.

Ah OK!  I didn't notice it's a spec-wise answer...

> 
> Masking of interrupts while they're in-service is not done for edge
> triggered interrupts, we assume that being a discrete interrupt is a
> sufficient rate limiter versus a level triggered interrupt, which is
> continuous and can saturate the host.
> 
> If it exists before the level check only to match the kernel, maybe a
> comment or todo item to check whether it's the optimal approach for
> both cases should be in order.  I can't think of any reason why we'd
> need it for the sake of edge triggered vfio interrupts in either place.

I guess the KVM implementation of that is still required for the
kernel PIT implementation as Paolo mentioned.  Since this seems to be
confusing and the userspace does not have a real use case for that,
let me repost this patch only so the userspace resamplefd only reacts
to level triggered interrupts.

Thanks,

-- 
Peter Xu

Re: [PATCH] ext4: Give 32bit personalities 32bit hashes

[Andreas Dilger]

On Mar 17, 2020, at 5:31 AM, Linus Walleij  wrote:
> 
> It was brought to my attention that this bug from 2018 was
> still unresolved: 32 bit emulators like QEMU were given
> 64 bit hashes when running 32 bit emulation on 64 bit systems.
> 
> The personality(2) system call supports to let processes
> indicate that they are 32 bit Linux to the kernel. This
> was suggested by Teo in the original thread, so I just wired
> it up and it solves the problem.
> 
> Programs that need the 32 bit hash only need to issue the
> personality(PER_LINUX32) call and things start working.

I'm generally with with this from the ext4 point of view.

That said, I'd think it would be preferable for ease of use and
compatibility that applications didn't have to be modified
(e.g. have QEMU or glibc internally set PER_LINUX32 for this
process before the 32-bit syscall is called, given that it knows
whether it is emulating a 32-bit runtime or not).

The other way to handle this would be for ARM32 to check the
PER_LINUX32 flag via is_compat_task() so that there wouldn't
need to be any changes to the ext4 code at all?

Cheers, Andreas


> I made a test program like this:
> 
>  #include 
>  #include 
>  #include 
>  #include 
>  #include 
>  #include 
> 
>  int main(int argc, char** argv) {
>DIR* dir;
>personality(PER_LINUX32);
>dir = opendir("/boot");
>printf("dir=%p\n", dir);
>printf("readdir(dir)=%p\n", readdir(dir));
>printf("errno=%d: %s\n", errno, strerror(errno));
>return 0;
>  }
> 
> This was compiled with an ARM32 toolchain from Bootlin using
> glibc 2.28 and thus suffering from the bug.
> 
> Before the patch:
> 
>  $ ./readdir-bug
>  dir=0x86000
>  readdir(dir)=(nil)
>  errno=75: Value too large for defined data type
> 
> After the patch:
> 
>  $ ./readdir-bug
>  dir=0x86000
>  readdir(dir)=0x86020
>  errno=0: Success
> 
> Problem solved.
> 
> Cc: Florian Weimer 
> Cc: Peter Maydell 
> Cc: Andy Lutomirski 
> Cc: sta...@vger.kernel.org
> Suggested-by: Theodore Ts'o 
> Link: https://bugs.launchpad.net/qemu/+bug/1805913
> Link: https://lore.kernel.org/lkml/87bm56vqg4@mid.deneb.enyo.de/
> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=205957
> Signed-off-by: Linus Walleij 
> ---
> fs/ext4/dir.c | 9 +
> 1 file changed, 9 insertions(+)
> 
> diff --git a/fs/ext4/dir.c b/fs/ext4/dir.c
> index 9aa1f75409b0..3faf9edf3e92 100644
> --- a/fs/ext4/dir.c
> +++ b/fs/ext4/dir.c
> @@ -27,6 +27,7 @@
> #include 
> #include 
> #include 
> +#include 
> #include "ext4.h"
> #include "xattr.h"
> 
> @@ -618,6 +619,14 @@ static int ext4_dx_readdir(struct file *file, struct 
> dir_context *ctx)
> 
> static int ext4_dir_open(struct inode * inode, struct file * filp)
> {
> + /*
> +  * If we are currently running e.g. a 32 bit emulator on
> +  * a 64 bit machine, the emulator will indicate that it needs
> +  * a 32 bit personality and thus 32 bit hashes from the file
> +  * system.
> +  */
> + if (personality(current->personality) == PER_LINUX32)
> + filp->f_mode |= FMODE_32BITHASH;
>   if (IS_ENCRYPTED(inode))
>   return fscrypt_get_encryption_info(inode) ? -EACCES : 0;
>   return 0;
> --
> 2.24.1
> 


Cheers, Andreas







signature.asc
Description: Message signed with OpenPGP

Re: [PATCH v3 4/5] KVM: Kick resamplefd for split kernel irqchip

[Alex Williamson]

On Tue, 17 Mar 2020 17:41:08 -0400
Peter Xu  wrote:

> On Tue, Mar 17, 2020 at 03:06:46PM -0600, Alex Williamson wrote:
> 
> [...]
> 
> > > diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
> > > index 15747fe2c2..81a17cc2b8 100644
> > > --- a/hw/intc/ioapic.c
> > > +++ b/hw/intc/ioapic.c
> > > @@ -236,8 +236,29 @@ void ioapic_eoi_broadcast(int vector)
> > >  for (n = 0; n < IOAPIC_NUM_PINS; n++) {
> > >  entry = s->ioredtbl[n];
> > >  
> > > -if ((entry & IOAPIC_VECTOR_MASK) != vector ||
> > > -((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) != 
> > > IOAPIC_TRIGGER_LEVEL) {
> > > +if ((entry & IOAPIC_VECTOR_MASK) != vector) {
> > > +continue;
> > > +}
> > > +
> > > +/*
> > > + * When IOAPIC is in the userspace while APIC is still in
> > > + * the kernel (i.e., split irqchip), we have a trick to
> > > + * kick the resamplefd logic for registered irqfds from
> > > + * userspace to deactivate the IRQ.  When that happens, it
> > > + * means the irq bypassed userspace IOAPIC (so the irr and
> > > + * remote-irr of the table entry should be bypassed too
> > > + * even if interrupt come).  Still kick the resamplefds if
> > > + * they're bound to the IRQ, to make sure to EOI the
> > > + * interrupt for the hardware correctly.
> > > + *
> > > + * Note: We still need to go through the irr & remote-irr
> > > + * operations below because we don't know whether there're
> > > + * emulated devices that are using/sharing the same IRQ.
> > > + */
> > > +kvm_resample_fd_notify(n);
> > > +
> > > +if (((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) !=
> > > +IOAPIC_TRIGGER_LEVEL) {
> > >  continue;
> > >  }
> > >
> > 
> > What's the logic for sending resampler notifies before testing if the
> > ioapic entry is in level triggered mode?  vfio won't use this for
> > anything other than level triggered.  Inserting it between these checks
> > confused me and in my testing wasn't necessary.  Thanks,  
> 
> I put it there to match the kernel implementation, and IIUC Paolo
> agreed with that too:
> 
> https://patchwork.kernel.org/patch/11407441/#23190969
> 
> Since we've discussed a few times here, I think I can talk a bit more
> on how I understand this in case I was wrong...
> 
> Even if we have the fact that all the existing devices that use this
> code should be using level-triggered IRQs, however... *If* there comes
> an edge-triggered INTx device and we assign it using vfio-pci, vfio
> should also mask the IRQ after it generates (according to
> vfio_intx_handler), is that right?  Then we still need to kick the
> resamplefd for that does-not-exist device too to make sure it'll work?

"edge-triggered INTx" is not a thing that exists.  The PCI spec defines
interrupt pins as:

  2.2.6. Interrupt Pins (Optional)

  Interrupts on PCI are optional and defined as "level sensitive,"
  asserted low (negative true), using open drain output drivers.

Masking of interrupts while they're in-service is not done for edge
triggered interrupts, we assume that being a discrete interrupt is a
sufficient rate limiter versus a level triggered interrupt, which is
continuous and can saturate the host.

If it exists before the level check only to match the kernel, maybe a
comment or todo item to check whether it's the optimal approach for
both cases should be in order.  I can't think of any reason why we'd
need it for the sake of edge triggered vfio interrupts in either place.
Thanks,

Alex

Re: [PATCH v4] python/qemu/qmp.py: QMP debug with VM label

[Cleber Rosa]

On Mon, Mar 16, 2020 at 12:32:03PM +0200, Oksana Vohchana wrote:
> QEMUMachine writes some messages to the default logger.
> But it sometimes hard to read the output if we have requests to
> more than one VM.
> This patch adds a label to the logger in the debug mode.
> 
> Signed-off-by: Oksana Vohchana 

Reviewed-by: Cleber Rosa 

Queueing it on my python-next branch.

Thanks!


signature.asc
Description: PGP signature

Re: [PATCH v10 3/3] Acceptance tests: add make targets to download images

[Willian Rampazzo]

On Tue, Mar 17, 2020 at 11:17 AM Cleber Rosa  wrote:
>
> The newly introduced "boot linux" tests make use of Linux images that
> are larger than usual, and fall into what Avocado calls "vmimages",
> and can be referred to by name, version and architecture.
>
> The images can be downloaded automatically during the test. But, to
> make for more reliable test results, this introduces a target that
> will download the vmimages for the architectures that have been
> configured and are available for the currently used distro (Fedora
> 31).
>
> Signed-off-by: Cleber Rosa 
> Reviewed-by: Willian Rampazzo 
> ---
>  tests/Makefile.include | 19 +--
>  1 file changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/tests/Makefile.include b/tests/Makefile.include
> index 67e8fcddda..9c19229a06 100644
> --- a/tests/Makefile.include
> +++ b/tests/Makefile.include
> @@ -20,6 +20,8 @@ check-help:
> @echo " $(MAKE) check-venv   Creates a Python venv for tests"
> @echo " $(MAKE) check-clean  Clean the tests and related data"
> @echo
> +   @echo " $(MAKE) get-vm-imagesDownloads all images used by 
> acceptance tests, according to configured targets (~350 MB each, 1.5 GB max)"
> +   @echo
> @echo
> @echo "The variable SPEED can be set to control the gtester speed 
> setting."
> @echo "Default options are -k and (for $(MAKE) V=1) --verbose; they 
> can be"
> @@ -889,7 +891,20 @@ $(TESTS_RESULTS_DIR):
>
>  check-venv: $(TESTS_VENV_DIR)
>
> -check-acceptance: check-venv $(TESTS_RESULTS_DIR)
> +FEDORA_31_ARCHES_CANDIDATES=$(patsubst ppc64,ppc64le,$(TARGETS))
> +FEDORA_31_ARCHES := x86_64 aarch64 ppc64le s390x
> +FEDORA_31_DOWNLOAD=$(filter 
> $(FEDORA_31_ARCHES),$(FEDORA_31_ARCHES_CANDIDATES))
> +
> +# download one specific Fedora 31 image
> +get-vm-image-fedora-31-%: $(check-venv)
> +   $(call quiet-command, \
> + $(TESTS_VENV_DIR)/bin/python -m avocado vmimage get \
> + --distro=fedora --distro-version=31 --arch=$*)
> +
> +# download all vm images, according to defined targets
> +get-vm-images: $(check-venv) $(patsubst %,get-vm-image-fedora-31-%, 
> $(FEDORA_31_DOWNLOAD))

I tested this target and it works as expected. In this case, also a

Tested-by: Willian Rampazzo 

> +
> +check-acceptance: check-venv $(TESTS_RESULTS_DIR) get-vm-images
> $(call quiet-command, \
>  $(TESTS_VENV_DIR)/bin/python -m avocado \
>  --show=$(AVOCADO_SHOW) run 
> --job-results-dir=$(TESTS_RESULTS_DIR) \
> @@ -900,7 +915,7 @@ check-acceptance: check-venv $(TESTS_RESULTS_DIR)
>
>  # Consolidated targets
>
> -.PHONY: check-block check-qapi-schema check-qtest check-unit check 
> check-clean
> +.PHONY: check-block check-qapi-schema check-qtest check-unit check 
> check-clean get-vm-images
>  check-qapi-schema: check-tests/qapi-schema/frontend 
> check-tests/qapi-schema/doc-good.texi
>  check-qtest: $(patsubst %,check-qtest-%, $(QTEST_TARGETS))
>  ifeq ($(CONFIG_TOOLS),y)
> --
> 2.25.1
>

Re: [PATCH v10 2/3] Acceptance test: add "boot_linux" tests

[Willian Rampazzo]

On Tue, Mar 17, 2020 at 11:17 AM Cleber Rosa  wrote:
>
> This acceptance test, validates that a full blown Linux guest can
> successfully boot in QEMU.  In this specific case, the guest chosen is
> Fedora version 31.
>
>  * x86_64, pc-i440fx and pc-q35 machine types, with TCG and KVM as
>accelerators
>
>  * aarch64 and virt machine type, with TCG and KVM as accelerators
>
>  * ppc64 and pseries machine type with TCG as accelerator
>
>  * s390x and s390-ccw-virtio machine type with TCG as accelerator
>
> The Avocado vmimage utils library is used to download and cache the
> Linux guest images, and from those images a snapshot image is created
> and given to QEMU.  If a qemu-img binary is available in the build
> directory, it's used to create the snapshot image, so that matching
> qemu-system-* and qemu-img are used in the same test run.  If qemu-img
> is not available in the build tree, one is attempted to be found
> installed system-wide (in the $PATH).  If qemu-img is not found in the
> build dir or in the $PATH, the test is canceled.
>
> The method for checking the successful boot is based on "cloudinit"
> and its "phone home" feature.  The guest is given an ISO image with
> the location of the phone home server, and the information to post
> (the instance ID).  Upon receiving the correct information, from the
> guest, the test is considered to have PASSed.
>
> This test is currently limited to user mode networking only, and
> instructs the guest to connect to the "router" address that is hard
> coded in QEMU.
>
> To create the cloudinit ISO image that will be used to configure the
> guest, the pycdlib library is also required and has been added as
> requirement to the virtual environment created by "check-venv".
>
> The console output is read by a separate thread, by means of the
> Avocado datadrainer utility module.
>
> Signed-off-by: Cleber Rosa 
> ---
>  .travis.yml|   2 +-
>  tests/acceptance/boot_linux.py | 222 +
>  tests/requirements.txt |   1 +
>  3 files changed, 224 insertions(+), 1 deletion(-)
>  create mode 100644 tests/acceptance/boot_linux.py
>
> diff --git a/.travis.yml b/.travis.yml
> index b92798ac3b..c460059a7b 100644
> --- a/.travis.yml
> +++ b/.travis.yml
> @@ -315,7 +315,7 @@ jobs:
>  - name: "GCC check-acceptance"
>dist: bionic
>env:
> -- 
> CONFIG="--target-list=aarch64-softmmu,alpha-softmmu,arm-softmmu,m68k-softmmu,microblaze-softmmu,mips-softmmu,mips64el-softmmu,nios2-softmmu,or1k-softmmu,ppc-softmmu,ppc64-softmmu,s390x-softmmu,sparc-softmmu,x86_64-softmmu,xtensa-softmmu"
> +- CONFIG="--enable-tools 
> --target-list=aarch64-softmmu,alpha-softmmu,arm-softmmu,m68k-softmmu,microblaze-softmmu,mips-softmmu,mips64el-softmmu,nios2-softmmu,or1k-softmmu,ppc-softmmu,ppc64-softmmu,s390x-softmmu,sparc-softmmu,x86_64-softmmu,xtensa-softmmu"
>  - TEST_CMD="make check-acceptance"
>after_script:
>  - python3 -c 'import json; r = 
> json.load(open("tests/results/latest/results.json")); [print(t["logfile"]) 
> for t in r["tests"] if t["status"] not in ("PASS", "SKIP")]' | xargs cat
> diff --git a/tests/acceptance/boot_linux.py b/tests/acceptance/boot_linux.py
> new file mode 100644
> index 00..075a386300
> --- /dev/null
> +++ b/tests/acceptance/boot_linux.py
> @@ -0,0 +1,222 @@
> +# Functional test that boots a complete Linux system via a cloud image
> +#
> +# Copyright (c) 2018-2020 Red Hat, Inc.
> +#
> +# Author:
> +#  Cleber Rosa 
> +#
> +# This work is licensed under the terms of the GNU GPL, version 2 or
> +# later.  See the COPYING file in the top-level directory.
> +
> +import os
> +
> +from avocado_qemu import Test, BUILD_DIR
> +
> +from qemu.accel import kvm_available
> +from qemu.accel import tcg_available
> +
> +from avocado.utils import cloudinit
> +from avocado.utils import network
> +from avocado.utils import vmimage
> +from avocado.utils import datadrainer
> +from avocado.utils.path import find_command
> +
> +ACCEL_NOT_AVAILABLE_FMT = "%s accelerator does not seem to be available"
> +KVM_NOT_AVAILABLE = ACCEL_NOT_AVAILABLE_FMT % "KVM"
> +TCG_NOT_AVAILABLE = ACCEL_NOT_AVAILABLE_FMT % "TCG"
> +
> +
> +class BootLinux(Test):
> +"""
> +Boots a Linux system, checking for a successful initialization
> +"""
> +
> +timeout = 900
> +chksum = None
> +
> +def setUp(self):
> +super(BootLinux, self).setUp()
> +self.vm.add_args('-smp', '2')
> +self.vm.add_args('-m', '1024')
> +self.prepare_boot()
> +self.prepare_cloudinit()
> +
> +def prepare_boot(self):
> +self.log.debug('Looking for and selecting a qemu-img binary to be '
> +   'used to create the bootable snapshot image')
> +# If qemu-img has been built, use it, otherwise the system wide one
> +# will be used.  If none is available, the test will cancel.
> +qemu_img = os.path.join(BUILD_DIR, 

Re: [PATCH v3 4/5] KVM: Kick resamplefd for split kernel irqchip

[Peter Xu]

On Tue, Mar 17, 2020 at 03:06:46PM -0600, Alex Williamson wrote:

[...]

> > diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
> > index 15747fe2c2..81a17cc2b8 100644
> > --- a/hw/intc/ioapic.c
> > +++ b/hw/intc/ioapic.c
> > @@ -236,8 +236,29 @@ void ioapic_eoi_broadcast(int vector)
> >  for (n = 0; n < IOAPIC_NUM_PINS; n++) {
> >  entry = s->ioredtbl[n];
> >  
> > -if ((entry & IOAPIC_VECTOR_MASK) != vector ||
> > -((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) != 
> > IOAPIC_TRIGGER_LEVEL) {
> > +if ((entry & IOAPIC_VECTOR_MASK) != vector) {
> > +continue;
> > +}
> > +
> > +/*
> > + * When IOAPIC is in the userspace while APIC is still in
> > + * the kernel (i.e., split irqchip), we have a trick to
> > + * kick the resamplefd logic for registered irqfds from
> > + * userspace to deactivate the IRQ.  When that happens, it
> > + * means the irq bypassed userspace IOAPIC (so the irr and
> > + * remote-irr of the table entry should be bypassed too
> > + * even if interrupt come).  Still kick the resamplefds if
> > + * they're bound to the IRQ, to make sure to EOI the
> > + * interrupt for the hardware correctly.
> > + *
> > + * Note: We still need to go through the irr & remote-irr
> > + * operations below because we don't know whether there're
> > + * emulated devices that are using/sharing the same IRQ.
> > + */
> > +kvm_resample_fd_notify(n);
> > +
> > +if (((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) !=
> > +IOAPIC_TRIGGER_LEVEL) {
> >  continue;
> >  }
> >  
> 
> What's the logic for sending resampler notifies before testing if the
> ioapic entry is in level triggered mode?  vfio won't use this for
> anything other than level triggered.  Inserting it between these checks
> confused me and in my testing wasn't necessary.  Thanks,

I put it there to match the kernel implementation, and IIUC Paolo
agreed with that too:

https://patchwork.kernel.org/patch/11407441/#23190969

Since we've discussed a few times here, I think I can talk a bit more
on how I understand this in case I was wrong...

Even if we have the fact that all the existing devices that use this
code should be using level-triggered IRQs, however... *If* there comes
an edge-triggered INTx device and we assign it using vfio-pci, vfio
should also mask the IRQ after it generates (according to
vfio_intx_handler), is that right?  Then we still need to kick the
resamplefd for that does-not-exist device too to make sure it'll work?

Thanks,

> 
> Alex
> 
> > diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
> > index 141342de98..583a976f8a 100644
> > --- a/include/sysemu/kvm.h
> > +++ b/include/sysemu/kvm.h
> > @@ -555,4 +555,8 @@ int kvm_set_one_reg(CPUState *cs, uint64_t id, void 
> > *source);
> >  int kvm_get_one_reg(CPUState *cs, uint64_t id, void *target);
> >  struct ppc_radix_page_info *kvm_get_radix_page_info(void);
> >  int kvm_get_max_memslots(void);
> > +
> > +/* Notify resamplefd for EOI of specific interrupts. */
> > +void kvm_resample_fd_notify(int gsi);
> > +
> >  #endif
> 

-- 
Peter Xu

Re: [PATCH v6 0/2] Use DIAG318 to set Control Program Name & Version Codes

[Collin Walling]

Please note: a new patch is in the works to extend the SCCB for the SCLP
response for RSCPI. This will help alleviate the issue of losing space 
for CPU

entries. The appropriate patch will be introduced at the beginning of this
series once it is ready for upstream.


Thanks for your patience and understanding,
- Collin

On 1/24/20 5:14 PM, Collin Walling wrote:

Changes from v5 -> v6

 Migration and DeviceObject Code:
 - load/save/needed functions now check if kvm_enabled before calling
 kvm_get/set and has_feat (respectively)

 QEMU->KVM Code:
 - added kvm_s390_* stubs for get/set functions for TCG compilation

 VCPU Discussion:
 - calculate the maximum allowed cpu entries by taking the SCCB size,
 subtracting the offset where the CPU entries begin, then dividing
 by the size of a CPU Entry struct
 - if the number of CPU entries exceeds the maximum allowed entries,
 print a warning and break out of the loop
 - no longer imposing a reduced CPU max

Last post: https://lists.gnu.org/archive/html/qemu-devel/2019-06/msg05535.html

The data associated with DIAGNOSE 0x318 helps to identify the underlying
hypervisor level (pre-determined by an internal set of codes), as well as the
guest environment (such as Linux, z/VM, etc). These patches, in tandem with
KVM, allow this instruction to be enabled at the guest level, and also to
enable migration of this data.

The DIAGNOSE 0x318 instruction is a privileged instruction that is executed by
the Linux kernel once and only once during setup (IPL). This requires
interception by KVM to handle the instruction call safely. The instruction sets
an 8-byte value corresponding to the environment the control program (i.e.
guest) is running with, as well as what hypervisor it is running on.

An update to the analogous KVM patches associated with this patchset are
forthcoming and I will provide a link to the post as a reply to this chain.

Guest support for the diag 318 instruction is accomplished by implementing a
device class, a cpu model feature, and adjusting the Read Info struct. The Read
Info struct adjustment coincidentally reduces the maximum number of VCPUs we
can have for a single guest by one.

The instruction is determined by a Read Info byte 134 bit 0. This new byte
expands into the space of the Read Info SCCB, which also contains CPU entries
at the tail-end of this block of data. Due to this expansion, we lose space for
one CPU entry.

A guest can still run safely with the original 248 maximum CPUs, but will lose
access to the 248th CPU entry, meaning that the hypervisor will be unable to
retrieve any information regarding that CPU (weather this means the guest
will actually run with 247 CPUs when 248 are specified is uncertain to me, but
the guest operates just fine on my end).

A device class is used for this instruction in order to streamline the
migration and reset of the DIAG 318 related data.

A CPU model feature is added for this instruction, appropriately named diag318,
and is available starting with the zEC12 full model, though as long as KVM can
support emulation of this instruction, we can theoretically enable it for _any_
CPU model. It is recommended to explicitly enable the feature via
-cpu ...,diag318=on (or via libvirt feature XML).

Collin L. Walling (2):
   s390/kvm: header sync for diag318
   s390: diagnose 318 info reset and migration support

  hw/s390x/Makefile.objs  |  1 +
  hw/s390x/diag318.c  | 85 +
  hw/s390x/diag318.h  | 40 +
  hw/s390x/s390-virtio-ccw.c  | 17 
  hw/s390x/sclp.c | 13 ++
  include/hw/s390x/sclp.h |  2 +
  linux-headers/asm-s390/kvm.h|  4 ++
  target/s390x/cpu_features.h |  1 +
  target/s390x/cpu_features_def.inc.h |  3 ++
  target/s390x/gen-features.c |  1 +
  target/s390x/kvm-stub.c | 10 +
  target/s390x/kvm.c  | 29 +
  target/s390x/kvm_s390x.h|  2 +
  13 files changed, 208 insertions(+)
  create mode 100644 hw/s390x/diag318.c
  create mode 100644 hw/s390x/diag318.h

[PULL 21/30] qapi: Add feature flags to struct members

[Markus Armbruster]

Signed-off-by: Markus Armbruster 
Reviewed-by: Marc-André Lureau 
Message-Id: <20200317115459.31821-21-arm...@redhat.com>
---
 docs/devel/qapi-code-gen.txt|  4 +++-
 tests/qapi-schema/doc-good.texi |  2 ++
 qapi/introspect.json|  6 +-
 scripts/qapi/expr.py|  3 ++-
 scripts/qapi/introspect.py  |  2 +-
 scripts/qapi/schema.py  | 25 -
 tests/qapi-schema/doc-good.json |  5 -
 tests/qapi-schema/doc-good.out  |  3 +++
 tests/qapi-schema/qapi-schema-test.json |  2 +-
 tests/qapi-schema/qapi-schema-test.out  |  1 +
 tests/qapi-schema/test-qapi.py  |  7 ---
 11 files changed, 46 insertions(+), 14 deletions(-)

diff --git a/docs/devel/qapi-code-gen.txt b/docs/devel/qapi-code-gen.txt
index 43f31b4b63..39ae2cad98 100644
--- a/docs/devel/qapi-code-gen.txt
+++ b/docs/devel/qapi-code-gen.txt
@@ -234,7 +234,9 @@ Syntax:
'*features': FEATURES }
 MEMBERS = { MEMBER, ... }
 MEMBER = STRING : TYPE-REF
-   | STRING : { 'type': TYPE-REF, '*if': COND }
+   | STRING : { 'type': TYPE-REF,
+'*if': COND,
+'*features': FEATURES }
 
 Member 'struct' names the struct type.
 
diff --git a/tests/qapi-schema/doc-good.texi b/tests/qapi-schema/doc-good.texi
index 76b396dae6..7f28fb7a0f 100644
--- a/tests/qapi-schema/doc-good.texi
+++ b/tests/qapi-schema/doc-good.texi
@@ -132,6 +132,8 @@ Not documented
 @table @asis
 @item @code{variant1-feat}
 a feature
+@item @code{member-feat}
+a member feature
 @end table
 
 @end deftp
diff --git a/qapi/introspect.json b/qapi/introspect.json
index da3e176899..b1aabd4cfd 100644
--- a/qapi/introspect.json
+++ b/qapi/introspect.json
@@ -206,11 +206,15 @@
 #   Future extension: if present and non-null, the parameter
 #   is optional, and defaults to this value.
 #
+# @features: names of features associated with the member, in no
+#particular order.  (since 5.0)
+#
 # Since: 2.5
 ##
 { 'struct': 'SchemaInfoObjectMember',
-  'data': { 'name': 'str', 'type': 'str', '*default': 'any' } }
+  'data': { 'name': 'str', 'type': 'str', '*default': 'any',
 # @default's type must be null or match @type
+'*features': [ 'str' ] } }
 
 ##
 # @SchemaInfoObjectVariant:
diff --git a/scripts/qapi/expr.py b/scripts/qapi/expr.py
index f9c4448980..2942520399 100644
--- a/scripts/qapi/expr.py
+++ b/scripts/qapi/expr.py
@@ -167,8 +167,9 @@ def check_type(value, info, source,
allow_optional=True, permit_upper=permit_upper)
 if c_name(key, False) == 'u' or c_name(key, False).startswith('has_'):
 raise QAPISemError(info, "%s uses reserved name" % key_source)
-check_keys(arg, info, key_source, ['type'], ['if'])
+check_keys(arg, info, key_source, ['type'], ['if', 'features'])
 check_if(arg, info, key_source)
+check_features(arg.get('features'), info)
 check_type(arg['type'], info, key_source, allow_array=True)
 
 
diff --git a/scripts/qapi/introspect.py b/scripts/qapi/introspect.py
index a3fa9865db..23652be810 100644
--- a/scripts/qapi/introspect.py
+++ b/scripts/qapi/introspect.py
@@ -173,7 +173,7 @@ const QLitObject %(c_name)s = %(c_string)s;
 obj = {'name': member.name, 'type': self._use_type(member.type)}
 if member.optional:
 obj['default'] = None
-return _make_tree(obj, member.ifcond, None)
+return _make_tree(obj, member.ifcond, member.features)
 
 def _gen_variants(self, tag_name, variants):
 return {'tag': tag_name,
diff --git a/scripts/qapi/schema.py b/scripts/qapi/schema.py
index 59e1f5a395..6ee3677215 100644
--- a/scripts/qapi/schema.py
+++ b/scripts/qapi/schema.py
@@ -668,18 +668,31 @@ class QAPISchemaFeature(QAPISchemaMember):
 
 
 class QAPISchemaObjectTypeMember(QAPISchemaMember):
-def __init__(self, name, info, typ, optional, ifcond=None):
+def __init__(self, name, info, typ, optional, ifcond=None, features=None):
 super().__init__(name, info, ifcond)
 assert isinstance(typ, str)
 assert isinstance(optional, bool)
+for f in features or []:
+assert isinstance(f, QAPISchemaFeature)
+f.set_defined_in(name)
 self._type_name = typ
 self.type = None
 self.optional = optional
+self.features = features or []
 
 def check(self, schema):
 assert self.defined_in
 self.type = schema.resolve_type(self._type_name, self.info,
 self.describe)
+seen = {}
+for f in self.features:
+f.check_clash(self.info, seen)
+
+def connect_doc(self, doc):
+super().connect_doc(doc)
+if doc:
+for f in self.features:
+doc.connect_feature(f)
 
 
 class QAPISchemaVariant(QAPISchemaObjectTypeMember):
@@ -962,7 +975,7 @@ 

[PULL 26/30] qapi: New special feature flag "deprecated"

[Markus Armbruster]

Unlike regular feature flags, the new special feature flag
"deprecated" is recognized by the QAPI generator.  For now, it's only
permitted with commands, events, and struct members.  It will be put
to use shortly.

Signed-off-by: Markus Armbruster 
Message-Id: <20200317115459.31821-26-arm...@redhat.com>
Reviewed-by: Eric Blake 
[Doc typo fixed]
---
 docs/devel/qapi-code-gen.txt| 6 ++
 scripts/qapi/schema.py  | 6 ++
 tests/Makefile.include  | 1 +
 tests/qapi-schema/features-deprecated-type.err  | 2 ++
 tests/qapi-schema/features-deprecated-type.json | 3 +++
 tests/qapi-schema/features-deprecated-type.out  | 0
 tests/qapi-schema/qapi-schema-test.json | 6 +++---
 tests/qapi-schema/qapi-schema-test.out  | 6 +++---
 8 files changed, 24 insertions(+), 6 deletions(-)
 create mode 100644 tests/qapi-schema/features-deprecated-type.err
 create mode 100644 tests/qapi-schema/features-deprecated-type.json
 create mode 100644 tests/qapi-schema/features-deprecated-type.out

diff --git a/docs/devel/qapi-code-gen.txt b/docs/devel/qapi-code-gen.txt
index 39ae2cad98..1967adfa92 100644
--- a/docs/devel/qapi-code-gen.txt
+++ b/docs/devel/qapi-code-gen.txt
@@ -683,6 +683,12 @@ Intended use is to have each feature string signal that 
this build of
 QEMU shows a certain behaviour.
 
 
+ Special features 
+
+Feature "deprecated" marks a command, event, or struct member as
+deprecated.  It is not supported elsewhere so far.
+
+
 === Naming rules and reserved names ===
 
 All names must begin with a letter, and contain only ASCII letters,
diff --git a/scripts/qapi/schema.py b/scripts/qapi/schema.py
index 6ee3677215..78309a00f0 100644
--- a/scripts/qapi/schema.py
+++ b/scripts/qapi/schema.py
@@ -193,6 +193,12 @@ class QAPISchemaType(QAPISchemaEntity):
 return None
 return self.name
 
+def check(self, schema):
+QAPISchemaEntity.check(self, schema)
+if 'deprecated' in [f.name for f in self.features]:
+raise QAPISemError(
+self.info, "feature 'deprecated' is not supported for types")
+
 def describe(self):
 assert self.meta
 return "%s type '%s'" % (self.meta, self.name)
diff --git a/tests/Makefile.include b/tests/Makefile.include
index 67e8fcddda..d1340301b2 100644
--- a/tests/Makefile.include
+++ b/tests/Makefile.include
@@ -242,6 +242,7 @@ qapi-schema += event-case.json
 qapi-schema += event-member-invalid-dict.json
 qapi-schema += event-nest-struct.json
 qapi-schema += features-bad-type.json
+qapi-schema += features-deprecated-type.json
 qapi-schema += features-duplicate-name.json
 qapi-schema += features-if-invalid.json
 qapi-schema += features-missing-name.json
diff --git a/tests/qapi-schema/features-deprecated-type.err 
b/tests/qapi-schema/features-deprecated-type.err
new file mode 100644
index 00..af4ffe20aa
--- /dev/null
+++ b/tests/qapi-schema/features-deprecated-type.err
@@ -0,0 +1,2 @@
+features-deprecated-type.json: In struct 'S':
+features-deprecated-type.json:2: feature 'deprecated' is not supported for 
types
diff --git a/tests/qapi-schema/features-deprecated-type.json 
b/tests/qapi-schema/features-deprecated-type.json
new file mode 100644
index 00..4b5bf5b86e
--- /dev/null
+++ b/tests/qapi-schema/features-deprecated-type.json
@@ -0,0 +1,3 @@
+# Feature 'deprecated' is not supported for types
+{ 'struct': 'S', 'data': {},
+  'features': [ 'deprecated' ] }
diff --git a/tests/qapi-schema/features-deprecated-type.out 
b/tests/qapi-schema/features-deprecated-type.out
new file mode 100644
index 00..e69de29bb2
diff --git a/tests/qapi-schema/qapi-schema-test.json 
b/tests/qapi-schema/qapi-schema-test.json
index f576c337af..6b1f05afa7 100644
--- a/tests/qapi-schema/qapi-schema-test.json
+++ b/tests/qapi-schema/qapi-schema-test.json
@@ -258,7 +258,7 @@
   'data': { 'foo': 'int' },
   'features': [] }
 { 'struct': 'FeatureStruct1',
-  'data': { 'foo': { 'type': 'int', 'features': [ 'member-feature1' ] } },
+  'data': { 'foo': { 'type': 'int', 'features': [ 'deprecated' ] } },
   'features': [ 'feature1' ] }
 { 'struct': 'FeatureStruct2',
   'data': { 'foo': 'int' },
@@ -308,7 +308,7 @@
   'features': [] }
 
 { 'command': 'test-command-features1',
-  'features': [ 'feature1' ] }
+  'features': [ 'deprecated' ] }
 { 'command': 'test-command-features3',
   'features': [ 'feature1', 'feature2' ] }
 
@@ -322,4 +322,4 @@
   'defined(TEST_IF_COND_2)'] } ] }
 
 { 'event': 'TEST-EVENT-FEATURES1',
-  'features': [ 'feature1' ] }
+  'features': [ 'deprecated' ] }
diff --git a/tests/qapi-schema/qapi-schema-test.out 
b/tests/qapi-schema/qapi-schema-test.out
index cd863ae966..891b4101e0 100644
--- a/tests/qapi-schema/qapi-schema-test.out
+++ b/tests/qapi-schema/qapi-schema-test.out
@@ -359,7 +359,7 @@ object FeatureStruct0
 member foo: int optional=False
 object FeatureStruct1
 member 

[PULL 16/30] qapi/introspect: Factor out _make_tree()

[Markus Armbruster]

The value of @qmp_schema_qlit is generated from an expression tree.
Tree nodes are created in several places.  Factor out the common code
into _make_tree().  This isn't much of a win now.  It will pay off
when we add feature flags in the next few commits.

Signed-off-by: Markus Armbruster 
Reviewed-by: Marc-André Lureau 
Message-Id: <20200317115459.31821-16-arm...@redhat.com>
---
 scripts/qapi/introspect.py | 44 +-
 1 file changed, 24 insertions(+), 20 deletions(-)

diff --git a/scripts/qapi/introspect.py b/scripts/qapi/introspect.py
index e4fc9d90f1..a3fa9865db 100644
--- a/scripts/qapi/introspect.py
+++ b/scripts/qapi/introspect.py
@@ -16,6 +16,18 @@ from qapi.schema import (QAPISchemaArrayType, 
QAPISchemaBuiltinType,
  QAPISchemaType)
 
 
+def _make_tree(obj, ifcond, features, extra=None):
+if extra is None:
+extra = {}
+if ifcond:
+extra['if'] = ifcond
+if features:
+obj['features'] = [(f.name, {'if': f.ifcond}) for f in features]
+if extra:
+return (obj, extra)
+return obj
+
+
 def _tree_to_qlit(obj, level=0, suppress_first_indent=False):
 
 def indent(level):
@@ -146,47 +158,38 @@ const QLitObject %(c_name)s = %(c_string)s;
 return self._name(typ.name)
 
 def _gen_tree(self, name, mtype, obj, ifcond, features):
-extra = {}
+extra = None
 if mtype not in ('command', 'event', 'builtin', 'array'):
 if not self._unmask:
 # Output a comment to make it easy to map masked names
 # back to the source when reading the generated output.
-extra['comment'] = '"%s" = %s' % (self._name(name), name)
+extra = {'comment': '"%s" = %s' % (self._name(name), name)}
 name = self._name(name)
 obj['name'] = name
 obj['meta-type'] = mtype
-if features:
-obj['features'] = [(f.name, {'if': f.ifcond}) for f in features]
-if ifcond:
-extra['if'] = ifcond
-if extra:
-self._trees.append((obj, extra))
-else:
-self._trees.append(obj)
+self._trees.append(_make_tree(obj, ifcond, features, extra))
 
 def _gen_member(self, member):
-ret = {'name': member.name, 'type': self._use_type(member.type)}
+obj = {'name': member.name, 'type': self._use_type(member.type)}
 if member.optional:
-ret['default'] = None
-if member.ifcond:
-ret = (ret, {'if': member.ifcond})
-return ret
+obj['default'] = None
+return _make_tree(obj, member.ifcond, None)
 
 def _gen_variants(self, tag_name, variants):
 return {'tag': tag_name,
 'variants': [self._gen_variant(v) for v in variants]}
 
 def _gen_variant(self, variant):
-return ({'case': variant.name, 'type': self._use_type(variant.type)},
-{'if': variant.ifcond})
+obj = {'case': variant.name, 'type': self._use_type(variant.type)}
+return _make_tree(obj, variant.ifcond, None)
 
 def visit_builtin_type(self, name, info, json_type):
 self._gen_tree(name, 'builtin', {'json-type': json_type}, [], None)
 
 def visit_enum_type(self, name, info, ifcond, features, members, prefix):
 self._gen_tree(name, 'enum',
-   {'values':
-[(m.name, {'if': m.ifcond}) for m in members]},
+   {'values': [_make_tree(m.name, m.ifcond, None)
+   for m in members]},
ifcond, features)
 
 def visit_array_type(self, name, info, ifcond, element_type):
@@ -206,7 +209,8 @@ const QLitObject %(c_name)s = %(c_string)s;
 def visit_alternate_type(self, name, info, ifcond, features, variants):
 self._gen_tree(name, 'alternate',
{'members': [
-   ({'type': self._use_type(m.type)}, {'if': m.ifcond})
+   _make_tree({'type': self._use_type(m.type)},
+  m.ifcond, None)
for m in variants.variants]},
ifcond, features)
 
-- 
2.21.1

[PULL 12/30] qapi/schema: Clean up around QAPISchemaEntity.connect_doc()

[Markus Armbruster]

QAPISchemaEntity calls doc.connect_feature() in .check().  Improper
since commit ee1e6a1f6c8 split .connect_doc() off .check().  Move the
call.  Requires making the children call super().connect_doc() as they
should.

Signed-off-by: Markus Armbruster 
Reviewed-by: Marc-André Lureau 
Reviewed-by: Eric Blake 
Message-Id: <20200317115459.31821-12-arm...@redhat.com>
---
 scripts/qapi/schema.py | 13 +
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/scripts/qapi/schema.py b/scripts/qapi/schema.py
index d759308b4e..2a2b495987 100644
--- a/scripts/qapi/schema.py
+++ b/scripts/qapi/schema.py
@@ -53,13 +53,13 @@ class QAPISchemaEntity:
 seen = {}
 for f in self.features:
 f.check_clash(self.info, seen)
-if self.doc:
-self.doc.connect_feature(f)
-
 self._checked = True
 
 def connect_doc(self, doc=None):
-pass
+doc = doc or self.doc
+if doc:
+for f in self.features:
+doc.connect_feature(f)
 
 def check_doc(self):
 if self.doc:
@@ -250,6 +250,7 @@ class QAPISchemaEnumType(QAPISchemaType):
 m.check_clash(self.info, seen)
 
 def connect_doc(self, doc=None):
+super().connect_doc(doc)
 doc = doc or self.doc
 if doc:
 for m in self.members:
@@ -392,6 +393,7 @@ class QAPISchemaObjectType(QAPISchemaType):
 m.check_clash(info, seen)
 
 def connect_doc(self, doc=None):
+super().connect_doc(doc)
 doc = doc or self.doc
 if doc:
 if self.base and self.base.is_implicit():
@@ -667,6 +669,7 @@ class QAPISchemaAlternateType(QAPISchemaType):
 types_seen[qt] = v.name
 
 def connect_doc(self, doc=None):
+super().connect_doc(doc)
 doc = doc or self.doc
 if doc:
 for v in self.variants.variants:
@@ -733,6 +736,7 @@ class QAPISchemaCommand(QAPISchemaEntity):
 % self.ret_type.describe())
 
 def connect_doc(self, doc=None):
+super().connect_doc(doc)
 doc = doc or self.doc
 if doc:
 if self.arg_type and self.arg_type.is_implicit():
@@ -775,6 +779,7 @@ class QAPISchemaEvent(QAPISchemaEntity):
 % self.arg_type.describe())
 
 def connect_doc(self, doc=None):
+super().connect_doc(doc)
 doc = doc or self.doc
 if doc:
 if self.arg_type and self.arg_type.is_implicit():
-- 
2.21.1

[PULL 18/30] qapi/schema: Reorder classes so related ones are together

[Markus Armbruster]

Move QAPISchemaAlternateType up some, so that all QAPISchemaFOOType
are together.  Move QAPISchemaObjectTypeVariants right behind its
users.

Signed-off-by: Markus Armbruster 
Reviewed-by: Marc-André Lureau 
Message-Id: <20200317115459.31821-18-arm...@redhat.com>
---
 scripts/qapi/schema.py | 284 -
 1 file changed, 142 insertions(+), 142 deletions(-)

diff --git a/scripts/qapi/schema.py b/scripts/qapi/schema.py
index 4d8ad67303..0acf8b466f 100644
--- a/scripts/qapi/schema.py
+++ b/scripts/qapi/schema.py
@@ -444,82 +444,72 @@ class QAPISchemaObjectType(QAPISchemaType):
 self.members, self.variants)
 
 
-class QAPISchemaMember:
-""" Represents object members, enum members and features """
-role = 'member'
-
-def __init__(self, name, info, ifcond=None):
-assert isinstance(name, str)
-self.name = name
-self.info = info
-self.ifcond = ifcond or []
-self.defined_in = None
-
-def set_defined_in(self, name):
-assert not self.defined_in
-self.defined_in = name
-
-def check_clash(self, info, seen):
-cname = c_name(self.name)
-if cname in seen:
-raise QAPISemError(
-info,
-"%s collides with %s"
-% (self.describe(info), seen[cname].describe(info)))
-seen[cname] = self
-
-def describe(self, info):
-role = self.role
-defined_in = self.defined_in
-assert defined_in
-
-if defined_in.startswith('q_obj_'):
-# See QAPISchema._make_implicit_object_type() - reverse the
-# mapping there to create a nice human-readable description
-defined_in = defined_in[6:]
-if defined_in.endswith('-arg'):
-# Implicit type created for a command's dict 'data'
-assert role == 'member'
-role = 'parameter'
-elif defined_in.endswith('-base'):
-# Implicit type created for a flat union's dict 'base'
-role = 'base ' + role
-else:
-# Implicit type created for a simple union's branch
-assert defined_in.endswith('-wrapper')
-# Unreachable and not implemented
-assert False
-elif defined_in.endswith('Kind'):
-# See QAPISchema._make_implicit_enum_type()
-# Implicit enum created for simple union's branches
-assert role == 'value'
-role = 'branch'
-elif defined_in != info.defn_name:
-return "%s '%s' of type '%s'" % (role, self.name, defined_in)
-return "%s '%s'" % (role, self.name)
-
-
-class QAPISchemaEnumMember(QAPISchemaMember):
-role = 'value'
-
-
-class QAPISchemaFeature(QAPISchemaMember):
-role = 'feature'
-
-
-class QAPISchemaObjectTypeMember(QAPISchemaMember):
-def __init__(self, name, info, typ, optional, ifcond=None):
-super().__init__(name, info, ifcond)
-assert isinstance(typ, str)
-assert isinstance(optional, bool)
-self._type_name = typ
-self.type = None
-self.optional = optional
+class QAPISchemaAlternateType(QAPISchemaType):
+meta = 'alternate'
+
+def __init__(self, name, info, doc, ifcond, features, variants):
+super().__init__(name, info, doc, ifcond, features)
+assert isinstance(variants, QAPISchemaObjectTypeVariants)
+assert variants.tag_member
+variants.set_defined_in(name)
+variants.tag_member.set_defined_in(self.name)
+self.variants = variants
 
 def check(self, schema):
-assert self.defined_in
-self.type = schema.resolve_type(self._type_name, self.info,
-self.describe)
+super().check(schema)
+self.variants.tag_member.check(schema)
+# Not calling self.variants.check_clash(), because there's nothing
+# to clash with
+self.variants.check(schema, {})
+# Alternate branch names have no relation to the tag enum values;
+# so we have to check for potential name collisions ourselves.
+seen = {}
+types_seen = {}
+for v in self.variants.variants:
+v.check_clash(self.info, seen)
+qtype = v.type.alternate_qtype()
+if not qtype:
+raise QAPISemError(
+self.info,
+"%s cannot use %s"
+% (v.describe(self.info), v.type.describe()))
+conflicting = set([qtype])
+if qtype == 'QTYPE_QSTRING':
+if isinstance(v.type, QAPISchemaEnumType):
+for m in v.type.members:
+if m.name in ['on', 'off']:
+conflicting.add('QTYPE_QBOOL')
+if re.match(r'[-+0-9.]', m.name):
+# lazy, could be tightened
+   

[PULL 24/30] qapi: Simplify how qmp_dispatch() gets the request ID

[Markus Armbruster]

We convert the request object to a QDict twice: first in
qmp_dispatch() to get the request ID, and then again in
qmp_dispatch_check_obj(), which converts to QDict, then checks and
returns it.  We can't get the request ID from the latter, because it's
null when the qdict flunks the checks.

Move the checked conversion to QDict from qmp_dispatch_check_obj() to
qmp_dispatch(), and drop the duplicate there.

Signed-off-by: Markus Armbruster 
Reviewed-by: Marc-André Lureau 
Message-Id: <20200317115459.31821-24-arm...@redhat.com>
---
 qapi/qmp-dispatch.c | 23 ---
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/qapi/qmp-dispatch.c b/qapi/qmp-dispatch.c
index 550d1fe8d2..91e50fa0dd 100644
--- a/qapi/qmp-dispatch.c
+++ b/qapi/qmp-dispatch.c
@@ -19,20 +19,13 @@
 #include "sysemu/runstate.h"
 #include "qapi/qmp/qbool.h"
 
-static QDict *qmp_dispatch_check_obj(const QObject *request, bool allow_oob,
+static QDict *qmp_dispatch_check_obj(QDict *dict, bool allow_oob,
  Error **errp)
 {
 const char *exec_key = NULL;
 const QDictEntry *ent;
 const char *arg_name;
 const QObject *arg_obj;
-QDict *dict;
-
-dict = qobject_to(QDict, request);
-if (!dict) {
-error_setg(errp, "QMP input must be a JSON object");
-return NULL;
-}
 
 for (ent = qdict_first(dict); ent;
  ent = qdict_next(dict, ent)) {
@@ -103,13 +96,21 @@ QDict *qmp_dispatch(QmpCommandList *cmds, QObject *request,
 const char *command;
 QDict *args;
 QmpCommand *cmd;
-QDict *dict = qobject_to(QDict, request);
-QObject *id = dict ? qdict_get(dict, "id") : NULL;
+QDict *dict;
+QObject *id;
 QObject *ret = NULL;
 QDict *rsp = NULL;
 
-dict = qmp_dispatch_check_obj(request, allow_oob, );
+dict = qobject_to(QDict, request);
 if (!dict) {
+id = NULL;
+error_setg(, "QMP input must be a JSON object");
+goto out;
+}
+
+id = qdict_get(dict, "id");
+
+if (!qmp_dispatch_check_obj(dict, allow_oob, )) {
 goto out;
 }
 
-- 
2.21.1

Re: [PATCH v3 4/5] KVM: Kick resamplefd for split kernel irqchip

[Alex Williamson]

On Tue, 17 Mar 2020 15:50:41 -0400
Peter Xu  wrote:

> This is majorly only for X86 because that's the only one that supports
> split irqchip for now.
> 
> When the irqchip is split, we face a dilemma that KVM irqfd will be
> enabled, however the slow irqchip is still running in the userspace.
> It means that the resamplefd in the kernel irqfds won't take any
> effect and it will miss to ack INTx interrupts on EOIs.
> 
> One example is split irqchip with VFIO INTx, which will break if we
> use the VFIO INTx fast path.
> 
> This patch can potentially supports the VFIO fast path again for INTx,
> that the IRQ delivery will still use the fast path, while we don't
> need to trap MMIOs in QEMU for the device to emulate the EIOs (see the
> callers of vfio_eoi() hook).  However the EOI of the INTx will still
> need to be done from the userspace by caching all the resamplefds in
> QEMU and kick properly for IOAPIC EOI broadcast.
> 
> This is tricky because in this case the userspace ioapic irr &
> remote-irr will be bypassed.  However such a change will greatly boost
> performance for assigned devices using INTx irqs (TCP_RR boosts 46%
> after this patch applied).
> 
> When the userspace is responsible for the resamplefd kickup, don't
> register it on the kvm_irqfd anymore, because on newer kernels (after
> commit 654f1f13ea56, 5.2+) the KVM_IRQFD will fail if with both split
> irqchip and resamplefd.  This will make sure that the fast path will
> work for all supported kernels.
> 
> https://patchwork.kernel.org/patch/10738541/#22609933
> 
> Suggested-by: Paolo Bonzini 
> Signed-off-by: Peter Xu 
> ---
>  accel/kvm/kvm-all.c| 79 --
>  accel/kvm/trace-events |  1 +
>  hw/intc/ioapic.c   | 25 +++--
>  include/sysemu/kvm.h   |  4 +++
>  4 files changed, 105 insertions(+), 4 deletions(-)
> 
> diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
> index d49b74512a..9a85fd1b8f 100644
> --- a/accel/kvm/kvm-all.c
> +++ b/accel/kvm/kvm-all.c
> @@ -159,9 +159,59 @@ static const KVMCapabilityInfo 
> kvm_required_capabilites[] = {
>  static NotifierList kvm_irqchip_change_notifiers =
>  NOTIFIER_LIST_INITIALIZER(kvm_irqchip_change_notifiers);
>  
> +struct KVMResampleFd {
> +int gsi;
> +EventNotifier *resample_event;
> +QLIST_ENTRY(KVMResampleFd) node;
> +};
> +typedef struct KVMResampleFd KVMResampleFd;
> +
> +/*
> + * Only used with split irqchip where we need to do the resample fd
> + * kick for the kernel from userspace.
> + */
> +static QLIST_HEAD(, KVMResampleFd) kvm_resample_fd_list =
> +QLIST_HEAD_INITIALIZER(kvm_resample_fd_list);
> +
>  #define kvm_slots_lock(kml)  qemu_mutex_lock(&(kml)->slots_lock)
>  #define kvm_slots_unlock(kml)qemu_mutex_unlock(&(kml)->slots_lock)
>  
> +static inline void kvm_resample_fd_remove(int gsi)
> +{
> +KVMResampleFd *rfd;
> +
> +QLIST_FOREACH(rfd, _resample_fd_list, node) {
> +if (rfd->gsi == gsi) {
> +QLIST_REMOVE(rfd, node);
> +g_free(rfd);
> +break;
> +}
> +}
> +}
> +
> +static inline void kvm_resample_fd_insert(int gsi, EventNotifier *event)
> +{
> +KVMResampleFd *rfd = g_new0(KVMResampleFd, 1);
> +
> +rfd->gsi = gsi;
> +rfd->resample_event = event;
> +
> +QLIST_INSERT_HEAD(_resample_fd_list, rfd, node);
> +}
> +
> +void kvm_resample_fd_notify(int gsi)
> +{
> +KVMResampleFd *rfd;
> +
> +QLIST_FOREACH(rfd, _resample_fd_list, node) {
> +if (rfd->gsi == gsi) {
> +event_notifier_set(rfd->resample_event);
> +trace_kvm_resample_fd_notify(gsi);
> +return;
> +}
> +}
> +}
> +
>  int kvm_get_max_memslots(void)
>  {
>  KVMState *s = KVM_STATE(current_accel());
> @@ -1642,8 +1692,33 @@ static int kvm_irqchip_assign_irqfd(KVMState *s, 
> EventNotifier *event,
>  };
>  
>  if (rfd != -1) {
> -irqfd.flags |= KVM_IRQFD_FLAG_RESAMPLE;
> -irqfd.resamplefd = rfd;
> +assert(assign);
> +if (kvm_irqchip_is_split()) {
> +/*
> + * When the slow irqchip (e.g. IOAPIC) is in the
> + * userspace, KVM kernel resamplefd will not work because
> + * the EOI of the interrupt will be delivered to userspace
> + * instead, so the KVM kernel resamplefd kick will be
> + * skipped.  The userspace here mimics what the kernel
> + * provides with resamplefd, remember the resamplefd and
> + * kick it when we receive EOI of this IRQ.
> + *
> + * This is hackery because IOAPIC is mostly bypassed
> + * (except EOI broadcasts) when irqfd is used.  However
> + * this can bring much performance back for split irqchip
> + * with INTx IRQs (for VFIO, this gives 93% perf of the
> + * full fast path, which is 46% perf boost comparing to
> + * the INTx slow path).
> + */
> +  

[PULL 14/30] qapi: Consistently put @features parameter right after @ifcond

[Markus Armbruster]

Signed-off-by: Markus Armbruster 
Reviewed-by: Marc-André Lureau 
Reviewed-by: Eric Blake 
Message-Id: <20200317115459.31821-14-arm...@redhat.com>
---
 scripts/qapi/commands.py   |  6 +++---
 scripts/qapi/doc.py| 10 +-
 scripts/qapi/introspect.py | 10 +-
 scripts/qapi/schema.py | 36 --
 scripts/qapi/types.py  |  4 ++--
 scripts/qapi/visit.py  |  4 ++--
 tests/qapi-schema/test-qapi.py | 10 +-
 7 files changed, 39 insertions(+), 41 deletions(-)

diff --git a/scripts/qapi/commands.py b/scripts/qapi/commands.py
index 0e13e82989..bc30876c88 100644
--- a/scripts/qapi/commands.py
+++ b/scripts/qapi/commands.py
@@ -283,9 +283,9 @@ void %(c_prefix)sqmp_init_marshal(QmpCommandList *cmds);
   prefix=self._prefix))
 self._genc.add(gen_registry(self._regy.get_content(), self._prefix))
 
-def visit_command(self, name, info, ifcond, arg_type, ret_type, gen,
-  success_response, boxed, allow_oob, allow_preconfig,
-  features):
+def visit_command(self, name, info, ifcond, features,
+  arg_type, ret_type, gen, success_response, boxed,
+  allow_oob, allow_preconfig):
 if not gen:
 return
 # FIXME: If T is a user-defined type, the user is responsible
diff --git a/scripts/qapi/doc.py b/scripts/qapi/doc.py
index 36e823338b..92f584edcf 100644
--- a/scripts/qapi/doc.py
+++ b/scripts/qapi/doc.py
@@ -249,8 +249,8 @@ class QAPISchemaGenDocVisitor(QAPISchemaVisitor):
 texi_members(doc, 'Values',
  member_func=texi_enum_value)))
 
-def visit_object_type(self, name, info, ifcond, base, members, variants,
-  features):
+def visit_object_type(self, name, info, ifcond, features,
+  base, members, variants):
 doc = self.cur_doc
 if base and base.is_implicit():
 base = None
@@ -262,9 +262,9 @@ class QAPISchemaGenDocVisitor(QAPISchemaVisitor):
 self._gen.add(texi_type('Alternate', doc, ifcond,
 texi_members(doc, 'Members')))
 
-def visit_command(self, name, info, ifcond, arg_type, ret_type, gen,
-  success_response, boxed, allow_oob, allow_preconfig,
-  features):
+def visit_command(self, name, info, ifcond, features,
+  arg_type, ret_type, gen, success_response, boxed,
+  allow_oob, allow_preconfig):
 doc = self.cur_doc
 self._gen.add(texi_msg('Command', doc, ifcond,
texi_arguments(doc,
diff --git a/scripts/qapi/introspect.py b/scripts/qapi/introspect.py
index 2e9e00aa1f..b54910510d 100644
--- a/scripts/qapi/introspect.py
+++ b/scripts/qapi/introspect.py
@@ -193,8 +193,8 @@ const QLitObject %(c_name)s = %(c_string)s;
 self._gen_qlit('[' + element + ']', 'array', {'element-type': element},
ifcond, None)
 
-def visit_object_type_flat(self, name, info, ifcond, members, variants,
-   features):
+def visit_object_type_flat(self, name, info, ifcond, features,
+   members, variants):
 obj = {'members': [self._gen_member(m) for m in members]}
 if variants:
 obj.update(self._gen_variants(variants.tag_member.name,
@@ -209,9 +209,9 @@ const QLitObject %(c_name)s = %(c_string)s;
for m in variants.variants]},
ifcond, features)
 
-def visit_command(self, name, info, ifcond, arg_type, ret_type, gen,
-  success_response, boxed, allow_oob, allow_preconfig,
-  features):
+def visit_command(self, name, info, ifcond, features,
+  arg_type, ret_type, gen, success_response, boxed,
+  allow_oob, allow_preconfig):
 arg_type = arg_type or self._schema.the_empty_object_type
 ret_type = ret_type or self._schema.the_empty_object_type
 obj = {'arg-type': self._use_type(arg_type),
diff --git a/scripts/qapi/schema.py b/scripts/qapi/schema.py
index 22238005ff..958756ecd6 100644
--- a/scripts/qapi/schema.py
+++ b/scripts/qapi/schema.py
@@ -115,20 +115,20 @@ class QAPISchemaVisitor:
 def visit_array_type(self, name, info, ifcond, element_type):
 pass
 
-def visit_object_type(self, name, info, ifcond, base, members, variants,
-  features):
+def visit_object_type(self, name, info, ifcond, features,
+  base, members, variants):
 pass
 
-def visit_object_type_flat(self, name, info, ifcond, members, variants,
-   features):
+def visit_object_type_flat(self, name, info, ifcond, features,
+  

Re: [PATCH v4 27/34] qemu-options: New -compat to set policy for deprecated interfaces

[Eric Blake]

On 3/17/20 6:54 AM, Markus Armbruster wrote:

Policy is separate for input and output.

Input policy can be "accept" (accept silently), or "reject" (reject
the request with an error).

Output policy can be "accept" (pass on unchanged), or "hide" (filter
out the deprecated parts).

Default is "accept".  Policies other than "accept" are implemented
later in this series.

For now, -compat covers only syntactic aspects of QMP, i.e. stuff
tagged with feature 'deprecated'.  We may want to extend it to cover
semantic aspects, CLI, and experimental features.

The option is experimental.


On IRC, we decided that it's probably not worth shoe-horning this (and 
the rest of the series) into 5.0, given the experimental nature.  Still, 
I'll go ahead and review, so we can settle on things early in 5.1.




Signed-off-by: Markus Armbruster 
---



+++ b/qapi/compat.json
@@ -0,0 +1,51 @@
+# -*- Mode: Python -*-
+
+##
+# = Compatibility policy
+##
+
+##
+# @CompatPolicyInput:
+#
+# Policy for handling "funny" input.
+#
+# @accept: Accept silently
+# @reject: Reject with an error
+#
+# Since: 5.0


Of course, now that we're slipping this, you'll have to s/5.0/5.1/g over 
the remaining patches.  I won't point it out further.



+##
+# @CompatPolicy:
+#
+# Policy for handling deprecated management interfaces.
+#
+# This is intended for testing users of the management interfaces.
+#
+# Limitation: covers only syntactic aspects of QMP, i.e. stuff tagged
+# with feature 'deprecated'.  We may want to extend it to cover
+# semantic aspects, CLI, and experimental features.


Hiding/rejecting x- interfaces is probably the easiest of these, but I 
agree that leaving this open-ended to add further coverage (or even 
additional modes) is still reasonable.



+#
+# @deprecated-input: how to handle deprecated input (default 'accept')
+# @deprecated-output: how to handle deprecated output (default 'accept')
+#
+# Since: 5.0
+##
+{ 'struct': 'CompatPolicy',
+  'data': { '*deprecated-input': 'CompatPolicyInput',
+'*deprecated-output': 'CompatPolicyOutput' } }


For example, adding
'*experimental-input': 'CompatPolicyInput'
would make it easy to hard-code failure on attempt to use x-* commands.



+++ b/include/qapi/compat-policy.h
@@ -0,0 +1,20 @@
+/*
+ * Policy for handling "funny" management interfaces
+ *
+ * Copyright (C) 2019 Red Hat, Inc.


You've had this in-tree for a while. I'll leave it up to you if you want 
to add 2020.



+ *
+ * Authors:
+ *  Markus Armbruster ,
+ *


Ending with a comma is odd.  Is the Authors: snippet even necessary, or 
are we better off relying on git history (which tends to be more 
accurate anyway)?



+ * This work is licensed under the terms of the GNU GPL, version 2 or
+ * later.  See the COPYING file in the top-level directory.
+ */


Are we trying to use SPDX tags in more files?


+++ b/qemu-options.hx
@@ -3357,6 +3357,26 @@ DEFHEADING()
  
  DEFHEADING(Debug/Expert options:)
  
+DEF("compat", HAS_ARG, QEMU_OPTION_compat,

+"-compat 
[deprecated-input=accept|reject][,deprecated-output=accept|hide]\n"
+"Policy for handling deprecated management interfaces\n",
+QEMU_ARCH_ALL)
+SRST
+``-compat 
[deprecated-input=@var{input-policy}][,deprecated-output=@var{output-policy}]``
+Set policy for handling deprecated management interfaces (experimental):


We'll eventually want to drop (experimental), especially if we get all 
the rest of this into 5.1.


But for now this looks like a good start.

--
Eric Blake, Principal Software Engineer
Red Hat, Inc.   +1-919-301-3226
Virtualization:  qemu.org | libvirt.org

Re: [PULL v3 00/62] Misc patches for soft freeze

[Peter Maydell]

On Tue, 17 Mar 2020 at 15:30, Paolo Bonzini  wrote:
>
> The following changes since commit a98135f727595382e200d04c2996e868b7925a01:
>
>   Merge remote-tracking branch 
> 'remotes/kraxel/tags/vga-20200316-pull-request' into staging (2020-03-16 
> 14:55:59 +)
>
> are available in the git repository at:
>
>
>   git://github.com/bonzini/qemu.git tags/for-upstream
>
> for you to fetch changes up to 32b9523ad5b44dea87792d5d8f71a87e8cc5803b:
>
>   hw/arm: Let devices own the MemoryRegion they create (2020-03-17 15:18:50 
> +0100)
>
> 
> * Bugfixes all over the place
> * get/set_uint cleanups (Felipe)
> * Lock guard support (Stefan)
> * MemoryRegion ownership cleanup (Philippe)
> * AVX512 optimization for buffer_is_zero (Robert)
>

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/5.0
for any user-visible changes.

-- PMM

[PULL 10/30] tests/test-qmp-event: Use qobject_is_equal()

[Markus Armbruster]

Locally defined helper qdict_cmp_simple() implements just enough of a
comparison to serve here.  Replace it by qobject_is_equal(), which
implements all of it.

Signed-off-by: Markus Armbruster 
Reviewed-by: Marc-André Lureau 
Message-Id: <20200317115459.31821-10-arm...@redhat.com>
---
 tests/test-qmp-event.c | 66 +-
 1 file changed, 1 insertion(+), 65 deletions(-)

diff --git a/tests/test-qmp-event.c b/tests/test-qmp-event.c
index 430001e622..d64066139c 100644
--- a/tests/test-qmp-event.c
+++ b/tests/test-qmp-event.c
@@ -28,73 +28,9 @@ typedef struct TestEventData {
 QDict *expect;
 } TestEventData;
 
-typedef struct QDictCmpData {
-QDict *expect;
-bool result;
-} QDictCmpData;
-
 TestEventData *test_event_data;
 static GMutex test_event_lock;
 
-/* Only compares bool, int, string */
-static
-void qdict_cmp_do_simple(const char *key, QObject *obj1, void *opaque)
-
-{
-QObject *obj2;
-QDictCmpData d_new, *d = opaque;
-int64_t val1, val2;
-
-if (!d->result) {
-return;
-}
-
-obj2 = qdict_get(d->expect, key);
-if (!obj2) {
-d->result = false;
-return;
-}
-
-if (qobject_type(obj1) != qobject_type(obj2)) {
-d->result = false;
-return;
-}
-
-switch (qobject_type(obj1)) {
-case QTYPE_QBOOL:
-d->result = (qbool_get_bool(qobject_to(QBool, obj1)) ==
- qbool_get_bool(qobject_to(QBool, obj2)));
-return;
-case QTYPE_QNUM:
-g_assert(qnum_get_try_int(qobject_to(QNum, obj1), ));
-g_assert(qnum_get_try_int(qobject_to(QNum, obj2), ));
-d->result = val1 == val2;
-return;
-case QTYPE_QSTRING:
-d->result = g_strcmp0(qstring_get_str(qobject_to(QString, obj1)),
-  qstring_get_str(qobject_to(QString, obj2))) == 0;
-return;
-case QTYPE_QDICT:
-d_new.expect = qobject_to(QDict, obj2);
-d_new.result = true;
-qdict_iter(qobject_to(QDict, obj1), qdict_cmp_do_simple, _new);
-d->result = d_new.result;
-return;
-default:
-abort();
-}
-}
-
-static bool qdict_cmp_simple(QDict *a, QDict *b)
-{
-QDictCmpData d;
-
-d.expect = b;
-d.result = true;
-qdict_iter(a, qdict_cmp_do_simple, );
-return d.result;
-}
-
 void test_qapi_event_emit(test_QAPIEvent event, QDict *d)
 {
 QDict *t;
@@ -115,7 +51,7 @@ void test_qapi_event_emit(test_QAPIEvent event, QDict *d)
 
 qdict_del(d, "timestamp");
 
-g_assert(qdict_cmp_simple(d, test_event_data->expect));
+g_assert(qobject_is_equal(QOBJECT(d), QOBJECT(test_event_data->expect)));
 
 }
 
-- 
2.21.1