[Bug 1835694] Re: hardware-based time keeping

[Abdulla]

not resolved

** Changed in: qemu
   Status: Incomplete => New

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1835694

Title:
  hardware-based time keeping

Status in QEMU:
  New

Bug description:
  Hi all,

  I hope you're all doing well.

  As i was looking for a solution for a particular problem in Qemu/KVM
  virtualization.

  My issue is that I have a virtual machine that runs well in VMware and when
  I migrated that to Qemu/KVM-enabled environment, it didn't work! I figured
  out that under VMware hypervisor, VMware supplies CPU TSC and Performance
  Counters values to the guest VM with the option
  "monitor_control.pseudo_perfctr = TRUE" set the vmx configuration file,
  Ref.: https://www.vmware.com/pdf/vmware_timekeeping.pdf

  My question is, is there any similar option in Qemu/KVM-enabled environment
  that I can use to get my VM working the same way as in the VMware
  environment?

  I almost tried all options in Qemu with regards to CPU but no avail.

  To elaborate more, the VM I'm trying to port under Qemu/KVM environment is
  a an old version of Cisco virtual ASA Firewall. The VM image is actually
  meant to be run under VMware ESXi and with that
  "*monitor_control.pseudo_perfctr
  = TRUE*" option it can also run in Vware Workstation as well. *Yes, this
  option that makes it run under VMware and if it's removed from the
  configuration vmx file then the VM boots half way and crashes the same way
  it crashes under Qemu*. That dictates it's the option in interest that
  needs to be found in Qemu/KVM. I have a copy of this VM in the below link
  in case you would like to try its behavior in under VMware. I downloaded it
  from a youtube previously to test it out:

  https://drive.google.com/open?id=1SEXws18hoj2sWGk8iFqqH8RpBZsBNpRH

  Once you power on the VM you can telnet to 127.0.0.1 on port 3000 to see
  the boot process. If you remove that option i mentioned to you and boot the
  VM again you'll see the crashing in process.

  
  I've converted that vmdk disk images into Qemu disks "qcow2" format and i
  ran them using the below command line on Ubuntu:

  /opt/qemu/bin/qemu-system-x86_64 -L -nographic -device
  e1000-82545em,netdev=net0,mac=50:00:00:6a:00:00 -netdev
  tap,id=net0,ifname=vunl0_33_0,script=no -device
  e1000-82545em,netdev=net1,mac=50:00:00:6a:00:01 -netdev
  tap,id=net1,ifname=vunl0_33_1,script=no -device
  e1000-82545em,netdev=net2,mac=50:00:00:6a:00:02 -netdev
  tap,id=net2,ifname=vunl0_33_2,script=no -device
  e1000-82545em,netdev=net3,mac=50:00:00:6a:00:03 -netdev
  tap,id=net3,ifname=vunl0_33_3,script=no -machine type=pc-1.0  *-cpu
  host,migratable=off,invtsc=on,pmu=on* -m 4096 -hda hda.qcow2 -hdb hdb.qcow2
  -serial telnet:0.0.0.0:3000,server,nowait -monitor
  tcp:127.0.0.1:42379,server,nowait
  -nographic -display none -enable-kvm

  
  Once you power on the VM you can telnet to xx.xx.xx.xx 3000 (where the xx
  IP is the Ubuntu machine IP) to see the crashing in process. You may need
  to wait for a while for the status messages to appear in the terminal
  window.

  I assume it's a cpu issue because in page 9 of the Vmware pdf reference
  file; it says there are machine instructions become available when this
  option "*monitor_control.pseudo_perfctr = TRUE*" is enabled:

  The following machine instructions then become available:

  InstructionTime ValueReturned
  rdpmc   0x1   Physical host TSC
  rdpmc   0x10001   Elapsed real time in ns
  rdpmc   0x10002   Elapsed apparent time in ns

  Therefore, I used many of the Qemu cpu options such as these:

  -cpu host,migratable=no,+invtsc (ref: https://wiki.qemu.org/ChangeLog/2.1)
  -cpu host, tsc-frequency= (ref: https://lists.gnu.org/archive/
  html/qemu-devel/2017-01/msg03555.html)
   -cpu host,migratable=off,invtsc=true,pmu=true

  Not sure if i'm hitting the wrong option!

  The log I'm getting when the VM boots up looks like the following crash
  happens at the blue colored log:

  

  Loading...

  Starting image verification
  Hash Computation:100% Done!
  Computed Hash   SHA2: 63c1e8aa9de3d0c6e738dc91be8e1784
5caf64af4cf06cf6a3c5da7200d478dd
938d380d2b1064f6a349401c7860f50e
cc4eeb98a0ae16c097dbc9447d4d6626

  Get key records from key storage: Primary, key_store_type: 2
  Embedded Hash   SHA2: 63c1e8aa9de3d0c6e738dc91be8e1784
5caf64af4cf06cf6a3c5da7200d478dd
938d380d2b1064f6a349401c7860f50e
cc4eeb98a0ae16c097dbc9447d4d6626

  The digital signature of the running image verified successfully
  Processor memory 3183296512, Reserved memory: 0

  Total NICs found: 4
  i82545EM rev03 Gigabit 

Re: Resetting non-qdev children in a 3-phase reset device

[Markus Armbruster]

Philippe Mathieu-Daudé  writes:

> On 4/24/21 1:06 AM, Philippe Mathieu-Daudé wrote:
>
>> Looking at qemu_register_reset() uses I found this commit:
>> 
>> commit 0c7322cfd3fd382c0096c2a9f00775818a878e13
>> Date:   Mon Jun 29 08:21:10 2015 +0200
>> 
>>  watchdog/diag288: correctly register for system reset requests
>> 
>>  The diag288 watchdog is no sysbus device, therefore it doesn't get
>>  triggered on resets automatically using dc->reset.
>> 
>>  Let's register the reset handler manually, so we get correctly notified
>>  again when a system reset was requested. Also reset the watchdog on
>>  subsystem resets that don't trigger a full system reset.
>> 
>> Why is the reset() handler in DeviceClass and not in SysbusDeviceClass
>> if "Only sysbus devices get reset"? ...
>
> Ah, probably because the problem is generic to all busses (ISA, ...)
> and not just sysbus.

diag288 is a bus-less device.  Propagating reset from the root of the
qtree to the leaves won't reach it, because the qtree contains only the
devices that plug into a qbus.

 Sysbus may habe been a design mistake.  It goes back the qdev design
 assumption "every device plugs into exactly one bus, every bus is part
 of exactly one device, and the main system bus is the root of this
 tree".  The assumption ceased to hold long ago, but we still have
 sysbus.

Re: [PATCH 03/11] block/block-gen.h: bind monitor

[Markus Armbruster]

Vladimir Sementsov-Ogievskiy  writes:

> If we have current monitor, let's bind it to wrapper coroutine too.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy 
> ---
>  block/block-gen.h | 10 ++
>  1 file changed, 10 insertions(+)
>
> diff --git a/block/block-gen.h b/block/block-gen.h
> index c1fd3f40de..61f055a8cc 100644
> --- a/block/block-gen.h
> +++ b/block/block-gen.h
> @@ -27,6 +27,7 @@
>  #define BLOCK_BLOCK_GEN_H
>  
>  #include "block/block_int.h"
> +#include "monitor/monitor.h"
>  
>  /* Base structure for argument packing structures */
>  typedef struct AioPollCo {
> @@ -38,11 +39,20 @@ typedef struct AioPollCo {
>  
>  static inline int aio_poll_co(AioPollCo *s)
>  {
> +Monitor *mon = monitor_cur();

This gets the currently executing coroutine's monitor from the hash
table.

>  assert(!qemu_in_coroutine());
>  
> +if (mon) {
> +monitor_set_cur(s->co, mon);

This writes it back.  No-op, since the coroutine hasn't changed.  Why?

> +}
> +
>  aio_co_enter(s->ctx, s->co);
>  AIO_WAIT_WHILE(s->ctx, s->in_progress);
>  
> +if (mon) {
> +monitor_set_cur(s->co, NULL);

This removes s->co's monitor from the hash table.  Why?

> +}
> +
>  return s->ret;
>  }

[PATCH v3 10/10] target/riscv: Fix the RV64H decode comment

[Alistair Francis]

BugLink: https://gitlab.com/qemu-project/qemu/-/issues/6
Signed-off-by: Alistair Francis 
---
 target/riscv/insn32.decode | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
index fecf0f15d5..8901ba1e1b 100644
--- a/target/riscv/insn32.decode
+++ b/target/riscv/insn32.decode
@@ -288,7 +288,7 @@ hsv_w   0110101  .  . 100 0 1110011 @r2_s
 hfence_gvma 0110001  .  . 000 0 1110011 @hfence_gvma
 hfence_vvma 0010001  .  . 000 0 1110011 @hfence_vvma
 
-# *** RV32H Base Instruction Set ***
+# *** RV64H Base Instruction Set ***
 hlv_wu0110100  1   . 100 . 1110011 @r2
 hlv_d 0110110  0   . 100 . 1110011 @r2
 hsv_d 0110111  .   . 100 0 1110011 @r2_s
-- 
2.31.1

[PATCH v3 09/10] target/riscv: Consolidate RV32/64 16-bit instructions

[Alistair Francis]

This patch removes the insn16-32.decode and insn16-64.decode decode
files and consolidates the instructions into the general RISC-V
insn16.decode decode tree.

This means that all of the instructions are avaliable in both the 32-bit
and 64-bit builds. This also means that we run a check to ensure we are
running a 64-bit softmmu before we execute the 64-bit only instructions.
This allows us to include the 32-bit instructions in the 64-bit build,
while also ensuring that 32-bit only software can not execute the
instructions.

Signed-off-by: Alistair Francis 
Reviewed-by: Richard Henderson 
---
 target/riscv/insn16-32.decode   | 28 ---
 target/riscv/insn16-64.decode   | 36 -
 target/riscv/insn16.decode  | 30 +
 target/riscv/insn_trans/trans_rvi.c.inc |  6 +
 target/riscv/meson.build| 11 +++-
 5 files changed, 39 insertions(+), 72 deletions(-)
 delete mode 100644 target/riscv/insn16-32.decode
 delete mode 100644 target/riscv/insn16-64.decode

diff --git a/target/riscv/insn16-32.decode b/target/riscv/insn16-32.decode
deleted file mode 100644
index 0819b17028..00
--- a/target/riscv/insn16-32.decode
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# RISC-V translation routines for the RVXI Base Integer Instruction Set.
-#
-# Copyright (c) 2018 Peer Adelt, peer.ad...@hni.uni-paderborn.de
-#Bastian Koppelmann, kbast...@mail.uni-paderborn.de
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms and conditions of the GNU General Public License,
-# version 2 or later, as published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program.  If not, see .
-
-# *** RV32C Standard Extension (Quadrant 0) ***
-flw   011  ... ... .. ... 00 @cl_w
-fsw   111  ... ... .. ... 00 @cs_w
-
-# *** RV32C Standard Extension (Quadrant 1) ***
-jal   001 ... 01 @cjrd=1  # C.JAL
-
-# *** RV32C Standard Extension (Quadrant 2) ***
-flw   011 .  .  . 10 @c_lwsp
-fsw   111 .  .  . 10 @c_swsp
diff --git a/target/riscv/insn16-64.decode b/target/riscv/insn16-64.decode
deleted file mode 100644
index 672e1e916f..00
--- a/target/riscv/insn16-64.decode
+++ /dev/null
@@ -1,36 +0,0 @@
-#
-# RISC-V translation routines for the RVXI Base Integer Instruction Set.
-#
-# Copyright (c) 2018 Peer Adelt, peer.ad...@hni.uni-paderborn.de
-#Bastian Koppelmann, kbast...@mail.uni-paderborn.de
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms and conditions of the GNU General Public License,
-# version 2 or later, as published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program.  If not, see .
-
-# *** RV64C Standard Extension (Quadrant 0) ***
-ld011  ... ... .. ... 00 @cl_d
-sd111  ... ... .. ... 00 @cs_d
-
-# *** RV64C Standard Extension (Quadrant 1) ***
-{
-  illegal 001 -  0  - 01 # c.addiw, RES rd=0
-  addiw   001 .  .  . 01 @ci
-}
-subw  100 1 11 ... 00 ... 01 @cs_2
-addw  100 1 11 ... 01 ... 01 @cs_2
-
-# *** RV64C Standard Extension (Quadrant 2) ***
-{
-  illegal 011 -  0  - 10 # c.ldsp, RES rd=0
-  ld  011 .  .  . 10 @c_ldsp
-}
-sd111 .  .  . 10 @c_sdsp
diff --git a/target/riscv/insn16.decode b/target/riscv/insn16.decode
index 1cb93876fe..2e9212663c 100644
--- a/target/riscv/insn16.decode
+++ b/target/riscv/insn16.decode
@@ -92,6 +92,16 @@ lw010  ... ... .. ... 00 @cl_w
 fsd   101  ... ... .. ... 00 @cs_d
 sw110  ... ... .. ... 00 @cs_w
 
+# *** RV32C and RV64C specific Standard Extension (Quadrant 0) ***
+{
+  ld  011  ... ... .. ... 00 @cl_d
+  flw 011  ... ... .. ... 00 @cl_w
+}
+{
+  sd  111  ... ... .. ... 00 @cs_d
+  fsw 111  ... ... .. ... 00 @cs_w
+}
+
 # *** RV32/64C Standard Extension (Quadrant 1) ***
 addi  000 .  .  . 01 @ci
 addi  010 .  .  . 01 @c_li
@@ -111,6 +121,15 @@ jal   101 ... 01 @cjrd=0  # C.J
 beq   

[PATCH v3 07/10] target/riscv: Remove an unused CASE_OP_32_64 macro

[Alistair Francis]

Signed-off-by: Alistair Francis 
Reviewed-by: Richard Henderson 
Reviewed-by: Bin Meng 
---
 target/riscv/translate.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index a596f80f20..a1f794ffda 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -67,12 +67,6 @@ typedef struct DisasContext {
 CPUState *cs;
 } DisasContext;
 
-#ifdef TARGET_RISCV64
-#define CASE_OP_32_64(X) case X: case glue(X, W)
-#else
-#define CASE_OP_32_64(X) case X
-#endif
-
 static inline bool has_ext(DisasContext *ctx, uint32_t ext)
 {
 return ctx->misa & ext;
-- 
2.31.1

[PATCH v3 08/10] target/riscv: Consolidate RV32/64 32-bit instructions

[Alistair Francis]

This patch removes the insn32-64.decode decode file and consolidates the
instructions into the general RISC-V insn32.decode decode tree.

This means that all of the instructions are avaliable in both the 32-bit
and 64-bit builds. This also means that we run a check to ensure we are
running a 64-bit softmmu before we execute the 64-bit only instructions.
This allows us to include the 32-bit instructions in the 64-bit build,
while also ensuring that 32-bit only software can not execute the
instructions.

Signed-off-by: Alistair Francis 
---
 target/riscv/helper.h   | 18 +++--
 target/riscv/insn32-64.decode   | 88 -
 target/riscv/insn32.decode  | 67 ++-
 target/riscv/fpu_helper.c   | 16 ++---
 target/riscv/translate.c| 11 ++--
 target/riscv/vector_helper.c|  4 --
 target/riscv/insn_trans/trans_rva.c.inc | 14 +++-
 target/riscv/insn_trans/trans_rvd.c.inc | 17 -
 target/riscv/insn_trans/trans_rvf.c.inc |  6 +-
 target/riscv/insn_trans/trans_rvh.c.inc |  8 ++-
 target/riscv/insn_trans/trans_rvi.c.inc | 16 +++--
 target/riscv/insn_trans/trans_rvm.c.inc | 12 +++-
 target/riscv/insn_trans/trans_rvv.c.inc | 39 +--
 target/riscv/meson.build|  2 +-
 14 files changed, 166 insertions(+), 152 deletions(-)
 delete mode 100644 target/riscv/insn32-64.decode

diff --git a/target/riscv/helper.h b/target/riscv/helper.h
index e3f3f41e89..c7267593c3 100644
--- a/target/riscv/helper.h
+++ b/target/riscv/helper.h
@@ -27,12 +27,12 @@ DEF_HELPER_FLAGS_3(flt_s, TCG_CALL_NO_RWG, tl, env, i64, 
i64)
 DEF_HELPER_FLAGS_3(feq_s, TCG_CALL_NO_RWG, tl, env, i64, i64)
 DEF_HELPER_FLAGS_2(fcvt_w_s, TCG_CALL_NO_RWG, tl, env, i64)
 DEF_HELPER_FLAGS_2(fcvt_wu_s, TCG_CALL_NO_RWG, tl, env, i64)
-DEF_HELPER_FLAGS_2(fcvt_l_s, TCG_CALL_NO_RWG, i64, env, i64)
-DEF_HELPER_FLAGS_2(fcvt_lu_s, TCG_CALL_NO_RWG, i64, env, i64)
+DEF_HELPER_FLAGS_2(fcvt_l_s, TCG_CALL_NO_RWG, tl, env, i64)
+DEF_HELPER_FLAGS_2(fcvt_lu_s, TCG_CALL_NO_RWG, tl, env, i64)
 DEF_HELPER_FLAGS_2(fcvt_s_w, TCG_CALL_NO_RWG, i64, env, tl)
 DEF_HELPER_FLAGS_2(fcvt_s_wu, TCG_CALL_NO_RWG, i64, env, tl)
-DEF_HELPER_FLAGS_2(fcvt_s_l, TCG_CALL_NO_RWG, i64, env, i64)
-DEF_HELPER_FLAGS_2(fcvt_s_lu, TCG_CALL_NO_RWG, i64, env, i64)
+DEF_HELPER_FLAGS_2(fcvt_s_l, TCG_CALL_NO_RWG, i64, env, tl)
+DEF_HELPER_FLAGS_2(fcvt_s_lu, TCG_CALL_NO_RWG, i64, env, tl)
 DEF_HELPER_FLAGS_1(fclass_s, TCG_CALL_NO_RWG_SE, tl, i64)
 
 /* Floating Point - Double Precision */
@@ -50,12 +50,12 @@ DEF_HELPER_FLAGS_3(flt_d, TCG_CALL_NO_RWG, tl, env, i64, 
i64)
 DEF_HELPER_FLAGS_3(feq_d, TCG_CALL_NO_RWG, tl, env, i64, i64)
 DEF_HELPER_FLAGS_2(fcvt_w_d, TCG_CALL_NO_RWG, tl, env, i64)
 DEF_HELPER_FLAGS_2(fcvt_wu_d, TCG_CALL_NO_RWG, tl, env, i64)
-DEF_HELPER_FLAGS_2(fcvt_l_d, TCG_CALL_NO_RWG, i64, env, i64)
-DEF_HELPER_FLAGS_2(fcvt_lu_d, TCG_CALL_NO_RWG, i64, env, i64)
+DEF_HELPER_FLAGS_2(fcvt_l_d, TCG_CALL_NO_RWG, tl, env, i64)
+DEF_HELPER_FLAGS_2(fcvt_lu_d, TCG_CALL_NO_RWG, tl, env, i64)
 DEF_HELPER_FLAGS_2(fcvt_d_w, TCG_CALL_NO_RWG, i64, env, tl)
 DEF_HELPER_FLAGS_2(fcvt_d_wu, TCG_CALL_NO_RWG, i64, env, tl)
-DEF_HELPER_FLAGS_2(fcvt_d_l, TCG_CALL_NO_RWG, i64, env, i64)
-DEF_HELPER_FLAGS_2(fcvt_d_lu, TCG_CALL_NO_RWG, i64, env, i64)
+DEF_HELPER_FLAGS_2(fcvt_d_l, TCG_CALL_NO_RWG, i64, env, tl)
+DEF_HELPER_FLAGS_2(fcvt_d_lu, TCG_CALL_NO_RWG, i64, env, tl)
 DEF_HELPER_FLAGS_1(fclass_d, TCG_CALL_NO_RWG_SE, tl, i64)
 
 /* Special functions */
@@ -241,7 +241,6 @@ DEF_HELPER_5(vlhuff_v_w, void, ptr, ptr, tl, env, i32)
 DEF_HELPER_5(vlhuff_v_d, void, ptr, ptr, tl, env, i32)
 DEF_HELPER_5(vlwuff_v_w, void, ptr, ptr, tl, env, i32)
 DEF_HELPER_5(vlwuff_v_d, void, ptr, ptr, tl, env, i32)
-#ifdef TARGET_RISCV64
 DEF_HELPER_6(vamoswapw_v_d, void, ptr, ptr, tl, ptr, env, i32)
 DEF_HELPER_6(vamoswapd_v_d, void, ptr, ptr, tl, ptr, env, i32)
 DEF_HELPER_6(vamoaddw_v_d,  void, ptr, ptr, tl, ptr, env, i32)
@@ -260,7 +259,6 @@ DEF_HELPER_6(vamominuw_v_d, void, ptr, ptr, tl, ptr, env, 
i32)
 DEF_HELPER_6(vamominud_v_d, void, ptr, ptr, tl, ptr, env, i32)
 DEF_HELPER_6(vamomaxuw_v_d, void, ptr, ptr, tl, ptr, env, i32)
 DEF_HELPER_6(vamomaxud_v_d, void, ptr, ptr, tl, ptr, env, i32)
-#endif
 DEF_HELPER_6(vamoswapw_v_w, void, ptr, ptr, tl, ptr, env, i32)
 DEF_HELPER_6(vamoaddw_v_w,  void, ptr, ptr, tl, ptr, env, i32)
 DEF_HELPER_6(vamoxorw_v_w,  void, ptr, ptr, tl, ptr, env, i32)
diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode
deleted file mode 100644
index 8157dee8b7..00
--- a/target/riscv/insn32-64.decode
+++ /dev/null
@@ -1,88 +0,0 @@
-#
-# RISC-V translation routines for the RV Instruction Set.
-#
-# Copyright (c) 2018 Peer Adelt, peer.ad...@hni.uni-paderborn.de
-#Bastian Koppelmann, kbast...@mail.uni-paderborn.de
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms and conditions of the GNU General Public 

[PATCH v3 06/10] target/riscv: Remove the unused HSTATUS_WPRI macro

[Alistair Francis]

Signed-off-by: Alistair Francis 
Reviewed-by: Richard Henderson 
Reviewed-by: Bin Meng 
---
 target/riscv/cpu_bits.h | 6 --
 1 file changed, 6 deletions(-)

diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index d98f3bc8bc..52640e6856 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -396,12 +396,6 @@
 #define HSTATUS32_WPRI   0xFF8FF87E
 #define HSTATUS64_WPRI   0xFF8FF87EULL
 
-#if defined(TARGET_RISCV32)
-#define HSTATUS_WPRI HSTATUS32_WPRI
-#elif defined(TARGET_RISCV64)
-#define HSTATUS_WPRI HSTATUS64_WPRI
-#endif
-
 #define HCOUNTEREN_CY(1 << 0)
 #define HCOUNTEREN_TM(1 << 1)
 #define HCOUNTEREN_IR(1 << 2)
-- 
2.31.1

[PATCH v3 05/10] target/riscv: Remove the hardcoded SATP_MODE macro

[Alistair Francis]

Signed-off-by: Alistair Francis 
Reviewed-by: Richard Henderson 
---
 target/riscv/cpu_bits.h   | 11 ---
 target/riscv/cpu_helper.c | 32 
 target/riscv/csr.c| 19 +++
 target/riscv/monitor.c| 22 +-
 4 files changed, 56 insertions(+), 28 deletions(-)

diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index 6e30b312f0..d98f3bc8bc 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -432,17 +432,6 @@
 #define SATP64_ASID 0x0000ULL
 #define SATP64_PPN  0x0FFFULL
 
-#if defined(TARGET_RISCV32)
-#define SATP_MODE   SATP32_MODE
-#define SATP_ASID   SATP32_ASID
-#define SATP_PPNSATP32_PPN
-#endif
-#if defined(TARGET_RISCV64)
-#define SATP_MODE   SATP64_MODE
-#define SATP_ASID   SATP64_ASID
-#define SATP_PPNSATP64_PPN
-#endif
-
 /* VM modes (mstatus.vm) privileged ISA 1.9.1 */
 #define VM_1_09_MBARE   0
 #define VM_1_09_MBB 1
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index d9defbdd34..968cb8046f 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -405,11 +405,21 @@ static int get_physical_address(CPURISCVState *env, 
hwaddr *physical,
 
 if (first_stage == true) {
 if (use_background) {
-base = (hwaddr)get_field(env->vsatp, SATP_PPN) << PGSHIFT;
-vm = get_field(env->vsatp, SATP_MODE);
+if (riscv_cpu_is_32bit(env)) {
+base = (hwaddr)get_field(env->vsatp, SATP32_PPN) << PGSHIFT;
+vm = get_field(env->vsatp, SATP32_MODE);
+} else {
+base = (hwaddr)get_field(env->vsatp, SATP64_PPN) << PGSHIFT;
+vm = get_field(env->vsatp, SATP64_MODE);
+}
 } else {
-base = (hwaddr)get_field(env->satp, SATP_PPN) << PGSHIFT;
-vm = get_field(env->satp, SATP_MODE);
+if (riscv_cpu_is_32bit(env)) {
+base = (hwaddr)get_field(env->satp, SATP32_PPN) << PGSHIFT;
+vm = get_field(env->satp, SATP32_MODE);
+} else {
+base = (hwaddr)get_field(env->satp, SATP64_PPN) << PGSHIFT;
+vm = get_field(env->satp, SATP64_MODE);
+}
 }
 widened = 0;
 } else {
@@ -624,14 +634,20 @@ static void raise_mmu_exception(CPURISCVState *env, 
target_ulong address,
 {
 CPUState *cs = env_cpu(env);
 int page_fault_exceptions, vm;
+uint64_t stap_mode;
+
+if (riscv_cpu_is_32bit(env)) {
+stap_mode = SATP32_MODE;
+} else {
+stap_mode = SATP64_MODE;
+}
 
 if (first_stage) {
-vm = get_field(env->satp, SATP_MODE);
-} else if (riscv_cpu_is_32bit(env)) {
-vm = get_field(env->hgatp, SATP32_MODE);
+vm = get_field(env->satp, stap_mode);
 } else {
-vm = get_field(env->hgatp, SATP64_MODE);
+vm = get_field(env->hgatp, stap_mode);
 }
+
 page_fault_exceptions = vm != VM_1_10_MBARE && !pmp_violation;
 
 switch (access_type) {
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index e955753441..fe5628fea6 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -997,16 +997,27 @@ static RISCVException read_satp(CPURISCVState *env, int 
csrno,
 static RISCVException write_satp(CPURISCVState *env, int csrno,
  target_ulong val)
 {
+int vm, mask, asid;
+
 if (!riscv_feature(env, RISCV_FEATURE_MMU)) {
 return RISCV_EXCP_NONE;
 }
-if (validate_vm(env, get_field(val, SATP_MODE)) &&
-((val ^ env->satp) & (SATP_MODE | SATP_ASID | SATP_PPN)))
-{
+
+if (riscv_cpu_is_32bit(env)) {
+vm = validate_vm(env, get_field(val, SATP32_MODE));
+mask = (val ^ env->satp) & (SATP32_MODE | SATP32_ASID | SATP32_PPN);
+asid = (val ^ env->satp) & SATP32_ASID;
+} else {
+vm = validate_vm(env, get_field(val, SATP64_MODE));
+mask = (val ^ env->satp) & (SATP64_MODE | SATP64_ASID | SATP64_PPN);
+asid = (val ^ env->satp) & SATP64_ASID;
+}
+
+if (vm && mask) {
 if (env->priv == PRV_S && get_field(env->mstatus, MSTATUS_TVM)) {
 return RISCV_EXCP_ILLEGAL_INST;
 } else {
-if ((val ^ env->satp) & SATP_ASID) {
+if (asid) {
 tlb_flush(env_cpu(env));
 }
 env->satp = val;
diff --git a/target/riscv/monitor.c b/target/riscv/monitor.c
index e51188f919..f7e6ea72b3 100644
--- a/target/riscv/monitor.c
+++ b/target/riscv/monitor.c
@@ -150,9 +150,14 @@ static void mem_info_svxx(Monitor *mon, CPUArchState *env)
 target_ulong last_size;
 int last_attr;
 
-base = (hwaddr)get_field(env->satp, SATP_PPN) << PGSHIFT;
+if (riscv_cpu_is_32bit(env)) {
+base = (hwaddr)get_field(env->satp, SATP32_PPN) << PGSHIFT;
+vm = get_field(env->satp, 

[PATCH v3 04/10] target/riscv: Remove the hardcoded MSTATUS_SD macro

[Alistair Francis]

Signed-off-by: Alistair Francis 
Reviewed-by: Richard Henderson 
---
 target/riscv/cpu_bits.h  | 10 --
 target/riscv/csr.c   | 12 ++--
 target/riscv/translate.c | 19 +--
 3 files changed, 27 insertions(+), 14 deletions(-)

diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index d738e2fdbd..6e30b312f0 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -368,16 +368,6 @@
 #define MXL_RV642
 #define MXL_RV128   3
 
-#if defined(TARGET_RISCV32)
-#define MSTATUS_SD MSTATUS32_SD
-#define MISA_MXL MISA32_MXL
-#define MXL_VAL MXL_RV32
-#elif defined(TARGET_RISCV64)
-#define MSTATUS_SD MSTATUS64_SD
-#define MISA_MXL MISA64_MXL
-#define MXL_VAL MXL_RV64
-#endif
-
 /* sstatus CSR bits */
 #define SSTATUS_UIE 0x0001
 #define SSTATUS_SIE 0x0002
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 41951a0a84..e955753441 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -538,7 +538,11 @@ static RISCVException write_mstatus(CPURISCVState *env, 
int csrno,
 
 dirty = ((mstatus & MSTATUS_FS) == MSTATUS_FS) |
 ((mstatus & MSTATUS_XS) == MSTATUS_XS);
-mstatus = set_field(mstatus, MSTATUS_SD, dirty);
+if (riscv_cpu_is_32bit(env)) {
+mstatus = set_field(mstatus, MSTATUS32_SD, dirty);
+} else {
+mstatus = set_field(mstatus, MSTATUS64_SD, dirty);
+}
 env->mstatus = mstatus;
 
 return RISCV_EXCP_NONE;
@@ -614,7 +618,11 @@ static RISCVException write_misa(CPURISCVState *env, int 
csrno,
 }
 
 /* misa.MXL writes are not supported by QEMU */
-val = (env->misa & MISA_MXL) | (val & ~MISA_MXL);
+if (riscv_cpu_is_32bit(env)) {
+val = (env->misa & MISA32_MXL) | (val & ~MISA32_MXL);
+} else {
+val = (env->misa & MISA64_MXL) | (val & ~MISA64_MXL);
+}
 
 /* flush translation cache */
 if (val != env->misa) {
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 26eccc5eb1..a596f80f20 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -78,6 +78,17 @@ static inline bool has_ext(DisasContext *ctx, uint32_t ext)
 return ctx->misa & ext;
 }
 
+#ifdef TARGET_RISCV32
+# define is_32bit(ctx)  true
+#elif defined(CONFIG_USER_ONLY)
+# define is_32bit(ctx)  false
+#else
+static inline bool is_32bit(DisasContext *ctx)
+{
+return (ctx->misa & RV32) == RV32;
+}
+#endif
+
 /*
  * RISC-V requires NaN-boxing of narrower width floating point values.
  * This applies when a 32-bit value is assigned to a 64-bit FP register.
@@ -369,6 +380,8 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong 
imm)
 static void mark_fs_dirty(DisasContext *ctx)
 {
 TCGv tmp;
+target_ulong sd;
+
 if (ctx->mstatus_fs == MSTATUS_FS) {
 return;
 }
@@ -376,13 +389,15 @@ static void mark_fs_dirty(DisasContext *ctx)
 ctx->mstatus_fs = MSTATUS_FS;
 
 tmp = tcg_temp_new();
+sd = is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD;
+
 tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus));
-tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | MSTATUS_SD);
+tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd);
 tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus));
 
 if (ctx->virt_enabled) {
 tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus_hs));
-tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | MSTATUS_SD);
+tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd);
 tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus_hs));
 }
 tcg_temp_free(tmp);
-- 
2.31.1

[PATCH v3 03/10] target/riscv: Remove the hardcoded HGATP_MODE macro

[Alistair Francis]

Signed-off-by: Alistair Francis 
Reviewed-by: Richard Henderson 
Reviewed-by: Bin Meng 
---
 target/riscv/cpu_bits.h   | 11 ---
 target/riscv/cpu_helper.c | 24 +++-
 2 files changed, 15 insertions(+), 20 deletions(-)

diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index 3a0e79e545..d738e2fdbd 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -195,17 +195,6 @@
 #define CSR_HTIMEDELTA  0x605
 #define CSR_HTIMEDELTAH 0x615
 
-#if defined(TARGET_RISCV32)
-#define HGATP_MODE   SATP32_MODE
-#define HGATP_VMID   SATP32_ASID
-#define HGATP_PPNSATP32_PPN
-#endif
-#if defined(TARGET_RISCV64)
-#define HGATP_MODE   SATP64_MODE
-#define HGATP_VMID   SATP64_ASID
-#define HGATP_PPNSATP64_PPN
-#endif
-
 /* Virtual CSRs */
 #define CSR_VSSTATUS0x200
 #define CSR_VSIE0x204
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 1018c0036d..d9defbdd34 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -413,8 +413,13 @@ static int get_physical_address(CPURISCVState *env, hwaddr 
*physical,
 }
 widened = 0;
 } else {
-base = (hwaddr)get_field(env->hgatp, HGATP_PPN) << PGSHIFT;
-vm = get_field(env->hgatp, HGATP_MODE);
+if (riscv_cpu_is_32bit(env)) {
+base = (hwaddr)get_field(env->hgatp, SATP32_PPN) << PGSHIFT;
+vm = get_field(env->hgatp, SATP32_MODE);
+} else {
+base = (hwaddr)get_field(env->hgatp, SATP64_PPN) << PGSHIFT;
+vm = get_field(env->hgatp, SATP64_MODE);
+}
 widened = 2;
 }
 /* status.SUM will be ignored if execute on background */
@@ -618,16 +623,17 @@ static void raise_mmu_exception(CPURISCVState *env, 
target_ulong address,
 bool first_stage, bool two_stage)
 {
 CPUState *cs = env_cpu(env);
-int page_fault_exceptions;
+int page_fault_exceptions, vm;
+
 if (first_stage) {
-page_fault_exceptions =
-get_field(env->satp, SATP_MODE) != VM_1_10_MBARE &&
-!pmp_violation;
+vm = get_field(env->satp, SATP_MODE);
+} else if (riscv_cpu_is_32bit(env)) {
+vm = get_field(env->hgatp, SATP32_MODE);
 } else {
-page_fault_exceptions =
-get_field(env->hgatp, HGATP_MODE) != VM_1_10_MBARE &&
-!pmp_violation;
+vm = get_field(env->hgatp, SATP64_MODE);
 }
+page_fault_exceptions = vm != VM_1_10_MBARE && !pmp_violation;
+
 switch (access_type) {
 case MMU_INST_FETCH:
 if (riscv_cpu_virt_enabled(env) && !first_stage) {
-- 
2.31.1

[PATCH v3 02/10] target/riscv: Remove the hardcoded SSTATUS_SD macro

[Alistair Francis]

This also ensures that the SD bit is not writable.

Signed-off-by: Alistair Francis 
Reviewed-by: Richard Henderson 
Reviewed-by: Bin Meng 
---
 target/riscv/cpu_bits.h | 6 --
 target/riscv/csr.c  | 9 -
 2 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index 24d89939a0..3a0e79e545 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -403,12 +403,6 @@
 #define SSTATUS32_SD0x8000
 #define SSTATUS64_SD0x8000ULL
 
-#if defined(TARGET_RISCV32)
-#define SSTATUS_SD SSTATUS32_SD
-#elif defined(TARGET_RISCV64)
-#define SSTATUS_SD SSTATUS64_SD
-#endif
-
 /* hstatus CSR bits */
 #define HSTATUS_VSBE 0x0020
 #define HSTATUS_GVA  0x0040
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 97ceff718f..41951a0a84 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -459,7 +459,7 @@ static const target_ulong delegable_excps =
 (1ULL << (RISCV_EXCP_STORE_GUEST_AMO_ACCESS_FAULT));
 static const target_ulong sstatus_v1_10_mask = SSTATUS_SIE | SSTATUS_SPIE |
 SSTATUS_UIE | SSTATUS_UPIE | SSTATUS_SPP | SSTATUS_FS | SSTATUS_XS |
-SSTATUS_SUM | SSTATUS_MXR | SSTATUS_SD;
+SSTATUS_SUM | SSTATUS_MXR;
 static const target_ulong sip_writable_mask = SIP_SSIP | MIP_USIP | MIP_UEIP;
 static const target_ulong hip_writable_mask = MIP_VSSIP;
 static const target_ulong hvip_writable_mask = MIP_VSSIP | MIP_VSTIP | 
MIP_VSEIP;
@@ -788,6 +788,13 @@ static RISCVException read_sstatus(CPURISCVState *env, int 
csrno,
target_ulong *val)
 {
 target_ulong mask = (sstatus_v1_10_mask);
+
+if (riscv_cpu_is_32bit(env)) {
+mask |= SSTATUS32_SD;
+} else {
+mask |= SSTATUS64_SD;
+}
+
 *val = env->mstatus & mask;
 return RISCV_EXCP_NONE;
 }
-- 
2.31.1

[PATCH v3 01/10] target/riscv: Remove the hardcoded RVXLEN macro

[Alistair Francis]

Signed-off-by: Alistair Francis 
Reviewed-by: Richard Henderson 
Reviewed-by: Bin Meng 
---
 target/riscv/cpu.h | 6 --
 target/riscv/cpu.c | 6 +-
 2 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index add734bbbd..7e879fb9ca 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -54,12 +54,6 @@
 #define RV32 ((target_ulong)1 << (TARGET_LONG_BITS - 2))
 #define RV64 ((target_ulong)2 << (TARGET_LONG_BITS - 2))
 
-#if defined(TARGET_RISCV32)
-#define RVXLEN RV32
-#elif defined(TARGET_RISCV64)
-#define RVXLEN RV64
-#endif
-
 #define RV(x) ((target_ulong)1 << (x - 'A'))
 
 #define RVI RV('I')
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 04ac03f8c9..3191fd0082 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -147,7 +147,11 @@ static void set_resetvec(CPURISCVState *env, target_ulong 
resetvec)
 static void riscv_any_cpu_init(Object *obj)
 {
 CPURISCVState *env = _CPU(obj)->env;
-set_misa(env, RVXLEN | RVI | RVM | RVA | RVF | RVD | RVC | RVU);
+#if defined(TARGET_RISCV32)
+set_misa(env, RV32 | RVI | RVM | RVA | RVF | RVD | RVC | RVU);
+#elif defined(TARGET_RISCV64)
+set_misa(env, RV64 | RVI | RVM | RVA | RVF | RVD | RVC | RVU);
+#endif
 set_priv_version(env, PRIV_VERSION_1_11_0);
 }
 
-- 
2.31.1

[PATCH v3 00/10] RISC-V: Steps towards running 32-bit guests on

[Alistair Francis]

This is another step towards running 32-bit CPU code on the 64-bit
softmmu builds for RISC-V.

I have tested this and am able to run some 32-bit code, but eventually
hit some issue.  This series doesn't allow users to use 32-bit CPUs with
64-bit softmmu builds as it doesn't work yet. This series instead just
gets us a little closer to being able to and removes more hardcoded
macros so hopefully others also stop using them for new code.

v3:
 - Remove casts from the decoder
 - Add a patch to fix a comment
 - Rebase on the RISC-V tree
v2:
 - Update the decode tree setup
 - Address other review comments

Alistair Francis (10):
  target/riscv: Remove the hardcoded RVXLEN macro
  target/riscv: Remove the hardcoded SSTATUS_SD macro
  target/riscv: Remove the hardcoded HGATP_MODE macro
  target/riscv: Remove the hardcoded MSTATUS_SD macro
  target/riscv: Remove the hardcoded SATP_MODE macro
  target/riscv: Remove the unused HSTATUS_WPRI macro
  target/riscv: Remove an unused CASE_OP_32_64 macro
  target/riscv: Consolidate RV32/64 32-bit instructions
  target/riscv: Consolidate RV32/64 16-bit instructions
  target/riscv: Fix the RV64H decode comment

 target/riscv/cpu.h  |  6 --
 target/riscv/cpu_bits.h | 44 -
 target/riscv/helper.h   | 18 +++--
 target/riscv/insn16-32.decode   | 28 
 target/riscv/insn16-64.decode   | 36 --
 target/riscv/insn16.decode  | 30 +
 target/riscv/insn32-64.decode   | 88 -
 target/riscv/insn32.decode  | 67 ++-
 target/riscv/cpu.c  |  6 +-
 target/riscv/cpu_helper.c   | 48 ++
 target/riscv/csr.c  | 40 +--
 target/riscv/fpu_helper.c   | 16 ++---
 target/riscv/monitor.c  | 22 +--
 target/riscv/translate.c| 32 +
 target/riscv/vector_helper.c|  4 --
 target/riscv/insn_trans/trans_rva.c.inc | 14 +++-
 target/riscv/insn_trans/trans_rvd.c.inc | 17 -
 target/riscv/insn_trans/trans_rvf.c.inc |  6 +-
 target/riscv/insn_trans/trans_rvh.c.inc |  8 ++-
 target/riscv/insn_trans/trans_rvi.c.inc | 22 +--
 target/riscv/insn_trans/trans_rvm.c.inc | 12 +++-
 target/riscv/insn_trans/trans_rvv.c.inc | 39 +--
 target/riscv/meson.build| 13 ++--
 23 files changed, 310 insertions(+), 306 deletions(-)
 delete mode 100644 target/riscv/insn16-32.decode
 delete mode 100644 target/riscv/insn16-64.decode
 delete mode 100644 target/riscv/insn32-64.decode

-- 
2.31.1

Re: [PULL 21/24] bsd-user: add arm target_signal.h

[Warner Losh]

On Fri, Apr 23, 2021 at 5:19 PM Richard Henderson <
richard.hender...@linaro.org> wrote:

> On 4/23/21 1:39 PM, i...@bsdimp.com wrote:
> > +static inline abi_ulong get_sp_from_cpustate(CPUARMState *state)
> > +{
> > +return state->regs[R_ESP];
> > +}
>
> Shall we just wait until arm actually compiles?
> This won't, being a copy from x86...
>

OK. Fair point. I'll drop this for now and pick it up when more of the arm
is in place. Good catch.


>
> r~
>

Re: [PULL 10/24] bsd-user: style tweak: use C not C++ comments

[Warner Losh]

On Fri, Apr 23, 2021 at 5:06 PM Richard Henderson <
richard.hender...@linaro.org> wrote:

> On 4/23/21 1:39 PM, i...@bsdimp.com wrote:
> > From: Warner Losh 
> >
> > Signed-off-by: Warner Losh 
> > ---
> >   bsd-user/qemu.h | 10 ++
> >   1 file changed, 6 insertions(+), 4 deletions(-)
> >
> > diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h
> > index b836b603af..3480db890d 100644
> > --- a/bsd-user/qemu.h
> > +++ b/bsd-user/qemu.h
> > @@ -71,7 +71,7 @@ struct image_info {
> >
> >   struct sigqueue {
> >   struct sigqueue *next;
> > -//target_siginfo_t info;
> > +/* target_siginfo_t info; */
> >   };
>
> Ack.
>
> > @@ -193,9 +193,11 @@ extern int do_strace;
> >   /* signal.c */
> >   void process_pending_signals(CPUArchState *cpu_env);
> >   void signal_init(void);
> > -//int queue_signal(CPUArchState *env, int sig, target_siginfo_t *info);
> > -//void host_to_target_siginfo(target_siginfo_t *tinfo, const siginfo_t
> *info);
> > -//void target_to_host_siginfo(siginfo_t *info, const target_siginfo_t
> *tinfo);
> > +/*
> > + * int queue_signal(CPUArchState *env, int sig, target_siginfo_t *info);
> > + * void host_to_target_siginfo(target_siginfo_t *tinfo, const siginfo_t
> *info);
> > + * void target_to_host_siginfo(siginfo_t *info, const target_siginfo_t
> *tinfo);
> > + */
>
> These should probably be deleted with the #if 0 code that references them.
>

OK. Sold.

Warner


>
> r~
>

Re: [RFC PATCH 0/4] target/ppc: code motion to compile translate_init

[Richard Henderson]

On 4/23/21 12:18 PM, Bruno Larsen (billionai) wrote:

The current patch series aims to isolate common code from translation-related
code. This isolation is required to disable TCG at build time, and the
final system still work.

This patch series is still WIP, so comments are welcome

Bruno Larsen (billionai) (4):
   target/ppc: move opcode table logic to translate.c
   target/ppc: isolated SPR read/write callbacks
   target/ppc: Move SPR generation to separate file
   target/ppc: isolated cpu init from translation logic


This does not apply to master.  You should say what the patch requirements are.


r~

[PATCH 2/2] hw/rtc/mc146818rtc: Qdev'ify reset()

[Philippe Mathieu-Daudé]

TYPE_MC146818_RTC is an ISA device, so its DeviceClass::reset()
handler is called automatically when its qbus parent is reset.

We have 2 reset() methods: a generic one and the qdev one.
Merge them into the qdev reset handler, rename it, and remove
the qemu_register_reset() call.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/rtc/mc146818rtc.c | 35 +++
 1 file changed, 15 insertions(+), 20 deletions(-)

diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c
index 5d0fcacd0c0..710adeb9aaa 100644
--- a/hw/rtc/mc146818rtc.c
+++ b/hw/rtc/mc146818rtc.c
@@ -872,22 +872,6 @@ static void rtc_notify_suspend(Notifier *notifier, void 
*data)
 rtc_set_memory(ISA_DEVICE(s), 0xF, 0xFE);
 }
 
-static void rtc_reset(void *opaque)
-{
-RTCState *s = opaque;
-
-s->cmos_data[RTC_REG_B] &= ~(REG_B_PIE | REG_B_AIE | REG_B_SQWE);
-s->cmos_data[RTC_REG_C] &= ~(REG_C_UF | REG_C_IRQF | REG_C_PF | REG_C_AF);
-check_update_timer(s);
-
-qemu_irq_lower(s->irq);
-
-if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) {
-s->irq_coalesced = 0;
-s->irq_reinject_on_ack_count = 0;
-}
-}
-
 static const MemoryRegionOps cmos_ops = {
 .read = cmos_ioport_read,
 .write = cmos_ioport_write,
@@ -962,7 +946,6 @@ static void rtc_realizefn(DeviceState *dev, Error **errp)
 memory_region_add_coalescing(>coalesced_io, 0, 1);
 
 qdev_set_legacy_instance_id(dev, RTC_ISA_BASE, 3);
-qemu_register_reset(rtc_reset, s);
 
 object_property_add_tm(OBJECT(s), "date", rtc_get_date);
 
@@ -998,17 +981,29 @@ static Property mc146818rtc_properties[] = {
 DEFINE_PROP_END_OF_LIST(),
 };
 
-static void rtc_resetdev(DeviceState *d)
+static void rtc_reset(DeviceState *dev)
 {
-RTCState *s = MC146818_RTC(d);
+RTCState *s = MC146818_RTC(dev);
 
 /* Reason: VM do suspend self will set 0xfe
  * Reset any values other than 0xfe(Guest suspend case) */
 if (s->cmos_data[0x0f] != 0xfe) {
 s->cmos_data[0x0f] = 0x00;
 }
+
+s->cmos_data[RTC_REG_B] &= ~(REG_B_PIE | REG_B_AIE | REG_B_SQWE);
+s->cmos_data[RTC_REG_C] &= ~(REG_C_UF | REG_C_IRQF | REG_C_PF | REG_C_AF);
+check_update_timer(s);
+
+qemu_irq_lower(s->irq);
+
+if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) {
+s->irq_coalesced = 0;
+s->irq_reinject_on_ack_count = 0;
+}
 }
 
+
 static void rtc_build_aml(ISADevice *isadev, Aml *scope)
 {
 Aml *dev;
@@ -1036,7 +1031,7 @@ static void rtc_class_initfn(ObjectClass *klass, void 
*data)
 ISADeviceClass *isa = ISA_DEVICE_CLASS(klass);
 
 dc->realize = rtc_realizefn;
-dc->reset = rtc_resetdev;
+dc->reset = rtc_reset;
 dc->vmsd = _rtc;
 isa->build_aml = rtc_build_aml;
 device_class_set_props(dc, mc146818rtc_properties);
-- 
2.26.3

[PATCH 1/2] hw/timer/etraxfs_timer: Qdev'ify reset()

[Philippe Mathieu-Daudé]

TYPE_ETRAX_FS_TIMER is a sysbus device, so its DeviceClass::reset()
handler is called automatically when its qbus parent is reset.
Convert the generic reset to a qdev one, and remove the
qemu_register_reset() call.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/timer/etraxfs_timer.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c
index 5379006086f..3cfab3e3284 100644
--- a/hw/timer/etraxfs_timer.c
+++ b/hw/timer/etraxfs_timer.c
@@ -309,9 +309,9 @@ static const MemoryRegionOps timer_ops = {
 }
 };
 
-static void etraxfs_timer_reset(void *opaque)
+static void etraxfs_timer_reset(DeviceState *dev)
 {
-ETRAXTimerState *t = opaque;
+ETRAXTimerState *t = ETRAX_TIMER(dev);
 
 ptimer_transaction_begin(t->ptimer_t0);
 ptimer_stop(t->ptimer_t0);
@@ -343,7 +343,6 @@ static void etraxfs_timer_realize(DeviceState *dev, Error 
**errp)
 memory_region_init_io(>mmio, OBJECT(t), _ops, t,
   "etraxfs-timer", 0x5c);
 sysbus_init_mmio(sbd, >mmio);
-qemu_register_reset(etraxfs_timer_reset, t);
 }
 
 static void etraxfs_timer_class_init(ObjectClass *klass, void *data)
@@ -351,6 +350,7 @@ static void etraxfs_timer_class_init(ObjectClass *klass, 
void *data)
 DeviceClass *dc = DEVICE_CLASS(klass);
 
 dc->realize = etraxfs_timer_realize;
+dc->reset = etraxfs_timer_reset;
 }
 
 static const TypeInfo etraxfs_timer_info = {
-- 
2.26.3

[PATCH 0/2] hw: Qdev'ify reset() for mc146818rtc & etraxfs_timer

[Philippe Mathieu-Daudé]

Remove qemu_register_reset() when a qdev type has a qbus parent.

Philippe Mathieu-Daudé (2):
  hw/timer/etraxfs_timer: Qdev'ify reset()
  hw/rtc/mc146818rtc: Qdev'ify reset()

 hw/rtc/mc146818rtc.c | 35 +++
 hw/timer/etraxfs_timer.c |  6 +++---
 2 files changed, 18 insertions(+), 23 deletions(-)

-- 
2.26.3

Re: [PULL 17/24] bsd-user: move extern to header file

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

extern char **environ has no standard home, so move the declaration from the .c
file to a handy .h file. Since this is a standard, old-school UNIX interface
dating from the 5th edition, it's not quite the same issue that the rule is
supposed to protect against, though.

Signed-off-by: Warner Losh
---
  bsd-user/main.c | 1 -
  bsd-user/qemu.h | 2 ++
  2 files changed, 2 insertions(+), 1 deletion(-)


Reviewed-by: Richard Henderson 

r~

Re: Resetting non-qdev children in a 3-phase reset device

[Philippe Mathieu-Daudé]

On 4/24/21 1:06 AM, Philippe Mathieu-Daudé wrote:
> On 4/22/21 4:20 PM, Philippe Mathieu-Daudé wrote:
>> On 4/22/21 3:21 PM, Markus Armbruster wrote:
>>> Peter Maydell  writes:
> 
>>> Most qdevs plug into a qbus, but some don't.
>>>
>>> DeviceClass member @bus_type names the kind of bus the device plugs
>>> into.  It's a QOM type name.  Example: for a PCI device, it's
>>> TYPE_PCI_BUS, and the device must be plugged into an instance of a
>>> (subtype of) TYPE_PCI_BUS.
>>>
>>> If @bus_type is null, the device does not plug into any qbus.
>>>
>>> The qbus a device is plugged into is also called the parent bus.  Not to
>>> be confused with the QOM parent.
>>>
> But even without parent they end in the /unattached
> container below /machine, so if the reset were there, the
> machine could still iterate over the /unattached children.

 ...yes, /unattached is what I was thinking about.

 My current half-thought-through view is that where we ought
 to try to end up is something like:

  * "real" buses should continue to propagate reset
(A "real" bus is like PCI, SCSI, and other buses where the real
hardware has a concept of a "bus reset" or where the power to the
plugged device comes from the bus so that powercycling the
controller naturally powercycles the devices. Sysbus is not a
"real" bus; I haven't checked the others to see if we have any
other non-real buses)
  * reset should follow the QOM tree for objects not on a "real" bus
(that is, the qdev "reset this device" function should do
"iterate through my QOM children and reset those which are not
on a real bus" as well as its current "reset myself" and "reset
every qbus I have")
  * instead of reset starting with the sysbus and working along the
qbus hierarchy, we start by resetting the machine. That should
include resetting all the QOM children of the machine. Any
device which has a qbus should reset the qbus as part of its
reset, but only "real" buses reset their children when reset.
>>>
>>> Sounds like an approximation of reset wire modelling :)
>>>
>>> In a real machine, the reset signal travels along "wires" (in quotes,
>>> because it need not be a dedicated wire, although it commonly is)
>>>
>>> We're not modelling these wires explicitly so far.  Instead, we make
>>> assumptions such as "reset flows along the qdev tree", which are close
>>> enough except when they aren't.
>>>
>>> What you propose is likely closer to reality than what we have now.
>>
>> Then maybe reality is easier to model =)
>>
>>> Do I make sense?
>>
>> I guess so. Now I wonder if Peter's approach is doable while still
>> having "incompletely QOMified devices".
>>
>> But if we can propagate reset tree via QOM, it is a good excuse
>> to finish QOM'ifying devices and enforce the API to prohibit non-QOM
>> ones.
>>
>> And remove the crutch in device_set_realized().
>>
 That means that, for instance, if you reset an SoC container object
 it will reset all the sub-devices within the SoC and the miscellaneous
 bits of glue logic like OR gates it might also own[*]. It also means that
 CPU objects should no longer need weird special casing, because they
 are part of the QOM hierarchy and get reset that way.

 [*] Fun fact: TYPE_OR_IRQ inherits directly from TYPE_DEVICE which
 means that pretty much no instances of it ever get reset.

 There is of course a massive unsolved problem with this idea, which
 is the usual "how do we get there from here" one.

 (Eventually I think we might be able to collapse TYPE_SYS_BUS_DEVICE
 down into TYPE_DEVICE: there is no particular reason why a TYPE_DEVICE
 can have GPIO inputs and outputs but only a TYPE_SYS_BUS_DEVICE can
 claim to have MMIO regions and IRQs. "Only sysbus devices get reset"
 is a big part of why a lot of devices today are sysbus.)
> 
> Looking at qemu_register_reset() uses I found this commit:
> 
> commit 0c7322cfd3fd382c0096c2a9f00775818a878e13
> Date:   Mon Jun 29 08:21:10 2015 +0200
> 
>  watchdog/diag288: correctly register for system reset requests
> 
>  The diag288 watchdog is no sysbus device, therefore it doesn't get
>  triggered on resets automatically using dc->reset.
> 
>  Let's register the reset handler manually, so we get correctly notified
>  again when a system reset was requested. Also reset the watchdog on
>  subsystem resets that don't trigger a full system reset.
> 
> Why is the reset() handler in DeviceClass and not in SysbusDeviceClass
> if "Only sysbus devices get reset"? ...

Ah, probably because the problem is generic to all busses (ISA, ...)
and not just sysbus.

>>> Sysbus may habe been a design mistake.  It goes back the qdev design
>>> assumption "every device plugs into exactly one bus, every bus is part
>>> of exactly one device, and the main system bus is the root of 

Re: [PULL 24/24] bsd-user: move sparc cpu_loop into target_arch_cpu.h as target_cpu_loop

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Move the sparc cpu_loop out of main.c and into target_arch_cpu.h and
rename it from cpu_loop to target_cpu_loop. Remove the #ifdef around
the catch-all cpu_loop.

Signed-off-by: Stacey Son
Signed-off-by: Warner Losh
---
  bsd-user/main.c  | 305 ---
  bsd-user/sparc/target_arch_cpu.h | 300 ++
  2 files changed, 300 insertions(+), 305 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PULL 23/24] bsd-user: move x86 (i386 and x86_64) cpu_loop to target_arch_cpu.h

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Move the x86 version of the cpu_loop to target_arch_cpu.h as
target_cpu_loop. Create a cpu_loop that calls the target_cpu_loop function, but
only for x86 for now. This is code-movement only commit.

Signed-off-by: Stacey Son
Signed-off-by: Warner Losh
---
  bsd-user/i386/target_arch_cpu.h | 283 +++
  bsd-user/main.c | 284 +---
  2 files changed, 286 insertions(+), 281 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PULL 22/24] bsd-user: create target_arch_cpu.h

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Create target_arch_cpu.h to house the target_cpu_loop and target_cpu_init
functions. These are the empty files that will be populated by moving the
appropriate cpu-specific functions out of main.c. This work pre-dates the
linux-user work that moved these to cpu-loop.c, so was done differently. As
there's a number of things linux-user did differently than bsd-user in their
time of divergence, and as the recertification of the code to redo it the same
way will take a fair amount of effort, a separate effort to address the
divergence once everything is in the tree and we can create a common qemu-user
directory for the munane common elements between the two.

Signed-off-by: Stacey Son
Signed-off-by: Warner Losh
---
  bsd-user/arm/target_arch_cpu.h | 22 ++
  bsd-user/i386/target_arch_cpu.h| 22 ++
  bsd-user/main.c|  1 +
  bsd-user/sparc/target_arch_cpu.h   | 22 ++
  bsd-user/sparc64/target_arch_cpu.h | 19 +++
  bsd-user/x86_64/target_arch_cpu.h  | 19 +++
  6 files changed, 105 insertions(+)
  create mode 100644 bsd-user/arm/target_arch_cpu.h
  create mode 100644 bsd-user/i386/target_arch_cpu.h
  create mode 100644 bsd-user/sparc/target_arch_cpu.h
  create mode 100644 bsd-user/sparc64/target_arch_cpu.h
  create mode 100644 bsd-user/x86_64/target_arch_cpu.h


Reviewed-by: Richard Henderson 

r~

Re: [PULL 21/24] bsd-user: add arm target_signal.h

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

+static inline abi_ulong get_sp_from_cpustate(CPUARMState *state)
+{
+return state->regs[R_ESP];
+}


Shall we just wait until arm actually compiles?
This won't, being a copy from x86...


r~

Re: [PULL 20/24] bsd-user: introduce host_os.h for bsd-specific code and defaults

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Introduce host_os.h for frebsd, netbsd and openbsd. This sets the default bsd
being implemented today. In the future it will have code that is per-BSD
specific. Abstracted from a larger c93465b6208c4c95cc0a394ffef4180ba6ccf27a in
the qemu-bsd-user repo.

Signed-off-by: Stacey Son
Signed-off-by: Warner Losh
---
  bsd-user/freebsd/host_os.h | 25 +
  bsd-user/main.c|  4 +++-
  bsd-user/netbsd/host_os.h  | 25 +
  bsd-user/openbsd/host_os.h | 25 +
  4 files changed, 78 insertions(+), 1 deletion(-)
  create mode 100644 bsd-user/freebsd/host_os.h
  create mode 100644 bsd-user/netbsd/host_os.h
  create mode 100644 bsd-user/openbsd/host_os.h


Reviewed-by: Richard Henderson 

r~

Re: [PULL 18/24] bsd-user: style changes for {}

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Fix various issues with {} not being present on if / for / case statements.
Tweak indentation where needed to appease checkpatch after this.
Minor line length tweaks

Signed-off-by: Warner Losh
---
  bsd-user/main.c | 100 +---
  1 file changed, 60 insertions(+), 40 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PULL 16/24] bsd-user: Use preferred block comments

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Use the preferred block comment style.

Signed-off-by: Warner Losh
---
  bsd-user/main.c | 28 ++--
  1 file changed, 18 insertions(+), 10 deletions(-)



Reviewed-by: Richard Henderson 

r~

Re: Resetting non-qdev children in a 3-phase reset device

[Philippe Mathieu-Daudé]

On 4/22/21 4:20 PM, Philippe Mathieu-Daudé wrote:
> On 4/22/21 3:21 PM, Markus Armbruster wrote:
>> Peter Maydell  writes:

>> Most qdevs plug into a qbus, but some don't.
>>
>> DeviceClass member @bus_type names the kind of bus the device plugs
>> into.  It's a QOM type name.  Example: for a PCI device, it's
>> TYPE_PCI_BUS, and the device must be plugged into an instance of a
>> (subtype of) TYPE_PCI_BUS.
>>
>> If @bus_type is null, the device does not plug into any qbus.
>>
>> The qbus a device is plugged into is also called the parent bus.  Not to
>> be confused with the QOM parent.
>>
 But even without parent they end in the /unattached
 container below /machine, so if the reset were there, the
 machine could still iterate over the /unattached children.
>>>
>>> ...yes, /unattached is what I was thinking about.
>>>
>>> My current half-thought-through view is that where we ought
>>> to try to end up is something like:
>>>
>>>  * "real" buses should continue to propagate reset
>>>(A "real" bus is like PCI, SCSI, and other buses where the real
>>>hardware has a concept of a "bus reset" or where the power to the
>>>plugged device comes from the bus so that powercycling the
>>>controller naturally powercycles the devices. Sysbus is not a
>>>"real" bus; I haven't checked the others to see if we have any
>>>other non-real buses)
>>>  * reset should follow the QOM tree for objects not on a "real" bus
>>>(that is, the qdev "reset this device" function should do
>>>"iterate through my QOM children and reset those which are not
>>>on a real bus" as well as its current "reset myself" and "reset
>>>every qbus I have")
>>>  * instead of reset starting with the sysbus and working along the
>>>qbus hierarchy, we start by resetting the machine. That should
>>>include resetting all the QOM children of the machine. Any
>>>device which has a qbus should reset the qbus as part of its
>>>reset, but only "real" buses reset their children when reset.
>>
>> Sounds like an approximation of reset wire modelling :)
>>
>> In a real machine, the reset signal travels along "wires" (in quotes,
>> because it need not be a dedicated wire, although it commonly is)
>>
>> We're not modelling these wires explicitly so far.  Instead, we make
>> assumptions such as "reset flows along the qdev tree", which are close
>> enough except when they aren't.
>>
>> What you propose is likely closer to reality than what we have now.
> 
> Then maybe reality is easier to model =)
> 
>> Do I make sense?
> 
> I guess so. Now I wonder if Peter's approach is doable while still
> having "incompletely QOMified devices".
> 
> But if we can propagate reset tree via QOM, it is a good excuse
> to finish QOM'ifying devices and enforce the API to prohibit non-QOM
> ones.
> 
> And remove the crutch in device_set_realized().
> 
>>> That means that, for instance, if you reset an SoC container object
>>> it will reset all the sub-devices within the SoC and the miscellaneous
>>> bits of glue logic like OR gates it might also own[*]. It also means that
>>> CPU objects should no longer need weird special casing, because they
>>> are part of the QOM hierarchy and get reset that way.
>>>
>>> [*] Fun fact: TYPE_OR_IRQ inherits directly from TYPE_DEVICE which
>>> means that pretty much no instances of it ever get reset.
>>>
>>> There is of course a massive unsolved problem with this idea, which
>>> is the usual "how do we get there from here" one.
>>>
>>> (Eventually I think we might be able to collapse TYPE_SYS_BUS_DEVICE
>>> down into TYPE_DEVICE: there is no particular reason why a TYPE_DEVICE
>>> can have GPIO inputs and outputs but only a TYPE_SYS_BUS_DEVICE can
>>> claim to have MMIO regions and IRQs. "Only sysbus devices get reset"
>>> is a big part of why a lot of devices today are sysbus.)

Looking at qemu_register_reset() uses I found this commit:

commit 0c7322cfd3fd382c0096c2a9f00775818a878e13
Date:   Mon Jun 29 08:21:10 2015 +0200

 watchdog/diag288: correctly register for system reset requests

 The diag288 watchdog is no sysbus device, therefore it doesn't get
 triggered on resets automatically using dc->reset.

 Let's register the reset handler manually, so we get correctly notified
 again when a system reset was requested. Also reset the watchdog on
 subsystem resets that don't trigger a full system reset.

Why is the reset() handler in DeviceClass and not in SysbusDeviceClass
if "Only sysbus devices get reset"? ...

>>
>> Sysbus may habe been a design mistake.  It goes back the qdev design
>> assumption "every device plugs into exactly one bus, every bus is part
>> of exactly one device, and the main system bus is the root of this
>> tree".  The assumption ceased to hold long ago, but we still have
>> sysbus.

Re: [PULL 08/24] bsd-user: style tweak: use C not C++ comments

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Signed-off-by: Warner Losh
---
  bsd-user/elfload.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PULL 10/24] bsd-user: style tweak: use C not C++ comments

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh 

Signed-off-by: Warner Losh 
---
  bsd-user/qemu.h | 10 ++
  1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h
index b836b603af..3480db890d 100644
--- a/bsd-user/qemu.h
+++ b/bsd-user/qemu.h
@@ -71,7 +71,7 @@ struct image_info {
  
  struct sigqueue {

  struct sigqueue *next;
-//target_siginfo_t info;
+/* target_siginfo_t info; */
  };


Ack.


@@ -193,9 +193,11 @@ extern int do_strace;
  /* signal.c */
  void process_pending_signals(CPUArchState *cpu_env);
  void signal_init(void);
-//int queue_signal(CPUArchState *env, int sig, target_siginfo_t *info);
-//void host_to_target_siginfo(target_siginfo_t *tinfo, const siginfo_t *info);
-//void target_to_host_siginfo(siginfo_t *info, const target_siginfo_t *tinfo);
+/*
+ * int queue_signal(CPUArchState *env, int sig, target_siginfo_t *info);
+ * void host_to_target_siginfo(target_siginfo_t *tinfo, const siginfo_t *info);
+ * void target_to_host_siginfo(siginfo_t *info, const target_siginfo_t *tinfo);
+ */


These should probably be deleted with the #if 0 code that references them.


r~

Re: [PULL 15/24] bsd-user: Fix commentary issues

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Lines > 80 or 90 characters
C++ comments
BSD /*- block comment convention removed.

Signed-off-by: Warner Losh
---
  bsd-user/bsd-mman.h | 42 ++
  1 file changed, 26 insertions(+), 16 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PULL 09/24] bsd-user: style tweak: use C not C++ comments

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Signed-off-by: Warner Losh
---
  bsd-user/main.c | 16 
  1 file changed, 8 insertions(+), 8 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PULL 03/24] bsd-user: whitespace changes

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Space after keywords, no space for function calls and spaces around operators.

Signed-off-by: Warner Losh
---
  bsd-user/main.c | 40 
  1 file changed, 20 insertions(+), 20 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PULL 07/24] bsd-user: style tweak: keyword space (

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Signed-off-by: Warner Losh
---
  bsd-user/uaccess.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)



Reviewed-by: Richard Henderson 

r~

Re: [PULL 06/24] bsd-user: style tweak: keyword space (

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Signed-off-by: Warner Losh
---
  bsd-user/syscall.c | 18 +-
  1 file changed, 9 insertions(+), 9 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PULL 02/24] bsd-user: whitespace changes

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Fix various whitespace-only issues from checkpatch:
 keyword space (
 no space before ( on function calls
 spaces around operators
 suspect indentations (including one functions reindented)
 extra spaces around unary operators

Signed-off-by: Warner Losh
---
  bsd-user/elfload.c | 326 ++---
  1 file changed, 163 insertions(+), 163 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PULL 05/24] bsd-user: style tweak: keyword space (

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Signed-off-by: Warner Losh
---
  bsd-user/qemu.h | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PULL 04/24] bsd-user: style tweak: keyword space (

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

Signed-off-by: Warner Losh
---
  bsd-user/mmap.c | 22 +++---
  1 file changed, 11 insertions(+), 11 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PULL 01/24] bsd-user: whitespace changes

[Richard Henderson]

On 4/23/21 1:39 PM, i...@bsdimp.com wrote:

From: Warner Losh

keyword space paren, no space before ( in function calls, spaces around
operators.

Signed-off-by: Warner Losh
---
  bsd-user/bsdload.c | 26 +-
  1 file changed, 13 insertions(+), 13 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PULL 11/24] bsd-user: style tweak: if 0 -> ifdef notyet for code needed in future

[Richard Henderson]

On 4/23/21 3:08 PM, Philippe Mathieu-Daudé wrote:

On 4/23/21 11:38 PM, Warner Losh wrote:

On Fri, Apr 23, 2021 at 3:23 PM Philippe Mathieu-Daudé mailto:f4...@amsat.org>> wrote:

 On 4/23/21 10:39 PM, i...@bsdimp.com  wrote:
 > From: Warner Losh mailto:i...@bsdimp.com>>
 >
 > Signed-off-by: Warner Losh mailto:i...@bsdimp.com>>
 > ---
 >  bsd-user/elfload.c | 4 ++--
 >  1 file changed, 2 insertions(+), 2 deletions(-)
 >
 > diff --git a/bsd-user/elfload.c b/bsd-user/elfload.c
 > index 87154283ef..07a00ddbd5 100644
 > --- a/bsd-user/elfload.c
 > +++ b/bsd-user/elfload.c
 > @@ -1270,7 +1270,7 @@ int load_elf_binary(struct linux_binprm
 *bprm, struct target_pt_regs *regs,
 >                ibcs2_interpreter = 1;
 >              }
 >
 > -#if 0
 > +#ifdef notyet

 Better describe in the cover letter "ignored checkpatch errors" and keep
 this unmodified rather than trying to bypass them by dubious code style
 IMO. The checkpatch.pl  script is here to help
 us ;)


This one I honestly was unsure about. To be honest, it's fear that kept
me keeping this code  Maybe it would be even better to just delete
this code entirely. I have a working final state to pull from, now that I
think about it to forumlate a reply, so maybe that would be even
better?


Personally I find it simpler. We use git, so we have the history in
the repository, can look at it and restore it if needed. This code
is dead since years.

Let's see what others think about this.


Definitely better to remove.  We can review the new code more easily that way.


r~

Re: [PATCH] target/mips: Migrate missing CPU fields

[Richard Henderson]

On 4/23/21 3:00 PM, Philippe Mathieu-Daudé wrote:

Add various missing fields to the CPU migration vmstate:

- CP0_VPControl & CP0_GlobalNumber  (01bc435b44b 2016-02-03)
- CMGCRBase (c870e3f52ca 2016-03-15)
- CP0_ErrCtl(0d74a222c27 2016-03-25)
- MXU GPR[] & CR(eb5559f67dc 2018-10-18)
- R5900 128-bit upper half  (a168a796e1c 2019-01-17)

This is a migration break.

Fixes: 01bc435b44b ("target-mips: implement R6 multi-threading")
Fixes: c870e3f52ca ("target-mips: add CMGCRBase register")
Fixes: 0d74a222c27 ("target-mips: make ITC Configuration Tags accessible to the 
CPU")
Fixes: eb5559f67dc ("target/mips: Introduce MXU registers")
Fixes: a168a796e1c ("target/mips: Introduce 32 R5900 multimedia registers")
Signed-off-by: Philippe Mathieu-Daudé
---
  target/mips/machine.c | 21 +++--
  1 file changed, 15 insertions(+), 6 deletions(-)


Acked-by: Richard Henderson 

I didn't review the whole CPUMIPSState, but I agree that everything
that is added should have been listed.


r~

Re: [PATCH v1 11/25] tests/tcg: Add docker_as and docker_ld cmds

[Philippe Mathieu-Daudé]

On 4/19/21 4:54 PM, Alex Bennée wrote:
> From: Bastian Koppelmann 
> 
> At least for the TriCore target no easily available c compiler exists.
> Thus we need to rely on "as" and "ld". This allows us to run them
> through the docker image. We don't test the generation capabilities of
> docker images as they are assumed to work.
> 
> Signed-off-by: Bastian Koppelmann 
> [AJB: fix quoting, only handle docker & clear, test -n, tweak commit msg]
> Signed-off-by: Alex Bennée 
> ---
>  tests/tcg/Makefile.qemu | 15 +++
>  tests/tcg/configure.sh  | 17 -
>  2 files changed, 31 insertions(+), 1 deletion(-)

Reviewed-by: Philippe Mathieu-Daudé 

Re: [PATCH v1 10/25] tests/docker: Added libbpf library to the docker files.

[Philippe Mathieu-Daudé]

On 4/19/21 4:54 PM, Alex Bennée wrote:
> From: Andrew Melnychenko 
> 
> The series of patches for eBPF RSS adds libbpf dependency for qemu.
> https://lists.gnu.org/archive/html/qemu-devel/2021-03/msg08887.html
> 
> With this patch, libbpf added:
>   Alpine - added libbpf-dev
>   Centos 8 - added libbpf-devel
>   Fedora - added libbpf-devel
> 
> Signed-off-by: Andrew Melnychenko 
> Signed-off-by: Alex Bennée 
> Message-Id: <20210406082947.672708-2-and...@daynix.com>
> ---
>  tests/docker/dockerfiles/alpine.docker  | 1 +
>  tests/docker/dockerfiles/centos8.docker | 1 +
>  tests/docker/dockerfiles/fedora.docker  | 1 +
>  3 files changed, 3 insertions(+)

Reviewed-by: Philippe Mathieu-Daudé 

Re: [PATCH v1 06/25] docker: Add Hexagon image

[Philippe Mathieu-Daudé]

On 4/19/21 4:54 PM, Alex Bennée wrote:
> From: Alessandro Di Federico 
> 
> This image is a little special because it takes a long time to build.
> As such most users don't want to be doing that and just pull random
> binaries from the ether as intended by the container gods. This
> involves someone with credentials and a beefy machine running:
> 
>   make docker-image-debian-hexagon-cross V=1 NOCACHE=1 J=30
>   docker tag qemu/debian-hexagon-cross 
> registry.gitlab.com/qemu-project/qemu/qemu/debian-hexagon-cross
>   docker push registry.gitlab.com/qemu-project/qemu/qemu/debian-hexagon-cross
> 
> With a suitable binary in the "cloud" a normal user will run:
> 
>   make docker-image-debian-hexagon-cross
> 
> or have it run for them through the dependency mechanism of our
> over-engineered makefiles and get the binary they wanted. There are a
> few wrinkles of course including needing to tweak the final image to
> have the credentials of the user so we can actually do our cross
> compiles.
> 
> Signed-off-by: Alex Bennée 
> Cc: Alessandro Di Federico 
> Cc: Philippe Mathieu-Daudé 
> Cc: Brian Cain 
> 
> ---
> vAJB:
>   - dropped all r-b/sob due to rewrite
>   - split into a multi-stage dockerfile
>   - make dockerfile standalone
>   - play fugly make games
> v2
>   - update LLVM version per 
> bn7pr02mb4194df5752ef3bade858018db8...@bn7pr02mb4194.namprd02.prod.outlook.com
> ---
>  MAINTAINERS   |   2 +
>  tests/docker/Makefile.include |  22 +++
>  .../dockerfiles/debian-hexagon-cross.docker   |  44 ++
>  .../build-toolchain.sh| 141 ++
>  4 files changed, 209 insertions(+)
>  create mode 100644 tests/docker/dockerfiles/debian-hexagon-cross.docker
>  create mode 100755 
> tests/docker/dockerfiles/debian-hexagon-cross.docker.d/build-toolchain.sh

Tested-by: Philippe Mathieu-Daudé 

Re: [PATCH v1 07/25] tests/tcg: Use Hexagon Docker image

[Philippe Mathieu-Daudé]

On 4/19/21 4:54 PM, Alex Bennée wrote:
> From: Alessandro Di Federico 
> 
> [PMD: Split from 'Add Hexagon Docker image' patch]
> 
> Signed-off-by: Alessandro Di Federico 
> Signed-off-by: Philippe Mathieu-Daudé 
> Signed-off-by: Alex Bennée 
> Message-Id: <20210228222314.304787-5-f4...@amsat.org>
> Message-Id: <20210305092328.31792-6-alex.ben...@linaro.org>
> ---
>  tests/tcg/configure.sh | 4 
>  1 file changed, 4 insertions(+)

Reviewed-by: Philippe Mathieu-Daudé 
Tested-by: Philippe Mathieu-Daudé 

Re: [PATCH v1 08/25] gitlab: add build-user-hexagon test

[Philippe Mathieu-Daudé]

On 4/19/21 4:54 PM, Alex Bennée wrote:
> We special case this as the container with the cross compiler for the
> tests takes so long to build it is manually uploaded into the
> registry.
> 
> Signed-off-by: Alex Bennée 
> Reviewed-by: Philippe Mathieu-Daudé 
> Reviewed-by: Wainer dos Santos Moschetta 
> Message-Id: <20210305092328.31792-7-alex.ben...@linaro.org>
> ---
>  .gitlab-ci.yml | 11 +++
>  1 file changed, 11 insertions(+)

Tested-by: Philippe Mathieu-Daudé 

Re: [PULL 11/24] bsd-user: style tweak: if 0 -> ifdef notyet for code needed in future

[Philippe Mathieu-Daudé]

On 4/23/21 11:38 PM, Warner Losh wrote:
> On Fri, Apr 23, 2021 at 3:23 PM Philippe Mathieu-Daudé  > wrote:
> 
> On 4/23/21 10:39 PM, i...@bsdimp.com  wrote:
> > From: Warner Losh mailto:i...@bsdimp.com>>
> >
> > Signed-off-by: Warner Losh mailto:i...@bsdimp.com>>
> > ---
> >  bsd-user/elfload.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/bsd-user/elfload.c b/bsd-user/elfload.c
> > index 87154283ef..07a00ddbd5 100644
> > --- a/bsd-user/elfload.c
> > +++ b/bsd-user/elfload.c
> > @@ -1270,7 +1270,7 @@ int load_elf_binary(struct linux_binprm
> *bprm, struct target_pt_regs *regs,
> >                ibcs2_interpreter = 1;
> >              }
> > 
> > -#if 0
> > +#ifdef notyet
> 
> Better describe in the cover letter "ignored checkpatch errors" and keep
> this unmodified rather than trying to bypass them by dubious code style
> IMO. The checkpatch.pl  script is here to help
> us ;)
> 
> 
> This one I honestly was unsure about. To be honest, it's fear that kept
> me keeping this code  Maybe it would be even better to just delete
> this code entirely. I have a working final state to pull from, now that I
> think about it to forumlate a reply, so maybe that would be even
> better?

Personally I find it simpler. We use git, so we have the history in
the repository, can look at it and restore it if needed. This code
is dead since years.

Let's see what others think about this.

Regards,

Phil.

Re: [RFC PATCH 2/4] hw/ppc: Add kvm-only file spapr_hcall_tcg_stub.c

[Fabiano Rosas]

"Lucas Mateus Castro (alqotel)"  writes:

> This file should be used instead of spapr_hcall.c when compiling
> without tcg (--disable-tcg) as it does not call tcg-only functions and
> trips fatal error when invalid functions are called

Not calling any TCG-specific function is not an indication of the code
being "kvm only" in this case. So I think this patch is backwards, we
should instead aim to remove tcg-only code from spapr_hcall.c.

> As of right now some functions are repeated here and in spapr_hcall.c,
> as they are static, is some other method to deal with this
> recommended?

Yeah, you should not be repeating the functions. From previous
discussions on this topic I understood that we'd have another
hypercall_register_types for TCG. So we could have a spapr_hcall_tcg.c
that contains tcg-only functions. And they would only be used in that
file so they would continue being static.

> Also some functions should only cause a fatal error as KVM should
> intercept and handle their call, but as I'm not sure which ones I just
> did this to functions that called tcg-only code.
>
> Signed-off-by: Lucas Mateus Castro (alqotel) 
> ---
>  hw/ppc/spapr_hcall_tcg_stub.c | 1824 +
>  1 file changed, 1824 insertions(+)
>  create mode 100644 hw/ppc/spapr_hcall_tcg_stub.c
>
> diff --git a/hw/ppc/spapr_hcall_tcg_stub.c
> b/hw/ppc/spapr_hcall_tcg_stub.c

Your usage of stub here is a bit confusing. Take a look at
target/ppc/kvm-stub.c and accel/stubs/kvm-stub.c. These are files that
are only included in the build to satisfy any references to the symbols
they contain. The implementation is just an empty body or an error
return. So if the feature is included, the actual foo.c will be present
with the proper implementation; if not, we get the empty stub.

Also, look at target/ppc/kvm.h under #ifndef CONFIG_USER_ONLY. There's
some similar ideas there that could be of help.

So my suggestion for this patch is take a step back and move first all
of the TCG-only functions that are certainly not needed. We can then
figure out what patterns we are going to use to stub them in the
KVM-only build. After that we take a look at what's left and go from
there.

> new file mode 100644
> index 00..6682279b6e
> --- /dev/null
> +++ b/hw/ppc/spapr_hcall_tcg_stub.c
> @@ -0,0 +1,1824 @@
> +#include "qemu/osdep.h"
> +#include "qemu/cutils.h"
> +#include "qapi/error.h"
> +#include "sysemu/hw_accel.h"
> +#include "sysemu/runstate.h"
> +#include "qemu/log.h"
> +#include "qemu/main-loop.h"
> +#include "qemu/module.h"
> +#include "qemu/error-report.h"
> +#include "cpu.h"
> +#include "exec/exec-all.h"
> +#include "helper_regs.h"
> +#include "hw/ppc/spapr.h"
> +#include "hw/ppc/spapr_cpu_core.h"
> +#include "mmu-hash64.h"
> +#include "cpu-models.h"
> +#include "trace.h"
> +#include "kvm_ppc.h"
> +#include "hw/ppc/fdt.h"
> +#include "hw/ppc/spapr_ovec.h"
> +#include "mmu-book3s-v3.h"
> +#include "hw/mem/memory-device.h"
> +
> +static bool has_spr(PowerPCCPU *cpu, int spr)
> +{
> +/* We can test whether the SPR is defined by checking for a valid name */
> +return cpu->env.spr_cb[spr].name != NULL;
> +}
> +
> +static inline bool valid_ptex(PowerPCCPU *cpu, target_ulong ptex)
> +{
> +/*
> + * hash value/pteg group index is normalized by HPT mask
> + */
> +if (((ptex & ~7ULL) / HPTES_PER_GROUP) & ~ppc_hash64_hpt_mask(cpu)) {
> +return false;
> +}
> +return true;
> +}
> +
> +static bool is_ram_address(SpaprMachineState *spapr, hwaddr addr)
> +{
> +MachineState *machine = MACHINE(spapr);
> +DeviceMemoryState *dms = machine->device_memory;
> +
> +if (addr < machine->ram_size) {
> +return true;
> +}
> +if ((addr >= dms->base)
> +&& ((addr - dms->base) < memory_region_size(>mr))) {
> +return true;
> +}
> +
> +return false;
> +}
> +
> +static target_ulong h_enter(PowerPCCPU *cpu, SpaprMachineState *spapr,
> +target_ulong opcode, target_ulong *args)
> +{
> +/*
> + * FATAL ERROR
> + */
> +g_assert_not_reached();
> +return 0;
> +}
> +
> +typedef enum {
> +REMOVE_SUCCESS = 0,
> +REMOVE_NOT_FOUND = 1,
> +REMOVE_PARM = 2,
> +REMOVE_HW = 3,
> +} RemoveResult;
> +
> +static RemoveResult remove_hpte(PowerPCCPU *cpu
> +, target_ulong ptex,
> +target_ulong avpn,
> +target_ulong flags,
> +target_ulong *vp, target_ulong *rp)
> +{
> +/*
> + * FATAL ERROR
> + */
> +*rp = 0;
> +g_assert_not_reached();
> +return 0;
> +}
> +
> +static target_ulong h_remove(PowerPCCPU *cpu, SpaprMachineState *spapr,
> + target_ulong opcode, target_ulong *args)
> +{
> +CPUPPCState *env = >env;
> +target_ulong flags = args[0];
> +target_ulong ptex = args[1];
> +target_ulong avpn = args[2];
> +RemoveResult 

[PATCH] target/mips: Migrate missing CPU fields

[Philippe Mathieu-Daudé]

Add various missing fields to the CPU migration vmstate:

- CP0_VPControl & CP0_GlobalNumber  (01bc435b44b 2016-02-03)
- CMGCRBase (c870e3f52ca 2016-03-15)
- CP0_ErrCtl(0d74a222c27 2016-03-25)
- MXU GPR[] & CR(eb5559f67dc 2018-10-18)
- R5900 128-bit upper half  (a168a796e1c 2019-01-17)

This is a migration break.

Fixes: 01bc435b44b ("target-mips: implement R6 multi-threading")
Fixes: c870e3f52ca ("target-mips: add CMGCRBase register")
Fixes: 0d74a222c27 ("target-mips: make ITC Configuration Tags accessible to the 
CPU")
Fixes: eb5559f67dc ("target/mips: Introduce MXU registers")
Fixes: a168a796e1c ("target/mips: Introduce 32 R5900 multimedia registers")
Signed-off-by: Philippe Mathieu-Daudé 
---
 target/mips/machine.c | 21 +++--
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/target/mips/machine.c b/target/mips/machine.c
index b5fda6a2786..80d37f9c2fc 100644
--- a/target/mips/machine.c
+++ b/target/mips/machine.c
@@ -81,6 +81,9 @@ const VMStateDescription vmstate_inactive_fpu = {
 
 static VMStateField vmstate_tc_fields[] = {
 VMSTATE_UINTTL_ARRAY(gpr, TCState, 32),
+#if defined(TARGET_MIPS64)
+VMSTATE_UINT64_ARRAY(gpr_hi, TCState, 32),
+#endif /* TARGET_MIPS64 */
 VMSTATE_UINTTL(PC, TCState),
 VMSTATE_UINTTL_ARRAY(HI, TCState, MIPS_DSP_ACC),
 VMSTATE_UINTTL_ARRAY(LO, TCState, MIPS_DSP_ACC),
@@ -95,20 +98,22 @@ static VMStateField vmstate_tc_fields[] = {
 VMSTATE_INT32(CP0_Debug_tcstatus, TCState),
 VMSTATE_UINTTL(CP0_UserLocal, TCState),
 VMSTATE_INT32(msacsr, TCState),
+VMSTATE_UINTTL_ARRAY(mxu_gpr, TCState, NUMBER_OF_MXU_REGISTERS - 1),
+VMSTATE_UINTTL(mxu_cr, TCState),
 VMSTATE_END_OF_LIST()
 };
 
 const VMStateDescription vmstate_tc = {
 .name = "cpu/tc",
-.version_id = 1,
-.minimum_version_id = 1,
+.version_id = 2,
+.minimum_version_id = 2,
 .fields = vmstate_tc_fields
 };
 
 const VMStateDescription vmstate_inactive_tc = {
 .name = "cpu/inactive_tc",
-.version_id = 1,
-.minimum_version_id = 1,
+.version_id = 2,
+.minimum_version_id = 2,
 .fields = vmstate_tc_fields
 };
 
@@ -213,8 +218,8 @@ const VMStateDescription vmstate_tlb = {
 
 const VMStateDescription vmstate_mips_cpu = {
 .name = "cpu",
-.version_id = 20,
-.minimum_version_id = 20,
+.version_id = 21,
+.minimum_version_id = 21,
 .post_load = cpu_post_load,
 .fields = (VMStateField[]) {
 /* Active TC */
@@ -241,6 +246,7 @@ const VMStateDescription vmstate_mips_cpu = {
 
 /* Remaining CP0 registers */
 VMSTATE_INT32(env.CP0_Index, MIPSCPU),
+VMSTATE_INT32(env.CP0_VPControl, MIPSCPU),
 VMSTATE_INT32(env.CP0_Random, MIPSCPU),
 VMSTATE_INT32(env.CP0_VPEControl, MIPSCPU),
 VMSTATE_INT32(env.CP0_VPEConf0, MIPSCPU),
@@ -251,6 +257,7 @@ const VMStateDescription vmstate_mips_cpu = {
 VMSTATE_INT32(env.CP0_VPEOpt, MIPSCPU),
 VMSTATE_UINT64(env.CP0_EntryLo0, MIPSCPU),
 VMSTATE_UINT64(env.CP0_EntryLo1, MIPSCPU),
+VMSTATE_INT32(env.CP0_GlobalNumber, MIPSCPU),
 VMSTATE_UINTTL(env.CP0_Context, MIPSCPU),
 VMSTATE_INT32(env.CP0_MemoryMapID, MIPSCPU),
 VMSTATE_INT32(env.CP0_PageMask, MIPSCPU),
@@ -286,6 +293,7 @@ const VMStateDescription vmstate_mips_cpu = {
 VMSTATE_UINTTL(env.CP0_EPC, MIPSCPU),
 VMSTATE_INT32(env.CP0_PRid, MIPSCPU),
 VMSTATE_UINTTL(env.CP0_EBase, MIPSCPU),
+VMSTATE_UINTTL(env.CP0_CMGCRBase, MIPSCPU),
 VMSTATE_INT32(env.CP0_Config0, MIPSCPU),
 VMSTATE_INT32(env.CP0_Config1, MIPSCPU),
 VMSTATE_INT32(env.CP0_Config2, MIPSCPU),
@@ -305,6 +313,7 @@ const VMStateDescription vmstate_mips_cpu = {
 VMSTATE_INT32(env.CP0_Debug, MIPSCPU),
 VMSTATE_UINTTL(env.CP0_DEPC, MIPSCPU),
 VMSTATE_INT32(env.CP0_Performance0, MIPSCPU),
+VMSTATE_INT32(env.CP0_ErrCtl, MIPSCPU),
 VMSTATE_UINT64(env.CP0_TagLo, MIPSCPU),
 VMSTATE_INT32(env.CP0_DataLo, MIPSCPU),
 VMSTATE_INT32(env.CP0_TagHi, MIPSCPU),
-- 
2.26.3

[PATCH 08/11] qemu-io-cmds: refactor read_f(): drop extra helpers and variables

[Vladimir Sementsov-Ogievskiy]

Now all commands are in coroutines, so we want to move to _co_
functions. Let's just drop helpers and use blk_co_ functions directly.
Note that count is checked at start of read_f anyway.
Both blk_co_pread and blk_co_load_vmstate returns 0 on success, so we
should not care to set ret to 0 explicitly. Moreover, no caller is
care, is successful ret of qemuio_command positive or not.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
 qemu-io-cmds.c | 44 ++--
 1 file changed, 6 insertions(+), 38 deletions(-)

diff --git a/qemu-io-cmds.c b/qemu-io-cmds.c
index adc9e64c37..bbebecba55 100644
--- a/qemu-io-cmds.c
+++ b/qemu-io-cmds.c
@@ -527,20 +527,6 @@ fail:
 return buf;
 }
 
-static int do_pread(BlockBackend *blk, char *buf, int64_t offset,
-int64_t bytes, int64_t *total)
-{
-if (bytes > INT_MAX) {
-return -ERANGE;
-}
-
-*total = blk_pread(blk, offset, (uint8_t *)buf, bytes);
-if (*total < 0) {
-return *total;
-}
-return 1;
-}
-
 static int do_pwrite(BlockBackend *blk, char *buf, int64_t offset,
  int64_t bytes, int flags, int64_t *total)
 {
@@ -586,20 +572,6 @@ static int do_write_compressed(BlockBackend *blk, char 
*buf, int64_t offset,
 return 1;
 }
 
-static int do_load_vmstate(BlockBackend *blk, char *buf, int64_t offset,
-   int64_t count, int64_t *total)
-{
-if (count > INT_MAX) {
-return -ERANGE;
-}
-
-*total = blk_load_vmstate(blk, (uint8_t *)buf, offset, count);
-if (*total < 0) {
-return *total;
-}
-return 1;
-}
-
 static int do_save_vmstate(BlockBackend *blk, char *buf, int64_t offset,
int64_t count, int64_t *total)
 {
@@ -667,17 +639,16 @@ static const cmdinfo_t read_cmd = {
 .help   = read_help,
 };
 
-static int read_f(BlockBackend *blk, int argc, char **argv)
+static int coroutine_fn read_f(BlockBackend *blk, int argc, char **argv)
 {
 struct timespec t1, t2;
 bool Cflag = false, qflag = false, vflag = false;
 bool Pflag = false, sflag = false, lflag = false, bflag = false;
-int c, cnt, ret;
-char *buf;
+int c, ret;
+uint8_t *buf;
 int64_t offset;
 int64_t count;
 /* Some compilers get confused and warn if this is not initialized.  */
-int64_t total = 0;
 int pattern = 0;
 int64_t pattern_offset = 0, pattern_count = 0;
 
@@ -780,9 +751,9 @@ static int read_f(BlockBackend *blk, int argc, char **argv)
 
 clock_gettime(CLOCK_MONOTONIC, );
 if (bflag) {
-ret = do_load_vmstate(blk, buf, offset, count, );
+ret = blk_co_load_vmstate(blk, buf, offset, count);
 } else {
-ret = do_pread(blk, buf, offset, count, );
+ret = blk_co_pread(blk, offset, count, buf, 0);
 }
 clock_gettime(CLOCK_MONOTONIC, );
 
@@ -790,9 +761,6 @@ static int read_f(BlockBackend *blk, int argc, char **argv)
 printf("read failed: %s\n", strerror(-ret));
 goto out;
 }
-cnt = ret;
-
-ret = 0;
 
 if (Pflag) {
 void *cmp_buf = g_malloc(pattern_count);
@@ -816,7 +784,7 @@ static int read_f(BlockBackend *blk, int argc, char **argv)
 
 /* Finally, report back -- -C gives a parsable format */
 t2 = tsub(t2, t1);
-print_report("read", , offset, count, total, cnt, Cflag);
+print_report("read", , offset, count, count, 1, Cflag);
 
 out:
 qemu_io_free(buf);
-- 
2.29.2

[PATCH 06/11] block: drop unused bdrv_debug_is_suspended()

[Vladimir Sementsov-Ogievskiy]

Now it's actually substituted by coroutine based
bdrv_debug_wait_break().

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
 include/block/block.h |  1 -
 include/block/block_int.h |  1 -
 block.c   | 13 -
 block/blkdebug.c  |  1 -
 4 files changed, 16 deletions(-)

diff --git a/include/block/block.h b/include/block/block.h
index e133adf54f..fb1897c1e8 100644
--- a/include/block/block.h
+++ b/include/block/block.h
@@ -647,7 +647,6 @@ int bdrv_debug_breakpoint(BlockDriverState *bs, const char 
*event,
const char *tag);
 int bdrv_debug_remove_breakpoint(BlockDriverState *bs, const char *tag);
 int bdrv_debug_resume(BlockDriverState *bs, const char *tag);
-bool bdrv_debug_is_suspended(BlockDriverState *bs, const char *tag);
 void coroutine_fn bdrv_debug_wait_break(BlockDriverState *bs, const char *tag);
 
 /**
diff --git a/include/block/block_int.h b/include/block/block_int.h
index 89e6904fc7..592acc960f 100644
--- a/include/block/block_int.h
+++ b/include/block/block_int.h
@@ -501,7 +501,6 @@ struct BlockDriver {
 int (*bdrv_debug_remove_breakpoint)(BlockDriverState *bs,
 const char *tag);
 int (*bdrv_debug_resume)(BlockDriverState *bs, const char *tag);
-bool (*bdrv_debug_is_suspended)(BlockDriverState *bs, const char *tag);
 void (*bdrv_debug_wait_break)(BlockDriverState *bs, const char *tag);
 
 void (*bdrv_refresh_limits)(BlockDriverState *bs, Error **errp);
diff --git a/block.c b/block.c
index 3ea088b9fb..f026d710b7 100644
--- a/block.c
+++ b/block.c
@@ -5689,19 +5689,6 @@ int bdrv_debug_resume(BlockDriverState *bs, const char 
*tag)
 return -ENOTSUP;
 }
 
-bool bdrv_debug_is_suspended(BlockDriverState *bs, const char *tag)
-{
-while (bs && bs->drv && !bs->drv->bdrv_debug_is_suspended) {
-bs = bdrv_primary_bs(bs);
-}
-
-if (bs && bs->drv && bs->drv->bdrv_debug_is_suspended) {
-return bs->drv->bdrv_debug_is_suspended(bs, tag);
-}
-
-return false;
-}
-
 void coroutine_fn bdrv_debug_wait_break(BlockDriverState *bs, const char *tag)
 {
 while (bs && bs->drv && !bs->drv->bdrv_debug_wait_break) {
diff --git a/block/blkdebug.c b/block/blkdebug.c
index 10b7c38467..608d1d5bd6 100644
--- a/block/blkdebug.c
+++ b/block/blkdebug.c
@@ -1062,7 +1062,6 @@ static BlockDriver bdrv_blkdebug = {
 .bdrv_debug_remove_breakpoint
 = blkdebug_debug_remove_breakpoint,
 .bdrv_debug_resume  = blkdebug_debug_resume,
-.bdrv_debug_is_suspended= blkdebug_debug_is_suspended,
 .bdrv_debug_wait_break  = blkdebug_debug_wait_break,
 
 .strong_runtime_opts= blkdebug_strong_runtime_opts,
-- 
2.29.2

[PATCH 10/11] qemu-io-cmds: drop do_co_readv() and do_co_writev() helpers

[Vladimir Sementsov-Ogievskiy]

They don't make much sense. Call blk_co_ functions directly and also
drop some redundant variables.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
 qemu-io-cmds.c | 38 ++
 1 file changed, 6 insertions(+), 32 deletions(-)

diff --git a/qemu-io-cmds.c b/qemu-io-cmds.c
index 2f0a27079d..9a0e5322de 100644
--- a/qemu-io-cmds.c
+++ b/qemu-io-cmds.c
@@ -527,24 +527,6 @@ fail:
 return buf;
 }
 
-static int coroutine_fn do_co_readv(BlockBackend *blk, QEMUIOVector *qiov,
-int64_t offset, int *total)
-{
-int ret = blk_co_preadv(blk, offset, qiov->size, qiov, 0);
-
-*total = qiov->size;
-return ret < 0 ? ret : 1;
-}
-
-static int coroutine_fn do_co_writev(BlockBackend *blk, QEMUIOVector *qiov,
- int64_t offset, int flags, int *total)
-{
-int ret = blk_co_pwritev(blk, offset, qiov->size, qiov, flags);
-
-*total = qiov->size;
-return ret < 0 ? ret : 1;
-}
-
 static void read_help(void)
 {
 printf(
@@ -767,11 +749,10 @@ static int coroutine_fn readv_f(BlockBackend *blk, int 
argc, char **argv)
 {
 struct timespec t1, t2;
 bool Cflag = false, qflag = false, vflag = false;
-int c, cnt, ret;
+int c, ret;
 char *buf;
 int64_t offset;
 /* Some compilers get confused and warn if this is not initialized.  */
-int total = 0;
 int nr_iov;
 QEMUIOVector qiov;
 int pattern = 0;
@@ -821,16 +802,13 @@ static int coroutine_fn readv_f(BlockBackend *blk, int 
argc, char **argv)
 }
 
 clock_gettime(CLOCK_MONOTONIC, );
-ret = do_co_readv(blk, , offset, );
+ret = blk_co_preadv(blk, offset, qiov.size, , 0);
 clock_gettime(CLOCK_MONOTONIC, );
 
 if (ret < 0) {
 printf("readv failed: %s\n", strerror(-ret));
 goto out;
 }
-cnt = ret;
-
-ret = 0;
 
 if (Pflag) {
 void *cmp_buf = g_malloc(qiov.size);
@@ -853,7 +831,7 @@ static int coroutine_fn readv_f(BlockBackend *blk, int 
argc, char **argv)
 
 /* Finally, report back -- -C gives a parsable format */
 t2 = tsub(t2, t1);
-print_report("read", , offset, qiov.size, total, cnt, Cflag);
+print_report("read", , offset, qiov.size, qiov.size, 1, Cflag);
 
 out:
 qemu_iovec_destroy();
@@ -1100,11 +1078,10 @@ static int coroutine_fn writev_f(BlockBackend *blk, int 
argc, char **argv)
 struct timespec t1, t2;
 bool Cflag = false, qflag = false;
 int flags = 0;
-int c, cnt, ret;
+int c, ret;
 char *buf;
 int64_t offset;
 /* Some compilers get confused and warn if this is not initialized.  */
-int total = 0;
 int nr_iov;
 int pattern = 0xcd;
 QEMUIOVector qiov;
@@ -1151,16 +1128,13 @@ static int coroutine_fn writev_f(BlockBackend *blk, int 
argc, char **argv)
 }
 
 clock_gettime(CLOCK_MONOTONIC, );
-ret = do_co_writev(blk, , offset, flags, );
+ret = blk_co_pwritev(blk, offset, qiov.size,  , flags);
 clock_gettime(CLOCK_MONOTONIC, );
 
 if (ret < 0) {
 printf("writev failed: %s\n", strerror(-ret));
 goto out;
 }
-cnt = ret;
-
-ret = 0;
 
 if (qflag) {
 goto out;
@@ -1168,7 +1142,7 @@ static int coroutine_fn writev_f(BlockBackend *blk, int 
argc, char **argv)
 
 /* Finally, report back -- -C gives a parsable format */
 t2 = tsub(t2, t1);
-print_report("wrote", , offset, qiov.size, total, cnt, Cflag);
+print_report("wrote", , offset, qiov.size, qiov.size, 1, Cflag);
 out:
 qemu_iovec_destroy();
 qemu_io_free(buf);
-- 
2.29.2

[PATCH 02/11] block-coroutine-wrapper: support BlockBackend first argument

[Vladimir Sementsov-Ogievskiy]

We'll need to wrap functions with first argument of BlockBackend *
type. For this let's generalize core function and struct to work with
pure AioContext.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
 block/block-gen.h  | 12 ++--
 scripts/block-coroutine-wrapper.py | 23 ++-
 2 files changed, 24 insertions(+), 11 deletions(-)

diff --git a/block/block-gen.h b/block/block-gen.h
index f80cf4897d..c1fd3f40de 100644
--- a/block/block-gen.h
+++ b/block/block-gen.h
@@ -29,19 +29,19 @@
 #include "block/block_int.h"
 
 /* Base structure for argument packing structures */
-typedef struct BdrvPollCo {
-BlockDriverState *bs;
+typedef struct AioPollCo {
+AioContext *ctx;
 bool in_progress;
 int ret;
 Coroutine *co; /* Keep pointer here for debugging */
-} BdrvPollCo;
+} AioPollCo;
 
-static inline int bdrv_poll_co(BdrvPollCo *s)
+static inline int aio_poll_co(AioPollCo *s)
 {
 assert(!qemu_in_coroutine());
 
-bdrv_coroutine_enter(s->bs, s->co);
-BDRV_POLL_WHILE(s->bs, s->in_progress);
+aio_co_enter(s->ctx, s->co);
+AIO_WAIT_WHILE(s->ctx, s->in_progress);
 
 return s->ret;
 }
diff --git a/scripts/block-coroutine-wrapper.py 
b/scripts/block-coroutine-wrapper.py
index 85dbeb9ecf..114a54fcce 100644
--- a/scripts/block-coroutine-wrapper.py
+++ b/scripts/block-coroutine-wrapper.py
@@ -42,6 +42,8 @@ def gen_header():
 #include "qemu/osdep.h"
 #include "block/coroutines.h"
 #include "block/block-gen.h"
+#include "qemu-io.h"
+#include "sysemu/block-backend.h"
 #include "block/block_int.h"\
 """
 
@@ -100,12 +102,23 @@ def snake_to_camel(func_name: str) -> str:
 def gen_wrapper(func: FuncDecl) -> str:
 assert not '_co_' in func.name
 assert func.return_type == 'int'
-assert func.args[0].type in ['BlockDriverState *', 'BdrvChild *']
+assert func.args[0].type in ['BlockDriverState *', 'BdrvChild *',
+ 'BlockBackend *']
 
 subsystem, subname = func.name.split('_', 1)
 
 name = f'{subsystem}_co_{subname}'
-bs = 'bs' if func.args[0].type == 'BlockDriverState *' else 'child->bs'
+
+first_arg_type = func.args[0].type
+if first_arg_type == 'BlockDriverState *':
+ctx = 'bdrv_get_aio_context(bs)'
+elif first_arg_type == 'BdrvChild *':
+ctx = '(child ? bdrv_get_aio_context(child->bs) : ' \
+'qemu_get_aio_context())'
+else:
+assert first_arg_type == 'BlockBackend *'
+ctx = '(blk ? blk_get_aio_context(blk) : qemu_get_aio_context())'
+
 struct_name = snake_to_camel(name)
 
 return f"""\
@@ -114,7 +127,7 @@ def gen_wrapper(func: FuncDecl) -> str:
  */
 
 typedef struct {struct_name} {{
-BdrvPollCo poll_state;
+AioPollCo poll_state;
 { func.gen_block('{decl};') }
 }} {struct_name};
 
@@ -134,7 +147,7 @@ def gen_wrapper(func: FuncDecl) -> str:
 return {name}({ func.gen_list('{name}') });
 }} else {{
 {struct_name} s = {{
-.poll_state.bs = {bs},
+.poll_state.ctx = {ctx},
 .poll_state.in_progress = true,
 
 { func.gen_block('.{name} = {name},') }
@@ -142,7 +155,7 @@ def gen_wrapper(func: FuncDecl) -> str:
 
 s.poll_state.co = qemu_coroutine_create({name}_entry, );
 
-return bdrv_poll_co(_state);
+return aio_poll_co(_state);
 }}
 }}"""
 
-- 
2.29.2

[PATCH 05/11] qemu-io-cmds: move qemu-io commands to coroutine

[Vladimir Sementsov-Ogievskiy]

Move qemuio_command to coroutine with all qemu io commands to simplify
the code and avoid extra explicit polling loops.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
 include/qemu-io.h |   9 +++-
 qemu-io-cmds.c| 110 ++
 block/meson.build |   3 +-
 3 files changed, 34 insertions(+), 88 deletions(-)

diff --git a/include/qemu-io.h b/include/qemu-io.h
index 3af513004a..71cca117b9 100644
--- a/include/qemu-io.h
+++ b/include/qemu-io.h
@@ -18,6 +18,7 @@
 #ifndef QEMU_IO_H
 #define QEMU_IO_H
 
+#include "block/block.h"
 
 #define CMD_FLAG_GLOBAL ((int)0x8000) /* don't iterate "args" */
 
@@ -45,7 +46,13 @@ typedef struct cmdinfo {
 
 extern bool qemuio_misalign;
 
-int qemuio_command(BlockBackend *blk, const char *cmd);
+int coroutine_fn qemuio_co_command(BlockBackend *blk, const char *cmd);
+
+/*
+ * Called with aio context of blk acquired. Or with qemu_get_aio_context()
+ * context acquired if no blk is NULL.
+ */
+int generated_co_wrapper qemuio_command(BlockBackend *blk, const char *cmd);
 
 void qemuio_add_command(const cmdinfo_t *ci);
 void qemuio_command_usage(const cmdinfo_t *ci);
diff --git a/qemu-io-cmds.c b/qemu-io-cmds.c
index 19149e014d..adc9e64c37 100644
--- a/qemu-io-cmds.c
+++ b/qemu-io-cmds.c
@@ -555,56 +555,16 @@ static int do_pwrite(BlockBackend *blk, char *buf, 
int64_t offset,
 return 1;
 }
 
-typedef struct {
-BlockBackend *blk;
-int64_t offset;
-int64_t bytes;
-int64_t *total;
-int flags;
-int ret;
-bool done;
-} CoWriteZeroes;
-
-static void coroutine_fn co_pwrite_zeroes_entry(void *opaque)
+static int coroutine_fn
+do_co_pwrite_zeroes(BlockBackend *blk, int64_t offset,
+int64_t bytes, int flags, int64_t *total)
 {
-CoWriteZeroes *data = opaque;
-
-data->ret = blk_co_pwrite_zeroes(data->blk, data->offset, data->bytes,
- data->flags);
-data->done = true;
-if (data->ret < 0) {
-*data->total = data->ret;
-return;
-}
-
-*data->total = data->bytes;
-}
-
-static int do_co_pwrite_zeroes(BlockBackend *blk, int64_t offset,
-   int64_t bytes, int flags, int64_t *total)
-{
-Coroutine *co;
-CoWriteZeroes data = {
-.blk= blk,
-.offset = offset,
-.bytes  = bytes,
-.total  = total,
-.flags  = flags,
-.done   = false,
-};
-
-if (bytes > INT_MAX) {
-return -ERANGE;
-}
-
-co = qemu_coroutine_create(co_pwrite_zeroes_entry, );
-bdrv_coroutine_enter(blk_bs(blk), co);
-while (!data.done) {
-aio_poll(blk_get_aio_context(blk), true);
-}
-if (data.ret < 0) {
-return data.ret;
+int ret = blk_co_pwrite_zeroes(blk, offset, bytes, flags);
+if (ret < 0) {
+*total = ret;
+return ret;
 } else {
+*total = bytes;
 return 1;
 }
 }
@@ -654,38 +614,22 @@ static int do_save_vmstate(BlockBackend *blk, char *buf, 
int64_t offset,
 return 1;
 }
 
-#define NOT_DONE 0x7fff
-static void aio_rw_done(void *opaque, int ret)
-{
-*(int *)opaque = ret;
-}
-
-static int do_aio_readv(BlockBackend *blk, QEMUIOVector *qiov,
-int64_t offset, int *total)
+static int coroutine_fn do_co_readv(BlockBackend *blk, QEMUIOVector *qiov,
+int64_t offset, int *total)
 {
-int async_ret = NOT_DONE;
-
-blk_aio_preadv(blk, offset, qiov, 0, aio_rw_done, _ret);
-while (async_ret == NOT_DONE) {
-main_loop_wait(false);
-}
+int ret = blk_co_preadv(blk, offset, qiov->size, qiov, 0);
 
 *total = qiov->size;
-return async_ret < 0 ? async_ret : 1;
+return ret < 0 ? ret : 1;
 }
 
-static int do_aio_writev(BlockBackend *blk, QEMUIOVector *qiov,
- int64_t offset, int flags, int *total)
+static int coroutine_fn do_co_writev(BlockBackend *blk, QEMUIOVector *qiov,
+ int64_t offset, int flags, int *total)
 {
-int async_ret = NOT_DONE;
-
-blk_aio_pwritev(blk, offset, qiov, flags, aio_rw_done, _ret);
-while (async_ret == NOT_DONE) {
-main_loop_wait(false);
-}
+int ret = blk_co_pwritev(blk, offset, qiov->size, qiov, flags);
 
 *total = qiov->size;
-return async_ret < 0 ? async_ret : 1;
+return ret < 0 ? ret : 1;
 }
 
 static void read_help(void)
@@ -910,7 +854,7 @@ static const cmdinfo_t readv_cmd = {
 .help   = readv_help,
 };
 
-static int readv_f(BlockBackend *blk, int argc, char **argv)
+static int coroutine_fn readv_f(BlockBackend *blk, int argc, char **argv)
 {
 struct timespec t1, t2;
 bool Cflag = false, qflag = false, vflag = false;
@@ -968,7 +912,7 @@ static int readv_f(BlockBackend *blk, int argc, char **argv)
 }
 
 clock_gettime(CLOCK_MONOTONIC, );
-ret = do_aio_readv(blk, , offset, );
+ret = do_co_readv(blk, , offset, );
 

[PATCH 11/11] block-backend: drop unused blk_save_vmstate() and blk_load_vmstate()

[Vladimir Sementsov-Ogievskiy]

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
 include/sysemu/block-backend.h |  3 ---
 block/block-backend.c  | 30 --
 2 files changed, 33 deletions(-)

diff --git a/include/sysemu/block-backend.h b/include/sysemu/block-backend.h
index 8676bbde5a..14cc410244 100644
--- a/include/sysemu/block-backend.h
+++ b/include/sysemu/block-backend.h
@@ -242,9 +242,6 @@ int blk_pwrite_compressed(BlockBackend *blk, int64_t 
offset, const void *buf,
 int blk_truncate(BlockBackend *blk, int64_t offset, bool exact,
  PreallocMode prealloc, BdrvRequestFlags flags, Error **errp);
 int blk_pdiscard(BlockBackend *blk, int64_t offset, int bytes);
-int blk_save_vmstate(BlockBackend *blk, const uint8_t *buf,
- int64_t pos, int size);
-int blk_load_vmstate(BlockBackend *blk, uint8_t *buf, int64_t pos, int size);
 int blk_co_save_vmstate(BlockBackend *blk, const uint8_t *buf,
 int64_t pos, int size);
 int blk_co_load_vmstate(BlockBackend *blk, uint8_t *buf, int64_t pos, int 
size);
diff --git a/block/block-backend.c b/block/block-backend.c
index d7f91ce7ad..83aafda791 100644
--- a/block/block-backend.c
+++ b/block/block-backend.c
@@ -2198,36 +2198,6 @@ int blk_truncate(BlockBackend *blk, int64_t offset, bool 
exact,
 return bdrv_truncate(blk->root, offset, exact, prealloc, flags, errp);
 }
 
-int blk_save_vmstate(BlockBackend *blk, const uint8_t *buf,
- int64_t pos, int size)
-{
-int ret;
-
-if (!blk_is_available(blk)) {
-return -ENOMEDIUM;
-}
-
-ret = bdrv_save_vmstate(blk_bs(blk), buf, pos, size);
-if (ret < 0) {
-return ret;
-}
-
-if (ret == size && !blk->enable_write_cache) {
-ret = bdrv_flush(blk_bs(blk));
-}
-
-return ret < 0 ? ret : size;
-}
-
-int blk_load_vmstate(BlockBackend *blk, uint8_t *buf, int64_t pos, int size)
-{
-if (!blk_is_available(blk)) {
-return -ENOMEDIUM;
-}
-
-return bdrv_load_vmstate(blk_bs(blk), buf, pos, size);
-}
-
 int blk_co_save_vmstate(BlockBackend *blk, const uint8_t *buf,
 int64_t pos, int size)
 {
-- 
2.29.2

[PATCH 09/11] qemu-io-cmds: refactor write_f(): drop extra helpers and variables

[Vladimir Sementsov-Ogievskiy]

We are in coroutine context. Let's call blk_co_ functions directly and
drop all these helpers.
Note that count is checked earlier in write_f, so we don't need the
check in helpers.
Also, both blk_co_save_vmstate() and blk_co_pwrite() return 0 on
success, so we should not care to set ret to 0 explicitly. Moreover, no
caller is interested in successful ret of qemuio_command being exactly
zero.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
 qemu-io-cmds.c | 81 +-
 1 file changed, 8 insertions(+), 73 deletions(-)

diff --git a/qemu-io-cmds.c b/qemu-io-cmds.c
index bbebecba55..2f0a27079d 100644
--- a/qemu-io-cmds.c
+++ b/qemu-io-cmds.c
@@ -527,65 +527,6 @@ fail:
 return buf;
 }
 
-static int do_pwrite(BlockBackend *blk, char *buf, int64_t offset,
- int64_t bytes, int flags, int64_t *total)
-{
-if (bytes > INT_MAX) {
-return -ERANGE;
-}
-
-*total = blk_pwrite(blk, offset, (uint8_t *)buf, bytes, flags);
-if (*total < 0) {
-return *total;
-}
-return 1;
-}
-
-static int coroutine_fn
-do_co_pwrite_zeroes(BlockBackend *blk, int64_t offset,
-int64_t bytes, int flags, int64_t *total)
-{
-int ret = blk_co_pwrite_zeroes(blk, offset, bytes, flags);
-if (ret < 0) {
-*total = ret;
-return ret;
-} else {
-*total = bytes;
-return 1;
-}
-}
-
-static int do_write_compressed(BlockBackend *blk, char *buf, int64_t offset,
-   int64_t bytes, int64_t *total)
-{
-int ret;
-
-if (bytes > BDRV_REQUEST_MAX_BYTES) {
-return -ERANGE;
-}
-
-ret = blk_pwrite_compressed(blk, offset, buf, bytes);
-if (ret < 0) {
-return ret;
-}
-*total = bytes;
-return 1;
-}
-
-static int do_save_vmstate(BlockBackend *blk, char *buf, int64_t offset,
-   int64_t count, int64_t *total)
-{
-if (count > INT_MAX) {
-return -ERANGE;
-}
-
-*total = blk_save_vmstate(blk, (uint8_t *)buf, offset, count);
-if (*total < 0) {
-return *total;
-}
-return 1;
-}
-
 static int coroutine_fn do_co_readv(BlockBackend *blk, QEMUIOVector *qiov,
 int64_t offset, int *total)
 {
@@ -945,7 +886,7 @@ static void write_help(void)
 "\n");
 }
 
-static int write_f(BlockBackend *blk, int argc, char **argv);
+static int coroutine_fn write_f(BlockBackend *blk, int argc, char **argv);
 
 static const cmdinfo_t write_cmd = {
 .name   = "write",
@@ -965,12 +906,11 @@ static int coroutine_fn write_f(BlockBackend *blk, int 
argc, char **argv)
 bool Cflag = false, qflag = false, bflag = false;
 bool Pflag = false, zflag = false, cflag = false, sflag = false;
 int flags = 0;
-int c, cnt, ret;
-char *buf = NULL;
+int c, ret;
+uint8_t *buf = NULL;
 int64_t offset;
 int64_t count;
 /* Some compilers get confused and warn if this is not initialized.  */
-int64_t total = 0;
 int pattern = 0xcd;
 const char *file_name = NULL;
 
@@ -981,6 +921,7 @@ static int coroutine_fn write_f(BlockBackend *blk, int 
argc, char **argv)
 break;
 case 'c':
 cflag = true;
+flags |= BDRV_REQ_WRITE_COMPRESSED;
 break;
 case 'C':
 Cflag = true;
@@ -1013,6 +954,7 @@ static int coroutine_fn write_f(BlockBackend *blk, int 
argc, char **argv)
 break;
 case 'z':
 zflag = true;
+flags |= BDRV_REQ_ZERO_WRITE;
 break;
 default:
 qemuio_command_usage(_cmd);
@@ -1095,13 +1037,9 @@ static int coroutine_fn write_f(BlockBackend *blk, int 
argc, char **argv)
 
 clock_gettime(CLOCK_MONOTONIC, );
 if (bflag) {
-ret = do_save_vmstate(blk, buf, offset, count, );
-} else if (zflag) {
-ret = do_co_pwrite_zeroes(blk, offset, count, flags, );
-} else if (cflag) {
-ret = do_write_compressed(blk, buf, offset, count, );
+ret = blk_co_save_vmstate(blk, buf, offset, count);
 } else {
-ret = do_pwrite(blk, buf, offset, count, flags, );
+ret = blk_co_pwrite(blk, offset, count, buf, flags);
 }
 clock_gettime(CLOCK_MONOTONIC, );
 
@@ -1109,9 +1047,6 @@ static int coroutine_fn write_f(BlockBackend *blk, int 
argc, char **argv)
 printf("write failed: %s\n", strerror(-ret));
 goto out;
 }
-cnt = ret;
-
-ret = 0;
 
 if (qflag) {
 goto out;
@@ -1119,7 +1054,7 @@ static int coroutine_fn write_f(BlockBackend *blk, int 
argc, char **argv)
 
 /* Finally, report back -- -C gives a parsable format */
 t2 = tsub(t2, t1);
-print_report("wrote", , offset, count, total, cnt, Cflag);
+print_report("wrote", , offset, count, count, 1, Cflag);
 
 out:
 if (!zflag) {
-- 
2.29.2

[PATCH 01/11] block-coroutine-wrapper: allow non bdrv_ prefix

[Vladimir Sementsov-Ogievskiy]

We are going to reuse the script to generate a qcow2_ function in
further commit. Prepare the script now.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
 scripts/block-coroutine-wrapper.py | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/scripts/block-coroutine-wrapper.py 
b/scripts/block-coroutine-wrapper.py
index 0461fd1c45..85dbeb9ecf 100644
--- a/scripts/block-coroutine-wrapper.py
+++ b/scripts/block-coroutine-wrapper.py
@@ -98,12 +98,13 @@ def snake_to_camel(func_name: str) -> str:
 
 
 def gen_wrapper(func: FuncDecl) -> str:
-assert func.name.startswith('bdrv_')
-assert not func.name.startswith('bdrv_co_')
+assert not '_co_' in func.name
 assert func.return_type == 'int'
 assert func.args[0].type in ['BlockDriverState *', 'BdrvChild *']
 
-name = 'bdrv_co_' + func.name[5:]
+subsystem, subname = func.name.split('_', 1)
+
+name = f'{subsystem}_co_{subname}'
 bs = 'bs' if func.args[0].type == 'BlockDriverState *' else 'child->bs'
 struct_name = snake_to_camel(name)
 
-- 
2.29.2

[PATCH 04/11] block: introduce bdrv_debug_wait_break

[Vladimir Sementsov-Ogievskiy]

Add a handler to wait for the break to happen in coroutine context. It
will be used in further commit.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
 include/block/block.h |  1 +
 include/block/block_int.h |  1 +
 block.c   | 11 +++
 block/blkdebug.c  | 16 
 4 files changed, 29 insertions(+)

diff --git a/include/block/block.h b/include/block/block.h
index b3f6e509d4..e133adf54f 100644
--- a/include/block/block.h
+++ b/include/block/block.h
@@ -648,6 +648,7 @@ int bdrv_debug_breakpoint(BlockDriverState *bs, const char 
*event,
 int bdrv_debug_remove_breakpoint(BlockDriverState *bs, const char *tag);
 int bdrv_debug_resume(BlockDriverState *bs, const char *tag);
 bool bdrv_debug_is_suspended(BlockDriverState *bs, const char *tag);
+void coroutine_fn bdrv_debug_wait_break(BlockDriverState *bs, const char *tag);
 
 /**
  * bdrv_get_aio_context:
diff --git a/include/block/block_int.h b/include/block/block_int.h
index 50af58af75..89e6904fc7 100644
--- a/include/block/block_int.h
+++ b/include/block/block_int.h
@@ -502,6 +502,7 @@ struct BlockDriver {
 const char *tag);
 int (*bdrv_debug_resume)(BlockDriverState *bs, const char *tag);
 bool (*bdrv_debug_is_suspended)(BlockDriverState *bs, const char *tag);
+void (*bdrv_debug_wait_break)(BlockDriverState *bs, const char *tag);
 
 void (*bdrv_refresh_limits)(BlockDriverState *bs, Error **errp);
 
diff --git a/block.c b/block.c
index 001453105e..3ea088b9fb 100644
--- a/block.c
+++ b/block.c
@@ -5702,6 +5702,17 @@ bool bdrv_debug_is_suspended(BlockDriverState *bs, const 
char *tag)
 return false;
 }
 
+void coroutine_fn bdrv_debug_wait_break(BlockDriverState *bs, const char *tag)
+{
+while (bs && bs->drv && !bs->drv->bdrv_debug_wait_break) {
+bs = bdrv_primary_bs(bs);
+}
+
+if (bs && bs->drv && bs->drv->bdrv_debug_wait_break) {
+bs->drv->bdrv_debug_wait_break(bs, tag);
+}
+}
+
 /* backing_file can either be relative, or absolute, or a protocol.  If it is
  * relative, it must be relative to the chain.  So, passing in bs->filename
  * from a BDS as backing_file should not be done, as that may be relative to
diff --git a/block/blkdebug.c b/block/blkdebug.c
index 2c0b9b0ee8..10b7c38467 100644
--- a/block/blkdebug.c
+++ b/block/blkdebug.c
@@ -57,6 +57,7 @@ typedef struct BDRVBlkdebugState {
 QLIST_HEAD(, BlkdebugRule) rules[BLKDBG__MAX];
 QSIMPLEQ_HEAD(, BlkdebugRule) active_rules;
 QLIST_HEAD(, BlkdebugSuspendedReq) suspended_reqs;
+CoQueue break_waiters;
 } BDRVBlkdebugState;
 
 typedef struct BlkdebugAIOCB {
@@ -467,6 +468,8 @@ static int blkdebug_open(BlockDriverState *bs, QDict 
*options, int flags,
 int ret;
 uint64_t align;
 
+qemu_co_queue_init(>break_waiters);
+
 opts = qemu_opts_create(_opts, NULL, 0, _abort);
 if (!qemu_opts_absorb_qdict(opts, options, errp)) {
 ret = -EINVAL;
@@ -785,6 +788,8 @@ static void suspend_request(BlockDriverState *bs, 
BlkdebugRule *rule)
 remove_rule(rule);
 QLIST_INSERT_HEAD(>suspended_reqs, , next);
 
+qemu_co_queue_restart_all(>break_waiters);
+
 if (!qtest_enabled()) {
 printf("blkdebug: Suspended request '%s'\n", r.tag);
 }
@@ -922,6 +927,16 @@ static bool blkdebug_debug_is_suspended(BlockDriverState 
*bs, const char *tag)
 return false;
 }
 
+static void coroutine_fn
+blkdebug_debug_wait_break(BlockDriverState *bs, const char *tag)
+{
+BDRVBlkdebugState *s = bs->opaque;
+
+while (!blkdebug_debug_is_suspended(bs, tag)) {
+qemu_co_queue_wait(>break_waiters, NULL);
+}
+}
+
 static int64_t blkdebug_getlength(BlockDriverState *bs)
 {
 return bdrv_getlength(bs->file->bs);
@@ -1048,6 +1063,7 @@ static BlockDriver bdrv_blkdebug = {
 = blkdebug_debug_remove_breakpoint,
 .bdrv_debug_resume  = blkdebug_debug_resume,
 .bdrv_debug_is_suspended= blkdebug_debug_is_suspended,
+.bdrv_debug_wait_break  = blkdebug_debug_wait_break,
 
 .strong_runtime_opts= blkdebug_strong_runtime_opts,
 };
-- 
2.29.2

[PATCH 07/11] block-backend: add _co_ versions of blk_save_vmstate / blk_load_vmstate

[Vladimir Sementsov-Ogievskiy]

To be used in further commit. Don't worry about some duplication with
existing blk_save_vmstate() and blk_load_vmstate(): they will be
removed soon.

Note the difference: new functions returns 0 on success.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
 include/sysemu/block-backend.h |  3 +++
 block/block-backend.c  | 37 ++
 2 files changed, 40 insertions(+)

diff --git a/include/sysemu/block-backend.h b/include/sysemu/block-backend.h
index 880e903293..8676bbde5a 100644
--- a/include/sysemu/block-backend.h
+++ b/include/sysemu/block-backend.h
@@ -245,6 +245,9 @@ int blk_pdiscard(BlockBackend *blk, int64_t offset, int 
bytes);
 int blk_save_vmstate(BlockBackend *blk, const uint8_t *buf,
  int64_t pos, int size);
 int blk_load_vmstate(BlockBackend *blk, uint8_t *buf, int64_t pos, int size);
+int blk_co_save_vmstate(BlockBackend *blk, const uint8_t *buf,
+int64_t pos, int size);
+int blk_co_load_vmstate(BlockBackend *blk, uint8_t *buf, int64_t pos, int 
size);
 int blk_probe_blocksizes(BlockBackend *blk, BlockSizes *bsz);
 int blk_probe_geometry(BlockBackend *blk, HDGeometry *geo);
 BlockAIOCB *blk_abort_aio_request(BlockBackend *blk,
diff --git a/block/block-backend.c b/block/block-backend.c
index 413af51f3b..d7f91ce7ad 100644
--- a/block/block-backend.c
+++ b/block/block-backend.c
@@ -14,6 +14,7 @@
 #include "sysemu/block-backend.h"
 #include "block/block_int.h"
 #include "block/blockjob.h"
+#include "block/coroutines.h"
 #include "block/throttle-groups.h"
 #include "hw/qdev-core.h"
 #include "sysemu/blockdev.h"
@@ -2227,6 +2228,42 @@ int blk_load_vmstate(BlockBackend *blk, uint8_t *buf, 
int64_t pos, int size)
 return bdrv_load_vmstate(blk_bs(blk), buf, pos, size);
 }
 
+int blk_co_save_vmstate(BlockBackend *blk, const uint8_t *buf,
+int64_t pos, int size)
+{
+int ret;
+QEMUIOVector qiov = QEMU_IOVEC_INIT_BUF(qiov, buf, size);
+
+if (!blk_is_available(blk)) {
+return -ENOMEDIUM;
+}
+
+ret = bdrv_co_writev_vmstate(blk_bs(blk), , pos);
+if (ret < 0) {
+return ret;
+}
+
+if (!blk->enable_write_cache) {
+ret = bdrv_flush(blk_bs(blk));
+}
+
+return ret < 0 ? ret : 0;
+}
+
+int blk_co_load_vmstate(BlockBackend *blk, uint8_t *buf, int64_t pos, int size)
+{
+int ret;
+QEMUIOVector qiov = QEMU_IOVEC_INIT_BUF(qiov, buf, size);
+
+if (!blk_is_available(blk)) {
+return -ENOMEDIUM;
+}
+
+ret = bdrv_co_readv_vmstate(blk_bs(blk), , pos);
+
+return ret < 0 ? ret : 0;
+}
+
 int blk_probe_blocksizes(BlockBackend *blk, BlockSizes *bsz)
 {
 if (!blk_is_available(blk)) {
-- 
2.29.2

[PATCH 03/11] block/block-gen.h: bind monitor

[Vladimir Sementsov-Ogievskiy]

If we have current monitor, let's bind it to wrapper coroutine too.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
 block/block-gen.h | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/block/block-gen.h b/block/block-gen.h
index c1fd3f40de..61f055a8cc 100644
--- a/block/block-gen.h
+++ b/block/block-gen.h
@@ -27,6 +27,7 @@
 #define BLOCK_BLOCK_GEN_H
 
 #include "block/block_int.h"
+#include "monitor/monitor.h"
 
 /* Base structure for argument packing structures */
 typedef struct AioPollCo {
@@ -38,11 +39,20 @@ typedef struct AioPollCo {
 
 static inline int aio_poll_co(AioPollCo *s)
 {
+Monitor *mon = monitor_cur();
 assert(!qemu_in_coroutine());
 
+if (mon) {
+monitor_set_cur(s->co, mon);
+}
+
 aio_co_enter(s->ctx, s->co);
 AIO_WAIT_WHILE(s->ctx, s->in_progress);
 
+if (mon) {
+monitor_set_cur(s->co, NULL);
+}
+
 return s->ret;
 }
 
-- 
2.29.2

[PATCH 00/11] qemu-io-cmds: move to coroutine

[Vladimir Sementsov-Ogievskiy]

Hi!

I've done this by accident. I decided that it is needed to make a nice
fix for a problem with aio context locking in hmp_qemu_io(). Still, the
problem is fixed without this series, so it's based on on the fix
instead of being preparation for it:

Based-on: <20210423134233.51495-1-vsement...@virtuozzo.com>
  "[PATCH v2] monitor: hmp_qemu_io: acquire aio contex, fix crash"

When I understood this, the series was more than half-done, so I decided
to finish it. I think it's a good refactoring. And moving block-layer
things to coroutine is good in general: we reduce number of polling
loops here and there.

Vladimir Sementsov-Ogievskiy (11):
  block-coroutine-wrapper: allow non bdrv_ prefix
  block-coroutine-wrapper: support BlockBackend first argument
  block/block-gen.h: bind monitor
  block: introduce bdrv_debug_wait_break
  qemu-io-cmds: move qemu-io commands to coroutine
  block: drop unused bdrv_debug_is_suspended()
  block-backend: add _co_ versions of blk_save_vmstate /
blk_load_vmstate
  qemu-io-cmds: refactor read_f(): drop extra helpers and variables
  qemu-io-cmds: refactor write_f(): drop extra helpers and variables
  qemu-io-cmds: drop do_co_readv() and do_co_writev() helpers
  block-backend: drop unused blk_save_vmstate() and blk_load_vmstate()

 block/block-gen.h  |  22 ++-
 include/block/block.h  |   2 +-
 include/block/block_int.h  |   2 +-
 include/qemu-io.h  |   9 +-
 include/sysemu/block-backend.h |   6 +-
 block.c|  10 +-
 block/blkdebug.c   |  17 ++-
 block/block-backend.c  |  21 ++-
 qemu-io-cmds.c | 237 -
 block/meson.build  |   3 +-
 scripts/block-coroutine-wrapper.py |  30 +++-
 11 files changed, 113 insertions(+), 246 deletions(-)

-- 
2.29.2

Re: [PULL 11/24] bsd-user: style tweak: if 0 -> ifdef notyet for code needed in future

[Warner Losh]

On Fri, Apr 23, 2021 at 3:23 PM Philippe Mathieu-Daudé 
wrote:

> On 4/23/21 10:39 PM, i...@bsdimp.com wrote:
> > From: Warner Losh 
> >
> > Signed-off-by: Warner Losh 
> > ---
> >  bsd-user/elfload.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/bsd-user/elfload.c b/bsd-user/elfload.c
> > index 87154283ef..07a00ddbd5 100644
> > --- a/bsd-user/elfload.c
> > +++ b/bsd-user/elfload.c
> > @@ -1270,7 +1270,7 @@ int load_elf_binary(struct linux_binprm *bprm,
> struct target_pt_regs *regs,
> >ibcs2_interpreter = 1;
> >  }
> >
> > -#if 0
> > +#ifdef notyet
>
> Better describe in the cover letter "ignored checkpatch errors" and keep
> this unmodified rather than trying to bypass them by dubious code style
> IMO. The checkpatch.pl script is here to help us ;)
>

This one I honestly was unsure about. To be honest, it's fear that kept
me keeping this code  Maybe it would be even better to just delete
this code entirely. I have a working final state to pull from, now that I
think about it to forumlate a reply, so maybe that would be even
better?

Warner


> >  printf("Using ELF interpreter %s\n", path(elf_interpreter));
> >  #endif
>

Re: constant_tsc support for SVM guest

[Eduardo Habkost]

On Fri, Apr 23, 2021 at 12:32:00AM -0500, Wei Huang wrote:
> There was a customer request for const_tsc support on AMD guests. Right now
> this feature is turned off by default for QEMU x86 CPU types (in
> CPUID_Fn8007_EDX[8]). However we are seeing a discrepancy in guest VM
> behavior between Intel and AMD.
> 
> In Linux kernel, Intel x86 code enables X86_FEATURE_CONSTANT_TSC based on
> vCPU's family & model. So it ignores CPUID_Fn8007_EDX[8] and guest VMs
> have const_tsc enabled. On AMD, however, the kernel checks
> CPUID_Fn8007_EDX[8]. So const_tsc is disabled on AMD by default.

Oh.  This seems to defeat the purpose of the invtsc migration
blocker we have.

Do we know when this behavior was introduced in Linux?

> 
> I am thinking turning on invtsc for EPYC CPU types (see example below). Most
> AMD server CPUs have supported invariant TSC for a long time. So this change
> is compatible with the hardware behavior. The only problem is live migration
> support, which will be blocked because of invtsc. However this problem
> should be considered very minor because most server CPUs support TscRateMsr
> (see CPUID_Fn800A_EDX[4]), allowing VMs to migrate among CPUs with
> different TSC rates. This live migration restriction can be lifted as long
> as the destination supports TscRateMsr or has the same frequency as the
> source (QEMU/libvirt do it).
> 
> [BTW I believe this migration limitation might be unnecessary because it is
> apparently OK for Intel guests to ignore invtsc while claiming const_tsc.
> Have anyone reported issues?]

CCing Marcelo, who originally added the migration blocker in QEMU.

> 
> Do I miss anything here? Any comments about the proposal?
> 
> Thanks,
> -Wei
> 
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index ad99cad0e7..3c48266884 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -4077,6 +4076,21 @@ static X86CPUDefinition builtin_x86_defs[] = {
>  { /* end of list */ }
>  }
>  },
> +{
> +.version = 4,
> +.alias = "EPYC-IBPB",
> +.props = (PropValue[]) {
> +{ "ibpb", "on" },
> +{ "perfctr-core", "on" },
> +{ "clzero", "on" },
> +{ "xsaveerptr", "on" },
> +{ "xsaves", "on" },

You don't need to copy the properties from the previous version.
The properties of version N are applied on top of the properties
of version (N-1).

> +{ "invtsc", "on" },
> +{ "model-id",
> +  "AMD EPYC Processor" },
> +{ /* end of list */ }
> +}
> +},
>  { /* end of list */ }
>  }
>  },
> @@ -4189,6 +4203,15 @@ static X86CPUDefinition builtin_x86_defs[] = {
>  { /* end of list */ }
>  }
>  },
> +{
> +.version = 3,
> +.props = (PropValue[]) {
> +{ "ibrs", "on" },
> +{ "amd-ssbd", "on" },
> +{ "invtsc", "on" },
> +{ /* end of list */ }
> +}
> +},
>  { /* end of list */ }
>  }
>  },
> @@ -4246,6 +4269,17 @@ static X86CPUDefinition builtin_x86_defs[] = {
>  .xlevel = 0x801E,
>  .model_id = "AMD EPYC-Milan Processor",
>  .cache_info = _milan_cache_info,
> +.versions = (X86CPUVersionDefinition[]) {
> +{ .version = 1 },
> +{
> +.version = 2,
> +.props = (PropValue[]) {
> +{ "invtsc", "on" },
> +{ /* end of list */ }
> +}
> +},
> +{ /* end of list */ }
> +}
> 

-- 
Eduardo

Re: [PULL 11/24] bsd-user: style tweak: if 0 -> ifdef notyet for code needed in future

[Philippe Mathieu-Daudé]

On 4/23/21 10:39 PM, i...@bsdimp.com wrote:
> From: Warner Losh 
> 
> Signed-off-by: Warner Losh 
> ---
>  bsd-user/elfload.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/bsd-user/elfload.c b/bsd-user/elfload.c
> index 87154283ef..07a00ddbd5 100644
> --- a/bsd-user/elfload.c
> +++ b/bsd-user/elfload.c
> @@ -1270,7 +1270,7 @@ int load_elf_binary(struct linux_binprm *bprm, struct 
> target_pt_regs *regs,
>ibcs2_interpreter = 1;
>  }
>  
> -#if 0
> +#ifdef notyet

Better describe in the cover letter "ignored checkpatch errors" and keep
this unmodified rather than trying to bypass them by dubious code style
IMO. The checkpatch.pl script is here to help us ;)

>  printf("Using ELF interpreter %s\n", path(elf_interpreter));
>  #endif

Re: [PULL 19/24] bsd-user: use qemu_strtol in preference to strtol

[Warner Losh]

On Fri, Apr 23, 2021 at 3:16 PM Philippe Mathieu-Daudé 
wrote:

> On 4/23/21 10:39 PM, i...@bsdimp.com wrote:
> > From: Warner Losh 
> >
> > Signed-off-by: Warner Losh 
> > ---
> >  bsd-user/main.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/bsd-user/main.c b/bsd-user/main.c
> > index 69e5525607..95fda8c5ae 100644
> > --- a/bsd-user/main.c
> > +++ b/bsd-user/main.c
> > @@ -821,7 +821,7 @@ int main(int argc, char **argv)
> >  }
> >  } else if (!strcmp(r, "s")) {
> >  r = argv[optind++];
> > -x86_stack_size = strtol(r, (char **), 0);
> > +x86_stack_size = qemu_strtol(r, (char **), 0);
> >  if (x86_stack_size <= 0) {
> >  usage();
> >  }
> > @@ -853,7 +853,7 @@ int main(int argc, char **argv)
> >  exit(1);
> >  }
> >  } else if (!strcmp(r, "B")) {
> > -guest_base = strtol(argv[optind++], NULL, 0);
> > +guest_base = qemu_strtol(argv[optind++], NULL, 0);
>
> Missing error check (-EINVAL & -ERANGE).
>

Thanks! Will update.


> >  have_guest_base = true;
> >  } else if (!strcmp(r, "drop-ld-preload")) {
> >  (void) envlist_unsetenv(envlist, "LD_PRELOAD");
> >
>
>

Re: [PATCH RESEND 1/2] target/i386: add "-cpu, lbr-fmt=*" support to enable guest LBR

[Eduardo Habkost]

Hi,

Sorry for missing the previous submission of this series, and
thanks for resubmitting.

On Fri, Apr 23, 2021 at 10:20:36AM +0800, Like Xu wrote:
> The last branch recording (LBR) is a performance monitor unit (PMU)
> feature on Intel processors that records a running trace of the most
> recent branches taken by the processor in the LBR stack. The QEMU
> could configure whether it's enabled or not for each guest via CLI.
> 
> The LBR feature would be enabled on the guest if:
> - the KVM is enabled and the PMU is enabled and,
> - the msr-based-feature IA32_PERF_CAPABILITIES is supporterd on KVM and,
> - the supported returned value for lbr_fmt from this msr is not zero and,
> - the requested guest vcpu model does support FEAT_1_ECX.CPUID_EXT_PDCM,
> - the configured lbr-fmt value is the same as the host lbr_fmt value
>   or use the QEMU option "-cpu host,migratable=no".
> 
> Cc: Eduardo Habkost 
> Cc: Paolo Bonzini 
> Signed-off-by: Like Xu 
> ---
>  target/i386/cpu.c | 16 
>  target/i386/cpu.h | 10 ++
>  target/i386/kvm/kvm.c |  5 +++--
>  3 files changed, 29 insertions(+), 2 deletions(-)
> 
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index ad99cad0e7..eee6da3ad8 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -6627,6 +6627,13 @@ static void x86_cpu_filter_features(X86CPU *cpu, bool 
> verbose)
>  x86_cpu_get_supported_feature_word(w, false);
>  uint64_t requested_features = env->features[w];
>  uint64_t unavailable_features = requested_features & ~host_feat;
> +if (kvm_enabled() && w == FEAT_PERF_CAPABILITIES &&

If this block of code should run only once, why is this inside
the loop in the first place?

I suggest following the same pattern used for intel-pt flags and
moving it outside the loop.

> +(requested_features & PERF_CAP_LBR_FMT)) {

What exactly is supposed to happen if the VCPU is configured with
LBR_FMT=0 and the host has LBR_FMT != 0 ?

If it shouldn't be an error, then the new kvm_exact_match_flags
field added in patch 2/2 becomes hard to reuse, and easy to
misuse (there's no code documentation indicating that a mismatch
is allowed if the requested bits are all zero).  In that case,
maybe patch 2/2 could be dropped by now.

If it should be an error, this patch and 2/2 don't seem correct.
If correcting that, I also suggest reversing the patch order in
the series, so this whole block of code doesn't even need to be
added in the first place.


> +if ((host_feat & PERF_CAP_LBR_FMT) !=
> +(requested_features & PERF_CAP_LBR_FMT)) {
> +unavailable_features |= PERF_CAP_LBR_FMT;
> +}
> +}
>  mark_unavailable_features(cpu, w, unavailable_features, prefix);
>  }
>  
> @@ -6734,6 +6741,14 @@ static void x86_cpu_realizefn(DeviceState *dev, Error 
> **errp)
>  }
>  }
>  
> +if (cpu->lbr_fmt) {
> +if (!cpu->enable_pmu) {
> +error_setg(errp, "LBR is unsupported since guest PMU is 
> disabled.");
> +return;
> +}
> +env->features[FEAT_PERF_CAPABILITIES] |= cpu->lbr_fmt;
> +}
> +
>  /* mwait extended info: needed for Core compatibility */
>  /* We always wake on interrupt even if host does not have the capability 
> */
>  cpu->mwait.ecx |= CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;
> @@ -7300,6 +7315,7 @@ static Property x86_cpu_properties[] = {
>  #endif
>  DEFINE_PROP_INT32("node-id", X86CPU, node_id, CPU_UNSET_NUMA_NODE_ID),
>  DEFINE_PROP_BOOL("pmu", X86CPU, enable_pmu, false),
> +DEFINE_PROP_UINT8("lbr-fmt", X86CPU, lbr_fmt, 0),
>  
>  DEFINE_PROP_UINT32("hv-spinlocks", X86CPU, hyperv_spinlock_attempts,
> HYPERV_SPINLOCK_NEVER_NOTIFY),
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 570f916878..b12c879fc4 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -354,6 +354,7 @@ typedef enum X86Seg {
>  #define ARCH_CAP_TSX_CTRL_MSR(1<<7)
>  
>  #define MSR_IA32_PERF_CAPABILITIES  0x345
> +#define PERF_CAP_LBR_FMT  0x3f
>  
>  #define MSR_IA32_TSX_CTRL0x122
>  #define MSR_IA32_TSCDEADLINE0x6e0
> @@ -1726,6 +1727,15 @@ struct X86CPU {
>   */
>  bool enable_pmu;
>  
> +/*
> + * Configure LBR_FMT bits on IA32_PERF_CAPABILITIES MSR.
> + * This can't be enabled by default yet because it doesn't have
> + * ABI stability guarantees, as it is only allowed to pass all
> + * LBR_FMT bits returned by kvm_arch_get_supported_msr_feature()
> + * (that depends on host CPU and kernel capabilities) to the guest.
> + */
> +uint8_t lbr_fmt;
> +
>  /* LMCE support can be enabled/disabled via cpu option 'lmce=on/off'. It 
> is
>   * disabled by default to avoid breaking migration between QEMU with
>   * different LMCE configurations.
> diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
> index 

Re: [PULL 19/24] bsd-user: use qemu_strtol in preference to strtol

[Philippe Mathieu-Daudé]

On 4/23/21 10:39 PM, i...@bsdimp.com wrote:
> From: Warner Losh 
> 
> Signed-off-by: Warner Losh 
> ---
>  bsd-user/main.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/bsd-user/main.c b/bsd-user/main.c
> index 69e5525607..95fda8c5ae 100644
> --- a/bsd-user/main.c
> +++ b/bsd-user/main.c
> @@ -821,7 +821,7 @@ int main(int argc, char **argv)
>  }
>  } else if (!strcmp(r, "s")) {
>  r = argv[optind++];
> -x86_stack_size = strtol(r, (char **), 0);
> +x86_stack_size = qemu_strtol(r, (char **), 0);
>  if (x86_stack_size <= 0) {
>  usage();
>  }
> @@ -853,7 +853,7 @@ int main(int argc, char **argv)
>  exit(1);
>  }
>  } else if (!strcmp(r, "B")) {
> -guest_base = strtol(argv[optind++], NULL, 0);
> +guest_base = qemu_strtol(argv[optind++], NULL, 0);

Missing error check (-EINVAL & -ERANGE).

>  have_guest_base = true;
>  } else if (!strcmp(r, "drop-ld-preload")) {
>  (void) envlist_unsetenv(envlist, "LD_PRELOAD");
> 

Ping: [PATCH] Set icon for QEMU binary on Mac OS

[Programmingkid]

This patch was submitted in February and I haven't heard anything about it 
since. Could this be included in the up coming release please?


https://lore.kernel.org/qemu-devel/20210202134410.9274-1-programmingk...@gmail.com/

Before switching the build system over to Meson, an icon was
added to the QEMU binary on Mac OS. This patch adds back that
feature.

Signed-off-by: John Arbuckle 
---
 
meson.build
 | 20 
 1 file changed, 20 insertions(+)


diff
 --git a/meson.build b/meson.build
index f00b7754fd..7f534f4e75 100644
--- a/meson.build
+++ b/meson.build

@@ -2183,6 +2183,26 @@ foreach target : target_dirs

link_args: link_args,
gui_app: exe['gui'])
 

+# set QEMU's icon on Mac OS
+if targetos == 'darwin'
+newiconpart1 = custom_target('Icon for ' + exe_name + ' - part 1',
+  depends : emulator,
+  input : emulator,
+  output : 'new icon for ' + exe_name + ' - 1',
+  command : ['Rez', '-append',
+   meson.source_root() + '/pc-bios/qemu.rsrc', '-o',
+   meson.current_build_dir() / exe['name']],
+  build_by_default : true)
+
+custom_target('Icon for ' + exe_name + ' - part 2',
+  depends : newiconpart1,
+  input : emulator,
+  output : 'new icon for ' + exe_name + ' - 2',
+  command : ['SetFile', '-a', 'C',
+   meson.current_build_dir() / exe['name']],
+  build_by_default : true)
+endif
+

 if exe_sign
   emulators += {exe['name'] : custom_target(exe['name'],
install: true,
-- 
2.24.3 (Apple Git-128)

[PATCH v3 2/2] tests/tcg/ppc64le: tests for brh/brw/brd

[matheus . ferst]

From: Matheus Ferst 

Tests for Byte-Reverse Halfword, Word and Doubleword

Signed-off-by: Matheus Ferst 
Tested-by: Fabiano Rosas 
---
 tests/tcg/ppc64/Makefile.target   |  7 +++
 tests/tcg/ppc64le/Makefile.target |  7 +++
 tests/tcg/ppc64le/byte_reverse.c  | 21 +
 3 files changed, 35 insertions(+)
 create mode 100644 tests/tcg/ppc64le/byte_reverse.c

diff --git a/tests/tcg/ppc64/Makefile.target b/tests/tcg/ppc64/Makefile.target
index 0c6a4585fc..55c690c8ad 100644
--- a/tests/tcg/ppc64/Makefile.target
+++ b/tests/tcg/ppc64/Makefile.target
@@ -10,4 +10,11 @@ PPC64_TESTS=bcdsub
 endif
 bcdsub: CFLAGS += -mpower8-vector
 
+ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER10),)
+POWER10_TESTS=byte_reverse
+RUN_POWER10_TESTS=$(patsubst %, run-%, $(POWER10_TESTS))
+$(RUN_POWER10_TESTS): QEMU_OPTS+=-cpu POWER10
+PPC64_TESTS += $(POWER10_TESTS)
+endif
+
 TESTS += $(PPC64_TESTS)
diff --git a/tests/tcg/ppc64le/Makefile.target 
b/tests/tcg/ppc64le/Makefile.target
index 1acfcff94a..517d290b1a 100644
--- a/tests/tcg/ppc64le/Makefile.target
+++ b/tests/tcg/ppc64le/Makefile.target
@@ -9,4 +9,11 @@ PPC64LE_TESTS=bcdsub
 endif
 bcdsub: CFLAGS += -mpower8-vector
 
+ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER10),)
+POWER10_TESTS=byte_reverse
+RUN_POWER10_TESTS=$(patsubst %, run-%, $(POWER10_TESTS))
+$(RUN_POWER10_TESTS): QEMU_OPTS+=-cpu POWER10
+PPC64LE_TESTS += $(POWER10_TESTS)
+endif
+
 TESTS += $(PPC64LE_TESTS)
diff --git a/tests/tcg/ppc64le/byte_reverse.c b/tests/tcg/ppc64le/byte_reverse.c
new file mode 100644
index 00..53b76fc2e2
--- /dev/null
+++ b/tests/tcg/ppc64le/byte_reverse.c
@@ -0,0 +1,21 @@
+#include 
+
+int main(void)
+{
+unsigned long var;
+
+var = 0xFEDCBA9876543210;
+asm("brh %0, %0" : "+r"(var));
+assert(var == 0xDCFE98BA54761032);
+
+var = 0xFEDCBA9876543210;
+asm("brw %0, %0" : "+r"(var));
+assert(var == 0x98BADCFE10325476);
+
+var = 0xFEDCBA9876543210;
+asm("brd %0, %0" : "+r"(var));
+assert(var == 0x1032547698BADCFE);
+
+return 0;
+}
+
-- 
2.25.1

[PULL 23/24] bsd-user: move x86 (i386 and x86_64) cpu_loop to target_arch_cpu.h

[imp]

From: Warner Losh 

Move the x86 version of the cpu_loop to target_arch_cpu.h as
target_cpu_loop. Create a cpu_loop that calls the target_cpu_loop function, but
only for x86 for now. This is code-movement only commit.

Signed-off-by: Stacey Son 
Signed-off-by: Warner Losh 
---
 bsd-user/i386/target_arch_cpu.h | 283 +++
 bsd-user/main.c | 284 +---
 2 files changed, 286 insertions(+), 281 deletions(-)

diff --git a/bsd-user/i386/target_arch_cpu.h b/bsd-user/i386/target_arch_cpu.h
index c05e048b9b..c71b2ac3ec 100644
--- a/bsd-user/i386/target_arch_cpu.h
+++ b/bsd-user/i386/target_arch_cpu.h
@@ -19,4 +19,287 @@
 #ifndef _TARGET_ARCH_CPU_H_
 #define _TARGET_ARCH_CPU_H_
 
+/***/
+/* CPUX86 core interface */
+
+uint64_t cpu_get_tsc(CPUX86State *env)
+{
+return cpu_get_host_ticks();
+}
+
+static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
+ int flags)
+{
+unsigned int e1, e2;
+uint32_t *p;
+e1 = (addr << 16) | (limit & 0x);
+e2 = ((addr >> 16) & 0xff) | (addr & 0xff00) | (limit & 0x000f);
+e2 |= flags;
+p = ptr;
+p[0] = tswap32(e1);
+p[1] = tswap32(e2);
+}
+
+static uint64_t *idt_table;
+#ifdef TARGET_X86_64
+static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
+   uint64_t addr, unsigned int sel)
+{
+uint32_t *p, e1, e2;
+e1 = (addr & 0x) | (sel << 16);
+e2 = (addr & 0x) | 0x8000 | (dpl << 13) | (type << 8);
+p = ptr;
+p[0] = tswap32(e1);
+p[1] = tswap32(e2);
+p[2] = tswap32(addr >> 32);
+p[3] = 0;
+}
+/* only dpl matters as we do only user space emulation */
+static void set_idt(int n, unsigned int dpl)
+{
+set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
+}
+#else
+static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
+ uint32_t addr, unsigned int sel)
+{
+uint32_t *p, e1, e2;
+e1 = (addr & 0x) | (sel << 16);
+e2 = (addr & 0x) | 0x8000 | (dpl << 13) | (type << 8);
+p = ptr;
+p[0] = tswap32(e1);
+p[1] = tswap32(e2);
+}
+
+/* only dpl matters as we do only user space emulation */
+static void set_idt(int n, unsigned int dpl)
+{
+set_gate(idt_table + n, 0, dpl, 0, 0);
+}
+#endif
+
+void target_cpu_loop(CPUX86State *env)
+{
+CPUState *cs = env_cpu(env);
+int trapnr;
+abi_ulong pc;
+/* target_siginfo_t info; */
+
+for (;;) {
+cpu_exec_start(cs);
+trapnr = cpu_exec(cs);
+cpu_exec_end(cs);
+process_queued_cpu_work(cs);
+
+switch (trapnr) {
+case 0x80:
+/* syscall from int $0x80 */
+if (bsd_type == target_freebsd) {
+abi_ulong params = (abi_ulong) env->regs[R_ESP] +
+sizeof(int32_t);
+int32_t syscall_nr = env->regs[R_EAX];
+int32_t arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8;
+
+if (syscall_nr == TARGET_FREEBSD_NR_syscall) {
+get_user_s32(syscall_nr, params);
+params += sizeof(int32_t);
+} else if (syscall_nr == TARGET_FREEBSD_NR___syscall) {
+get_user_s32(syscall_nr, params);
+params += sizeof(int64_t);
+}
+get_user_s32(arg1, params);
+params += sizeof(int32_t);
+get_user_s32(arg2, params);
+params += sizeof(int32_t);
+get_user_s32(arg3, params);
+params += sizeof(int32_t);
+get_user_s32(arg4, params);
+params += sizeof(int32_t);
+get_user_s32(arg5, params);
+params += sizeof(int32_t);
+get_user_s32(arg6, params);
+params += sizeof(int32_t);
+get_user_s32(arg7, params);
+params += sizeof(int32_t);
+get_user_s32(arg8, params);
+env->regs[R_EAX] = do_freebsd_syscall(env,
+  syscall_nr,
+  arg1,
+  arg2,
+  arg3,
+  arg4,
+  arg5,
+  arg6,
+  arg7,
+  arg8);
+} else { /* if (bsd_type == target_openbsd) */
+env->regs[R_EAX] = do_openbsd_syscall(env,
+  env->regs[R_EAX],
+  env->regs[R_EBX],
+  

[PULL 21/24] bsd-user: add arm target_signal.h

[imp]

From: Warner Losh 

Add a arm target_signal.h to complete the files currently in the tree. The arm
directory isn't compiled, so it was missing target_signal.h. Update it to the
same level as x86 and sparc. This was abstracted from the target_arch_vmparam.h
file in the bsd-user branch.

Signed-off-by: Stacey Son 
Signed-off-by: Warner Losh 
---
 bsd-user/arm/target_signal.h | 31 +++
 1 file changed, 31 insertions(+)
 create mode 100644 bsd-user/arm/target_signal.h

diff --git a/bsd-user/arm/target_signal.h b/bsd-user/arm/target_signal.h
new file mode 100644
index 00..02be90a2d1
--- /dev/null
+++ b/bsd-user/arm/target_signal.h
@@ -0,0 +1,31 @@
+/*
+ * ARM target specific signal handling code
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see .
+ */
+#ifndef TARGET_SIGNAL_H
+#define TARGET_SIGNAL_H
+
+#include "cpu.h"
+
+/* this struct defines a stack used during syscall handling */
+
+static inline abi_ulong get_sp_from_cpustate(CPUARMState *state)
+{
+return state->regs[R_ESP];
+}
+
+#endif /* TARGET_SIGNAL_H */
-- 
2.22.1

[PATCH v3 1/2] tests/docker: gcc-10 based images for ppc64{, le} tests

[matheus . ferst]

From: Matheus Ferst 

A newer compiler is needed to build tests for Power10 instructions. As
done for arm64 on c729a99d2701, a new '-test-cross' image is created for
ppc64 and ppc64le. As done on 936fda4d771f, a test for compiler support
is added to verify that the toolchain in use has '-mpower10'. Finally,
Unused images (docker-power-cross and docker-ppc64-cross) are removed.

Signed-off-by: Matheus Ferst 
---
 .gitlab-ci.d/containers.yml   | 13 +++-
 tests/docker/Makefile.include |  5 ++---
 .../dockerfiles/debian-powerpc-cross.docker   | 12 ---
 .../debian-powerpc-test-cross.docker  | 17 
 .../dockerfiles/debian-ppc64-cross.docker | 11 --
 tests/tcg/configure.sh| 20 +--
 6 files changed, 32 insertions(+), 46 deletions(-)
 delete mode 100644 tests/docker/dockerfiles/debian-powerpc-cross.docker
 create mode 100644 tests/docker/dockerfiles/debian-powerpc-test-cross.docker
 delete mode 100644 tests/docker/dockerfiles/debian-ppc64-cross.docker

diff --git a/.gitlab-ci.d/containers.yml b/.gitlab-ci.d/containers.yml
index 33e4046e23..325191627d 100644
--- a/.gitlab-ci.d/containers.yml
+++ b/.gitlab-ci.d/containers.yml
@@ -144,19 +144,12 @@ mipsel-debian-cross-container:
   variables:
 NAME: debian-mipsel-cross
 
-powerpc-debian-cross-container:
+powerpc-test-debian-cross-container:
   <<: *container_job_definition
   stage: containers-layer2
-  needs: ['amd64-debian10-container']
-  variables:
-NAME: debian-powerpc-cross
-
-ppc64-debian-cross-container:
-  <<: *container_job_definition
-  stage: containers-layer2
-  needs: ['amd64-debian10-container']
+  needs: ['amd64-debian11-container']
   variables:
-NAME: debian-ppc64-cross
+NAME: debian-powerpc-test-cross
 
 ppc64el-debian-cross-container:
   <<: *container_job_definition
diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
index 9f464cb92c..3b692d67d7 100644
--- a/tests/docker/Makefile.include
+++ b/tests/docker/Makefile.include
@@ -140,8 +140,6 @@ docker-image-debian-mips-cross: docker-image-debian10
 docker-image-debian-mips64-cross: docker-image-debian10
 docker-image-debian-mips64el-cross: docker-image-debian10
 docker-image-debian-mipsel-cross: docker-image-debian10
-docker-image-debian-powerpc-cross: docker-image-debian10
-docker-image-debian-ppc64-cross: docker-image-debian10
 docker-image-debian-ppc64el-cross: docker-image-debian10
 docker-image-debian-riscv64-cross: docker-image-debian10
 docker-image-debian-s390x-cross: docker-image-debian10
@@ -152,13 +150,14 @@ docker-image-debian-sparc64-cross: docker-image-debian10
 docker-image-debian-tricore-cross: docker-image-debian10
 docker-image-debian-all-test-cross: docker-image-debian10
 docker-image-debian-arm64-test-cross: docker-image-debian11
+docker-image-debian-powerpc-test-cross: docker-image-debian11
 
 # These images may be good enough for building tests but not for test builds
 DOCKER_PARTIAL_IMAGES += debian-alpha-cross
 DOCKER_PARTIAL_IMAGES += debian-arm64-test-cross
+DOCKER_PARTIAL_IMAGES += debian-powerpc-test-cross
 DOCKER_PARTIAL_IMAGES += debian-hppa-cross
 DOCKER_PARTIAL_IMAGES += debian-m68k-cross debian-mips64-cross
-DOCKER_PARTIAL_IMAGES += debian-powerpc-cross debian-ppc64-cross
 DOCKER_PARTIAL_IMAGES += debian-riscv64-cross
 DOCKER_PARTIAL_IMAGES += debian-sh4-cross debian-sparc64-cross
 DOCKER_PARTIAL_IMAGES += debian-tricore-cross
diff --git a/tests/docker/dockerfiles/debian-powerpc-cross.docker 
b/tests/docker/dockerfiles/debian-powerpc-cross.docker
deleted file mode 100644
index 07e1789650..00
--- a/tests/docker/dockerfiles/debian-powerpc-cross.docker
+++ /dev/null
@@ -1,12 +0,0 @@
-#
-# Docker powerpc cross-compiler target
-#
-# This docker target builds on the debian Buster base image.
-#
-FROM qemu/debian10
-
-RUN apt update && \
-DEBIAN_FRONTEND=noninteractive eatmydata \
-apt install -y --no-install-recommends \
-gcc-powerpc-linux-gnu \
-libc6-dev-powerpc-cross
diff --git a/tests/docker/dockerfiles/debian-powerpc-test-cross.docker 
b/tests/docker/dockerfiles/debian-powerpc-test-cross.docker
new file mode 100644
index 00..36b336f709
--- /dev/null
+++ b/tests/docker/dockerfiles/debian-powerpc-test-cross.docker
@@ -0,0 +1,17 @@
+#
+# Docker powerpc/ppc64/ppc64le cross-compiler target
+#
+# This docker target builds on the debian Bullseye base image.
+#
+FROM qemu/debian11
+
+RUN apt update && \
+DEBIAN_FRONTEND=noninteractive eatmydata \
+apt install -y --no-install-recommends \
+gcc-powerpc-linux-gnu \
+libc6-dev-powerpc-cross \
+gcc-10-powerpc64-linux-gnu \
+libc6-dev-ppc64-cross \
+gcc-10-powerpc64le-linux-gnu \
+libc6-dev-ppc64el-cross
+
diff --git a/tests/docker/dockerfiles/debian-ppc64-cross.docker 
b/tests/docker/dockerfiles/debian-ppc64-cross.docker
deleted file mode 100644
index 8efe68874e..00

[PATCH v3 0/2] tests/docker: tests/tcg/ppc64le: Newer toolchain to build tests for PowerISA v3.1 instructions

[matheus . ferst]

From: Matheus Ferst 

This series adds gcc-10 based images to enable the build of tests with Power10
instructions. Then, to put it to good use, a tests for the byte-reverse
instructions (implemented in 9d69cfa2faa7) is introduced.

v3:
- Fixed field 'needs' of powerpc-test-debian-cross-container in
  .gitlab-ci.d/containers.yml

v2:
- Unused images removed from tests/docker/Makefile.include,
  tests/docker/dockerfiles, and .gitlab-ci.d/containers.yml
- Nested ppc64-* and ppc64le-* cases in tests/tcg/configure.sh
- Fixed inline assembly usage and unused header removed from
  tests/tcg/ppc64le/byte_reverse.c

Matheus Ferst (2):
  tests/docker: gcc-10 based images for ppc64{,le} tests
  tests/tcg/ppc64le: tests for brh/brw/brd

 .gitlab-ci.d/containers.yml   | 13 +++-
 tests/docker/Makefile.include |  5 ++---
 .../dockerfiles/debian-powerpc-cross.docker   | 12 ---
 .../debian-powerpc-test-cross.docker  | 17 +++
 .../dockerfiles/debian-ppc64-cross.docker | 11 --
 tests/tcg/configure.sh| 20 +-
 tests/tcg/ppc64/Makefile.target   |  7 +++
 tests/tcg/ppc64le/Makefile.target |  7 +++
 tests/tcg/ppc64le/byte_reverse.c  | 21 +++
 9 files changed, 67 insertions(+), 46 deletions(-)
 delete mode 100644 tests/docker/dockerfiles/debian-powerpc-cross.docker
 create mode 100644 tests/docker/dockerfiles/debian-powerpc-test-cross.docker
 delete mode 100644 tests/docker/dockerfiles/debian-ppc64-cross.docker
 create mode 100644 tests/tcg/ppc64le/byte_reverse.c

-- 
2.25.1

[PULL 20/24] bsd-user: introduce host_os.h for bsd-specific code and defaults

[imp]

From: Warner Losh 

Introduce host_os.h for frebsd, netbsd and openbsd. This sets the default bsd
being implemented today. In the future it will have code that is per-BSD
specific. Abstracted from a larger c93465b6208c4c95cc0a394ffef4180ba6ccf27a in
the qemu-bsd-user repo.

Signed-off-by: Stacey Son 
Signed-off-by: Warner Losh 
---
 bsd-user/freebsd/host_os.h | 25 +
 bsd-user/main.c|  4 +++-
 bsd-user/netbsd/host_os.h  | 25 +
 bsd-user/openbsd/host_os.h | 25 +
 4 files changed, 78 insertions(+), 1 deletion(-)
 create mode 100644 bsd-user/freebsd/host_os.h
 create mode 100644 bsd-user/netbsd/host_os.h
 create mode 100644 bsd-user/openbsd/host_os.h

diff --git a/bsd-user/freebsd/host_os.h b/bsd-user/freebsd/host_os.h
new file mode 100644
index 00..ceb1543d06
--- /dev/null
+++ b/bsd-user/freebsd/host_os.h
@@ -0,0 +1,25 @@
+/*
+ *  FreeBSD host dependent code and definitions
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see .
+ */
+
+#ifndef __HOST_OS_H_
+#define __HOST_OS_H_
+
+#define HOST_DEFAULT_BSD_TYPE target_freebsd
+
+#endif /*!__HOST_OS_H_ */
diff --git a/bsd-user/main.c b/bsd-user/main.c
index 95fda8c5ae..fbcc8cc28c 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -40,6 +40,8 @@
 #include "exec/log.h"
 #include "trace/control.h"
 
+#include "host_os.h"
+
 int singlestep;
 unsigned long mmap_min_addr;
 uintptr_t guest_base;
@@ -761,7 +763,7 @@ int main(int argc, char **argv)
 const char *gdbstub = NULL;
 char **target_environ, **wrk;
 envlist_t *envlist = NULL;
-bsd_type = target_openbsd;
+bsd_type = HOST_DEFAULT_BSD_TYPE;
 
 if (argc <= 1) {
 usage();
diff --git a/bsd-user/netbsd/host_os.h b/bsd-user/netbsd/host_os.h
new file mode 100644
index 00..ccbea076e6
--- /dev/null
+++ b/bsd-user/netbsd/host_os.h
@@ -0,0 +1,25 @@
+/*
+ *  NetBSD host dependent code and definitions
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see .
+ */
+
+#ifndef __HOST_OS_H_
+#define __HOST_OS_H_
+
+#define HOST_DEFAULT_BSD_TYPE target_netbsd
+
+#endif /*!__HOST_OS_H_ */
diff --git a/bsd-user/openbsd/host_os.h b/bsd-user/openbsd/host_os.h
new file mode 100644
index 00..79468073e4
--- /dev/null
+++ b/bsd-user/openbsd/host_os.h
@@ -0,0 +1,25 @@
+/*
+ *  OpenBSD host dependent code and definitions
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see .
+ */
+
+#ifndef __HOST_OS_H_
+#define __HOST_OS_H_
+
+#define HOST_DEFAULT_BSD_TYPE target_openbsd
+
+#endif /*!__HOST_OS_H_ */
-- 
2.22.1

[PULL 22/24] bsd-user: create target_arch_cpu.h

[imp]

From: Warner Losh 

Create target_arch_cpu.h to house the target_cpu_loop and target_cpu_init
functions. These are the empty files that will be populated by moving the
appropriate cpu-specific functions out of main.c. This work pre-dates the
linux-user work that moved these to cpu-loop.c, so was done differently. As
there's a number of things linux-user did differently than bsd-user in their
time of divergence, and as the recertification of the code to redo it the same
way will take a fair amount of effort, a separate effort to address the
divergence once everything is in the tree and we can create a common qemu-user
directory for the munane common elements between the two.

Signed-off-by: Stacey Son 
Signed-off-by: Warner Losh 
---
 bsd-user/arm/target_arch_cpu.h | 22 ++
 bsd-user/i386/target_arch_cpu.h| 22 ++
 bsd-user/main.c|  1 +
 bsd-user/sparc/target_arch_cpu.h   | 22 ++
 bsd-user/sparc64/target_arch_cpu.h | 19 +++
 bsd-user/x86_64/target_arch_cpu.h  | 19 +++
 6 files changed, 105 insertions(+)
 create mode 100644 bsd-user/arm/target_arch_cpu.h
 create mode 100644 bsd-user/i386/target_arch_cpu.h
 create mode 100644 bsd-user/sparc/target_arch_cpu.h
 create mode 100644 bsd-user/sparc64/target_arch_cpu.h
 create mode 100644 bsd-user/x86_64/target_arch_cpu.h

diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h
new file mode 100644
index 00..71c89174f2
--- /dev/null
+++ b/bsd-user/arm/target_arch_cpu.h
@@ -0,0 +1,22 @@
+/*
+ *  arm cpu init and loop
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see .
+ */
+#ifndef _TARGET_ARCH_CPU_H_
+#define _TARGET_ARCH_CPU_H_
+
+#endif /* ! _TARGET_ARCH_CPU_H_ */
diff --git a/bsd-user/i386/target_arch_cpu.h b/bsd-user/i386/target_arch_cpu.h
new file mode 100644
index 00..c05e048b9b
--- /dev/null
+++ b/bsd-user/i386/target_arch_cpu.h
@@ -0,0 +1,22 @@
+/*
+ *  i386 cpu init and loop
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see .
+ */
+#ifndef _TARGET_ARCH_CPU_H_
+#define _TARGET_ARCH_CPU_H_
+
+#endif /* ! _TARGET_ARCH_CPU_H_ */
diff --git a/bsd-user/main.c b/bsd-user/main.c
index fbcc8cc28c..d12b77fbfe 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -41,6 +41,7 @@
 #include "trace/control.h"
 
 #include "host_os.h"
+#include "target_arch_cpu.h"
 
 int singlestep;
 unsigned long mmap_min_addr;
diff --git a/bsd-user/sparc/target_arch_cpu.h b/bsd-user/sparc/target_arch_cpu.h
new file mode 100644
index 00..dcf7694cba
--- /dev/null
+++ b/bsd-user/sparc/target_arch_cpu.h
@@ -0,0 +1,22 @@
+/*
+ *  sparc cpu init and loop
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see .
+ */
+#ifndef _TARGET_ARCH_CPU_H_
+#define _TARGET_ARCH_CPU_H_
+
+#endif /* ! _TARGET_ARCH_CPU_H_ */
diff --git a/bsd-user/sparc64/target_arch_cpu.h 
b/bsd-user/sparc64/target_arch_cpu.h
new file mode 100644
index 00..c3962a8e9a
--- /dev/null
+++ 

[PULL 18/24] bsd-user: style changes for {}

[imp]

From: Warner Losh 

Fix various issues with {} not being present on if / for / case statements.
Tweak indentation where needed to appease checkpatch after this.
Minor line length tweaks

Signed-off-by: Warner Losh 
---
 bsd-user/main.c | 100 +---
 1 file changed, 60 insertions(+), 40 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index a94ab63065..69e5525607 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -218,7 +218,7 @@ void cpu_loop(CPUX86State *env)
 #ifndef TARGET_ABI32
 case EXCP_SYSCALL:
 /* syscall from syscall instruction */
-if (bsd_type == target_freebsd)
+if (bsd_type == target_freebsd) {
 env->regs[R_EAX] = do_freebsd_syscall(env,
   env->regs[R_EAX],
   env->regs[R_EDI],
@@ -227,7 +227,7 @@ void cpu_loop(CPUX86State *env)
   env->regs[R_ECX],
   env->regs[8],
   env->regs[9], 0, 0);
-else { /* if (bsd_type == target_openbsd) */
+} else { /* if (bsd_type == target_openbsd) */
 env->regs[R_EAX] = do_openbsd_syscall(env,
   env->regs[R_EAX],
   env->regs[R_EDI],
@@ -273,10 +273,11 @@ void cpu_loop(CPUX86State *env)
 case EXCP0E_PAGE:
 info.si_signo = SIGSEGV;
 info.si_errno = 0;
-if (!(env->error_code & 1))
+if (!(env->error_code & 1)) {
 info.si_code = TARGET_SEGV_MAPERR;
-else
+} else {
 info.si_code = TARGET_SEGV_ACCERR;
+}
 info._sifields._sigfault._addr = env->cr[2];
 queue_signal(env, info.si_signo, );
 break;
@@ -343,23 +344,23 @@ void cpu_loop(CPUX86State *env)
 break;
 #ifdef notyet
 case EXCP_DEBUG:
-{
-int sig;
+{
+int sig;
 
-sig = gdb_handlesig(env, TARGET_SIGTRAP);
-if (sig)
-  {
-info.si_signo = sig;
-info.si_errno = 0;
-info.si_code = TARGET_TRAP_BRKPT;
-queue_signal(env, info.si_signo, );
-  }
+sig = gdb_handlesig(env, TARGET_SIGTRAP);
+if (sig) {
+info.si_signo = sig;
+info.si_errno = 0;
+info.si_code = TARGET_TRAP_BRKPT;
+queue_signal(env, info.si_signo, );
 }
 break;
+}
 #endif
 default:
 pc = env->segs[R_CS].base + env->eip;
-fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - 
aborting\n",
+fprintf(stderr,
+"qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
 (long)pc, trapnr);
 abort();
 }
@@ -383,8 +384,9 @@ static inline int get_reg_index(CPUSPARCState *env, int 
cwp, int index)
  * wrap handling : if cwp is on the last window, then we use the
  * registers 'after' the end
  */
-if (index < 8 && env->cwp == env->nwindows - 1)
+if (index < 8 && env->cwp == env->nwindows - 1) {
 index += 16 * env->nwindows;
+}
 return index;
 }
 
@@ -396,8 +398,9 @@ static inline void save_window_offset(CPUSPARCState *env, 
int cwp1)
 
 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
 #ifdef TARGET_SPARC64
-if (sp_ptr & 3)
+if (sp_ptr & 3) {
 sp_ptr += SPARC64_STACK_BIAS;
+}
 #endif
 #if defined(DEBUG_WIN)
 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
@@ -446,8 +449,9 @@ static void restore_window(CPUSPARCState *env)
 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
 #ifdef TARGET_SPARC64
-if (sp_ptr & 3)
+if (sp_ptr & 3) {
 sp_ptr += SPARC64_STACK_BIAS;
+}
 #endif
 #if defined(DEBUG_WIN)
 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
@@ -460,8 +464,9 @@ static void restore_window(CPUSPARCState *env)
 }
 #ifdef TARGET_SPARC64
 env->canrestore++;
-if (env->cleanwin < env->nwindows - 1)
+if (env->cleanwin < env->nwindows - 1) {
 env->cleanwin++;
+}
 env->cansave--;
 #else
 env->wim = new_wim;
@@ -477,11 +482,13 @@ static void flush_windows(CPUSPARCState *env)
 /* if restore would invoke restore_window(), then we can stop */
 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
 #ifndef TARGET_SPARC64
-if (env->wim & (1 << cwp1))
+if (env->wim & (1 << cwp1)) {
 break;
+}
 #else
-if (env->canrestore 

[PULL 19/24] bsd-user: use qemu_strtol in preference to strtol

[imp]

From: Warner Losh 

Signed-off-by: Warner Losh 
---
 bsd-user/main.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index 69e5525607..95fda8c5ae 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -821,7 +821,7 @@ int main(int argc, char **argv)
 }
 } else if (!strcmp(r, "s")) {
 r = argv[optind++];
-x86_stack_size = strtol(r, (char **), 0);
+x86_stack_size = qemu_strtol(r, (char **), 0);
 if (x86_stack_size <= 0) {
 usage();
 }
@@ -853,7 +853,7 @@ int main(int argc, char **argv)
 exit(1);
 }
 } else if (!strcmp(r, "B")) {
-guest_base = strtol(argv[optind++], NULL, 0);
+guest_base = qemu_strtol(argv[optind++], NULL, 0);
 have_guest_base = true;
 } else if (!strcmp(r, "drop-ld-preload")) {
 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
-- 
2.22.1

[PULL 12/24] bsd-user: style tweak: if 0 -> ifdef notyet for code needed in future

[imp]

From: Warner Losh 

Signed-off-by: Warner Losh 
---
 bsd-user/main.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index ff886de98e..91603f5ac2 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -245,7 +245,7 @@ void cpu_loop(CPUX86State *env)
 }
 break;
 #endif
-#if 0
+#ifdef notyet
 case EXCP0B_NOSEG:
 case EXCP0C_STACK:
 info.si_signo = SIGBUS;
@@ -340,7 +340,7 @@ void cpu_loop(CPUX86State *env)
 case EXCP_INTERRUPT:
 /* just indicate that signals should be handled asap */
 break;
-#if 0
+#ifdef notyet
 case EXCP_DEBUG:
 {
 int sig;
@@ -589,7 +589,7 @@ void cpu_loop(CPUSPARCState *env)
 break;
 case TT_TFAULT:
 case TT_DFAULT:
-#if 0
+#ifdef notyet
 {
 info.si_signo = SIGSEGV;
 info.si_errno = 0;
@@ -609,7 +609,7 @@ void cpu_loop(CPUSPARCState *env)
 break;
 case TT_TFAULT:
 case TT_DFAULT:
-#if 0
+#ifdef notyet
 {
 info.si_signo = SIGSEGV;
 info.si_errno = 0;
@@ -629,11 +629,11 @@ void cpu_loop(CPUSPARCState *env)
 break;
 case EXCP_DEBUG:
 {
-#if 0
+#ifdef notyet
 int sig =
 #endif
 gdb_handlesig(cs, TARGET_SIGTRAP);
-#if 0
+#ifdef notyet
 if (sig)
   {
 info.si_signo = sig;
-- 
2.22.1

[PULL 15/24] bsd-user: Fix commentary issues

[imp]

From: Warner Losh 

Lines > 80 or 90 characters
C++ comments
BSD /*- block comment convention removed.

Signed-off-by: Warner Losh 
---
 bsd-user/bsd-mman.h | 42 ++
 1 file changed, 26 insertions(+), 16 deletions(-)

diff --git a/bsd-user/bsd-mman.h b/bsd-user/bsd-mman.h
index 910e8c1921..5a64d0d425 100644
--- a/bsd-user/bsd-mman.h
+++ b/bsd-user/bsd-mman.h
@@ -1,4 +1,4 @@
-/*-
+/*
  * Copyright (c) 1982, 1986, 1993
  *  The Regents of the University of California.  All rights reserved.
  *
@@ -30,16 +30,20 @@
  * $FreeBSD: src/sys/sys/mman.h,v 1.42 2008/03/28 04:29:27 ps Exp $
  */
 
-#define TARGET_FREEBSD_MAP_RESERVED0080 0x0080  /* previously misimplemented 
MAP_INHERIT */
-#define TARGET_FREEBSD_MAP_RESERVED0100 0x0100  /* previously unimplemented 
MAP_NOEXTEND */
-#define TARGET_FREEBSD_MAP_STACK0x0400  /* region grows down, like a 
stack */
-#define TARGET_FREEBSD_MAP_NOSYNC   0x0800  /* page to but do not sync 
underlying file */
+#define TARGET_FREEBSD_MAP_RESERVED0080 0x0080
+ /* previously misimplemented MAP_INHERIT */
+#define TARGET_FREEBSD_MAP_RESERVED0100 0x0100
+ /* previously unimplemented MAP_NOEXTEND */
+#define TARGET_FREEBSD_MAP_STACK0x0400
+ /* region grows down, like a stack */
+#define TARGET_FREEBSD_MAP_NOSYNC   0x0800
+ /* page to but do not sync underlying file */
 
 #define TARGET_FREEBSD_MAP_FLAGMASK 0x1ff7
 
 /*  $NetBSD: mman.h,v 1.42 2008/11/18 22:13:49 ad Exp $ */
 
-/*-
+/*
  * Copyright (c) 1982, 1986, 1993
  *  The Regents of the University of California.  All rights reserved.
  *
@@ -69,18 +73,21 @@
  *
  *  @(#)mman.h  8.2 (Berkeley) 1/9/95
  */
-#define TARGET_NETBSD_MAP_INHERIT   0x0080  /* region is retained after 
exec */
-#define TARGET_NETBSD_MAP_TRYFIXED  0x0400 /* attempt hint address, even 
within break */
-#define TARGET_NETBSD_MAP_WIRED 0x0800  /* mlock() mapping when it is 
established */
-
-#define TARGET_NETBSD_MAP_STACK 0x2000  /* allocated from memory, swap 
space (stack) */
+#define TARGET_NETBSD_MAP_INHERIT   0x0080
+/* region is retained after exec */
+#define TARGET_NETBSD_MAP_TRYFIXED  0x0400
+/* attempt hint address, even within break */
+#define TARGET_NETBSD_MAP_WIRED 0x0800
+/* mlock() mapping when it is established */
+#define TARGET_NETBSD_MAP_STACK 0x2000
+/* allocated from memory, swap space (stack) */
 
 #define TARGET_NETBSD_MAP_FLAGMASK  0x3ff7
 
 /*  $OpenBSD: mman.h,v 1.18 2003/07/21 22:52:19 tedu Exp $  */
 /*  $NetBSD: mman.h,v 1.11 1995/03/26 20:24:23 jtc Exp $*/
 
-/*-
+/*
  * Copyright (c) 1982, 1986, 1993
  *  The Regents of the University of California.  All rights reserved.
  *
@@ -111,11 +118,14 @@
  *  @(#)mman.h  8.1 (Berkeley) 6/2/93
  */
 
-#define TARGET_OPENBSD_MAP_INHERIT  0x0080  /* region is retained after 
exec */
-#define TARGET_OPENBSD_MAP_NOEXTEND 0x0100  /* for MAP_FILE, don't change 
file size */
-#define TARGET_OPENBSD_MAP_TRYFIXED 0x0400  /* attempt hint address, even 
within heap */
+#define TARGET_OPENBSD_MAP_INHERIT  0x0080
+/* region is retained after exec */
+#define TARGET_OPENBSD_MAP_NOEXTEND 0x0100
+/* for MAP_FILE, don't change file size */
+#define TARGET_OPENBSD_MAP_TRYFIXED 0x0400
+/* attempt hint address, even within heap */
 
 #define TARGET_OPENBSD_MAP_FLAGMASK 0x17f7
 
-// XXX
+/* XXX what to do in the future? */
 #define TARGET_BSD_MAP_FLAGMASK 0x3ff7
-- 
2.22.1

[PULL 08/24] bsd-user: style tweak: use C not C++ comments

[imp]

From: Warner Losh 

Signed-off-by: Warner Losh 
---
 bsd-user/elfload.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/bsd-user/elfload.c b/bsd-user/elfload.c
index 3c9d8c2845..87154283ef 100644
--- a/bsd-user/elfload.c
+++ b/bsd-user/elfload.c
@@ -1010,7 +1010,7 @@ static const char *lookup_symbolxx(struct syminfo *s, 
target_ulong orig_addr)
 struct elf_sym *syms = s->disas_symtab.elf64;
 #endif
 
-// binary search
+/* binary search */
 struct elf_sym *sym;
 
 sym = bsearch(_addr, syms, s->disas_num_syms, sizeof(*syms), symfind);
@@ -1092,7 +1092,7 @@ static void load_symbols(struct elfhdr *hdr, int fd)
 #ifdef BSWAP_NEEDED
 bswap_sym(syms + i);
 #endif
-// Throw away entries which we do not need.
+/* Throw away entries which we do not need. */
 if (syms[i].st_shndx == SHN_UNDEF ||
 syms[i].st_shndx >= SHN_LORESERVE ||
 ELF_ST_TYPE(syms[i].st_info) != STT_FUNC) {
-- 
2.22.1

[PULL 13/24] bsd-user: style tweak: if 0 -> ifdef notyet for code needed in future

[imp]

From: Warner Losh 

Signed-off-by: Warner Losh 
---
 bsd-user/strace.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/bsd-user/strace.c b/bsd-user/strace.c
index 2c3b59caf0..6a78dd7efa 100644
--- a/bsd-user/strace.c
+++ b/bsd-user/strace.c
@@ -128,7 +128,7 @@ static void print_syscall_ret_addr(const struct syscallname 
*name, abi_long ret)
 }
 }
 
-#if 0 /* currently unused */
+#ifdef notyet /* currently unused */
 static void
 print_syscall_ret_raw(struct syscallname *name, abi_long ret)
 {
-- 
2.22.1

[PULL 24/24] bsd-user: move sparc cpu_loop into target_arch_cpu.h as target_cpu_loop

[imp]

From: Warner Losh 

Move the sparc cpu_loop out of main.c and into target_arch_cpu.h and
rename it from cpu_loop to target_cpu_loop. Remove the #ifdef around
the catch-all cpu_loop.

Signed-off-by: Stacey Son 
Signed-off-by: Warner Losh 
---
 bsd-user/main.c  | 305 ---
 bsd-user/sparc/target_arch_cpu.h | 300 ++
 2 files changed, 300 insertions(+), 305 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index 3ebfa9425d..5791c3a641 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -87,315 +87,10 @@ void fork_end(int child)
 }
 }
 
-#ifdef TARGET_I386 /* stopgap ifdef */
 void cpu_loop(CPUArchState *env)
 {
 target_cpu_loop(env);
 }
-#endif
-
-#ifdef TARGET_SPARC
-#define SPARC64_STACK_BIAS 2047
-
-/* #define DEBUG_WIN */
-/*
- * WARNING: dealing with register windows _is_ complicated. More info
- * can be found at http://www.sics.se/~psm/sparcstack.html
- */
-static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
-{
-index = (index + cwp * 16) % (16 * env->nwindows);
-/*
- * wrap handling : if cwp is on the last window, then we use the
- * registers 'after' the end
- */
-if (index < 8 && env->cwp == env->nwindows - 1) {
-index += 16 * env->nwindows;
-}
-return index;
-}
-
-/* save the register window 'cwp1' */
-static inline void save_window_offset(CPUSPARCState *env, int cwp1)
-{
-unsigned int i;
-abi_ulong sp_ptr;
-
-sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
-#ifdef TARGET_SPARC64
-if (sp_ptr & 3) {
-sp_ptr += SPARC64_STACK_BIAS;
-}
-#endif
-#if defined(DEBUG_WIN)
-printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
-   sp_ptr, cwp1);
-#endif
-for (i = 0; i < 16; i++) {
-/* FIXME - what to do if put_user() fails? */
-put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
-sp_ptr += sizeof(abi_ulong);
-}
-}
-
-static void save_window(CPUSPARCState *env)
-{
-#ifndef TARGET_SPARC64
-unsigned int new_wim;
-new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
-((1LL << env->nwindows) - 1);
-save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
-env->wim = new_wim;
-#else
-/*
- * cansave is zero if the spill trap handler is triggered by `save` and
- * nonzero if triggered by a `flushw`
- */
-save_window_offset(env, cpu_cwp_dec(env, env->cwp - env->cansave - 2));
-env->cansave++;
-env->canrestore--;
-#endif
-}
-
-static void restore_window(CPUSPARCState *env)
-{
-#ifndef TARGET_SPARC64
-unsigned int new_wim;
-#endif
-unsigned int i, cwp1;
-abi_ulong sp_ptr;
-
-#ifndef TARGET_SPARC64
-new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
-((1LL << env->nwindows) - 1);
-#endif
-
-/* restore the invalid window */
-cwp1 = cpu_cwp_inc(env, env->cwp + 1);
-sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
-#ifdef TARGET_SPARC64
-if (sp_ptr & 3) {
-sp_ptr += SPARC64_STACK_BIAS;
-}
-#endif
-#if defined(DEBUG_WIN)
-printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
-   sp_ptr, cwp1);
-#endif
-for (i = 0; i < 16; i++) {
-/* FIXME - what to do if get_user() fails? */
-get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
-sp_ptr += sizeof(abi_ulong);
-}
-#ifdef TARGET_SPARC64
-env->canrestore++;
-if (env->cleanwin < env->nwindows - 1) {
-env->cleanwin++;
-}
-env->cansave--;
-#else
-env->wim = new_wim;
-#endif
-}
-
-static void flush_windows(CPUSPARCState *env)
-{
-int offset, cwp1;
-
-offset = 1;
-for (;;) {
-/* if restore would invoke restore_window(), then we can stop */
-cwp1 = cpu_cwp_inc(env, env->cwp + offset);
-#ifndef TARGET_SPARC64
-if (env->wim & (1 << cwp1)) {
-break;
-}
-#else
-if (env->canrestore == 0) {
-break;
-}
-env->cansave++;
-env->canrestore--;
-#endif
-save_window_offset(env, cwp1);
-offset++;
-}
-cwp1 = cpu_cwp_inc(env, env->cwp + 1);
-#ifndef TARGET_SPARC64
-/* set wim so that restore will reload the registers */
-env->wim = 1 << cwp1;
-#endif
-#if defined(DEBUG_WIN)
-printf("flush_windows: nb=%d\n", offset - 1);
-#endif
-}
-
-void cpu_loop(CPUSPARCState *env)
-{
-CPUState *cs = env_cpu(env);
-int trapnr, ret, syscall_nr;
-/* target_siginfo_t info; */
-
-while (1) {
-cpu_exec_start(cs);
-trapnr = cpu_exec(cs);
-cpu_exec_end(cs);
-process_queued_cpu_work(cs);
-
-switch (trapnr) {
-#ifndef TARGET_SPARC64
-case 0x80:
-#else
-/* FreeBSD uses 0x141 for syscalls too */
-case 0x141:
-if (bsd_type != target_freebsd) {
-goto badtrap;
-}
-/* fallthrough 

[PULL 16/24] bsd-user: Use preferred block comments

[imp]

From: Warner Losh 

Use the preferred block comment style.

Signed-off-by: Warner Losh 
---
 bsd-user/main.c | 28 ++--
 1 file changed, 18 insertions(+), 10 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index 91603f5ac2..5958b07e62 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -51,9 +51,11 @@ const char *qemu_uname_release;
 extern char **environ;
 enum BSDType bsd_type;
 
-/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
-   we allocate a bigger stack. Need a better solution, for example
-   by remapping the process stack directly at the right place */
+/*
+ * XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
+ * we allocate a bigger stack. Need a better solution, for example
+ * by remapping the process stack directly at the right place
+ */
 unsigned long x86_stack_size = 512 * 1024;
 
 void gemu_log(const char *fmt, ...)
@@ -371,13 +373,17 @@ void cpu_loop(CPUX86State *env)
 #define SPARC64_STACK_BIAS 2047
 
 /* #define DEBUG_WIN */
-/* WARNING: dealing with register windows _is_ complicated. More info
-   can be found at http://www.sics.se/~psm/sparcstack.html */
+/*
+ * WARNING: dealing with register windows _is_ complicated. More info
+ * can be found at http://www.sics.se/~psm/sparcstack.html
+ */
 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
 {
 index = (index + cwp * 16) % (16 * env->nwindows);
-/* wrap handling : if cwp is on the last window, then we use the
-   registers 'after' the end */
+/*
+ * wrap handling : if cwp is on the last window, then we use the
+ * registers 'after' the end
+ */
 if (index < 8 && env->cwp == env->nwindows - 1)
 index += 16 * env->nwindows;
 return index;
@@ -990,9 +996,11 @@ int main(int argc, char **argv)
 syscall_init();
 signal_init();
 
-/* Now that we've loaded the binary, GUEST_BASE is fixed.  Delay
-   generating the prologue until now so that the prologue can take
-   the real value of GUEST_BASE into account.  */
+/*
+ * Now that we've loaded the binary, GUEST_BASE is fixed.  Delay
+ * generating the prologue until now so that the prologue can take
+ * the real value of GUEST_BASE into account.
+ */
 tcg_prologue_init(tcg_ctx);
 tcg_region_init();
 
-- 
2.22.1

[PULL 07/24] bsd-user: style tweak: keyword space (

[imp]

From: Warner Losh 

Signed-off-by: Warner Losh 
---
 bsd-user/uaccess.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/bsd-user/uaccess.c b/bsd-user/uaccess.c
index 91e2067933..89163257f4 100644
--- a/bsd-user/uaccess.c
+++ b/bsd-user/uaccess.c
@@ -46,7 +46,7 @@ abi_long target_strlen(abi_ulong guest_addr1)
 int max_len, len;
 
 guest_addr = guest_addr1;
-for(;;) {
+for (;;) {
 max_len = TARGET_PAGE_SIZE - (guest_addr & ~TARGET_PAGE_MASK);
 ptr = lock_user(VERIFY_READ, guest_addr, max_len, 1);
 if (!ptr)
-- 
2.22.1

[PULL 10/24] bsd-user: style tweak: use C not C++ comments

[imp]

From: Warner Losh 

Signed-off-by: Warner Losh 
---
 bsd-user/qemu.h | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h
index b836b603af..3480db890d 100644
--- a/bsd-user/qemu.h
+++ b/bsd-user/qemu.h
@@ -71,7 +71,7 @@ struct image_info {
 
 struct sigqueue {
 struct sigqueue *next;
-//target_siginfo_t info;
+/* target_siginfo_t info; */
 };
 
 struct emulated_sigtable {
@@ -193,9 +193,11 @@ extern int do_strace;
 /* signal.c */
 void process_pending_signals(CPUArchState *cpu_env);
 void signal_init(void);
-//int queue_signal(CPUArchState *env, int sig, target_siginfo_t *info);
-//void host_to_target_siginfo(target_siginfo_t *tinfo, const siginfo_t *info);
-//void target_to_host_siginfo(siginfo_t *info, const target_siginfo_t *tinfo);
+/*
+ * int queue_signal(CPUArchState *env, int sig, target_siginfo_t *info);
+ * void host_to_target_siginfo(target_siginfo_t *tinfo, const siginfo_t *info);
+ * void target_to_host_siginfo(siginfo_t *info, const target_siginfo_t *tinfo);
+ */
 long do_sigreturn(CPUArchState *env);
 long do_rt_sigreturn(CPUArchState *env);
 abi_long do_sigaltstack(abi_ulong uss_addr, abi_ulong uoss_addr, abi_ulong sp);
-- 
2.22.1

[PULL 14/24] bsd-user: style tweak: if 0 -> ifdef notyet for code needed in future

[imp]

From: Warner Losh 

Signed-off-by: Warner Losh 
---
 bsd-user/x86_64/target_syscall.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/bsd-user/x86_64/target_syscall.h b/bsd-user/x86_64/target_syscall.h
index a8e6274b76..9a6e072f87 100644
--- a/bsd-user/x86_64/target_syscall.h
+++ b/bsd-user/x86_64/target_syscall.h
@@ -59,7 +59,7 @@ struct target_pt_regs {
 #define TARGET_GDT_ENTRY_TLS_MIN 12
 #define TARGET_GDT_ENTRY_TLS_MAX 14
 
-#if 0 // Redefine this
+#ifdef notyet /* Redefine this */
 struct target_modify_ldt_ldt_s {
unsigned int  entry_number;
 abi_ulong base_addr;
-- 
2.22.1

[PULL 17/24] bsd-user: move extern to header file

[imp]

From: Warner Losh 

extern char **environ has no standard home, so move the declaration from the .c
file to a handy .h file. Since this is a standard, old-school UNIX interface
dating from the 5th edition, it's not quite the same issue that the rule is
supposed to protect against, though.

Signed-off-by: Warner Losh 
---
 bsd-user/main.c | 1 -
 bsd-user/qemu.h | 2 ++
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index 5958b07e62..a94ab63065 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -48,7 +48,6 @@ unsigned long reserved_va;
 
 static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
 const char *qemu_uname_release;
-extern char **environ;
 enum BSDType bsd_type;
 
 /*
diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h
index 3480db890d..4305bd1aed 100644
--- a/bsd-user/qemu.h
+++ b/bsd-user/qemu.h
@@ -27,6 +27,8 @@
 
 #include "exec/user/abitypes.h"
 
+extern char **environ;
+
 enum BSDType {
 target_freebsd,
 target_netbsd,
-- 
2.22.1

[PULL 04/24] bsd-user: style tweak: keyword space (

[imp]

From: Warner Losh 

Signed-off-by: Warner Losh 
---
 bsd-user/mmap.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/bsd-user/mmap.c b/bsd-user/mmap.c
index 01ec808003..0ac1b92706 100644
--- a/bsd-user/mmap.c
+++ b/bsd-user/mmap.c
@@ -93,11 +93,11 @@ int target_mprotect(abi_ulong start, abi_ulong len, int 
prot)
 if (start > host_start) {
 /* handle host page containing start */
 prot1 = prot;
-for(addr = host_start; addr < start; addr += TARGET_PAGE_SIZE) {
+for (addr = host_start; addr < start; addr += TARGET_PAGE_SIZE) {
 prot1 |= page_get_flags(addr);
 }
 if (host_end == host_start + qemu_host_page_size) {
-for(addr = end; addr < host_end; addr += TARGET_PAGE_SIZE) {
+for (addr = end; addr < host_end; addr += TARGET_PAGE_SIZE) {
 prot1 |= page_get_flags(addr);
 }
 end = host_end;
@@ -110,7 +110,7 @@ int target_mprotect(abi_ulong start, abi_ulong len, int 
prot)
 }
 if (end < host_end) {
 prot1 = prot;
-for(addr = end; addr < host_end; addr += TARGET_PAGE_SIZE) {
+for (addr = end; addr < host_end; addr += TARGET_PAGE_SIZE) {
 prot1 |= page_get_flags(addr);
 }
 ret = mprotect(g2h_untagged(host_end - qemu_host_page_size),
@@ -148,7 +148,7 @@ static int mmap_frag(abi_ulong real_start,
 
 /* get the protection of the target pages outside the mapping */
 prot1 = 0;
-for(addr = real_start; addr < real_end; addr++) {
+for (addr = real_start; addr < real_end; addr++) {
 if (addr < start || addr >= end)
 prot1 |= page_get_flags(addr);
 }
@@ -225,9 +225,9 @@ static abi_ulong mmap_find_vma(abi_ulong start, abi_ulong 
size)
 if (addr == 0)
 addr = mmap_next_start;
 addr_start = addr;
-for(;;) {
+for (;;) {
 prot = 0;
-for(addr1 = addr; addr1 < (addr + size); addr1 += TARGET_PAGE_SIZE) {
+for (addr1 = addr; addr1 < (addr + size); addr1 += TARGET_PAGE_SIZE) {
 prot |= page_get_flags(addr1);
 }
 if (prot == 0)
@@ -262,7 +262,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int 
prot,
 printf("MAP_FIXED ");
 if (flags & MAP_ANON)
 printf("MAP_ANON ");
-switch(flags & TARGET_BSD_MAP_FLAGMASK) {
+switch (flags & TARGET_BSD_MAP_FLAGMASK) {
 case MAP_PRIVATE:
 printf("MAP_PRIVATE ");
 break;
@@ -321,7 +321,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int 
prot,
 end = start + len;
 real_end = HOST_PAGE_ALIGN(end);
 
-for(addr = real_start; addr < real_end; addr += TARGET_PAGE_SIZE) {
+for (addr = real_start; addr < real_end; addr += TARGET_PAGE_SIZE) {
 flg = page_get_flags(addr);
 if (flg & PAGE_RESERVED) {
 errno = ENXIO;
@@ -433,11 +433,11 @@ int target_munmap(abi_ulong start, abi_ulong len)
 if (start > real_start) {
 /* handle host page containing start */
 prot = 0;
-for(addr = real_start; addr < start; addr += TARGET_PAGE_SIZE) {
+for (addr = real_start; addr < start; addr += TARGET_PAGE_SIZE) {
 prot |= page_get_flags(addr);
 }
 if (real_end == real_start + qemu_host_page_size) {
-for(addr = end; addr < real_end; addr += TARGET_PAGE_SIZE) {
+for (addr = end; addr < real_end; addr += TARGET_PAGE_SIZE) {
 prot |= page_get_flags(addr);
 }
 end = real_end;
@@ -447,7 +447,7 @@ int target_munmap(abi_ulong start, abi_ulong len)
 }
 if (end < real_end) {
 prot = 0;
-for(addr = end; addr < real_end; addr += TARGET_PAGE_SIZE) {
+for (addr = end; addr < real_end; addr += TARGET_PAGE_SIZE) {
 prot |= page_get_flags(addr);
 }
 if (prot != 0)
-- 
2.22.1

[PULL 09/24] bsd-user: style tweak: use C not C++ comments

[imp]

From: Warner Losh 

Signed-off-by: Warner Losh 
---
 bsd-user/main.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index 455b8eddab..ff886de98e 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -148,7 +148,7 @@ void cpu_loop(CPUX86State *env)
 CPUState *cs = env_cpu(env);
 int trapnr;
 abi_ulong pc;
-//target_siginfo_t info;
+/* target_siginfo_t info; */
 
 for (;;) {
 cpu_exec_start(cs);
@@ -197,7 +197,7 @@ void cpu_loop(CPUX86State *env)
   arg6,
   arg7,
   arg8);
-} else { //if (bsd_type == target_openbsd)
+} else { /* if (bsd_type == target_openbsd) */
 env->regs[R_EAX] = do_openbsd_syscall(env,
   env->regs[R_EAX],
   env->regs[R_EBX],
@@ -226,7 +226,7 @@ void cpu_loop(CPUX86State *env)
   env->regs[R_ECX],
   env->regs[8],
   env->regs[9], 0, 0);
-else { //if (bsd_type == target_openbsd)
+else { /* if (bsd_type == target_openbsd) */
 env->regs[R_EAX] = do_openbsd_syscall(env,
   env->regs[R_EAX],
   env->regs[R_EDI],
@@ -370,7 +370,7 @@ void cpu_loop(CPUX86State *env)
 #ifdef TARGET_SPARC
 #define SPARC64_STACK_BIAS 2047
 
-//#define DEBUG_WIN
+/* #define DEBUG_WIN */
 /* WARNING: dealing with register windows _is_ complicated. More info
can be found at http://www.sics.se/~psm/sparcstack.html */
 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
@@ -497,7 +497,7 @@ void cpu_loop(CPUSPARCState *env)
 {
 CPUState *cs = env_cpu(env);
 int trapnr, ret, syscall_nr;
-//target_siginfo_t info;
+/* target_siginfo_t info; */
 
 while (1) {
 cpu_exec_start(cs);
@@ -527,7 +527,7 @@ void cpu_loop(CPUSPARCState *env)
 env->regwptr[0], env->regwptr[1],
 env->regwptr[2], env->regwptr[3],
 env->regwptr[4], env->regwptr[5]);
-else { //if (bsd_type == target_openbsd)
+else { /* if (bsd_type == target_openbsd) */
 #if defined(TARGET_SPARC64)
 syscall_nr &= ~(TARGET_OPENBSD_SYSCALL_G7RFLAG |
 TARGET_OPENBSD_SYSCALL_G2RFLAG);
@@ -619,7 +619,7 @@ void cpu_loop(CPUSPARCState *env)
 info._sifields._sigfault._addr = env->dmmuregs[4];
 else
 info._sifields._sigfault._addr = env->tsptr->tpc;
-//queue_signal(env, info.si_signo, );
+/* queue_signal(env, info.si_signo, ); */
 }
 #endif
 break;
@@ -639,7 +639,7 @@ void cpu_loop(CPUSPARCState *env)
 info.si_signo = sig;
 info.si_errno = 0;
 info.si_code = TARGET_TRAP_BRKPT;
-//queue_signal(env, info.si_signo, );
+/* queue_signal(env, info.si_signo, ); */
   }
 #endif
 }
-- 
2.22.1

[PULL 06/24] bsd-user: style tweak: keyword space (

[imp]

From: Warner Losh 

Signed-off-by: Warner Losh 
---
 bsd-user/syscall.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/bsd-user/syscall.c b/bsd-user/syscall.c
index adc3d21b54..3352735c68 100644
--- a/bsd-user/syscall.c
+++ b/bsd-user/syscall.c
@@ -95,7 +95,7 @@ static abi_long do_freebsd_sysarch(CPUX86State *env, int op, 
abi_ulong parms)
 abi_ulong val;
 int idx;
 
-switch(op) {
+switch (op) {
 #ifdef TARGET_ABI32
 case TARGET_FREEBSD_I386_SET_GSBASE:
 case TARGET_FREEBSD_I386_SET_FSBASE:
@@ -271,7 +271,7 @@ static abi_long lock_iovec(int type, struct iovec *vec, 
abi_ulong target_addr,
 target_vec = lock_user(VERIFY_READ, target_addr, count * sizeof(struct 
target_iovec), 1);
 if (!target_vec)
 return -TARGET_EFAULT;
-for(i = 0;i < count; i++) {
+for (i = 0;i < count; i++) {
 base = tswapl(target_vec[i].iov_base);
 vec[i].iov_len = tswapl(target_vec[i].iov_len);
 if (vec[i].iov_len != 0) {
@@ -297,7 +297,7 @@ static abi_long unlock_iovec(struct iovec *vec, abi_ulong 
target_addr,
 target_vec = lock_user(VERIFY_READ, target_addr, count * sizeof(struct 
target_iovec), 1);
 if (!target_vec)
 return -TARGET_EFAULT;
-for(i = 0;i < count; i++) {
+for (i = 0;i < count; i++) {
 if (target_vec[i].iov_base) {
 base = tswapl(target_vec[i].iov_base);
 unlock_user(vec[i].iov_base, base, copy ? vec[i].iov_len : 0);
@@ -325,10 +325,10 @@ abi_long do_freebsd_syscall(void *cpu_env, int num, 
abi_long arg1,
 #endif
 record_syscall_start(cpu, num, arg1, arg2, arg3, arg4, arg5, arg6, 0, 0);
 
-if(do_strace)
+if (do_strace)
 print_freebsd_syscall(num, arg1, arg2, arg3, arg4, arg5, arg6);
 
-switch(num) {
+switch (num) {
 case TARGET_FREEBSD_NR_exit:
 #ifdef CONFIG_GPROF
 _mcleanup();
@@ -427,10 +427,10 @@ abi_long do_netbsd_syscall(void *cpu_env, int num, 
abi_long arg1,
 
 record_syscall_start(cpu, num, arg1, arg2, arg3, arg4, arg5, arg6, 0, 0);
 
-if(do_strace)
+if (do_strace)
 print_netbsd_syscall(num, arg1, arg2, arg3, arg4, arg5, arg6);
 
-switch(num) {
+switch (num) {
 case TARGET_NETBSD_NR_exit:
 #ifdef CONFIG_GPROF
 _mcleanup();
@@ -506,10 +506,10 @@ abi_long do_openbsd_syscall(void *cpu_env, int num, 
abi_long arg1,
 
 record_syscall_start(cpu, num, arg1, arg2, arg3, arg4, arg5, arg6, 0, 0);
 
-if(do_strace)
+if (do_strace)
 print_openbsd_syscall(num, arg1, arg2, arg3, arg4, arg5, arg6);
 
-switch(num) {
+switch (num) {
 case TARGET_OPENBSD_NR_exit:
 #ifdef CONFIG_GPROF
 _mcleanup();
-- 
2.22.1

[PULL 11/24] bsd-user: style tweak: if 0 -> ifdef notyet for code needed in future

[imp]

From: Warner Losh 

Signed-off-by: Warner Losh 
---
 bsd-user/elfload.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/bsd-user/elfload.c b/bsd-user/elfload.c
index 87154283ef..07a00ddbd5 100644
--- a/bsd-user/elfload.c
+++ b/bsd-user/elfload.c
@@ -1270,7 +1270,7 @@ int load_elf_binary(struct linux_binprm *bprm, struct 
target_pt_regs *regs,
   ibcs2_interpreter = 1;
 }
 
-#if 0
+#ifdef notyet
 printf("Using ELF interpreter %s\n", path(elf_interpreter));
 #endif
 if (retval >= 0) {
@@ -1529,7 +1529,7 @@ int load_elf_binary(struct linux_binprm *bprm, struct 
target_pt_regs *regs,
 
 padzero(elf_bss, elf_brk);
 
-#if 0
+#ifdef notyet
 printf("(start_brk) %x\n" , info->start_brk);
 printf("(end_code) %x\n" , info->end_code);
 printf("(start_code) %x\n" , info->start_code);
-- 
2.22.1

[PULL 01/24] bsd-user: whitespace changes

[imp]

From: Warner Losh 

keyword space paren, no space before ( in function calls, spaces around
operators.

Signed-off-by: Warner Losh 
---
 bsd-user/bsdload.c | 26 +-
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/bsd-user/bsdload.c b/bsd-user/bsdload.c
index f38c4faacf..2bacae7393 100644
--- a/bsd-user/bsdload.c
+++ b/bsd-user/bsdload.c
@@ -24,7 +24,7 @@ static int count(char ** vec)
 {
 int i;
 
-for(i = 0; *vec; i++) {
+for (i = 0; *vec; i++) {
 vec++;
 }
 
@@ -37,15 +37,15 @@ static int prepare_binprm(struct linux_binprm *bprm)
 int mode;
 int retval;
 
-if(fstat(bprm->fd, ) < 0) {
+if (fstat(bprm->fd, ) < 0) {
 return(-errno);
 }
 
 mode = st.st_mode;
-if(!S_ISREG(mode)) {/* Must be regular file */
+if (!S_ISREG(mode)) {/* Must be regular file */
 return(-EACCES);
 }
-if(!(mode & 0111)) {/* Must have at least one execute bit set */
+if (!(mode & 0111)) {/* Must have at least one execute bit set */
 return(-EACCES);
 }
 
@@ -53,7 +53,7 @@ static int prepare_binprm(struct linux_binprm *bprm)
 bprm->e_gid = getegid();
 
 /* Set-uid? */
-if(mode & S_ISUID) {
+if (mode & S_ISUID) {
 bprm->e_uid = st.st_uid;
 }
 
@@ -69,10 +69,10 @@ static int prepare_binprm(struct linux_binprm *bprm)
 
 memset(bprm->buf, 0, sizeof(bprm->buf));
 retval = lseek(bprm->fd, 0L, SEEK_SET);
-if(retval >= 0) {
+if (retval >= 0) {
 retval = read(bprm->fd, bprm->buf, 128);
 }
-if(retval < 0) {
+if (retval < 0) {
 perror("prepare_binprm");
 exit(-1);
 /* return(-errno); */
@@ -132,8 +132,8 @@ int loader_exec(const char * filename, char ** argv, char 
** envp,
 int retval;
 int i;
 
-bprm.p = TARGET_PAGE_SIZE*MAX_ARG_PAGES-sizeof(unsigned int);
-for (i=0 ; i=0) {
+if (retval >= 0) {
 if (bprm.buf[0] == 0x7f
 && bprm.buf[1] == 'E'
 && bprm.buf[2] == 'L'
 && bprm.buf[3] == 'F') {
-retval = load_elf_binary(,regs,infop);
+retval = load_elf_binary(, regs, infop);
 } else {
 fprintf(stderr, "Unknown binary format\n");
 return -1;
 }
 }
 
-if(retval>=0) {
+if (retval >= 0) {
 /* success.  Initialize important registers */
 do_init_thread(regs, infop);
 return retval;
 }
 
 /* Something went wrong, return the inode and free the argument pages*/
-for (i=0 ; i

[PULL 02/24] bsd-user: whitespace changes

[imp]

From: Warner Losh 

Fix various whitespace-only issues from checkpatch:
keyword space (
no space before ( on function calls
spaces around operators
suspect indentations (including one functions reindented)
extra spaces around unary operators

Signed-off-by: Warner Losh 
---
 bsd-user/elfload.c | 326 ++---
 1 file changed, 163 insertions(+), 163 deletions(-)

diff --git a/bsd-user/elfload.c b/bsd-user/elfload.c
index 5f4d824d78..3c9d8c2845 100644
--- a/bsd-user/elfload.c
+++ b/bsd-user/elfload.c
@@ -111,7 +111,7 @@ static uint32_t get_elf_hwcap(void)
 
 #ifdef TARGET_X86_64
 #define ELF_START_MMAP 0x2ab000ULL
-#define elf_check_arch(x) ( ((x) == ELF_ARCH) )
+#define elf_check_arch(x) (((x) == ELF_ARCH))
 
 #define ELF_CLASS  ELFCLASS64
 #define ELF_DATA   ELFDATA2LSB
@@ -134,7 +134,7 @@ static inline void init_thread(struct target_pt_regs *regs, 
struct image_info *i
 /*
  * This is used to ensure we don't load something for the wrong architecture.
  */
-#define elf_check_arch(x) ( ((x) == EM_386) || ((x) == EM_486) )
+#define elf_check_arch(x) (((x) == EM_386) || ((x) == EM_486))
 
 /*
  * These are used to set parameters in the core dumps.
@@ -168,7 +168,7 @@ static inline void init_thread(struct target_pt_regs *regs, 
struct image_info *i
 
 #define ELF_START_MMAP 0x8000
 
-#define elf_check_arch(x) ( (x) == EM_ARM )
+#define elf_check_arch(x) ((x) == EM_ARM)
 
 #define ELF_CLASS   ELFCLASS32
 #ifdef TARGET_WORDS_BIGENDIAN
@@ -184,7 +184,7 @@ static inline void init_thread(struct target_pt_regs *regs, 
struct image_info *i
 memset(regs, 0, sizeof(*regs));
 regs->ARM_cpsr = 0x10;
 if (infop->entry & 1)
-  regs->ARM_cpsr |= CPSR_T;
+regs->ARM_cpsr |= CPSR_T;
 regs->ARM_pc = infop->entry & 0xfffe;
 regs->ARM_sp = infop->start_stack;
 /* FIXME - what to for failure of get_user()? */
@@ -224,9 +224,9 @@ enum
 #define ELF_START_MMAP 0x8000
 
 #ifndef TARGET_ABI32
-#define elf_check_arch(x) ( (x) == EM_SPARCV9 || (x) == EM_SPARC32PLUS )
+#define elf_check_arch(x) ((x) == EM_SPARCV9 || (x) == EM_SPARC32PLUS)
 #else
-#define elf_check_arch(x) ( (x) == EM_SPARC32PLUS || (x) == EM_SPARC )
+#define elf_check_arch(x) ((x) == EM_SPARC32PLUS || (x) == EM_SPARC)
 #endif
 
 #define ELF_CLASS   ELFCLASS64
@@ -261,7 +261,7 @@ static inline void init_thread(struct target_pt_regs *regs, 
struct image_info *i
 #else
 #define ELF_START_MMAP 0x8000
 
-#define elf_check_arch(x) ( (x) == EM_SPARC )
+#define elf_check_arch(x) ((x) == EM_SPARC)
 
 #define ELF_CLASS   ELFCLASS32
 #define ELF_DATAELFDATA2MSB
@@ -285,13 +285,13 @@ static inline void init_thread(struct target_pt_regs 
*regs, struct image_info *i
 
 #if defined(TARGET_PPC64) && !defined(TARGET_ABI32)
 
-#define elf_check_arch(x) ( (x) == EM_PPC64 )
+#define elf_check_arch(x) ((x) == EM_PPC64)
 
 #define ELF_CLASS   ELFCLASS64
 
 #else
 
-#define elf_check_arch(x) ( (x) == EM_PPC )
+#define elf_check_arch(x) ((x) == EM_PPC)
 
 #define ELF_CLASS   ELFCLASS32
 
@@ -376,7 +376,7 @@ static inline void init_thread(struct target_pt_regs 
*_regs, struct image_info *
 
 #define ELF_START_MMAP 0x8000
 
-#define elf_check_arch(x) ( (x) == EM_MIPS )
+#define elf_check_arch(x) ((x) == EM_MIPS)
 
 #ifdef TARGET_MIPS64
 #define ELF_CLASS   ELFCLASS64
@@ -406,7 +406,7 @@ static inline void init_thread(struct target_pt_regs *regs, 
struct image_info *i
 
 #define ELF_START_MMAP 0x8000
 
-#define elf_check_arch(x) ( (x) == EM_SH )
+#define elf_check_arch(x) ((x) == EM_SH)
 
 #define ELF_CLASS ELFCLASS32
 #define ELF_DATA  ELFDATA2LSB
@@ -428,7 +428,7 @@ static inline void init_thread(struct target_pt_regs *regs, 
struct image_info *i
 
 #define ELF_START_MMAP 0x8000
 
-#define elf_check_arch(x) ( (x) == EM_CRIS )
+#define elf_check_arch(x) ((x) == EM_CRIS)
 
 #define ELF_CLASS ELFCLASS32
 #define ELF_DATA  ELFDATA2LSB
@@ -448,7 +448,7 @@ static inline void init_thread(struct target_pt_regs *regs, 
struct image_info *i
 
 #define ELF_START_MMAP 0x8000
 
-#define elf_check_arch(x) ( (x) == EM_68K )
+#define elf_check_arch(x) ((x) == EM_68K)
 
 #define ELF_CLASS   ELFCLASS32
 #define ELF_DATAELFDATA2MSB
@@ -473,7 +473,7 @@ static inline void init_thread(struct target_pt_regs *regs, 
struct image_info *i
 
 #define ELF_START_MMAP (0x300ULL)
 
-#define elf_check_arch(x) ( (x) == ELF_ARCH )
+#define elf_check_arch(x) ((x) == ELF_ARCH)
 
 #define ELF_CLASS  ELFCLASS64
 #define ELF_DATA   ELFDATA2MSB
@@ -538,8 +538,8 @@ struct exec
 
 /* Necessary parameters */
 #define TARGET_ELF_EXEC_PAGESIZE TARGET_PAGE_SIZE
-#define TARGET_ELF_PAGESTART(_v) ((_v) & ~(unsigned 
long)(TARGET_ELF_EXEC_PAGESIZE-1))
-#define TARGET_ELF_PAGEOFFSET(_v) ((_v) & (TARGET_ELF_EXEC_PAGESIZE-1))
+#define TARGET_ELF_PAGESTART(_v) ((_v) & ~(unsigned 
long)(TARGET_ELF_EXEC_PAGESIZE - 1))
+#define TARGET_ELF_PAGEOFFSET(_v) ((_v) & 

[PULL 05/24] bsd-user: style tweak: keyword space (

[imp]

From: Warner Losh 

Signed-off-by: Warner Losh 
---
 bsd-user/qemu.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h
index d2bcaab741..b836b603af 100644
--- a/bsd-user/qemu.h
+++ b/bsd-user/qemu.h
@@ -233,7 +233,7 @@ static inline bool access_ok(int type, abi_ulong addr, 
abi_ulong size)
 #define __put_user(x, hptr)\
 ({\
 int size = sizeof(*hptr);\
-switch(size) {\
+switch (size) {\
 case 1:\
 *(uint8_t *)(hptr) = (uint8_t)(typeof(*hptr))(x);\
 break;\
@@ -255,7 +255,7 @@ static inline bool access_ok(int type, abi_ulong addr, 
abi_ulong size)
 #define __get_user(x, hptr) \
 ({\
 int size = sizeof(*hptr);\
-switch(size) {\
+switch (size) {\
 case 1:\
 x = (typeof(*hptr))*(uint8_t *)(hptr);\
 break;\
-- 
2.22.1

[PULL 03/24] bsd-user: whitespace changes

[imp]

From: Warner Losh 

Space after keywords, no space for function calls and spaces around operators.

Signed-off-by: Warner Losh 
---
 bsd-user/main.c | 40 
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index 798aba512c..455b8eddab 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -150,13 +150,13 @@ void cpu_loop(CPUX86State *env)
 abi_ulong pc;
 //target_siginfo_t info;
 
-for(;;) {
+for (;;) {
 cpu_exec_start(cs);
 trapnr = cpu_exec(cs);
 cpu_exec_end(cs);
 process_queued_cpu_work(cs);
 
-switch(trapnr) {
+switch (trapnr) {
 case 0x80:
 /* syscall from int $0x80 */
 if (bsd_type == target_freebsd) {
@@ -345,7 +345,7 @@ void cpu_loop(CPUX86State *env)
 {
 int sig;
 
-sig = gdb_handlesig (env, TARGET_SIGTRAP);
+sig = gdb_handlesig(env, TARGET_SIGTRAP);
 if (sig)
   {
 info.si_signo = sig;
@@ -398,7 +398,7 @@ static inline void save_window_offset(CPUSPARCState *env, 
int cwp1)
 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
sp_ptr, cwp1);
 #endif
-for(i = 0; i < 16; i++) {
+for (i = 0; i < 16; i++) {
 /* FIXME - what to do if put_user() fails? */
 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
 sp_ptr += sizeof(abi_ulong);
@@ -448,7 +448,7 @@ static void restore_window(CPUSPARCState *env)
 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
sp_ptr, cwp1);
 #endif
-for(i = 0; i < 16; i++) {
+for (i = 0; i < 16; i++) {
 /* FIXME - what to do if get_user() fails? */
 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
 sp_ptr += sizeof(abi_ulong);
@@ -468,7 +468,7 @@ static void flush_windows(CPUSPARCState *env)
 int offset, cwp1;
 
 offset = 1;
-for(;;) {
+for (;;) {
 /* if restore would invoke restore_window(), then we can stop */
 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
 #ifndef TARGET_SPARC64
@@ -648,11 +648,11 @@ void cpu_loop(CPUSPARCState *env)
 #ifdef TARGET_SPARC64
 badtrap:
 #endif
-printf ("Unhandled trap: 0x%x\n", trapnr);
+printf("Unhandled trap: 0x%x\n", trapnr);
 cpu_dump_state(cs, stderr, 0);
-exit (1);
+exit(1);
 }
-process_pending_signals (env);
+process_pending_signals(env);
 }
 }
 
@@ -825,15 +825,15 @@ int main(int argc, char **argv)
 } else if (!strcmp(r, "cpu")) {
 cpu_model = argv[optind++];
 if (is_help_option(cpu_model)) {
-/* XXX: implement xxx_cpu_list for targets that still miss it */
+/* XXX: implement xxx_cpu_list for targets that still miss it 
*/
 #if defined(cpu_list)
-cpu_list();
+cpu_list();
 #endif
 exit(1);
 }
 } else if (!strcmp(r, "B")) {
-   guest_base = strtol(argv[optind++], NULL, 0);
-   have_guest_base = true;
+guest_base = strtol(argv[optind++], NULL, 0);
+have_guest_base = true;
 } else if (!strcmp(r, "drop-ld-preload")) {
 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
 } else if (!strcmp(r, "bsd")) {
@@ -958,7 +958,7 @@ int main(int argc, char **argv)
 }
 }
 
-if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
+if (loader_exec(filename, argv + optind, target_environ, regs, info) != 0) 
{
 printf("Error loading %s\n", filename);
 _exit(1);
 }
@@ -1053,8 +1053,8 @@ int main(int argc, char **argv)
 env->idt.limit = 255;
 #endif
 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
-PROT_READ|PROT_WRITE,
-MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
+PROT_READ | PROT_WRITE,
+MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
 idt_table = g2h_untagged(env->idt.base);
 set_idt(0, 0);
 set_idt(1, 0);
@@ -1082,8 +1082,8 @@ int main(int argc, char **argv)
 {
 uint64_t *gdt_table;
 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
-PROT_READ|PROT_WRITE,
-MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
+PROT_READ | PROT_WRITE,
+MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
 gdt_table = g2h_untagged(env->gdt.base);
 #ifdef TARGET_ABI32
@@ -1123,9 +1123,9 @@ int main(int argc, char **argv)
 env->pc = regs->pc;
 env->npc = regs->npc;
 

[PULL 00/24] bsd-user style and reorg patches

[imp]

From: Warner Losh 

Greetings,

This series starts to cleanup bsd-user. The current checkpatch.pl output is on
the order of 4500 lines long. These cleanups don't fix everything (there's still
plenty of errors, even in some of the files the patches touch). I've tried to
make things better in every case, but be advised that checkpatch.pl is unhappy
with many of the files still in the first 15 commits. I do plan on addressing
the issues in the future as I need to make real commits to those files. The
changes were ones that were trivial to do with scripts that I had to do for
main.c anyway. main.c is now completely clean. All the cleanup I've done
myself, and at the end of this patch trail the output is only 3500 lines...

Next, I've started to reorg the bsd-user sources. There's really 4 BSDs in the
wild (FreeBSD, NetBSD, OpenBSD and Dragonfly) that these could, in theory,
target. In the bsd-user branch, we've broken the emulation of these apart. It
largely preserves the other BSD's as is, and greatly expands FreeBSD so that we
can do package builds in user-land emulation. The other BSDs have not been
run-time tested, though the CI tooling builds some of them. It's my belief that
in the current state, even an old-school cat(1) would fail, though I am to fix
that at least for FreeBSD...

We've also added a number of other architectures than sparc and i386. Those
additions, though, are dependent on other things not yet reshuffled and or
merged, so they will be coming along in due time: mips (32 and 64 bit), arm,
aarch64 and riscv willl come in due time. powerpc might, but it's in a frightful
state. I'm open to other BSDs that wish to work along with me as well, though it
may be best to wait until after future patch sets as much is still set to
change. CHERI and related work may also happen, but that's still TBD.

In this installement, after the style stuff, I've created a
target_arch_cpu.h. Here, all the functions related to the cpu loop and similar
things are moved into there on a per-architecture basis to start to tame the
number of #ifdefs in mail. Linux-user did a similar thing years after we had
done it in the repo, and a number of different choices were made. Rather than
redo all the work from the bsd-user repo, I'm recreating / rebasing it on a
current qemu. Future patch series will address other aspects. Once they are
complete, we can look, potentially, at any refactoring between linux-user and
bsd-user. I very much explicitly want to push that to the end because otherwise
I'm completely recreating a lot of the work on the bsd-user branch rather than
just transitioning it forward to a newer qemu. This reorg was started by Stacey
Son and I've redone it with the latest code. I've added his signoff (with his
blanket permission) to those commits. Also, all of these commits pass
checkpatch.pl

Please let me know what you think, and how I might structure future patches if
there's ways I can do them better. I've switched to pull-requests with this 
series
since it will be easier to keep track of, especially in the future.

Warner

P.S. This has no relevance to 6.0 at all: we're too late and this feature
isn't fully integrated by this patch trail.

The following changes since commit 9950da284fa5e2ea9ab57d87e05b693fb60c79ce:

  Merge remote-tracking branch 
'remotes/alistair/tags/pull-riscv-to-apply-20210322-2' into staging (2021-03-23 
15:30:46 +)

are available in the Git repository at:

  https://gitlab.com/bsdimp/qemu.git tags/pull-request-2021-04-23

for you to fetch changes up to cc6e9793094f5207509bb74b90854a89195d22db:

  bsd-user: move sparc cpu_loop into target_arch_cpu.h as target_cpu_loop 
(2021-04-23 13:13:13 -0600)


April 23, 2021 bsd-user update

Style changes to reduce checkpatch whinage (much more needed as only some issues
globally and all issues in main.c have been address, other files need much 
love).

Start to reorg so we can bring in all the work from the bsd-user repo.


Warner Losh (24):
  bsd-user: whitespace changes
  bsd-user: whitespace changes
  bsd-user: whitespace changes
  bsd-user: style tweak: keyword space (
  bsd-user: style tweak: keyword space (
  bsd-user: style tweak: keyword space (
  bsd-user: style tweak: keyword space (
  bsd-user: style tweak: use C not C++ comments
  bsd-user: style tweak: use C not C++ comments
  bsd-user: style tweak: use C not C++ comments
  bsd-user: style tweak: if 0 -> ifdef notyet for code needed in future
  bsd-user: style tweak: if 0 -> ifdef notyet for code needed in future
  bsd-user: style tweak: if 0 -> ifdef notyet for code needed in future
  bsd-user: style tweak: if 0 -> ifdef notyet for code needed in future
  bsd-user: Fix commentary issues
  bsd-user: Use preferred block comments
  bsd-user: move extern to header file
  bsd-user: style changes for {}
  bsd-user: use qemu_strtol in preference to 

Re: [PULL 0/2] pc: last minute bugfixes

[Michael S. Tsirkin]

On Fri, Apr 23, 2021 at 09:53:01AM +0100, Peter Maydell wrote:
> On Thu, 22 Apr 2021 at 23:24, Michael S. Tsirkin  wrote:
> >
> > The following changes since commit d83f46d189a26fa32434139954d264326f199a45:
> >
> >   virtio-pci: compat page aligned ATS (2021-04-06 07:11:36 -0400)
> >
> > are available in the Git repository at:
> >
> >   git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
> >
> > for you to fetch changes up to 9106db1038bf3db5e4f8007038b3a1962018fa07:
> >
> >   x86: acpi: use offset instead of pointer when using build_header() 
> > (2021-04-22 18:22:01 -0400)
> >
> > 
> > pc: last minute bugfixes
> >
> > Two bugfixes - both seem pretty obvious and safe ...
> >
> > Signed-off-by: Michael S. Tsirkin 
> >
> > 
> 
> Come on, you should know the rules by now. Any pullrequest at this
> point needs to have a detailed justification in the cover letter of
> why it is such a release critical bug that we need to roll a new
> release candidate and delay the release for it.
> 
> thanks
> -- PMM

Hmm sorry, I was a bit rushed.
acpi one fixes a regression but not one in a recent release.
amd one is not.

Bottom line let's just defer this till after the release.

-- 
MST

Re: [PATCH v6] qapi: introduce 'query-cpu-model-cpuid' action

[Eduardo Habkost]

On Thu, Apr 22, 2021 at 12:02:15PM +0300, Valeriy Vdovin wrote:
> On Wed, Apr 21, 2021 at 04:17:59PM -0400, Eduardo Habkost wrote:
> > On Wed, Apr 21, 2021 at 08:39:42PM +0300, Valeriy Vdovin wrote:
> > > On Tue, Apr 20, 2021 at 01:09:00PM -0400, Eduardo Habkost wrote:
> > > > On Tue, Apr 20, 2021 at 07:19:40PM +0300, Valeriy Vdovin wrote:
> > > > [...]
> > > > > +##
> > > > > +# @query-cpu-model-cpuid:
> > > > > +#
> > > > > +# Returns description of a virtual CPU model, created by QEMU after 
> > > > > cpu
> > > > > +# initialization routines. The resulting information is a reflection 
> > > > > of a parsed
> > > > > +# '-cpu' command line option, filtered by available host cpu 
> > > > > features.
> > > > > +#
> > > > > +# Returns:  @CpuModelCpuidDescription
> > > > > +#
> > > > > +# Example:
> > > > > +#
> > > > > +# -> { "execute": "query-cpu-model-cpuid" }
> > > > > +# <- { "return": 'CpuModelCpuidDescription' }
> > > > > +#
> > > > > +# Since: 6.1
> > > > > +##
> > > > > +{ 'command': 'query-cpu-model-cpuid',
> > > > > +  'returns': 'CpuModelCpuidDescription',
> > > > > +  'if': 'defined(TARGET_I386)' }
> > > > 
> > > > I was assuming the command was going to get a CPU model name as
> > > > argument.
> > > > 
> > > > If you are only going to return info on the current CPUs, the
> > > > interface could be simplified a lot.
> > > > 
> > > > What about a simple `query-cpuid` command that only takes:
> > > > 
> > > >  { 'qom-path': 'str', # qom-path is returned by query-cpus-fast
> > > >'eax': 'uint32',
> > > >'*ecx': 'uint32' }
> > > > 
> > > > as argument, and returns
> > > > 
> > > >  { 'present': 'bool',
> > > >'max_eax': 'uint32',# max value of EAX for this range
> > > >'*max_ecx': 'uint32',   # max value of ECX if there are subleaves
> > > >'eax': 'uint32',
> > > >'ebx': 'uint32',
> > > >'ecx': 'uint32',
> > > >'edx': 'uint32' }
> > > > 
> > > > ?
> > > Hi. The interface that you suggest looks good. But it has one critical
> > > point that deems it unusable for our initial needs. The point of this
> > > whole new API is to take away the strain of knowing about leaf ranges
> > > from the caller of this API. In my current patch this goal works. So
> > > the caller does not need to know in advance what ranges there are in
> > > original CPUID as well as in it's tweaked QEMU's version.
> > >
> > 
> > Raw CPUID data is a pretty low level interface, already.  Is it
> > really too much of a burden for callers to know that CPUID ranges
> > start at 0, 0x4000, 0x8000, and 0xC000?
> > 
> > (Especially considering that it would save us ~100 extra lines of
> > C code and maybe 50-100 extra lines of QAPI schema code.)
> > 
> > 
> > > But you suggested API is not so kind to the caller, so he would need
> > > to add some logic around the call that knows about exact leaf ranges.
> > > If you have a solution to that also, I'll be happy to discuss it.
> > 
> > Would be following (Python-like pseudocode) be too much of a
> > burden for consumers of the command?
> > 
> > for start in (0, 0x4000, 0x8000, 0xC000):
> > leaf = query_cpuid(qom_path, start)
> > for eax in range(start, leaf.max_eax + 1):
> > for ecx in range(0, leaf.get('max_ecx', 0) + 1):
> > all_leaves.append(query_cpuid(qom_path, eax, ecx))
> > 
> This is a question of architecture and design. Number of lines is
> secondary (up to some reasonable point of course).
> 
> I want to decouple components as much as possible. It's not a burden to pass
> 4 digits once you know them, but how exactly should a caller come to these 4 
> digits? It's like a password. It's easy once you know it. Check out Intel's
> Instruction Set Manual on CPUID - obvious place to learn about ranges for the
> caller, yet you wont see exactly these numbers in plain text. And where is 
> 0x4000 in this manual exactly? One should read QEMU git history to know 
> what it is. Correct me here if I'm wrong.
> 
> The work of figuring out the required ranges should not be duplicated without
> need. QEMU does that already, there is a nice way of passing them to the 
> caller,
> and it makes component interaction more generic (no private knowledge pased),
> so why not do that.
> 
> Please take into account the design of applications that will use this
> method. With less restrictive API, components could be more isolated, for
> example one component could only know how to call qmp methods, the other would
> have to khow how to process CPUID data, resulting in a clean layered 
> architecture.

Raw CPUID data is pretty low level x86 detail.  You are asking
for low level data to be exported, but you are asking for that
data to be exported in a nice package that doesn't require
knowledge of low level x86 details.

I understand how that could be nice and useful.  I'm not sure
this is QEMU's job, though.

If exporting the raw CPUID data in a nice self-contained format
is so important for