[PATCH] ui/spice: Use HAVE_SPICE_GL for OpenGL checks
Some code in ui/spice used CONFIG_OPENGL for OpenGL conditionals, but
SPICE also depends on CONFIG_GBM and SPICE server whose version is
0.13.1 or later for OpenGL. Always use HAVE_SPICE_GL, which defines the
precise condition.
Signed-off-by: Akihiko Odaki
---
ui/spice-app.c | 3 ++-
ui/spice-core.c | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/ui/spice-app.c b/ui/spice-app.c
index 641f4a9d53e..7e71e18da9a 100644
--- a/ui/spice-app.c
+++ b/ui/spice-app.c
@@ -27,6 +27,7 @@
#include
#include "ui/console.h"
+#include "ui/spice-display.h"
#include "qemu/config-file.h"
#include "qemu/option.h"
#include "qemu/cutils.h"
@@ -175,7 +176,7 @@ static void spice_app_display_early_init(DisplayOptions
*opts)
qemu_opt_set(qopts, "addr", sock_path, _abort);
qemu_opt_set(qopts, "image-compression", "off", _abort);
qemu_opt_set(qopts, "streaming-video", "off", _abort);
-#ifdef CONFIG_OPENGL
+#ifdef HAVE_SPICE_GL
qemu_opt_set(qopts, "gl", opts->has_gl ? "on" : "off", _abort);
display_opengl = opts->has_gl;
#endif
diff --git a/ui/spice-core.c b/ui/spice-core.c
index 86d43783aca..0371055e6c1 100644
--- a/ui/spice-core.c
+++ b/ui/spice-core.c
@@ -1039,6 +1039,6 @@ static void spice_register_config(void)
opts_init(spice_register_config);
module_opts("spice");
-#ifdef CONFIG_OPENGL
+#ifdef HAVE_SPICE_GL
module_dep("ui-opengl");
#endif
--
2.30.1 (Apple Git-130)
[PATCH] ui/egl-headless: Remove a check for CONFIG_OPENGL
ui/egl-headless is only built when CONFIG_OPENGL is defined because it
depends on CONFIG_OPENGL without condition. Remove a redundant
conditonal in ui/egl-headless.c
Signed-off-by: Akihiko Odaki
---
ui/egl-headless.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/ui/egl-headless.c b/ui/egl-headless.c
index 75404e0e870..a26a2520c49 100644
--- a/ui/egl-headless.c
+++ b/ui/egl-headless.c
@@ -214,6 +214,4 @@ static void register_egl(void)
type_init(register_egl);
-#ifdef CONFIG_OPENGL
module_dep("ui-opengl");
-#endif
--
2.30.1 (Apple Git-130)
Re: [PATCH v3 1/3] msix/hmp: add hmp interface to dump MSI-X info
Dongli Zhang writes: > This patch is to add the HMP interface to dump MSI-X table and PBA, in > order to help diagnose the loss of IRQ issue in VM (e.g., if an MSI-X > vector is erroneously masked permanently). Here is the example with > vhost-scsi: > > (qemu) info msix /machine/peripheral/vscsi0 > Msg L.Addr Msg U.Addr Msg Data Vect Ctrl > 0xfee0 0x 0x4041 0x > 0xfee0 0x 0x4051 0x > 0xfee0 0x 0x4061 0x > 0xfee0 0x 0x4071 0x > 0xfee01000 0x 0x40b1 0x > 0xfee02000 0x 0x40c1 0x > 0xfee03000 0x 0x40d1 0x > > MSI-X PBA > 0 0 0 0 0 0 0 > > Since the number of MSI-X entries is not determined and might be very > large, it is sometimes inappropriate to dump via QMP. Why? What makes HMP different? > Therefore, this patch dumps MSI-X information only via HMP, which is > similar to the implementation of hmp_info_mem(). > > Cc: Jason Wang > Cc: Joe Jin > Signed-off-by: Dongli Zhang > Acked-by: Dr. David Alan Gilbert > Acked-by: Jason Wang
Re: [PATCH 1/4] configure: Fix --without-default-features propagation to meson
Philippe Mathieu-Daudé writes: > +Alex > > On 7/13/21 11:31 AM, Thomas Huth wrote: >> A typo prevents that many features get disabled when the user >> runs "configure" with the --without-default-features switch. >> >> Reported-by: Cole Robinson >> Signed-off-by: Thomas Huth >> --- >> configure | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/configure b/configure >> index 85db248ac1..229ea52516 100755 >> --- a/configure >> +++ b/configure >> @@ -5205,7 +5205,7 @@ if test "$skip_meson" = no; then >> -Ddocs=$docs -Dsphinx_build=$sphinx_build -Dinstall_blobs=$blobs \ >> -Dvhost_user_blk_server=$vhost_user_blk_server >> -Dmultiprocess=$multiprocess \ >> -Dfuse=$fuse -Dfuse_lseek=$fuse_lseek >> -Dguest_agent_msi=$guest_agent_msi -Dbpf=$bpf\ >> -$(if test "$default_features" = no; then echo >> "-Dauto_features=disabled"; fi) \ >> +$(if test "$default_feature" = no; then echo >> "-Dauto_features=disabled"; fi) \ > > The option should be name plural (default_features)... Actually, no. The variable holds the initial value for the feature variables that are to be controlled by --with-default-features. Example: vde="$default_feature" Perhaps $feature_default would be a better name. > What is 'auto_features' used for? > >> -Dtcg_interpreter=$tcg_interpreter \ >> $cross_arg \ >> "$PWD" "$source_path" >>
Re: [PATCH v2 4/5] hw/nvme: fix mmio read
On Jul 14 00:18, Philippe Mathieu-Daudé wrote:
> On 7/13/21 9:24 PM, Klaus Jensen wrote:
> > From: Klaus Jensen
> >
> > The new PMR test unearthed a long-standing issue with MMIO reads on
> > big-endian hosts.
> >
> > Fix this by unconditionally storing all controller registers in little
> > endian.
> >
> > Cc: Gollu Appalanaidu
> > Reported-by: Peter Maydell
> > Signed-off-by: Klaus Jensen
> > ---
> > hw/nvme/ctrl.c | 304 -
> > 1 file changed, 174 insertions(+), 130 deletions(-)
> >
> > diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
> > index 0449cc4dee9b..ddac9344a74e 100644
> > --- a/hw/nvme/ctrl.c
> > +++ b/hw/nvme/ctrl.c
> > @@ -439,10 +439,12 @@ static uint8_t nvme_sq_empty(NvmeSQueue *sq)
> >
> > static void nvme_irq_check(NvmeCtrl *n)
> > {
> > +uint32_t intms = le32_to_cpu(n->bar.intms);
> > +
> > if (msix_enabled(&(n->parent_obj))) {
> > return;
> > }
> > -if (~n->bar.intms & n->irq_status) {
> > +if (~intms & n->irq_status) {
> > pci_irq_assert(>parent_obj);
> > } else {
> > pci_irq_deassert(>parent_obj);
> > @@ -1289,7 +1291,7 @@ static void nvme_post_cqes(void *opaque)
> > if (ret) {
> > trace_pci_nvme_err_addr_write(addr);
> > trace_pci_nvme_err_cfs();
> > -n->bar.csts = NVME_CSTS_FAILED;
> > +n->bar.csts = cpu_to_le64(NVME_CSTS_FAILED);
>
> The load/store API is safer than the cpu_to_X() one because
> it removes alignment problems. Here it becomes:
>
>stq_le_p(>bar.csts, NVME_CSTS_FAILED);
>
> > break;
> > }
> > QTAILQ_REMOVE(>req_list, req, entry);
> > @@ -4022,7 +4024,7 @@ static uint16_t nvme_create_sq(NvmeCtrl *n,
> > NvmeRequest *req)
> > trace_pci_nvme_err_invalid_create_sq_sqid(sqid);
> > return NVME_INVALID_QID | NVME_DNR;
> > }
> > -if (unlikely(!qsize || qsize > NVME_CAP_MQES(n->bar.cap))) {
> > +if (unlikely(!qsize || qsize >
> > NVME_CAP_MQES(le64_to_cpu(n->bar.cap {
>
> And here:
>
> if (unlikely(!qsize || qsize > NVME_CAP_MQES(ldq_le_p(>bar.cap {
>
> > trace_pci_nvme_err_invalid_create_sq_size(qsize);
> > return NVME_MAX_QSIZE_EXCEEDED | NVME_DNR;
> > }
>
> However for the BAR is likely aligned, so using the cpu_to() API
> shouldn't be a problem until we try to deprecate/remove it.
>
>
Right. It makes sense to use that API for new code - I will amend it :)
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Description: PGP signature
Re: [PATCH v2 2/5] hw/nvme: use symbolic names for registers
On Jul 14 00:21, Philippe Mathieu-Daudé wrote:
> On 7/14/21 12:12 AM, Philippe Mathieu-Daudé wrote:
> > On 7/13/21 9:24 PM, Klaus Jensen wrote:
> >> From: Klaus Jensen
> >>
> >> Add the NvmeBarRegs enum and use these instead of explicit register
> >> offsets.
> >>
> >> Signed-off-by: Klaus Jensen
> >> ---
> >> include/block/nvme.h | 27 +++
> >> hw/nvme/ctrl.c | 44 ++--
> >> 2 files changed, 49 insertions(+), 22 deletions(-)
> >>
> >> diff --git a/include/block/nvme.h b/include/block/nvme.h
> >> index 84053b68b987..082d4bddbf9f 100644
> >> --- a/include/block/nvme.h
> >> +++ b/include/block/nvme.h
> >> @@ -31,6 +31,33 @@ typedef struct QEMU_PACKED NvmeBar {
> >> uint8_t css[484];
> >> } NvmeBar;
> >>
> >> +enum NvmeBarRegs {
> >> +NVME_REG_CAP = 0x0,
> >> +NVME_REG_VS = 0x8,
> >> +NVME_REG_INTMS = 0xc,
> >> +NVME_REG_INTMC = 0x10,
> >> +NVME_REG_CC = 0x14,
> >> +NVME_REG_CSTS= 0x1c,
> >> +NVME_REG_NSSR= 0x20,
> >> +NVME_REG_AQA = 0x24,
> >> +NVME_REG_ASQ = 0x28,
> >> +NVME_REG_ACQ = 0x30,
> >> +NVME_REG_CMBLOC = 0x38,
> >> +NVME_REG_CMBSZ = 0x3c,
> >> +NVME_REG_BPINFO = 0x40,
> >> +NVME_REG_BPRSEL = 0x44,
> >> +NVME_REG_BPMBL = 0x48,
> >> +NVME_REG_CMBMSC = 0x50,
> >> +NVME_REG_CMBSTS = 0x58,
> >> +NVME_REG_PMRCAP = 0xe00,
> >> +NVME_REG_PMRCTL = 0xe04,
> >> +NVME_REG_PMRSTS = 0xe08,
> >> +NVME_REG_PMREBS = 0xe0c,
> >> +NVME_REG_PMRSWTP = 0xe10,
> >> +NVME_REG_PMRMSCL = 0xe14,
> >> +NVME_REG_PMRMSCU = 0xe18,
> >> +};
> >> +
> >> enum NvmeCapShift {
> >> CAP_MQES_SHIFT = 0,
> >> CAP_CQR_SHIFT = 16,
> >> diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
> >> index 28299c6f3764..8c305315f41c 100644
> >> --- a/hw/nvme/ctrl.c
> >> +++ b/hw/nvme/ctrl.c
> >> @@ -5740,7 +5740,7 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr
> >> offset, uint64_t data,
> >> }
> >>
> >> switch (offset) {
> >> -case 0xc: /* INTMS */
> >> +case NVME_REG_INTMS:
> >
> > What about using offsetof(NvmeBar, intms) instead?
>
> BTW I'm not suggesting this is better, I just wonder how we can avoid
> to duplicate the definitions. Alternative is declaring:
>
> enum NvmeBarRegs {
> NVME_REG_CAP = offsetof(NvmeBar, cap),
> NVME_REG_VS = offsetof(NvmeBar, vs),
> ...
>
I like this suggestion!
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Re: About two-dimensional page translation (e.g., Intel EPT) and shadow page table in Linux QEMU/KVM
Dear Sean, Thanks for the comments! > Heh, because the MMUs are all per-vCPU, it actually wouldn't be that much > effort > beyond supporting !TDP and TDP for different VMs... > Sorry, may I know what do you mean by "MMUs are all per-vCPU"? Do you mean the MMUs walk the page tables of each vCPU? > ...but supporting !TDP and TDP in a single KVM instance isn't going to happen. > It's certainly possible, but comes with a very high complexity cost, and > likely > even performance costs. For one KVM instance, I think it might be possible to let several physical cores use !TDP and other cores use TDP but I am not sure about the implementation complexity. > > The more sane way to support !TDP and TDP on a single host would be to support > multiple instances of KVM, e.g. /dev/kvm0, /dev/kvm1, etc... Being able to > use > !TDP and TDP isn't strong justification for the work required, but supporting > multiple KVM instances would allow upgrading KVM without having to migrate VMs > off the host, which is very desirable. If multiple KVM instances are > supported, > running !TDP and TDP KVM instances should Just Work. Yes, for different KVM instances, it may be much easier but there might be some other issues, e.g., communication overhead between different instances. I think the upgrading idea is great but is very limited to local upgrading. Best, Harry
Re: About two-dimensional page translation (e.g., Intel EPT) and shadow page table in Linux QEMU/KVM
Dear Maxim, Thanks for your reply! > For same VM, I don't think it is feasable. > > For multiple VMs make some use NPT/EPT and some don't, > this should be possible to implement. > > Why do you need it? > I am just curious about it :). Best, Harry
RE: [PATCH] migration: Move bitmap_mutex out of migration_bitmap_clear_dirty()
On Tuesday, July 13, 2021 11:59 PM, Peter Xu wrote: > On Tue, Jul 13, 2021 at 08:40:21AM +, Wang, Wei W wrote: > > Didn't get a chance to document it as it's in a pull now; but as long as > you're okay > with no-per-page lock (which I still don't agree with), I can follow this up. > > Are below parameters enough for me to enable free-page-hint? > > -object iothread,id=io1 \ > -device virtio-balloon,free-page-hint=on,iothread=io1 \ > > I tried to verify it's running by tracing inside guest with kprobe > report_free_page_func() but it didn't really trigger. Guest has kernel > 5.11.12-300.fc34.x86_64, should be fairly new to have that supported. Do you > know what I'm missing? Please check if you have the virtio-balloon driver loaded in the guest. > > P.S. This also reminded me that, maybe we want an entry in qemu-options.hx for > balloon device, as it has lots of options, some of them may not be easy to be > setup right. > Sounds good to me. Best, Wei
RE: [PATCH] migration: Move bitmap_mutex out of migration_bitmap_clear_dirty()
On Tuesday, July 13, 2021 6:22 PM, David Hildenbrand wrote: > Can you send an official patch for the free page hinting clean_bmap handling I > reported? > > I can then give both tests in combination a quick test (before/after this > patch > here). > Yes, I'll send, thanks! Best, Wei
Re: [PATCH v2 1/3] hw/net: e1000: Correct the initial value of VET register
在 2021/7/14 上午11:42, Bin Meng 写道:
On Wed, Jul 14, 2021 at 11:10 AM Jason Wang wrote:
在 2021/7/13 下午5:11, Bin Meng 写道:
On Tue, Jul 13, 2021 at 5:02 PM Jason Wang wrote:
在 2021/7/13 下午4:36, Bin Meng 写道:
On Tue, Jul 13, 2021 at 3:03 PM Jason Wang wrote:
在 2021/7/13 上午7:06, Bin Meng 写道:
On Mon, Jul 5, 2021 at 1:57 PM Bin Meng wrote:
On Mon, Jul 5, 2021 at 12:21 PM Jason Wang wrote:
在 2021/7/2 下午5:24, Bin Meng 写道:
From: Christina Wang
The initial value of VLAN Ether Type (VET) register is 0x8100, as per
the manual and real hardware.
While Linux e1000 driver always writes VET register to 0x8100, it is
not always the case for everyone. Drivers relying on the reset value
of VET won't be able to transmit and receive VLAN frames in QEMU.
Reported-by: Markus Carlstedt
Signed-off-by: Christina Wang
Signed-off-by: Bin Meng
---
(no changes since v1)
hw/net/e1000.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/net/e1000.c b/hw/net/e1000.c
index 4f75b44cfc..20cbba6411 100644
--- a/hw/net/e1000.c
+++ b/hw/net/e1000.c
@@ -29,6 +29,7 @@
#include "hw/pci/pci.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
+#include "net/eth.h"
#include "net/net.h"
#include "net/checksum.h"
#include "sysemu/sysemu.h"
@@ -254,6 +255,7 @@ static const uint32_t mac_reg_init[] = {
[MANC]= E1000_MANC_EN_MNG2HOST | E1000_MANC_RCV_TCO_EN |
E1000_MANC_ARP_EN | E1000_MANC_0298_EN |
E1000_MANC_RMCP_EN,
+[VET] = ETH_P_VLAN,
I wonder if we need a compat flag for this, since we change the behavior.
(See e1000_properties[])
No we don't need to since it does not break migration.
Ping?
I admit migration "works" but it doesn't mean it's not broken. It
changes the guest visible default value of VET register, so it may break
things silently for the guest.
For old machine types, we should stick the value to the one without this
fix.
Could you please propose a solution on how to handle such a scenario
in a generic way in QEMU? (+Peter)
Well, I think I've suggested you to have a look at how things is done in
for handling such compatibility in e1000_properties.
The POR reset value is wrong in QEMU and has carried forward the wrong
value for years, and correcting it to its right value needs to do
what?
We should stick to the wrong behavior for old machine types.
That's all.
So that means the following SD patch is also wrong (+Philippe) which
changes the default value of capability register.
http://patchwork.ozlabs.org/project/qemu-devel/patch/20210623185921.24113-1-joanneko...@gmail.com/
It should compat capareg for the old value for old machine types.
Yeah, it's already a property for the SD controller model but someone
views it as a bug because the model implements 64-bit but not
reporting it in the capability register.
Can we get some agreement among maintainers?
It's not about the agreement but about to have a stable ABI. I don't
know the case for sd but e1000 is used in various and we work hard to
unbreak the migration compatibility among downstream versions. Git log
on e1000.c will tell you more.
Agreement or stable ABI, whatever we call, but we should be in some consistency.
IMHO maintainers should reach an agreement to some extent on how
compatibility should be achieved. I just found silly to add a property
to fix a real bug in the model, and we preserve the bug all over
releases.
That's the price for the stable ABI. See one of my recent fix -
d83f46d189 virtio-pci: compat page aligned ATS. It keeps the "buggy"
behavior to unbreak the migration.
I can find plenty of examples in the current QEMU tree that were
accepted that changed the bugous register behavior, but it was not
asked to add new properties to keep the bugos behavior.
e.g.: commit ce8e43760e8e ("hw/net: fsl_etsec: Reverse the RCTRL.RSF logic")
I guess it's simply because fsl_etsec is not used in any
distributions/production environments or the maintainer may just not
notice things like this.
But for e1000(e), we should stick to a stable ABI for consistency.
Otherwise it would be very tricky to fix them after we saw real issues.
We had learnt a lot during the past decade.
Thanks
Regards,
Bin
[Bug 1921082] Re: VM crash when process broadcast MCE
[Expired for QEMU because there has been no activity for 60 days.] ** Changed in: qemu Status: Incomplete => Expired -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1921082 Title: VM crash when process broadcast MCE Status in QEMU: Expired Bug description: When i do memory SRAR test for VM, I meet the following issue: My VM has 16 vCPU, I will inject one UE error to memory which is accessed by VM, Then host MCE is raised and SIGBUS is send to VM, and qemu take control. Qemu will check the broadcast attribute by following cpu_x86_support_mca_broadcast(); Then Qemu may inject MCE to all vCPU, as vCPU is just one process for HOST, we can't guarantee all the vCPUs will enter MCE hander in 1S sync time, and the VM may panic. This issue will be easily fixed by expand monarch_timeout configuration, but the exact monarch_timeout can't be easily got, as it will depand on the num of vCPUs and current system schedule status. I am wondering why VM need broadcast attribute for MCE, When qeme process MCE event form host, it will always be signaled for one vCPU? If so, why does qemu need boradcast the MCE event to all vCPUs? Can weu just deliver LMCE to one specifc vCPU and make this behavior default? If anything wrong, Please point out. To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1921082/+subscriptions
[Bug 1918084] Re: Build fails on macOS 11.2.2
[Expired for QEMU because there has been no activity for 60 days.] ** Changed in: qemu Status: Incomplete => Expired -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1918084 Title: Build fails on macOS 11.2.2 Status in QEMU: Expired Bug description: Hi, I got the latest version from git. I have pre-compiled the dependency libraries. All good. configure creates the necessary files. When I build I got the following error: [1368/6454] Compiling C object libcapstone.a.p/capstone_arch_AArch64_AArch64InstPrinter.c.o ninja: build stopped: subcommand failed. make[1]: *** [run-ninja] Error 1 make: *** [all] Error 2 I've ran make as make -j 8 original config: PKG_CONFIG_PATH="$SERVERPLUS_DIR/dependencies/glib/lib/pkgconfig:$SERVERPLUS_DIR/dependencies/pixman/lib/pkgconfig:$SERVERPLUS_DIR/dependencies/cyrus- sasl/lib/pkgconfig" ./configure --prefix="$SERVERPLUS_DIR" --enable- hvf --enable-cocoa --enable-vnc-sasl --enable-auth-pam --ninja=/opt/build/build/stage/tools/ninja/ninja --python="$SERVERPLUS_DIR/dependencies/python/bin/python3" --enable- bsd-user if I build with --target-list=x86_64-softmmu then it will build but I will get only the x86_64 QEMU built. With 5.0 I could build all emulators. $SERVERPLUS_DIR is my target dir. Thanks, Eddy To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1918084/+subscriptions
[Bug 1920211] Re: shrink option for discard (for bad host-filesystems and -backup solutions)
[Expired for QEMU because there has been no activity for 60 days.] ** Changed in: qemu Status: Incomplete => Expired -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1920211 Title: shrink option for discard (for bad host-filesystems and -backup solutions) Status in QEMU: Expired Bug description: When using discard=unmap for virtio or scsi devices with QCOW2 images, space discarded by the guest will be unmaped on the host, which is basically great! This will turn the QCOW2 image into a sparse file which is efficient for most scenarios. But it may be that you need to avoid big sparse files on your host. For example because you need to use a backup solution which doesn't support sparse files well. Or maybe the QCOW2 image is on a filesystem mount which doesn't support sparse files at all. For those scenarios an alternative option for the discard setting (discard=shrink) would be great, so that the QCOW2 file itself gets shrunken again. I'm not sure about how the initial growing* of QCOW2 images is implemented and if there are maybe limitations. But I hope it may be possible do the inverse and actually shrink (not sparse) an QCOW2 image with internally discarded blocks. I'm using Qemu-5.2.0 and Linux >= 5.3 (host and guest). *If you use "qemu-img create -f qcow2 ..." withOUT the "preallocation" option. To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1920211/+subscriptions
[Bug 1918149] Re: qemu-user reports wrong fault_addr in signal handler
[Expired for QEMU because there has been no activity for 60 days.] ** Changed in: qemu Status: Incomplete => Expired -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1918149 Title: qemu-user reports wrong fault_addr in signal handler Status in QEMU: Expired Bug description: When a SEGV signal occurs and si_addr of the info struct is nil, qemu still tries to translate the address from host to guest (handle_cpu_signal in accel/tcg/user-exec.c). This means, that the actual signal handler, will receive a fault_addr that is something like 0xbf709000. I was able to get this to happen, by branching to a non canonical address on aarch64. I used 5.2 (commit: 553032db17). However, building from source, this only seems to happen, if I use the same configure flags as the debian build: ../configure --static --target-list=aarch64-linux-user --disable- system --enable-trace-backends=simple --disable-linux-io-uring --disable-pie --extra-cflags="-fstack-protector-strong -Wformat -Werror=format-security -Wdate-time -D_FORTIFY_SOURCE=2" --extra- ldflags="-Wl,-z,relro -Wl,--as-needed" Let me know, if you need more details. To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1918149/+subscriptions
[Bug 1920871] Re: netperf UDP_STREAM high packet loss on QEMU tap network
[Expired for QEMU because there has been no activity for 60 days.] ** Changed in: qemu Status: Incomplete => Expired -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1920871 Title: netperf UDP_STREAM high packet loss on QEMU tap network Status in QEMU: Expired Bug description: Hi, I boot a guest with "-netdev tap,id=hn0,vhost=off,br=br0,helper=/usr/local/libexec/qemu-bridge- helper" network option, and using "netperf -H IP -t UDP_STREAM" to test guest UDP performance, I got the following output: Socket Message Elapsed Messages SizeSize Time Okay Errors Throughput bytes bytessecs# # 10^6bits/sec 212992 65507 10.00 144710 07583.56 212992 10.00 32 1.68 We can find most of UDP packets are lost. But I test another host machine or use "-netdev usr,x". I can got: Socket Message Elapsed Messages SizeSize Time Okay Errors Throughput bytes bytessecs# # 10^6bits/sec 212992 65507 10.00 18351 0 961.61 212992 10.00 18350961.56 most of UDP packets are recived. And If we check the tap qemu used, we can see: ifconfig tap0 tap0: flags=4419 mtu 1500 inet6 fe80::ecc6:21ff:fe6f:b174 prefixlen 64 scopeid 0x20 ether ee:c6:21:6f:b1:74 txqueuelen 1000 (Ethernet) RX packets 282 bytes 30097 (29.3 KiB) RX errors 0 dropped 0 overruns 0 frame 0 TX packets 9086214 bytes 12731596673 (11.8 GiB) TX errors 0 dropped 16349024 overruns 0 carrier 0 collisions 0 lots of TX packets are dropped. list other packet size: ➜ boot netperf -H 192.168.199.200 -t UDP_STREAM -- -m 1 MIGRATED UDP STREAM TEST from 0.0.0.0 (0.0.0.0) port 0 AF_INET to 192.168.199.200 () port 0 AF_INET Socket Message Elapsed Messages SizeSize Time Okay Errors Throughput bytes bytessecs# # 10^6bits/sec 212992 1 10.00 2297941 0 1.84 212992 10.00 1462024 1.17 ➜ boot netperf -H 192.168.199.200 -t UDP_STREAM -- -m 128 MIGRATED UDP STREAM TEST from 0.0.0.0 (0.0.0.0) port 0 AF_INET to 192.168.199.200 () port 0 AF_INET Socket Message Elapsed Messages SizeSize Time Okay Errors Throughput bytes bytessecs# # 10^6bits/sec 212992 128 10.00 2311547 0 236.70 212992 10.00 1359834139.25 To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1920871/+subscriptions
[Bug 1921280] Re: OpenIndiana stuck in boot loop when using hvf
[Expired for QEMU because there has been no activity for 60 days.] ** Changed in: qemu Status: Incomplete => Expired -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1921280 Title: OpenIndiana stuck in boot loop when using hvf Status in QEMU: Expired Bug description: I'm using QEMU version 5.2.0 on macOS, and running the "OpenIndiana Hipster 2020.10 Text Install DVD (64-bit x86)" ISO: qemu-system-x86_64 -cdrom ~/Downloads/OI-hipster-text-20201031.iso -m 2048 -accel hvf -cpu host It gets to "Booting...", stays there for a bit, and then restarts. To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1921280/+subscriptions
[Bug 1921444] Re: Q35 doesn't support to hot add the 2nd PCIe device to KVM guest
[Expired for QEMU because there has been no activity for 60 days.] ** Changed in: qemu Status: Incomplete => Expired -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1921444 Title: Q35 doesn't support to hot add the 2nd PCIe device to KVM guest Status in QEMU: Expired Bug description: KVM: https://git.kernel.org/pub/scm/virt/kvm/kvm.git branch: next, commit: 4a98623d Qemu: https://git.qemu.org/git/qemu.git branch: master, commit: 9e2e9fe3 Created a KVM guest with Q35 chipset, and try to hot add 2 PCIe device to guest with qemu internal command device_add, the 1st device can be added successfully, but the 2nd device failed to hot add. If guest chipset is legacy i440fx, the 2 device can be added successfully. 1. Enable VT-d in BIOS 2. load KVM modules in Linux OS: modprobe kvm; modprobe kvm_intel 3. Bind 2 device to vfio-pci echo :b1:00.0 > /sys/bus/pci/drivers/i40e/unbind echo "8086 1572" > /sys/bus/pci/drivers/vfio-pci/new_id echo :b1:00.1 > /sys/bus/pci/drivers/i40e/unbind echo "8086 1572" > /sys/bus/pci/drivers/vfio-pci/new_id 4. create guest with Q35 chipset: qemu-system-x86_64 --accel kvm -m 4096 -smp 4 -drive file=/home/rhel8.2.qcow2,if=none,id=virtio-disk0 -device virtio-blk-pci,drive=virtio-disk0 -cpu host -machine q35 -device pcie-root-port,id=root1 -daemonize 5. hot add the 1st device to guest successfully in guest qemu monitor "device_add vfio-pci,host=b1:00.0,id=nic0,bus=root1" 6. hot add the 2nd device to guest in guest qemu monitor "device_add vfio-pci,host=b1:00.1,id=nic1,bus=root1" The 2nd device doesn't be added in guest, and the 1st device is removed from guest. Guest partial log: [ 110.452272] pcieport :00:04.0: pciehp: Slot(0): Attention button pressed [ 110.453314] pcieport :00:04.0: pciehp: Slot(0) Powering on due to button press [ 110.454156] pcieport :00:04.0: pciehp: Slot(0): Card present [ 110.454792] pcieport :00:04.0: pciehp: Slot(0): Link Up [ 110.580927] pci :01:00.0: [8086:1572] type 00 class 0x02 [ 110.582560] pci :01:00.0: reg 0x10: [mem 0x-0x007f 64bit pref] [ 110.583453] pci :01:00.0: reg 0x1c: [mem 0x-0x7fff 64bit pref] [ 110.584278] pci :01:00.0: reg 0x30: [mem 0x-0x0007 pref] [ 110.585051] pci :01:00.0: Max Payload Size set to 128 (was 512, max 2048) [ 110.586621] pci :01:00.0: PME# supported from D0 D3hot D3cold [ 110.588140] pci :01:00.0: BAR 0: no space for [mem size 0x0080 64bit pref] [ 110.588954] pci :01:00.0: BAR 0: failed to assign [mem size 0x0080 64bit pref] [ 110.589797] pci :01:00.0: BAR 6: assigned [mem 0xfe80-0xfe87 pref] [ 110.590703] pci :01:00.0: BAR 3: assigned [mem 0xfe00-0xfe007fff 64bit pref] [ 110.592085] pcieport :00:04.0: PCI bridge to [bus 01] [ 110.592755] pcieport :00:04.0: bridge window [io 0x1000-0x1fff] [ 110.594403] pcieport :00:04.0: bridge window [mem 0xfe80-0xfe9f] [ 110.595847] pcieport :00:04.0: bridge window [mem 0xfe00-0xfe1f 64bit pref] [ 110.597867] PCI: No. 2 try to assign unassigned res [ 110.597870] release child resource [mem 0xfe00-0xfe007fff 64bit pref] [ 110.597871] pcieport :00:04.0: resource 15 [mem 0xfe00-0xfe1f 64bit pref] released [ 110.598881] pcieport :00:04.0: PCI bridge to [bus 01] [ 110.600789] pcieport :00:04.0: BAR 15: assigned [mem 0x18000-0x180bf 64bit pref] [ 110.601731] pci :01:00.0: BAR 0: assigned [mem 0x18000-0x1807f 64bit pref] [ 110.602849] pci :01:00.0: BAR 3: assigned [mem 0x18080-0x180807fff 64bit pref] [ 110.604069] pcieport :00:04.0: PCI bridge to [bus 01] [ 110.604941] pcieport :00:04.0: bridge window [io 0x1000-0x1fff] [ 110.606237] pcieport :00:04.0: bridge window [mem 0xfe80-0xfe9f] [ 110.607401] pcieport :00:04.0: bridge window [mem 0x18000-0x180bf 64bit pref] [ 110.653661] i40e: Intel(R) Ethernet Connection XL710 Network Driver [ 110.654443] i40e: Copyright (c) 2013 - 2019 Intel Corporation. [ 110.655314] i40e :01:00.0: enabling device (0140 -> 0142) [ 110.672396] i40e :01:00.0: fw 6.0.48442 api 1.7 nvm 6.01 0x800035b1 1.1747.0 [8086:1572] [8086:0008] [ 110.750054] i40e :01:00.0: MAC address: 3c:fd:fe:c0:59:98 [ 110.751792] i40e :01:00.0: FW LLDP is enabled [ 110.764644] i40e :01:00.0 eth1: NIC Link is Up, 10 Gbps Full Duplex, Flow Control: None [ 110.779390] i40e :01:00.0: PCI-Express: Speed 8.0GT/s Width x8 [ 110.789841] i40e :01:00.0: Features: PF-id[0] VFs: 64 VSIs: 66 QP: 4 RSS FD_ATR FD_SB NTUPLE DCB VxLAN Geneve PTP VEPA [ 111.817553] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
[Bug 1921635] Re: ESP SCSI adapter not working with DOS ASPI drivers
[Expired for QEMU because there has been no activity for 60 days.] ** Changed in: qemu Status: Incomplete => Expired -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1921635 Title: ESP SCSI adapter not working with DOS ASPI drivers Status in QEMU: Expired Bug description: I have been trying to install the DOS ASPI drivers for the ESP scsi card. Both in am53c974 and dc390 modes. Neither works but they don't work in different ways. The following things appear to be problematic: * The am53c974 should work with the PcSCSI drivers (AMSIDA.SYS) but the ASPI driver never manages to get past initializing the card. The VM never continues. * The dc390 ASPI driver fares a little better. The ASPI driver loads and is semi-functional but the drivers for the peripherals don't work. - ASPI.SYS (creative name) loads - TRMDISK.SYS fails to load when a cd-drive is attached and will crashs scanning the scsi-id where the cd drive is attached - TRMDISK.SYS loads without a CD drive attached but fails to read any scsi-hd devices attached. The TFDISK.EXE formatter crashes. - TRMCD.SYS loads, but can not detect any CD drives. The various permutations: am53c974 hang on ASPI driver load: (CD only attached) ~/src/qemu/build/qemu-system-i386 -m 64 -device am53c974,id=scsi0 -device scsi-cd,drive=drive0,bus=scsi0.0,channel=0,scsi-id=0,lun=0 -drive file=../Windows\ 98\ Second\ Edition.iso,if=none,id=drive0 -vga cirrus -fda am53c974_aspi.img -bios /home/hp/src/seabios/out/bios.bin -boot a -trace 'scsi*' -trace 'esp*' -D log dc390 crash because of CDROM attachment and loading TRMDISK.SYS (Only CD attached) ~/src/qemu/build/qemu-system-i386 -m 64 -device dc390,id=scsi0,rombar=0 -device scsi-cd,drive=drive0,bus=scsi0.0,channel=0,scsi-id=0,lun=0 -drive file=../Windows\ 98\ Second\ Edition.iso,if=none,id=drive0 -vga cirrus -fda dc390_all.img -bios /home/hp/src/seabios/out/bios.bin -boot a -trace 'scsi*' -trace 'esp*' -D log dc390 successful boot, but TRMDISK.SYS not working (TFDISK.EXE will crash) ~/src/qemu/build/qemu-system-i386 -m 64 -device dc390,id=scsi0 -device scsi-hd,drive=drive0,bus=scsi0.0,channel=0,scsi-id=0,lun=0,logical_block_size=512 -drive file=small.qcow2,if=none,id=drive0 -vga cirrus -fda dc390_all.img -bios /home/hp/src/seabios/out/bios.bin -boot a -trace 'scsi*' -trace 'esp*' -D log dc390 successful boot, TRMDISK.SYS not loaded, only TRMCD.SYS. CDROM not detected ~/src/qemu/build/qemu-system-i386 -m 64 -device dc390,id=scsi0,rombar=0 -device scsi-cd,drive=drive0,bus=scsi0.0,channel=0,scsi-id=0,lun=0 -drive file=../Windows\ 98\ Second\ Edition.iso,if=none,id=drive0 -vga cirrus -fda dc390_cd.img -bios /home/hp/src/seabios/out/bios.bin -boot a -trace 'scsi*' -trace 'esp*' -D log All of these tests were done on 7b9a3c9f94bcac23c534bc9f42a9e914b433b299 as well as the 'esp-next' branch found here: https://github.com/mcayland/qemu/tree/esp-next The bios file is a seabios master with all int13 support disabled. With it enabled even less works but I figured this would be a seabios bug and not a qemu one. The actual iso and qcow2 files used don't appear the matter. the 'small.qcow2' is an empty drive of 100MB. I have also tried other ISOs in the CD drives, or even not put any cd in the drives with the same results. I will attach all of the above images. To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1921635/+subscriptions
Re: [PATCH v2 1/3] hw/net: e1000: Correct the initial value of VET register
On Wed, Jul 14, 2021 at 11:10 AM Jason Wang wrote:
>
>
> 在 2021/7/13 下午5:11, Bin Meng 写道:
> > On Tue, Jul 13, 2021 at 5:02 PM Jason Wang wrote:
> >>
> >> 在 2021/7/13 下午4:36, Bin Meng 写道:
> >>> On Tue, Jul 13, 2021 at 3:03 PM Jason Wang wrote:
> 在 2021/7/13 上午7:06, Bin Meng 写道:
> > On Mon, Jul 5, 2021 at 1:57 PM Bin Meng wrote:
> >> On Mon, Jul 5, 2021 at 12:21 PM Jason Wang wrote:
> >>> 在 2021/7/2 下午5:24, Bin Meng 写道:
> From: Christina Wang
>
> The initial value of VLAN Ether Type (VET) register is 0x8100, as per
> the manual and real hardware.
>
> While Linux e1000 driver always writes VET register to 0x8100, it is
> not always the case for everyone. Drivers relying on the reset value
> of VET won't be able to transmit and receive VLAN frames in QEMU.
>
> Reported-by: Markus Carlstedt
> Signed-off-by: Christina Wang
> Signed-off-by: Bin Meng
> ---
>
> (no changes since v1)
>
> hw/net/e1000.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/hw/net/e1000.c b/hw/net/e1000.c
> index 4f75b44cfc..20cbba6411 100644
> --- a/hw/net/e1000.c
> +++ b/hw/net/e1000.c
> @@ -29,6 +29,7 @@
> #include "hw/pci/pci.h"
> #include "hw/qdev-properties.h"
> #include "migration/vmstate.h"
> +#include "net/eth.h"
> #include "net/net.h"
> #include "net/checksum.h"
> #include "sysemu/sysemu.h"
> @@ -254,6 +255,7 @@ static const uint32_t mac_reg_init[] = {
> [MANC]= E1000_MANC_EN_MNG2HOST | E1000_MANC_RCV_TCO_EN |
> E1000_MANC_ARP_EN | E1000_MANC_0298_EN |
> E1000_MANC_RMCP_EN,
> +[VET] = ETH_P_VLAN,
> >>> I wonder if we need a compat flag for this, since we change the
> >>> behavior.
> >>>
> >>> (See e1000_properties[])
> >>>
> >> No we don't need to since it does not break migration.
> > Ping?
> I admit migration "works" but it doesn't mean it's not broken. It
> changes the guest visible default value of VET register, so it may break
> things silently for the guest.
>
> For old machine types, we should stick the value to the one without this
> fix.
> >>> Could you please propose a solution on how to handle such a scenario
> >>> in a generic way in QEMU? (+Peter)
> >>
> >> Well, I think I've suggested you to have a look at how things is done in
> >> for handling such compatibility in e1000_properties.
> >>
> >>
> >>> The POR reset value is wrong in QEMU and has carried forward the wrong
> >>> value for years, and correcting it to its right value needs to do
> >>> what?
> >>
> >> We should stick to the wrong behavior for old machine types.
> >>
> >> That's all.
> > So that means the following SD patch is also wrong (+Philippe) which
> > changes the default value of capability register.
> > http://patchwork.ozlabs.org/project/qemu-devel/patch/20210623185921.24113-1-joanneko...@gmail.com/
>
>
> It should compat capareg for the old value for old machine types.
Yeah, it's already a property for the SD controller model but someone
views it as a bug because the model implements 64-bit but not
reporting it in the capability register.
>
>
> >
> > Can we get some agreement among maintainers?
>
>
> It's not about the agreement but about to have a stable ABI. I don't
> know the case for sd but e1000 is used in various and we work hard to
> unbreak the migration compatibility among downstream versions. Git log
> on e1000.c will tell you more.
Agreement or stable ABI, whatever we call, but we should be in some consistency.
IMHO maintainers should reach an agreement to some extent on how
compatibility should be achieved. I just found silly to add a property
to fix a real bug in the model, and we preserve the bug all over
releases.
I can find plenty of examples in the current QEMU tree that were
accepted that changed the bugous register behavior, but it was not
asked to add new properties to keep the bugos behavior.
e.g.: commit ce8e43760e8e ("hw/net: fsl_etsec: Reverse the RCTRL.RSF logic")
Regards,
Bin
Re: [PATCH v2 3/4] qemu-options: tweak to show that CPU count is optional
> The initial CPU count number is not required, if any of the topology
> options are given, since it can be computed.
>
> Reviewed-by: Andrew Jones
> Reviewed-by: Yanan Wang
> Signed-off-by: Daniel P. Berrangé
> ---
> qemu-options.hx | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/qemu-options.hx b/qemu-options.hx
> index 6b72617844..14ff35dd4e 100644
> --- a/qemu-options.hx
> +++ b/qemu-options.hx
> @@ -196,7 +196,7 @@ SRST
> ERST
>
> DEF("smp", HAS_ARG, QEMU_OPTION_smp,
> -"-smp
> [cpus=]n[,maxcpus=cpus][,sockets=sockets][,dies=dies][,cores=cores][,threads=threads]\n"
> +"-smp
> [[cpus=]n][,maxcpus=cpus][,sockets=sockets][,dies=dies][,cores=cores][,threads=threads]\n"
> "set the number of CPUs to 'n' [default=1]\n"
> "maxcpus= maximum number of total CPUs, including\n"
> "offline CPUs for hotplug, etc\n"
> @@ -206,7 +206,7 @@ DEF("smp", HAS_ARG, QEMU_OPTION_smp,
> "threads= number of threads on one CPU core\n",
> QEMU_ARCH_ALL)
> SRST
> -``-smp
> [cpus=]n[,maxcpus=maxcpus][,sockets=sockets][,dies=dies][,cores=cores][,threads=threads]``
> +``-smp
> [[cpus=]n][,maxcpus=maxcpus][,sockets=sockets][,dies=dies][,cores=cores][,threads=threads]``
> Simulate an SMP system with n CPUs. On the PC target, up to 255 CPUs
> are supported. On Sparc32 target, Linux limits the number of usable
> CPUs to 4. For the PC target, the number of cores per die, the
> --
Reviewed-by: Pankaj Gupta
Re: [PATCH v2 1/3] hw/net: e1000: Correct the initial value of VET register
在 2021/7/13 下午5:11, Bin Meng 写道:
On Tue, Jul 13, 2021 at 5:02 PM Jason Wang wrote:
在 2021/7/13 下午4:36, Bin Meng 写道:
On Tue, Jul 13, 2021 at 3:03 PM Jason Wang wrote:
在 2021/7/13 上午7:06, Bin Meng 写道:
On Mon, Jul 5, 2021 at 1:57 PM Bin Meng wrote:
On Mon, Jul 5, 2021 at 12:21 PM Jason Wang wrote:
在 2021/7/2 下午5:24, Bin Meng 写道:
From: Christina Wang
The initial value of VLAN Ether Type (VET) register is 0x8100, as per
the manual and real hardware.
While Linux e1000 driver always writes VET register to 0x8100, it is
not always the case for everyone. Drivers relying on the reset value
of VET won't be able to transmit and receive VLAN frames in QEMU.
Reported-by: Markus Carlstedt
Signed-off-by: Christina Wang
Signed-off-by: Bin Meng
---
(no changes since v1)
hw/net/e1000.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/net/e1000.c b/hw/net/e1000.c
index 4f75b44cfc..20cbba6411 100644
--- a/hw/net/e1000.c
+++ b/hw/net/e1000.c
@@ -29,6 +29,7 @@
#include "hw/pci/pci.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
+#include "net/eth.h"
#include "net/net.h"
#include "net/checksum.h"
#include "sysemu/sysemu.h"
@@ -254,6 +255,7 @@ static const uint32_t mac_reg_init[] = {
[MANC]= E1000_MANC_EN_MNG2HOST | E1000_MANC_RCV_TCO_EN |
E1000_MANC_ARP_EN | E1000_MANC_0298_EN |
E1000_MANC_RMCP_EN,
+[VET] = ETH_P_VLAN,
I wonder if we need a compat flag for this, since we change the behavior.
(See e1000_properties[])
No we don't need to since it does not break migration.
Ping?
I admit migration "works" but it doesn't mean it's not broken. It
changes the guest visible default value of VET register, so it may break
things silently for the guest.
For old machine types, we should stick the value to the one without this
fix.
Could you please propose a solution on how to handle such a scenario
in a generic way in QEMU? (+Peter)
Well, I think I've suggested you to have a look at how things is done in
for handling such compatibility in e1000_properties.
The POR reset value is wrong in QEMU and has carried forward the wrong
value for years, and correcting it to its right value needs to do
what?
We should stick to the wrong behavior for old machine types.
That's all.
So that means the following SD patch is also wrong (+Philippe) which
changes the default value of capability register.
http://patchwork.ozlabs.org/project/qemu-devel/patch/20210623185921.24113-1-joanneko...@gmail.com/
It should compat capareg for the old value for old machine types.
Can we get some agreement among maintainers?
It's not about the agreement but about to have a stable ABI. I don't
know the case for sd but e1000 is used in various and we work hard to
unbreak the migration compatibility among downstream versions. Git log
on e1000.c will tell you more.
Thanks
Regards,
Bin
Re: [PATCH v2 4/4] qemu-options: rewrite help for -smp options
> The -smp option help is peculiarly specific about mentioning the CPU
> upper limits, but these are wrong. The "PC" target has varying max
> CPU counts depending on the machine type picked. Notes about guest
> OS limits are inappropriate for QEMU docs. There are way too many
> machine types for it to be practical to mention actual limits, and
> some limits are even modified by downstream distribtions. Thus it
> is better to remove the specific limits entirely.
>
> The CPU topology reporting is also not neccessarily specific to the
> PC platform and descriptions around the rules of usage are somewhat
> terse. Expand this information with some examples to show effects
> of defaulting.
>
> Reviewed-by: Andrew Jones
> Signed-off-by: Daniel P. Berrangé
> ---
> qemu-options.hx | 29 +
> 1 file changed, 21 insertions(+), 8 deletions(-)
>
> diff --git a/qemu-options.hx b/qemu-options.hx
> index 14ff35dd4e..214c477dcc 100644
> --- a/qemu-options.hx
> +++ b/qemu-options.hx
> @@ -207,14 +207,27 @@ DEF("smp", HAS_ARG, QEMU_OPTION_smp,
> QEMU_ARCH_ALL)
> SRST
> ``-smp
> [[cpus=]n][,maxcpus=maxcpus][,sockets=sockets][,dies=dies][,cores=cores][,threads=threads]``
> -Simulate an SMP system with n CPUs. On the PC target, up to 255 CPUs
> -are supported. On Sparc32 target, Linux limits the number of usable
> -CPUs to 4. For the PC target, the number of cores per die, the
> -number of threads per cores, the number of dies per packages and the
> -total number of sockets can be specified. Missing values will be
> -computed. If any on the three values is given, the total number of
> -CPUs n can be omitted. maxcpus specifies the maximum number of
> -hotpluggable CPUs.
> +Simulate a SMP system with '\ ``n``\ ' CPUs initially present on
> +the machine type board. On boards supporting CPU hotplug, the optional
> +'\ ``maxcpus``\ ' parameter can be set to enable further CPUs to be
> +added at runtime. If omitted the maximum number of CPUs will be
> +set to match the initial CPU count. Both parameters are subject to
> +an upper limit that is determined by the specific machine type chosen.
> +
> +To control reporting of CPU topology information, the number of sockets,
> +dies per socket, cores per die, and threads per core can be specified.
> +The sum `` sockets * cores * dies * threads `` must be equal to the
> +maximum CPU count. CPU targets may only support a subset of the topology
> +parameters. Where a CPU target does not support use of a particular
> +topology parameter, its value should be assumed to be 1 for the purpose
> +of computing the CPU maximum count.
> +
> +Either the initial CPU count, or at least one of the topology parameters
> +must be specified. Values for any omitted parameters will be computed
> +from those which are given. Historically preference was given to the
> +coarsest topology parameters when computing missing values (ie sockets
> +preferred over cores, which were preferred over threads), however, this
> +behaviour is considered liable to change.
> ERST
>
> DEF("numa", HAS_ARG, QEMU_OPTION_numa,
> --
Reviewed-by: Pankaj Gupta
Re: [RFC v3 21/29] vhost: Add VhostIOVATree
在 2021/6/1 下午4:15, Eugenio Perez Martin 写道:
On Mon, May 31, 2021 at 11:40 AM Jason Wang wrote:
在 2021/5/20 上午12:28, Eugenio Pérez 写道:
This tree is able to look for a translated address from a IOVA address.
At first glance is similar to util/iova-tree. However, SVQ working on
devices with limited IOVA space need more capabilities, like allocating
IOVA chunks or perform reverse translations (qemu addresses to iova).
Starting a sepparated implementation. Knowing than insertions/deletions
will not be as frequent as searches,
This might not be true if vIOMMU is enabled.
Right.
it uses an ordered array at
implementation.
I wonder how much overhead could g_array be if it needs to grow.
I didn't do any tests, actually. But I see this VhostIOVATree as a
replaceable tool, just to get the buffer translations to work. So I'm
both ok with change it now and ok to delay it, since they should not
be hard to do.
A different name could be used, but ordered
searchable array is a little bit long though.
Note that we had a very good example for this. That is the kernel iova
allocator which is implemented via rbtree.
Instead of figuring out g_array vs g_tree stuffs, I would simple go with
g_tree first (based on util/iova-tree) and borrow the well design kernel
iova allocator API to have a generic IOVA one instead of coupling it
with vhost. It could be used by other userspace driver in the future:
init_iova_domain()/put_iova_domain();
alloc_iova()/free_iova();
find_iova();
We could go that way, but then the iova-tree should be extended to
support both translations (iova->translated_addr is now implemented in
iova-tree, the reverse is not). If I understood you correctly,
borrowing the kernel iova allocator would give us both, right?
No the reverse lookup is done via a specific IOMMU driver if I
understand it correctly.
And if the mapping is 1:1 we can just use two iova-tree I guess.
Note that it is not coupled to vhost at all except in the name: all
the implementations only work with hwaddr and void pointers memory.
Just to illustrate the point, I think it could be a drop-in
replacement for iova-tree at this moment (with all the
drawbacks/advantages of an array vs tree).
Ok.
Thanks
Another reference is the iova allocator that is implemented in VFIO.
I will check this too.
Thanks!
Thanks
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-iova-tree.h | 50 ++
hw/virtio/vhost-iova-tree.c | 188
hw/virtio/meson.build | 2 +-
3 files changed, 239 insertions(+), 1 deletion(-)
create mode 100644 hw/virtio/vhost-iova-tree.h
create mode 100644 hw/virtio/vhost-iova-tree.c
diff --git a/hw/virtio/vhost-iova-tree.h b/hw/virtio/vhost-iova-tree.h
new file mode 100644
index 00..2a44af8b3a
--- /dev/null
+++ b/hw/virtio/vhost-iova-tree.h
@@ -0,0 +1,50 @@
+/*
+ * vhost software live migration ring
+ *
+ * SPDX-FileCopyrightText: Red Hat, Inc. 2021
+ * SPDX-FileContributor: Author: Eugenio Pérez
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef HW_VIRTIO_VHOST_IOVA_TREE_H
+#define HW_VIRTIO_VHOST_IOVA_TREE_H
+
+#include
+
+#include "exec/memory.h"
+
+typedef struct VhostDMAMap {
+void *translated_addr;
+hwaddr iova;
+hwaddr size;/* Inclusive */
+IOMMUAccessFlags perm;
+} VhostDMAMap;
+
+typedef enum VhostDMAMapNewRC {
+VHOST_DMA_MAP_OVERLAP = -2,
+VHOST_DMA_MAP_INVALID = -1,
+VHOST_DMA_MAP_OK = 0,
+} VhostDMAMapNewRC;
+
+/**
+ * VhostIOVATree
+ *
+ * Store and search IOVA -> Translated mappings.
+ *
+ * Note that it cannot remove nodes.
+ */
+typedef struct VhostIOVATree {
+/* Ordered array of reverse translations, IOVA address to qemu memory. */
+GArray *iova_taddr_map;
+} VhostIOVATree;
+
+void vhost_iova_tree_new(VhostIOVATree *iova_rm);
+void vhost_iova_tree_destroy(VhostIOVATree *iova_rm);
+
+const VhostDMAMap *vhost_iova_tree_find_taddr(const VhostIOVATree *iova_rm,
+ const VhostDMAMap *map);
+VhostDMAMapNewRC vhost_iova_tree_insert(VhostIOVATree *iova_rm,
+VhostDMAMap *map);
+
+#endif
diff --git a/hw/virtio/vhost-iova-tree.c b/hw/virtio/vhost-iova-tree.c
new file mode 100644
index 00..dfd7e448b5
--- /dev/null
+++ b/hw/virtio/vhost-iova-tree.c
@@ -0,0 +1,188 @@
+/*
+ * vhost software live migration ring
+ *
+ * SPDX-FileCopyrightText: Red Hat, Inc. 2021
+ * SPDX-FileContributor: Author: Eugenio Pérez
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "vhost-iova-tree.h"
+
+#define G_ARRAY_NOT_ZERO_TERMINATED false
+#define G_ARRAY_NOT_CLEAR_ON_ALLOC false
+
+/**
+ * Inserts an element after an existing one in garray.
+ *
+ * @array The array
+ * @prev_elem The previous element of array of NULL if prepending
+ * @mapThe DMA map
+ *
+ * It provides the aditional advantage of being type safe over
Re: [PATCH v2 1/4] docs: fix typo s/Intel/AMD/ in CPU model notes
> Reviewed-by: Andrew Jones > Reviewed-by: Yanan Wang > Signed-off-by: Daniel P. Berrangé > --- > docs/system/cpu-models-x86.rst.inc | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/docs/system/cpu-models-x86.rst.inc > b/docs/system/cpu-models-x86.rst.inc > index f40ee03ecc..9119f5dff5 100644 > --- a/docs/system/cpu-models-x86.rst.inc > +++ b/docs/system/cpu-models-x86.rst.inc > @@ -227,7 +227,7 @@ features are included if using "Host passthrough" or > "Host model". > Preferred CPU models for AMD x86 hosts > ^^ > > -The following CPU models are preferred for use on Intel hosts. > +The following CPU models are preferred for use on AMD hosts. > Administrators / applications are recommended to use the CPU model that > matches the generation of the host CPUs in use. In a deployment with a > mixture of host CPU models between machines, if live migration > -- Reviewed-by: Pankaj Gupta
Re: [PATCH v2 2/4] qemu-options: re-arrange CPU topology options
> The list of CPU topology options are presented in a fairly arbitrary
> order currently. Re-arrange them so that they're ordered from largest to
> smallest unit
>
> Reviewed-by: Andrew Jones
> Reviewed-by: Yanan Wang
> Signed-off-by: Daniel P. Berrangé
> ---
> qemu-options.hx | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/qemu-options.hx b/qemu-options.hx
> index 8965dabc83..6b72617844 100644
> --- a/qemu-options.hx
> +++ b/qemu-options.hx
> @@ -196,17 +196,17 @@ SRST
> ERST
>
> DEF("smp", HAS_ARG, QEMU_OPTION_smp,
> -"-smp
> [cpus=]n[,maxcpus=cpus][,cores=cores][,threads=threads][,dies=dies][,sockets=sockets]\n"
> +"-smp
> [cpus=]n[,maxcpus=cpus][,sockets=sockets][,dies=dies][,cores=cores][,threads=threads]\n"
> "set the number of CPUs to 'n' [default=1]\n"
> -"maxcpus= maximum number of total cpus, including\n"
> +"maxcpus= maximum number of total CPUs, including\n"
> "offline CPUs for hotplug, etc\n"
> -"cores= number of CPU cores on one socket (for PC, it's
> on one die)\n"
> -"threads= number of threads on one CPU core\n"
> +"sockets= number of discrete sockets in the system\n"
> "dies= number of CPU dies on one socket (for PC only)\n"
> -"sockets= number of discrete sockets in the system\n",
> +"cores= number of CPU cores on one socket (for PC, it's
> on one die)\n"
> +"threads= number of threads on one CPU core\n",
> QEMU_ARCH_ALL)
> SRST
> -``-smp
> [cpus=]n[,cores=cores][,threads=threads][,dies=dies][,sockets=sockets][,maxcpus=maxcpus]``
> +``-smp
> [cpus=]n[,maxcpus=maxcpus][,sockets=sockets][,dies=dies][,cores=cores][,threads=threads]``
> Simulate an SMP system with n CPUs. On the PC target, up to 255 CPUs
> are supported. On Sparc32 target, Linux limits the number of usable
> CPUs to 4. For the PC target, the number of cores per die, the
> --
Reviewed-by: Pankaj Gupta
Re: [PATCH v6 0/6] hmp, qmp: Add some commands to introspect virtio devices
在 2021/7/12 下午6:35, Jonah Palmer 写道: Dump the information of the head element of the third queue of virtio-scsi: (qemu) virtio queue-element /machine/peripheral-anon/device[3]/virtio-backend 3 index: 122 ndescs: 3 descs: addr 0x7302d000 len 4096 (write), addr 0x3c951763 len 108 (write, next), addr 0x3c951728 len 51 (next) I think it would be nice if we can show driver area and device area as well here. Thanks
Re: [PATCH v6 6/6] hmp: add virtio commands
在 2021/7/12 下午6:35, Jonah Palmer 写道:
+void hmp_virtio_queue_status(Monitor *mon, const QDict *qdict)
+{
+Error *err = NULL;
+const char *path = qdict_get_try_str(qdict, "path");
+int queue = qdict_get_int(qdict, "queue");
+VirtQueueStatus *s = qmp_x_debug_virtio_queue_status(path, queue, );
+
+if (err != NULL) {
+hmp_handle_error(mon, err);
+return;
+}
+
+monitor_printf(mon, "%s:\n", path);
+monitor_printf(mon, " device_type: %s\n",
+ VirtioType_str(s->device_type));
+monitor_printf(mon, " index:%d\n", s->queue_index);
+monitor_printf(mon, " inuse:%d\n", s->inuse);
+monitor_printf(mon, " last_avail_idx: %d (%"PRId64" %%
%"PRId64")\n",
+ s->last_avail_idx, s->last_avail_idx % s->vring_num,
+ s->vring_num);
+monitor_printf(mon, " shadow_avail_idx: %d (%"PRId64" %%
%"PRId64")\n",
+ s->shadow_avail_idx, s->shadow_avail_idx % s->vring_num,
+ s->vring_num);
+monitor_printf(mon, " used_idx: %d (%"PRId64" %%
%"PRId64")\n",
+ s->used_idx, s->used_idx % s->vring_num, s->vring_num);
The modular information is not the case of packed ring where the queue
size does not have to be a power of 2.
Thanks
+monitor_printf(mon, " signalled_used: %d (%"PRId64" %%
%"PRId64")\n",
+ s->signalled_used, s->signalled_used % s->vring_num,
+ s->vring_num);
+monitor_printf(mon, " signalled_used_valid: %d\n",
s->signalled_used_valid);
+monitor_printf(mon, " VRing:\n");
+monitor_printf(mon, "num: %"PRId64"\n", s->vring_num);
+monitor_printf(mon, "num_default: %"PRId64"\n", s->vring_num_default);
+monitor_printf(mon, "align: %"PRId64"\n", s->vring_align);
+monitor_printf(mon, "desc:0x%016"PRIx64"\n", s->vring_desc);
+monitor_printf(mon, "avail: 0x%016"PRIx64"\n", s->vring_avail);
+monitor_printf(mon, "used:0x%016"PRIx64"\n", s->vring_used);
+
+qapi_free_VirtQueueStatus(s);
Re: [PATCH v6 4/6] qmp: add QMP command x-debug-virtio-queue-status
在 2021/7/12 下午6:35, Jonah Palmer 写道:
From: Laurent Vivier
This new command shows internal status of a VirtQueue.
(vrings and indexes).
Signed-off-by: Laurent Vivier
Signed-off-by: Jonah Palmer
---
hw/virtio/virtio-stub.c | 6 +++
hw/virtio/virtio.c | 37 ++
qapi/virtio.json| 102
3 files changed, 145 insertions(+)
[Jonah: Added 'device-type' field to VirtQueueStatus and
qmp command x-debug-virtio-queue-status.]
diff --git a/hw/virtio/virtio-stub.c b/hw/virtio/virtio-stub.c
index ddb592f..3c1bf17 100644
--- a/hw/virtio/virtio-stub.c
+++ b/hw/virtio/virtio-stub.c
@@ -17,3 +17,9 @@ VirtioStatus *qmp_x_debug_virtio_status(const char* path,
Error **errp)
{
return qmp_virtio_unsupported(errp);
}
+
+VirtQueueStatus *qmp_x_debug_virtio_queue_status(const char *path,
+ uint16_t queue, Error **errp)
+{
+return qmp_virtio_unsupported(errp);
+}
diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
index 81a0ee8..ccd4371 100644
--- a/hw/virtio/virtio.c
+++ b/hw/virtio/virtio.c
@@ -3935,6 +3935,43 @@ static VirtIODevice *virtio_device_find(const char *path)
return NULL;
}
+VirtQueueStatus *qmp_x_debug_virtio_queue_status(const char *path,
+ uint16_t queue, Error **errp)
+{
+VirtIODevice *vdev;
+VirtQueueStatus *status;
+
+vdev = virtio_device_find(path);
+if (vdev == NULL) {
+error_setg(errp, "Path %s is not a VirtIO device", path);
+return NULL;
+}
+
+if (queue >= VIRTIO_QUEUE_MAX || !virtio_queue_get_num(vdev, queue)) {
+error_setg(errp, "Invalid virtqueue number %d", queue);
+return NULL;
+}
+
+status = g_new0(VirtQueueStatus, 1);
+status->device_type = qapi_enum_parse(_lookup, vdev->name,
+ VIRTIO_TYPE_UNKNOWN, NULL);
+status->queue_index = vdev->vq[queue].queue_index;
+status->inuse = vdev->vq[queue].inuse;
+status->vring_num = vdev->vq[queue].vring.num;
+status->vring_num_default = vdev->vq[queue].vring.num_default;
+status->vring_align = vdev->vq[queue].vring.align;
+status->vring_desc = vdev->vq[queue].vring.desc;
+status->vring_avail = vdev->vq[queue].vring.avail;
+status->vring_used = vdev->vq[queue].vring.used;
+status->last_avail_idx = vdev->vq[queue].last_avail_idx;
As mentioned in previous versions. We need add vhost support otherwise
the value here is wrong.
+status->shadow_avail_idx = vdev->vq[queue].shadow_avail_idx;
The shadow index is something that is implementation specific e.g in the
case of vhost it's kind of meaningless.
Thanks
+status->used_idx = vdev->vq[queue].used_idx;
+status->signalled_used = vdev->vq[queue].signalled_used;
+status->signalled_used_valid = vdev->vq[queue].signalled_used_valid;
+
+return status;
+}
+
#define CONVERT_FEATURES(type, map)\
({ \
type *list = NULL; \
diff --git a/qapi/virtio.json b/qapi/virtio.json
index 78873cd..7007e0c 100644
--- a/qapi/virtio.json
+++ b/qapi/virtio.json
@@ -406,3 +406,105 @@
'data': { 'path': 'str' },
'returns': 'VirtioStatus'
}
+
+##
+# @VirtQueueStatus:
+#
+# Status of a VirtQueue
+#
+# @device-type: VirtIO device type
+#
+# @queue-index: VirtQueue queue_index
+#
+# @inuse: VirtQueue inuse
+#
+# @vring-num: VirtQueue vring.num
+#
+# @vring-num-default: VirtQueue vring.num_default
+#
+# @vring-align: VirtQueue vring.align
+#
+# @vring-desc: VirtQueue vring.desc
+#
+# @vring-avail: VirtQueue vring.avail
+#
+# @vring-used: VirtQueue vring.used
+#
+# @last-avail-idx: VirtQueue last_avail_idx
+#
+# @shadow-avail-idx: VirtQueue shadow_avail_idx
+#
+# @used-idx: VirtQueue used_idx
+#
+# @signalled-used: VirtQueue signalled_used
+#
+# @signalled-used-valid: VirtQueue signalled_used_valid
+#
+# Since: 6.1
+#
+##
+
+{ 'struct': 'VirtQueueStatus',
+ 'data': {
+'device-type': 'VirtioType',
+'queue-index': 'uint16',
+'inuse': 'uint32',
+'vring-num': 'int',
+'vring-num-default': 'int',
+'vring-align': 'int',
+'vring-desc': 'uint64',
+'vring-avail': 'uint64',
+'vring-used': 'uint64',
+'last-avail-idx': 'uint16',
+'shadow-avail-idx': 'uint16',
+'used-idx': 'uint16',
+'signalled-used': 'uint16',
+'signalled-used-valid': 'uint16'
+ }
+}
+
+##
+# @x-debug-virtio-queue-status:
+#
+# Return the status of a given VirtQueue
+#
+# @path: QOBject path of the VirtIODevice
+#
+# @queue: queue number to examine
+#
+# Returns: Status of the VirtQueue
+#
+# Since: 6.1
+#
+# Example:
+#
+# -> { "execute": "x-debug-virtio-queue-status",
+# "arguments": {
+# "path": "/machine/peripheral-anon/device[3]/virtio-backend",
+# "queue": 0
+# }
+# }
+# <- { "return": {
+#
Re: Question： qemux86-64 reboot hangs at "reboot: machine restart"
Gentle ping. Add qemu-disc...@nongnu.org On 7/9/21 5:27 PM, Xu, Yanfei wrote: Hi experts， When I used qemu6.0 to boot a VM, then I found that it will hang after I execute "reboot" command. With a long time waiting, It didn't reboot and leave the message as blow: cut here root@qemux86-64:~# reboot Broadcast message from root@qemux86-64 (ttyS0) (Fri Jul 9 09:09:31 2021): The system is going down for reboot NOW! INIT: Switching to runlevel: 6 INIT: Sending processes configured via /etc/inittab the TERM signal Stopping syslogd/klogd: stopped syslogd (pid 255) stopped klogd (pid 258) done Deconfiguring network interfaces... ifdown: interface lo not configured done. Sending all processes the TERM signal... Sending all processes the KILL signal... Unmounting remote filesystems... Deactivating swap... Unmounting local filesystems... [ 38.388532] EXT4-fs (vda): re-mounted. Opts: (null) Rebooting... [ 38.534593] reboot: Restarting system [ 38.534844] reboot: machine restart The command booting VM I used is " /path/to/qemu-system-x86_64 -device virtio-net-pci,netdev=net0,mac=52:54:00:12:35:02 -netdev user,id=net0,hostfwd=tcp::-:22,hostfwd=tcp::2323-:23,tftp=/path/to/images/qemux86-64 -object rng-random,filename=/dev/urandom,id=rng0 -device virtio-rng-pci,rng=rng0 -drive file=/path/to/core-image-minimal-qemux86-64-20210707062347.rootfs.ext4,if=virtio,format=raw -usb -device usb-tablet -cpu IvyBridge -machine q35 -smp 4 -m 256 -serial mon:stdio -serial null -nographic -kernel /path/to/bzImage--5.10.41.bin -append root=/dev/vda rw reboot=a mem=256M ip=dhcp console=ttyS0 console=ttyS1 oprofile.timer=1 tsc=reliable no_timer_check rcupdate.rcu_expedited=1 " I also tried the qemu5.2, It still has this issue. Did I miss something? Could you please give me some advises? Thanks! Regards, Yanfei
Re: [PATCH V2 00/18] vhost-vDPA multiqueue
在 2021/7/13 下午11:53, Michael S. Tsirkin 写道: On Tue, Jul 13, 2021 at 10:34:50AM +0800, Jason Wang wrote: On Mon, Jul 12, 2021 at 9:15 PM Michael S. Tsirkin wrote: On Mon, Jul 12, 2021 at 01:44:45PM +0800, Jason Wang wrote: 在 2021/7/6 下午4:26, Jason Wang 写道: Hi All: This patch implements the multiqueue support for vhost-vDPA. The most important requirement the control virtqueue support. The virtio-net and vhost-net core are tweak to support control virtqueue as if what data queue pairs are done: a dedicated vhost_net device which is coupled with the NetClientState is intrdouced so most of the existing vhost codes could be reused with minor changes. With the control virtqueue, vhost-vDPA are extend to support creating and destroying multiqueue queue pairs plus the control virtqueue. Tests are done via the vp_vdpa driver in L1 guest plus vdpa simulator on L0. Please reivew. If no objection, I will queue this for 6.1. Thanks Just to make sure I understand, this basically works by passing the cvq through to the guest right? Giving up on maintaining the state in qemu. Yes, if I understand correctly. This is the conclusion since our last discussion. We can handle migration by using shadow virtqueue on top (depends on the Eugenio's work), and multiple IOTLB support on the vhost-vDPA. Thanks I still think it's wrong to force userspace to use shadow vq or multiple IOTLB. These should be implementation detail. Stick to a virtqueue interface doesn't mean we need to force the vendor to implement the hardware control virtqueue. See below. Short term I'm inclined to say just switch to userspace emulation or to vhost for the duration of migration. Long term I think we should push commands to the kernel and have it pass them to the PF. So the issues are, I think we've discussed several times but it's time to figure them out now: 1) There's no guarantee that the control virtqueue is implemented in PF 2) Something like pushing commands will bring extra issues: 2.1) duplicating all the existing control virtqueue command via another uAPI 2.2) no asynchronous support 3) can't work for virtio_vdpa 4) bring extra complications for the nested virtualization If we manage to overcome 2.1 and 2.2 it's just a re-invention of control virtqueue. So it worries me a bit that we are pushing this specific way into QEMU. If you are sure it won't push other vendors in this direction and we'll be able to back out later then ok, I won't nack it. Let me clarify, control virtqueue + multiple IOTLB is just the uAPI but not the implementation. Parent/vendor is free to implement those semantics in their comfortable way: 1) Having a consistent (or re-using) uAPI to work for all kinds of control virtqueue or event virtqueue 2) Fit for all kinds of the hardware implementation 2.1) Hardware doesn't have control virtqueue but using registers. Parent just decode the cvq commands and translate them to register commands 2.2) Hardware doesn't have control virtqueue but using other device (e.g PF) to implement the semantics. Parent just decode the cvq commands and send them to the device that implements the semantic (PF) 2.3) Hardware does have control virtqueue with transport specific ASID support. Parent just assign a different PASID to cvq, and let userspace to use that cvq directly. 2.4) Hardware does have control virtqueue with device specific ASID support. Parent just assign a different device specific ASID and let userspace to use that cvq directly. The above 4 should covers all the vendor cases that I know that at least 2.1 and 2.4 are supported by some vendors. Some vendors have the plan for 2.3. Thanks Changes since V1: - validating all features that depends on ctrl vq - typo fixes and commit log tweaks - fix build errors because max_qps is used before it is introduced Thanks Jason Wang (18): vhost_net: remove the meaningless assignment in vhost_net_start_one() vhost: use unsigned int for nvqs vhost_net: do not assume nvqs is always 2 vhost-vdpa: remove the unnecessary check in vhost_vdpa_add() vhost-vdpa: don't cleanup twice in vhost_vdpa_add() vhost-vdpa: fix leaking of vhost_net in vhost_vdpa_add() vhost-vdpa: tweak the error label in vhost_vdpa_add() vhost-vdpa: fix the wrong assertion in vhost_vdpa_init() vhost-vdpa: remove the unncessary queue_index assignment vhost-vdpa: open device fd in net_init_vhost_vdpa() vhost-vdpa: classify one time request vhost-vdpa: prepare for the multiqueue support vhost-vdpa: let net_vhost_vdpa_init() returns NetClientState * net: introduce control client vhost-net: control virtqueue support virito-net: use "qps" instead of "queues" when possible virtio-net: vhost control virtqueue support vhost-vdpa: multiqueue support hw/net/vhost_net.c | 48 +++--- hw/net/virtio-net.c| 165 ++--- hw/virtio/vhost-vdpa.c
[PATCH v3 2/3] msix/hmp: add interface to dump device specific info
While the previous patch is to dump the MSI-X table, sometimes we may
need to dump device specific data, e.g., to help match the vector with
the specific device queue.
This patch is to add the PCI device specific interface to help dump
those information. Any PCI device class may implement this
PCIDeviceClass->msix_info interface.
Cc: Jason Wang
Cc: Joe Jin
Suggested-by: Jason Wang
Signed-off-by: Dongli Zhang
Acked-by: Jason Wang
---
hmp-commands-info.hx | 7 ---
include/hw/pci/pci.h | 3 +++
softmmu/qdev-monitor.c | 11 +++
3 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx
index ce5c550d44..4e831d7ae4 100644
--- a/hmp-commands-info.hx
+++ b/hmp-commands-info.hx
@@ -223,9 +223,10 @@ ERST
{
.name = "msix",
-.args_type = "dev:s",
-.params = "dev",
-.help = "dump MSI-X information",
+.args_type = "info:-d,dev:s",
+.params = "[-d] dev",
+.help = "dump MSI-X information; "
+ "(-d: show device specific info)",
.cmd= hmp_info_msix,
},
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 6be4e0c460..4620b9e757 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -129,6 +129,8 @@ typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int
region_num,
pcibus_t addr, pcibus_t size, int type);
typedef void PCIUnregisterFunc(PCIDevice *pci_dev);
+typedef void PCIMSIXInfoFunc(Monitor *mon, PCIDevice *dev, Error **errp);
+
typedef struct PCIIORegion {
pcibus_t addr; /* current PCI mapping address. -1 means not mapped */
#define PCI_BAR_UNMAPPED (~(pcibus_t)0)
@@ -224,6 +226,7 @@ struct PCIDeviceClass {
PCIUnregisterFunc *exit;
PCIConfigReadFunc *config_read;
PCIConfigWriteFunc *config_write;
+PCIMSIXInfoFunc *msix_info;
uint16_t vendor_id;
uint16_t device_id;
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 7837a17d0d..7fd3fe0ada 100644
--- a/softmmu/qdev-monitor.c
+++ b/softmmu/qdev-monitor.c
@@ -1011,7 +1011,9 @@ void hmp_info_msix(Monitor *mon, const QDict *qdict)
{
const char *name = qdict_get_str(qdict, "dev");
DeviceState *dev = find_device_state(name, NULL);
+bool info = qdict_get_try_bool(qdict, "info", false);
PCIDevice *pci_dev;
+PCIDeviceClass *pc;
Error *err = NULL;
if (!dev) {
@@ -1027,6 +1029,15 @@ void hmp_info_msix(Monitor *mon, const QDict *qdict)
pci_dev = PCI_DEVICE(dev);
msix_dump_info(mon, pci_dev, );
+if (info) {
+pc = PCI_DEVICE_GET_CLASS(pci_dev);
+if (pc->msix_info) {
+pc->msix_info(mon, pci_dev, );
+} else {
+error_setg(, "Device specific info not supported");
+}
+}
+
exit:
hmp_handle_error(mon, err);
}
--
2.17.1
[PATCH v3 1/3] msix/hmp: add hmp interface to dump MSI-X info
This patch is to add the HMP interface to dump MSI-X table and PBA, in
order to help diagnose the loss of IRQ issue in VM (e.g., if an MSI-X
vector is erroneously masked permanently). Here is the example with
vhost-scsi:
(qemu) info msix /machine/peripheral/vscsi0
Msg L.Addr Msg U.Addr Msg Data Vect Ctrl
0xfee0 0x 0x4041 0x
0xfee0 0x 0x4051 0x
0xfee0 0x 0x4061 0x
0xfee0 0x 0x4071 0x
0xfee01000 0x 0x40b1 0x
0xfee02000 0x 0x40c1 0x
0xfee03000 0x 0x40d1 0x
MSI-X PBA
0 0 0 0 0 0 0
Since the number of MSI-X entries is not determined and might be very
large, it is sometimes inappropriate to dump via QMP.
Therefore, this patch dumps MSI-X information only via HMP, which is
similar to the implementation of hmp_info_mem().
Cc: Jason Wang
Cc: Joe Jin
Signed-off-by: Dongli Zhang
Acked-by: Dr. David Alan Gilbert
Acked-by: Jason Wang
---
Changed since v1/v2:
- Add msix_present() to pci-stub.c to avoid build error
hmp-commands-info.hx | 13 +
hw/pci/msix.c | 63 ++
hw/pci/pci-stub.c | 5
include/hw/pci/msix.h | 2 ++
include/monitor/hmp.h | 1 +
softmmu/qdev-monitor.c | 25 +
6 files changed, 109 insertions(+)
diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx
index 27206ac049..ce5c550d44 100644
--- a/hmp-commands-info.hx
+++ b/hmp-commands-info.hx
@@ -221,6 +221,19 @@ SRST
Show PCI information.
ERST
+{
+.name = "msix",
+.args_type = "dev:s",
+.params = "dev",
+.help = "dump MSI-X information",
+.cmd= hmp_info_msix,
+},
+
+SRST
+ ``info msix`` *dev*
+Dump MSI-X information for device *dev*.
+ERST
+
#if defined(TARGET_I386) || defined(TARGET_SH4) || defined(TARGET_SPARC) || \
defined(TARGET_PPC) || defined(TARGET_XTENSA) || defined(TARGET_M68K)
{
diff --git a/hw/pci/msix.c b/hw/pci/msix.c
index ae9331cd0b..4b4ec87eee 100644
--- a/hw/pci/msix.c
+++ b/hw/pci/msix.c
@@ -22,6 +22,7 @@
#include "sysemu/xen.h"
#include "migration/qemu-file-types.h"
#include "migration/vmstate.h"
+#include "monitor/monitor.h"
#include "qemu/range.h"
#include "qapi/error.h"
#include "trace.h"
@@ -669,3 +670,65 @@ const VMStateDescription vmstate_msix = {
VMSTATE_END_OF_LIST()
}
};
+
+static void msix_dump_table(Monitor *mon, PCIDevice *dev)
+{
+int vector;
+uint32_t val;
+uint8_t *table_entry;
+
+monitor_printf(mon, "Msg L.Addr ");
+monitor_printf(mon, "Msg U.Addr ");
+monitor_printf(mon, "Msg Data ");
+monitor_printf(mon, "Vect Ctrl\n");
+
+for (vector = 0; vector < dev->msix_entries_nr; vector++) {
+table_entry = dev->msix_table + vector * PCI_MSIX_ENTRY_SIZE;
+
+val = pci_get_long(table_entry + PCI_MSIX_ENTRY_LOWER_ADDR);
+monitor_printf(mon, "0x%08x ", val);
+
+val = pci_get_long(table_entry + PCI_MSIX_ENTRY_UPPER_ADDR);
+monitor_printf(mon, "0x%08x ", val);
+
+val = pci_get_long(table_entry + PCI_MSIX_ENTRY_DATA);
+monitor_printf(mon, "0x%08x ", val);
+
+val = pci_get_long(table_entry + PCI_MSIX_ENTRY_VECTOR_CTRL);
+monitor_printf(mon, "0x%08x\n", val);
+}
+
+monitor_printf(mon, "\n");
+}
+
+static void msix_dump_pba(Monitor *mon, PCIDevice *dev)
+{
+int vector;
+
+monitor_printf(mon, "MSI-X PBA\n");
+
+for (vector = 0; vector < dev->msix_entries_nr; vector++) {
+monitor_printf(mon, "%d ", !!msix_is_pending(dev, vector));
+
+if (vector % 16 == 15) {
+monitor_printf(mon, "\n");
+}
+}
+
+if (vector % 16 != 15) {
+monitor_printf(mon, "\n");
+}
+
+monitor_printf(mon, "\n");
+}
+
+void msix_dump_info(Monitor *mon, PCIDevice *dev, Error **errp)
+{
+if (!msix_present(dev)) {
+error_setg(errp, "MSI-X not available");
+return;
+}
+
+msix_dump_table(mon, dev);
+msix_dump_pba(mon, dev);
+}
diff --git a/hw/pci/pci-stub.c b/hw/pci/pci-stub.c
index 3a027c42e4..8191d49d56 100644
--- a/hw/pci/pci-stub.c
+++ b/hw/pci/pci-stub.c
@@ -91,3 +91,8 @@ MSIMessage msix_get_message(PCIDevice *dev, unsigned int
vector)
{
g_assert_not_reached();
}
+
+void msix_dump_info(Monitor *mon, PCIDevice *dev, Error **errp)
+{
+ monitor_printf(mon, "PCI devices not supported\n");
+}
diff --git a/include/hw/pci/msix.h b/include/hw/pci/msix.h
index 4c4a60c739..10a4500295 100644
--- a/include/hw/pci/msix.h
+++ b/include/hw/pci/msix.h
@@ -47,6 +47,8 @@ int msix_set_vector_notifiers(PCIDevice *dev,
MSIVectorPollNotifier poll_notifier);
void msix_unset_vector_notifiers(PCIDevice *dev);
+void msix_dump_info(Monitor *mon, PCIDevice *dev, Error **errp);
+
extern const VMStateDescription vmstate_msix;
#define VMSTATE_MSIX_TEST(_field, _state,
[PATCH v3 3/3] virtio-pci/hmp: implement device specific hmp interface
This patch is to implement the device specific interface to dump the
mapping between virtio queues and vectors.
(qemu) info msix -d /machine/peripheral/vscsi0
Msg L.Addr Msg U.Addr Msg Data Vect Ctrl
0xfee0 0x 0x4041 0x
0xfee0 0x 0x4051 0x
0xfee0 0x 0x4061 0x
0xfee0 0x 0x4071 0x
0xfee01000 0x 0x40b1 0x
0xfee02000 0x 0x40c1 0x
0xfee03000 0x 0x40d1 0x
MSI-X PBA
0 0 0 0 0 0 0
virtio pci vector info:
config: 0
queue 0: 1
queue 1: 2
queue 2: 3
queue 3: 4
queue 4: 5
queue 5: 6
Cc: Jason Wang
Cc: Joe Jin
Suggested-by: Jason Wang
Signed-off-by: Dongli Zhang
Acked-by: Jason Wang
---
hw/virtio/virtio-pci.c | 22 ++
hw/virtio/virtio.c | 10 ++
include/hw/virtio/virtio.h | 2 ++
3 files changed, 34 insertions(+)
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 433060ac02..2971e8049c 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -38,6 +38,7 @@
#include "hw/virtio/virtio-bus.h"
#include "qapi/visitor.h"
#include "sysemu/replay.h"
+#include "monitor/monitor.h"
#define VIRTIO_PCI_REGION_SIZE(dev)
VIRTIO_PCI_CONFIG_OFF(msix_present(dev))
@@ -1587,6 +1588,26 @@ static void
virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy,
>mr);
}
+static void virtio_pci_dc_msix_info(Monitor *mon, PCIDevice *dev,
+Error **errp)
+{
+DeviceState *qdev = DEVICE(dev);
+VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(qdev);
+VirtIODevice *vdev = virtio_bus_get_device(>bus);
+int num = virtio_get_num_queues(vdev);
+int i;
+
+monitor_printf(mon, "virtio pci vector info:\n");
+
+monitor_printf(mon, "config: %d\n", virtio_get_config_vector(vdev));
+
+for (i = 0; i < num; i++)
+monitor_printf(mon, "queue %d: %u\n",
+ i, virtio_get_vector(vdev, i));
+
+monitor_printf(mon, "\n");
+}
+
static void virtio_pci_pre_plugged(DeviceState *d, Error **errp)
{
VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
@@ -2004,6 +2025,7 @@ static void virtio_pci_class_init(ObjectClass *klass,
void *data)
k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
k->revision = VIRTIO_PCI_ABI_VERSION;
k->class_id = PCI_CLASS_OTHERS;
+k->msix_info = virtio_pci_dc_msix_info;
device_class_set_parent_realize(dc, virtio_pci_dc_realize,
>parent_dc_realize);
dc->reset = virtio_pci_reset;
diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
index 874377f37a..ea54939e98 100644
--- a/hw/virtio/virtio.c
+++ b/hw/virtio/virtio.c
@@ -2581,6 +2581,16 @@ void virtio_notify_config(VirtIODevice *vdev)
virtio_notify_vector(vdev, vdev->config_vector);
}
+uint16_t virtio_get_vector(VirtIODevice *vdev, int n)
+{
+return vdev->vq[n].vector;
+}
+
+uint16_t virtio_get_config_vector(VirtIODevice *vdev)
+{
+return vdev->config_vector;
+}
+
static bool virtio_device_endian_needed(void *opaque)
{
VirtIODevice *vdev = opaque;
diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h
index 8bab9cfb75..6746227f73 100644
--- a/include/hw/virtio/virtio.h
+++ b/include/hw/virtio/virtio.h
@@ -268,6 +268,8 @@ int virtio_set_status(VirtIODevice *vdev, uint8_t val);
void virtio_reset(void *opaque);
void virtio_update_irq(VirtIODevice *vdev);
int virtio_set_features(VirtIODevice *vdev, uint64_t val);
+uint16_t virtio_get_vector(VirtIODevice *vdev, int n);
+uint16_t virtio_get_config_vector(VirtIODevice *vdev);
/* Base devices. */
typedef struct VirtIOBlkConf VirtIOBlkConf;
--
2.17.1
[PATCH v3 0/3] To add HMP interface to dump PCI MSI-X table/PBA
This is v3 to add msix_present() to pci-stub.c to avoid build error. Changed since RFC v1: - Add heading to MSI-X table (suggested by David Alan Gilbert) - Add device specific interface, e.g., to dump virtio-pci queue-to-vector mapping (Suggested By Jason) Changed since v2: - Add msix_present() to pci-stub.c to avoid build error This patch is to introduce the new HMP command to dump the MSI-X table/PBA. Here is the RFC v1: https://lists.gnu.org/archive/html/qemu-devel/2021-04/msg04673.html The idea was inspired by below discussion: https://lists.gnu.org/archive/html/qemu-devel/2021-03/msg09020.html (qemu) info msix -d /machine/peripheral/vscsi0 Msg L.Addr Msg U.Addr Msg Data Vect Ctrl 0xfee0 0x 0x4041 0x 0xfee0 0x 0x4051 0x 0xfee0 0x 0x4061 0x 0xfee0 0x 0x4071 0x 0xfee01000 0x 0x40b1 0x 0xfee02000 0x 0x40c1 0x 0xfee03000 0x 0x40d1 0x MSI-X PBA 0 0 0 0 0 0 0 virtio pci vector info: config: 0 queue 0: 1 queue 1: 2 queue 2: 3 queue 3: 4 queue 4: 5 queue 5: 6 hmp-commands-info.hx | 14 + hw/pci/msix.c | 63 + hw/pci/pci-stub.c | 5 hw/virtio/virtio-pci.c | 22 ++ hw/virtio/virtio.c | 10 +++ include/hw/pci/msix.h | 2 ++ include/hw/pci/pci.h | 3 ++ include/hw/virtio/virtio.h | 2 ++ include/monitor/hmp.h | 1 + softmmu/qdev-monitor.c | 36 +++ 10 files changed, 158 insertions(+) Thank you very much! Dongli Zhang
Re: [PULL 36/40] vl: switch -M parsing to keyval
On Tue, 13 Jul 2021 13:43:47 -0600
Alex Williamson wrote:
> On Tue, 6 Jul 2021 12:01:37 +0200
> Paolo Bonzini wrote:
>
> > Switch from QemuOpts to keyval. This enables the introduction
> > of non-scalar machine properties, and JSON syntax in the future.
> >
> > For JSON syntax to be supported right now, we would have to
> > consider what would happen if string-based dictionaries (produced by
> > -M key=val) were to be merged with strongly-typed dictionaries
> > (produced by -M {'key': 123}).
> >
> > The simplest way out is to never enter the situation, and only allow one
> > -M option when JSON syntax is in use. However, we want options such as
> > -smp to become syntactic sugar for -M, and this is a problem; as soon
> > as -smp becomes a shortcut for -M, QEMU would forbid using -M '{}'
> > together with -smp. Therefore, allowing JSON syntax right now for -M
> > would be a forward-compatibility nightmare and it would be impossible
> > anyway to introduce -M incrementally in tools.
> >
> > Instead, support for JSON syntax is delayed until after the main
> > options are converted to QOM compound properties. These include -boot,
> > -acpitable, -smbios, -m, -semihosting-config, -rtc and -fw_cfg. Once JSON
> > syntax is introduced, these options will _also_ be forbidden together
> > with -M '{...}'.
> >
> > Signed-off-by: Paolo Bonzini
> > ---
> > softmmu/vl.c | 315 ---
> > 1 file changed, 146 insertions(+), 169 deletions(-)
>
> This breaks the below long standing test VM. libvirt log and xml
> provided below. I'm using libvirt version 7.3.0.
A trivial reproducer:
qemu-system-x86_64 -blockdev
'{"driver":"file","filename":"/usr/share/edk2/ovmf/OVMF_CODE.fd","node-name":"pflash0-storage","auto-read-only":true,"discard":"unmap"}'
-blockdev
'{"node-name":"pflash0-format","read-only":true,"driver":"raw","file":"pflash0-storage"}'
-machine pc,pflash0=pflash0-format
backtrace:
#0 error_setg_internal
(errp=0x7fffd6c8, src=0x5618bc10
"../../home/alwillia/Work/qemu.git/qapi/qobject-input-visitor.c", line=172,
func=0x5618bf20 <__func__.27> "qobject_input_get_object",
fmt=0x5618bc98 "Parameter '%s' is missing") at
../../home/alwillia/Work/qemu.git/util/error.c:93
#1 0x55f8d255 in qobject_input_get_object (qiv=0x569c59b0,
name=0x56920ef0 "drive", consume=true, errp=0x7fffd6c8) at
../../home/alwillia/Work/qemu.git/qapi/qobject-input-visitor.c:172
#2 0x55f8d28b in qobject_input_get_keyval (qiv=0x569c59b0,
name=0x56920ef0 "drive", errp=0x7fffd6c8) at
../../home/alwillia/Work/qemu.git/qapi/qobject-input-visitor.c:184
#3 0x55f8e3a9 in qobject_input_type_str_keyval (v=0x569c59b0,
name=0x56920ef0 "drive", obj=0x7fffd5a8, errp=0x7fffd6c8)
at ../../home/alwillia/Work/qemu.git/qapi/qobject-input-visitor.c:551
#4 0x55f59e51 in visit_type_str (v=0x569c59b0, name=0x56920ef0
"drive", obj=0x7fffd5a8, errp=0x7fffd6c8) at
../../home/alwillia/Work/qemu.git/qapi/qapi-visit-core.c:337
#5 0x558c3b70 in set_drive_helper (obj=0x569208a0,
v=0x569c59b0, name=0x56920ef0 "drive", opaque=0x564c8300
, iothread=false, errp=0x7fffd6c8)
at ../../home/alwillia/Work/qemu.git/hw/core/qdev-properties-system.c:97
#6 0x558c3e0b in set_drive (obj=0x569208a0, v=0x569c59b0,
name=0x56920ef0 "drive", opaque=0x564c8300 ,
errp=0x7fffd6c8)
at ../../home/alwillia/Work/qemu.git/hw/core/qdev-properties-system.c:171
#7 0x55edb821 in field_prop_set (obj=0x569208a0, v=0x569c59b0,
name=0x56920ef0 "drive", opaque=0x564c8300 ,
errp=0x7fffd6c8)
at ../../home/alwillia/Work/qemu.git/hw/core/qdev-properties.c:86
#8 0x55eb7f15 in object_property_set (obj=0x569208a0,
name=0x56920ef0 "drive", v=0x569c59b0, errp=0x7fffd768) at
../../home/alwillia/Work/qemu.git/qom/object.c:1402
#9 0x55ebad9e in property_set_alias (obj=0x5683dde0,
v=0x569c59b0, name=0x566fc8a0 "pflash0", opaque=0x56920ed0,
errp=0x7fffd768)
at ../../home/alwillia/Work/qemu.git/qom/object.c:2695
#10 0x55eb7f15 in object_property_set (obj=0x5683dde0,
name=0x566fc8a0 "pflash0", v=0x569c59b0, errp=0x7fffd7b8) at
../../home/alwillia/Work/qemu.git/qom/object.c:1402
#11 0x55eb3aa3 in object_set_properties_from_qdict (obj=0x5683dde0,
qdict=0x566fa5b0, v=0x569c59b0, errp=0x565d9308 )
at ../../home/alwillia/Work/qemu.git/qom/object_interfaces.c:55
#12 0x55eb3bc3 in object_set_properties_from_keyval
(obj=0x5683dde0, qdict=0x566fa5b0, from_json=false, errp=0x565d9308
)
at ../../home/alwillia/Work/qemu.git/qom/object_interfaces.c:79
#13 0x55cb3f5f in qemu_apply_machine_options (qdict=0x566fa5b0) at
../../home/alwillia/Work/qemu.git/softmmu/vl.c:1833
#14
[PATCH v5 2/2] ui/cocoa: add option to swap Option and Command
From: Gustavo Noronha Silva
On Mac OS X the Option key maps to Alt and Command to Super/Meta. This change
swaps them around so that Alt is the key closer to the space bar and Meta/Super
is between Control and Alt, like on non-Mac keyboards.
It is a cocoa display option, disabled by default.
Acked-by: Markus Armbruster
Reviewed-by: Akihiko Odaki
Signed-off-by: Gustavo Noronha Silva
---
qapi/ui.json| 8 ++-
qemu-options.hx | 3 ++-
ui/cocoa.m | 64 ++---
3 files changed, 65 insertions(+), 10 deletions(-)
diff --git a/qapi/ui.json b/qapi/ui.json
index b2d27ce167..7d8d3b532e 100644
--- a/qapi/ui.json
+++ b/qapi/ui.json
@@ -1102,10 +1102,16 @@
# a global grab on key events. (default: off)
# See https://support.apple.com/en-in/guide/mac-help/mh32356/mac
#
+# @swap-option-command: Swap the Option and Command keys so that their key
+# codes match their position on non-Mac keyboards and
+# you can use Meta/Super and Alt where you expect them.
+# (default: off)
+#
# Since: 6.1
##
{ 'struct' : 'DisplayCocoa',
- 'data': { '*full-grab' : 'bool' } }
+ 'data': { '*full-grab' : 'bool',
+'*swap-option-command' : 'bool' } }
##
# @DisplayType:
diff --git a/qemu-options.hx b/qemu-options.hx
index 8308d28d1f..7cdacc83ae 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -1797,7 +1797,8 @@ DEF("display", HAS_ARG, QEMU_OPTION_display,
"-display curses[,charset=]\n"
#endif
#if defined(CONFIG_COCOA)
-"-display cocoa[,full_grab=on|off]\n"
+"-display cocoa[,full-grab=on|off]\n"
+" [,swap-option-command=on|off]\n"
#endif
#if defined(CONFIG_OPENGL)
"-display egl-headless[,rendernode=]\n"
diff --git a/ui/cocoa.m b/ui/cocoa.m
index d9d98aa9de..e23060da53 100644
--- a/ui/cocoa.m
+++ b/ui/cocoa.m
@@ -73,6 +73,7 @@
typedef struct {
int width;
int height;
+bool swap_option_command;
} QEMUScreen;
static void cocoa_update(DisplayChangeListener *dcl,
@@ -330,6 +331,7 @@ - (void) setAbsoluteEnabled:(BOOL)tIsAbsoluteEnabled;
*/
- (BOOL) isMouseGrabbed;
- (BOOL) isAbsoluteEnabled;
+- (BOOL) isSwapOptionCommandEnabled;
- (float) cdx;
- (float) cdy;
- (QEMUScreen) gscreen;
@@ -685,6 +687,13 @@ - (void) setFullGrab:(id)sender
CFRelease(tapEventsSrc);
}
+- (void) setSwapOptionCommand:(id)sender
+{
+COCOA_DEBUG("QemuCocoaView: setSwapOptionCommand\n");
+
+screen.swap_option_command = true;
+}
+
- (void) toggleKey: (int)keycode {
qkbd_state_key_event(kbd, keycode, !qkbd_state_key_get(kbd, keycode));
}
@@ -834,12 +843,22 @@ - (bool) handleEventLocked:(NSEvent *)event
qkbd_state_key_event(kbd, Q_KEY_CODE_CTRL_R, false);
}
if (!(modifiers & NSEventModifierFlagOption)) {
-qkbd_state_key_event(kbd, Q_KEY_CODE_ALT, false);
-qkbd_state_key_event(kbd, Q_KEY_CODE_ALT_R, false);
+if ([self isSwapOptionCommandEnabled]) {
+qkbd_state_key_event(kbd, Q_KEY_CODE_META_L, false);
+qkbd_state_key_event(kbd, Q_KEY_CODE_META_R, false);
+} else {
+qkbd_state_key_event(kbd, Q_KEY_CODE_ALT, false);
+qkbd_state_key_event(kbd, Q_KEY_CODE_ALT_R, false);
+}
}
if (!(modifiers & NSEventModifierFlagCommand)) {
-qkbd_state_key_event(kbd, Q_KEY_CODE_META_L, false);
-qkbd_state_key_event(kbd, Q_KEY_CODE_META_R, false);
+if ([self isSwapOptionCommandEnabled]) {
+qkbd_state_key_event(kbd, Q_KEY_CODE_ALT, false);
+qkbd_state_key_event(kbd, Q_KEY_CODE_ALT_R, false);
+} else {
+qkbd_state_key_event(kbd, Q_KEY_CODE_META_L, false);
+qkbd_state_key_event(kbd, Q_KEY_CODE_META_R, false);
+}
}
switch ([event type]) {
@@ -871,13 +890,21 @@ - (bool) handleEventLocked:(NSEvent *)event
case kVK_Option:
if (!!(modifiers & NSEventModifierFlagOption)) {
-[self toggleKey:Q_KEY_CODE_ALT];
+if ([self isSwapOptionCommandEnabled]) {
+[self toggleKey:Q_KEY_CODE_META_L];
+} else {
+[self toggleKey:Q_KEY_CODE_ALT];
+}
}
break;
case kVK_RightOption:
if (!!(modifiers & NSEventModifierFlagOption)) {
-[self toggleKey:Q_KEY_CODE_ALT_R];
+if ([self isSwapOptionCommandEnabled]) {
+[self toggleKey:Q_KEY_CODE_META_R];
+} else {
+[self toggleKey:Q_KEY_CODE_ALT_R];
+}
}
break;
@@ -885,14 +912,22 @@ - (bool) handleEventLocked:(NSEvent *)event
[PATCH v5 1/2] ui/cocoa: capture all keys and combos when mouse is grabbed
From: Gustavo Noronha Silva
Applications such as Gnome may use Alt-Tab and Super-Tab for different
purposes, some use Ctrl-arrows so we want to allow qemu to handle
everything when it captures the mouse/keyboard.
However, Mac OS handles some combos like Command-Tab and Ctrl-arrows
at an earlier part of the event handling chain, not letting qemu see it.
We add a global Event Tap that allows qemu to see all events when the
mouse is grabbed. Note that this requires additional permissions.
See:
https://developer.apple.com/documentation/coregraphics/1454426-cgeventtapcreate?language=objc#discussion
https://support.apple.com/en-in/guide/mac-help/mh32356/mac
Acked-by: Markus Armbruster
Reviewed-by: Akihiko Odaki
Signed-off-by: Gustavo Noronha Silva
---
qapi/ui.json| 16
qemu-options.hx | 3 +++
ui/cocoa.m | 65 -
3 files changed, 83 insertions(+), 1 deletion(-)
diff --git a/qapi/ui.json b/qapi/ui.json
index fd9677d48e..b2d27ce167 100644
--- a/qapi/ui.json
+++ b/qapi/ui.json
@@ -1092,6 +1092,21 @@
{ 'struct' : 'DisplayCurses',
'data': { '*charset' : 'str' } }
+##
+# @DisplayCocoa:
+#
+# Cocoa display options.
+#
+# @full-grab: Capture all key presses, including system combos. This
+# requires accessibility permissions, since it performs
+# a global grab on key events. (default: off)
+# See https://support.apple.com/en-in/guide/mac-help/mh32356/mac
+#
+# Since: 6.1
+##
+{ 'struct' : 'DisplayCocoa',
+ 'data': { '*full-grab' : 'bool' } }
+
##
# @DisplayType:
#
@@ -1165,6 +1180,7 @@
'discriminator' : 'type',
'data': {
'gtk': { 'type': 'DisplayGTK', 'if': 'defined(CONFIG_GTK)' },
+ 'cocoa': { 'type': 'DisplayCocoa', 'if': 'defined(CONFIG_COCOA)' },
'curses': { 'type': 'DisplayCurses', 'if': 'defined(CONFIG_CURSES)' },
'egl-headless': { 'type': 'DisplayEGLHeadless',
'if': 'defined(CONFIG_OPENGL) && defined(CONFIG_GBM)' }
diff --git a/qemu-options.hx b/qemu-options.hx
index 8965dabc83..8308d28d1f 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -1796,6 +1796,9 @@ DEF("display", HAS_ARG, QEMU_OPTION_display,
#if defined(CONFIG_CURSES)
"-display curses[,charset=]\n"
#endif
+#if defined(CONFIG_COCOA)
+"-display cocoa[,full_grab=on|off]\n"
+#endif
#if defined(CONFIG_OPENGL)
"-display egl-headless[,rendernode=]\n"
#endif
diff --git a/ui/cocoa.m b/ui/cocoa.m
index 9f72844b07..d9d98aa9de 100644
--- a/ui/cocoa.m
+++ b/ui/cocoa.m
@@ -309,11 +309,13 @@ @interface QemuCocoaView : NSView
BOOL isMouseGrabbed;
BOOL isFullscreen;
BOOL isAbsoluteEnabled;
+CFMachPortRef eventsTap;
}
- (void) switchSurface:(pixman_image_t *)image;
- (void) grabMouse;
- (void) ungrabMouse;
- (void) toggleFullScreen:(id)sender;
+- (void) setFullGrab:(id)sender;
- (void) handleMonitorInput:(NSEvent *)event;
- (bool) handleEvent:(NSEvent *)event;
- (bool) handleEventLocked:(NSEvent *)event;
@@ -336,6 +338,19 @@ - (void) raiseAllKeys;
QemuCocoaView *cocoaView;
+static CGEventRef handleTapEvent(CGEventTapProxy proxy, CGEventType type,
CGEventRef cgEvent, void *userInfo)
+{
+QemuCocoaView *cocoaView = (QemuCocoaView*) userInfo;
+NSEvent* event = [NSEvent eventWithCGEvent:cgEvent];
+if ([cocoaView isMouseGrabbed] && [cocoaView handleEvent:event]) {
+COCOA_DEBUG("Global events tap: qemu handled the event, capturing!\n");
+return NULL;
+}
+COCOA_DEBUG("Global events tap: qemu did not handle the event, letting it
through...\n");
+
+return cgEvent;
+}
+
@implementation QemuCocoaView
- (id)initWithFrame:(NSRect)frameRect
{
@@ -361,6 +376,11 @@ - (void) dealloc
}
qkbd_state_free(kbd);
+
+if (eventsTap) {
+CFRelease(eventsTap);
+}
+
[super dealloc];
}
@@ -635,6 +655,36 @@ - (void) toggleFullScreen:(id)sender
}
}
+- (void) setFullGrab:(id)sender
+{
+COCOA_DEBUG("QemuCocoaView: setFullGrab\n");
+
+CGEventMask mask = CGEventMaskBit(kCGEventKeyDown) |
CGEventMaskBit(kCGEventKeyUp) | CGEventMaskBit(kCGEventFlagsChanged);
+eventsTap = CGEventTapCreate(kCGHIDEventTap, kCGHeadInsertEventTap,
kCGEventTapOptionDefault,
+ mask, handleTapEvent, self);
+if (!eventsTap) {
+warn_report("Could not create event tap, system key combos will not be
captured.\n");
+return;
+} else {
+COCOA_DEBUG("Global events tap created! Will capture system key
combos.\n");
+}
+
+CFRunLoopRef runLoop = CFRunLoopGetCurrent();
+if (!runLoop) {
+warn_report("Could not obtain current CF RunLoop, system key combos
will not be captured.\n");
+return;
+}
+
+CFRunLoopSourceRef tapEventsSrc =
CFMachPortCreateRunLoopSource(kCFAllocatorDefault, eventsTap, 0);
+if (!tapEventsSrc ) {
+warn_report("Could not obtain current CF RunLoop, system
[PATCH v5 0/2] cocoa: keyboard quality of life
From: Gustavo Noronha Silva v5 addresses the casting issue pointed out by Akihiko Odaki. Sorry it took me so long to update the patches, but here they are! Hopefully we can get them in now ;D Btw I also changed my email address slightly (.dev.br instead of .eti.br). - This series adds two new options to the cocoa display: - full-grab causes it to use a global tap to steal system combos away from Mac OS X, so they can be handled by the VM - swap-option-command does what it says on the tin; while that is something you can do at the Mac OS X level or even supported by some keyboards, it is much more convenient to have qemu put Meta/Super and Alt where they belong if you are running a non-Mac VM Both are off by default. For full-grab in particular, it is off also because unfortunately it needs accessibility permissions for input grabbing, so it requires more deliberate action by the user anyway. Gustavo Noronha Silva (2): ui/cocoa: capture all keys and combos when mouse is grabbed ui/cocoa: add option to swap Option and Command qapi/ui.json| 22 + qemu-options.hx | 4 ++ ui/cocoa.m | 129 3 files changed, 146 insertions(+), 9 deletions(-) -- 2.30.1 (Apple Git-130)
Re: [PATCH RESEND v2 0/3] To add HMP interface to dump PCI MSI-X table/PBA
On 7/13/21 1:59 PM, Michael S. Tsirkin wrote:
> On Mon, Jul 12, 2021 at 04:58:09PM -0700, Dongli Zhang wrote:
>> I have just rebased the v2 patchset on top of most recent qemu to resend.
>>
>> This patch is to introduce the new HMP command to dump the MSI-X table/PBA.
>>
>> Here is the RFC v1:
>>
>> https://urldefense.com/v3/__https://lists.gnu.org/archive/html/qemu-devel/2021-04/msg04673.html__;!!ACWV5N9M2RV99hQ!a_4RXoxWC3ppSNDk4TFH5-UjOMa9DsHfWF3x814Yf6urzW3rxZrwhWCU2zTFVDD57lE$
>>
>>
>> The idea was inspired by below discussion:
>>
>> https://urldefense.com/v3/__https://lists.gnu.org/archive/html/qemu-devel/2021-03/msg09020.html__;!!ACWV5N9M2RV99hQ!a_4RXoxWC3ppSNDk4TFH5-UjOMa9DsHfWF3x814Yf6urzW3rxZrwhWCU2zTFAnnr09M$
>>
>
> Fails build for microblaze:
>
> /scm/qemu/build/../softmmu/qdev-monitor.c:1030: undefined reference to
> `msix_dump_info'
> collect2: error: ld returned 1 exit status
> [2525/8445] Compiling C object
> libqemu-microblaze-softmmu.fa.p/meson-generated_.._qapi_qapi-visit-misc-target.c.o
>
I am so sorry for the build error. I will add below to the hw/pci/pci-stub.c.
void msix_dump_info(Monitor *mon, PCIDevice *dev, Error **errp)
{
monitor_printf(mon, "PCI devices not supported\n");
}
I will send out v3.
I should test for all arch instead of only x86_64-softmmu in the future.
Thank you very much!
Dongli Zhang
Re: [PATCH v2 2/5] hw/nvme: use symbolic names for registers
On 7/14/21 12:12 AM, Philippe Mathieu-Daudé wrote:
> On 7/13/21 9:24 PM, Klaus Jensen wrote:
>> From: Klaus Jensen
>>
>> Add the NvmeBarRegs enum and use these instead of explicit register
>> offsets.
>>
>> Signed-off-by: Klaus Jensen
>> ---
>> include/block/nvme.h | 27 +++
>> hw/nvme/ctrl.c | 44 ++--
>> 2 files changed, 49 insertions(+), 22 deletions(-)
>>
>> diff --git a/include/block/nvme.h b/include/block/nvme.h
>> index 84053b68b987..082d4bddbf9f 100644
>> --- a/include/block/nvme.h
>> +++ b/include/block/nvme.h
>> @@ -31,6 +31,33 @@ typedef struct QEMU_PACKED NvmeBar {
>> uint8_t css[484];
>> } NvmeBar;
>>
>> +enum NvmeBarRegs {
>> +NVME_REG_CAP = 0x0,
>> +NVME_REG_VS = 0x8,
>> +NVME_REG_INTMS = 0xc,
>> +NVME_REG_INTMC = 0x10,
>> +NVME_REG_CC = 0x14,
>> +NVME_REG_CSTS= 0x1c,
>> +NVME_REG_NSSR= 0x20,
>> +NVME_REG_AQA = 0x24,
>> +NVME_REG_ASQ = 0x28,
>> +NVME_REG_ACQ = 0x30,
>> +NVME_REG_CMBLOC = 0x38,
>> +NVME_REG_CMBSZ = 0x3c,
>> +NVME_REG_BPINFO = 0x40,
>> +NVME_REG_BPRSEL = 0x44,
>> +NVME_REG_BPMBL = 0x48,
>> +NVME_REG_CMBMSC = 0x50,
>> +NVME_REG_CMBSTS = 0x58,
>> +NVME_REG_PMRCAP = 0xe00,
>> +NVME_REG_PMRCTL = 0xe04,
>> +NVME_REG_PMRSTS = 0xe08,
>> +NVME_REG_PMREBS = 0xe0c,
>> +NVME_REG_PMRSWTP = 0xe10,
>> +NVME_REG_PMRMSCL = 0xe14,
>> +NVME_REG_PMRMSCU = 0xe18,
>> +};
>> +
>> enum NvmeCapShift {
>> CAP_MQES_SHIFT = 0,
>> CAP_CQR_SHIFT = 16,
>> diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
>> index 28299c6f3764..8c305315f41c 100644
>> --- a/hw/nvme/ctrl.c
>> +++ b/hw/nvme/ctrl.c
>> @@ -5740,7 +5740,7 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr offset,
>> uint64_t data,
>> }
>>
>> switch (offset) {
>> -case 0xc: /* INTMS */
>> +case NVME_REG_INTMS:
>
> What about using offsetof(NvmeBar, intms) instead?
BTW I'm not suggesting this is better, I just wonder how we can avoid
to duplicate the definitions. Alternative is declaring:
enum NvmeBarRegs {
NVME_REG_CAP = offsetof(NvmeBar, cap),
NVME_REG_VS = offsetof(NvmeBar, vs),
...
Or keeping your patch.
[PULL 10/23] docs: Add documentation for vhost based RNG implementation
From: Mathieu Poirier Add description and example for the vhost-user based RNG implementation. Tailored on Viresh Kumar's vhost-user-i2c documentation. Signed-off-by: Mathieu Poirier Message-Id: <20210710005929.1702431-5-mathieu.poir...@linaro.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- docs/tools/index.rst | 1 + docs/tools/vhost-user-rng.rst | 74 +++ 2 files changed, 75 insertions(+) create mode 100644 docs/tools/vhost-user-rng.rst diff --git a/docs/tools/index.rst b/docs/tools/index.rst index d923834a73..9d80fa89ec 100644 --- a/docs/tools/index.rst +++ b/docs/tools/index.rst @@ -15,5 +15,6 @@ Contents: qemu-nbd qemu-pr-helper qemu-trace-stap + vhost-user-rng virtfs-proxy-helper virtiofsd diff --git a/docs/tools/vhost-user-rng.rst b/docs/tools/vhost-user-rng.rst new file mode 100644 index 00..7f69d7bb3c --- /dev/null +++ b/docs/tools/vhost-user-rng.rst @@ -0,0 +1,74 @@ +QEMU vhost-user-rng - RNG emulation backend +=== + +Synopsis + + +**vhost-user-rng** [*OPTIONS*] + +Description +--- + +This program is a vhost-user backend that emulates a VirtIO random number +generator (RNG). It uses the host's random number generator pool, +/dev/urandom by default but configurable at will, to satisfy requests from +guests. + +This program is designed to work with QEMU's ``-device +vhost-user-rng-pci`` but should work with any virtual machine monitor +(VMM) that supports vhost-user. See the Examples section below. + +Options +--- + +.. program:: vhost-user-rng + +.. option:: -h, --help + + Print help. + +.. option:: -v, --verbose + + Increase verbosity of output + +.. option:: -s, --socket-path=PATH + + Listen on vhost-user UNIX domain socket at PATH. Incompatible with --fd. + +.. option:: -f, --fd=FDNUM + + Accept connections from vhost-user UNIX domain socket file descriptor FDNUM. + The file descriptor must already be listening for connections. + Incompatible with --socket-path. + +.. option:: -p, --period + + Rate, in milliseconds, at which the RNG hardware can generate random data. + Used in conjunction with the --max-bytes option. + +.. option:: -m, --max-bytes + + In conjuction with the --period parameter, provides the maximum number of byte + per milliseconds a RNG device can generate. + +Examples + + +The daemon should be started first: + +:: + + host# vhost-user-rng --socket-path=rng.sock --period=1000 --max-bytes=4096 + +The QEMU invocation needs to create a chardev socket the device can +use to communicate as well as share the guests memory over a memfd. + +:: + + host# qemu-system \ + -chardev socket,path=$(PATH)/rng.sock,id=rng0 \ + -device vhost-user-rng-pci,chardev=rng0 \ + -m 4096 \ + -object memory-backend-file,id=mem,size=4G,mem-path=/dev/shm,share=on \ + -numa node,memdev=mem \ + ... -- MST
[PULL 04/23] bios-tables-test: Allow changes in DSDT ACPI tables
From: Julia Suvorova All DSDT Q35 tables will be modified because ACPI hot-plug is enabled by default. Signed-off-by: Julia Suvorova Reviewed-by: Igor Mammedov Reviewed-by: Marcel Apfelbaum Message-Id: <20210713004205.775386-5-jus...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 11 +++ 1 file changed, 11 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..c5167f48af 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,12 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/q35/DSDT", +"tests/data/acpi/q35/DSDT.tis", +"tests/data/acpi/q35/DSDT.bridge", +"tests/data/acpi/q35/DSDT.mmio64", +"tests/data/acpi/q35/DSDT.ipmibt", +"tests/data/acpi/q35/DSDT.cphp", +"tests/data/acpi/q35/DSDT.memhp", +"tests/data/acpi/q35/DSDT.acpihmat", +"tests/data/acpi/q35/DSDT.numamem", +"tests/data/acpi/q35/DSDT.dimmpxm", +"tests/data/acpi/q35/DSDT.nohpet", -- MST
Re: [PATCH v2 4/5] hw/nvme: fix mmio read
On 7/13/21 9:24 PM, Klaus Jensen wrote:
> From: Klaus Jensen
>
> The new PMR test unearthed a long-standing issue with MMIO reads on
> big-endian hosts.
>
> Fix this by unconditionally storing all controller registers in little
> endian.
>
> Cc: Gollu Appalanaidu
> Reported-by: Peter Maydell
> Signed-off-by: Klaus Jensen
> ---
> hw/nvme/ctrl.c | 304 -
> 1 file changed, 174 insertions(+), 130 deletions(-)
>
> diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
> index 0449cc4dee9b..ddac9344a74e 100644
> --- a/hw/nvme/ctrl.c
> +++ b/hw/nvme/ctrl.c
> @@ -439,10 +439,12 @@ static uint8_t nvme_sq_empty(NvmeSQueue *sq)
>
> static void nvme_irq_check(NvmeCtrl *n)
> {
> +uint32_t intms = le32_to_cpu(n->bar.intms);
> +
> if (msix_enabled(&(n->parent_obj))) {
> return;
> }
> -if (~n->bar.intms & n->irq_status) {
> +if (~intms & n->irq_status) {
> pci_irq_assert(>parent_obj);
> } else {
> pci_irq_deassert(>parent_obj);
> @@ -1289,7 +1291,7 @@ static void nvme_post_cqes(void *opaque)
> if (ret) {
> trace_pci_nvme_err_addr_write(addr);
> trace_pci_nvme_err_cfs();
> -n->bar.csts = NVME_CSTS_FAILED;
> +n->bar.csts = cpu_to_le64(NVME_CSTS_FAILED);
The load/store API is safer than the cpu_to_X() one because
it removes alignment problems. Here it becomes:
stq_le_p(>bar.csts, NVME_CSTS_FAILED);
> break;
> }
> QTAILQ_REMOVE(>req_list, req, entry);
> @@ -4022,7 +4024,7 @@ static uint16_t nvme_create_sq(NvmeCtrl *n, NvmeRequest
> *req)
> trace_pci_nvme_err_invalid_create_sq_sqid(sqid);
> return NVME_INVALID_QID | NVME_DNR;
> }
> -if (unlikely(!qsize || qsize > NVME_CAP_MQES(n->bar.cap))) {
> +if (unlikely(!qsize || qsize > NVME_CAP_MQES(le64_to_cpu(n->bar.cap {
And here:
if (unlikely(!qsize || qsize > NVME_CAP_MQES(ldq_le_p(>bar.cap {
> trace_pci_nvme_err_invalid_create_sq_size(qsize);
> return NVME_MAX_QSIZE_EXCEEDED | NVME_DNR;
> }
However for the BAR is likely aligned, so using the cpu_to() API
shouldn't be a problem until we try to deprecate/remove it.
[PULL 06/23] bios-tables-test: Update golden binaries
From: Julia Suvorova
Add ACPI hot-plug registers to DSDT Q35 tables.
Changes in the tables:
+Scope (_SB.PCI0)
+{
+OperationRegion (PCST, SystemIO, 0x0CC4, 0x08)
+Field (PCST, DWordAcc, NoLock, WriteAsZeros)
+{
+PCIU, 32,
+PCID, 32
+}
+
+OperationRegion (SEJ, SystemIO, 0x0CCC, 0x04)
+Field (SEJ, DWordAcc, NoLock, WriteAsZeros)
+{
+B0EJ, 32
+}
+
+OperationRegion (BNMR, SystemIO, 0x0CD4, 0x08)
+Field (BNMR, DWordAcc, NoLock, WriteAsZeros)
+{
+BNUM, 32,
+PIDX, 32
+}
+
+Mutex (BLCK, 0x00)
+Method (PCEJ, 2, NotSerialized)
+{
+Acquire (BLCK, 0x)
+BNUM = Arg0
+B0EJ = (One << Arg1)
+Release (BLCK)
+Return (Zero)
+}
+
+Method (AIDX, 2, NotSerialized)
+{
+Acquire (BLCK, 0x)
+BNUM = Arg0
+PIDX = (One << Arg1)
+Local0 = PIDX /* \_SB_.PCI0.PIDX */
+Release (BLCK)
+Return (Local0)
+}
+
+Method (PDSM, 6, Serialized)
+{
+If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /*
Device Labeling Interface */))
+{
+Local0 = AIDX (Arg4, Arg5)
+If ((Arg2 == Zero))
+{
+If ((Arg1 == 0x02))
+{
+If (!((Local0 == Zero) | (Local0 == 0x)))
+{
+Return (Buffer (One)
+{
+ 0x81
// .
+})
+}
+}
+
+Return (Buffer (One)
+{
+ 0x00 // .
+})
+}
+ElseIf ((Arg2 == 0x07))
+{
+Local1 = Package (0x02)
+{
+Zero,
+""
+}
+Local1 [Zero] = Local0
+Return (Local1)
+}
+}
+}
+}
+
...
Scope (_GPE)
{
Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID
+Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE,
xx=0x00-0xFF
+{
+Acquire (\_SB.PCI0.BLCK, 0x)
+\_SB.PCI0.PCNT ()
+Release (\_SB.PCI0.BLCK)
+}
...
+
+Device (PHPR)
+{
+Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID:
Hardware ID
+Name (_UID, "PCI Hotplug resources") // _UID: Unique ID
+Name (_STA, 0x0B) // _STA: Status
+Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+{
+IO (Decode16,
+0x0CC4, // Range Minimum
+0x0CC4, // Range Maximum
+0x01, // Alignment
+0x18, // Length
+)
+})
+}
}
...
And if there is a port in configuration:
Device (S10)
{
Name (_ADR, 0x0002) // _ADR: Address
+Name (BSEL, Zero)
+Device (S00)
+{
+Name (_SUN, Zero) // _SUN: Slot User Number
+Name (_ADR, Zero) // _ADR: Address
+Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device,
x=0-9
+{
+PCEJ (BSEL, _SUN)
+}
+
+Method (_DSM, 4, Serialized) // _DSM: Device-Specific
Method
+{
+Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN))
+}
+}
+
...
+Method (DVNT, 2, NotSerialized)
+{
+If ((Arg0 & One))
+{
+Notify (S00, Arg1)
+}
...
Signed-off-by: Julia Suvorova
Message-Id: <20210713004205.775386-7-jus...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/qtest/bios-tables-test-allowed-diff.h | 11 ---
tests/data/acpi/q35/DSDT| Bin 7859 -> 8289 bytes
tests/data/acpi/q35/DSDT.acpihmat | Bin 9184 -> 9614 bytes
tests/data/acpi/q35/DSDT.bridge | Bin 7877 -> 11003 bytes
tests/data/acpi/q35/DSDT.cphp | Bin 8323 -> 8753 bytes
tests/data/acpi/q35/DSDT.dimmpxm| Bin 9513 -> 9943 bytes
tests/data/acpi/q35/DSDT.ipmibt | Bin 7934 -> 8364 bytes
Re: [PATCH v2 2/5] hw/nvme: use symbolic names for registers
On 7/13/21 9:24 PM, Klaus Jensen wrote:
> From: Klaus Jensen
>
> Add the NvmeBarRegs enum and use these instead of explicit register
> offsets.
>
> Signed-off-by: Klaus Jensen
> ---
> include/block/nvme.h | 27 +++
> hw/nvme/ctrl.c | 44 ++--
> 2 files changed, 49 insertions(+), 22 deletions(-)
>
> diff --git a/include/block/nvme.h b/include/block/nvme.h
> index 84053b68b987..082d4bddbf9f 100644
> --- a/include/block/nvme.h
> +++ b/include/block/nvme.h
> @@ -31,6 +31,33 @@ typedef struct QEMU_PACKED NvmeBar {
> uint8_t css[484];
> } NvmeBar;
>
> +enum NvmeBarRegs {
> +NVME_REG_CAP = 0x0,
> +NVME_REG_VS = 0x8,
> +NVME_REG_INTMS = 0xc,
> +NVME_REG_INTMC = 0x10,
> +NVME_REG_CC = 0x14,
> +NVME_REG_CSTS= 0x1c,
> +NVME_REG_NSSR= 0x20,
> +NVME_REG_AQA = 0x24,
> +NVME_REG_ASQ = 0x28,
> +NVME_REG_ACQ = 0x30,
> +NVME_REG_CMBLOC = 0x38,
> +NVME_REG_CMBSZ = 0x3c,
> +NVME_REG_BPINFO = 0x40,
> +NVME_REG_BPRSEL = 0x44,
> +NVME_REG_BPMBL = 0x48,
> +NVME_REG_CMBMSC = 0x50,
> +NVME_REG_CMBSTS = 0x58,
> +NVME_REG_PMRCAP = 0xe00,
> +NVME_REG_PMRCTL = 0xe04,
> +NVME_REG_PMRSTS = 0xe08,
> +NVME_REG_PMREBS = 0xe0c,
> +NVME_REG_PMRSWTP = 0xe10,
> +NVME_REG_PMRMSCL = 0xe14,
> +NVME_REG_PMRMSCU = 0xe18,
> +};
> +
> enum NvmeCapShift {
> CAP_MQES_SHIFT = 0,
> CAP_CQR_SHIFT = 16,
> diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
> index 28299c6f3764..8c305315f41c 100644
> --- a/hw/nvme/ctrl.c
> +++ b/hw/nvme/ctrl.c
> @@ -5740,7 +5740,7 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr offset,
> uint64_t data,
> }
>
> switch (offset) {
> -case 0xc: /* INTMS */
> +case NVME_REG_INTMS:
What about using offsetof(NvmeBar, intms) instead?
[PULL 16/23] hw/arm/virt: Add default_bus_bypass_iommu machine option
From: Xingang Wang
Add a default_bus_bypass_iommu machine option to enable/disable
bypass_iommu for default root bus. The option is disabled by
default and can be enabled with:
$QEMU -machine virt,iommu=smmuv3,default_bus_bypass_iommu=true
Signed-off-by: Xingang Wang
Message-Id: <1625748919-52456-4-git-send-email-wangxinga...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/arm/virt.h | 1 +
hw/arm/virt.c | 26 ++
2 files changed, 27 insertions(+)
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 921416f918..9661c46699 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -147,6 +147,7 @@ struct VirtMachineState {
OnOffAuto acpi;
VirtGICType gic_version;
VirtIOMMUType iommu;
+bool default_bus_bypass_iommu;
VirtMSIControllerType msi_controller;
uint16_t virtio_iommu_bdf;
struct arm_boot_info bootinfo;
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 93ab9d21ea..81eda46b0b 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1367,6 +1367,7 @@ static void create_pcie(VirtMachineState *vms)
}
pci = PCI_HOST_BRIDGE(dev);
+pci->bypass_iommu = vms->default_bus_bypass_iommu;
vms->bus = pci->bus;
if (vms->bus) {
for (i = 0; i < nb_nics; i++) {
@@ -2322,6 +2323,21 @@ static void virt_set_iommu(Object *obj, const char
*value, Error **errp)
}
}
+static bool virt_get_default_bus_bypass_iommu(Object *obj, Error **errp)
+{
+VirtMachineState *vms = VIRT_MACHINE(obj);
+
+return vms->default_bus_bypass_iommu;
+}
+
+static void virt_set_default_bus_bypass_iommu(Object *obj, bool value,
+ Error **errp)
+{
+VirtMachineState *vms = VIRT_MACHINE(obj);
+
+vms->default_bus_bypass_iommu = value;
+}
+
static CpuInstanceProperties
virt_cpu_index_to_props(MachineState *ms, unsigned cpu_index)
{
@@ -2661,6 +2677,13 @@ static void virt_machine_class_init(ObjectClass *oc,
void *data)
"Set the IOMMU type. "
"Valid values are none and smmuv3");
+object_class_property_add_bool(oc, "default_bus_bypass_iommu",
+ virt_get_default_bus_bypass_iommu,
+ virt_set_default_bus_bypass_iommu);
+object_class_property_set_description(oc, "default_bus_bypass_iommu",
+ "Set on/off to enable/disable "
+ "bypass_iommu for default root bus");
+
object_class_property_add_bool(oc, "ras", virt_get_ras,
virt_set_ras);
object_class_property_set_description(oc, "ras",
@@ -2728,6 +2751,9 @@ static void virt_instance_init(Object *obj)
/* Default disallows iommu instantiation */
vms->iommu = VIRT_IOMMU_NONE;
+/* The default root bus is attached to iommu by default */
+vms->default_bus_bypass_iommu = false;
+
/* Default disallows RAS instantiation */
vms->ras = false;
--
MST
[PULL 18/23] hw/pci: Add pci_bus_range() to get PCI bus number range
From: Xingang Wang
This helps to get the min and max bus number of a PCI bus hierarchy.
Signed-off-by: Xingang Wang
Reviewed-by: Eric Auger
Message-Id: <1625748919-52456-6-git-send-email-wangxinga...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pci.h | 1 +
hw/pci/pci.c | 16
2 files changed, 17 insertions(+)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index f4d51b672b..d0f4266e37 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -450,6 +450,7 @@ static inline PCIBus *pci_get_bus(const PCIDevice *dev)
return PCI_BUS(qdev_get_parent_bus(DEVICE(dev)));
}
int pci_bus_num(PCIBus *s);
+void pci_bus_range(PCIBus *bus, int *min_bus, int *max_bus);
static inline int pci_dev_bus_num(const PCIDevice *dev)
{
return pci_bus_num(pci_get_bus(dev));
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 27d588e268..23d2ae2ab2 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -537,6 +537,22 @@ int pci_bus_num(PCIBus *s)
return PCI_BUS_GET_CLASS(s)->bus_num(s);
}
+/* Returns the min and max bus numbers of a PCI bus hierarchy */
+void pci_bus_range(PCIBus *bus, int *min_bus, int *max_bus)
+{
+int i;
+*min_bus = *max_bus = pci_bus_num(bus);
+
+for (i = 0; i < ARRAY_SIZE(bus->devices); ++i) {
+PCIDevice *dev = bus->devices[i];
+
+if (dev && PCI_DEVICE_GET_CLASS(dev)->is_bridge) {
+*min_bus = MIN(*min_bus, dev->config[PCI_SECONDARY_BUS]);
+*max_bus = MAX(*max_bus, dev->config[PCI_SUBORDINATE_BUS]);
+}
+}
+}
+
int pci_bus_numa_node(PCIBus *bus)
{
return PCI_BUS_GET_CLASS(bus)->numa_node(bus);
--
MST
[PULL 22/23] docs: Add documentation for iommu bypass
From: Xingang Wang Signed-off-by: Xingang Wang Message-Id: <1625748919-52456-10-git-send-email-wangxinga...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- docs/bypass-iommu.txt | 89 +++ 1 file changed, 89 insertions(+) create mode 100644 docs/bypass-iommu.txt diff --git a/docs/bypass-iommu.txt b/docs/bypass-iommu.txt new file mode 100644 index 00..e6677bddd3 --- /dev/null +++ b/docs/bypass-iommu.txt @@ -0,0 +1,89 @@ +BYPASS IOMMU PROPERTY += + +Description +=== +Traditionally, there is a global switch to enable/disable vIOMMU. All +devices in the system can only support go through vIOMMU or not, which +is not flexible. We introduce this bypass iommu property to support +coexist of devices go through vIOMMU and devices not. This is useful to +passthrough devices with no-iommu mode and devices go through vIOMMU in +the same virtual machine. + +PCI host bridges have a bypass_iommu property. This property is used to +determine whether the devices attached on the PCI host bridge will bypass +virtual iommu. The bypass_iommu property is valid only when there is a +virtual iommu in the system, it is implemented to allow some devices to +bypass vIOMMU. When bypass_iommu property is not set for a host bridge, +the attached devices will go through vIOMMU by default. + +Usage += +The bypass iommu feature support PXB host bridge and default main host +bridge, we add a bypass_iommu property for PXB and default_bus_bypass_iommu +for machine. Note that default_bus_bypass_iommu is available only when +the 'q35' machine type on x86 architecture and the 'virt' machine type +on AArch64. Other machine types do not support bypass iommu for default +root bus. + +1. The following is the bypass iommu options: + (1) PCI expander bridge + qemu -device pxb-pcie,bus_nr=0x10,addr=0x1,bypass_iommu=true + (2) Arm default host bridge + qemu -machine virt,iommu=smmuv3,default_bus_bypass_iommu=true + (3) X86 default root bus bypass iommu: + qemu -machine q35,default_bus_bypass_iommu=true + +2. Here is the detailed qemu command line for 'virt' machine with PXB on +AArch64: + +qemu-system-aarch64 \ + -machine virt,kernel_irqchip=on,iommu=smmuv3,default_bus_bypass_iommu=true \ + -device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3.0x1 \ + -device pxb-pcie,bus_nr=0x20,id=pci.20,bus=pcie.0,addr=0x3.0x2,bypass_iommu=true \ + +And we got: + - a default host bridge which bypass SMMUv3 + - a pxb host bridge which go through SMMUv3 + - a pxb host bridge which bypass SMMUv3 + +3. Here is the detailed qemu command line for 'q35' machine with PXB on +x86 architecture: + +qemu-system-x86_64 \ + -machine q35,accel=kvm,default_bus_bypass_iommu=true \ + -device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3 \ + -device pxb-pcie,bus_nr=0x20,id=pci.20,bus=pcie.0,addr=0x4,bypass_iommu=true \ + -device intel-iommu \ + +And we got: + - a default host bridge which bypass iommu + - a pxb host bridge which go through iommu + - a pxb host bridge which bypass iommu + +Limitations +=== +There might be potential security risk when devices bypass iommu, because +devices might send malicious dma request to virtual machine if there is no +iommu isolation. So it would be necessary to only bypass iommu for trusted +device. + +Implementation +== +The bypass iommu feature includes: + - Address space + Add bypass iommu property check of PCI Host and do not get iommu address + space for devices bypass iommu. + - Arm SMMUv3 support + We traverse all PCI root bus and get bus number ranges, then build explicit + RID mapping for devices which do not bypass iommu. + - X86 IOMMU support + To support Intel iommu, we traverse all PCI host bridge and get information + of devices which do not bypass iommu, then fill the DMAR drhd struct with + explicit device scope info. To support AMD iommu, add check of bypass iommu + when traverse the PCI hsot bridge. + - Machine and PXB options + We add bypass iommu options in machine option for default root bus, and add + option for PXB also. Note that the default value of bypass iommu is false, + so that the devices will by default go through iommu if there exist one. + -- MST
[PULL 07/23] vhost-user-rng: Add vhost-user-rng implementation
From: Mathieu Poirier
Following in the footsteps of what whas done for vhost-user-i2c
and virtiofsd, introduce a random number generator (RNG) backend
that communicates with a vhost-user server to retrieve entropy.
That way another VMM could be using the same vhost-user daemon and
avoid having to write yet another RNG driver.
Signed-off-by: Mathieu Poirier
Message-Id: <20210710005929.1702431-2-mathieu.poir...@linaro.org>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/virtio/vhost-user-rng.h | 33
hw/virtio/vhost-user-rng.c | 294 +
hw/virtio/Kconfig | 5 +
hw/virtio/meson.build | 1 +
4 files changed, 333 insertions(+)
create mode 100644 include/hw/virtio/vhost-user-rng.h
create mode 100644 hw/virtio/vhost-user-rng.c
diff --git a/include/hw/virtio/vhost-user-rng.h
b/include/hw/virtio/vhost-user-rng.h
new file mode 100644
index 00..071539996d
--- /dev/null
+++ b/include/hw/virtio/vhost-user-rng.h
@@ -0,0 +1,33 @@
+/*
+ * Vhost-user RNG virtio device
+ *
+ * Copyright (c) 2021 Mathieu Poirier
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef _QEMU_VHOST_USER_RNG_H
+#define _QEMU_VHOST_USER_RNG_H
+
+#include "hw/virtio/virtio.h"
+#include "hw/virtio/vhost.h"
+#include "hw/virtio/vhost-user.h"
+#include "chardev/char-fe.h"
+
+#define TYPE_VHOST_USER_RNG "vhost-user-rng"
+OBJECT_DECLARE_SIMPLE_TYPE(VHostUserRNG, VHOST_USER_RNG)
+
+struct VHostUserRNG {
+/*< private >*/
+VirtIODevice parent;
+CharBackend chardev;
+struct vhost_virtqueue *vhost_vq;
+struct vhost_dev vhost_dev;
+VhostUserState vhost_user;
+VirtQueue *req_vq;
+bool connected;
+
+/*< public >*/
+};
+
+#endif /* _QEMU_VHOST_USER_RNG_H */
diff --git a/hw/virtio/vhost-user-rng.c b/hw/virtio/vhost-user-rng.c
new file mode 100644
index 00..3825266bdf
--- /dev/null
+++ b/hw/virtio/vhost-user-rng.c
@@ -0,0 +1,294 @@
+/*
+ * Vhost-user RNG virtio device
+ *
+ * Copyright (c) 2021 Mathieu Poirier
+ *
+ * Implementation seriously tailored on vhost-user-i2c.c
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/qdev-properties.h"
+#include "hw/virtio/virtio-bus.h"
+#include "hw/virtio/vhost-user-rng.h"
+#include "qemu/error-report.h"
+#include "standard-headers/linux/virtio_ids.h"
+
+static void vu_rng_start(VirtIODevice *vdev)
+{
+VHostUserRNG *rng = VHOST_USER_RNG(vdev);
+BusState *qbus = BUS(qdev_get_parent_bus(DEVICE(vdev)));
+VirtioBusClass *k = VIRTIO_BUS_GET_CLASS(qbus);
+int ret;
+int i;
+
+if (!k->set_guest_notifiers) {
+error_report("binding does not support guest notifiers");
+return;
+}
+
+ret = vhost_dev_enable_notifiers(>vhost_dev, vdev);
+if (ret < 0) {
+error_report("Error enabling host notifiers: %d", -ret);
+return;
+}
+
+ret = k->set_guest_notifiers(qbus->parent, rng->vhost_dev.nvqs, true);
+if (ret < 0) {
+error_report("Error binding guest notifier: %d", -ret);
+goto err_host_notifiers;
+}
+
+rng->vhost_dev.acked_features = vdev->guest_features;
+ret = vhost_dev_start(>vhost_dev, vdev);
+if (ret < 0) {
+error_report("Error starting vhost-user-rng: %d", -ret);
+goto err_guest_notifiers;
+}
+
+/*
+ * guest_notifier_mask/pending not used yet, so just unmask
+ * everything here. virtio-pci will do the right thing by
+ * enabling/disabling irqfd.
+ */
+for (i = 0; i < rng->vhost_dev.nvqs; i++) {
+vhost_virtqueue_mask(>vhost_dev, vdev, i, false);
+}
+
+return;
+
+err_guest_notifiers:
+k->set_guest_notifiers(qbus->parent, rng->vhost_dev.nvqs, false);
+err_host_notifiers:
+vhost_dev_disable_notifiers(>vhost_dev, vdev);
+}
+
+static void vu_rng_stop(VirtIODevice *vdev)
+{
+VHostUserRNG *rng = VHOST_USER_RNG(vdev);
+BusState *qbus = BUS(qdev_get_parent_bus(DEVICE(vdev)));
+VirtioBusClass *k = VIRTIO_BUS_GET_CLASS(qbus);
+int ret;
+
+if (!k->set_guest_notifiers) {
+return;
+}
+
+vhost_dev_stop(>vhost_dev, vdev);
+
+ret = k->set_guest_notifiers(qbus->parent, rng->vhost_dev.nvqs, false);
+if (ret < 0) {
+error_report("vhost guest notifier cleanup failed: %d", ret);
+return;
+}
+
+vhost_dev_disable_notifiers(>vhost_dev, vdev);
+}
+
+static void vu_rng_set_status(VirtIODevice *vdev, uint8_t status)
+{
+VHostUserRNG *rng = VHOST_USER_RNG(vdev);
+bool should_start = status & VIRTIO_CONFIG_S_DRIVER_OK;
+
+if (!vdev->vm_running) {
+should_start = false;
+}
+
+if (rng->vhost_dev.started == should_start) {
+return;
+}
+
+if (should_start) {
+vu_rng_start(vdev);
+} else {
+vu_rng_stop(vdev);
+}
+}
+
+static uint64_t vu_rng_get_features(VirtIODevice *vdev,
+
[PULL 15/23] hw/pxb: Add a bypass iommu property
From: Xingang Wang
Add a bypass_iommu property for pci_expander_bridge, the property
is used to indicate whether pxb root bus will bypass iommu. By
default the bypass_iommu is disabled, and it can be enabled with:
qemu -device pxb-pcie,bus_nr=0x10,addr=0x1,bypass_iommu=true
Signed-off-by: Xingang Wang
Reviewed-by: Eric Auger
Message-Id: <1625748919-52456-3-git-send-email-wangxinga...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/pci-bridge/pci_expander_bridge.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/pci-bridge/pci_expander_bridge.c
b/hw/pci-bridge/pci_expander_bridge.c
index aedded1064..7112dc3062 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -57,6 +57,7 @@ struct PXBDev {
uint8_t bus_nr;
uint16_t numa_node;
+bool bypass_iommu;
};
static PXBDev *convert_to_pxb(PCIDevice *dev)
@@ -255,6 +256,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool
pcie, Error **errp)
bus->map_irq = pxb_map_irq_fn;
PCI_HOST_BRIDGE(ds)->bus = bus;
+PCI_HOST_BRIDGE(ds)->bypass_iommu = pxb->bypass_iommu;
pxb_register_bus(dev, bus, _err);
if (local_err) {
@@ -301,6 +303,7 @@ static Property pxb_dev_properties[] = {
/* Note: 0 is not a legal PXB bus number. */
DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED),
+DEFINE_PROP_BOOL("bypass_iommu", PXBDev, bypass_iommu, false),
DEFINE_PROP_END_OF_LIST(),
};
--
MST
[PULL 19/23] hw/arm/virt-acpi-build: Add IORT support to bypass SMMUv3
From: Xingang Wang
When we build IORT table with SMMUv3 and bypass iommu feature enabled,
we can no longer setup one map from RC to SMMUv3 covering the whole RIDs.
We need to walk the PCI bus and check whether the root bus will bypass
iommu, setup RC -> SMMUv3 -> ITS map for RC which will not bypass iommu.
When a SMMUv3 node exist, we setup the idmap from SMMUv3 to ITS
covering the whole RIDs, and only modify the map from RC to SMMUv3.
We build RC -> SMMUv3 -> ITS map for root bus with bypass_iommu
disabled, and build idmap from RC to ITS directly for the rest of
the whole RID space.
For example we run qemu with command line:
qemu/build/aarch64-softmmu/qemu-system-aarch64 \
-kernel arch/arm64/boot/Image \
-enable-kvm \
-cpu host \
-m 8G \
-smp 8,sockets=2,cores=4,threads=1 \
-machine
virt,kernel_irqchip=on,gic-version=3,iommu=smmuv3,default_bus_bypass_iommu=true
\
-drive file=./QEMU_EFI-pflash.raw,if=pflash,format=raw,unit=0,readonly=on \
-device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3.0x1 \
-device
pxb-pcie,bus_nr=0x20,id=pci.20,bus=pcie.0,addr=0x3.0x2,bypass_iommu=true \
-device pcie-root-port,port=0x20,chassis=1,id=pci.1,bus=pcie.0,addr=0x2 \
-device pcie-root-port,port=0x20,chassis=11,id=pci.11,bus=pci.10,addr=0x1 \
-device pcie-root-port,port=0x20,chassis=21,id=pci.21,bus=pci.20,addr=0x1 \
-device virtio-scsi-pci,id=scsi0,bus=pci.1,addr=0x1 \
-device virtio-scsi-pci,id=scsi1,bus=pci.11,addr=0x1 \
-device virtio-scsi-pci,id=scsi2,bus=pci.21,addr=0x1 \
-initrd /mnt/davinci/wxg/kill-linux/rootfs/mfs.cpio.gz \
-nographic \
-append "rdinit=init console=ttyAMA0 earlycon=pl011,0x900 nokaslr" \
And we get guest configuration:
-+-[:20]---01.0-[21]--
+-[:10]---01.0-[11]--
\-[:00]-+-00.0 Device 1b36:0008
+-01.0 Device 1af4:1000
\-02.0-[01]--
With bypass_iommu enabled, the attached devices will bypass iommu.
/sys/class/iommu/smmu3.0x0905/
|-- device -> ../../../arm-smmu-v3.0.auto
|-- devices
| `-- :10:01.0 -> ../../../../../pci:10/:10:01.0
Signed-off-by: Xingang Wang
Message-Id: <1625748919-52456-7-git-send-email-wangxinga...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/arm/virt-acpi-build.c | 114 +++
1 file changed, 103 insertions(+), 11 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index f1024843dd..037cc1fd82 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -44,6 +44,7 @@
#include "hw/acpi/tpm.h"
#include "hw/pci/pcie_host.h"
#include "hw/pci/pci.h"
+#include "hw/pci/pci_bus.h"
#include "hw/pci-host/gpex.h"
#include "hw/arm/virt.h"
#include "hw/mem/nvdimm.h"
@@ -239,23 +240,89 @@ static void acpi_dsdt_add_tpm(Aml *scope,
VirtMachineState *vms)
}
#endif
+/* Build the iort ID mapping to SMMUv3 for a given PCI host bridge */
+static int
+iort_host_bridges(Object *obj, void *opaque)
+{
+GArray *idmap_blob = opaque;
+
+if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
+PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus;
+
+if (bus && !pci_bus_bypass_iommu(bus)) {
+int min_bus, max_bus;
+
+pci_bus_range(bus, _bus, _bus);
+
+AcpiIortIdMapping idmap = {
+.input_base = min_bus << 8,
+.id_count = (max_bus - min_bus + 1) << 8,
+};
+g_array_append_val(idmap_blob, idmap);
+}
+}
+
+return 0;
+}
+
+static int iort_idmap_compare(gconstpointer a, gconstpointer b)
+{
+AcpiIortIdMapping *idmap_a = (AcpiIortIdMapping *)a;
+AcpiIortIdMapping *idmap_b = (AcpiIortIdMapping *)b;
+
+return idmap_a->input_base - idmap_b->input_base;
+}
+
static void
build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
{
-int nb_nodes, iort_start = table_data->len;
+int i, nb_nodes, rc_mapping_count, iort_start = table_data->len;
AcpiIortIdMapping *idmap;
AcpiIortItsGroup *its;
AcpiIortTable *iort;
AcpiIortSmmu3 *smmu;
size_t node_size, iort_node_offset, iort_length, smmu_offset = 0;
AcpiIortRC *rc;
+GArray *smmu_idmaps = g_array_new(false, true, sizeof(AcpiIortIdMapping));
+GArray *its_idmaps = g_array_new(false, true, sizeof(AcpiIortIdMapping));
iort = acpi_data_push(table_data, sizeof(*iort));
if (vms->iommu == VIRT_IOMMU_SMMUV3) {
+AcpiIortIdMapping next_range = {0};
+
+object_child_foreach_recursive(object_get_root(),
+ iort_host_bridges, smmu_idmaps);
+
+/* Sort the smmu idmap by input_base */
+g_array_sort(smmu_idmaps, iort_idmap_compare);
+
+/*
+ * Split the whole RIDs by mapping from RC to SMMU,
+ * build the ID mapping from RC to ITS directly.
+ */
+for (i = 0; i < smmu_idmaps->len; i++) {
+idmap = _array_index(smmu_idmaps, AcpiIortIdMapping, i);
+
[PULL 23/23] vhost-vsock: SOCK_SEQPACKET feature bit support
From: Arseny Krasnov
This adds processing of VIRTIO_VSOCK_F_SEQPACKET features bit. Guest
negotiates it with vhost, thus both will know that SOCK_SEQPACKET
supported by peer.
Signed-off-by: Arseny Krasnov
Message-Id: <20210622144747.2949134-1-arseny.kras...@kaspersky.com>
Reviewed-by: Stefano Garzarella
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/virtio/vhost-vsock.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/hw/virtio/vhost-vsock.c b/hw/virtio/vhost-vsock.c
index 777cafe70d..1b1a5c70ed 100644
--- a/hw/virtio/vhost-vsock.c
+++ b/hw/virtio/vhost-vsock.c
@@ -21,6 +21,11 @@
#include "hw/virtio/vhost-vsock.h"
#include "monitor/monitor.h"
+const int feature_bits[] = {
+VIRTIO_VSOCK_F_SEQPACKET,
+VHOST_INVALID_FEATURE_BIT
+};
+
static void vhost_vsock_get_config(VirtIODevice *vdev, uint8_t *config)
{
VHostVSock *vsock = VHOST_VSOCK(vdev);
@@ -108,8 +113,11 @@ static uint64_t vhost_vsock_get_features(VirtIODevice
*vdev,
uint64_t requested_features,
Error **errp)
{
-/* No feature bits used yet */
-return requested_features;
+VHostVSockCommon *vvc = VHOST_VSOCK_COMMON(vdev);
+
+virtio_add_feature(_features, VIRTIO_VSOCK_F_SEQPACKET);
+return vhost_get_features(>vhost_dev, feature_bits,
+requested_features);
}
static const VMStateDescription vmstate_virtio_vhost_vsock = {
--
MST
[PULL 13/23] docs: Add '-device intel-iommu' entry
From: Peter Xu
The parameters of intel-iommu device are non-trivial to understand. Add an
entry for it so that people can reference to it when using.
There're actually a few more options there, but I hide them explicitly because
they shouldn't be used by normal QEMU users.
Cc: Chao Yang
Cc: Lei Yang
Cc: Jing Zhao
Cc: Jason Wang
Cc: Michael S. Tsirkin
Cc: Alex Williamson
Reviewed-by: Jason Wang
Reviewed-by: Yi Liu
Signed-off-by: Peter Xu
Message-Id: <20210707154114.197580-1-pet...@redhat.com>
Reviewed-by: Maxim Levitsky
Reviewed-by: Eric Auger
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
qemu-options.hx | 33 +
1 file changed, 33 insertions(+)
diff --git a/qemu-options.hx b/qemu-options.hx
index 8965dabc83..0fcc8973dd 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -926,6 +926,39 @@ SRST
``-device pci-ipmi-bt,bmc=id``
Like the KCS interface, but defines a BT interface on the PCI bus.
+
+``-device intel-iommu[,option=...]``
+This is only supported by ``-machine q35``, which will enable Intel VT-d
+emulation within the guest. It supports below options:
+
+``intremap=on|off`` (default: auto)
+This enables interrupt remapping feature. It's required to enable
+complete x2apic. Currently it only supports kvm kernel-irqchip modes
+``off`` or ``split``, while full kernel-irqchip is not yet supported.
+The default value is "auto", which will be decided by the mode of
+kernel-irqchip.
+
+``caching-mode=on|off`` (default: off)
+This enables caching mode for the VT-d emulated device. When
+caching-mode is enabled, each guest DMA buffer mapping will generate an
+IOTLB invalidation from the guest IOMMU driver to the vIOMMU device in
+a synchronous way. It is required for ``-device vfio-pci`` to work
+with the VT-d device, because host assigned devices requires to setup
+the DMA mapping on the host before guest DMA starts.
+
+``device-iotlb=on|off`` (default: off)
+This enables device-iotlb capability for the emulated VT-d device. So
+far virtio/vhost should be the only real user for this parameter,
+paired with ats=on configured for the device.
+
+``aw-bits=39|48`` (default: 39)
+This decides the address width of IOVA address space. The address
+space has 39 bits width for 3-level IOMMU page tables, and 48 bits for
+4-level IOMMU page tables.
+
+Please also refer to the wiki page for general scenarios of VT-d
+emulation in QEMU: https://wiki.qemu.org/Features/VT-d.
+
ERST
DEF("name", HAS_ARG, QEMU_OPTION_name,
--
MST
[PULL 02/23] hw/acpi/ich9: Enable ACPI PCI hot-plug
From: Julia Suvorova
Add acpi_pcihp to ich9_pm as part of
'acpi-pci-hotplug-with-bridge-support' option. Set default to false.
Signed-off-by: Julia Suvorova
Signed-off-by: Marcel Apfelbaum
Reviewed-by: Igor Mammedov
Message-Id: <20210713004205.775386-3-jus...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Reviewed-by: David Gibson
---
hw/i386/acpi-build.h| 1 +
include/hw/acpi/ich9.h | 3 ++
hw/acpi/acpi-x86-stub.c | 6
hw/acpi/ich9.c | 70 +
hw/acpi/pcihp.c | 12 +--
hw/i386/acpi-build.c| 14 ++---
6 files changed, 100 insertions(+), 6 deletions(-)
diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h
index 487ec7710f..0dce155c8c 100644
--- a/hw/i386/acpi-build.h
+++ b/hw/i386/acpi-build.h
@@ -10,5 +10,6 @@ extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio;
#define ACPI_PCIHP_BNMR_BASE 0x10
void acpi_setup(void);
+Object *acpi_get_i386_pci_host(void);
#endif
diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
index 596120d97f..a329ce43ab 100644
--- a/include/hw/acpi/ich9.h
+++ b/include/hw/acpi/ich9.h
@@ -24,6 +24,7 @@
#include "hw/acpi/acpi.h"
#include "hw/acpi/cpu_hotplug.h"
#include "hw/acpi/cpu.h"
+#include "hw/acpi/pcihp.h"
#include "hw/acpi/memory_hotplug.h"
#include "hw/acpi/acpi_dev_interface.h"
#include "hw/acpi/tco.h"
@@ -55,6 +56,8 @@ typedef struct ICH9LPCPMRegs {
AcpiCpuHotplug gpe_cpu;
CPUHotplugState cpuhp_state;
+bool use_acpi_hotplug_bridge;
+AcpiPciHpState acpi_pci_hotplug;
MemHotplugState acpi_memory_hotplug;
uint8_t disable_s3;
diff --git a/hw/acpi/acpi-x86-stub.c b/hw/acpi/acpi-x86-stub.c
index f88d6a090b..e9e46c5c5f 100644
--- a/hw/acpi/acpi-x86-stub.c
+++ b/hw/acpi/acpi-x86-stub.c
@@ -1,7 +1,13 @@
#include "qemu/osdep.h"
#include "hw/i386/pc.h"
+#include "hw/i386/acpi-build.h"
void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
const CPUArchIdList *apic_ids, GArray *entry)
{
}
+
+Object *acpi_get_i386_pci_host(void)
+{
+ return NULL;
+}
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 4daa79ec8d..2f4eb453ac 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -217,6 +217,26 @@ static const VMStateDescription vmstate_cpuhp_state = {
}
};
+static bool vmstate_test_use_pcihp(void *opaque)
+{
+ICH9LPCPMRegs *s = opaque;
+
+return s->use_acpi_hotplug_bridge;
+}
+
+static const VMStateDescription vmstate_pcihp_state = {
+.name = "ich9_pm/pcihp",
+.version_id = 1,
+.minimum_version_id = 1,
+.needed = vmstate_test_use_pcihp,
+.fields = (VMStateField[]) {
+VMSTATE_PCI_HOTPLUG(acpi_pci_hotplug,
+ICH9LPCPMRegs,
+NULL, NULL),
+VMSTATE_END_OF_LIST()
+}
+};
+
const VMStateDescription vmstate_ich9_pm = {
.name = "ich9_pm",
.version_id = 1,
@@ -238,6 +258,7 @@ const VMStateDescription vmstate_ich9_pm = {
_memhp_state,
_tco_io_state,
_cpuhp_state,
+_pcihp_state,
NULL
}
};
@@ -259,6 +280,10 @@ static void pm_reset(void *opaque)
}
pm->smi_en_wmask = ~0;
+if (pm->use_acpi_hotplug_bridge) {
+acpi_pcihp_reset(>acpi_pci_hotplug, true);
+}
+
acpi_update_sci(>acpi_regs, pm->irq);
}
@@ -297,6 +322,18 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
pm->enable_tco = true;
acpi_pm_tco_init(>tco_regs, >io);
+if (pm->use_acpi_hotplug_bridge) {
+acpi_pcihp_init(OBJECT(lpc_pci),
+>acpi_pci_hotplug,
+pci_get_bus(lpc_pci),
+pci_address_space_io(lpc_pci),
+true,
+ACPI_PCIHP_ADDR_ICH9);
+
+qbus_set_hotplug_handler(BUS(pci_get_bus(lpc_pci)),
+ OBJECT(lpc_pci));
+}
+
pm->irq = sci_irq;
qemu_register_reset(pm_reset, pm);
pm->powerdown_notifier.notify = pm_powerdown_req;
@@ -368,6 +405,20 @@ static void ich9_pm_set_enable_tco(Object *obj, bool
value, Error **errp)
s->pm.enable_tco = value;
}
+static bool ich9_pm_get_acpi_pci_hotplug(Object *obj, Error **errp)
+{
+ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
+
+return s->pm.use_acpi_hotplug_bridge;
+}
+
+static void ich9_pm_set_acpi_pci_hotplug(Object *obj, bool value, Error **errp)
+{
+ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
+
+s->pm.use_acpi_hotplug_bridge = value;
+}
+
void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
{
static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
@@ -376,6 +427,7 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
pm->disable_s3 = 0;
pm->disable_s4 = 0;
pm->s4_val = 2;
+pm->use_acpi_hotplug_bridge = false;
object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
>pm_io_base,
[PULL 21/23] hw/i386/acpi-build: Add IVRS support to bypass iommu
From: Xingang Wang
Check bypass_iommu to exclude the devices which will bypass iommu.
Signed-off-by: Xingang Wang
Message-Id: <1625748919-52456-9-git-send-email-wangxinga...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/i386/acpi-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 7efc6285ac..17836149fe 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2263,7 +2263,7 @@ ivrs_host_bridges(Object *obj, void *opaque)
if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus;
-if (bus) {
+if (bus && !pci_bus_bypass_iommu(bus)) {
pci_for_each_device(bus, pci_bus_num(bus), insert_ivhd, ivhd_blob);
}
}
--
MST
[PULL 12/23] hw/virtio: add vhost-user-i2c-pci boilerplate
From: Viresh Kumar
This allows is to instantiate a vhost-user-i2c device as part of a PCI
bus. It is mostly boilerplate which looks pretty similar to the
vhost-user-fs-pci device.
Reviewed-by: Alex Bennée
Signed-off-by: Viresh Kumar
Message-Id:
<8a083eaa57d93feaab12acd1f94b225879212f20.1625806763.git.viresh.ku...@linaro.org>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/virtio/vhost-user-i2c-pci.c | 69 ++
hw/virtio/meson.build | 1 +
2 files changed, 70 insertions(+)
create mode 100644 hw/virtio/vhost-user-i2c-pci.c
diff --git a/hw/virtio/vhost-user-i2c-pci.c b/hw/virtio/vhost-user-i2c-pci.c
new file mode 100644
index 00..70b7b65fd9
--- /dev/null
+++ b/hw/virtio/vhost-user-i2c-pci.c
@@ -0,0 +1,69 @@
+/*
+ * Vhost-user i2c virtio device PCI glue
+ *
+ * Copyright (c) 2021 Viresh Kumar
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "hw/qdev-properties.h"
+#include "hw/virtio/vhost-user-i2c.h"
+#include "virtio-pci.h"
+
+struct VHostUserI2CPCI {
+VirtIOPCIProxy parent_obj;
+VHostUserI2C vdev;
+};
+
+typedef struct VHostUserI2CPCI VHostUserI2CPCI;
+
+#define TYPE_VHOST_USER_I2C_PCI "vhost-user-i2c-pci-base"
+
+DECLARE_INSTANCE_CHECKER(VHostUserI2CPCI, VHOST_USER_I2C_PCI,
+ TYPE_VHOST_USER_I2C_PCI)
+
+static void vhost_user_i2c_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
+{
+VHostUserI2CPCI *dev = VHOST_USER_I2C_PCI(vpci_dev);
+DeviceState *vdev = DEVICE(>vdev);
+
+vpci_dev->nvectors = 1;
+qdev_realize(vdev, BUS(_dev->bus), errp);
+}
+
+static void vhost_user_i2c_pci_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
+PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
+k->realize = vhost_user_i2c_pci_realize;
+set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
+pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
+pcidev_k->device_id = 0; /* Set by virtio-pci based on virtio id */
+pcidev_k->revision = 0x00;
+pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER;
+}
+
+static void vhost_user_i2c_pci_instance_init(Object *obj)
+{
+VHostUserI2CPCI *dev = VHOST_USER_I2C_PCI(obj);
+
+virtio_instance_init_common(obj, >vdev, sizeof(dev->vdev),
+TYPE_VHOST_USER_I2C);
+}
+
+static const VirtioPCIDeviceTypeInfo vhost_user_i2c_pci_info = {
+.base_name = TYPE_VHOST_USER_I2C_PCI,
+.non_transitional_name = "vhost-user-i2c-pci",
+.instance_size = sizeof(VHostUserI2CPCI),
+.instance_init = vhost_user_i2c_pci_instance_init,
+.class_init = vhost_user_i2c_pci_class_init,
+};
+
+static void vhost_user_i2c_pci_register(void)
+{
+virtio_pci_types_register(_user_i2c_pci_info);
+}
+
+type_init(vhost_user_i2c_pci_register);
diff --git a/hw/virtio/meson.build b/hw/virtio/meson.build
index 948e668ed3..08629c8f2c 100644
--- a/hw/virtio/meson.build
+++ b/hw/virtio/meson.build
@@ -28,6 +28,7 @@ virtio_ss.add(when: 'CONFIG_VIRTIO_MEM', if_true:
files('virtio-mem.c'))
virtio_ss.add(when: 'CONFIG_VHOST_USER_RNG', if_true:
files('vhost-user-rng.c'))
virtio_ss.add(when: ['CONFIG_VHOST_USER_RNG', 'CONFIG_VIRTIO_PCI'], if_true:
files('vhost-user-rng-pci.c'))
virtio_ss.add(when: 'CONFIG_VHOST_USER_I2C', if_true:
files('vhost-user-i2c.c'))
+virtio_ss.add(when: ['CONFIG_VIRTIO_PCI', 'CONFIG_VHOST_USER_I2C'], if_true:
files('vhost-user-i2c-pci.c'))
virtio_pci_ss = ss.source_set()
virtio_pci_ss.add(when: 'CONFIG_VHOST_VSOCK', if_true:
files('vhost-vsock-pci.c'))
--
MST
[PULL 17/23] hw/i386: Add a default_bus_bypass_iommu pc machine option
From: Xingang Wang
Add a default_bus_bypass_iommu pc machine option to enable/disable
bypass_iommu for default root bus. The option is disabled by default
and can be enabled with:
$QEMU -machine q35,default_bus_bypass_iommu=true
Signed-off-by: Xingang Wang
Message-Id: <1625748919-52456-5-git-send-email-wangxinga...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/pc.h | 1 +
hw/i386/pc.c | 20
hw/pci-host/q35.c| 2 ++
3 files changed, 23 insertions(+)
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 87294f2632..fd741119fa 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -44,6 +44,7 @@ typedef struct PCMachineState {
bool sata_enabled;
bool pit_enabled;
bool hpet_enabled;
+bool default_bus_bypass_iommu;
uint64_t max_fw_size;
/* NUMA information: */
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 7e03848792..f784a9a91f 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1523,6 +1523,21 @@ static void pc_machine_set_hpet(Object *obj, bool value,
Error **errp)
pcms->hpet_enabled = value;
}
+static bool pc_machine_get_default_bus_bypass_iommu(Object *obj, Error **errp)
+{
+PCMachineState *pcms = PC_MACHINE(obj);
+
+return pcms->default_bus_bypass_iommu;
+}
+
+static void pc_machine_set_default_bus_bypass_iommu(Object *obj, bool value,
+Error **errp)
+{
+PCMachineState *pcms = PC_MACHINE(obj);
+
+pcms->default_bus_bypass_iommu = value;
+}
+
static void pc_machine_get_max_ram_below_4g(Object *obj, Visitor *v,
const char *name, void *opaque,
Error **errp)
@@ -1622,6 +1637,7 @@ static void pc_machine_initfn(Object *obj)
#ifdef CONFIG_HPET
pcms->hpet_enabled = true;
#endif
+pcms->default_bus_bypass_iommu = false;
pc_system_flash_create(pcms);
pcms->pcspk = isa_new(TYPE_PC_SPEAKER);
@@ -1746,6 +1762,10 @@ static void pc_machine_class_init(ObjectClass *oc, void
*data)
object_class_property_add_bool(oc, "hpet",
pc_machine_get_hpet, pc_machine_set_hpet);
+object_class_property_add_bool(oc, "default_bus_bypass_iommu",
+pc_machine_get_default_bus_bypass_iommu,
+pc_machine_set_default_bus_bypass_iommu);
+
object_class_property_add(oc, PC_MACHINE_MAX_FW_SIZE, "size",
pc_machine_get_max_fw_size, pc_machine_set_max_fw_size,
NULL, NULL);
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 0f37cf056a..ab5a47aff5 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -65,6 +65,8 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
s->mch.address_space_io,
0, TYPE_PCIE_BUS);
PC_MACHINE(qdev_get_machine())->bus = pci->bus;
+pci->bypass_iommu =
+PC_MACHINE(qdev_get_machine())->default_bus_bypass_iommu;
qdev_realize(DEVICE(>mch), BUS(pci->bus), _fatal);
}
--
MST
[PULL 00/23] pc,pci,virtio: lots of new features
The following changes since commit 708f50199b59476ec4b45ebcdf171550086d6292: Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2021-07-09-v2' into staging (2021-07-13 14:32:20 +0100) are available in the Git repository at: git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream for you to fetch changes up to cf171f90d5e41730ad3e0ce23f1990f34b7e63ef: vhost-vsock: SOCK_SEQPACKET feature bit support (2021-07-13 16:59:12 -0400) pc,pci,virtio: lots of new features Lots of last minute stuff. vhost-user-rng. vhost-user-i2c. vhost-vsock SOCK_SEQPACKET support. IOMMU bypass. ACPI based pci hotplug. Signed-off-by: Michael S. Tsirkin Arseny Krasnov (1): vhost-vsock: SOCK_SEQPACKET feature bit support Julia Suvorova (6): hw/i386/acpi-build: Add ACPI PCI hot-plug methods to Q35 hw/acpi/ich9: Enable ACPI PCI hot-plug hw/pci/pcie: Do not set HPC flag if acpihp is used bios-tables-test: Allow changes in DSDT ACPI tables hw/acpi/ich9: Set ACPI PCI hot-plug as default on Q35 bios-tables-test: Update golden binaries Mathieu Poirier (4): vhost-user-rng: Add vhost-user-rng implementation vhost-user-rng-pci: Add vhost-user-rng-pci implementation vhost-user-rng: backend: Add RNG vhost-user daemon implementation docs: Add documentation for vhost based RNG implementation Peter Xu (1): docs: Add '-device intel-iommu' entry Viresh Kumar (2): hw/virtio: add boilerplate for vhost-user-i2c device hw/virtio: add vhost-user-i2c-pci boilerplate Xingang Wang (9): hw/pci/pci_host: Allow PCI host to bypass iommu hw/pxb: Add a bypass iommu property hw/arm/virt: Add default_bus_bypass_iommu machine option hw/i386: Add a default_bus_bypass_iommu pc machine option hw/pci: Add pci_bus_range() to get PCI bus number range hw/arm/virt-acpi-build: Add IORT support to bypass SMMUv3 hw/i386/acpi-build: Add DMAR support to bypass iommu hw/i386/acpi-build: Add IVRS support to bypass iommu docs: Add documentation for iommu bypass docs/bypass-iommu.txt| 89 +++ hw/i386/acpi-build.h | 5 + include/hw/acpi/ich9.h | 5 + include/hw/acpi/pcihp.h | 3 +- include/hw/arm/virt.h| 1 + include/hw/i386/pc.h | 1 + include/hw/pci/pci.h | 2 + include/hw/pci/pci_host.h| 1 + include/hw/pci/pcie_port.h | 5 +- include/hw/virtio/vhost-user-i2c.h | 28 +++ include/hw/virtio/vhost-user-rng.h | 33 +++ hw/acpi/acpi-x86-stub.c | 6 + hw/acpi/ich9.c | 70 ++ hw/acpi/pcihp.c | 26 +- hw/acpi/piix4.c | 4 +- hw/arm/virt-acpi-build.c | 114 - hw/arm/virt.c| 26 ++ hw/core/machine.c| 1 - hw/i386/acpi-build.c | 114 +++-- hw/i386/pc.c | 21 ++ hw/i386/pc_q35.c | 11 + hw/pci-bridge/pci_expander_bridge.c | 3 + hw/pci-host/q35.c| 2 + hw/pci/pci.c | 34 ++- hw/pci/pci_host.c| 1 + hw/pci/pcie.c| 8 +- hw/pci/pcie_port.c | 1 + hw/virtio/vhost-user-i2c-pci.c | 69 ++ hw/virtio/vhost-user-i2c.c | 288 ++ hw/virtio/vhost-user-rng-pci.c | 79 ++ hw/virtio/vhost-user-rng.c | 294 ++ hw/virtio/vhost-vsock.c | 12 +- tools/vhost-user-rng/main.c | 403 +++ docs/tools/index.rst | 1 + docs/tools/vhost-user-rng.rst| 74 ++ hw/virtio/Kconfig| 10 + hw/virtio/meson.build| 4 + qemu-options.hx | 33 +++ tests/data/acpi/q35/DSDT | Bin 7859 -> 8289 bytes tests/data/acpi/q35/DSDT.acpihmat| Bin 9184 -> 9614 bytes tests/data/acpi/q35/DSDT.bridge | Bin 7877 -> 11003 bytes tests/data/acpi/q35/DSDT.cphp| Bin 8323 -> 8753 bytes tests/data/acpi/q35/DSDT.dimmpxm | Bin 9513 -> 9943 bytes tests/data/acpi/q35/DSDT.ipmibt | Bin 7934 -> 8364 bytes tests/data/acpi/q35/DSDT.memhp | Bin 9218 -> 9648 bytes tests/data/acpi/q35/DSDT.mmio64 | Bin 8990 -> 9419 bytes tests/data/acpi/q35/DSDT.nohpet | Bin 7717 -> 8147 bytes tests/data/acpi/q35/DSDT.numamem | Bin 7865 -> 8295 bytes tests/data/acpi/q35/DSDT.tis | Bin 8465 -> 8894 bytes
[PULL 20/23] hw/i386/acpi-build: Add DMAR support to bypass iommu
From: Xingang Wang
In DMAR table, the drhd is set to cover all PCI devices when intel_iommu
is on. To support bypass iommu feature, we need to walk the PCI bus with
bypass_iommu disabled and add explicit scope data in DMAR drhd structure.
/mnt/sdb/wxg/qemu-next/qemu/build/x86_64-softmmu/qemu-system-x86_64 \
-machine q35,accel=kvm,default_bus_bypass_iommu=true \
-cpu host \
-m 16G \
-smp 36,sockets=2,cores=18,threads=1 \
-device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3 \
-device pxb-pcie,bus_nr=0x20,id=pci.20,bus=pcie.0,addr=0x4,bypass_iommu=true \
-device pcie-root-port,port=0x1,chassis=1,id=pci.11,bus=pci.10,addr=0x0 \
-device pcie-root-port,port=0x2,chassis=2,id=pci.21,bus=pci.20,addr=0x0 \
-device virtio-scsi-pci,id=scsi0,bus=pci.11,addr=0x0 \
-device virtio-scsi-pci,id=scsi1,bus=pci.21,addr=0x0 \
-drive
file=/mnt/sdb/wxg/fedora-48g.qcow2,format=qcow2,if=none,id=drive-scsi0-0-0-0,cache=none,aio=native
\
-device
scsi-hd,bus=scsi1.0,channel=0,scsi-id=0,lun=0,drive=drive-scsi0-0-0-0,id=scsi0-0-0-0,bootindex=1
\
-device intel-iommu \
-nographic \
And we get the guest configuration:
~ lspci -vt
-+-[:20]---00.0-[21]00.0 Red Hat, Inc. Virtio SCSI
+-[:10]---00.0-[11]00.0 Red Hat, Inc. Virtio SCSI
\-[:00]-+-00.0 Intel Corporation 82G33/G31/P35/P31 Express DRAM Controller
+-01.0 Device 1234:
+-02.0 Intel Corporation 82574L Gigabit Network Connection
+-03.0 Red Hat, Inc. QEMU PCIe Expander bridge
+-04.0 Red Hat, Inc. QEMU PCIe Expander bridge
+-1f.0 Intel Corporation 82801IB (ICH9) LPC Interface Controller
+-1f.2 Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA
Controller [AHCI mode]
\-1f.3 Intel Corporation 82801I (ICH9 Family) SMBus Controller
With bypass_iommu enabled on root bus, the attached devices will bypass iommu:
/sys/class/iommu/dmar0
├── devices
│ ├── :10:00.0 -> ../../../../pci:10/:10:00.0
│ └── :11:00.0 -> ../../../../pci:10/:10:00.0/:11:00.0
Signed-off-by: Xingang Wang
Message-Id: <1625748919-52456-8-git-send-email-wangxinga...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/i386/acpi-build.c | 68 ++--
1 file changed, 66 insertions(+), 2 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index bc966a4110..7efc6285ac 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2022,6 +2022,56 @@ build_srat(GArray *table_data, BIOSLinker *linker,
MachineState *machine)
x86ms->oem_table_id);
}
+/*
+ * Insert DMAR scope for PCI bridges and endpoint devcie
+ */
+static void
+insert_scope(PCIBus *bus, PCIDevice *dev, void *opaque)
+{
+GArray *scope_blob = opaque;
+AcpiDmarDeviceScope *scope = NULL;
+
+if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
+/* Dmar Scope Type: 0x02 for PCI Bridge */
+build_append_int_noprefix(scope_blob, 0x02, 1);
+} else {
+/* Dmar Scope Type: 0x01 for PCI Endpoint Device */
+build_append_int_noprefix(scope_blob, 0x01, 1);
+}
+
+/* length */
+build_append_int_noprefix(scope_blob,
+ sizeof(*scope) + sizeof(scope->path[0]), 1);
+/* reserved */
+build_append_int_noprefix(scope_blob, 0, 2);
+/* enumeration_id */
+build_append_int_noprefix(scope_blob, 0, 1);
+/* bus */
+build_append_int_noprefix(scope_blob, pci_bus_num(bus), 1);
+/* device */
+build_append_int_noprefix(scope_blob, PCI_SLOT(dev->devfn), 1);
+/* function */
+build_append_int_noprefix(scope_blob, PCI_FUNC(dev->devfn), 1);
+}
+
+/* For a given PCI host bridge, walk and insert DMAR scope */
+static int
+dmar_host_bridges(Object *obj, void *opaque)
+{
+GArray *scope_blob = opaque;
+
+if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
+PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus;
+
+if (bus && !pci_bus_bypass_iommu(bus)) {
+pci_for_each_device(bus, pci_bus_num(bus), insert_scope,
+scope_blob);
+}
+}
+
+return 0;
+}
+
/*
* VT-d spec 8.1 DMA Remapping Reporting Structure
* (version Oct. 2014 or later)
@@ -2041,6 +2091,15 @@ build_dmar_q35(GArray *table_data, BIOSLinker *linker,
const char *oem_id,
/* Root complex IOAPIC use one path[0] only */
size_t ioapic_scope_size = sizeof(*scope) + sizeof(scope->path[0]);
IntelIOMMUState *intel_iommu = INTEL_IOMMU_DEVICE(iommu);
+GArray *scope_blob = g_array_new(false, true, 1);
+
+/*
+ * A PCI bus walk, for each PCI host bridge.
+ * Insert scope for each PCI bridge and endpoint device which
+ * is attached to a bus with iommu enabled.
+ */
+object_child_foreach_recursive(object_get_root(),
+ dmar_host_bridges, scope_blob);
assert(iommu);
if
[PULL 11/23] hw/virtio: add boilerplate for vhost-user-i2c device
From: Viresh Kumar
This creates the QEMU side of the vhost-user-i2c device which connects
to the remote daemon. It is based of vhost-user-fs code.
Signed-off-by: Viresh Kumar
Message-Id:
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/virtio/vhost-user-i2c.h | 28 +++
hw/virtio/vhost-user-i2c.c | 288 +
hw/virtio/Kconfig | 5 +
hw/virtio/meson.build | 1 +
4 files changed, 322 insertions(+)
create mode 100644 include/hw/virtio/vhost-user-i2c.h
create mode 100644 hw/virtio/vhost-user-i2c.c
diff --git a/include/hw/virtio/vhost-user-i2c.h
b/include/hw/virtio/vhost-user-i2c.h
new file mode 100644
index 00..deae47a76d
--- /dev/null
+++ b/include/hw/virtio/vhost-user-i2c.h
@@ -0,0 +1,28 @@
+/*
+ * Vhost-user i2c virtio device
+ *
+ * Copyright (c) 2021 Viresh Kumar
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef _QEMU_VHOST_USER_I2C_H
+#define _QEMU_VHOST_USER_I2C_H
+
+#include "hw/virtio/vhost.h"
+#include "hw/virtio/vhost-user.h"
+
+#define TYPE_VHOST_USER_I2C "vhost-user-i2c-device"
+OBJECT_DECLARE_SIMPLE_TYPE(VHostUserI2C, VHOST_USER_I2C)
+
+struct VHostUserI2C {
+VirtIODevice parent;
+CharBackend chardev;
+struct vhost_virtqueue *vhost_vq;
+struct vhost_dev vhost_dev;
+VhostUserState vhost_user;
+VirtQueue *vq;
+bool connected;
+};
+
+#endif /* _QEMU_VHOST_USER_I2C_H */
diff --git a/hw/virtio/vhost-user-i2c.c b/hw/virtio/vhost-user-i2c.c
new file mode 100644
index 00..d172632bb0
--- /dev/null
+++ b/hw/virtio/vhost-user-i2c.c
@@ -0,0 +1,288 @@
+/*
+ * Vhost-user i2c virtio device
+ *
+ * Copyright (c) 2021 Viresh Kumar
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/qdev-properties.h"
+#include "hw/virtio/virtio-bus.h"
+#include "hw/virtio/vhost-user-i2c.h"
+#include "qemu/error-report.h"
+#include "standard-headers/linux/virtio_ids.h"
+
+/* Remove this once the header is updated in Linux kernel */
+#ifndef VIRTIO_ID_I2C_ADAPTER
+#define VIRTIO_ID_I2C_ADAPTER34
+#endif
+
+static void vu_i2c_start(VirtIODevice *vdev)
+{
+BusState *qbus = BUS(qdev_get_parent_bus(DEVICE(vdev)));
+VirtioBusClass *k = VIRTIO_BUS_GET_CLASS(qbus);
+VHostUserI2C *i2c = VHOST_USER_I2C(vdev);
+int ret, i;
+
+if (!k->set_guest_notifiers) {
+error_report("binding does not support guest notifiers");
+return;
+}
+
+ret = vhost_dev_enable_notifiers(>vhost_dev, vdev);
+if (ret < 0) {
+error_report("Error enabling host notifiers: %d", -ret);
+return;
+}
+
+ret = k->set_guest_notifiers(qbus->parent, i2c->vhost_dev.nvqs, true);
+if (ret < 0) {
+error_report("Error binding guest notifier: %d", -ret);
+goto err_host_notifiers;
+}
+
+i2c->vhost_dev.acked_features = vdev->guest_features;
+
+ret = vhost_dev_start(>vhost_dev, vdev);
+if (ret < 0) {
+error_report("Error starting vhost-user-i2c: %d", -ret);
+goto err_guest_notifiers;
+}
+
+/*
+ * guest_notifier_mask/pending not used yet, so just unmask
+ * everything here. virtio-pci will do the right thing by
+ * enabling/disabling irqfd.
+ */
+for (i = 0; i < i2c->vhost_dev.nvqs; i++) {
+vhost_virtqueue_mask(>vhost_dev, vdev, i, false);
+}
+
+return;
+
+err_guest_notifiers:
+k->set_guest_notifiers(qbus->parent, i2c->vhost_dev.nvqs, false);
+err_host_notifiers:
+vhost_dev_disable_notifiers(>vhost_dev, vdev);
+}
+
+static void vu_i2c_stop(VirtIODevice *vdev)
+{
+VHostUserI2C *i2c = VHOST_USER_I2C(vdev);
+BusState *qbus = BUS(qdev_get_parent_bus(DEVICE(vdev)));
+VirtioBusClass *k = VIRTIO_BUS_GET_CLASS(qbus);
+int ret;
+
+if (!k->set_guest_notifiers) {
+return;
+}
+
+vhost_dev_stop(>vhost_dev, vdev);
+
+ret = k->set_guest_notifiers(qbus->parent, i2c->vhost_dev.nvqs, false);
+if (ret < 0) {
+error_report("vhost guest notifier cleanup failed: %d", ret);
+return;
+}
+
+vhost_dev_disable_notifiers(>vhost_dev, vdev);
+}
+
+static void vu_i2c_set_status(VirtIODevice *vdev, uint8_t status)
+{
+VHostUserI2C *i2c = VHOST_USER_I2C(vdev);
+bool should_start = status & VIRTIO_CONFIG_S_DRIVER_OK;
+
+if (!vdev->vm_running) {
+should_start = false;
+}
+
+if (i2c->vhost_dev.started == should_start) {
+return;
+}
+
+if (should_start) {
+vu_i2c_start(vdev);
+} else {
+vu_i2c_stop(vdev);
+}
+}
+
+static uint64_t vu_i2c_get_features(VirtIODevice *vdev,
+uint64_t requested_features, Error **errp)
+{
+/* No feature bits used yet */
+return requested_features;
+}
+
+static void vu_i2c_handle_output(VirtIODevice *vdev, VirtQueue *vq)
+{
+/*
+ * Not normally called; it's the daemon that handles the
[PULL 14/23] hw/pci/pci_host: Allow PCI host to bypass iommu
From: Xingang Wang
Add a new bypass_iommu property for PCI host and use it to check
whether devices attached to the PCI root bus will bypass iommu.
In pci_device_iommu_address_space(), check the property and
avoid getting iommu address space for devices bypass iommu.
Signed-off-by: Xingang Wang
Reviewed-by: Eric Auger
Message-Id: <1625748919-52456-2-git-send-email-wangxinga...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pci.h | 1 +
include/hw/pci/pci_host.h | 1 +
hw/pci/pci.c | 18 +-
hw/pci/pci_host.c | 1 +
4 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 6be4e0c460..f4d51b672b 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -480,6 +480,7 @@ void pci_for_each_bus(PCIBus *bus,
PCIBus *pci_device_root_bus(const PCIDevice *d);
const char *pci_root_bus_path(PCIDevice *dev);
+bool pci_bus_bypass_iommu(PCIBus *bus);
PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn);
int pci_qdev_find_device(const char *id, PCIDevice **pdev);
void pci_bus_get_w64_range(PCIBus *bus, Range *range);
diff --git a/include/hw/pci/pci_host.h b/include/hw/pci/pci_host.h
index 52e038c019..c6f4eb4585 100644
--- a/include/hw/pci/pci_host.h
+++ b/include/hw/pci/pci_host.h
@@ -43,6 +43,7 @@ struct PCIHostState {
uint32_t config_reg;
bool mig_enabled;
PCIBus *bus;
+bool bypass_iommu;
QLIST_ENTRY(PCIHostState) next;
};
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 377084f1a8..27d588e268 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -416,6 +416,22 @@ const char *pci_root_bus_path(PCIDevice *dev)
return rootbus->qbus.name;
}
+bool pci_bus_bypass_iommu(PCIBus *bus)
+{
+PCIBus *rootbus = bus;
+PCIHostState *host_bridge;
+
+if (!pci_bus_is_root(bus)) {
+rootbus = pci_device_root_bus(bus->parent_dev);
+}
+
+host_bridge = PCI_HOST_BRIDGE(rootbus->qbus.parent);
+
+assert(host_bridge->bus == rootbus);
+
+return host_bridge->bypass_iommu;
+}
+
static void pci_root_bus_init(PCIBus *bus, DeviceState *parent,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
@@ -2718,7 +2734,7 @@ AddressSpace *pci_device_iommu_address_space(PCIDevice
*dev)
iommu_bus = parent_bus;
}
-if (iommu_bus && iommu_bus->iommu_fn) {
+if (!pci_bus_bypass_iommu(bus) && iommu_bus && iommu_bus->iommu_fn) {
return iommu_bus->iommu_fn(bus, iommu_bus->iommu_opaque, devfn);
}
return _space_memory;
diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c
index 8ca5fadcbd..cf02f0d6a5 100644
--- a/hw/pci/pci_host.c
+++ b/hw/pci/pci_host.c
@@ -222,6 +222,7 @@ const VMStateDescription vmstate_pcihost = {
static Property pci_host_properties_common[] = {
DEFINE_PROP_BOOL("x-config-reg-migration-enabled", PCIHostState,
mig_enabled, true),
+DEFINE_PROP_BOOL("bypass-iommu", PCIHostState, bypass_iommu, false),
DEFINE_PROP_END_OF_LIST(),
};
--
MST
Re: [PATCH 3/6] python/aqmp-tui: Add AQMP TUI draft
On Thu, Jul 8, 2021 at 8:50 AM John Snow wrote:
>
>
> On Fri, Jul 2, 2021 at 5:26 PM G S Niteesh Babu
> wrote:
>
>> Added a draft of AQMP TUI.
>>
>> Implements the follwing basic features:
>> 1) Command transmission/reception.
>> 2) Shows events asynchronously.
>> 3) Shows server status in the bottom status bar.
>>
>> Also added necessary pylint, mypy configurations
>>
>> Signed-off-by: G S Niteesh Babu
>> ---
>> python/qemu/aqmp/aqmp_tui.py | 246 +++
>> python/setup.cfg | 16 ++-
>> 2 files changed, 261 insertions(+), 1 deletion(-)
>> create mode 100644 python/qemu/aqmp/aqmp_tui.py
>>
>> diff --git a/python/qemu/aqmp/aqmp_tui.py b/python/qemu/aqmp/aqmp_tui.py
>> new file mode 100644
>> index 00..8e9e8ac8ff
>> --- /dev/null
>> +++ b/python/qemu/aqmp/aqmp_tui.py
>> @@ -0,0 +1,246 @@
>> +# Copyright (c) 2021
>> +#
>> +# Authors:
>> +# Niteesh Babu G S
>> +#
>> +# This work is licensed under the terms of the GNU GPL, version 2 or
>> +# later. See the COPYING file in the top-level directory.
>> +
>> +import argparse
>> +import asyncio
>> +import logging
>> +import signal
>> +
>> +import urwid
>> +import urwid_readline
>> +
>> +from .protocol import ConnectError
>> +from .qmp_protocol import QMP, ExecInterruptedError, ExecuteError
>> +from .util import create_task, pretty_traceback
>> +
>> +
>> +UPDATE_MSG = 'UPDATE_MSG'
>>
> +
>> +
>> +class StatusBar(urwid.Text):
>> +"""
>> +A simple Text widget that currently only shows connection status.
>> +"""
>> +def __init__(self, text=''):
>> +super().__init__(text, align='right')
>> +
>> +
>> +class Editor(urwid_readline.ReadlineEdit):
>> +"""
>> +Support urwid_readline features along with
>> +history support which lacks in urwid_readline
>> +"""
>> +def __init__(self, master):
>> +super().__init__(caption='> ', multiline=True)
>> +self.master = master
>> +self.history = []
>> +self.last_index = -1
>> +self.show_history = False
>> +
>> +def keypress(self, size, key):
>> +# TODO: Add some logic for down key and clean up logic if
>> possible.
>> +# Returning None means the key has been handled by this widget
>> +# which otherwise is propogated to the parent widget to be
>> +# handled
>> +msg = self.get_edit_text()
>> +if key == 'up' and not msg:
>> +# Show the history when 'up arrow' is pressed with no input
>> text.
>> +# NOTE: The show_history logic is necessary because in
>> 'multiline'
>> +# mode (which we use) 'up arrow' is used to move between
>> lines.
>> +self.show_history = True
>> +last_msg = self.history[self.last_index] if self.history
>> else ''
>> +self.set_edit_text(last_msg)
>> +self.edit_pos = len(last_msg)
>> +self.last_index += 1
>> +elif key == 'up' and self.show_history:
>> +if self.last_index < len(self.history):
>> +self.set_edit_text(self.history[self.last_index])
>> +self.edit_pos = len(self.history[self.last_index])
>> +self.last_index += 1
>> +elif key == 'meta enter':
>> +# When using multiline, enter inserts a new line into the
>> editor
>> +# send the input to the server on alt + enter
>> +self.master.cb_send_to_server(msg)
>> +self.history.insert(0, msg)
>> +self.set_edit_text('')
>> +self.last_index = 0
>> +self.show_history = False
>> +else:
>> +self.show_history = False
>> +self.last_index = 0
>> +return super().keypress(size, key)
>> +return None
>> +
>> +
>> +class EditorWidget(urwid.Filler):
>> +"""
>> +Wraps CustomEdit
>> +"""
>> +def __init__(self, master):
>> +super().__init__(Editor(master), valign='top')
>> +
>> +
>> +class HistoryBox(urwid.ListBox):
>> +"""
>> +Shows all the QMP message transmitted/received
>> +"""
>> +def __init__(self, master):
>> +self.master = master
>> +self.history = urwid.SimpleFocusListWalker([])
>> +super().__init__(self.history)
>> +
>> +def add_to_history(self, history):
>> +self.history.append(urwid.Text(history))
>> +if self.history:
>> +self.history.set_focus(len(self.history) - 1)
>> +
>> +
>> +class HistoryWindow(urwid.Frame):
>> +"""
>> +Composes the HistoryBox and EditorWidget
>> +"""
>> +def __init__(self, master):
>> +self.master = master
>> +self.editor = EditorWidget(master)
>> +self.editor_widget = urwid.LineBox(self.editor)
>> +self.history = HistoryBox(master)
>> +self.body = urwid.Pile([('weight', 80, self.history),
>> +('weight', 10, self.editor_widget)])
>> +super().__init__(self.body)
>> +
[PULL 05/23] hw/acpi/ich9: Set ACPI PCI hot-plug as default on Q35
From: Julia Suvorova
Q35 has three different types of PCI devices hot-plug: PCIe Native,
SHPC Native and ACPI hot-plug. This patch changes the default choice
for cold-plugged bridges from PCIe Native to ACPI Hot-plug with
ability to use SHPC and PCIe Native for hot-plugged bridges.
This is a list of the PCIe Native hot-plug issues that led to this
change:
* no racy behavior during boot (see 110c477c2ed)
* no delay during deleting - after the actual power off software
must wait at least 1 second before indicating about it. This case
is quite important for users, it even has its own bug:
https://bugzilla.redhat.com/show_bug.cgi?id=1594168
* no timer-based behavior - in addition to the previous example,
the attention button has a 5-second waiting period, during which
the operation can be canceled with a second press. While this
looks fine for manual button control, automation will result in
the need to queue or drop events, and the software receiving
events in all sort of unspecified combinations of attention/power
indicator states, which is racy and uppredictable.
* fixes:
* https://bugzilla.redhat.com/show_bug.cgi?id=1752465
* https://bugzilla.redhat.com/show_bug.cgi?id=1690256
To return to PCIe Native hot-plug:
-global ICH9-LPC.acpi-pci-hotplug-with-bridge-support=off
Known issue: older linux guests need the following flag
to allow hotplugged pci express devices to use io:
-device pcie-root-port,io-reserve=4096.
io is unusual for pci express so this seems minor.
We'll fix this by a follow up patch.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
Message-Id: <20210713004205.775386-6-jus...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Reviewed-by: David Gibson
---
hw/acpi/ich9.c | 2 +-
hw/i386/pc.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 2f4eb453ac..778e27b659 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -427,7 +427,7 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
pm->disable_s3 = 0;
pm->disable_s4 = 0;
pm->s4_val = 2;
-pm->use_acpi_hotplug_bridge = false;
+pm->use_acpi_hotplug_bridge = true;
object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
>pm_io_base, OBJ_PROP_FLAG_READ);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 8e1220db72..7e03848792 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -98,6 +98,7 @@ GlobalProperty pc_compat_6_0[] = {
{ "qemu64" "-" TYPE_X86_CPU, "family", "6" },
{ "qemu64" "-" TYPE_X86_CPU, "model", "6" },
{ "qemu64" "-" TYPE_X86_CPU, "stepping", "3" },
+{ "ICH9-LPC", "acpi-pci-hotplug-with-bridge-support", "off" },
};
const size_t pc_compat_6_0_len = G_N_ELEMENTS(pc_compat_6_0);
--
MST
[PULL 09/23] vhost-user-rng: backend: Add RNG vhost-user daemon implementation
From: Mathieu Poirier
This patch provides the vhost-user backend implementation to work
in tandem with the vhost-user-rng implementation of the QEMU VMM.
It uses the vhost-user API so that other VMM can re-use the interface
without having to write the driver again.
Signed-off-by: Mathieu Poirier
Message-Id: <20210710005929.1702431-4-mathieu.poir...@linaro.org>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tools/vhost-user-rng/main.c | 403 +++
tools/meson.build| 8 +
tools/vhost-user-rng/50-qemu-rng.json.in | 5 +
tools/vhost-user-rng/meson.build | 10 +
4 files changed, 426 insertions(+)
create mode 100644 tools/vhost-user-rng/main.c
create mode 100644 tools/vhost-user-rng/50-qemu-rng.json.in
create mode 100644 tools/vhost-user-rng/meson.build
diff --git a/tools/vhost-user-rng/main.c b/tools/vhost-user-rng/main.c
new file mode 100644
index 00..c3b8f69227
--- /dev/null
+++ b/tools/vhost-user-rng/main.c
@@ -0,0 +1,403 @@
+/*
+ * VIRTIO RNG Emulation via vhost-user
+ *
+ * Copyright (c) 2021 Mathieu Poirier
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#define G_LOG_DOMAIN "vhost-user-rng"
+#define G_LOG_USE_STRUCTURED 1
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "qemu/cutils.h"
+#include "subprojects/libvhost-user/libvhost-user-glib.h"
+#include "subprojects/libvhost-user/libvhost-user.h"
+
+#ifndef container_of
+#define container_of(ptr, type, member) ({ \
+const typeof(((type *) 0)->member) * __mptr = (ptr); \
+(type *) ((char *) __mptr - offsetof(type, member)); })
+#endif
+
+typedef struct {
+VugDev dev;
+struct itimerspec ts;
+timer_t rate_limit_timer;
+pthread_mutex_t rng_mutex;
+pthread_cond_t rng_cond;
+int64_t quota_remaining;
+bool activate_timer;
+GMainLoop *loop;
+} VuRNG;
+
+static gboolean print_cap, verbose;
+static gchar *source_path, *socket_path;
+static gint source_fd, socket_fd = -1;
+
+/* Defaults tailored on virtio-rng.c */
+static uint32_t period_ms = 1 << 16;
+static uint64_t max_bytes = INT64_MAX;
+
+static void check_rate_limit(union sigval sv)
+{
+VuRNG *rng = sv.sival_ptr;
+bool wakeup = false;
+
+pthread_mutex_lock(>rng_mutex);
+/*
+ * The timer has expired and the guest has used all available
+ * entropy, which means function vu_rng_handle_request() is waiting
+ * on us. As such wake it up once we're done here.
+ */
+if (rng->quota_remaining == 0) {
+wakeup = true;
+}
+
+/*
+ * Reset the entropy available to the guest and tell function
+ * vu_rng_handle_requests() to start the timer before using it.
+ */
+rng->quota_remaining = max_bytes;
+rng->activate_timer = true;
+pthread_mutex_unlock(>rng_mutex);
+
+if (wakeup) {
+pthread_cond_signal(>rng_cond);
+}
+}
+
+static void setup_timer(VuRNG *rng)
+{
+struct sigevent sev;
+int ret;
+
+memset(>ts, 0, sizeof(struct itimerspec));
+rng->ts.it_value.tv_sec = period_ms / 1000;
+rng->ts.it_value.tv_nsec = (period_ms % 1000) * 100;
+
+/*
+ * Call function check_rate_limit() as if it was the start of
+ * a new thread when the timer expires.
+ */
+sev.sigev_notify = SIGEV_THREAD;
+sev.sigev_notify_function = check_rate_limit;
+sev.sigev_value.sival_ptr = rng;
+/* Needs to be NULL if defaults attributes are to be used. */
+sev.sigev_notify_attributes = NULL;
+ret = timer_create(CLOCK_MONOTONIC, , >rate_limit_timer);
+if (ret < 0) {
+fprintf(stderr, "timer_create() failed\n");
+}
+
+}
+
+
+/* Virtio helpers */
+static uint64_t rng_get_features(VuDev *dev)
+{
+if (verbose) {
+g_info("%s: replying", __func__);
+}
+return 0;
+}
+
+static void rng_set_features(VuDev *dev, uint64_t features)
+{
+if (verbose && features) {
+g_autoptr(GString) s = g_string_new("Requested un-handled feature");
+g_string_append_printf(s, " 0x%" PRIx64 "", features);
+g_info("%s: %s", __func__, s->str);
+}
+}
+
+static void vu_rng_handle_requests(VuDev *dev, int qidx)
+{
+VuRNG *rng = container_of(dev, VuRNG, dev.parent);
+VuVirtq *vq = vu_get_queue(dev, qidx);
+VuVirtqElement *elem;
+size_t to_read;
+int len, ret;
+
+for (;;) {
+/* Get element in the vhost virtqueue */
+elem = vu_queue_pop(dev, vq, sizeof(VuVirtqElement));
+if (!elem) {
+break;
+}
+
+/* Get the amount of entropy to read from the vhost server */
+to_read = elem->in_sg[0].iov_len;
+
+pthread_mutex_lock(>rng_mutex);
+
+/*
+ * We have consumed all entropy available for this time slice.
+
[PULL 08/23] vhost-user-rng-pci: Add vhost-user-rng-pci implementation
From: Mathieu Poirier
This patch provides a PCI bus interface to the vhost-user-rng backed.
The implentation is similar to what was done for vhost-user-i2c-pci and
vhost-user-fs-pci.
Signed-off-by: Mathieu Poirier
Message-Id: <20210710005929.1702431-3-mathieu.poir...@linaro.org>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/virtio/vhost-user-rng-pci.c | 79 ++
hw/virtio/meson.build | 1 +
2 files changed, 80 insertions(+)
create mode 100644 hw/virtio/vhost-user-rng-pci.c
diff --git a/hw/virtio/vhost-user-rng-pci.c b/hw/virtio/vhost-user-rng-pci.c
new file mode 100644
index 00..2de39f
--- /dev/null
+++ b/hw/virtio/vhost-user-rng-pci.c
@@ -0,0 +1,79 @@
+/*
+ * Vhost-user RNG virtio device PCI glue
+ *
+ * Copyright (c) 2021 Mathieu Poirier
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "hw/qdev-properties.h"
+#include "hw/virtio/vhost-user-rng.h"
+#include "virtio-pci.h"
+
+struct VHostUserRNGPCI {
+VirtIOPCIProxy parent_obj;
+VHostUserRNG vdev;
+};
+
+typedef struct VHostUserRNGPCI VHostUserRNGPCI;
+
+#define TYPE_VHOST_USER_RNG_PCI "vhost-user-rng-pci-base"
+
+DECLARE_INSTANCE_CHECKER(VHostUserRNGPCI, VHOST_USER_RNG_PCI,
+ TYPE_VHOST_USER_RNG_PCI)
+
+static Property vhost_user_rng_pci_properties[] = {
+DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
+ DEV_NVECTORS_UNSPECIFIED),
+DEFINE_PROP_END_OF_LIST(),
+};
+
+static void vhost_user_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
+{
+VHostUserRNGPCI *dev = VHOST_USER_RNG_PCI(vpci_dev);
+DeviceState *vdev = DEVICE(>vdev);
+
+if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
+vpci_dev->nvectors = 1;
+}
+
+qdev_realize(vdev, BUS(_dev->bus), errp);
+}
+
+static void vhost_user_rng_pci_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
+PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
+k->realize = vhost_user_rng_pci_realize;
+set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
+device_class_set_props(dc, vhost_user_rng_pci_properties);
+pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
+pcidev_k->device_id = 0; /* Set by virtio-pci based on virtio id */
+pcidev_k->revision = 0x00;
+pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER;
+}
+
+static void vhost_user_rng_pci_instance_init(Object *obj)
+{
+VHostUserRNGPCI *dev = VHOST_USER_RNG_PCI(obj);
+
+virtio_instance_init_common(obj, >vdev, sizeof(dev->vdev),
+TYPE_VHOST_USER_RNG);
+}
+
+static const VirtioPCIDeviceTypeInfo vhost_user_rng_pci_info = {
+.base_name = TYPE_VHOST_USER_RNG_PCI,
+.non_transitional_name = "vhost-user-rng-pci",
+.instance_size = sizeof(VHostUserRNGPCI),
+.instance_init = vhost_user_rng_pci_instance_init,
+.class_init = vhost_user_rng_pci_class_init,
+};
+
+static void vhost_user_rng_pci_register(void)
+{
+virtio_pci_types_register(_user_rng_pci_info);
+}
+
+type_init(vhost_user_rng_pci_register);
diff --git a/hw/virtio/meson.build b/hw/virtio/meson.build
index e386791f2a..1430b370e6 100644
--- a/hw/virtio/meson.build
+++ b/hw/virtio/meson.build
@@ -26,6 +26,7 @@ virtio_ss.add(when: 'CONFIG_VIRTIO_RNG', if_true:
files('virtio-rng.c'))
virtio_ss.add(when: 'CONFIG_VIRTIO_IOMMU', if_true: files('virtio-iommu.c'))
virtio_ss.add(when: 'CONFIG_VIRTIO_MEM', if_true: files('virtio-mem.c'))
virtio_ss.add(when: 'CONFIG_VHOST_USER_RNG', if_true:
files('vhost-user-rng.c'))
+virtio_ss.add(when: ['CONFIG_VHOST_USER_RNG', 'CONFIG_VIRTIO_PCI'], if_true:
files('vhost-user-rng-pci.c'))
virtio_pci_ss = ss.source_set()
virtio_pci_ss.add(when: 'CONFIG_VHOST_VSOCK', if_true:
files('vhost-vsock-pci.c'))
--
MST
[PATCH v2 2/6] python: Add dependencies for AQMP TUI
Added dependencies for the upcoming AQMP TUI under the optional
'tui' group.
The same dependencies have also been added under the devel group
since no work around has been found for optional groups to imply
other optional groups.
Signed-off-by: G S Niteesh Babu
---
python/Pipfile.lock | 12
python/setup.cfg| 7 +++
2 files changed, 19 insertions(+)
diff --git a/python/Pipfile.lock b/python/Pipfile.lock
index 8ab41a3f60..76cf1e4930 100644
--- a/python/Pipfile.lock
+++ b/python/Pipfile.lock
@@ -289,6 +289,18 @@
"markers": "python_version < '3.8'",
"version": "==3.10.0.0"
},
+"urwid": {
+"hashes": [
+
"sha256:588bee9c1cb208d0906a9f73c613d2bd32c3ed3702012f51efe318a3f2127eae"
+],
+"version": "==2.1.2"
+},
+"urwid-readline": {
+"hashes": [
+
"sha256:018020cbc864bb5ed87be17dc26b069eae2755cb29f3a9c569aac3bded1efaf4"
+],
+"version": "==0.13"
+},
"virtualenv": {
"hashes": [
"sha256:14fdf849f80dbb29a4eb6caa9875d476ee2a5cf76a5f5415fa2f1606010ab467",
diff --git a/python/setup.cfg b/python/setup.cfg
index 1a552d672a..c62803bffc 100644
--- a/python/setup.cfg
+++ b/python/setup.cfg
@@ -44,11 +44,18 @@ devel =
mypy >= 0.770
pylint >= 2.8.0
tox >= 3.18.0
+urwid >= 2.1.2
+urwid-readline >= 0.13
# Provides qom-fuse functionality
fuse =
fusepy >= 2.0.4
+# AQMP TUI dependencies
+tui =
+urwid >= 2.1.2
+urwid-readline >= 0.13
+
[options.entry_points]
console_scripts =
qom = qemu.qmp.qom:main
--
2.17.1
[PULL 03/23] hw/pci/pcie: Do not set HPC flag if acpihp is used
From: Julia Suvorova
Instead of changing the hot-plug type in _OSC register, do not
set the 'Hot-Plug Capable' flag. This way guest will choose ACPI
hot-plug if it is preferred and leave the option to use SHPC with
pcie-pci-bridge.
The ability to control hot-plug for each downstream port is retained,
while 'hotplug=off' on the port means all hot-plug types are disabled.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
Reviewed-by: Marcel Apfelbaum
Reviewed-by: David Gibson
Message-Id: <20210713004205.775386-4-jus...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_port.h | 5 -
hw/acpi/pcihp.c| 8
hw/core/machine.c | 1 -
hw/i386/pc_q35.c | 11 +++
hw/pci/pcie.c | 8 +++-
hw/pci/pcie_port.c | 1 +
6 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
index bea8ecad0f..e25b289ce8 100644
--- a/include/hw/pci/pcie_port.h
+++ b/include/hw/pci/pcie_port.h
@@ -57,8 +57,11 @@ struct PCIESlot {
/* Disable ACS (really for a pcie_root_port) */
booldisable_acs;
-/* Indicates whether hot-plug is enabled on the slot */
+/* Indicates whether any type of hot-plug is allowed on the slot */
boolhotplug;
+
+boolnative_hotplug;
+
QLIST_ENTRY(PCIESlot) next;
};
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 9fdc6342b0..f4d706e47d 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -31,6 +31,7 @@
#include "hw/pci/pci.h"
#include "hw/pci/pci_bridge.h"
#include "hw/pci/pci_host.h"
+#include "hw/pci/pcie_port.h"
#include "hw/i386/acpi-build.h"
#include "hw/acpi/acpi.h"
#include "hw/pci/pci_bus.h"
@@ -336,6 +337,13 @@ void acpi_pcihp_device_plug_cb(HotplugHandler
*hotplug_dev, AcpiPciHpState *s,
object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
+/* Remove all hot-plug handlers if hot-plug is disabled on slot */
+if (object_dynamic_cast(OBJECT(dev), TYPE_PCIE_SLOT) &&
+!PCIE_SLOT(pdev)->hotplug) {
+qbus_set_hotplug_handler(BUS(sec), NULL);
+return;
+}
+
qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev));
/* We don't have to overwrite any other hotplug handler yet */
assert(QLIST_EMPTY(>child));
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 57c18f909a..11c26eeabd 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -584,7 +584,6 @@ static void machine_set_memdev(Object *obj, const char
*value, Error **errp)
ms->ram_memdev_id = g_strdup(value);
}
-
static void machine_init_notify(Notifier *notifier, void *data)
{
MachineState *machine = MACHINE(qdev_get_machine());
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 46a0f196f4..04b4a4788d 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -37,6 +37,7 @@
#include "sysemu/kvm.h"
#include "hw/kvm/clock.h"
#include "hw/pci-host/q35.h"
+#include "hw/pci/pcie_port.h"
#include "hw/qdev-properties.h"
#include "hw/i386/x86.h"
#include "hw/i386/pc.h"
@@ -136,6 +137,7 @@ static void pc_q35_init(MachineState *machine)
ram_addr_t lowmem;
DriveInfo *hd[MAX_SATA_PORTS];
MachineClass *mc = MACHINE_GET_CLASS(machine);
+bool acpi_pcihp;
/* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
* and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
@@ -236,6 +238,15 @@ static void pc_q35_init(MachineState *machine)
object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
OBJECT(lpc), _abort);
+acpi_pcihp = object_property_get_bool(OBJECT(lpc),
+
"acpi-pci-hotplug-with-bridge-support",
+ NULL);
+
+if (acpi_pcihp) {
+object_register_sugar_prop(TYPE_PCIE_SLOT, "native-hotplug",
+ "false", true);
+}
+
/* irq lines */
gsi_state = pc_gsi_create(>gsi, pcmc->pci_enabled);
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index fd0fa157e8..6e95d82903 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -529,7 +529,13 @@ void pcie_cap_slot_init(PCIDevice *dev, PCIESlot *s)
PCI_EXP_SLTCAP_PIP |
PCI_EXP_SLTCAP_AIP |
PCI_EXP_SLTCAP_ABP);
-if (s->hotplug) {
+
+/*
+ * Enable native hot-plug on all hot-plugged bridges unless
+ * hot-plug is disabled on the slot.
+ */
+if (s->hotplug &&
+(s->native_hotplug || DEVICE(dev)->hotplugged)) {
pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_SLTCAP,
PCI_EXP_SLTCAP_HPS |
[PULL 01/23] hw/i386/acpi-build: Add ACPI PCI hot-plug methods to Q35
From: Julia Suvorova
Implement notifications and gpe to support q35 ACPI PCI hot-plug.
Use 0xcc4 - 0xcd7 range for 'acpi-pci-hotplug' io ports.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
Reviewed-by: Marcel Apfelbaum
Message-Id: <20210713004205.775386-2-jus...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Reviewed-by: David Gibson
---
hw/i386/acpi-build.h| 4
include/hw/acpi/ich9.h | 2 ++
include/hw/acpi/pcihp.h | 3 ++-
hw/acpi/pcihp.c | 6 +++---
hw/acpi/piix4.c | 4 +++-
hw/i386/acpi-build.c| 30 +++---
6 files changed, 33 insertions(+), 16 deletions(-)
diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h
index 74df5fc612..487ec7710f 100644
--- a/hw/i386/acpi-build.h
+++ b/hw/i386/acpi-build.h
@@ -5,6 +5,10 @@
extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio;
+/* PCI Hot-plug registers bases. See docs/spec/acpi_pci_hotplug.txt */
+#define ACPI_PCIHP_SEJ_BASE 0x8
+#define ACPI_PCIHP_BNMR_BASE 0x10
+
void acpi_setup(void);
#endif
diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
index df519e40b5..596120d97f 100644
--- a/include/hw/acpi/ich9.h
+++ b/include/hw/acpi/ich9.h
@@ -28,6 +28,8 @@
#include "hw/acpi/acpi_dev_interface.h"
#include "hw/acpi/tco.h"
+#define ACPI_PCIHP_ADDR_ICH9 0x0cc4
+
typedef struct ICH9LPCPMRegs {
/*
* In ich9 spec says that pm1_cnt register is 32bit width and
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index 2dd90aea30..af1a169fc3 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -55,7 +55,8 @@ typedef struct AcpiPciHpState {
} AcpiPciHpState;
void acpi_pcihp_init(Object *owner, AcpiPciHpState *, PCIBus *root,
- MemoryRegion *address_space_io, bool bridges_enabled);
+ MemoryRegion *address_space_io, bool bridges_enabled,
+ uint16_t io_base);
void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 4999277d57..d98a284b7a 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -37,7 +37,6 @@
#include "qom/qom-qobject.h"
#include "trace.h"
-#define ACPI_PCIHP_ADDR 0xae00
#define ACPI_PCIHP_SIZE 0x0018
#define PCI_UP_BASE 0x
#define PCI_DOWN_BASE 0x0004
@@ -488,10 +487,11 @@ static const MemoryRegionOps acpi_pcihp_io_ops = {
};
void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
- MemoryRegion *address_space_io, bool bridges_enabled)
+ MemoryRegion *address_space_io, bool bridges_enabled,
+ uint16_t io_base)
{
s->io_len = ACPI_PCIHP_SIZE;
-s->io_base = ACPI_PCIHP_ADDR;
+s->io_base = io_base;
s->root = root_bus;
s->legacy_piix = !bridges_enabled;
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 0bd23d74e2..48f7a1edbc 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -49,6 +49,8 @@
#define GPE_BASE 0xafe0
#define GPE_LEN 4
+#define ACPI_PCIHP_ADDR_PIIX4 0xae00
+
struct pci_status {
uint32_t up; /* deprecated, maintained for migration compatibility */
uint32_t down;
@@ -607,7 +609,7 @@ static void piix4_acpi_system_hot_add_init(MemoryRegion
*parent,
if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) {
acpi_pcihp_init(OBJECT(s), >acpi_pci_hotplug, bus, parent,
-s->use_acpi_hotplug_bridge);
+s->use_acpi_hotplug_bridge, ACPI_PCIHP_ADDR_PIIX4);
}
s->cpu_hotplug_legacy = true;
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 357437ff1d..e1c246d6e8 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -219,10 +219,6 @@ static void acpi_get_pm_info(MachineState *machine,
AcpiPmInfo *pm)
/* w2k requires FADT(rev1) or it won't boot, keep PC compatible */
pm->fadt.rev = 1;
pm->cpu_hp_io_base = PIIX4_CPU_HOTPLUG_IO_BASE;
-pm->pcihp_io_base =
-object_property_get_uint(obj, ACPI_PCIHP_IO_BASE_PROP, NULL);
-pm->pcihp_io_len =
-object_property_get_uint(obj, ACPI_PCIHP_IO_LEN_PROP, NULL);
}
if (lpc) {
uint64_t smi_features = object_property_get_uint(lpc,
@@ -238,6 +234,10 @@ static void acpi_get_pm_info(MachineState *machine,
AcpiPmInfo *pm)
pm->smi_on_cpu_unplug =
!!(smi_features & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT));
}
+pm->pcihp_io_base =
+object_property_get_uint(obj, ACPI_PCIHP_IO_BASE_PROP, NULL);
+pm->pcihp_io_len =
+object_property_get_uint(obj, ACPI_PCIHP_IO_LEN_PROP, NULL);
/* The above need not be conditional on machine type because the reset port
* happens to be the same on PIIX (pc) and ICH9 (q35). */
@@ -392,6 +392,9 @@ static void build_append_pci_bus_devices(Aml *parent_scope,
[PATCH v2 0/6] python: AQMP-TUI Prototype
GitLab: https://gitlab.com/niteesh.gs/qemu/-/commits/aqmp-tui-prototype-v1/ Based-on: <20210701041313.1696009-1-js...@redhat.com> [PATCH 00/20] python: introduce Asynchronous QMP package Updates in V2: 1) Moved loop related initialization to 'run' function in 'App' class 2) Added a module logger with support in TUI log messages. 3) Corrected usage of logging.info and logging.debug 4) Added an option in setup.cfg to silent pylint regarding duplicate-code 4) Modified the arguments list to the TUI NOTE: I am not able to get the pipelines running after the v2 changes. I was only able to test the changes locally using *make check*. This patch series introduces AQMP-TUI prototype. This prototype has been helpfull in letting us try out different ideas and giving some insights into things that we had to take care of in the upcoming TUI. It was also helpfull in finding out bugs in the AQMP library. The intent for this patch series is to get comments on the architectural design of the prototype. These comments will lay down the foundation for the upcoming TUI. G S Niteesh Babu (6): python: disable pylint errors for aqmp-tui python: Add dependencies for AQMP TUI python/aqmp-tui: Add AQMP TUI draft python: add optional pygments dependency python/aqmp-tui: add syntax highlighting python: add entry point for aqmp-tui python/Pipfile.lock | 20 ++ python/qemu/aqmp/aqmp_tui.py | 342 +++ python/setup.cfg | 36 +++- 3 files changed, 397 insertions(+), 1 deletion(-) create mode 100644 python/qemu/aqmp/aqmp_tui.py -- 2.17.1
[PATCH v2 6/6] python: add entry point for aqmp-tui
Add an entry point for aqmp-tui. This will allow it to be run from the command line using "aqmp-tui localhost:1234" More options available in the TUI can be found using "aqmp-tui -h" Signed-off-by: G S Niteesh Babu --- python/setup.cfg | 1 + 1 file changed, 1 insertion(+) diff --git a/python/setup.cfg b/python/setup.cfg index 63f5156c03..082bb6d68b 100644 --- a/python/setup.cfg +++ b/python/setup.cfg @@ -68,6 +68,7 @@ console_scripts = qom-fuse = qemu.qmp.qom_fuse:QOMFuse.entry_point [fuse] qemu-ga-client = qemu.qmp.qemu_ga_client:main qmp-shell = qemu.qmp.qmp_shell:main +aqmp-tui = qemu.aqmp.aqmp_tui:main [flake8] extend-ignore = E722 # Prefer pylint's bare-except checks to flake8's -- 2.17.1
[PATCH v2 5/6] python/aqmp-tui: add syntax highlighting
Add syntax highlighting for the incoming and outgoing QMP messages.
This is achieved using the pygments module which was added in a
previous commit.
The current implementation is a really simple one which doesn't
allow for any configuration. In future this has to be improved
to allow for easier theme config using an external config of
some sort.
Signed-off-by: G S Niteesh Babu
---
python/qemu/aqmp/aqmp_tui.py | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/python/qemu/aqmp/aqmp_tui.py b/python/qemu/aqmp/aqmp_tui.py
index f853efc1f5..9ee91f0e99 100644
--- a/python/qemu/aqmp/aqmp_tui.py
+++ b/python/qemu/aqmp/aqmp_tui.py
@@ -12,6 +12,8 @@
from logging import Handler
import signal
+from pygments import lexers
+from pygments import token as Token
import urwid
import urwid_readline
@@ -33,6 +35,11 @@
(Token.Literal.Number.Integer, '', '', '', '#fa0', 'g7'),
(Token.Literal.String.Double, '', '', '', '#6f6', 'g7'),
(Token.Keyword.Constant, '', '', '', '#6af', 'g7'),
+('DEBUG', '', '', '', '#ddf', 'g7'),
+('INFO', '', '', '', 'g100', 'g7'),
+('WARNING', '', '', '', '#ff6', 'g7'),
+('ERROR', '', '', '', '#a00', 'g7'),
+('CRITICAL', '', '', '', '#a00', 'g7'),
('background', '', 'black', '', '', 'g7'),
]
@@ -133,7 +140,7 @@ def cb_add_to_history(self, msg, level=None):
formatted = []
if level:
msg = f'[{level}]: {msg}'
-formatted.append(msg)
+formatted.append((level, msg))
else:
lexer = lexers.JsonLexer() # pylint: disable=no-member
for token in lexer.get_tokens(msg):
@@ -162,6 +169,7 @@ def __init__(self, address):
self.address = address
self.aloop = None
self.loop = None
+self.screen = urwid.raw_display.Screen()
super().__init__()
def add_to_history(self, msg, level=None):
@@ -249,8 +257,10 @@ def run(self, debug=False):
self.aloop.add_signal_handler(sig, self.kill_app)
event_loop = urwid.AsyncioEventLoop(loop=self.aloop)
-self.loop = urwid.MainLoop(self.window,
+self.loop = urwid.MainLoop(urwid.AttrMap(self.window, 'background'),
unhandled_input=self.unhandled_input,
+ screen=self.screen,
+ palette=palette,
handle_mouse=True,
event_loop=event_loop)
--
2.17.1
[PATCH v2 4/6] python: add optional pygments dependency
Added pygments as optional dependency for AQMP TUI.
This is required for the upcoming syntax highlighting feature
in AQMP TUI.
The dependency has also been added in the devel optional group.
Added mypy 'ignore_missing_imports' for pygments since it does
not have any type stubs.
Signed-off-by: G S Niteesh Babu
---
python/Pipfile.lock | 8
python/setup.cfg| 5 +
2 files changed, 13 insertions(+)
diff --git a/python/Pipfile.lock b/python/Pipfile.lock
index 76cf1e4930..2c6d779348 100644
--- a/python/Pipfile.lock
+++ b/python/Pipfile.lock
@@ -200,6 +200,14 @@
],
"version": "==2.0.0"
},
+"pygments": {
+"hashes": [
+
"sha256:a18f47b506a429f6f4b9df81bb02beab9ca21d0a5fee38ed15aef65f0545519f",
+
"sha256:d66e804411278594d764fc69ec36ec13d9ae9147193a1740cd34d272ca383b8e"
+],
+"markers": "python_version >= '3.5'",
+"version": "==2.9.0"
+},
"pylint": {
"hashes": [
"sha256:082a6d461b54f90eea49ca90fff4ee8b6e45e8029e5dbd72f6107ef84f3779c0",
diff --git a/python/setup.cfg b/python/setup.cfg
index 7e5aae66c7..63f5156c03 100644
--- a/python/setup.cfg
+++ b/python/setup.cfg
@@ -46,6 +46,7 @@ devel =
tox >= 3.18.0
urwid >= 2.1.2
urwid-readline >= 0.13
+Pygments >= 2.9.0
# Provides qom-fuse functionality
fuse =
@@ -55,6 +56,7 @@ fuse =
tui =
urwid >= 2.1.2
urwid-readline >= 0.13
+Pygments >= 2.9.0
[options.entry_points]
console_scripts =
@@ -99,6 +101,9 @@ ignore_missing_imports = True
[mypy-urwid_readline]
ignore_missing_imports = True
+[mypy-pygments]
+ignore_missing_imports = True
+
[pylint.messages control]
# Disable the message, report, category or checker with the given id(s). You
# can either give multiple identifiers separated by comma (,) or put this
--
2.17.1
[PATCH v2 3/6] python/aqmp-tui: Add AQMP TUI draft
Added a draft of AQMP TUI.
Implements the follwing basic features:
1) Command transmission/reception.
2) Shows events asynchronously.
3) Shows server status in the bottom status bar.
Also added necessary pylint, mypy configurations
Signed-off-by: G S Niteesh Babu
---
python/qemu/aqmp/aqmp_tui.py | 332 +++
python/setup.cfg | 21 ++-
2 files changed, 352 insertions(+), 1 deletion(-)
create mode 100644 python/qemu/aqmp/aqmp_tui.py
diff --git a/python/qemu/aqmp/aqmp_tui.py b/python/qemu/aqmp/aqmp_tui.py
new file mode 100644
index 00..f853efc1f5
--- /dev/null
+++ b/python/qemu/aqmp/aqmp_tui.py
@@ -0,0 +1,332 @@
+# Copyright (c) 2021
+#
+# Authors:
+# Niteesh Babu G S
+#
+# This work is licensed under the terms of the GNU GPL, version 2 or
+# later. See the COPYING file in the top-level directory.
+
+import argparse
+import asyncio
+import logging
+from logging import Handler
+import signal
+
+import urwid
+import urwid_readline
+
+from .error import MultiException
+from .protocol import ConnectError
+from .qmp_protocol import QMP, ExecInterruptedError, ExecuteError
+from .util import create_task, pretty_traceback
+
+
+UPDATE_MSG = 'UPDATE_MSG'
+
+# Using root logger to enable all loggers under qemu and asyncio
+LOGGER = logging.getLogger()
+
+palette = [
+(Token.Punctuation, '', '', '', 'h15,bold', 'g7'),
+(Token.Text, '', '', '', '', 'g7'),
+(Token.Name.Tag, '', '', '', 'bold,#f88', 'g7'),
+(Token.Literal.Number.Integer, '', '', '', '#fa0', 'g7'),
+(Token.Literal.String.Double, '', '', '', '#6f6', 'g7'),
+(Token.Keyword.Constant, '', '', '', '#6af', 'g7'),
+('background', '', 'black', '', '', 'g7'),
+]
+
+
+class StatusBar(urwid.Text):
+"""
+A simple Text widget that currently only shows connection status.
+"""
+def __init__(self, text=''):
+super().__init__(text, align='right')
+
+
+class Editor(urwid_readline.ReadlineEdit):
+"""
+Support urwid_readline features along with
+history support which lacks in urwid_readline
+"""
+def __init__(self, master):
+super().__init__(caption='> ', multiline=True)
+self.master = master
+self.history = []
+self.last_index = -1
+self.show_history = False
+
+def keypress(self, size, key):
+# TODO: Add some logic for down key and clean up logic if possible.
+# Returning None means the key has been handled by this widget
+# which otherwise is propogated to the parent widget to be
+# handled
+msg = self.get_edit_text()
+if key == 'up' and not msg:
+# Show the history when 'up arrow' is pressed with no input text.
+# NOTE: The show_history logic is necessary because in 'multiline'
+# mode (which we use) 'up arrow' is used to move between lines.
+self.show_history = True
+last_msg = self.history[self.last_index] if self.history else ''
+self.set_edit_text(last_msg)
+self.edit_pos = len(last_msg)
+self.last_index += 1
+elif key == 'up' and self.show_history:
+if self.last_index < len(self.history):
+self.set_edit_text(self.history[self.last_index])
+self.edit_pos = len(self.history[self.last_index])
+self.last_index += 1
+elif key == 'meta enter':
+# When using multiline, enter inserts a new line into the editor
+# send the input to the server on alt + enter
+self.master.cb_send_to_server(msg)
+self.history.insert(0, msg)
+self.set_edit_text('')
+self.last_index = 0
+self.show_history = False
+else:
+self.show_history = False
+self.last_index = 0
+return super().keypress(size, key)
+return None
+
+
+class EditorWidget(urwid.Filler):
+"""
+Wraps CustomEdit
+"""
+def __init__(self, master):
+super().__init__(Editor(master), valign='top')
+
+
+class HistoryBox(urwid.ListBox):
+"""
+Shows all the QMP message transmitted/received
+"""
+def __init__(self, master):
+self.master = master
+self.history = urwid.SimpleFocusListWalker([])
+super().__init__(self.history)
+
+def add_to_history(self, history):
+self.history.append(urwid.Text(history))
+if self.history:
+self.history.set_focus(len(self.history) - 1)
+
+
+class HistoryWindow(urwid.Frame):
+"""
+Composes the HistoryBox and EditorWidget
+"""
+def __init__(self, master):
+self.master = master
+self.editor = EditorWidget(master)
+self.editor_widget = urwid.LineBox(self.editor)
+self.history = HistoryBox(master)
+self.body = urwid.Pile([('weight', 80, self.history),
+('weight', 20, self.editor_widget)])
+
[PATCH v2 1/6] python: disable pylint errors for aqmp-tui
Disable missing-docstring and fixme pylint warnings. This is because since the AQMP is just a prototype it is currently not documented properly and lot of todo and fixme's are still in place. Signed-off-by: G S Niteesh Babu --- python/setup.cfg | 2 ++ 1 file changed, 2 insertions(+) diff --git a/python/setup.cfg b/python/setup.cfg index bce8807702..1a552d672a 100644 --- a/python/setup.cfg +++ b/python/setup.cfg @@ -89,6 +89,8 @@ ignore_missing_imports = True # no Warning level messages displayed, use "--disable=all --enable=classes # --disable=W". disable=too-many-function-args, # mypy handles this with less false positives. +missing-docstring, # FIXME +fixme, # FIXME [pylint.basic] # Good variable names which should always be accepted, separated by a comma. -- 2.17.1
Re: [PULL 00/12] Linux user for 6.1 patches
On Tue, 13 Jul 2021 at 15:09, Laurent Vivier wrote: > > The following changes since commit bd38ae26cea0d1d6a97f930248df149204c210a2: > > Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' > into staging (2021-07-12 11:02:39 +0100) > > are available in the Git repository at: > > git://github.com/vivier/qemu.git tags/linux-user-for-6.1-pull-request > > for you to fetch changes up to 2fa4ad3f9000c385f71237984fdd1eefe2a91900: > > linux-user: update syscall.tbl to Linux v5.13 (2021-07-13 13:59:59 +0200) > > ---- > Linux-user pull request 20210713 > > Update headers to linux v5.13 > cleanup errno target headers > Fix race condition on fd translation table > Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/6.1 for any user-visible changes. -- PMM
[PULL 1/3] vfio: Fix CID 1458134 in vfio_register_ram_discard_listener()
From: David Hildenbrand
CID 1458134: Integer handling issues (BAD_SHIFT)
In expression "1 << ctz64(container->pgsizes)", left shifting by more
than 31 bits has undefined behavior. The shift amount,
"ctz64(container->pgsizes)", is 64.
Commit 5e3b981c330c ("vfio: Support for RamDiscardManager in the !vIOMMU
case") added an assertion that our granularity is at least as big as the
page size.
Although unlikely, we could have a page size that does not fit into
32 bit. In that case, we'd try shifting by more than 31 bit.
Let's use 1ULL instead and make sure we're not shifting by more than 63
bit by asserting that any bit in container->pgsizes is set.
Fixes: CID 1458134
Cc: Alex Williamson
Cc: Eduardo Habkost
Cc: "Michael S. Tsirkin"
Cc: Paolo Bonzini
Cc: Dr. David Alan Gilbert
Cc: Igor Mammedov
Cc: Pankaj Gupta
Cc: Peter Xu
Cc: Auger Eric
Cc: Wei Yang
Cc: teawater
Cc: Marek Kedzierski
Signed-off-by: David Hildenbrand
Reviewed-by: Igor Mammedov
Reviewed-by: Pankaj Gupta
Link: https://lore.kernel.org/r/20210712083135.15755-1-da...@redhat.com
Signed-off-by: Alex Williamson
---
hw/vfio/common.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/vfio/common.c b/hw/vfio/common.c
index 3f0d11136081..8728d4d5c2e2 100644
--- a/hw/vfio/common.c
+++ b/hw/vfio/common.c
@@ -783,7 +783,8 @@ static void
vfio_register_ram_discard_listener(VFIOContainer *container,
section->mr);
g_assert(vrdl->granularity && is_power_of_2(vrdl->granularity));
-g_assert(vrdl->granularity >= 1 << ctz64(container->pgsizes));
+g_assert(container->pgsizes &&
+ vrdl->granularity >= 1ULL << ctz64(container->pgsizes));
ram_discard_listener_init(>listener,
vfio_ram_discard_notify_populate,
[PULL 3/3] vfio/pci: Add pba_offset PCI quirk for BAIDU KUNLUN AI processor
From: Cai Huoqing
Fix pba_offset initialization value for BAIDU KUNLUN Virtual
Function device. The KUNLUN hardware returns an incorrect
value for the VF PBA offset, and add a quirk to instead
return a hardcoded value of 0xb400.
Signed-off-by: Cai Huoqing
Link: https://lore.kernel.org/r/20210713093743.942-1-caihuoq...@baidu.com
[aw: comment & whitespace tuning]
Signed-off-by: Alex Williamson
---
hw/vfio/pci.c|8
include/hw/pci/pci_ids.h |3 +++
2 files changed, 11 insertions(+)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 971273fd458b..e1ea1d8a23b5 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -1499,6 +1499,14 @@ static void vfio_msix_early_setup(VFIOPCIDevice *vdev,
Error **errp)
if (vdev->vendor_id == PCI_VENDOR_ID_CHELSIO &&
(vdev->device_id & 0xff00) == 0x5800) {
msix->pba_offset = 0x1000;
+/*
+ * BAIDU KUNLUN Virtual Function devices for KUNLUN AI processor
+ * return an incorrect value of 0x46 for the VF PBA offset while
+ * the BAR itself is only 0x1. The correct value is 0xb400.
+ */
+} else if (vfio_pci_is(vdev, PCI_VENDOR_ID_BAIDU,
+ PCI_DEVICE_ID_KUNLUN_VF)) {
+msix->pba_offset = 0xb400;
} else if (vdev->msix_relo == OFF_AUTOPCIBAR_OFF) {
error_setg(errp, "hardware reports invalid configuration, "
"MSIX PBA outside of specified BAR");
diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h
index 5c14681b82eb..11abe22d4604 100644
--- a/include/hw/pci/pci_ids.h
+++ b/include/hw/pci/pci_ids.h
@@ -227,6 +227,9 @@
#define PCI_VENDOR_ID_FREESCALE 0x1957
#define PCI_DEVICE_ID_MPC8533E 0x0030
+#define PCI_VENDOR_ID_BAIDU 0x1d22
+#define PCI_DEVICE_ID_KUNLUN_VF 0x3685
+
#define PCI_VENDOR_ID_INTEL 0x8086
#define PCI_DEVICE_ID_INTEL_823780x0484
#define PCI_DEVICE_ID_INTEL_824410x1237
[PULL 2/3] vfio/pci: Change to use vfio_pci_is()
From: Cai Huoqing
Make use of vfio_pci_is() helper function.
Signed-off-by: Cai Huoqing
Link: https://lore.kernel.org/r/20210713014831.742-1-caihuoq...@baidu.com
[aw: commit log wording]
Signed-off-by: Alex Williamson
---
hw/vfio/pci.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index ab4077aad23e..971273fd458b 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -3058,14 +3058,14 @@ static void vfio_realize(PCIDevice *pdev, Error **errp)
}
}
-if (vdev->vendor_id == PCI_VENDOR_ID_NVIDIA) {
+if (vfio_pci_is(vdev, PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID)) {
ret = vfio_pci_nvidia_v100_ram_init(vdev, errp);
if (ret && ret != -ENODEV) {
error_report("Failed to setup NVIDIA V100 GPU RAM");
}
}
-if (vdev->vendor_id == PCI_VENDOR_ID_IBM) {
+if (vfio_pci_is(vdev, PCI_VENDOR_ID_IBM, PCI_ANY_ID)) {
ret = vfio_pci_nvlink2_init(vdev, errp);
if (ret && ret != -ENODEV) {
error_report("Failed to setup NVlink2 bridge");
[PULL 0/3] VFIO update 2021-07-13 (for v6.1)
The following changes since commit 961fef0ace0b2a997544deec2f01981b9c9c96e3: Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210712' into staging (2021-07-13 17:51:50 +0100) are available in the Git repository at: git://github.com/awilliam/qemu-vfio.git tags/vfio-update-20210713.0 for you to fetch changes up to fefc1861d4ba8b9b4d7153dc6b359a65468d15cb: vfio/pci: Add pba_offset PCI quirk for BAIDU KUNLUN AI processor (2021-07-13 11:31:14 -0600) VFIO update 2021-07-13 * Coverity fix to discard listener (David Hildenbrand) * MSI-X PBA quirk for BAIDU VFs, additional helper use cases (Cai Huoqing) Cai Huoqing (2): vfio/pci: Change to use vfio_pci_is() vfio/pci: Add pba_offset PCI quirk for BAIDU KUNLUN AI processor David Hildenbrand (1): vfio: Fix CID 1458134 in vfio_register_ram_discard_listener() hw/vfio/common.c | 3 ++- hw/vfio/pci.c| 12 ++-- include/hw/pci/pci_ids.h | 3 +++ 3 files changed, 15 insertions(+), 3 deletions(-)
[PULL 15/23] tests/acceptance: Let the framework handle "cpu:VALUE" tagged tests
From: Wainer dos Santos Moschetta
The tests that are already tagged with "cpu:VALUE" don't need to add
"-cpu VALUE" to the list of arguments of the vm object because the avocado_qemu
framework is able to handle it automatically.
Reviewed-by: Cleber Rosa
Tested-by: Cleber Rosa
Reviewed-by: Willian Rampazzo
Signed-off-by: Wainer dos Santos Moschetta
Message-Id: <20210430133414.39905-4-waine...@redhat.com>
Signed-off-by: Cleber Rosa
---
tests/acceptance/boot_linux.py | 3 ---
tests/acceptance/boot_xen.py | 1 -
tests/acceptance/machine_mips_malta.py | 1 -
tests/acceptance/replay_kernel.py | 8 +++-
tests/acceptance/reverse_debugging.py | 2 +-
tests/acceptance/tcg_plugins.py| 9 -
6 files changed, 8 insertions(+), 16 deletions(-)
diff --git a/tests/acceptance/boot_linux.py b/tests/acceptance/boot_linux.py
index 34c4366366..ab19146d1e 100644
--- a/tests/acceptance/boot_linux.py
+++ b/tests/acceptance/boot_linux.py
@@ -79,7 +79,6 @@ def test_virt_tcg_gicv2(self):
"""
self.require_accelerator("tcg")
self.vm.add_args("-accel", "tcg")
-self.vm.add_args("-cpu", "max")
self.vm.add_args("-machine", "virt,gic-version=2")
self.add_common_args()
self.launch_and_wait(set_up_ssh_connection=False)
@@ -92,7 +91,6 @@ def test_virt_tcg_gicv3(self):
"""
self.require_accelerator("tcg")
self.vm.add_args("-accel", "tcg")
-self.vm.add_args("-cpu", "max")
self.vm.add_args("-machine", "virt,gic-version=3")
self.add_common_args()
self.launch_and_wait(set_up_ssh_connection=False)
@@ -104,7 +102,6 @@ def test_virt_kvm(self):
"""
self.require_accelerator("kvm")
self.vm.add_args("-accel", "kvm")
-self.vm.add_args("-cpu", "host")
self.vm.add_args("-machine", "virt,gic-version=host")
self.add_common_args()
self.launch_and_wait(set_up_ssh_connection=False)
diff --git a/tests/acceptance/boot_xen.py b/tests/acceptance/boot_xen.py
index 75c2d44492..3479b5233b 100644
--- a/tests/acceptance/boot_xen.py
+++ b/tests/acceptance/boot_xen.py
@@ -48,7 +48,6 @@ def launch_xen(self, xen_path):
xen_command_line = self.XEN_COMMON_COMMAND_LINE
self.vm.add_args('-machine', 'virtualization=on',
- '-cpu', 'cortex-a57',
'-m', '768',
'-kernel', xen_path,
'-append', xen_command_line,
diff --git a/tests/acceptance/machine_mips_malta.py
b/tests/acceptance/machine_mips_malta.py
index b1fd075f51..b67d8cb141 100644
--- a/tests/acceptance/machine_mips_malta.py
+++ b/tests/acceptance/machine_mips_malta.py
@@ -62,7 +62,6 @@ def do_test_i6400_framebuffer_logo(self, cpu_cores_count):
kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
'clocksource=GIC console=tty0 console=ttyS0')
self.vm.add_args('-kernel', kernel_path,
- '-cpu', 'I6400',
'-smp', '%u' % cpu_cores_count,
'-vga', 'std',
'-append', kernel_command_line)
diff --git a/tests/acceptance/replay_kernel.py
b/tests/acceptance/replay_kernel.py
index 71facdaa75..75f80506c1 100644
--- a/tests/acceptance/replay_kernel.py
+++ b/tests/acceptance/replay_kernel.py
@@ -156,8 +156,7 @@ def test_aarch64_virt(self):
'console=ttyAMA0')
console_pattern = 'VFS: Cannot open root device'
-self.run_rr(kernel_path, kernel_command_line, console_pattern,
-args=('-cpu', 'cortex-a53'))
+self.run_rr(kernel_path, kernel_command_line, console_pattern)
def test_arm_virt(self):
"""
@@ -301,7 +300,7 @@ def test_ppc64_e500(self):
tar_url = ('https://www.qemu-advent-calendar.org'
'/2018/download/day19.tar.xz')
file_path = self.fetch_asset(tar_url, asset_hash=tar_hash)
-self.do_test_advcal_2018(file_path, 'uImage', ('-cpu', 'e5500'))
+self.do_test_advcal_2018(file_path, 'uImage')
def test_ppc_g3beige(self):
"""
@@ -348,8 +347,7 @@ def test_xtensa_lx60(self):
tar_url = ('https://www.qemu-advent-calendar.org'
'/2018/download/day02.tar.xz')
file_path = self.fetch_asset(tar_url, asset_hash=tar_hash)
-self.do_test_advcal_2018(file_path, 'santas-sleigh-ride.elf',
- args=('-cpu', 'dc233c'))
+self.do_test_advcal_2018(file_path, 'santas-sleigh-ride.elf')
@skipUnless(os.getenv('AVOCADO_TIMEOUT_EXPECTED'), 'Test might timeout')
class ReplayKernelSlow(ReplayKernelBase):
diff --git a/tests/acceptance/reverse_debugging.py
b/tests/acceptance/reverse_debugging.py
index be01aca217..d2921e70c3 100644
--- a/tests/acceptance/reverse_debugging.py
+++ b/tests/acceptance/reverse_debugging.py
@@ -207,4
[PULL 23/23] tests/acceptance/cpu_queries.py: use the proper logging channels
The test contains methods for the proper log of test related
information. Let's use that and remove the print and the unused
logging import.
Reference:
https://avocado-framework.readthedocs.io/en/87.0/api/test/avocado.html#avocado.Test.log
Signed-off-by: Cleber Rosa
Message-Id: <20210415215141.1865467-6-cr...@redhat.com>
Reviewed-by: Willian Rampazzo
Reviewed-by: Wainer dos Santos Moschetta
Signed-off-by: Cleber Rosa
---
tests/acceptance/cpu_queries.py | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/tests/acceptance/cpu_queries.py b/tests/acceptance/cpu_queries.py
index 293dccb89a..cc9e380cc7 100644
--- a/tests/acceptance/cpu_queries.py
+++ b/tests/acceptance/cpu_queries.py
@@ -8,8 +8,6 @@
# This work is licensed under the terms of the GNU GPL, version 2 or
# later. See the COPYING file in the top-level directory.
-import logging
-
from avocado_qemu import Test
class QueryCPUModelExpansion(Test):
@@ -27,7 +25,7 @@ def test(self):
cpus = self.vm.command('query-cpu-definitions')
for c in cpus:
-print(repr(c))
+self.log.info("Checking CPU: %s", c)
self.assertNotIn('', c['unavailable-features'], c['name'])
for c in cpus:
--
2.31.1
[PULL 22/23] tests/acceptance/linux_ssh_mips_malta.py: drop identical setUp
These tests' setUp do not do anything beyong what their base class do.
And while they do decorate the setUp() we can decorate the classes
instead, so no functionality is lost here.
This is possible because since Avocado 76.0 we can decorate setUp()
directly.
Signed-off-by: Cleber Rosa
Message-Id: <20210415215141.1865467-4-cr...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Willian Rampazzo
[PMD: added note to commit message about Avocado feature/version]
Signed-off-by: Cleber Rosa
---
tests/acceptance/linux_ssh_mips_malta.py | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/tests/acceptance/linux_ssh_mips_malta.py
b/tests/acceptance/linux_ssh_mips_malta.py
index 61c9079d04..4de1947418 100644
--- a/tests/acceptance/linux_ssh_mips_malta.py
+++ b/tests/acceptance/linux_ssh_mips_malta.py
@@ -19,6 +19,8 @@
from avocado.utils import ssh
+@skipUnless(os.getenv('AVOCADO_TIMEOUT_EXPECTED'), 'Test might timeout')
+@skipUnless(ssh.SSH_CLIENT_BINARY, 'No SSH client available')
class LinuxSSH(Test, LinuxSSHMixIn):
timeout = 150 # Not for 'configure --enable-debug --enable-debug-tcg'
@@ -65,11 +67,6 @@ def get_kernel_info(self, endianess, wordsize):
kernel_hash = self.IMAGE_INFO[endianess]['kernel_hash'][wordsize]
return kernel_url, kernel_hash
-@skipUnless(ssh.SSH_CLIENT_BINARY, 'No SSH client available')
-@skipUnless(os.getenv('AVOCADO_TIMEOUT_EXPECTED'), 'Test might timeout')
-def setUp(self):
-super(LinuxSSH, self).setUp()
-
def ssh_disconnect_vm(self):
self.ssh_session.quit()
--
2.31.1
[PULL 18/23] tests/acceptance: Add set_vm_arg() to the Test class
From: Wainer dos Santos Moschetta The set_vm_arg method is added to avocado_qemu.Test class on this change. Use that method to set (or replace) an argument to the list of arguments given to the QEMU binary. Suggested-by: Cleber Rosa Signed-off-by: Wainer dos Santos Moschetta Reviewed-by: Willian Rampazzo Message-Id: <20210430133414.39905-7-waine...@redhat.com> Signed-off-by: Cleber Rosa --- tests/acceptance/avocado_qemu/__init__.py | 21 + 1 file changed, 21 insertions(+) diff --git a/tests/acceptance/avocado_qemu/__init__.py b/tests/acceptance/avocado_qemu/__init__.py index 3a218057b3..2c4fef3e14 100644 --- a/tests/acceptance/avocado_qemu/__init__.py +++ b/tests/acceptance/avocado_qemu/__init__.py @@ -251,6 +251,27 @@ def get_vm(self, *args, name=None): self._vms[name].set_machine(self.machine) return self._vms[name] +def set_vm_arg(self, arg, value): +""" +Set an argument to list of extra arguments to be given to the QEMU +binary. If the argument already exists then its value is replaced. + +:param arg: the QEMU argument, such as "-cpu" in "-cpu host" +:type arg: str +:param value: the argument value, such as "host" in "-cpu host" +:type value: str +""" +if not arg or not value: +return +if arg not in self.vm.args: +self.vm.args.extend([arg, value]) +else: +idx = self.vm.args.index(arg) + 1 +if idx < len(self.vm.args): +self.vm.args[idx] = value +else: +self.vm.args.append(value) + def tearDown(self): for vm in self._vms.values(): vm.shutdown() -- 2.31.1
[PULL 12/23] tests/acceptance: Tag NetBSD tests as 'os:netbsd'
From: Philippe Mathieu-Daudé
Avocado allows us to select set of tests using tags.
When wanting to run all tests using a NetBSD guest OS,
it is convenient to have them tagged, add the 'os:netbsd'
tag.
It allows one to run the NetBSD tests with:
$ avocado --show=app,console run -t os:netbsd tests/acceptance/
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20210623180021.898286-4-f4...@amsat.org>
Reviewed-by: Niek Linnenbank
Reviewed-by: Willian Rampazzo
Reviewed-by: Cleber Rosa
[PMD: ammend the commit message with example command]
Signed-off-by: Cleber Rosa
---
tests/acceptance/boot_linux_console.py | 1 +
tests/acceptance/ppc_prep_40p.py | 2 ++
2 files changed, 3 insertions(+)
diff --git a/tests/acceptance/boot_linux_console.py
b/tests/acceptance/boot_linux_console.py
index 3ae11a7a8f..0a8222f17d 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -905,6 +905,7 @@ def test_arm_orangepi_uboot_netbsd9(self):
:avocado: tags=arch:arm
:avocado: tags=machine:orangepi-pc
:avocado: tags=device:sd
+:avocado: tags=os:netbsd
"""
# This test download a 304MB compressed image and expand it to 2GB
deb_url = ('http://snapshot.debian.org/archive/debian/'
diff --git a/tests/acceptance/ppc_prep_40p.py b/tests/acceptance/ppc_prep_40p.py
index 96ba13b894..2993ee3b07 100644
--- a/tests/acceptance/ppc_prep_40p.py
+++ b/tests/acceptance/ppc_prep_40p.py
@@ -27,6 +27,7 @@ def test_factory_firmware_and_netbsd(self):
"""
:avocado: tags=arch:ppc
:avocado: tags=machine:40p
+:avocado: tags=os:netbsd
:avocado: tags=slowness:high
"""
bios_url = ('http://ftpmirror.your.org/pub/misc/'
@@ -64,6 +65,7 @@ def test_openbios_and_netbsd(self):
"""
:avocado: tags=arch:ppc
:avocado: tags=machine:40p
+:avocado: tags=os:netbsd
"""
drive_url = ('https://cdn.netbsd.org/pub/NetBSD/iso/7.1.2/'
'NetBSD-7.1.2-prep.iso')
--
2.31.1
[PULL 19/23] tests/acceptance: Handle cpu tag on x86_cpu_model_versions tests
From: Wainer dos Santos Moschetta
Some test cases on x86_cpu_model_versions.py are corner cases because they
need to pass extra options to the -cpu argument. Once the avocado_qemu
framework will set -cpu automatically, the value should be reset. This changed
those tests so to call set_vm_arg() to overwrite the -cpu value.
Signed-off-by: Wainer dos Santos Moschetta
Reviewed-by: Willian Rampazzo
Message-Id: <20210430133414.39905-8-waine...@redhat.com>
Signed-off-by: Cleber Rosa
---
tests/acceptance/x86_cpu_model_versions.py | 40 +-
1 file changed, 32 insertions(+), 8 deletions(-)
diff --git a/tests/acceptance/x86_cpu_model_versions.py
b/tests/acceptance/x86_cpu_model_versions.py
index 77ed8597a4..0e9feda62d 100644
--- a/tests/acceptance/x86_cpu_model_versions.py
+++ b/tests/acceptance/x86_cpu_model_versions.py
@@ -252,10 +252,13 @@ def get_cpu_prop(self, prop):
def test_4_1(self):
"""
:avocado: tags=machine:pc-i440fx-4.1
+:avocado: tags=cpu:Cascadelake-Server
"""
# machine-type only:
self.vm.add_args('-S')
-self.vm.add_args('-cpu',
'Cascadelake-Server,x-force-features=on,check=off,enforce=off')
+self.set_vm_arg('-cpu',
+'Cascadelake-Server,x-force-features=on,check=off,'
+'enforce=off')
self.vm.launch()
self.assertFalse(self.get_cpu_prop('arch-capabilities'),
'pc-i440fx-4.1 + Cascadelake-Server should not have
arch-capabilities')
@@ -263,9 +266,12 @@ def test_4_1(self):
def test_4_0(self):
"""
:avocado: tags=machine:pc-i440fx-4.0
+:avocado: tags=cpu:Cascadelake-Server
"""
self.vm.add_args('-S')
-self.vm.add_args('-cpu',
'Cascadelake-Server,x-force-features=on,check=off,enforce=off')
+self.set_vm_arg('-cpu',
+'Cascadelake-Server,x-force-features=on,check=off,'
+'enforce=off')
self.vm.launch()
self.assertFalse(self.get_cpu_prop('arch-capabilities'),
'pc-i440fx-4.0 + Cascadelake-Server should not have
arch-capabilities')
@@ -273,10 +279,13 @@ def test_4_0(self):
def test_set_4_0(self):
"""
:avocado: tags=machine:pc-i440fx-4.0
+:avocado: tags=cpu:Cascadelake-Server
"""
# command line must override machine-type if CPU model is not
versioned:
self.vm.add_args('-S')
-self.vm.add_args('-cpu',
'Cascadelake-Server,x-force-features=on,check=off,enforce=off,+arch-capabilities')
+self.set_vm_arg('-cpu',
+'Cascadelake-Server,x-force-features=on,check=off,'
+'enforce=off,+arch-capabilities')
self.vm.launch()
self.assertTrue(self.get_cpu_prop('arch-capabilities'),
'pc-i440fx-4.0 + Cascadelake-Server,+arch-capabilities
should have arch-capabilities')
@@ -284,9 +293,12 @@ def test_set_4_0(self):
def test_unset_4_1(self):
"""
:avocado: tags=machine:pc-i440fx-4.1
+:avocado: tags=cpu:Cascadelake-Server
"""
self.vm.add_args('-S')
-self.vm.add_args('-cpu',
'Cascadelake-Server,x-force-features=on,check=off,enforce=off,-arch-capabilities')
+self.set_vm_arg('-cpu',
+'Cascadelake-Server,x-force-features=on,check=off,'
+'enforce=off,-arch-capabilities')
self.vm.launch()
self.assertFalse(self.get_cpu_prop('arch-capabilities'),
'pc-i440fx-4.1 +
Cascadelake-Server,-arch-capabilities should not have arch-capabilities')
@@ -294,10 +306,13 @@ def test_unset_4_1(self):
def test_v1_4_0(self):
"""
:avocado: tags=machine:pc-i440fx-4.0
+:avocado: tags=cpu:Cascadelake-Server
"""
# versioned CPU model overrides machine-type:
self.vm.add_args('-S')
-self.vm.add_args('-cpu',
'Cascadelake-Server-v1,x-force-features=on,check=off,enforce=off')
+self.set_vm_arg('-cpu',
+'Cascadelake-Server-v1,x-force-features=on,check=off,'
+'enforce=off')
self.vm.launch()
self.assertFalse(self.get_cpu_prop('arch-capabilities'),
'pc-i440fx-4.0 + Cascadelake-Server-v1 should not
have arch-capabilities')
@@ -305,9 +320,12 @@ def test_v1_4_0(self):
def test_v2_4_0(self):
"""
:avocado: tags=machine:pc-i440fx-4.0
+:avocado: tags=cpu:Cascadelake-Server
"""
self.vm.add_args('-S')
-self.vm.add_args('-cpu',
'Cascadelake-Server-v2,x-force-features=on,check=off,enforce=off')
+self.set_vm_arg('-cpu',
+'Cascadelake-Server-v2,x-force-features=on,check=off,'
+'enforce=off')
self.vm.launch()
[PULL 21/23] Acceptance tests: do not try to reuse packages from the system
The premise behind the original behavior is that it would save people from downloading Avocado (and other dependencies) if already installed on the system. To be honest, I think it's extremely rare that the same versions described as dependencies will be available on most systems. But, the biggest motivations here are that: 1) Hacking on QEMU in the same system used to develop Avocado leads to confusion with regards to the exact bits that are being used; 2) Not reusing Python packages from system wide installations gives extra assurance that the same behavior will be seen from tests run on different machines; With regards to downloads, pip already caches the downloaded wheels and tarballs under ~/.cache/pip, so there should not be more than one download even if the venv is destroyed and recreated. Signed-off-by: Cleber Rosa Message-Id: <20210415215141.1865467-3-cr...@redhat.com> Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Willian Rampazzo Reviewed-by: Wainer dos Santos Moschetta Signed-off-by: Cleber Rosa --- tests/Makefile.include | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/Makefile.include b/tests/Makefile.include index e4dcb17329..6e16c05f10 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -96,7 +96,7 @@ AVOCADO_TAGS=$(patsubst %-softmmu,-t arch:%, $(filter %-softmmu,$(TARGETS))) $(TESTS_VENV_DIR): $(TESTS_VENV_REQ) $(call quiet-command, \ -$(PYTHON) -m venv --system-site-packages $@, \ +$(PYTHON) -m venv $@, \ VENV, $@) $(call quiet-command, \ $(TESTS_VENV_DIR)/bin/python -m pip -q install -r $(TESTS_VENV_REQ), \ -- 2.31.1
[PULL 16/23] tests/acceptance: Tagging tests with "cpu:VALUE"
From: Wainer dos Santos Moschetta
The existing tests which are passing "-cpu VALUE" argument to the vm object
are now properly "cpu:VALUE" tagged, so letting the avocado_qemu framework to
handle that automatically.
Reviewed-by: Cleber Rosa
Reviewed-by: Willian Rampazzo
Signed-off-by: Wainer dos Santos Moschetta
Message-Id: <20210430133414.39905-5-waine...@redhat.com>
Signed-off-by: Cleber Rosa
---
tests/acceptance/boot_linux_console.py | 13 -
tests/acceptance/pc_cpu_hotplug_props.py | 2 +-
tests/acceptance/replay_kernel.py| 9 ++---
tests/acceptance/virtio-gpu.py | 4 ++--
4 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/tests/acceptance/boot_linux_console.py
b/tests/acceptance/boot_linux_console.py
index 0a8222f17d..5248c8097d 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -239,6 +239,7 @@ def test_mips64el_malta_5KEc_cpio(self):
:avocado: tags=arch:mips64el
:avocado: tags=machine:malta
:avocado: tags=endian:little
+:avocado: tags=cpu:5KEc
"""
kernel_url = ('https://github.com/philmd/qemu-testing-blob/'
'raw/9ad2df38/mips/malta/mips64el/'
@@ -258,8 +259,7 @@ def test_mips64el_malta_5KEc_cpio(self):
kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE
+ 'console=ttyS0 console=tty '
+ 'rdinit=/sbin/init noreboot')
-self.vm.add_args('-cpu', '5KEc',
- '-kernel', kernel_path,
+self.vm.add_args('-kernel', kernel_path,
'-initrd', initrd_path,
'-append', kernel_command_line,
'-no-reboot')
@@ -287,7 +287,6 @@ def do_test_mips_malta32el_nanomips(self, kernel_url,
kernel_hash):
+ 'mem=256m@@0x0 '
+ 'console=ttyS0')
self.vm.add_args('-no-reboot',
- '-cpu', 'I7200',
'-kernel', kernel_path,
'-append', kernel_command_line)
self.vm.launch()
@@ -299,6 +298,7 @@ def test_mips_malta32el_nanomips_4k(self):
:avocado: tags=arch:mipsel
:avocado: tags=machine:malta
:avocado: tags=endian:little
+:avocado: tags=cpu:I7200
"""
kernel_url = ('https://mipsdistros.mips.com/LinuxDistro/nanomips/'
'kernels/v4.15.18-432-gb2eb9a8b07a1-20180627102142/'
@@ -311,6 +311,7 @@ def test_mips_malta32el_nanomips_16k_up(self):
:avocado: tags=arch:mipsel
:avocado: tags=machine:malta
:avocado: tags=endian:little
+:avocado: tags=cpu:I7200
"""
kernel_url = ('https://mipsdistros.mips.com/LinuxDistro/nanomips/'
'kernels/v4.15.18-432-gb2eb9a8b07a1-20180627102142/'
@@ -323,6 +324,7 @@ def test_mips_malta32el_nanomips_64k_dbg(self):
:avocado: tags=arch:mipsel
:avocado: tags=machine:malta
:avocado: tags=endian:little
+:avocado: tags=cpu:I7200
"""
kernel_url = ('https://mipsdistros.mips.com/LinuxDistro/nanomips/'
'kernels/v4.15.18-432-gb2eb9a8b07a1-20180627102142/'
@@ -335,6 +337,7 @@ def test_aarch64_virt(self):
:avocado: tags=arch:aarch64
:avocado: tags=machine:virt
:avocado: tags=accel:tcg
+:avocado: tags=cpu:cortex-a53
"""
kernel_url = ('https://archives.fedoraproject.org/pub/archive/fedora'
'/linux/releases/29/Everything/aarch64/os/images/pxeboot'
@@ -1168,9 +1171,9 @@ def test_ppc64_e500(self):
"""
:avocado: tags=arch:ppc64
:avocado: tags=machine:ppce500
+:avocado: tags=cpu:e5500
"""
tar_hash = '6951d86d644b302898da2fd701739c9406527fe1'
-self.vm.add_args('-cpu', 'e5500')
self.do_test_advcal_2018('19', tar_hash, 'uImage')
def test_ppc_g3beige(self):
@@ -1212,7 +1215,7 @@ def test_xtensa_lx60(self):
"""
:avocado: tags=arch:xtensa
:avocado: tags=machine:lx60
+:avocado: tags=cpu:dc233c
"""
tar_hash = '49e88d9933742f0164b60839886c9739cb7a0d34'
-self.vm.add_args('-cpu', 'dc233c')
self.do_test_advcal_2018('02', tar_hash, 'santas-sleigh-ride.elf')
diff --git a/tests/acceptance/pc_cpu_hotplug_props.py
b/tests/acceptance/pc_cpu_hotplug_props.py
index f48f68fc6b..2e86d5017a 100644
--- a/tests/acceptance/pc_cpu_hotplug_props.py
+++ b/tests/acceptance/pc_cpu_hotplug_props.py
@@ -25,11 +25,11 @@
class OmittedCPUProps(Test):
"""
:avocado: tags=arch:x86_64
+:avocado: tags=cpu:qemu64
"""
def test_no_die_id(self):
self.vm.add_args('-nodefaults', '-S')
self.vm.add_args('-smp', '1,sockets=2,cores=2,threads=2,maxcpus=8')
-
[PULL 20/23] python: Configure tox to skip missing interpreters
From: Wainer dos Santos Moschetta Currently tox tests against the installed interpreters, however if any supported interpreter is absent then it will return fail. It seems not reasonable to expect developers to have all supported interpreters installed on their systems. Luckily tox can be configured to skip missing interpreters. This changed the tox setup so that missing interpreters are skipped by default. On the CI, however, we still want to enforce it tests against all supported. This way on CI the --skip-missing-interpreters=false option is passed to tox. Signed-off-by: Wainer dos Santos Moschetta Message-Id: <20210630184546.456582-1-waine...@redhat.com> Reviewed-by: Willian Rampazzo Reviewed-by: John Snow Signed-off-by: Cleber Rosa --- .gitlab-ci.d/static_checks.yml | 1 + python/Makefile| 5 - python/setup.cfg | 1 + 3 files changed, 6 insertions(+), 1 deletion(-) diff --git a/.gitlab-ci.d/static_checks.yml b/.gitlab-ci.d/static_checks.yml index b01f6ec231..96dbd9e310 100644 --- a/.gitlab-ci.d/static_checks.yml +++ b/.gitlab-ci.d/static_checks.yml @@ -43,6 +43,7 @@ check-python-tox: - make -C python check-tox variables: GIT_DEPTH: 1 +QEMU_TOX_EXTRA_ARGS: --skip-missing-interpreters=false needs: job: python-container allow_failure: true diff --git a/python/Makefile b/python/Makefile index ac46ae33e7..fe27a3e12e 100644 --- a/python/Makefile +++ b/python/Makefile @@ -1,4 +1,5 @@ QEMU_VENV_DIR=.dev-venv +QEMU_TOX_EXTRA_ARGS ?= .PHONY: help help: @@ -15,6 +16,8 @@ help: @echo "These tests use the newest dependencies." @echo "Requires: Python 3.6 - 3.10, and tox." @echo "Hint (Fedora): 'sudo dnf install python3-tox python3.10'" + @echo "The variable QEMU_TOX_EXTRA_ARGS can be use to pass extra" + @echo "arguments to tox". @echo "" @echo "make check-dev:" @echo "Run tests in a venv against your default python3 version." @@ -87,7 +90,7 @@ check: .PHONY: check-tox check-tox: - @tox + @tox $(QEMU_TOX_EXTRA_ARGS) .PHONY: clean clean: diff --git a/python/setup.cfg b/python/setup.cfg index 11f71d5312..14bab90288 100644 --- a/python/setup.cfg +++ b/python/setup.cfg @@ -121,6 +121,7 @@ multi_line_output=3 [tox:tox] envlist = py36, py37, py38, py39, py310 +skip_missing_interpreters = true [testenv] allowlist_externals = make -- 2.31.1
[PULL 17/23] python/qemu: Add args property to the QEMUMachine class
From: Wainer dos Santos Moschetta This added the args property to QEMUMachine so that users of the class can access and handle the list of arguments to be given to the QEMU binary. Reviewed-by: Cleber Rosa Reviewed-by: Willian Rampazzo Signed-off-by: Wainer dos Santos Moschetta Message-Id: <20210430133414.39905-6-waine...@redhat.com> Signed-off-by: Cleber Rosa --- python/qemu/machine/machine.py | 5 + 1 file changed, 5 insertions(+) diff --git a/python/qemu/machine/machine.py b/python/qemu/machine/machine.py index 94846dd71b..971ed7e8c6 100644 --- a/python/qemu/machine/machine.py +++ b/python/qemu/machine/machine.py @@ -316,6 +316,11 @@ def _base_args(self) -> List[str]: args.extend(['-device', device]) return args +@property +def args(self) -> List[str]: +"""Returns the list of arguments given to the QEMU binary.""" +return self._args + def _pre_launch(self) -> None: if self._console_set: self._remove_files.append(self._console_address) -- 2.31.1
[PULL 08/23] avocado_qemu: Fix KNOWN_DISTROS map into the LinuxDistro class
From: Willian Rampazzo
As the KNOWN_DISTROS grows, more loosely methods will be created in
the avocado_qemu/__init__.py file.
Let's refactor the code so that KNOWN_DISTROS and related methods are
packaged in a class
Signed-off-by: Wainer dos Santos Moschetta
Signed-off-by: Eric Auger
Message-Id: <20210706131729.30749-2-eric.au...@redhat.com>
[CR: moved aarch64 definition from patch 2 to 1]
[CR: protect get() when arch is not defined]
[CR: split long lines]
Acked-by: Wainer dos Santos Moschetta
Signed-off-by: Cleber Rosa
---
tests/acceptance/avocado_qemu/__init__.py | 86 +--
1 file changed, 49 insertions(+), 37 deletions(-)
diff --git a/tests/acceptance/avocado_qemu/__init__.py
b/tests/acceptance/avocado_qemu/__init__.py
index c3163af3b7..256befafc4 100644
--- a/tests/acceptance/avocado_qemu/__init__.py
+++ b/tests/acceptance/avocado_qemu/__init__.py
@@ -306,34 +306,50 @@ def ssh_command(self, command):
f'Guest command failed: {command}')
return stdout_lines, stderr_lines
+class LinuxDistro:
+"""Represents a Linux distribution
-#: A collection of known distros and their respective image checksum
-KNOWN_DISTROS = {
-'fedora': {
-'31': {
-'x86_64':
-{'checksum': ('e3c1b309d9203604922d6e255c2c5d09'
- '8a309c2d46215d8fc026954f3c5c27a0')},
-'aarch64':
-{'checksum': ('1e18d9c0cf734940c4b5d5ec592facae'
- 'd2af0ad0329383d5639c997fdf16fe49')},
-'ppc64':
-{'checksum': ('7c3528b85a3df4b2306e892199a9e1e4'
- '3f991c506f2cc390dc4efa2026ad2f58')},
-'s390x':
-{'checksum': ('4caaab5a434fd4d1079149a072fdc789'
- '1e354f834d355069ca982fdcaf5a122d')},
+Holds information of known distros.
+"""
+#: A collection of known distros and their respective image checksum
+KNOWN_DISTROS = {
+'fedora': {
+'31': {
+'x86_64':
+{'checksum': ('e3c1b309d9203604922d6e255c2c5d09'
+ '8a309c2d46215d8fc026954f3c5c27a0')},
+'aarch64':
+{'checksum': ('1e18d9c0cf734940c4b5d5ec592facae'
+ 'd2af0ad0329383d5639c997fdf16fe49')},
+'ppc64':
+{'checksum': ('7c3528b85a3df4b2306e892199a9e1e4'
+ '3f991c506f2cc390dc4efa2026ad2f58')},
+'s390x':
+{'checksum': ('4caaab5a434fd4d1079149a072fdc789'
+ '1e354f834d355069ca982fdcaf5a122d')},
}
}
}
+def __init__(self, name, version, arch):
+self.name = name
+self.version = version
+self.arch = arch
+try:
+info = self.KNOWN_DISTROS.get(name).get(version).get(arch)
+except AttributeError:
+# Unknown distro
+info = None
+self._info = info or {}
-def get_known_distro_checksum(distro, distro_version, arch):
-try:
-return KNOWN_DISTROS.get(distro).get(distro_version).\
-get(arch).get('checksum')
-except AttributeError:
-return None
+@property
+def checksum(self):
+"""Gets the cloud-image file checksum"""
+return self._info.get('checksum', None)
+
+@checksum.setter
+def checksum(self, value):
+self._info['checksum'] = value
class LinuxTest(Test, LinuxSSHMixIn):
@@ -344,24 +360,24 @@ class LinuxTest(Test, LinuxSSHMixIn):
"""
timeout = 900
-distro_checksum = None
+distro = None
username = 'root'
password = 'password'
def _set_distro(self):
-distro = self.params.get(
+distro_name = self.params.get(
'distro',
default=self._get_unique_tag_val('distro'))
-if not distro:
-distro = 'fedora'
-self.distro = distro
+if not distro_name:
+distro_name = 'fedora'
distro_version = self.params.get(
'distro_version',
default=self._get_unique_tag_val('distro_version'))
if not distro_version:
distro_version = '31'
-self.distro_version = distro_version
+
+self.distro = LinuxDistro(distro_name, distro_version, self.arch)
# The distro checksum behaves differently than distro name and
# version. First, it does not respect a tag with the same
@@ -370,13 +386,9 @@ def _set_distro(self):
# order of precedence is: parameter, attribute and then value
# from KNOWN_DISTROS.
distro_checksum = self.params.get('distro_checksum',
- default=self.distro_checksum)
-if not distro_checksum:
-distro_checksum = get_known_distro_checksum(self.distro,
-
[PULL 14/23] tests/acceptance: Fix mismatch on cpu tagged tests
From: Wainer dos Santos Moschetta There are test cases on machine_mips_malta.py and tcg_plugins.py files where the cpu tag does not correspond to the value actually given to the QEMU binary. This fixed those tests tags. Reviewed-by: Cleber Rosa Tested-by: Cleber Rosa Reviewed-by: Willian Rampazzo Signed-off-by: Wainer dos Santos Moschetta Message-Id: <20210430133414.39905-3-waine...@redhat.com> Signed-off-by: Cleber Rosa --- tests/acceptance/machine_mips_malta.py | 6 +++--- tests/acceptance/tcg_plugins.py| 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/tests/acceptance/machine_mips_malta.py b/tests/acceptance/machine_mips_malta.py index 7c9a4ee4d2..b1fd075f51 100644 --- a/tests/acceptance/machine_mips_malta.py +++ b/tests/acceptance/machine_mips_malta.py @@ -96,7 +96,7 @@ def test_mips_malta_i6400_framebuffer_logo_1core(self): """ :avocado: tags=arch:mips64el :avocado: tags=machine:malta -:avocado: tags=cpu:i6400 +:avocado: tags=cpu:I6400 """ self.do_test_i6400_framebuffer_logo(1) @@ -105,7 +105,7 @@ def test_mips_malta_i6400_framebuffer_logo_7cores(self): """ :avocado: tags=arch:mips64el :avocado: tags=machine:malta -:avocado: tags=cpu:i6400 +:avocado: tags=cpu:I6400 :avocado: tags=mips:smp """ self.do_test_i6400_framebuffer_logo(7) @@ -115,7 +115,7 @@ def test_mips_malta_i6400_framebuffer_logo_8cores(self): """ :avocado: tags=arch:mips64el :avocado: tags=machine:malta -:avocado: tags=cpu:i6400 +:avocado: tags=cpu:I6400 :avocado: tags=mips:smp """ self.do_test_i6400_framebuffer_logo(8) diff --git a/tests/acceptance/tcg_plugins.py b/tests/acceptance/tcg_plugins.py index c21bf9e52a..aa6e18b62d 100644 --- a/tests/acceptance/tcg_plugins.py +++ b/tests/acceptance/tcg_plugins.py @@ -68,7 +68,7 @@ def test_aarch64_virt_insn(self): :avocado: tags=accel:tcg :avocado: tags=arch:aarch64 :avocado: tags=machine:virt -:avocado: tags=cpu:cortex-a57 +:avocado: tags=cpu:cortex-a53 """ kernel_path = self._grab_aarch64_kernel() kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE + @@ -95,7 +95,7 @@ def test_aarch64_virt_insn_icount(self): :avocado: tags=accel:tcg :avocado: tags=arch:aarch64 :avocado: tags=machine:virt -:avocado: tags=cpu:cortex-a57 +:avocado: tags=cpu:cortex-a53 """ kernel_path = self._grab_aarch64_kernel() kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE + @@ -121,7 +121,7 @@ def test_aarch64_virt_mem_icount(self): :avocado: tags=accel:tcg :avocado: tags=arch:aarch64 :avocado: tags=machine:virt -:avocado: tags=cpu:cortex-a57 +:avocado: tags=cpu:cortex-a53 """ kernel_path = self._grab_aarch64_kernel() kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE + -- 2.31.1
[PULL 04/23] Acceptance Tests: rename attribute holding the distro image checksum
This renames the attribute that holds the checksum for the image Linux
distribution image used.
The current name of the attribute is not very descriptive. Also, in
preparation for making the distribution used configurable, which will
add distro related parameters, attributes and tags, let's make the
naming of those more uniform.
Signed-off-by: Cleber Rosa
Message-Id: <20210414221457.1653745-2-cr...@redhat.com>
Reviewed-by: Wainer dos Santos Moschetta
Reviewed-by: Eric Auger
Reviewed-by: Willian Rampazzo
Reviewed-by: Philippe Mathieu-Daudé
[CR: split long lines]
Signed-off-by: Cleber Rosa
---
tests/acceptance/avocado_qemu/__init__.py | 4 ++--
tests/acceptance/boot_linux.py| 12
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/tests/acceptance/avocado_qemu/__init__.py
b/tests/acceptance/avocado_qemu/__init__.py
index 420c00f1a9..0e62c15c60 100644
--- a/tests/acceptance/avocado_qemu/__init__.py
+++ b/tests/acceptance/avocado_qemu/__init__.py
@@ -312,7 +312,7 @@ class LinuxTest(Test, LinuxSSHMixIn):
"""
timeout = 900
-chksum = None
+distro_checksum = None
username = 'root'
password = 'password'
@@ -360,7 +360,7 @@ def download_boot(self):
try:
boot = vmimage.get(
'fedora', arch=image_arch, version='31',
-checksum=self.chksum,
+checksum=self.distro_checksum,
algorithm='sha256',
cache_dir=self.cache_dirs[0],
snapshot_dir=self.workdir)
diff --git a/tests/acceptance/boot_linux.py b/tests/acceptance/boot_linux.py
index 4c8a5994b2..3901c23690 100644
--- a/tests/acceptance/boot_linux.py
+++ b/tests/acceptance/boot_linux.py
@@ -20,7 +20,8 @@ class BootLinuxX8664(LinuxTest):
:avocado: tags=arch:x86_64
"""
-chksum = 'e3c1b309d9203604922d6e255c2c5d098a309c2d46215d8fc026954f3c5c27a0'
+distro_checksum = ('e3c1b309d9203604922d6e255c2c5d09'
+ '8a309c2d46215d8fc026954f3c5c27a0')
def test_pc_i440fx_tcg(self):
"""
@@ -66,7 +67,8 @@ class BootLinuxAarch64(LinuxTest):
:avocado: tags=machine:gic-version=2
"""
-chksum = '1e18d9c0cf734940c4b5d5ec592facaed2af0ad0329383d5639c997fdf16fe49'
+distro_checksum = ('1e18d9c0cf734940c4b5d5ec592facae'
+ 'd2af0ad0329383d5639c997fdf16fe49')
def add_common_args(self):
self.vm.add_args('-bios',
@@ -119,7 +121,8 @@ class BootLinuxPPC64(LinuxTest):
:avocado: tags=arch:ppc64
"""
-chksum = '7c3528b85a3df4b2306e892199a9e1e43f991c506f2cc390dc4efa2026ad2f58'
+distro_checksum = ('7c3528b85a3df4b2306e892199a9e1e4'
+ '3f991c506f2cc390dc4efa2026ad2f58')
def test_pseries_tcg(self):
"""
@@ -136,7 +139,8 @@ class BootLinuxS390X(LinuxTest):
:avocado: tags=arch:s390x
"""
-chksum = '4caaab5a434fd4d1079149a072fdc7891e354f834d355069ca982fdcaf5a122d'
+distro_checksum = ('4caaab5a434fd4d1079149a072fdc789'
+ '1e354f834d355069ca982fdcaf5a122d')
@skipIf(os.getenv('GITLAB_CI'), 'Running on GitLab')
def test_s390_ccw_virtio_tcg(self):
--
2.31.1
[PULL 13/23] tests/acceptance: Automatic set -cpu to the test vm
From: Wainer dos Santos Moschetta
This introduces a new feature to the functional tests: automatic setting of
the '-cpu VALUE' option to the created vm if the test is tagged with
'cpu:VALUE'. The 'cpu' property is made available to the test object as well.
For example, for a simple test as:
def test(self):
"""
:avocado: tags=cpu:host
"""
self.assertEqual(self.cpu, "host")
self.vm.launch()
The resulting QEMU evocation will be like:
qemu-system-x86_64 -display none -vga none \
-chardev
socket,id=mon,path=/var/tmp/avo_qemu_sock_pdgzbgd_/qemu-1135557-monitor.sock \
-mon chardev=mon,mode=control -cpu host
Reviewed-by: Cleber Rosa
Tested-by: Cleber Rosa
Reviewed-by: Willian Rampazzo
Signed-off-by: Wainer dos Santos Moschetta
Message-Id: <20210430133414.39905-2-waine...@redhat.com>
Signed-off-by: Cleber Rosa
---
docs/devel/testing.rst| 17 +
tests/acceptance/avocado_qemu/__init__.py | 5 +
2 files changed, 22 insertions(+)
diff --git a/docs/devel/testing.rst b/docs/devel/testing.rst
index 19cbf532ae..8f572255d3 100644
--- a/docs/devel/testing.rst
+++ b/docs/devel/testing.rst
@@ -904,6 +904,17 @@ name. If one is not given explicitly, it will either be
set to
``None``, or, if the test is tagged with one (and only one)
``:avocado: tags=arch:VALUE`` tag, it will be set to ``VALUE``.
+cpu
+~~~
+
+The cpu model that will be set to all QEMUMachine instances created
+by the test.
+
+The ``cpu`` attribute will be set to the test parameter of the same
+name. If one is not given explicitly, it will either be set to
+``None ``, or, if the test is tagged with one (and only one)
+``:avocado: tags=cpu:VALUE`` tag, it will be set to ``VALUE``.
+
machine
~~~
@@ -983,6 +994,12 @@ architecture of a kernel or disk image to boot a VM with.
This parameter has a direct relation with the ``arch`` attribute. If
not given, it will default to None.
+cpu
+~~~
+
+The cpu model that will be set to all QEMUMachine instances created
+by the test.
+
machine
~~~
diff --git a/tests/acceptance/avocado_qemu/__init__.py
b/tests/acceptance/avocado_qemu/__init__.py
index 1de1edce0d..3a218057b3 100644
--- a/tests/acceptance/avocado_qemu/__init__.py
+++ b/tests/acceptance/avocado_qemu/__init__.py
@@ -213,6 +213,9 @@ def setUp(self):
self.arch = self.params.get('arch',
default=self._get_unique_tag_val('arch'))
+self.cpu = self.params.get('cpu',
+ default=self._get_unique_tag_val('cpu'))
+
self.machine = self.params.get('machine',
default=self._get_unique_tag_val('machine'))
@@ -242,6 +245,8 @@ def get_vm(self, *args, name=None):
name = str(uuid.uuid4())
if self._vms.get(name) is None:
self._vms[name] = self._new_vm(name, *args)
+if self.cpu is not None:
+self._vms[name].add_args('-cpu', self.cpu)
if self.machine is not None:
self._vms[name].set_machine(self.machine)
return self._vms[name]
--
2.31.1
[PULL 07/23] tests/acceptance: Ignore binary data sent on serial console
From: Philippe Mathieu-Daudé
If a guest sends binary data on the serial console, we get:
File "tests/acceptance/avocado_qemu/__init__.py", line 92,
in _console_interaction msg = console.readline().strip()
File "/usr/lib64/python3.8/codecs.py", line 322,
in decode (result, consumed) = self._buffer_decode(data, self.errors, final)
UnicodeDecodeError: 'utf-8' codec can't decode byte 0xa9 in position 2:
invalid start byte
Since we use the console with readline(), fix it the easiest
way possible: ignore binary data (all current tests compare
text string anyway).
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20210515134555.307404-2-f4...@amsat.org>
Reviewed-by: Wainer dos Santos Moschetta
Tested-by: Wainer dos Santos Moschetta
Signed-off-by: Cleber Rosa
---
tests/acceptance/avocado_qemu/__init__.py | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/tests/acceptance/avocado_qemu/__init__.py
b/tests/acceptance/avocado_qemu/__init__.py
index 1f1728ab83..c3163af3b7 100644
--- a/tests/acceptance/avocado_qemu/__init__.py
+++ b/tests/acceptance/avocado_qemu/__init__.py
@@ -86,14 +86,17 @@ def _console_interaction(test, success_message,
failure_message,
assert not keep_sending or send_string
if vm is None:
vm = test.vm
-console = vm.console_socket.makefile()
+console = vm.console_socket.makefile(mode='rb', encoding='utf-8')
console_logger = logging.getLogger('console')
while True:
if send_string:
vm.console_socket.sendall(send_string.encode())
if not keep_sending:
send_string = None # send only once
-msg = console.readline().strip()
+try:
+msg = console.readline().decode().strip()
+except UnicodeDecodeError:
+msg = None
if not msg:
continue
console_logger.debug(msg)
--
2.31.1
[PULL 10/23] avocado_qemu: Add SMMUv3 tests
From: Eric Auger
Add new tests checking the good behavior of the SMMUv3 protecting
2 virtio pci devices (block and net). We check the guest boots and
we are able to install a package. Different guest configs are tested:
standard, passthrough an strict=0. This is tested with both fedora 31 and
33. The former uses a 5.3 kernel without range invalidation whereas the
latter uses a 5.8 kernel that features range invalidation.
Signed-off-by: Eric Auger
Reviewed-by: Willian Rampazzo
Reviewed-by: Wainer dos Santos Moschetta
Tested-by: Wainer dos Santos Moschetta
Message-Id: <20210706131729.30749-4-eric.au...@redhat.com>
[CR: split long lines]
[CR: added MAINTAINERS entry]
Signed-off-by: Cleber Rosa
---
MAINTAINERS | 1 +
tests/acceptance/smmu.py | 137 +++
2 files changed, 138 insertions(+)
create mode 100644 tests/acceptance/smmu.py
diff --git a/MAINTAINERS b/MAINTAINERS
index c340bb02b0..148153d74f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -171,6 +171,7 @@ L: qemu-...@nongnu.org
S: Maintained
F: hw/arm/smmu*
F: include/hw/arm/smmu*
+F: tests/acceptance/smmu.py
AVR TCG CPUs
M: Michael Rolnik
diff --git a/tests/acceptance/smmu.py b/tests/acceptance/smmu.py
new file mode 100644
index 00..b3c4de6bf4
--- /dev/null
+++ b/tests/acceptance/smmu.py
@@ -0,0 +1,137 @@
+# SMMUv3 Functional tests
+#
+# Copyright (c) 2021 Red Hat, Inc.
+#
+# Author:
+# Eric Auger
+#
+# This work is licensed under the terms of the GNU GPL, version 2 or
+# later. See the COPYING file in the top-level directory.
+import os
+
+from avocado import skipIf
+from avocado_qemu import LinuxTest, BUILD_DIR
+
+@skipIf(os.getenv('GITLAB_CI'), 'Running on GitLab')
+class SMMU(LinuxTest):
+"""
+:avocado: tags=accel:kvm
+:avocado: tags=cpu:host
+:avocado: tags=arch:aarch64
+:avocado: tags=machine:virt
+:avocado: tags=distro:fedora
+:avocado: tags=smmu
+"""
+
+IOMMU_ADDON = ',iommu_platform=on,disable-modern=off,disable-legacy=on'
+kernel_path = None
+initrd_path = None
+kernel_params = None
+
+def set_up_boot(self):
+path = self.download_boot()
+self.vm.add_args('-device', 'virtio-blk-pci,bus=pcie.0,scsi=off,' +
+ 'drive=drv0,id=virtio-disk0,bootindex=1,'
+ 'werror=stop,rerror=stop' + self.IOMMU_ADDON)
+self.vm.add_args('-drive',
+ 'file=%s,if=none,cache=writethrough,id=drv0' % path)
+
+def setUp(self):
+super(SMMU, self).setUp(None, 'virtio-net-pci' + self.IOMMU_ADDON)
+
+def common_vm_setup(self, custom_kernel=False):
+self.require_accelerator("kvm")
+self.vm.add_args("-accel", "kvm")
+self.vm.add_args("-cpu", "host")
+self.vm.add_args("-machine", "iommu=smmuv3")
+self.vm.add_args("-d", "guest_errors")
+self.vm.add_args('-bios', os.path.join(BUILD_DIR, 'pc-bios',
+ 'edk2-aarch64-code.fd'))
+self.vm.add_args('-device', 'virtio-rng-pci,rng=rng0')
+self.vm.add_args('-object',
+ 'rng-random,id=rng0,filename=/dev/urandom')
+
+if custom_kernel is False:
+return
+
+kernel_url = self.distro.pxeboot_url + 'vmlinuz'
+initrd_url = self.distro.pxeboot_url + 'initrd.img'
+self.kernel_path = self.fetch_asset(kernel_url)
+self.initrd_path = self.fetch_asset(initrd_url)
+
+def run_and_check(self):
+if self.kernel_path:
+self.vm.add_args('-kernel', self.kernel_path,
+ '-append', self.kernel_params,
+ '-initrd', self.initrd_path)
+self.launch_and_wait()
+self.ssh_command('cat /proc/cmdline')
+self.ssh_command('dnf -y install numactl-devel')
+
+
+# 5.3 kernel without RIL #
+
+def test_smmu_noril(self):
+"""
+:avocado: tags=smmu_noril
+:avocado: tags=smmu_noril_tests
+:avocado: tags=distro_version:31
+"""
+self.common_vm_setup()
+self.run_and_check()
+
+def test_smmu_noril_passthrough(self):
+"""
+:avocado: tags=smmu_noril_passthrough
+:avocado: tags=smmu_noril_tests
+:avocado: tags=distro_version:31
+"""
+self.common_vm_setup(True)
+self.kernel_params = (self.distro.default_kernel_params +
+ ' iommu.passthrough=on')
+self.run_and_check()
+
+def test_smmu_noril_nostrict(self):
+"""
+:avocado: tags=smmu_noril_nostrict
+:avocado: tags=smmu_noril_tests
+:avocado: tags=distro_version:31
+"""
+self.common_vm_setup(True)
+self.kernel_params = (self.distro.default_kernel_params +
+ ' iommu.strict=0')
+self.run_and_check()
+
+# 5.8 kernel featuring range invalidation
+# >= v5.7 kernel
+
+def
[PULL 02/23] Acceptance Tests: log information when creating QEMUMachine
Including its base temporary directory, given that information useful
for debugging can be put there.
Signed-off-by: Cleber Rosa
Reviewed-by: Wainer dos Santos Moschetta
Message-Id: <20210211220146.2525771-5-cr...@redhat.com>
Signed-off-by: Cleber Rosa
---
tests/acceptance/avocado_qemu/__init__.py | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/acceptance/avocado_qemu/__init__.py
b/tests/acceptance/avocado_qemu/__init__.py
index 693c226d91..4ce09de4fa 100644
--- a/tests/acceptance/avocado_qemu/__init__.py
+++ b/tests/acceptance/avocado_qemu/__init__.py
@@ -219,10 +219,12 @@ def setUp(self):
if self.qemu_bin is None:
self.cancel("No QEMU binary defined or found in the build tree")
-def _new_vm(self, *args):
+def _new_vm(self, name, *args):
self._sd = tempfile.TemporaryDirectory(prefix="avo_qemu_sock_")
vm = QEMUMachine(self.qemu_bin, base_temp_dir=self.workdir,
sock_dir=self._sd.name)
+self.log.debug('QEMUMachine "%s" created', name)
+self.log.debug('QEMUMachine "%s" temp_dir: %s', name, vm.temp_dir)
if args:
vm.add_args(*args)
return vm
@@ -235,7 +237,7 @@ def get_vm(self, *args, name=None):
if not name:
name = str(uuid.uuid4())
if self._vms.get(name) is None:
-self._vms[name] = self._new_vm(*args)
+self._vms[name] = self._new_vm(name, *args)
if self.machine is not None:
self._vms[name].set_machine(self.machine)
return self._vms[name]
--
2.31.1
[PULL 11/23] avocado_qemu: Add Intel iommu tests
From: Eric Auger
Add Intel IOMMU functional tests based on fedora 31.
Different configs are checked:
- strict
- caching mode, strict
- passthrough.
Signed-off-by: Eric Auger
Signed-off-by: Willian Rampazzo
Tested-by: Wainer dos Santos Moschetta
Acked-by: Peter Xu
Message-Id: <20210706131729.30749-5-eric.au...@redhat.com>
[CR: split long lines]
Signed-off-by: Cleber Rosa
---
tests/acceptance/intel_iommu.py | 119
1 file changed, 119 insertions(+)
create mode 100644 tests/acceptance/intel_iommu.py
diff --git a/tests/acceptance/intel_iommu.py b/tests/acceptance/intel_iommu.py
new file mode 100644
index 00..474d62f6bf
--- /dev/null
+++ b/tests/acceptance/intel_iommu.py
@@ -0,0 +1,119 @@
+# INTEL_IOMMU Functional tests
+#
+# Copyright (c) 2021 Red Hat, Inc.
+#
+# Author:
+# Eric Auger
+#
+# This work is licensed under the terms of the GNU GPL, version 2 or
+# later. See the COPYING file in the top-level directory.
+import os
+
+from avocado import skipIf
+from avocado_qemu import LinuxTest
+
+@skipIf(os.getenv('GITLAB_CI'), 'Running on GitLab')
+class IntelIOMMU(LinuxTest):
+"""
+:avocado: tags=arch:x86_64
+:avocado: tags=distro:fedora
+:avocado: tags=distro_version:31
+:avocado: tags=machine:q35
+:avocado: tags=accel:kvm
+:avocado: tags=intel_iommu
+"""
+
+IOMMU_ADDON = ',iommu_platform=on,disable-modern=off,disable-legacy=on'
+kernel_path = None
+initrd_path = None
+kernel_params = None
+
+def set_up_boot(self):
+path = self.download_boot()
+self.vm.add_args('-device', 'virtio-blk-pci,bus=pcie.0,scsi=off,' +
+ 'drive=drv0,id=virtio-disk0,bootindex=1,'
+ 'werror=stop,rerror=stop' + self.IOMMU_ADDON)
+self.vm.add_args('-device', 'virtio-gpu-pci' + self.IOMMU_ADDON)
+self.vm.add_args('-drive',
+ 'file=%s,if=none,cache=writethrough,id=drv0' % path)
+
+def setUp(self):
+super(IntelIOMMU, self).setUp(None, 'virtio-net-pci' +
self.IOMMU_ADDON)
+
+def add_common_args(self):
+self.vm.add_args('-device', 'virtio-rng-pci,rng=rng0')
+self.vm.add_args('-object',
+ 'rng-random,id=rng0,filename=/dev/urandom')
+
+def common_vm_setup(self, custom_kernel=None):
+self.require_accelerator("kvm")
+self.add_common_args()
+self.vm.add_args("-accel", "kvm")
+
+if custom_kernel is None:
+return
+
+kernel_url = self.distro.pxeboot_url + 'vmlinuz'
+initrd_url = self.distro.pxeboot_url + 'initrd.img'
+self.kernel_path = self.fetch_asset(kernel_url)
+self.initrd_path = self.fetch_asset(initrd_url)
+
+def run_and_check(self):
+if self.kernel_path:
+self.vm.add_args('-kernel', self.kernel_path,
+ '-append', self.kernel_params,
+ '-initrd', self.initrd_path)
+self.launch_and_wait()
+self.ssh_command('cat /proc/cmdline')
+self.ssh_command('dmesg | grep -e DMAR -e IOMMU')
+self.ssh_command('find /sys/kernel/iommu_groups/ -type l')
+self.ssh_command('dnf -y install numactl-devel')
+
+def test_intel_iommu(self):
+"""
+:avocado: tags=intel_iommu_intremap
+"""
+
+self.common_vm_setup(True)
+self.vm.add_args('-device', 'intel-iommu,intremap=on')
+self.vm.add_args('-machine', 'kernel_irqchip=split')
+
+self.kernel_params = (self.distro.default_kernel_params +
+ ' quiet intel_iommu=on')
+self.run_and_check()
+
+def test_intel_iommu_strict(self):
+"""
+:avocado: tags=intel_iommu_strict
+"""
+
+self.common_vm_setup(True)
+self.vm.add_args('-device', 'intel-iommu,intremap=on')
+self.vm.add_args('-machine', 'kernel_irqchip=split')
+self.kernel_params = (self.distro.default_kernel_params +
+ ' quiet intel_iommu=on,strict')
+self.run_and_check()
+
+def test_intel_iommu_strict_cm(self):
+"""
+:avocado: tags=intel_iommu_strict_cm
+"""
+
+self.common_vm_setup(True)
+self.vm.add_args('-device', 'intel-iommu,intremap=on,caching-mode=on')
+self.vm.add_args('-machine', 'kernel_irqchip=split')
+self.kernel_params = (self.distro.default_kernel_params +
+ ' quiet intel_iommu=on,strict')
+self.run_and_check()
+
+def test_intel_iommu_pt(self):
+"""
+:avocado: tags=intel_iommu_pt
+"""
+
+self.common_vm_setup(True)
+self.vm.add_args('-device', 'intel-iommu,intremap=on')
+self.vm.add_args('-machine', 'kernel_irqchip=split')
+self.kernel_params = (self.distro.default_kernel_params +
+ ' quiet intel_iommu=on iommu=pt')
+
[PULL 06/23] Acceptance Tests: support choosing specific distro and version
The tests based on the LinuxTest class give the test writer a ready to
use guest operating system, currently pinned to Fedora 31.
With this change, it's now possible to choose different distros and
versions, similar to how other tags and parameter can be set for the
target arch, accelerator, etc.
One of the reasons for this work, is that some development features
depend on updates on the guest side. For instance the tests on
virtiofs_submounts.py, require newer kernels, and may benefit from
running, say on Fedora 34, without the need for a custom kernel.
Please notice that the pre-caching of the Fedora 31 images done during
the early stages of `make check-acceptance` (before the tests are
actually executed) are not expanded here to cover every new image
added. But, the tests will download other needed images (and cache
them) during the first execution.
Signed-off-by: Cleber Rosa
Message-Id: <20210414221457.1653745-4-cr...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Willian Rampazzo
Signed-off-by: Cleber Rosa
---
docs/devel/testing.rst| 65 +++
tests/acceptance/avocado_qemu/__init__.py | 47
2 files changed, 102 insertions(+), 10 deletions(-)
diff --git a/docs/devel/testing.rst b/docs/devel/testing.rst
index 4e42392810..19cbf532ae 100644
--- a/docs/devel/testing.rst
+++ b/docs/devel/testing.rst
@@ -922,6 +922,39 @@ The preserved value of the ``qemu_bin`` parameter or the
result of the
dynamic probe for a QEMU binary in the current working directory or
source tree.
+LinuxTest
+~
+
+Besides the attributes present on the ``avocado_qemu.Test`` base
+class, the ``avocado_qemu.LinuxTest`` adds the following attributes:
+
+distro
+..
+
+The name of the Linux distribution used as the guest image for the
+test. The name should match the **Provider** column on the list
+of images supported by the avocado.utils.vmimage library:
+
+https://avocado-framework.readthedocs.io/en/latest/guides/writer/libs/vmimage.html#supported-images
+
+distro_version
+..
+
+The version of the Linux distribution as the guest image for the
+test. The name should match the **Version** column on the list
+of images supported by the avocado.utils.vmimage library:
+
+https://avocado-framework.readthedocs.io/en/latest/guides/writer/libs/vmimage.html#supported-images
+
+distro_checksum
+...
+
+The sha256 hash of the guest image file used for the test.
+
+If this value is not set in the code or by a test parameter (with the
+same name), no validation on the integrity of the image will be
+performed.
+
Parameter reference
---
@@ -962,6 +995,38 @@ qemu_bin
The exact QEMU binary to be used on QEMUMachine.
+LinuxTest
+~
+
+Besides the parameters present on the ``avocado_qemu.Test`` base
+class, the ``avocado_qemu.LinuxTest`` adds the following parameters:
+
+distro
+..
+
+The name of the Linux distribution used as the guest image for the
+test. The name should match the **Provider** column on the list
+of images supported by the avocado.utils.vmimage library:
+
+https://avocado-framework.readthedocs.io/en/latest/guides/writer/libs/vmimage.html#supported-images
+
+distro_version
+..
+
+The version of the Linux distribution as the guest image for the
+test. The name should match the **Version** column on the list
+of images supported by the avocado.utils.vmimage library:
+
+https://avocado-framework.readthedocs.io/en/latest/guides/writer/libs/vmimage.html#supported-images
+
+distro_checksum
+...
+
+The sha256 hash of the guest image file used for the test.
+
+If this value is not set in the code or by this parameter no
+validation on the integrity of the image will be performed.
+
Skipping tests
--
The Avocado framework provides Python decorators which allow for easily skip
diff --git a/tests/acceptance/avocado_qemu/__init__.py
b/tests/acceptance/avocado_qemu/__init__.py
index 3a144cded4..1f1728ab83 100644
--- a/tests/acceptance/avocado_qemu/__init__.py
+++ b/tests/acceptance/avocado_qemu/__init__.py
@@ -345,8 +345,39 @@ class LinuxTest(Test, LinuxSSHMixIn):
username = 'root'
password = 'password'
+def _set_distro(self):
+distro = self.params.get(
+'distro',
+default=self._get_unique_tag_val('distro'))
+if not distro:
+distro = 'fedora'
+self.distro = distro
+
+distro_version = self.params.get(
+'distro_version',
+default=self._get_unique_tag_val('distro_version'))
+if not distro_version:
+distro_version = '31'
+self.distro_version = distro_version
+
+# The distro checksum behaves differently than distro name and
+# version. First, it does not respect a tag with the same
+# name, given that it's not expected to be used for filtering
+# (distro name versions are the natural choice).
[PULL 01/23] Acceptance Tests: use the job work directory for created VMs
The QEMUMachine uses a base temporary directory for all temporary needs. By setting it to the Avocado's workdir, it's possible to keep the temporary files during debugging sessions much more easily by setting the "--keep-tmp" command line option. Reference: https://avocado-framework.readthedocs.io/en/85.0/api/test/avocado.html#avocado.Test.workdir Reference: https://avocado-framework.readthedocs.io/en/85.0/config/index.html#run-keep-tmp Signed-off-by: Cleber Rosa Reviewed-by: Wainer dos Santos Moschetta Reviewed-by: John Snow Message-Id: <20210211220146.2525771-4-cr...@redhat.com> Signed-off-by: Cleber Rosa --- tests/acceptance/avocado_qemu/__init__.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/acceptance/avocado_qemu/__init__.py b/tests/acceptance/avocado_qemu/__init__.py index 93c4b9851f..693c226d91 100644 --- a/tests/acceptance/avocado_qemu/__init__.py +++ b/tests/acceptance/avocado_qemu/__init__.py @@ -221,7 +221,8 @@ def setUp(self): def _new_vm(self, *args): self._sd = tempfile.TemporaryDirectory(prefix="avo_qemu_sock_") -vm = QEMUMachine(self.qemu_bin, sock_dir=self._sd.name) +vm = QEMUMachine(self.qemu_bin, base_temp_dir=self.workdir, + sock_dir=self._sd.name) if args: vm.add_args(*args) return vm -- 2.31.1
