Re: [PATCH 2/6] io: add QIOChannelRDMA class

[Jinpu Wang]

On Tue, Jun 4, 2024 at 2:14 PM Gonglei  wrote:
>
> From: Jialin Wang 
>
> Implement a QIOChannelRDMA subclass that is based on the rsocket
> API (similar to socket API).
>
> Signed-off-by: Jialin Wang 
> Signed-off-by: Gonglei 
> ---
>  include/io/channel-rdma.h | 152 +
>  io/channel-rdma.c | 437 ++
>  io/meson.build|   1 +
>  io/trace-events   |  14 ++
>  4 files changed, 604 insertions(+)
>  create mode 100644 include/io/channel-rdma.h
>  create mode 100644 io/channel-rdma.c
>
> diff --git a/include/io/channel-rdma.h b/include/io/channel-rdma.h
> new file mode 100644
> index 00..8cab2459e5
> --- /dev/null
> +++ b/include/io/channel-rdma.h
> @@ -0,0 +1,152 @@
> +/*
> + * QEMU I/O channels RDMA driver
> + *
> + * Copyright (c) 2024 HUAWEI TECHNOLOGIES CO., LTD.
> + *
> + * Authors:
> + *  Jialin Wang 
> + *  Gonglei 
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2.1 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library; if not, see 
> .
> + */
> +
> +#ifndef QIO_CHANNEL_RDMA_H
> +#define QIO_CHANNEL_RDMA_H
> +
> +#include "io/channel.h"
> +#include "io/task.h"
> +#include "qemu/sockets.h"
> +#include "qom/object.h"
> +
> +#define TYPE_QIO_CHANNEL_RDMA "qio-channel-rdma"
> +OBJECT_DECLARE_SIMPLE_TYPE(QIOChannelRDMA, QIO_CHANNEL_RDMA)
> +
> +/**
> + * QIOChannelRDMA:
> + *
> + * The QIOChannelRDMA object provides a channel implementation
> + * that discards all writes and returns EOF for all reads.
> + */
> +struct QIOChannelRDMA {
> +QIOChannel parent;
> +/* the rsocket fd */
> +int fd;
> +
> +struct sockaddr_storage localAddr;
> +socklen_t localAddrLen;
> +struct sockaddr_storage remoteAddr;
> +socklen_t remoteAddrLen;
> +};
> +
> +/**
> + * qio_channel_rdma_new:
> + *
> + * Create a channel for performing I/O on a rdma
> + * connection, that is initially closed. After
> + * creating the rdma, it must be setup as a client
> + * connection or server.
> + *
> + * Returns: the rdma channel object
> + */
> +QIOChannelRDMA *qio_channel_rdma_new(void);
> +
> +/**
> + * qio_channel_rdma_connect_sync:
> + * @ioc: the rdma channel object
> + * @addr: the address to connect to
> + * @errp: pointer to a NULL-initialized error object
> + *
> + * Attempt to connect to the address @addr. This method
> + * will run in the foreground so the caller will not regain
> + * execution control until the connection is established or
> + * an error occurs.
> + */
> +int qio_channel_rdma_connect_sync(QIOChannelRDMA *ioc, InetSocketAddress 
> *addr,
> +  Error **errp);
> +
> +/**
> + * qio_channel_rdma_connect_async:
> + * @ioc: the rdma channel object
> + * @addr: the address to connect to
> + * @callback: the function to invoke on completion
> + * @opaque: user data to pass to @callback
> + * @destroy: the function to free @opaque
> + * @context: the context to run the async task. If %NULL, the default
> + *   context will be used.
> + *
> + * Attempt to connect to the address @addr. This method
> + * will run in the background so the caller will regain
> + * execution control immediately. The function @callback
> + * will be invoked on completion or failure. The @addr
> + * parameter will be copied, so may be freed as soon
> + * as this function returns without waiting for completion.
> + */
> +void qio_channel_rdma_connect_async(QIOChannelRDMA *ioc,
> +InetSocketAddress *addr,
> +QIOTaskFunc callback, gpointer opaque,
> +GDestroyNotify destroy,
> +GMainContext *context);
> +
> +/**
> + * qio_channel_rdma_listen_sync:
> + * @ioc: the rdma channel object
> + * @addr: the address to listen to
> + * @num: the expected amount of connections
> + * @errp: pointer to a NULL-initialized error object
> + *
> + * Attempt to listen to the address @addr. This method
> + * will run in the foreground so the caller will not regain
> + * execution control until the connection is established or
> + * an error occurs.
> + */
> +int qio_channel_rdma_listen_sync(QIOChannelRDMA *ioc, InetSocketAddress 
> *addr,
> + int num, Error **errp);
> +
> +/**
> + * qio_channel_rdma_listen_async:
> + * @ioc: the rdma channel object
> + * @addr: the address to 

[PATCH] monitor: Remove obsolete stubs

[Philippe Mathieu-Daudé]

hmp_info_roms() was removed in commit dd98234c05 ("qapi:
introduce x-query-roms QMP command"),

hmp_info_numa() in commit 1b8ae799d8 ("qapi: introduce
x-query-numa QMP command"),

hmp_info_ramblock() in commit ca411b7c8a ("qapi: introduce
x-query-ramblock QMP command")

and hmp_info_irq() in commit 91f2fa7045 ("qapi: introduce
x-query-irq QMP command").

Signed-off-by: Philippe Mathieu-Daudé 
---
Note x-query-roms is used as example in
docs/devel/writing-monitor-commands.rst
but was removed in commit dd98234c05
("qapi: introduce x-query-roms QMP command").
---
 include/hw/loader.h   | 1 -
 include/monitor/hmp.h | 3 ---
 2 files changed, 4 deletions(-)

diff --git a/include/hw/loader.h b/include/hw/loader.h
index 8685e27334..9844c5e3cf 100644
--- a/include/hw/loader.h
+++ b/include/hw/loader.h
@@ -338,7 +338,6 @@ void *rom_ptr(hwaddr addr, size_t size);
  * rom_ptr().
  */
 void *rom_ptr_for_as(AddressSpace *as, hwaddr addr, size_t size);
-void hmp_info_roms(Monitor *mon, const QDict *qdict);
 
 #define rom_add_file_fixed(_f, _a, _i)  \
 rom_add_file(_f, NULL, _a, _i, false, NULL, NULL)
diff --git a/include/monitor/hmp.h b/include/monitor/hmp.h
index 954f3c83ad..ae116d9804 100644
--- a/include/monitor/hmp.h
+++ b/include/monitor/hmp.h
@@ -35,7 +35,6 @@ void hmp_info_cpus(Monitor *mon, const QDict *qdict);
 void hmp_info_vnc(Monitor *mon, const QDict *qdict);
 void hmp_info_spice(Monitor *mon, const QDict *qdict);
 void hmp_info_balloon(Monitor *mon, const QDict *qdict);
-void hmp_info_irq(Monitor *mon, const QDict *qdict);
 void hmp_info_pic(Monitor *mon, const QDict *qdict);
 void hmp_info_pci(Monitor *mon, const QDict *qdict);
 void hmp_info_tpm(Monitor *mon, const QDict *qdict);
@@ -102,7 +101,6 @@ void hmp_chardev_send_break(Monitor *mon, const QDict 
*qdict);
 void hmp_object_add(Monitor *mon, const QDict *qdict);
 void hmp_object_del(Monitor *mon, const QDict *qdict);
 void hmp_info_memdev(Monitor *mon, const QDict *qdict);
-void hmp_info_numa(Monitor *mon, const QDict *qdict);
 void hmp_info_memory_devices(Monitor *mon, const QDict *qdict);
 void hmp_qom_list(Monitor *mon, const QDict *qdict);
 void hmp_qom_get(Monitor *mon, const QDict *qdict);
@@ -141,7 +139,6 @@ void hmp_rocker_ports(Monitor *mon, const QDict *qdict);
 void hmp_rocker_of_dpa_flows(Monitor *mon, const QDict *qdict);
 void hmp_rocker_of_dpa_groups(Monitor *mon, const QDict *qdict);
 void hmp_info_dump(Monitor *mon, const QDict *qdict);
-void hmp_info_ramblock(Monitor *mon, const QDict *qdict);
 void hmp_hotpluggable_cpus(Monitor *mon, const QDict *qdict);
 void hmp_info_vm_generation_id(Monitor *mon, const QDict *qdict);
 void hmp_info_memory_size_summary(Monitor *mon, const QDict *qdict);
-- 
2.41.0

[PATCH] hw/usb: Introduce x-query-usbhost QMP command

[Philippe Mathieu-Daudé]

This is a counterpart to the HMP "info usbhost" command. It is being
added with an "x-" prefix because this QMP command is intended as an
adhoc debugging tool and will thus not be modelled in QAPI as fully
structured data, nor will it have long term guaranteed stability.
The existing HMP command is rewritten to call the QMP command.

Signed-off-by: Philippe Mathieu-Daudé 
---
 qapi/machine.json  | 18 ++
 include/hw/usb.h   |  3 ---
 hw/usb/bus-stub.c  |  7 ++-
 hw/usb/host-libusb.c   | 38 +-
 tests/qtest/qmp-cmd-test.c |  3 +++
 5 files changed, 52 insertions(+), 17 deletions(-)

diff --git a/qapi/machine.json b/qapi/machine.json
index 1283d14493..1b428f29d4 100644
--- a/qapi/machine.json
+++ b/qapi/machine.json
@@ -1813,6 +1813,24 @@
   'returns': 'HumanReadableText',
   'features': [ 'unstable' ] }
 
+##
+# @x-query-usbhost:
+#
+# Query information on host USB devices
+#
+# Features:
+#
+# @unstable: This command is meant for debugging.
+#
+# Returns: Host USB device information
+#
+# Since: 9.1
+##
+{ 'command': 'x-query-usbhost',
+  'returns': 'HumanReadableText',
+  'features': [ 'unstable' ],
+  'if': 'CONFIG_USB_LIBUSB' }
+
 ##
 # @SmbiosEntryPointType:
 #
diff --git a/include/hw/usb.h b/include/hw/usb.h
index d46d96779a..c0b34af518 100644
--- a/include/hw/usb.h
+++ b/include/hw/usb.h
@@ -465,9 +465,6 @@ void usb_device_reset(USBDevice *dev);
 void usb_wakeup(USBEndpoint *ep, unsigned int stream);
 void usb_generic_async_ctrl_complete(USBDevice *s, USBPacket *p);
 
-/* usb-linux.c */
-void hmp_info_usbhost(Monitor *mon, const QDict *qdict);
-
 /* usb ports of the VM */
 
 #define VM_USB_HUB_SIZE 8
diff --git a/hw/usb/bus-stub.c b/hw/usb/bus-stub.c
index fcabe8429e..948429bb33 100644
--- a/hw/usb/bus-stub.c
+++ b/hw/usb/bus-stub.c
@@ -11,7 +11,6 @@
 #include "qapi/error.h"
 #include "qapi/qapi-commands-machine.h"
 #include "sysemu/sysemu.h"
-#include "monitor/monitor.h"
 #include "hw/usb.h"
 
 USBDevice *usbdevice_create(const char *driver)
@@ -26,3 +25,9 @@ HumanReadableText *qmp_x_query_usb(Error **errp)
 error_setg(errp, "Support for USB devices not built-in");
 return NULL;
 }
+
+HumanReadableText *qmp_x_query_usbhost(Error **errp)
+{
+error_setg(errp, "Support for USB devices not built-in");
+return NULL;
+}
diff --git a/hw/usb/host-libusb.c b/hw/usb/host-libusb.c
index 80122b4125..5781d7fa7c 100644
--- a/hw/usb/host-libusb.c
+++ b/hw/usb/host-libusb.c
@@ -46,6 +46,8 @@
 #endif
 
 #include "qapi/error.h"
+#include "qapi/qapi-commands-machine.h"
+#include "qapi/type-helpers.h"
 #include "migration/vmstate.h"
 #include "monitor/monitor.h"
 #include "qemu/error-report.h"
@@ -1816,7 +1818,7 @@ module_kconfig(USB);
 static void usb_host_register_types(void)
 {
 type_register_static(&usb_host_dev_info);
-monitor_register_hmp("usbhost", true, hmp_info_usbhost);
+monitor_register_hmp_info_hrt("usbhost", qmp_x_query_usbhost);
 }
 
 type_init(usb_host_register_types)
@@ -1921,18 +1923,25 @@ static void usb_host_auto_check(void *unused)
 timer_mod(usb_auto_timer, qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 2000);
 }
 
-void hmp_info_usbhost(Monitor *mon, const QDict *qdict)
+HumanReadableText *qmp_x_query_usbhost(Error **errp)
 {
+g_autoptr(GString) buf = g_string_new("");
 libusb_device **devs = NULL;
 struct libusb_device_descriptor ddesc;
 char port[16];
 int i, n;
 
 if (usb_host_init() != 0) {
-return;
+error_setg(errp, "Failed to init libusb");
+return NULL;
 }
 
 n = libusb_get_device_list(ctx, &devs);
+if (!n) {
+error_setg(errp, "No host USB device");
+return NULL;
+}
+
 for (i = 0; i < n; i++) {
 if (libusb_get_device_descriptor(devs[i], &ddesc) != 0) {
 continue;
@@ -1941,14 +1950,15 @@ void hmp_info_usbhost(Monitor *mon, const QDict *qdict)
 continue;
 }
 usb_host_get_port(devs[i], port, sizeof(port));
-monitor_printf(mon, "  Bus %d, Addr %d, Port %s, Speed %s Mb/s\n",
-   libusb_get_bus_number(devs[i]),
-   libusb_get_device_address(devs[i]),
-   port,
-   speed_name[libusb_get_device_speed(devs[i])]);
-monitor_printf(mon, "Class %02x:", ddesc.bDeviceClass);
-monitor_printf(mon, " USB device %04x:%04x",
-   ddesc.idVendor, ddesc.idProduct);
+g_string_append_printf(buf,
+   "  Bus %d, Addr %d, Port %s, Speed %s Mb/s\n",
+   libusb_get_bus_number(devs[i]),
+   libusb_get_device_address(devs[i]),
+   port,
+   speed_name[libusb_get_device_speed(devs[i])]);
+g_string_append_printf(buf, "Class %02x:", ddesc.bDeviceClass);
+g_string_append_printf(buf, " USB device %04x

[PATCH 2/2] hw/intc: Introduce x-query-interrupt-controllers QMP command

[Philippe Mathieu-Daudé]

This is a counterpart to the HMP "info pic" command. It is being
added with an "x-" prefix because this QMP command is intended as an
adhoc debugging tool and will thus not be modelled in QAPI as fully
structured data, nor will it have long term guaranteed stability.
The existing HMP command is rewritten to call the QMP command.

Signed-off-by: Philippe Mathieu-Daudé 
---
 qapi/machine.json  | 17 +
 hw/core/machine-qmp-cmds.c | 29 +
 monitor/hmp-cmds.c | 33 -
 hmp-commands-info.hx   |  2 +-
 4 files changed, 47 insertions(+), 34 deletions(-)

diff --git a/qapi/machine.json b/qapi/machine.json
index 453feb9347..1283d14493 100644
--- a/qapi/machine.json
+++ b/qapi/machine.json
@@ -1864,3 +1864,20 @@
 { 'command': 'dumpdtb',
   'data': { 'filename': 'str' },
   'if': 'CONFIG_FDT' }
+
+##
+# @x-query-interrupt-controllers:
+#
+# Query information on interrupt controller devices
+#
+# Features:
+#
+# @unstable: This command is meant for debugging.
+#
+# Returns: Interrupt controller device information
+#
+# Since: 9.1
+##
+{ 'command': 'x-query-interrupt-controllers',
+  'returns': 'HumanReadableText',
+  'features': [ 'unstable' ]}
diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
index 5972100b1f..130217da8f 100644
--- a/hw/core/machine-qmp-cmds.c
+++ b/hw/core/machine-qmp-cmds.c
@@ -361,6 +361,35 @@ HumanReadableText *qmp_x_query_irq(Error **errp)
 return human_readable_text_from_str(buf);
 }
 
+static int qmp_x_query_intc_foreach(Object *obj, void *opaque)
+{
+InterruptStatsProvider *intc;
+InterruptStatsProviderClass *k;
+GString *buf = opaque;
+
+if (object_dynamic_cast(obj, TYPE_INTERRUPT_STATS_PROVIDER)) {
+intc = INTERRUPT_STATS_PROVIDER(obj);
+k = INTERRUPT_STATS_PROVIDER_GET_CLASS(obj);
+if (k->print_info) {
+k->print_info(intc, buf);
+} else {
+g_string_append_printf(buf,
+   "Interrupt controller information not 
available for %s.\n",
+   object_get_typename(obj));
+}
+}
+
+return 0;
+}
+
+HumanReadableText *qmp_x_query_interrupt_controllers(Error **errp)
+{
+g_autoptr(GString) buf = g_string_new("");
+object_child_foreach_recursive(object_get_root(),
+   qmp_x_query_intc_foreach, buf);
+return human_readable_text_from_str(buf);
+}
+
 GuidInfo *qmp_query_vm_generation_id(Error **errp)
 {
 GuidInfo *info;
diff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c
index fbff7fdb57..45ee3a9e1f 100644
--- a/monitor/hmp-cmds.c
+++ b/monitor/hmp-cmds.c
@@ -25,9 +25,7 @@
 #include "qapi/qapi-commands-machine.h"
 #include "qapi/qapi-commands-misc.h"
 #include "qapi/qmp/qdict.h"
-#include "qapi/type-helpers.h"
 #include "qemu/cutils.h"
-#include "hw/intc/intc.h"
 #include "qemu/log.h"
 #include "sysemu/sysemu.h"
 
@@ -83,37 +81,6 @@ void hmp_info_version(Monitor *mon, const QDict *qdict)
 qapi_free_VersionInfo(info);
 }
 
-static int hmp_info_pic_foreach(Object *obj, void *opaque)
-{
-InterruptStatsProvider *intc;
-InterruptStatsProviderClass *k;
-Monitor *mon = opaque;
-
-if (object_dynamic_cast(obj, TYPE_INTERRUPT_STATS_PROVIDER)) {
-intc = INTERRUPT_STATS_PROVIDER(obj);
-k = INTERRUPT_STATS_PROVIDER_GET_CLASS(obj);
-if (k->print_info) {
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
-
-k->print_info(intc, buf);
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
-} else {
-monitor_printf(mon, "Interrupt controller information not 
available for %s.\n",
-   object_get_typename(obj));
-}
-}
-
-return 0;
-}
-
-void hmp_info_pic(Monitor *mon, const QDict *qdict)
-{
-object_child_foreach_recursive(object_get_root(),
-   hmp_info_pic_foreach, mon);
-}
-
 void hmp_quit(Monitor *mon, const QDict *qdict)
 {
 monitor_suspend(mon);
diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx
index 20a9835ea8..cfd4ad5651 100644
--- a/hmp-commands-info.hx
+++ b/hmp-commands-info.hx
@@ -174,7 +174,7 @@ ERST
 .args_type  = "",
 .params = "",
 .help   = "show PIC state",
-.cmd= hmp_info_pic,
+.cmd_info_hrt = qmp_x_query_interrupt_controllers,
 },
 
 SRST
-- 
2.41.0

[PATCH 0/2] hw/intc: Introduce x-query-interrupt-controllers QMP command

[Philippe Mathieu-Daudé]

Continuing previous work from Daniel:
https://lore.kernel.org/qemu-devel/20211028155457.967291-1-berra...@redhat.com/

- Prefer HumanReadableText over Monitor in hw/intc/
- Introduce x-query-interrupt-controllers QMP command

See commits f2de406f29 ("docs/devel: document expectations for
QAPI data modelling for QMP") and 3d312f417d ("docs/devel: document
expectations for HMP commands in the future") for rationale.

Based-on: <20240610062105.49848-1-phi...@linaro.org>

Philippe Mathieu-Daudé (2):
  hw/intc: Avoid using Monitor in INTERRUPT_STATS_PROVIDER::print_info()
  hw/intc: Introduce x-query-interrupt-controllers QMP command

 qapi/machine.json  | 17 
 include/hw/intc/intc.h |  2 +-
 hw/core/machine-qmp-cmds.c | 29 +++
 hw/intc/goldfish_pic.c |  8 +++---
 hw/intc/i8259_common.c | 14 +-
 hw/intc/ioapic_common.c| 57 +++---
 hw/intc/m68k_irqc.c|  5 ++--
 hw/intc/slavio_intctl.c| 11 
 hw/ppc/pnv.c   | 10 +--
 hw/ppc/spapr.c | 10 +--
 monitor/hmp-cmds.c | 27 --
 hmp-commands-info.hx   |  2 +-
 12 files changed, 97 insertions(+), 95 deletions(-)

-- 
2.41.0

[PATCH 1/2] hw/intc: Avoid using Monitor in INTERRUPT_STATS_PROVIDER::print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one (see commit f2de406f29
"docs/devel: document expectations for QAPI data modelling for QMP"
for rationale).

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/intc/intc.h  |  2 +-
 hw/intc/goldfish_pic.c  |  8 +++---
 hw/intc/i8259_common.c  | 14 +-
 hw/intc/ioapic_common.c | 57 +
 hw/intc/m68k_irqc.c |  5 ++--
 hw/intc/slavio_intctl.c | 11 
 hw/ppc/pnv.c| 10 +---
 hw/ppc/spapr.c  | 10 +---
 monitor/hmp-cmds.c  |  8 +-
 9 files changed, 57 insertions(+), 68 deletions(-)

diff --git a/include/hw/intc/intc.h b/include/hw/intc/intc.h
index 7018f608ca..e40194b8e3 100644
--- a/include/hw/intc/intc.h
+++ b/include/hw/intc/intc.h
@@ -22,7 +22,7 @@ struct InterruptStatsProviderClass {
  */
 bool (*get_statistics)(InterruptStatsProvider *obj, uint64_t **irq_counts,
unsigned int *nb_irqs);
-void (*print_info)(InterruptStatsProvider *obj, Monitor *mon);
+void (*print_info)(InterruptStatsProvider *obj, GString *buf);
 };
 
 #endif
diff --git a/hw/intc/goldfish_pic.c b/hw/intc/goldfish_pic.c
index d662dfeb99..6cc1c69d26 100644
--- a/hw/intc/goldfish_pic.c
+++ b/hw/intc/goldfish_pic.c
@@ -12,7 +12,6 @@
 #include "hw/qdev-properties.h"
 #include "hw/sysbus.h"
 #include "migration/vmstate.h"
-#include "monitor/monitor.h"
 #include "qemu/log.h"
 #include "trace.h"
 #include "hw/intc/intc.h"
@@ -39,11 +38,12 @@ static bool 
goldfish_pic_get_statistics(InterruptStatsProvider *obj,
 return true;
 }
 
-static void goldfish_pic_print_info(InterruptStatsProvider *obj, Monitor *mon)
+static void goldfish_pic_print_info(InterruptStatsProvider *obj, GString *buf)
 {
 GoldfishPICState *s = GOLDFISH_PIC(obj);
-monitor_printf(mon, "goldfish-pic.%d: pending=0x%08x enabled=0x%08x\n",
-   s->idx, s->pending, s->enabled);
+g_string_append_printf(buf,
+   "goldfish-pic.%d: pending=0x%08x enabled=0x%08x\n",
+   s->idx, s->pending, s->enabled);
 }
 
 static void goldfish_pic_update(GoldfishPICState *s)
diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c
index ee0041115c..d9558e3940 100644
--- a/hw/intc/i8259_common.c
+++ b/hw/intc/i8259_common.c
@@ -28,7 +28,6 @@
 #include "hw/isa/i8259_internal.h"
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
-#include "monitor/monitor.h"
 #include "qapi/error.h"
 
 static int irq_level[16];
@@ -132,16 +131,17 @@ static bool pic_get_statistics(InterruptStatsProvider 
*obj,
 return true;
 }
 
-static void pic_print_info(InterruptStatsProvider *obj, Monitor *mon)
+static void pic_print_info(InterruptStatsProvider *obj, GString *buf)
 {
 PICCommonState *s = PIC_COMMON(obj);
 
 pic_dispatch_pre_save(s);
-monitor_printf(mon, "pic%d: irr=%02x imr=%02x isr=%02x hprio=%d "
-   "irq_base=%02x rr_sel=%d elcr=%02x fnm=%d\n",
-   s->master ? 0 : 1, s->irr, s->imr, s->isr, s->priority_add,
-   s->irq_base, s->read_reg_select, s->elcr,
-   s->special_fully_nested_mode);
+g_string_append_printf(buf, "pic%d: irr=%02x imr=%02x isr=%02x hprio=%d "
+   "irq_base=%02x rr_sel=%d elcr=%02x fnm=%d\n",
+   s->master ? 0 : 1, s->irr, s->imr, s->isr,
+   s->priority_add,
+   s->irq_base, s->read_reg_select, s->elcr,
+   s->special_fully_nested_mode);
 }
 
 static bool ltim_state_needed(void *opaque)
diff --git a/hw/intc/ioapic_common.c b/hw/intc/ioapic_common.c
index efbe6958c8..769896353a 100644
--- a/hw/intc/ioapic_common.c
+++ b/hw/intc/ioapic_common.c
@@ -23,7 +23,6 @@
 #include "qapi/error.h"
 #include "qemu/module.h"
 #include "migration/vmstate.h"
-#include "monitor/monitor.h"
 #include "hw/intc/intc.h"
 #include "hw/intc/ioapic.h"
 #include "hw/intc/ioapic_internal.h"
@@ -59,59 +58,62 @@ static bool ioapic_get_statistics(InterruptStatsProvider 
*obj,
 return true;
 }
 
-static void ioapic_irr_dump(Monitor *mon, const char *name, uint32_t bitmap)
+static void ioapic_irr_dump(GString *buf, const char *name, uint32_t bitmap)
 {
 int i;
 
-monitor_printf(mon, "%-10s ", name);
+g_string_append_printf(buf, "%-10s ", name);
 if (bitmap == 0) {
-monitor_printf(mon, "(none)\n");
+g_string_append_printf(buf, "(none)\n");
 return;
 }
 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 if (bitmap & (1 << i)) {
-monitor_printf(mon, "%-2u ", i);
+g_string_append_printf(buf, "%-2u ", i);
 }
 }
-monitor_printf(mon, "\n");
+g_string_append_c(buf, '\n');
 }
 
-static void ioapic_print_redtbl(Monitor *mon, IOAPICCommonState *s)
+static void ioapic_print_redtbl(GString *buf, IOAPICCommonState *s)
 {
 static const char *delm_str[] = {
 "fixed", "lowe

[PATCH 22/26] hw/ppc: Avoid using Monitor in pnv_xive2_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/pnv_xive.h | 2 +-
 hw/intc/pnv_xive2.c   | 9 +
 hw/ppc/pnv.c  | 2 +-
 3 files changed, 3 insertions(+), 10 deletions(-)

diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h
index 7d634e469c..5b4cb4167b 100644
--- a/include/hw/ppc/pnv_xive.h
+++ b/include/hw/ppc/pnv_xive.h
@@ -163,6 +163,6 @@ typedef struct PnvXive2Class {
 DeviceRealize parent_realize;
 } PnvXive2Class;
 
-void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor *mon);
+void pnv_xive2_pic_print_info(PnvXive2 *xive, GString *buf);
 
 #endif /* PPC_PNV_XIVE_H */
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index 10914b04df..2fb4fa29d4 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -10,11 +10,9 @@
 #include "qemu/osdep.h"
 #include "qemu/log.h"
 #include "qapi/error.h"
-#include "qapi/type-helpers.h"
 #include "target/ppc/cpu.h"
 #include "sysemu/cpus.h"
 #include "sysemu/dma.h"
-#include "monitor/monitor.h"
 #include "hw/ppc/fdt.h"
 #include "hw/ppc/pnv.h"
 #include "hw/ppc/pnv_chip.h"
@@ -2105,7 +2103,7 @@ static uint64_t pnv_xive2_vst_per_subpage(PnvXive2 *xive, 
uint32_t type)
 return (1ull << page_shift) / info->size;
 }
 
-void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor *mon)
+void pnv_xive2_pic_print_info(PnvXive2 *xive, GString *buf)
 {
 Xive2Router *xrtr = XIVE2_ROUTER(xive);
 uint8_t blk = pnv_xive2_block_id(xive);
@@ -2117,8 +2115,6 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor 
*mon)
 Xive2Nvp nvp;
 int i;
 uint64_t xive_nvp_per_subpage;
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 g_string_append_printf(buf, "XIVE[%x] Source %08x .. %08x\n",
blk, srcno0, srcno0 + nr_esbs - 1);
@@ -2156,7 +2152,4 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor 
*mon)
 xive2_nvp_pic_print_info(&nvp, i++, buf);
 }
 }
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 4a1a302a25..5b9dbff754 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -864,7 +864,7 @@ static void pnv_chip_power10_pic_print_info(PnvChip *chip, 
Monitor *mon)
 g_autoptr(GString) buf = g_string_new("");
 g_autoptr(HumanReadableText) info = NULL;
 
-pnv_xive2_pic_print_info(&chip10->xive, mon);
+pnv_xive2_pic_print_info(&chip10->xive, buf);
 
 pnv_psi_pic_print_info(&chip10->psi, buf);
 info = human_readable_text_from_str(buf);
-- 
2.41.0

Re: [PATCH 00/26] hw/ppc: Prefer HumanReadableText over Monitor

[Philippe Mathieu-Daudé]

On 10/6/24 08:20, Philippe Mathieu-Daudé wrote:

Hi,

This series remove uses of Monitor in hw/ppc/,
replacing by the more generic HumanReadableText.
Care is taken to keep the commit bisectables by
updating functions one by one, also easing review.

For rationale see previous series from Daniel:
https://lore.kernel.org/qemu-devel/20211028155457.967291-1-berra...@redhat.com/


Or more specifically commit f2de406f29 ("docs/devel: document
expectations for QAPI data modelling for QMP").



Regards,

Phil.

[PATCH 14/26] hw/ppc: Avoid using Monitor in xive_nvt_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/intc/pnv_xive.c | 19 ++-
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index a0c6dee5db..3ad4ac8e7d 100644
--- a/hw/intc/pnv_xive.c
+++ b/hw/intc/pnv_xive.c
@@ -1832,7 +1832,7 @@ static const MemoryRegionOps pnv_xive_pc_ops = {
 };
 
 static void xive_nvt_pic_print_info(XiveNVT *nvt, uint32_t nvt_idx,
-Monitor *mon)
+GString *buf)
 {
 uint8_t  eq_blk = xive_get_field32(NVT_W1_EQ_BLOCK, nvt->w1);
 uint32_t eq_idx = xive_get_field32(NVT_W1_EQ_INDEX, nvt->w1);
@@ -1841,9 +1841,9 @@ static void xive_nvt_pic_print_info(XiveNVT *nvt, 
uint32_t nvt_idx,
 return;
 }
 
-monitor_printf(mon, "  %08x end:%02x/%04x IPB:%02x\n", nvt_idx,
-   eq_blk, eq_idx,
-   xive_get_field32(NVT_W4_IPB, nvt->w4));
+g_string_append_printf(buf, "  %08x end:%02x/%04x IPB:%02x\n",
+   nvt_idx, eq_blk, eq_idx,
+   xive_get_field32(NVT_W4_IPB, nvt->w4));
 }
 
 void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon)
@@ -1888,17 +1888,18 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor 
*mon)
 while (!xive_router_get_end(xrtr, blk, i, &end)) {
 xive_end_eas_pic_print_info(&end, i++, buf);
 }
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 
-monitor_printf(mon, "XIVE[%x] #%d NVTT %08x .. %08x\n", chip_id, blk,
-   0, XIVE_NVT_COUNT - 1);
+g_string_append_printf(buf, "XIVE[%x] #%d NVTT %08x .. %08x\n",
+   chip_id, blk, 0, XIVE_NVT_COUNT - 1);
 xive_nvt_per_subpage = pnv_xive_vst_per_subpage(xive, VST_TSEL_VPDT);
 for (i = 0; i < XIVE_NVT_COUNT; i += xive_nvt_per_subpage) {
 while (!xive_router_get_nvt(xrtr, blk, i, &nvt)) {
-xive_nvt_pic_print_info(&nvt, i++, mon);
+xive_nvt_pic_print_info(&nvt, i++, buf);
 }
 }
+
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 }
 
 static void pnv_xive_reset(void *dev)
-- 
2.41.0

[PATCH 17/26] hw/ppc: Avoid using Monitor in xive2_eas_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/xive2_regs.h |  2 +-
 hw/intc/pnv_xive2.c | 16 
 hw/intc/xive2.c | 12 ++--
 3 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h
index 816f5d0e84..f662f0e325 100644
--- a/include/hw/ppc/xive2_regs.h
+++ b/include/hw/ppc/xive2_regs.h
@@ -48,7 +48,7 @@ typedef struct Xive2Eas {
 #define xive2_eas_is_valid(eas)   (be64_to_cpu((eas)->w) & EAS2_VALID)
 #define xive2_eas_is_masked(eas)  (be64_to_cpu((eas)->w) & EAS2_MASKED)
 
-void xive2_eas_pic_print_info(Xive2Eas *eas, uint32_t lisn, Monitor *mon);
+void xive2_eas_pic_print_info(Xive2Eas *eas, uint32_t lisn, GString *buf);
 
 /*
  * Event Notifification Descriptor (END)
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index 83e0f6b09f..649e5001fd 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -2120,24 +2120,24 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor 
*mon)
 g_autoptr(GString) buf = g_string_new("");
 g_autoptr(HumanReadableText) info = NULL;
 
-monitor_printf(mon, "XIVE[%x] Source %08x .. %08x\n", blk, srcno0,
-   srcno0 + nr_esbs - 1);
+g_string_append_printf(buf, "XIVE[%x] Source %08x .. %08x\n",
+   blk, srcno0, srcno0 + nr_esbs - 1);
 xive_source_pic_print_info(&xive->ipi_source, srcno0, buf);
 
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
-
-monitor_printf(mon, "XIVE[%x] EAT %08x .. %08x\n", blk, srcno0,
-   srcno0 + nr_esbs - 1);
+g_string_append_printf(buf, "XIVE[%x] EAT %08x .. %08x\n",
+   blk, srcno0, srcno0 + nr_esbs - 1);
 for (i = 0; i < nr_esbs; i++) {
 if (xive2_router_get_eas(xrtr, blk, i, &eas)) {
 break;
 }
 if (!xive2_eas_is_masked(&eas)) {
-xive2_eas_pic_print_info(&eas, i, mon);
+xive2_eas_pic_print_info(&eas, i, buf);
 }
 }
 
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
+
 monitor_printf(mon, "XIVE[%x] #%d END Escalation EAT\n", chip_id, blk);
 i = 0;
 while (!xive2_router_get_end(xrtr, blk, i, &end)) {
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index 98c0d8ba44..0154ebb59c 100644
--- a/hw/intc/xive2.c
+++ b/hw/intc/xive2.c
@@ -27,17 +27,17 @@ uint32_t xive2_router_get_config(Xive2Router *xrtr)
 return xrc->get_config(xrtr);
 }
 
-void xive2_eas_pic_print_info(Xive2Eas *eas, uint32_t lisn, Monitor *mon)
+void xive2_eas_pic_print_info(Xive2Eas *eas, uint32_t lisn, GString *buf)
 {
 if (!xive2_eas_is_valid(eas)) {
 return;
 }
 
-monitor_printf(mon, "  %08x %s end:%02x/%04x data:%08x\n",
-   lisn, xive2_eas_is_masked(eas) ? "M" : " ",
-   (uint8_t)  xive_get_field64(EAS2_END_BLOCK, eas->w),
-   (uint32_t) xive_get_field64(EAS2_END_INDEX, eas->w),
-   (uint32_t) xive_get_field64(EAS2_END_DATA, eas->w));
+g_string_append_printf(buf, "  %08x %s end:%02x/%04x data:%08x\n",
+   lisn, xive2_eas_is_masked(eas) ? "M" : " ",
+   (uint8_t)  xive_get_field64(EAS2_END_BLOCK, eas->w),
+   (uint32_t) xive_get_field64(EAS2_END_INDEX, eas->w),
+   (uint32_t) xive_get_field64(EAS2_END_DATA, eas->w));
 }
 
 void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width,
-- 
2.41.0

[PATCH 23/26] hw/ppc: Avoid using Monitor in SpaprInterruptControllerClass::print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/spapr_irq.h | 2 +-
 hw/intc/spapr_xive.c   | 9 +
 hw/intc/xics_spapr.c   | 9 +
 hw/ppc/spapr_irq.c | 8 +++-
 4 files changed, 10 insertions(+), 18 deletions(-)

diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
index 4fd2d5853d..6e50470cff 100644
--- a/include/hw/ppc/spapr_irq.h
+++ b/include/hw/ppc/spapr_irq.h
@@ -73,7 +73,7 @@ struct SpaprInterruptControllerClass {
 
 /* These methods should only be called on the active intc */
 void (*set_irq)(SpaprInterruptController *intc, int irq, int val);
-void (*print_info)(SpaprInterruptController *intc, Monitor *mon);
+void (*print_info)(SpaprInterruptController *intc, GString *buf);
 void (*dt)(SpaprInterruptController *intc, uint32_t nr_servers,
void *fdt, uint32_t phandle);
 int (*post_load)(SpaprInterruptController *intc, int version_id);
diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index 9d0d5948ff..283a6b8fd2 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -11,13 +11,11 @@
 #include "qemu/log.h"
 #include "qemu/module.h"
 #include "qapi/error.h"
-#include "qapi/type-helpers.h"
 #include "qemu/error-report.h"
 #include "target/ppc/cpu.h"
 #include "sysemu/cpus.h"
 #include "sysemu/reset.h"
 #include "migration/vmstate.h"
-#include "monitor/monitor.h"
 #include "hw/ppc/fdt.h"
 #include "hw/ppc/spapr.h"
 #include "hw/ppc/spapr_cpu_core.h"
@@ -701,12 +699,10 @@ static void spapr_xive_set_irq(SpaprInterruptController 
*intc, int irq, int val)
 }
 }
 
-static void spapr_xive_print_info(SpaprInterruptController *intc, Monitor *mon)
+static void spapr_xive_print_info(SpaprInterruptController *intc, GString *buf)
 {
 SpaprXive *xive = SPAPR_XIVE(intc);
 CPUState *cs;
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 CPU_FOREACH(cs) {
 PowerPCCPU *cpu = POWERPC_CPU(cs);
@@ -714,9 +710,6 @@ static void spapr_xive_print_info(SpaprInterruptController 
*intc, Monitor *mon)
 xive_tctx_pic_print_info(spapr_cpu_state(cpu)->tctx, buf);
 }
 spapr_xive_pic_print_info(xive, buf);
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
 
 static void spapr_xive_dt(SpaprInterruptController *intc, uint32_t nr_servers,
diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c
index 1926373ebd..a0d97bdefe 100644
--- a/hw/intc/xics_spapr.c
+++ b/hw/intc/xics_spapr.c
@@ -34,8 +34,6 @@
 #include "hw/ppc/xics_spapr.h"
 #include "hw/ppc/fdt.h"
 #include "qapi/visitor.h"
-#include "qapi/type-helpers.h"
-#include "monitor/monitor.h"
 
 /*
  * Guest interfaces
@@ -397,12 +395,10 @@ static void xics_spapr_set_irq(SpaprInterruptController 
*intc, int irq, int val)
 ics_set_irq(ics, srcno, val);
 }
 
-static void xics_spapr_print_info(SpaprInterruptController *intc, Monitor *mon)
+static void xics_spapr_print_info(SpaprInterruptController *intc, GString *buf)
 {
 ICSState *ics = ICS_SPAPR(intc);
 CPUState *cs;
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 CPU_FOREACH(cs) {
 PowerPCCPU *cpu = POWERPC_CPU(cs);
@@ -410,9 +406,6 @@ static void xics_spapr_print_info(SpaprInterruptController 
*intc, Monitor *mon)
 icp_pic_print_info(spapr_cpu_state(cpu)->icp, buf);
 }
 ics_pic_print_info(ics, buf);
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
 
 static int xics_spapr_post_load(SpaprInterruptController *intc, int version_id)
diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
index 97b2fc42ab..b43917e7fe 100644
--- a/hw/ppc/spapr_irq.c
+++ b/hw/ppc/spapr_irq.c
@@ -11,6 +11,7 @@
 #include "qemu/log.h"
 #include "qemu/error-report.h"
 #include "qapi/error.h"
+#include "qapi/type-helpers.h"
 #include "hw/irq.h"
 #include "hw/ppc/spapr.h"
 #include "hw/ppc/spapr_cpu_core.h"
@@ -18,6 +19,7 @@
 #include "hw/ppc/xics.h"
 #include "hw/ppc/xics_spapr.h"
 #include "hw/qdev-properties.h"
+#include "monitor/monitor.h"
 #include "cpu-models.h"
 #include "sysemu/kvm.h"
 
@@ -269,8 +271,12 @@ void spapr_irq_print_info(SpaprMachineState *spapr, 
Monitor *mon)
 {
 SpaprInterruptControllerClass *sicc
 = SPAPR_INTC_GET_CLASS(spapr->active_intc);
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
 
-sicc->print_info(spapr->active_intc, mon);
+sicc->print_info(spapr->active_intc, buf);
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 }
 
 void spapr_irq_dt(SpaprMachineState *spapr, uint32_t nr_servers,
-- 
2.41.0

[PATCH 18/26] hw/ppc: Avoid using Monitor in xive2_end_eas_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/xive2_regs.h |  2 +-
 hw/intc/pnv_xive2.c | 10 +-
 hw/intc/xive2.c | 20 ++--
 3 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h
index f662f0e325..37f572ed6d 100644
--- a/include/hw/ppc/xive2_regs.h
+++ b/include/hw/ppc/xive2_regs.h
@@ -134,7 +134,7 @@ void xive2_end_pic_print_info(Xive2End *end, uint32_t 
end_idx, Monitor *mon);
 void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width,
 Monitor *mon);
 void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t end_idx,
-   Monitor *mon);
+  GString *buf);
 
 /*
  * Notification Virtual Processor (NVP)
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index 649e5001fd..9535f60828 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -2135,14 +2135,14 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor 
*mon)
 }
 }
 
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
-
-monitor_printf(mon, "XIVE[%x] #%d END Escalation EAT\n", chip_id, blk);
+g_string_append_printf(buf, "XIVE[%x] #%d END Escalation EAT\n",
+   chip_id, blk);
 i = 0;
 while (!xive2_router_get_end(xrtr, blk, i, &end)) {
-xive2_end_eas_pic_print_info(&end, i++, mon);
+xive2_end_eas_pic_print_info(&end, i++, buf);
 }
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
 monitor_printf(mon, "XIVE[%x] #%d ENDT\n", chip_id, blk);
 i = 0;
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index 0154ebb59c..23356acff7 100644
--- a/hw/intc/xive2.c
+++ b/hw/intc/xive2.c
@@ -116,7 +116,7 @@ void xive2_end_pic_print_info(Xive2End *end, uint32_t 
end_idx, Monitor *mon)
 }
 
 void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t end_idx,
-  Monitor *mon)
+  GString *buf)
 {
 Xive2Eas *eas = (Xive2Eas *) &end->w4;
 uint8_t pq;
@@ -127,15 +127,15 @@ void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t 
end_idx,
 
 pq = xive_get_field32(END2_W1_ESe, end->w1);
 
-monitor_printf(mon, "  %08x %c%c %c%c end:%02x/%04x data:%08x\n",
-   end_idx,
-   pq & XIVE_ESB_VAL_P ? 'P' : '-',
-   pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
-   xive2_eas_is_valid(eas) ? 'v' : ' ',
-   xive2_eas_is_masked(eas) ? 'M' : ' ',
-   (uint8_t)  xive_get_field64(EAS2_END_BLOCK, eas->w),
-   (uint32_t) xive_get_field64(EAS2_END_INDEX, eas->w),
-   (uint32_t) xive_get_field64(EAS2_END_DATA, eas->w));
+g_string_append_printf(buf, "  %08x %c%c %c%c end:%02x/%04x data:%08x\n",
+   end_idx,
+   pq & XIVE_ESB_VAL_P ? 'P' : '-',
+   pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
+   xive2_eas_is_valid(eas) ? 'v' : ' ',
+   xive2_eas_is_masked(eas) ? 'M' : ' ',
+   (uint8_t)  xive_get_field64(EAS2_END_BLOCK, eas->w),
+   (uint32_t) xive_get_field64(EAS2_END_INDEX, eas->w),
+   (uint32_t) xive_get_field64(EAS2_END_DATA, eas->w));
 }
 
 static void xive2_end_enqueue(Xive2End *end, uint32_t data)
-- 
2.41.0

[PATCH 26/26] hw/ppc: Avoid using Monitor in pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/pnv_chip.h |  2 +-
 hw/ppc/pnv.c  | 29 +++--
 2 files changed, 8 insertions(+), 23 deletions(-)

diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
index a5e428be7c..a4ed17ac59 100644
--- a/include/hw/ppc/pnv_chip.h
+++ b/include/hw/ppc/pnv_chip.h
@@ -154,7 +154,7 @@ struct PnvChipClass {
 void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, GString *buf);
 ISABus *(*isa_create)(PnvChip *chip, Error **errp);
 void (*dt_populate)(PnvChip *chip, void *fdt);
-void (*pic_print_info)(PnvChip *chip, Monitor *mon);
+void (*pic_print_info)(PnvChip *chip, GString *buf);
 uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id);
 uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr);
 };
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 9039c1777a..df74f032d7 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -765,14 +765,11 @@ static ISABus *pnv_isa_create(PnvChip *chip, Error **errp)
 return PNV_CHIP_GET_CLASS(chip)->isa_create(chip, errp);
 }
 
-static void pnv_chip_power8_pic_print_info(PnvChip *chip, Monitor *mon)
+static void pnv_chip_power8_pic_print_info(PnvChip *chip, GString *buf)
 {
 Pnv8Chip *chip8 = PNV8_CHIP(chip);
 int i;
 
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
-
 ics_pic_print_info(&chip8->psi.ics, buf);
 
 for (i = 0; i < chip8->num_phbs; i++) {
@@ -782,9 +779,6 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, 
Monitor *mon)
 pnv_phb3_msi_pic_print_info(&phb3->msis, buf);
 ics_pic_print_info(&phb3->lsis, buf);
 }
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
 
 static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque)
@@ -801,19 +795,14 @@ static int pnv_chip_power9_pic_print_info_child(Object 
*child, void *opaque)
 return 0;
 }
 
-static void pnv_chip_power9_pic_print_info(PnvChip *chip, Monitor *mon)
+static void pnv_chip_power9_pic_print_info(PnvChip *chip, GString *buf)
 {
 Pnv9Chip *chip9 = PNV9_CHIP(chip);
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 pnv_xive_pic_print_info(&chip9->xive, buf);
 pnv_psi_pic_print_info(&chip9->psi, buf);
 object_child_foreach_recursive(OBJECT(chip),
  pnv_chip_power9_pic_print_info_child, buf);
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
 
 static uint64_t pnv_chip_power8_xscom_core_base(PnvChip *chip,
@@ -853,19 +842,14 @@ static void pnv_ipmi_bt_init(ISABus *bus, IPMIBmc *bmc, 
uint32_t irq)
 isa_realize_and_unref(dev, bus, &error_fatal);
 }
 
-static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon)
+static void pnv_chip_power10_pic_print_info(PnvChip *chip, GString *buf)
 {
 Pnv10Chip *chip10 = PNV10_CHIP(chip);
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 pnv_xive2_pic_print_info(&chip10->xive, buf);
 pnv_psi_pic_print_info(&chip10->psi, buf);
 object_child_foreach_recursive(OBJECT(chip),
  pnv_chip_power9_pic_print_info_child, buf);
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
 
 /* Always give the first 1GB to chip 0 else we won't boot */
@@ -2363,12 +2347,13 @@ static void pnv_pic_print_info(InterruptStatsProvider 
*obj,
 PNV_CHIP_GET_CLASS(pnv->chips[0])->intc_print_info(pnv->chips[0], cpu,
buf);
 }
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 
 for (i = 0; i < pnv->num_chips; i++) {
-PNV_CHIP_GET_CLASS(pnv->chips[i])->pic_print_info(pnv->chips[i], mon);
+PNV_CHIP_GET_CLASS(pnv->chips[i])->pic_print_info(pnv->chips[i], buf);
 }
+
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 }
 
 static int pnv_match_nvt(XiveFabric *xfb, uint8_t format,
-- 
2.41.0

[PATCH 05/26] hw/ppc: Avoid using Monitor in PnvChipClass::intc_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/pnv_chip.h |  2 +-
 hw/ppc/pnv.c  | 30 --
 2 files changed, 9 insertions(+), 23 deletions(-)

diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
index 8589f3291e..a5e428be7c 100644
--- a/include/hw/ppc/pnv_chip.h
+++ b/include/hw/ppc/pnv_chip.h
@@ -151,7 +151,7 @@ struct PnvChipClass {
 void (*intc_create)(PnvChip *chip, PowerPCCPU *cpu, Error **errp);
 void (*intc_reset)(PnvChip *chip, PowerPCCPU *cpu);
 void (*intc_destroy)(PnvChip *chip, PowerPCCPU *cpu);
-void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, Monitor *mon);
+void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, GString *buf);
 ISABus *(*isa_create)(PnvChip *chip, Error **errp);
 void (*dt_populate)(PnvChip *chip, void *fdt);
 void (*pic_print_info)(PnvChip *chip, Monitor *mon);
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 3eaf674efa..aed6767c8d 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1129,15 +1129,9 @@ static void pnv_chip_power8_intc_destroy(PnvChip *chip, 
PowerPCCPU *cpu)
 }
 
 static void pnv_chip_power8_intc_print_info(PnvChip *chip, PowerPCCPU *cpu,
-Monitor *mon)
+GString *buf)
 {
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
-
 icp_pic_print_info(ICP(pnv_cpu_state(cpu)->intc), buf);
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
 
 /*
@@ -1222,15 +1216,9 @@ static void pnv_chip_power9_intc_destroy(PnvChip *chip, 
PowerPCCPU *cpu)
 }
 
 static void pnv_chip_power9_intc_print_info(PnvChip *chip, PowerPCCPU *cpu,
-Monitor *mon)
+GString *buf)
 {
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
-
 xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), buf);
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
 
 static void pnv_chip_power10_intc_create(PnvChip *chip, PowerPCCPU *cpu,
@@ -1272,15 +1260,9 @@ static void pnv_chip_power10_intc_destroy(PnvChip *chip, 
PowerPCCPU *cpu)
 }
 
 static void pnv_chip_power10_intc_print_info(PnvChip *chip, PowerPCCPU *cpu,
- Monitor *mon)
+ GString *buf)
 {
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
-
 xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), buf);
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
 
 /*
@@ -2363,14 +2345,18 @@ static void pnv_pic_print_info(InterruptStatsProvider 
*obj,
 PnvMachineState *pnv = PNV_MACHINE(obj);
 int i;
 CPUState *cs;
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
 
 CPU_FOREACH(cs) {
 PowerPCCPU *cpu = POWERPC_CPU(cs);
 
 /* XXX: loop on each chip/core/thread instead of CPU_FOREACH() */
 PNV_CHIP_GET_CLASS(pnv->chips[0])->intc_print_info(pnv->chips[0], cpu,
-   mon);
+   buf);
 }
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
 for (i = 0; i < pnv->num_chips; i++) {
 PNV_CHIP_GET_CLASS(pnv->chips[i])->pic_print_info(pnv->chips[i], mon);
-- 
2.41.0

[PATCH 25/26] hw/ppc: Avoid using Monitor in pnv_chip_power9_pic_print_info_child()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/ppc/pnv.c | 18 ++
 1 file changed, 6 insertions(+), 12 deletions(-)

diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 5b9dbff754..9039c1777a 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -789,18 +789,14 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, 
Monitor *mon)
 
 static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque)
 {
-Monitor *mon = opaque;
+GString *buf = opaque;
 PnvPHB *phb =  (PnvPHB *) object_dynamic_cast(child, TYPE_PNV_PHB);
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 if (!phb) {
 return 0;
 }
 
 pnv_phb4_pic_print_info(PNV_PHB4(phb->backend), buf);
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 
 return 0;
 }
@@ -813,12 +809,11 @@ static void pnv_chip_power9_pic_print_info(PnvChip *chip, 
Monitor *mon)
 
 pnv_xive_pic_print_info(&chip9->xive, buf);
 pnv_psi_pic_print_info(&chip9->psi, buf);
+object_child_foreach_recursive(OBJECT(chip),
+ pnv_chip_power9_pic_print_info_child, buf);
 
 info = human_readable_text_from_str(buf);
 monitor_puts(mon, info->human_readable_text);
-
-object_child_foreach_recursive(OBJECT(chip),
- pnv_chip_power9_pic_print_info_child, mon);
 }
 
 static uint64_t pnv_chip_power8_xscom_core_base(PnvChip *chip,
@@ -865,13 +860,12 @@ static void pnv_chip_power10_pic_print_info(PnvChip 
*chip, Monitor *mon)
 g_autoptr(HumanReadableText) info = NULL;
 
 pnv_xive2_pic_print_info(&chip10->xive, buf);
-
 pnv_psi_pic_print_info(&chip10->psi, buf);
+object_child_foreach_recursive(OBJECT(chip),
+ pnv_chip_power9_pic_print_info_child, buf);
+
 info = human_readable_text_from_str(buf);
 monitor_puts(mon, info->human_readable_text);
-
-object_child_foreach_recursive(OBJECT(chip),
- pnv_chip_power9_pic_print_info_child, mon);
 }
 
 /* Always give the first 1GB to chip 0 else we won't boot */
-- 
2.41.0

[PATCH 07/26] hw/ppc: Avoid using Monitor in spapr_xive_end_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/intc/spapr_xive.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index 3357f6325f..d571645e9e 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -133,7 +133,7 @@ static int spapr_xive_target_to_end(uint32_t target, 
uint8_t prio,
  * structure dumping only the information related to the OS EQ.
  */
 static void spapr_xive_end_pic_print_info(SpaprXive *xive, XiveEND *end,
-  Monitor *mon)
+  GString *buf)
 {
 uint64_t qaddr_base = xive_end_qaddr(end);
 uint32_t qindex = xive_get_field32(END_W1_PAGE_OFF, end->w1);
@@ -142,17 +142,12 @@ static void spapr_xive_end_pic_print_info(SpaprXive 
*xive, XiveEND *end,
 uint32_t qentries = 1 << (qsize + 10);
 uint32_t nvt = xive_get_field32(END_W6_NVT_INDEX, end->w6);
 uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7);
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
-monitor_printf(mon, "%3d/%d % 6d/%5d @%"PRIx64" ^%d",
-   spapr_xive_nvt_to_target(0, nvt),
-   priority, qindex, qentries, qaddr_base, qgen);
+g_string_append_printf(buf, "%3d/%d % 6d/%5d @%"PRIx64" ^%d",
+   spapr_xive_nvt_to_target(0, nvt),
+   priority, qindex, qentries, qaddr_base, qgen);
 
 xive_end_queue_pic_print_info(end, 6, buf);
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
 
 /*
@@ -198,13 +193,18 @@ static void spapr_xive_pic_print_info(SpaprXive *xive, 
Monitor *mon)
 if (!xive_eas_is_masked(eas)) {
 uint32_t end_idx = xive_get_field64(EAS_END_INDEX, eas->w);
 XiveEND *end;
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
 
 assert(end_idx < xive->nr_ends);
 end = &xive->endt[end_idx];
 
 if (xive_end_is_valid(end)) {
-spapr_xive_end_pic_print_info(xive, end, mon);
+spapr_xive_end_pic_print_info(xive, end, buf);
 }
+
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 }
 monitor_printf(mon, "\n");
 }
-- 
2.41.0

[PATCH 24/26] hw/ppc: Avoid using Monitor in spapr_irq_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/spapr_irq.h |  2 +-
 hw/ppc/spapr.c | 11 ---
 hw/ppc/spapr_irq.c |  8 +---
 3 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
index 6e50470cff..cb9a85f657 100644
--- a/include/hw/ppc/spapr_irq.h
+++ b/include/hw/ppc/spapr_irq.h
@@ -85,7 +85,7 @@ int spapr_irq_cpu_intc_create(struct SpaprMachineState *spapr,
   PowerPCCPU *cpu, Error **errp);
 void spapr_irq_cpu_intc_reset(struct SpaprMachineState *spapr, PowerPCCPU 
*cpu);
 void spapr_irq_cpu_intc_destroy(struct SpaprMachineState *spapr, PowerPCCPU 
*cpu);
-void spapr_irq_print_info(struct SpaprMachineState *spapr, Monitor *mon);
+void spapr_irq_print_info(struct SpaprMachineState *spapr, GString *buf);
 void spapr_irq_dt(struct SpaprMachineState *spapr, uint32_t nr_servers,
   void *fdt, uint32_t phandle);
 
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 81a187f126..cd9b811ac6 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -31,6 +31,7 @@
 #include "qapi/error.h"
 #include "qapi/qapi-events-machine.h"
 #include "qapi/qapi-events-qdev.h"
+#include "qapi/type-helpers.h"
 #include "qapi/visitor.h"
 #include "sysemu/sysemu.h"
 #include "sysemu/hostmem.h"
@@ -4530,10 +4531,14 @@ static void spapr_pic_print_info(InterruptStatsProvider 
*obj,
  Monitor *mon)
 {
 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
 
-spapr_irq_print_info(spapr, mon);
-monitor_printf(mon, "irqchip: %s\n",
-   kvm_irqchip_in_kernel() ? "in-kernel" : "emulated");
+spapr_irq_print_info(spapr, buf);
+g_string_append_printf(buf, "irqchip: %s\n",
+   kvm_irqchip_in_kernel() ? "in-kernel" : "emulated");
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 }
 
 /*
diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
index b43917e7fe..aebd7eaabb 100644
--- a/hw/ppc/spapr_irq.c
+++ b/hw/ppc/spapr_irq.c
@@ -11,7 +11,6 @@
 #include "qemu/log.h"
 #include "qemu/error-report.h"
 #include "qapi/error.h"
-#include "qapi/type-helpers.h"
 #include "hw/irq.h"
 #include "hw/ppc/spapr.h"
 #include "hw/ppc/spapr_cpu_core.h"
@@ -19,7 +18,6 @@
 #include "hw/ppc/xics.h"
 #include "hw/ppc/xics_spapr.h"
 #include "hw/qdev-properties.h"
-#include "monitor/monitor.h"
 #include "cpu-models.h"
 #include "sysemu/kvm.h"
 
@@ -267,16 +265,12 @@ static void spapr_set_irq(void *opaque, int irq, int 
level)
 sicc->set_irq(spapr->active_intc, irq, level);
 }
 
-void spapr_irq_print_info(SpaprMachineState *spapr, Monitor *mon)
+void spapr_irq_print_info(SpaprMachineState *spapr, GString *buf)
 {
 SpaprInterruptControllerClass *sicc
 = SPAPR_INTC_GET_CLASS(spapr->active_intc);
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 sicc->print_info(spapr->active_intc, buf);
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
 
 void spapr_irq_dt(SpaprMachineState *spapr, uint32_t nr_servers,
-- 
2.41.0

[PATCH 21/26] hw/ppc: Avoid using Monitor in xive2_nvp_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/intc/pnv_xive2.c | 29 +++--
 1 file changed, 15 insertions(+), 14 deletions(-)

diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index 52505fd1a4..10914b04df 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -2028,7 +2028,7 @@ static void pnv_xive2_register_types(void)
 type_init(pnv_xive2_register_types)
 
 static void xive2_nvp_pic_print_info(Xive2Nvp *nvp, uint32_t nvp_idx,
- Monitor *mon)
+ GString *buf)
 {
 uint8_t  eq_blk = xive_get_field32(NVP2_W5_VP_END_BLOCK, nvp->w5);
 uint32_t eq_idx = xive_get_field32(NVP2_W5_VP_END_INDEX, nvp->w5);
@@ -2037,21 +2037,21 @@ static void xive2_nvp_pic_print_info(Xive2Nvp *nvp, 
uint32_t nvp_idx,
 return;
 }
 
-monitor_printf(mon, "  %08x end:%02x/%04x IPB:%02x",
-   nvp_idx, eq_blk, eq_idx,
-   xive_get_field32(NVP2_W2_IPB, nvp->w2));
+g_string_append_printf(buf, "  %08x end:%02x/%04x IPB:%02x",
+   nvp_idx, eq_blk, eq_idx,
+   xive_get_field32(NVP2_W2_IPB, nvp->w2));
 /*
  * When the NVP is HW controlled, more fields are updated
  */
 if (xive2_nvp_is_hw(nvp)) {
-monitor_printf(mon, " CPPR:%02x",
-   xive_get_field32(NVP2_W2_CPPR, nvp->w2));
+g_string_append_printf(buf, " CPPR:%02x",
+   xive_get_field32(NVP2_W2_CPPR, nvp->w2));
 if (xive2_nvp_is_co(nvp)) {
-monitor_printf(mon, " CO:%04x",
-   xive_get_field32(NVP2_W1_CO_THRID, nvp->w1));
+g_string_append_printf(buf, " CO:%04x",
+   xive_get_field32(NVP2_W1_CO_THRID, 
nvp->w1));
 }
 }
-monitor_printf(mon, "\n");
+g_string_append_c(buf, '\n');
 }
 
 /*
@@ -2147,15 +2147,16 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor 
*mon)
 while (!xive2_router_get_end(xrtr, blk, i, &end)) {
 xive2_end_pic_print_info(&end, i++, buf);
 }
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 
-monitor_printf(mon, "XIVE[%x] #%d NVPT %08x .. %08x\n", chip_id, blk,
-   0, XIVE2_NVP_COUNT - 1);
+g_string_append_printf(buf, "XIVE[%x] #%d NVPT %08x .. %08x\n",
+   chip_id, blk, 0, XIVE2_NVP_COUNT - 1);
 xive_nvp_per_subpage = pnv_xive2_vst_per_subpage(xive, VST_NVP);
 for (i = 0; i < XIVE2_NVP_COUNT; i += xive_nvp_per_subpage) {
 while (!xive2_router_get_nvp(xrtr, blk, i, &nvp)) {
-xive2_nvp_pic_print_info(&nvp, i++, mon);
+xive2_nvp_pic_print_info(&nvp, i++, buf);
 }
 }
+
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 }
-- 
2.41.0

[PATCH 09/26] hw/ppc: Avoid using Monitor in xive_source_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/xive.h  |  2 +-
 hw/intc/pnv_xive.c | 11 ---
 hw/intc/pnv_xive2.c|  8 +++-
 hw/intc/xive.c | 16 +++-
 hw/pci-host/pnv_phb4.c | 20 ++--
 hw/ppc/pnv_psi.c   | 12 +---
 6 files changed, 46 insertions(+), 23 deletions(-)

diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index bc1cbad8a8..28c181faa2 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -314,7 +314,7 @@ static inline bool xive_source_is_asserted(XiveSource 
*xsrc, uint32_t srcno)
 }
 
 void xive_source_pic_print_info(XiveSource *xsrc, uint32_t offset,
-Monitor *mon);
+GString *buf);
 
 static inline bool xive_source_irq_is_lsi(XiveSource *xsrc, uint32_t srcno)
 {
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index da10deceb8..520d7e0acd 100644
--- a/hw/intc/pnv_xive.c
+++ b/hw/intc/pnv_xive.c
@@ -11,6 +11,7 @@
 #include "qemu/log.h"
 #include "qemu/module.h"
 #include "qapi/error.h"
+#include "qapi/type-helpers.h"
 #include "target/ppc/cpu.h"
 #include "sysemu/cpus.h"
 #include "sysemu/dma.h"
@@ -1857,10 +1858,14 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor 
*mon)
 XiveNVT nvt;
 int i;
 uint64_t xive_nvt_per_subpage;
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
 
-monitor_printf(mon, "XIVE[%x] #%d Source %08x .. %08x\n", chip_id, blk,
-   srcno0, srcno0 + nr_ipis - 1);
-xive_source_pic_print_info(&xive->ipi_source, srcno0, mon);
+g_string_append_printf(buf, "XIVE[%x] #%d Source %08x .. %08x\n",
+   chip_id, blk, srcno0, srcno0 + nr_ipis - 1);
+xive_source_pic_print_info(&xive->ipi_source, srcno0, buf);
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
 monitor_printf(mon, "XIVE[%x] #%d EAT %08x .. %08x\n", chip_id, blk,
srcno0, srcno0 + nr_ipis - 1);
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index 4b8d0a5d81..83e0f6b09f 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -10,6 +10,7 @@
 #include "qemu/osdep.h"
 #include "qemu/log.h"
 #include "qapi/error.h"
+#include "qapi/type-helpers.h"
 #include "target/ppc/cpu.h"
 #include "sysemu/cpus.h"
 #include "sysemu/dma.h"
@@ -2116,10 +2117,15 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor 
*mon)
 Xive2Nvp nvp;
 int i;
 uint64_t xive_nvp_per_subpage;
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
 
 monitor_printf(mon, "XIVE[%x] Source %08x .. %08x\n", blk, srcno0,
srcno0 + nr_esbs - 1);
-xive_source_pic_print_info(&xive->ipi_source, srcno0, mon);
+xive_source_pic_print_info(&xive->ipi_source, srcno0, buf);
+
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
 monitor_printf(mon, "XIVE[%x] EAT %08x .. %08x\n", blk, srcno0,
srcno0 + nr_esbs - 1);
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 260a94e2ca..1adb0439c5 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -1209,22 +1209,20 @@ void xive_source_set_irq(void *opaque, int srcno, int 
val)
 }
 }
 
-void xive_source_pic_print_info(XiveSource *xsrc, uint32_t offset, Monitor 
*mon)
+void xive_source_pic_print_info(XiveSource *xsrc, uint32_t offset, GString 
*buf)
 {
-int i;
-
-for (i = 0; i < xsrc->nr_irqs; i++) {
+for (unsigned i = 0; i < xsrc->nr_irqs; i++) {
 uint8_t pq = xive_source_esb_get(xsrc, i);
 
 if (pq == XIVE_ESB_OFF) {
 continue;
 }
 
-monitor_printf(mon, "  %08x %s %c%c%c\n", i + offset,
-   xive_source_irq_is_lsi(xsrc, i) ? "LSI" : "MSI",
-   pq & XIVE_ESB_VAL_P ? 'P' : '-',
-   pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
-   xive_source_is_asserted(xsrc, i) ? 'A' : ' ');
+g_string_append_printf(buf, "  %08x %s %c%c%c\n", i + offset,
+   xive_source_irq_is_lsi(xsrc, i) ? "LSI" : "MSI",
+   pq & XIVE_ESB_VAL_P ? 'P' : '-',
+   pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
+   xive_source_is_asserted(xsrc, i) ? 'A' : ' ');
 }
 }
 
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index 075499d36d..4b453997e7 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -10,6 +10,7 @@
 #include "qemu/log.h"
 #include "qapi/visitor.h"
 #include "qapi/error.h"
+#include "qapi/type-helpers.h"
 #include "monitor/monitor.h"
 #include "target/ppc/cpu.h"
 #include "hw/pci-host/pnv_phb4_regs.h"
@@ -1807,11 +1808,18 @@ void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon)
 phb->regs[PHB_INT_NOTIFY_ADDR >> 3] & ~PHB_INT_NOTIF

[PATCH 10/26] hw/ppc: Avoid using Monitor in pnv_phb4_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/pci-host/pnv_phb4.h | 2 +-
 hw/pci-host/pnv_phb4.c | 9 +
 hw/ppc/pnv.c   | 6 +-
 3 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
index 3212e68160..8abee78e4d 100644
--- a/include/hw/pci-host/pnv_phb4.h
+++ b/include/hw/pci-host/pnv_phb4.h
@@ -155,7 +155,7 @@ struct PnvPHB4 {
 QLIST_HEAD(, PnvPhb4DMASpace) dma_spaces;
 };
 
-void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon);
+void pnv_phb4_pic_print_info(PnvPHB4 *phb, GString *buf);
 int pnv_phb4_pec_get_phb_id(PnvPhb4PecState *pec, int stack_index);
 PnvPhb4PecState *pnv_pec_add_phb(PnvChip *chip, PnvPHB *phb, Error **errp);
 void pnv_phb4_bus_init(DeviceState *dev, PnvPHB4 *phb);
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index 4b453997e7..1008c1 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -10,8 +10,6 @@
 #include "qemu/log.h"
 #include "qapi/visitor.h"
 #include "qapi/error.h"
-#include "qapi/type-helpers.h"
-#include "monitor/monitor.h"
 #include "target/ppc/cpu.h"
 #include "hw/pci-host/pnv_phb4_regs.h"
 #include "hw/pci-host/pnv_phb4.h"
@@ -1802,14 +1800,12 @@ static void pnv_phb4_register_types(void)
 
 type_init(pnv_phb4_register_types);
 
-void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon)
+void pnv_phb4_pic_print_info(PnvPHB4 *phb, GString *buf)
 {
 uint64_t notif_port =
 phb->regs[PHB_INT_NOTIFY_ADDR >> 3] & ~PHB_INT_NOTIFY_ADDR_64K;
 uint32_t offset = phb->regs[PHB_INT_NOTIFY_INDEX >> 3];
 bool abt = !!(phb->regs[PHB_CTRLR >> 3] & PHB_CTRLR_IRQ_ABT_MODE);
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 g_string_append_printf(buf,
"PHB4[%x:%x] Source %08x .. %08x "
@@ -1819,7 +1815,4 @@ void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon)
abt ? "ABT" : "",
notif_port);
 xive_source_pic_print_info(&phb->xsrc, 0, buf);
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index aed6767c8d..df187c5180 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -791,12 +791,16 @@ static int pnv_chip_power9_pic_print_info_child(Object 
*child, void *opaque)
 {
 Monitor *mon = opaque;
 PnvPHB *phb =  (PnvPHB *) object_dynamic_cast(child, TYPE_PNV_PHB);
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
 
 if (!phb) {
 return 0;
 }
 
-pnv_phb4_pic_print_info(PNV_PHB4(phb->backend), mon);
+pnv_phb4_pic_print_info(PNV_PHB4(phb->backend), buf);
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
 return 0;
 }
-- 
2.41.0

[PATCH 12/26] hw/ppc: Avoid using Monitor in xive_end_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/xive_regs.h |  2 +-
 hw/intc/pnv_xive.c |  8 
 hw/intc/xive.c | 40 +-
 3 files changed, 23 insertions(+), 27 deletions(-)

diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h
index dd4a76bcf0..5e6f9d1be4 100644
--- a/include/hw/ppc/xive_regs.h
+++ b/include/hw/ppc/xive_regs.h
@@ -261,7 +261,7 @@ static inline uint64_t xive_end_qaddr(XiveEND *end)
 be32_to_cpu(end->w3);
 }
 
-void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon);
+void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, GString *buf);
 void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, GString *buf);
 void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon);
 
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index c377823522..1dddbf7827 100644
--- a/hw/intc/pnv_xive.c
+++ b/hw/intc/pnv_xive.c
@@ -1875,14 +1875,14 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor 
*mon)
 xive_eas_pic_print_info(&eas, i, buf);
 }
 }
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 
-monitor_printf(mon, "XIVE[%x] #%d ENDT\n", chip_id, blk);
+g_string_append_printf(buf, "XIVE[%x] #%d ENDT\n", chip_id, blk);
 i = 0;
 while (!xive_router_get_end(xrtr, blk, i, &end)) {
-xive_end_pic_print_info(&end, i++, mon);
+xive_end_pic_print_info(&end, i++, buf);
 }
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
 monitor_printf(mon, "XIVE[%x] #%d END Escalation EAT\n", chip_id, blk);
 i = 0;
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index b2203b721b..f631d7cd6e 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -11,7 +11,6 @@
 #include "qemu/log.h"
 #include "qemu/module.h"
 #include "qapi/error.h"
-#include "qapi/type-helpers.h"
 #include "target/ppc/cpu.h"
 #include "sysemu/cpus.h"
 #include "sysemu/dma.h"
@@ -1352,7 +1351,7 @@ void xive_end_queue_pic_print_info(XiveEND *end, uint32_t 
width, GString *buf)
 g_string_append_c(buf, ']');
 }
 
-void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon)
+void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, GString *buf)
 {
 uint64_t qaddr_base = xive_end_qaddr(end);
 uint32_t qindex = xive_get_field32(END_W1_PAGE_OFF, end->w1);
@@ -1364,8 +1363,6 @@ void xive_end_pic_print_info(XiveEND *end, uint32_t 
end_idx, Monitor *mon)
 uint32_t nvt_idx = xive_get_field32(END_W6_NVT_INDEX, end->w6);
 uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7);
 uint8_t pq;
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 if (!xive_end_is_valid(end)) {
 return;
@@ -1373,28 +1370,27 @@ void xive_end_pic_print_info(XiveEND *end, uint32_t 
end_idx, Monitor *mon)
 
 pq = xive_get_field32(END_W1_ESn, end->w1);
 
-monitor_printf(mon, "  %08x %c%c %c%c%c%c%c%c%c%c prio:%d nvt:%02x/%04x",
-   end_idx,
-   pq & XIVE_ESB_VAL_P ? 'P' : '-',
-   pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
-   xive_end_is_valid(end)? 'v' : '-',
-   xive_end_is_enqueue(end)  ? 'q' : '-',
-   xive_end_is_notify(end)   ? 'n' : '-',
-   xive_end_is_backlog(end)  ? 'b' : '-',
-   xive_end_is_escalate(end) ? 'e' : '-',
-   xive_end_is_uncond_escalation(end)   ? 'u' : '-',
-   xive_end_is_silent_escalation(end)   ? 's' : '-',
-   xive_end_is_firmware(end)   ? 'f' : '-',
-   priority, nvt_blk, nvt_idx);
+g_string_append_printf(buf,
+   "  %08x %c%c %c%c%c%c%c%c%c%c prio:%d 
nvt:%02x/%04x",
+   end_idx,
+   pq & XIVE_ESB_VAL_P ? 'P' : '-',
+   pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
+   xive_end_is_valid(end)? 'v' : '-',
+   xive_end_is_enqueue(end)  ? 'q' : '-',
+   xive_end_is_notify(end)   ? 'n' : '-',
+   xive_end_is_backlog(end)  ? 'b' : '-',
+   xive_end_is_escalate(end) ? 'e' : '-',
+   xive_end_is_uncond_escalation(end)   ? 'u' : '-',
+   xive_end_is_silent_escalation(end)   ? 's' : '-',
+   xive_end_is_firmware(end)   ? 'f' : '-',
+   priority, nvt_blk, nvt_idx);
 
 if (qaddr_base) {
-monitor_printf(mon, " eq:@%08"PRIx64"% 6d/%5d ^%d",
-   qaddr_base, qindex, qentries, qgen);
+g_string_append_printf(buf, " eq:@%08"PRIx64"% 6d/%5d ^%d",
+   qaddr_base, qindex, qent

[PATCH 19/26] hw/ppc: Avoid using Monitor in xive2_end_queue_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/xive2_regs.h |  2 +-
 hw/intc/xive2.c | 19 ---
 2 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h
index 37f572ed6d..4d32703c26 100644
--- a/include/hw/ppc/xive2_regs.h
+++ b/include/hw/ppc/xive2_regs.h
@@ -132,7 +132,7 @@ static inline uint64_t xive2_end_qaddr(Xive2End *end)
 
 void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, Monitor *mon);
 void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width,
-Monitor *mon);
+GString *buf);
 void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t end_idx,
   GString *buf);
 
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index 23356acff7..6a15b4d1e4 100644
--- a/hw/intc/xive2.c
+++ b/hw/intc/xive2.c
@@ -11,6 +11,7 @@
 #include "qemu/log.h"
 #include "qemu/module.h"
 #include "qapi/error.h"
+#include "qapi/type-helpers.h"
 #include "target/ppc/cpu.h"
 #include "sysemu/cpus.h"
 #include "sysemu/dma.h"
@@ -40,8 +41,7 @@ void xive2_eas_pic_print_info(Xive2Eas *eas, uint32_t lisn, 
GString *buf)
(uint32_t) xive_get_field64(EAS2_END_DATA, eas->w));
 }
 
-void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width,
-Monitor *mon)
+void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width, GString 
*buf)
 {
 uint64_t qaddr_base = xive2_end_qaddr(end);
 uint32_t qsize = xive_get_field32(END2_W3_QSIZE, end->w3);
@@ -52,7 +52,7 @@ void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t 
width,
 /*
  * print out the [ (qindex - (width - 1)) .. (qindex + 1)] window
  */
-monitor_printf(mon, " [ ");
+g_string_append_printf(buf, " [ ");
 qindex = (qindex - (width - 1)) & (qentries - 1);
 for (i = 0; i < width; i++) {
 uint64_t qaddr = qaddr_base + (qindex << 2);
@@ -64,11 +64,11 @@ void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t 
width,
   HWADDR_PRIx "\n", qaddr);
 return;
 }
-monitor_printf(mon, "%s%08x ", i == width - 1 ? "^" : "",
-   be32_to_cpu(qdata));
+g_string_append_printf(buf, "%s%08x ", i == width - 1 ? "^" : "",
+   be32_to_cpu(qdata));
 qindex = (qindex + 1) & (qentries - 1);
 }
-monitor_printf(mon, "]");
+g_string_append_printf(buf, "]");
 }
 
 void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, Monitor *mon)
@@ -108,9 +108,14 @@ void xive2_end_pic_print_info(Xive2End *end, uint32_t 
end_idx, Monitor *mon)
priority, nvp_blk, nvp_idx);
 
 if (qaddr_base) {
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
+
 monitor_printf(mon, " eq:@%08"PRIx64"% 6d/%5d ^%d",
qaddr_base, qindex, qentries, qgen);
-xive2_end_queue_pic_print_info(end, 6, mon);
+xive2_end_queue_pic_print_info(end, 6, buf);
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 }
 monitor_printf(mon, "\n");
 }
-- 
2.41.0

[PATCH 20/26] hw/ppc: Avoid using Monitor in xive2_end_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/xive2_regs.h |  2 +-
 hw/intc/pnv_xive2.c |  8 +++
 hw/intc/xive2.c | 48 -
 3 files changed, 26 insertions(+), 32 deletions(-)

diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h
index 4d32703c26..4e5e17cd89 100644
--- a/include/hw/ppc/xive2_regs.h
+++ b/include/hw/ppc/xive2_regs.h
@@ -130,7 +130,7 @@ static inline uint64_t xive2_end_qaddr(Xive2End *end)
 (be32_to_cpu(end->w3) & END2_W3_EQ_ADDR_LO);
 }
 
-void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, Monitor *mon);
+void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, GString *buf);
 void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width,
 GString *buf);
 void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t end_idx,
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index 9535f60828..52505fd1a4 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -2141,14 +2141,14 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor 
*mon)
 while (!xive2_router_get_end(xrtr, blk, i, &end)) {
 xive2_end_eas_pic_print_info(&end, i++, buf);
 }
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 
-monitor_printf(mon, "XIVE[%x] #%d ENDT\n", chip_id, blk);
+g_string_append_printf(buf, "XIVE[%x] #%d ENDT\n", chip_id, blk);
 i = 0;
 while (!xive2_router_get_end(xrtr, blk, i, &end)) {
-xive2_end_pic_print_info(&end, i++, mon);
+xive2_end_pic_print_info(&end, i++, buf);
 }
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
 monitor_printf(mon, "XIVE[%x] #%d NVPT %08x .. %08x\n", chip_id, blk,
0, XIVE2_NVP_COUNT - 1);
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index 6a15b4d1e4..3e7238c663 100644
--- a/hw/intc/xive2.c
+++ b/hw/intc/xive2.c
@@ -11,12 +11,10 @@
 #include "qemu/log.h"
 #include "qemu/module.h"
 #include "qapi/error.h"
-#include "qapi/type-helpers.h"
 #include "target/ppc/cpu.h"
 #include "sysemu/cpus.h"
 #include "sysemu/dma.h"
 #include "hw/qdev-properties.h"
-#include "monitor/monitor.h"
 #include "hw/ppc/xive.h"
 #include "hw/ppc/xive2.h"
 #include "hw/ppc/xive2_regs.h"
@@ -71,7 +69,7 @@ void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t 
width, GString *buf)
 g_string_append_printf(buf, "]");
 }
 
-void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, Monitor *mon)
+void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, GString *buf)
 {
 uint64_t qaddr_base = xive2_end_qaddr(end);
 uint32_t qindex = xive_get_field32(END2_W1_PAGE_OFF, end->w1);
@@ -90,34 +88,30 @@ void xive2_end_pic_print_info(Xive2End *end, uint32_t 
end_idx, Monitor *mon)
 
 pq = xive_get_field32(END2_W1_ESn, end->w1);
 
-monitor_printf(mon,
-   "  %08x %c%c %c%c%c%c%c%c%c%c%c%c prio:%d nvp:%02x/%04x",
-   end_idx,
-   pq & XIVE_ESB_VAL_P ? 'P' : '-',
-   pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
-   xive2_end_is_valid(end)? 'v' : '-',
-   xive2_end_is_enqueue(end)  ? 'q' : '-',
-   xive2_end_is_notify(end)   ? 'n' : '-',
-   xive2_end_is_backlog(end)  ? 'b' : '-',
-   xive2_end_is_escalate(end) ? 'e' : '-',
-   xive2_end_is_escalate_end(end) ? 'N' : '-',
-   xive2_end_is_uncond_escalation(end)   ? 'u' : '-',
-   xive2_end_is_silent_escalation(end)   ? 's' : '-',
-   xive2_end_is_firmware1(end)   ? 'f' : '-',
-   xive2_end_is_firmware2(end)   ? 'F' : '-',
-   priority, nvp_blk, nvp_idx);
+g_string_append_printf(buf,
+   "  %08x %c%c %c%c%c%c%c%c%c%c%c%c "
+   "prio:%d nvp:%02x/%04x",
+   end_idx,
+   pq & XIVE_ESB_VAL_P ? 'P' : '-',
+   pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
+   xive2_end_is_valid(end)? 'v' : '-',
+   xive2_end_is_enqueue(end)  ? 'q' : '-',
+   xive2_end_is_notify(end)   ? 'n' : '-',
+   xive2_end_is_backlog(end)  ? 'b' : '-',
+   xive2_end_is_escalate(end) ? 'e' : '-',
+   xive2_end_is_escalate_end(end) ? 'N' : '-',
+   xive2_end_is_uncond_escalation(end)   ? 'u' : '-',
+   xive2_end_is_silent_escalation(end)   ? 's' : '-',
+   xive2_end_is_firmware1(end)   ? 'f' : '-',
+   xive2_end_is_firmware2(end)   ? 'F' : '-',
+   priority, nvp_blk, nvp_idx);
 
 if (qaddr_base)

[PATCH 16/26] hw/ppc: Avoid using Monitor in pnv_psi_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/pnv_psi.h |  2 +-
 hw/ppc/pnv.c | 10 +++---
 hw/ppc/pnv_psi.c |  9 +
 3 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h
index 2a6f715350..cf7f95a6b1 100644
--- a/include/hw/ppc/pnv_psi.h
+++ b/include/hw/ppc/pnv_psi.h
@@ -110,6 +110,6 @@ typedef enum PnvPsiIrq {
 #define PSIHB9_IRQ_PSU  13
 #define PSIHB9_NUM_IRQS 14
 
-void pnv_psi_pic_print_info(Pnv9Psi *psi, Monitor *mon);
+void pnv_psi_pic_print_info(Pnv9Psi *psi, GString *buf);
 
 #endif /* PPC_PNV_PSI_H */
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 7e6f923c7e..4a1a302a25 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -812,12 +812,11 @@ static void pnv_chip_power9_pic_print_info(PnvChip *chip, 
Monitor *mon)
 g_autoptr(HumanReadableText) info = NULL;
 
 pnv_xive_pic_print_info(&chip9->xive, buf);
+pnv_psi_pic_print_info(&chip9->psi, buf);
 
 info = human_readable_text_from_str(buf);
 monitor_puts(mon, info->human_readable_text);
 
-pnv_psi_pic_print_info(&chip9->psi, mon);
-
 object_child_foreach_recursive(OBJECT(chip),
  pnv_chip_power9_pic_print_info_child, mon);
 }
@@ -862,9 +861,14 @@ static void pnv_ipmi_bt_init(ISABus *bus, IPMIBmc *bmc, 
uint32_t irq)
 static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon)
 {
 Pnv10Chip *chip10 = PNV10_CHIP(chip);
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
 
 pnv_xive2_pic_print_info(&chip10->xive, mon);
-pnv_psi_pic_print_info(&chip10->psi, mon);
+
+pnv_psi_pic_print_info(&chip10->psi, buf);
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
 object_child_foreach_recursive(OBJECT(chip),
  pnv_chip_power9_pic_print_info_child, mon);
diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
index 922ac07b2f..18cc76a7e4 100644
--- a/hw/ppc/pnv_psi.c
+++ b/hw/ppc/pnv_psi.c
@@ -25,8 +25,6 @@
 #include "qemu/module.h"
 #include "sysemu/reset.h"
 #include "qapi/error.h"
-#include "qapi/type-helpers.h"
-#include "monitor/monitor.h"
 
 
 #include "hw/ppc/fdt.h"
@@ -978,11 +976,9 @@ static void pnv_psi_register_types(void)
 
 type_init(pnv_psi_register_types);
 
-void pnv_psi_pic_print_info(Pnv9Psi *psi9, Monitor *mon)
+void pnv_psi_pic_print_info(Pnv9Psi *psi9, GString *buf)
 {
 PnvPsi *psi = PNV_PSI(psi9);
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 uint32_t offset =
 (psi->regs[PSIHB_REG(PSIHB9_IVT_OFFSET)] >> PSIHB9_IVT_OFF_SHIFT);
@@ -990,7 +986,4 @@ void pnv_psi_pic_print_info(Pnv9Psi *psi9, Monitor *mon)
 g_string_append_printf(buf, "PSIHB Source %08x .. %08x\n",
offset, offset + psi9->source.nr_irqs - 1);
 xive_source_pic_print_info(&psi9->source, offset, buf);
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
-- 
2.41.0

[PATCH 13/26] hw/ppc: Avoid using Monitor in xive_end_eas_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/xive_regs.h |  2 +-
 hw/intc/pnv_xive.c |  9 +
 hw/intc/xive.c | 22 ++
 3 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h
index 5e6f9d1be4..b9db7abc2e 100644
--- a/include/hw/ppc/xive_regs.h
+++ b/include/hw/ppc/xive_regs.h
@@ -263,7 +263,7 @@ static inline uint64_t xive_end_qaddr(XiveEND *end)
 
 void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, GString *buf);
 void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, GString *buf);
-void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon);
+void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, GString *buf);
 
 /* Notification Virtual Target (NVT) */
 typedef struct XiveNVT {
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index 1dddbf7827..a0c6dee5db 100644
--- a/hw/intc/pnv_xive.c
+++ b/hw/intc/pnv_xive.c
@@ -1881,14 +1881,15 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor 
*mon)
 while (!xive_router_get_end(xrtr, blk, i, &end)) {
 xive_end_pic_print_info(&end, i++, buf);
 }
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 
-monitor_printf(mon, "XIVE[%x] #%d END Escalation EAT\n", chip_id, blk);
+g_string_append_printf(buf, "XIVE[%x] #%d END Escalation EAT\n",
+   chip_id, blk);
 i = 0;
 while (!xive_router_get_end(xrtr, blk, i, &end)) {
-xive_end_eas_pic_print_info(&end, i++, mon);
+xive_end_eas_pic_print_info(&end, i++, buf);
 }
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
 monitor_printf(mon, "XIVE[%x] #%d NVTT %08x .. %08x\n", chip_id, blk,
0, XIVE_NVT_COUNT - 1);
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index f631d7cd6e..70f11f993b 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -17,7 +17,6 @@
 #include "sysemu/reset.h"
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
-#include "monitor/monitor.h"
 #include "hw/irq.h"
 #include "hw/ppc/xive.h"
 #include "hw/ppc/xive2.h"
@@ -1419,8 +1418,7 @@ static void xive_end_enqueue(XiveEND *end, uint32_t data)
 end->w1 = xive_set_field32(END_W1_PAGE_OFF, end->w1, qindex);
 }
 
-void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx,
-   Monitor *mon)
+void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, GString *buf)
 {
 XiveEAS *eas = (XiveEAS *) &end->w4;
 uint8_t pq;
@@ -1431,15 +1429,15 @@ void xive_end_eas_pic_print_info(XiveEND *end, uint32_t 
end_idx,
 
 pq = xive_get_field32(END_W1_ESe, end->w1);
 
-monitor_printf(mon, "  %08x %c%c %c%c end:%02x/%04x data:%08x\n",
-   end_idx,
-   pq & XIVE_ESB_VAL_P ? 'P' : '-',
-   pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
-   xive_eas_is_valid(eas) ? 'V' : ' ',
-   xive_eas_is_masked(eas) ? 'M' : ' ',
-   (uint8_t)  xive_get_field64(EAS_END_BLOCK, eas->w),
-   (uint32_t) xive_get_field64(EAS_END_INDEX, eas->w),
-   (uint32_t) xive_get_field64(EAS_END_DATA, eas->w));
+g_string_append_printf(buf, "  %08x %c%c %c%c end:%02x/%04x data:%08x\n",
+   end_idx,
+   pq & XIVE_ESB_VAL_P ? 'P' : '-',
+   pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
+   xive_eas_is_valid(eas) ? 'V' : ' ',
+   xive_eas_is_masked(eas) ? 'M' : ' ',
+   (uint8_t)  xive_get_field64(EAS_END_BLOCK, eas->w),
+   (uint32_t) xive_get_field64(EAS_END_INDEX, eas->w),
+   (uint32_t) xive_get_field64(EAS_END_DATA, eas->w));
 }
 
 /*
-- 
2.41.0

[PATCH 08/26] hw/ppc: Avoid using Monitor in spapr_xive_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/intc/spapr_xive.c | 28 
 1 file changed, 12 insertions(+), 16 deletions(-)

diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index d571645e9e..9d0d5948ff 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -157,7 +157,7 @@ static void spapr_xive_end_pic_print_info(SpaprXive *xive, 
XiveEND *end,
 #define spapr_xive_in_kernel(xive) \
 (kvm_irqchip_in_kernel() && (xive)->fd != -1)
 
-static void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon)
+static void spapr_xive_pic_print_info(SpaprXive *xive, GString *buf)
 {
 XiveSource *xsrc = &xive->source;
 int i;
@@ -172,7 +172,7 @@ static void spapr_xive_pic_print_info(SpaprXive *xive, 
Monitor *mon)
 }
 }
 
-monitor_printf(mon, "  LISN PQEISN CPU/PRIO EQ\n");
+g_string_append_printf(buf, "  LISN PQEISN CPU/PRIO EQ\n");
 
 for (i = 0; i < xive->nr_irqs; i++) {
 uint8_t pq = xive_source_esb_get(xsrc, i);
@@ -182,19 +182,17 @@ static void spapr_xive_pic_print_info(SpaprXive *xive, 
Monitor *mon)
 continue;
 }
 
-monitor_printf(mon, "  %08x %s %c%c%c %s %08x ", i,
-   xive_source_irq_is_lsi(xsrc, i) ? "LSI" : "MSI",
-   pq & XIVE_ESB_VAL_P ? 'P' : '-',
-   pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
-   xive_source_is_asserted(xsrc, i) ? 'A' : ' ',
-   xive_eas_is_masked(eas) ? "M" : " ",
-   (int) xive_get_field64(EAS_END_DATA, eas->w));
+g_string_append_printf(buf, "  %08x %s %c%c%c %s %08x ", i,
+   xive_source_irq_is_lsi(xsrc, i) ? "LSI" : "MSI",
+   pq & XIVE_ESB_VAL_P ? 'P' : '-',
+   pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
+   xive_source_is_asserted(xsrc, i) ? 'A' : ' ',
+   xive_eas_is_masked(eas) ? "M" : " ",
+   (int) xive_get_field64(EAS_END_DATA, eas->w));
 
 if (!xive_eas_is_masked(eas)) {
 uint32_t end_idx = xive_get_field64(EAS_END_INDEX, eas->w);
 XiveEND *end;
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 assert(end_idx < xive->nr_ends);
 end = &xive->endt[end_idx];
@@ -203,10 +201,8 @@ static void spapr_xive_pic_print_info(SpaprXive *xive, 
Monitor *mon)
 spapr_xive_end_pic_print_info(xive, end, buf);
 }
 
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
-monitor_printf(mon, "\n");
+g_string_append_c(buf, '\n');
 }
 }
 
@@ -717,10 +713,10 @@ static void 
spapr_xive_print_info(SpaprInterruptController *intc, Monitor *mon)
 
 xive_tctx_pic_print_info(spapr_cpu_state(cpu)->tctx, buf);
 }
+spapr_xive_pic_print_info(xive, buf);
+
 info = human_readable_text_from_str(buf);
 monitor_puts(mon, info->human_readable_text);
-
-spapr_xive_pic_print_info(xive, mon);
 }
 
 static void spapr_xive_dt(SpaprInterruptController *intc, uint32_t nr_servers,
-- 
2.41.0

[PATCH 03/26] hw/ppc: Avoid using Monitor in xive_tctx_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/xive.h |  2 +-
 hw/intc/spapr_xive.c  |  7 ++-
 hw/intc/xive.c| 11 ++-
 hw/ppc/pnv.c  | 16 ++--
 4 files changed, 27 insertions(+), 9 deletions(-)

diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index f120874e0f..bc1cbad8a8 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -528,7 +528,7 @@ void xive_tctx_tm_write(XivePresenter *xptr, XiveTCTX 
*tctx, hwaddr offset,
 uint64_t xive_tctx_tm_read(XivePresenter *xptr, XiveTCTX *tctx, hwaddr offset,
unsigned size);
 
-void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon);
+void xive_tctx_pic_print_info(XiveTCTX *tctx, GString *buf);
 Object *xive_tctx_create(Object *cpu, XivePresenter *xptr, Error **errp);
 void xive_tctx_reset(XiveTCTX *tctx);
 void xive_tctx_destroy(XiveTCTX *tctx);
diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index d7e56bfb20..b7c12aa432 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -11,6 +11,7 @@
 #include "qemu/log.h"
 #include "qemu/module.h"
 #include "qapi/error.h"
+#include "qapi/type-helpers.h"
 #include "qemu/error-report.h"
 #include "target/ppc/cpu.h"
 #include "sysemu/cpus.h"
@@ -703,12 +704,16 @@ static void 
spapr_xive_print_info(SpaprInterruptController *intc, Monitor *mon)
 {
 SpaprXive *xive = SPAPR_XIVE(intc);
 CPUState *cs;
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
 
 CPU_FOREACH(cs) {
 PowerPCCPU *cpu = POWERPC_CPU(cs);
 
-xive_tctx_pic_print_info(spapr_cpu_state(cpu)->tctx, mon);
+xive_tctx_pic_print_info(spapr_cpu_state(cpu)->tctx, buf);
 }
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
 spapr_xive_pic_print_info(xive, mon);
 }
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 057b308ae9..a0d7e7ca67 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -669,7 +669,7 @@ static const char * const xive_tctx_ring_names[] = {
  xpc->in_kernel ? xpc->in_kernel(xptr) : false; \
  }))
 
-void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon)
+void xive_tctx_pic_print_info(XiveTCTX *tctx, GString *buf)
 {
 int cpu_index;
 int i;
@@ -693,13 +693,14 @@ void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor 
*mon)
 }
 }
 
-monitor_printf(mon, "CPU[%04x]:   QW   NSR CPPR IPB LSMFB ACK# INC AGE 
PIPR"
-   "  W2\n", cpu_index);
+g_string_append_printf(buf, "CPU[%04x]:   "
+   "QW   NSR CPPR IPB LSMFB ACK# INC AGE PIPR  W2\n",
+   cpu_index);
 
 for (i = 0; i < XIVE_TM_RING_COUNT; i++) {
 char *s = xive_tctx_ring_print(&tctx->regs[i * XIVE_TM_RING_SIZE]);
-monitor_printf(mon, "CPU[%04x]: %4s%s\n", cpu_index,
-   xive_tctx_ring_names[i], s);
+g_string_append_printf(buf, "CPU[%04x]: %4s%s\n",
+   cpu_index, xive_tctx_ring_names[i], s);
 g_free(s);
 }
 }
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index fa23b27a2b..5854358f65 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1223,7 +1223,13 @@ static void pnv_chip_power9_intc_destroy(PnvChip *chip, 
PowerPCCPU *cpu)
 static void pnv_chip_power9_intc_print_info(PnvChip *chip, PowerPCCPU *cpu,
 Monitor *mon)
 {
-xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), mon);
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
+
+xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), buf);
+
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 }
 
 static void pnv_chip_power10_intc_create(PnvChip *chip, PowerPCCPU *cpu,
@@ -1267,7 +1273,13 @@ static void pnv_chip_power10_intc_destroy(PnvChip *chip, 
PowerPCCPU *cpu)
 static void pnv_chip_power10_intc_print_info(PnvChip *chip, PowerPCCPU *cpu,
  Monitor *mon)
 {
-xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), mon);
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
+
+xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), buf);
+
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 }
 
 /*
-- 
2.41.0

[PATCH 15/26] hw/ppc: Avoid using Monitor in pnv_xive_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/pnv_xive.h | 2 +-
 hw/intc/pnv_xive.c| 9 +
 hw/ppc/pnv.c  | 8 +++-
 3 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h
index 9c48430ee4..7d634e469c 100644
--- a/include/hw/ppc/pnv_xive.h
+++ b/include/hw/ppc/pnv_xive.h
@@ -93,7 +93,7 @@ struct PnvXiveClass {
 DeviceRealize parent_realize;
 };
 
-void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon);
+void pnv_xive_pic_print_info(PnvXive *xive, GString *buf);
 
 /*
  * XIVE2 interrupt controller (POWER10)
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index 3ad4ac8e7d..5bacbce6a4 100644
--- a/hw/intc/pnv_xive.c
+++ b/hw/intc/pnv_xive.c
@@ -11,12 +11,10 @@
 #include "qemu/log.h"
 #include "qemu/module.h"
 #include "qapi/error.h"
-#include "qapi/type-helpers.h"
 #include "target/ppc/cpu.h"
 #include "sysemu/cpus.h"
 #include "sysemu/dma.h"
 #include "sysemu/reset.h"
-#include "monitor/monitor.h"
 #include "hw/ppc/fdt.h"
 #include "hw/ppc/pnv.h"
 #include "hw/ppc/pnv_chip.h"
@@ -1846,7 +1844,7 @@ static void xive_nvt_pic_print_info(XiveNVT *nvt, 
uint32_t nvt_idx,
xive_get_field32(NVT_W4_IPB, nvt->w4));
 }
 
-void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon)
+void pnv_xive_pic_print_info(PnvXive *xive, GString *buf)
 {
 XiveRouter *xrtr = XIVE_ROUTER(xive);
 uint8_t blk = pnv_xive_block_id(xive);
@@ -1858,8 +1856,6 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon)
 XiveNVT nvt;
 int i;
 uint64_t xive_nvt_per_subpage;
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 g_string_append_printf(buf, "XIVE[%x] #%d Source %08x .. %08x\n",
chip_id, blk, srcno0, srcno0 + nr_ipis - 1);
@@ -1897,9 +1893,6 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon)
 xive_nvt_pic_print_info(&nvt, i++, buf);
 }
 }
-
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 }
 
 static void pnv_xive_reset(void *dev)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index df187c5180..7e6f923c7e 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -808,8 +808,14 @@ static int pnv_chip_power9_pic_print_info_child(Object 
*child, void *opaque)
 static void pnv_chip_power9_pic_print_info(PnvChip *chip, Monitor *mon)
 {
 Pnv9Chip *chip9 = PNV9_CHIP(chip);
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
+
+pnv_xive_pic_print_info(&chip9->xive, buf);
+
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
-pnv_xive_pic_print_info(&chip9->xive, mon);
 pnv_psi_pic_print_info(&chip9->psi, mon);
 
 object_child_foreach_recursive(OBJECT(chip),
-- 
2.41.0

[PATCH 04/26] hw/ppc: Avoid using Monitor in ics_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/xics.h |  2 +-
 hw/intc/xics.c| 17 -
 hw/intc/xics_spapr.c  |  4 ++--
 hw/ppc/pnv.c  | 15 ---
 4 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 1116aa6953..e94d53405f 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -172,7 +172,7 @@ static inline bool ics_irq_free(ICSState *ics, uint32_t 
srcno)
 
 void ics_set_irq_type(ICSState *ics, int srcno, bool lsi);
 void icp_pic_print_info(ICPState *icp, GString *buf);
-void ics_pic_print_info(ICSState *ics, Monitor *mon);
+void ics_pic_print_info(ICSState *ics, GString *buf);
 
 void ics_resend(ICSState *ics);
 void icp_resend(ICPState *ss);
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index 039e10a0e4..6f4d5271ea 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -35,7 +35,6 @@
 #include "qemu/module.h"
 #include "qapi/visitor.h"
 #include "migration/vmstate.h"
-#include "monitor/monitor.h"
 #include "hw/intc/intc.h"
 #include "hw/irq.h"
 #include "sysemu/kvm.h"
@@ -68,12 +67,12 @@ void icp_pic_print_info(ICPState *icp, GString *buf)
icp->pending_priority, icp->mfrr);
 }
 
-void ics_pic_print_info(ICSState *ics, Monitor *mon)
+void ics_pic_print_info(ICSState *ics, GString *buf)
 {
 uint32_t i;
 
-monitor_printf(mon, "ICS %4x..%4x %p\n",
-   ics->offset, ics->offset + ics->nr_irqs - 1, ics);
+g_string_append_printf(buf, "ICS %4x..%4x %p\n",
+   ics->offset, ics->offset + ics->nr_irqs - 1, ics);
 
 if (!ics->irqs) {
 return;
@@ -89,11 +88,11 @@ void ics_pic_print_info(ICSState *ics, Monitor *mon)
 if (!(irq->flags & XICS_FLAGS_IRQ_MASK)) {
 continue;
 }
-monitor_printf(mon, "  %4x %s %02x %02x\n",
-   ics->offset + i,
-   (irq->flags & XICS_FLAGS_IRQ_LSI) ?
-   "LSI" : "MSI",
-   irq->priority, irq->status);
+g_string_append_printf(buf, "  %4x %s %02x %02x\n",
+   ics->offset + i,
+   (irq->flags & XICS_FLAGS_IRQ_LSI) ?
+   "LSI" : "MSI",
+   irq->priority, irq->status);
 }
 }
 
diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c
index bab9d88218..1926373ebd 100644
--- a/hw/intc/xics_spapr.c
+++ b/hw/intc/xics_spapr.c
@@ -409,10 +409,10 @@ static void 
xics_spapr_print_info(SpaprInterruptController *intc, Monitor *mon)
 
 icp_pic_print_info(spapr_cpu_state(cpu)->icp, buf);
 }
+ics_pic_print_info(ics, buf);
+
 info = human_readable_text_from_str(buf);
 monitor_puts(mon, info->human_readable_text);
-
-ics_pic_print_info(ics, mon);
 }
 
 static int xics_spapr_post_load(SpaprInterruptController *intc, int version_id)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 5854358f65..3eaf674efa 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -770,20 +770,21 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, 
Monitor *mon)
 Pnv8Chip *chip8 = PNV8_CHIP(chip);
 int i;
 
-ics_pic_print_info(&chip8->psi.ics, mon);
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
+
+ics_pic_print_info(&chip8->psi.ics, buf);
 
 for (i = 0; i < chip8->num_phbs; i++) {
 PnvPHB *phb = chip8->phbs[i];
 PnvPHB3 *phb3 = PNV_PHB3(phb->backend);
-g_autoptr(GString) buf = g_string_new("");
-g_autoptr(HumanReadableText) info = NULL;
 
 pnv_phb3_msi_pic_print_info(&phb3->msis, buf);
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
-
-ics_pic_print_info(&phb3->lsis, mon);
+ics_pic_print_info(&phb3->lsis, buf);
 }
+
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 }
 
 static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque)
-- 
2.41.0

[PATCH 11/26] hw/ppc: Avoid using Monitor in xive_eas_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/xive_regs.h |  2 +-
 hw/intc/pnv_xive.c | 10 +-
 hw/intc/xive.c | 12 ++--
 3 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h
index 51e9a2152e..dd4a76bcf0 100644
--- a/include/hw/ppc/xive_regs.h
+++ b/include/hw/ppc/xive_regs.h
@@ -167,7 +167,7 @@ typedef struct XiveEAS {
 #define xive_eas_is_valid(eas)   (be64_to_cpu((eas)->w) & EAS_VALID)
 #define xive_eas_is_masked(eas)  (be64_to_cpu((eas)->w) & EAS_MASKED)
 
-void xive_eas_pic_print_info(XiveEAS *eas, uint32_t lisn, Monitor *mon);
+void xive_eas_pic_print_info(XiveEAS *eas, uint32_t lisn, GString *buf);
 
 static inline uint64_t xive_get_field64(uint64_t mask, uint64_t word)
 {
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index 520d7e0acd..c377823522 100644
--- a/hw/intc/pnv_xive.c
+++ b/hw/intc/pnv_xive.c
@@ -1864,19 +1864,19 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor 
*mon)
 g_string_append_printf(buf, "XIVE[%x] #%d Source %08x .. %08x\n",
chip_id, blk, srcno0, srcno0 + nr_ipis - 1);
 xive_source_pic_print_info(&xive->ipi_source, srcno0, buf);
-info = human_readable_text_from_str(buf);
-monitor_puts(mon, info->human_readable_text);
 
-monitor_printf(mon, "XIVE[%x] #%d EAT %08x .. %08x\n", chip_id, blk,
-   srcno0, srcno0 + nr_ipis - 1);
+g_string_append_printf(buf, "XIVE[%x] #%d EAT %08x .. %08x\n",
+   chip_id, blk, srcno0, srcno0 + nr_ipis - 1);
 for (i = 0; i < nr_ipis; i++) {
 if (xive_router_get_eas(xrtr, blk, i, &eas)) {
 break;
 }
 if (!xive_eas_is_masked(&eas)) {
-xive_eas_pic_print_info(&eas, i, mon);
+xive_eas_pic_print_info(&eas, i, buf);
 }
 }
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
 monitor_printf(mon, "XIVE[%x] #%d ENDT\n", chip_id, blk);
 i = 0;
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 1adb0439c5..b2203b721b 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -1921,17 +1921,17 @@ static const TypeInfo xive_router_info = {
 }
 };
 
-void xive_eas_pic_print_info(XiveEAS *eas, uint32_t lisn, Monitor *mon)
+void xive_eas_pic_print_info(XiveEAS *eas, uint32_t lisn, GString *buf)
 {
 if (!xive_eas_is_valid(eas)) {
 return;
 }
 
-monitor_printf(mon, "  %08x %s end:%02x/%04x data:%08x\n",
-   lisn, xive_eas_is_masked(eas) ? "M" : " ",
-   (uint8_t)  xive_get_field64(EAS_END_BLOCK, eas->w),
-   (uint32_t) xive_get_field64(EAS_END_INDEX, eas->w),
-   (uint32_t) xive_get_field64(EAS_END_DATA, eas->w));
+g_string_append_printf(buf, "  %08x %s end:%02x/%04x data:%08x\n",
+   lisn, xive_eas_is_masked(eas) ? "M" : " ",
+   (uint8_t)  xive_get_field64(EAS_END_BLOCK, eas->w),
+   (uint32_t) xive_get_field64(EAS_END_INDEX, eas->w),
+   (uint32_t) xive_get_field64(EAS_END_DATA, eas->w));
 }
 
 /*
-- 
2.41.0

[PATCH 00/26] hw/ppc: Prefer HumanReadableText over Monitor

[Philippe Mathieu-Daudé]

Hi,

This series remove uses of Monitor in hw/ppc/,
replacing by the more generic HumanReadableText.
Care is taken to keep the commit bisectables by
updating functions one by one, also easing review.

For rationale see previous series from Daniel:
https://lore.kernel.org/qemu-devel/20211028155457.967291-1-berra...@redhat.com/

Regards,

Phil.

Philippe Mathieu-Daudé (26):
  hw/ppc: Avoid using Monitor in pnv_phb3_msi_pic_print_info()
  hw/ppc: Avoid using Monitor in icp_pic_print_info()
  hw/ppc: Avoid using Monitor in xive_tctx_pic_print_info()
  hw/ppc: Avoid using Monitor in ics_pic_print_info()
  hw/ppc: Avoid using Monitor in PnvChipClass::intc_print_info()
  hw/ppc: Avoid using Monitor in xive_end_queue_pic_print_info()
  hw/ppc: Avoid using Monitor in spapr_xive_end_pic_print_info()
  hw/ppc: Avoid using Monitor in spapr_xive_pic_print_info()
  hw/ppc: Avoid using Monitor in xive_source_pic_print_info()
  hw/ppc: Avoid using Monitor in pnv_phb4_pic_print_info()
  hw/ppc: Avoid using Monitor in xive_eas_pic_print_info()
  hw/ppc: Avoid using Monitor in xive_end_pic_print_info()
  hw/ppc: Avoid using Monitor in xive_end_eas_pic_print_info()
  hw/ppc: Avoid using Monitor in xive_nvt_pic_print_info()
  hw/ppc: Avoid using Monitor in pnv_xive_pic_print_info()
  hw/ppc: Avoid using Monitor in pnv_psi_pic_print_info()
  hw/ppc: Avoid using Monitor in xive2_eas_pic_print_info()
  hw/ppc: Avoid using Monitor in xive2_end_eas_pic_print_info()
  hw/ppc: Avoid using Monitor in xive2_end_queue_pic_print_info()
  hw/ppc: Avoid using Monitor in xive2_end_pic_print_info()
  hw/ppc: Avoid using Monitor in xive2_nvp_pic_print_info()
  hw/ppc: Avoid using Monitor in pnv_xive2_pic_print_info()
  hw/ppc: Avoid using Monitor in
SpaprInterruptControllerClass::print_info()
  hw/ppc: Avoid using Monitor in spapr_irq_print_info()
  hw/ppc: Avoid using Monitor in pnv_chip_power9_pic_print_info_child()
  hw/ppc: Avoid using Monitor in pic_print_info()

 include/hw/pci-host/pnv_phb3.h |   2 +-
 include/hw/pci-host/pnv_phb4.h |   2 +-
 include/hw/ppc/pnv_chip.h  |   4 +-
 include/hw/ppc/pnv_psi.h   |   2 +-
 include/hw/ppc/pnv_xive.h  |   4 +-
 include/hw/ppc/spapr_irq.h |   4 +-
 include/hw/ppc/xics.h  |   4 +-
 include/hw/ppc/xive.h  |   4 +-
 include/hw/ppc/xive2_regs.h|   8 +--
 include/hw/ppc/xive_regs.h |   8 +--
 hw/intc/pnv_xive.c |  38 ++--
 hw/intc/pnv_xive2.c|  48 +++
 hw/intc/spapr_xive.c   |  41 ++---
 hw/intc/xics.c |  25 
 hw/intc/xics_spapr.c   |   7 +--
 hw/intc/xive.c | 108 -
 hw/intc/xive2.c|  87 +-
 hw/pci-host/pnv_phb3_msi.c |  21 +++
 hw/pci-host/pnv_phb4.c |  17 +++---
 hw/ppc/pnv.c   |  52 
 hw/ppc/pnv_psi.c   |   9 ++-
 hw/ppc/spapr.c |  11 +++-
 hw/ppc/spapr_irq.c |   4 +-
 23 files changed, 256 insertions(+), 254 deletions(-)

-- 
2.41.0

[PATCH 06/26] hw/ppc: Avoid using Monitor in xive_end_queue_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/xive_regs.h |  2 +-
 hw/intc/spapr_xive.c   |  7 ++-
 hw/intc/xive.c | 17 +++--
 3 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h
index 4a3c9badd3..51e9a2152e 100644
--- a/include/hw/ppc/xive_regs.h
+++ b/include/hw/ppc/xive_regs.h
@@ -262,7 +262,7 @@ static inline uint64_t xive_end_qaddr(XiveEND *end)
 }
 
 void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon);
-void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, Monitor *mon);
+void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, GString *buf);
 void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon);
 
 /* Notification Virtual Target (NVT) */
diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index b7c12aa432..3357f6325f 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -142,12 +142,17 @@ static void spapr_xive_end_pic_print_info(SpaprXive 
*xive, XiveEND *end,
 uint32_t qentries = 1 << (qsize + 10);
 uint32_t nvt = xive_get_field32(END_W6_NVT_INDEX, end->w6);
 uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7);
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
 
 monitor_printf(mon, "%3d/%d % 6d/%5d @%"PRIx64" ^%d",
spapr_xive_nvt_to_target(0, nvt),
priority, qindex, qentries, qaddr_base, qgen);
 
-xive_end_queue_pic_print_info(end, 6, mon);
+xive_end_queue_pic_print_info(end, 6, buf);
+
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 }
 
 /*
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index a0d7e7ca67..260a94e2ca 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -11,6 +11,7 @@
 #include "qemu/log.h"
 #include "qemu/module.h"
 #include "qapi/error.h"
+#include "qapi/type-helpers.h"
 #include "target/ppc/cpu.h"
 #include "sysemu/cpus.h"
 #include "sysemu/dma.h"
@@ -1323,7 +1324,7 @@ static const TypeInfo xive_source_info = {
  * XiveEND helpers
  */
 
-void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, Monitor *mon)
+void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, GString *buf)
 {
 uint64_t qaddr_base = xive_end_qaddr(end);
 uint32_t qsize = xive_get_field32(END_W0_QSIZE, end->w0);
@@ -1334,7 +1335,7 @@ void xive_end_queue_pic_print_info(XiveEND *end, uint32_t 
width, Monitor *mon)
 /*
  * print out the [ (qindex - (width - 1)) .. (qindex + 1)] window
  */
-monitor_printf(mon, " [ ");
+g_string_append_printf(buf, " [ ");
 qindex = (qindex - (width - 1)) & (qentries - 1);
 for (i = 0; i < width; i++) {
 uint64_t qaddr = qaddr_base + (qindex << 2);
@@ -1346,11 +1347,11 @@ void xive_end_queue_pic_print_info(XiveEND *end, 
uint32_t width, Monitor *mon)
   HWADDR_PRIx "\n", qaddr);
 return;
 }
-monitor_printf(mon, "%s%08x ", i == width - 1 ? "^" : "",
-   be32_to_cpu(qdata));
+g_string_append_printf(buf, "%s%08x ", i == width - 1 ? "^" : "",
+   be32_to_cpu(qdata));
 qindex = (qindex + 1) & (qentries - 1);
 }
-monitor_printf(mon, "]");
+g_string_append_c(buf, ']');
 }
 
 void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon)
@@ -1365,6 +1366,8 @@ void xive_end_pic_print_info(XiveEND *end, uint32_t 
end_idx, Monitor *mon)
 uint32_t nvt_idx = xive_get_field32(END_W6_NVT_INDEX, end->w6);
 uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7);
 uint8_t pq;
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
 
 if (!xive_end_is_valid(end)) {
 return;
@@ -1389,8 +1392,10 @@ void xive_end_pic_print_info(XiveEND *end, uint32_t 
end_idx, Monitor *mon)
 if (qaddr_base) {
 monitor_printf(mon, " eq:@%08"PRIx64"% 6d/%5d ^%d",
qaddr_base, qindex, qentries, qgen);
-xive_end_queue_pic_print_info(end, 6, mon);
+xive_end_queue_pic_print_info(end, 6, buf);
 }
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 monitor_printf(mon, "\n");
 }
 
-- 
2.41.0

[PATCH 01/26] hw/ppc: Avoid using Monitor in pnv_phb3_msi_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/pci-host/pnv_phb3.h |  2 +-
 hw/pci-host/pnv_phb3_msi.c | 21 ++---
 hw/ppc/pnv.c   |  8 +++-
 3 files changed, 18 insertions(+), 13 deletions(-)

diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h
index d62b3091ac..24ca3dddaa 100644
--- a/include/hw/pci-host/pnv_phb3.h
+++ b/include/hw/pci-host/pnv_phb3.h
@@ -40,7 +40,7 @@ void pnv_phb3_msi_update_config(Phb3MsiState *msis, uint32_t 
base,
 void pnv_phb3_msi_send(Phb3MsiState *msis, uint64_t addr, uint16_t data,
int32_t dev_pe);
 void pnv_phb3_msi_ffi(Phb3MsiState *msis, uint64_t val);
-void pnv_phb3_msi_pic_print_info(Phb3MsiState *msis, Monitor *mon);
+void pnv_phb3_msi_pic_print_info(Phb3MsiState *msis, GString *buf);
 
 
 /*
diff --git a/hw/pci-host/pnv_phb3_msi.c b/hw/pci-host/pnv_phb3_msi.c
index a6d827f903..77d673da54 100644
--- a/hw/pci-host/pnv_phb3_msi.c
+++ b/hw/pci-host/pnv_phb3_msi.c
@@ -13,7 +13,6 @@
 #include "hw/pci-host/pnv_phb3.h"
 #include "hw/ppc/pnv.h"
 #include "hw/pci/msi.h"
-#include "monitor/monitor.h"
 #include "hw/irq.h"
 #include "hw/qdev-properties.h"
 #include "sysemu/reset.h"
@@ -316,13 +315,13 @@ static void pnv_phb3_msi_register_types(void)
 
 type_init(pnv_phb3_msi_register_types);
 
-void pnv_phb3_msi_pic_print_info(Phb3MsiState *msi, Monitor *mon)
+void pnv_phb3_msi_pic_print_info(Phb3MsiState *msi, GString *buf)
 {
 ICSState *ics = ICS(msi);
 int i;
 
-monitor_printf(mon, "ICS %4x..%4x %p\n",
-   ics->offset, ics->offset + ics->nr_irqs - 1, ics);
+g_string_append_printf(buf, "ICS %4x..%4x %p\n",
+   ics->offset, ics->offset + ics->nr_irqs - 1, ics);
 
 for (i = 0; i < ics->nr_irqs; i++) {
 uint64_t ive;
@@ -335,12 +334,12 @@ void pnv_phb3_msi_pic_print_info(Phb3MsiState *msi, 
Monitor *mon)
 continue;
 }
 
-monitor_printf(mon, "  %4x %c%c server=%04x prio=%02x gen=%d\n",
-   ics->offset + i,
-   GETFIELD(IODA2_IVT_P, ive) ? 'P' : '-',
-   GETFIELD(IODA2_IVT_Q, ive) ? 'Q' : '-',
-   (uint32_t) GETFIELD(IODA2_IVT_SERVER, ive) >> 2,
-   (uint32_t) GETFIELD(IODA2_IVT_PRIORITY, ive),
-   (uint32_t) GETFIELD(IODA2_IVT_GEN, ive));
+g_string_append_printf(buf, "  %4x %c%c server=%04x prio=%02x 
gen=%d\n",
+   ics->offset + i,
+   GETFIELD(IODA2_IVT_P, ive) ? 'P' : '-',
+   GETFIELD(IODA2_IVT_Q, ive) ? 'Q' : '-',
+   (uint32_t) GETFIELD(IODA2_IVT_SERVER, ive) >> 2,
+   (uint32_t) GETFIELD(IODA2_IVT_PRIORITY, ive),
+   (uint32_t) GETFIELD(IODA2_IVT_GEN, ive));
 }
 }
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 6e3a5ccdec..5356a4e295 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -38,6 +38,7 @@
 #include "hw/loader.h"
 #include "hw/nmi.h"
 #include "qapi/visitor.h"
+#include "qapi/type-helpers.h"
 #include "monitor/monitor.h"
 #include "hw/intc/intc.h"
 #include "hw/ipmi/ipmi.h"
@@ -774,8 +775,13 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, 
Monitor *mon)
 for (i = 0; i < chip8->num_phbs; i++) {
 PnvPHB *phb = chip8->phbs[i];
 PnvPHB3 *phb3 = PNV_PHB3(phb->backend);
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
+
+pnv_phb3_msi_pic_print_info(&phb3->msis, buf);
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
-pnv_phb3_msi_pic_print_info(&phb3->msis, mon);
 ics_pic_print_info(&phb3->lsis, mon);
 }
 }
-- 
2.41.0

[PATCH 02/26] hw/ppc: Avoid using Monitor in icp_pic_print_info()

[Philippe Mathieu-Daudé]

Replace Monitor API by HumanReadableText one.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/ppc/xics.h | 2 +-
 hw/intc/xics.c| 8 
 hw/intc/xics_spapr.c  | 8 +++-
 hw/ppc/pnv.c  | 8 +++-
 4 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 95ead0dd7c..1116aa6953 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -171,7 +171,7 @@ static inline bool ics_irq_free(ICSState *ics, uint32_t 
srcno)
 }
 
 void ics_set_irq_type(ICSState *ics, int srcno, bool lsi);
-void icp_pic_print_info(ICPState *icp, Monitor *mon);
+void icp_pic_print_info(ICPState *icp, GString *buf);
 void ics_pic_print_info(ICSState *ics, Monitor *mon);
 
 void ics_resend(ICSState *ics);
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index 9b3b7abaea..039e10a0e4 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -42,7 +42,7 @@
 #include "sysemu/reset.h"
 #include "target/ppc/cpu.h"
 
-void icp_pic_print_info(ICPState *icp, Monitor *mon)
+void icp_pic_print_info(ICPState *icp, GString *buf)
 {
 int cpu_index;
 
@@ -63,9 +63,9 @@ void icp_pic_print_info(ICPState *icp, Monitor *mon)
 icp_synchronize_state(icp);
 }
 
-monitor_printf(mon, "CPU %d XIRR=%08x (%p) PP=%02x MFRR=%02x\n",
-   cpu_index, icp->xirr, icp->xirr_owner,
-   icp->pending_priority, icp->mfrr);
+g_string_append_printf(buf, "CPU %d XIRR=%08x (%p) PP=%02x MFRR=%02x\n",
+   cpu_index, icp->xirr, icp->xirr_owner,
+   icp->pending_priority, icp->mfrr);
 }
 
 void ics_pic_print_info(ICSState *ics, Monitor *mon)
diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c
index 37b2d99977..bab9d88218 100644
--- a/hw/intc/xics_spapr.c
+++ b/hw/intc/xics_spapr.c
@@ -34,6 +34,8 @@
 #include "hw/ppc/xics_spapr.h"
 #include "hw/ppc/fdt.h"
 #include "qapi/visitor.h"
+#include "qapi/type-helpers.h"
+#include "monitor/monitor.h"
 
 /*
  * Guest interfaces
@@ -399,12 +401,16 @@ static void 
xics_spapr_print_info(SpaprInterruptController *intc, Monitor *mon)
 {
 ICSState *ics = ICS_SPAPR(intc);
 CPUState *cs;
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
 
 CPU_FOREACH(cs) {
 PowerPCCPU *cpu = POWERPC_CPU(cs);
 
-icp_pic_print_info(spapr_cpu_state(cpu)->icp, mon);
+icp_pic_print_info(spapr_cpu_state(cpu)->icp, buf);
 }
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 
 ics_pic_print_info(ics, mon);
 }
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 5356a4e295..fa23b27a2b 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1130,7 +1130,13 @@ static void pnv_chip_power8_intc_destroy(PnvChip *chip, 
PowerPCCPU *cpu)
 static void pnv_chip_power8_intc_print_info(PnvChip *chip, PowerPCCPU *cpu,
 Monitor *mon)
 {
-icp_pic_print_info(ICP(pnv_cpu_state(cpu)->intc), mon);
+g_autoptr(GString) buf = g_string_new("");
+g_autoptr(HumanReadableText) info = NULL;
+
+icp_pic_print_info(ICP(pnv_cpu_state(cpu)->intc), buf);
+
+info = human_readable_text_from_str(buf);
+monitor_puts(mon, info->human_readable_text);
 }
 
 /*
-- 
2.41.0

Re: [PATCH] hw/arm/xilinx_zynq: Fix IRQ/FIQ routing

[Philippe Mathieu-Daudé]

On 10/6/24 07:29, Sebastian Huber wrote:

Fix the system bus interrupt line to CPU core assignment.

Signed-off-by: Sebastian Huber 
---
  hw/arm/xilinx_zynq.c | 5 +++--
  1 file changed, 3 insertions(+), 2 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 

Re: [PATCH 1/3] i386/sev: fix unreachable code coverity issue

[Markus Armbruster]

Pankaj Gupta  writes:

> Set 'finish->id_block_en' when block_size read.
>
> coverity #1546887
>
> fixes: 7b34df4426 ("i386/sev: Introduce 'sev-snp-guest' object")

Please make that

  Fixes: Coverity CID 1546887
  Fixes: 7b34df4426 ("i386/sev: Introduce 'sev-snp-guest' object")

> Signed-off-by: Pankaj Gupta 

[PATCH] hw/arm/xilinx_zynq: Fix IRQ/FIQ routing

[Sebastian Huber]

Fix the system bus interrupt line to CPU core assignment.

Signed-off-by: Sebastian Huber 
---
 hw/arm/xilinx_zynq.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 7f7a3d23fb..c79661bbc1 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -252,10 +252,11 @@ static void zynq_init(MachineState *machine)
 zynq_binfo.gic_cpu_if_addr = MPCORE_PERIPHBASE + 0x100;
 sysbus_create_varargs("l2x0", MPCORE_PERIPHBASE + 0x2000, NULL);
 for (n = 0; n < smp_cpus; n++) {
+/* See "hw/intc/arm_gic.h" for the IRQ line association */
 DeviceState *cpudev = DEVICE(zynq_machine->cpu[n]);
-sysbus_connect_irq(busdev, (2 * n) + 0,
+sysbus_connect_irq(busdev, n,
qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
-sysbus_connect_irq(busdev, (2 * n) + 1,
+sysbus_connect_irq(busdev, smp_cpus + n,
qdev_get_gpio_in(cpudev, ARM_CPU_FIQ));
 }
 
-- 
2.35.3

Re: [PATCH 0/4] hw/s390x: Alias @dump-skeys -> @dump-s390-skey and deprecate

[Markus Armbruster]

"Dr. David Alan Gilbert"  writes:

> * Markus Armbruster (arm...@redhat.com) wrote:
>> Philippe Mathieu-Daudé  writes:
>> 
>> > Hi Daniel, Dave, Markus & Thomas.
>> >
>> > On 4/6/24 06:58, Markus Armbruster wrote:
>> >> "Dr. David Alan Gilbert"  writes:
>> >>> * Daniel P. Berrangé (berra...@redhat.com) wrote:
>>  On Fri, May 31, 2024 at 06:47:45AM +0200, Thomas Huth wrote:
>> > On 30/05/2024 09.45, Philippe Mathieu-Daudé wrote:
>> >> We are trying to unify all qemu-system-FOO to a single binary.
>> >> In order to do that we need to remove QAPI target specific code.
>> >>
>> >> @dump-skeys is only available on qemu-system-s390x. This series
>> >> rename it as @dump-s390-skey, making it available on other
>> >> binaries. We take care of backward compatibility via deprecation.
>> >>
>> >> Philippe Mathieu-Daudé (4):
>> >> hw/s390x: Introduce the @dump-s390-skeys QMP command
>> >> hw/s390x: Introduce the 'dump_s390_skeys' HMP command
>> >> hw/s390x: Deprecate the HMP 'dump_skeys' command
>> >> hw/s390x: Deprecate the QMP @dump-skeys command
>> >
>> > Why do we have to rename the command? Just for the sake of it? I think
>> > renaming HMP commands is maybe ok, but breaking the API in QMP is 
>> > something
>> > you should consider twice.
>> >
>> > I'm looking at how to include this command in the new "single binary".
>> >
>> > Markus explained in an earlier series, just expanding this command as
>> > stub to targets that don't implement it is not backward compatible and
>> > breaks QMP introspection. Currently on s390x we get a result, on other
>> > targets the command doesn't exist. If we add a stubs, then other targets
>> > return something (even if it is an empty list), confusing management
>> > interface.
>> 
>> Loss of introspection precision is a concern, not a hard "no".
>> 
>> We weigh all the concerns, and pick a solution we hate the least :)
>> 
>> > So this approach use to deprecate process to include a new command
>> > which behaves differently on non-s390x targets.
>> >
>> > If we don't care for this particular case, better. However I'd still
>> > like to discuss this approach for other target-specific commands.
>> >
>> >> PRO rename: the command's tie to S390 is them immediately obvious, which
>> >> may be useful when the command becomes available in qemu-systems capable
>> >> of running other targets.
>> >>
>> >> CON rename: users need to adapt.
>> >>
>> >> What are the users?  Not libvirt, as far as I can tell.
>> >
>> > Years ago we said, "all HMP must be based on QMP".
>> 
>> In practice, it's closer to "HMP must be base on QMP when the
>> functionality does or should exist in QMP."
>> 
>> >Now we realize HMP
>> > became stable because QMP-exposed, although not consumed externally...
>> 
>> I'm afraid I didn't get this part.
>> 
>> > Does the concept of "internal QMP commands" makes sense for HMP debug
>> > ones? (Looking at a way to not expose them). We could use the "x-"
>> > prefix to not care about stable / backward compat, but what is the point
>> > of exposing to QMP commands that will never be accessed there?
>> >
>>  That was going to be my question too. Seems like its possible to simply
>>  stub out the existing command for other targets.
>> >>
>> >> That's going to happen whether we rename the commands or not.
>> >> 
>> >>> Are these commands really supposed to be stable, or are they just debug
>> >>> commands?  If they are debug, then add the x- and don't worry too much.
>> >
>> > OK.
>> >
>> >> docs/devel/qapi-code-gen.rst:
>> >>
>> >>  Names beginning with ``x-`` used to signify "experimental".  This
>> >>  convention has been replaced by special feature "unstable".
>> >>
>> >> Feature "unstable" is what makes something unstable, and is what
>> >> machines should check.
>> >
>> > What I mentioned earlier could be 'Feature "internal" or "debug"'.
>> 
>> What's the difference to "unstable"?
>
> It should be clear *why* something is marked x- - something that's
> marked 'x-' because the feature is still in development is expected to shake
> out at some point, and the interface designed so it can.
> (and at some point the developer should get a prod to be asked whethere the
> x- can be removed).
> That's different from it permenantly being x- because it's expected to
> change as the needs of the people debugging change.

When you add special feature 'unstable', the tooling insists you cover
it in the doc comment.  Review should then ensure the doc comment
explains why it is unstable.  Examples:

   # @unstable: Member @x-perf is experimental.

   # @unstable: This command is meant for debugging.

> Dave
>
>> >> An "x-" prefix may still be useful for humans.  Machines should *not*
>> >> key on the prefix.  It's unreliable anyway: InputBarrierProperties
>> >> member @x-origin is stable despite it's name.  Renames to gain or lose

Re: [PATCH 0/5] s390x: Add Full Boot Order Support

[Jared Rossi]

On 6/7/24 2:19 AM, Thomas Huth wrote:

On 06/06/2024 21.22, Jared Rossi wrote:



On 6/5/24 4:02 AM, Thomas Huth wrote:

On 29/05/2024 17.43, jro...@linux.ibm.com wrote:

From: Jared Rossi 

This patch set primarily adds support for the specification of 
multiple boot
devices, allowing for the guest to automatically use an alternative 
device on
a failed boot without needing to be reconfigured. It additionally 
provides the
ability to define the loadparm attribute on a per-device bases, 
which allows

boot devices to use different loadparm values if needed.

In brief, an IPLB is generated for each designated boot device (up 
to a maximum
of 8) and stored in guest memory immediately before BIOS. If a 
device fails to
boot, the next IPLB is retrieved and we jump back to the start of 
BIOS.


Devices can be specified using the standard qemu device tag 
"bootindex" as with
other architectures. Lower number indices are tried first, with 
"bootindex=0"

indicating the first device to try.


Is this supposed with multiple scsi-hd devices, too? I tried to boot 
a guest with two scsi disks (attached to a single virtio-scsi-ccw 
adapter) where only the second disk had a bootable installation, but 
that failed...?


 Thomas




Hi Thomas,

Yes, I would expect that to work. I tried to reproduce this using a 
non-bootable scsi disk as the first boot device and then a known-good 
bootable scsi disk as the second boot device, with one controller.  
In my instance the BIOS was not able to identify the first disk as 
bootable and so that device failed to IPL, but it did move on to the 
next disk after that, and the guest successfully IPL'd from the 
second device.


When you say it failed, do you mean the first disk failed to boot (as 
expected), but then the guest died without attempting to boot from 
the second disk?  Or did something else happen? I am either not 
understanding your configuration or I am not understanding your error.


I did this:

 $ ./qemu-system-s390x -bios pc-bios/s390-ccw/s390-ccw.img -accel kvm \
   -device virtio-scsi-ccw  -drive if=none,id=d2,file=/tmp/bad.qcow2 \
   -device scsi-hd,drive=d2,bootindex=2 \
   -drive if=none,id=d8,file=/tmp/good.qcow2 \
   -device scsi-hd,drive=d8,bootindex=3 -m 4G -nographic
 LOADPARM=[    ]
 Using virtio-scsi.
 Using guessed DASD geometry.
 Using ECKD scheme (block size   512), CDL
 No zIPL section in IPL2 record.
 zIPL load failed.

 Trying next boot device...
 LOADPARM=[    ]
 Using virtio-scsi.
 Using guessed DASD geometry.
 Using ECKD scheme (block size   512), CDL
 No zIPL section in IPL2 record.
 zIPL load failed.

So it claims to try to load from the second disk, but it fails.
If I change the "bootindex=3" of the second disk to "bootindex=1", it 
boots perfectly fine, so I'm sure that the installation on good.qcow2 
is working fine.


 Thomas



I am able to reproduce this now; I'll investigate the problem.

Re: [PATCH v13 03/13] virtio-gpu: Handle virtio_gpu_virgl_init() failure

[Akihiko Odaki]

On 2024/06/10 4:02, Dmitry Osipenko wrote:

On 6/3/24 08:44, Akihiko Odaki wrote:

On 2024/06/03 14:26, Dmitry Osipenko wrote:

On 6/2/24 08:34, Akihiko Odaki wrote:

+typedef enum {
+    RS_START,   /* starting state */
+    RS_INIT_FAILED, /* failed initialisation */


Is the distinction between RS_START and RS_INIT_FAILED really necessary?


The state stays in RS_INIT_FAILED once was failed until virtio-gpu is
reset, re-initializing virglrenderer isn't allowed in this state.


Can you elaborate more? Why isn't re-initializing allowed?


In practice, if virglrenderer initialization failed once, it will fail
second time. Otherwise we will be retrying to init endlessly because
guest won't stop sending virgl commands even if they all are timing out.
Each initialization failure produces a error msg.


I see.

A better solution is to add a new function to GraphicHwOps to call back 
after initializating the displays and before starting the guest. You can 
do virgl initialization in such a function, and exit(1) if the 
initialization fails because the guest has not started yet, saving this 
enum. I don't require you to make such a change however; this is not a 
regression of your patches so you have no obligation to fix it.

Re: [PATCH v3 00/13] riscv: QEMU RISC-V IOMMU Support

[Alistair Francis]

On Fri, May 24, 2024 at 3:43 AM Daniel Henrique Barboza
 wrote:
>
> Hi,
>
> In this new version a lot of changes were made throughout all the code,
> most notably on patch 3. Link for the previous version is [1].
>
> * How it was tested *
>
> This series was tested using an emulated QEMU RISC-V host booting a QEMU
> KVM guest, passing through an emulated e1000 network card from the host
> to the guest. I can provide more details (e.g. QEMU command lines) if
> required, just let me know. For now this cover-letter is too much of an
> essay as is.

It would probably be helpful to document these somewhere, so others
can use them as a starting point for running this

Alistair

>
> The Linux kernel used for tests can be found here:
>
> https://github.com/tjeznach/linux/tree/riscv_iommu_v6-rc3
>
> This is a newer version of the following work from Tomasz:
>
> https://lore.kernel.org/linux-riscv/cover.1715708679.git.tjezn...@rivosinc.com/
> ("[PATCH v5 0/7] Linux RISC-V IOMMU Support")
>
> The v5 wasn't enough for the testing being done. v6-rc3 did the trick.
>
> Note that to test this work using riscv-iommu-pci we'll need to provide
> the Rivos PCI ID in the command line. More details down below.
>
> * Highlights of this version *
>
> - patches removed from v2: platform driver (riscv-iommu-sys, former
> patch 05) and the EDU changes (patches 14 and 15). The platform driver
> will be sent later with a working example on the 'virt' machine,
> either on a newer version of this series or via a follow-up series. We
> already have a PoC on [2] created by Sunil. More tests are needed, so
> it'll be left behind for now. The EDU changes will be sent in separate
> after I finish the doc changes that Frank cited in v2.
>
> - patch 3 contains the bulk of changes made from v2. Please give special
> attention to the following functions since this is entirely new code I
> ended up adding:
>
>  - riscv_iommu_report_fault()
>  - riscv_iommu_validate_device_ctx()
>  - riscv_iommu_update_ipsr()
>
>   Aside from these helpers most of the changes made in this patch 3 were
> punctual.
>
> - Red HAT PCI ID related changes. A new patch (4) that introduces a
> generic RISC-V IOMMU PCI ID was added. This PCI ID was gracefully given
> to us by Red Hat and Gerd Hoffman from their ID space. The
> riscv-iommu-pci device now defaults to this PCI ID instead of Rivos PCI
> ID. The device was changed slightly to allow vendor-id and device-id to
> be set in the command-line, so it's now possible to use this reference
> device as another RISC-V IOMMU PCI device to ease the burden of
> testing/development.
>
>   To instantiate the riscv-iommu-pci device using the previous Rivos PCI
> ID, use the following cmd line:
>
>   -device riscv-iommu-pci,vendor-id=0x1efd,device-id=0xedf1
>
>   I'm using these options to test the series with the existing Linux RISC-V
> IOMMU support that uses just a Rivos ID to identify the device.
>
>
> Series based on alistair/riscv-to-apply.next. It's also applicable on
> current QEMU master. It can also be fetched from:
>
> https://gitlab.com/danielhb/qemu/-/tree/riscv_iommu_v3
>
>
> Patches missing reviews/acks: 3, 5, 9, 10, 11.
>
> Changes from v2 [1]:
> - patch 05 (hw/riscv: add riscv-iommu-sys platform device): dropped
>   - will be reintroduced in a later review or as a follow-up series
>
> - patches 14 and 15: dropped
>   - will be sent in separate
>
> - patches 2, 3, 4 and 5:
>   - removed all 'Ziommu' references
>
> - patch 2:
>   - added extra bits that patch 3 ended up using
>
> - patch 3:
>   - fixed blank line at EOF in hw/riscv/trace.h
>   - added a riscv_iommu_report_fault() helper to report faults. The helper 
> checks if
> a given fault is eligible to be reported if DTF is 1
>   - Use riscv_iommu_report_fault() in riscv_iommu_ctx() and 
> riscv_iommu_translate()
> to avoid code repetition
>   - added a riscv_iommu_validate_device_ctx() helper to validate the device 
> context
> as specified in "Device configuration checks" section. This helper is 
> being used
> in riscv_iommu_ctx_fetch()
>   - added a new riscv_iommu_update_ipsr() helper to handle IPSR updates
> in riscv_iommu_mmio_write()
>   - riscv_iommmu_msi_write() now reports a fault in all error paths
>   - check for fctl.WSI before issuing a MSI interrupt in riscv_iommu_notify()
>   - change riscv-iommu region name to 'riscv-iommu'
>   - change address_space_init() name for PCI devices to 'name' instead of 
> using TYPE_RISCV_IOMMU_PCI
>   - changed riscv_iommu_mmio_ops min_access_size to 4
>   - do not check for min and max sizes on riscv_iommu_mmio_write()
>   - changed riscv_iommu_trap_ops  min_access_size to 4
>   - removed IOMMU qemu_thread thread:
> - riscv_iommu_mmio_write() will now execute a riscv_iommu_process_fn by 
> holding
>   'core_lock'
>   - init FSCR as zero explicitly
>   - check for bus->iommu_opaque == NULL before calling pci_setup_iommu()
>
> - patch 4 (new):
>   - add Red-Hat PCI RISC-V IOMMU ID
>

Re: [PULL v2 2/2] hw/ufs: Add support MCQ of UFSHCI 4.0

[Jeuk Kim]

On 6/8/2024 12:02 AM, Peter Maydell wrote:

On Mon, 3 Jun 2024 at 09:38, Jeuk Kim  wrote:

From: Minwoo Im 

This patch adds support for MCQ defined in UFSHCI 4.0.  This patch
utilized the legacy I/O codes as much as possible to support MCQ.

MCQ operation & runtime register is placed at 0x1000 offset of UFSHCI
register statically with no spare space among four registers (48B):

 UfsMcqSqReg, UfsMcqSqIntReg, UfsMcqCqReg, UfsMcqCqIntReg

The maxinum number of queue is 32 as per spec, and the default
MAC(Multiple Active Commands) are 32 in the device.

Example:
 -device ufs,serial=foo,id=ufs0,mcq=true,mcq-maxq=8

Signed-off-by: Minwoo Im 
Reviewed-by: Jeuk Kim 
Message-Id: <20240528023106.856777-3-minwoo...@samsung.com>
Signed-off-by: Jeuk Kim 

Hi; Coverity reported a potential issue with this code.
I don't think it's an actual bug, but it would be nice to
clean it up and keep Coverity happy. (CID 1546866).


  static uint64_t ufs_mmio_read(void *opaque, hwaddr addr, unsigned size)
  {
  UfsHc *u = (UfsHc *)opaque;
-uint8_t *ptr = (uint8_t *)&u->reg;
+uint8_t *ptr;
  uint64_t value;
-
-if (addr > sizeof(u->reg) - size) {

Before this change, we checked addr against (sizeof(u->reg) - size).


+uint64_t offset;
+
+if (addr < sizeof(u->reg)) {

Now we changed to check it against sizeof(u->reg).
That means Coverity thinks it's possible that we could
have addr = sizeof(u->reg) - 1...


+offset = addr;
+ptr = (uint8_t *)&u->reg;
+} else if (ufs_is_mcq_reg(u, addr)) {
+offset = addr - ufs_mcq_reg_addr(u, 0);
+ptr = (uint8_t *)&u->mcq_reg;
+} else if (ufs_is_mcq_op_reg(u, addr)) {
+offset = addr - ufs_mcq_op_reg_addr(u, 0);
+ptr = (uint8_t *)&u->mcq_op_reg;
+} else {
  trace_ufs_err_invalid_register_offset(addr);
  return 0;
  }

-value = *(uint32_t *)(ptr + addr);
+value = *(uint32_t *)(ptr + offset);

...so Coverity thinks that this write of a 32-bit value
might overrun the end of the array.


  trace_ufs_mmio_read(addr, value, size);
  return value;

Side note: why use uint8_t* for the type of "ptr" in these
functions? We know it must be a uint32_t* (it comes either from
the u->reg or from one of these u_mcq_reg or u->mcq_op_reg
fields, and they must all be uint32_t), and using the right
type would reduce the number of casts you need to do.


This is probably to make the offset calculation easier (since we can

write `addr + offset` instead of `addr + offset/4`). But I agree with

you that it can be semantically confusing. I'll fix it.



It also helps the reader a little, because using a uint8_t
implies that you're indexing into an array-of-bytes, and
if you were doing that it would be a bug (because both of
it not handling endianness correctly and because of it
not handling alignment correctly).


  }
@@ -423,13 +802,17 @@ static void ufs_mmio_write(void *opaque, hwaddr addr, 
uint64_t data,
  {
  UfsHc *u = (UfsHc *)opaque;

-if (addr > sizeof(u->reg) - size) {
+trace_ufs_mmio_write(addr, data, size);
+
+if (addr < sizeof(u->reg)) {

Similarly here we changed the bounds check we were doing.


+ufs_write_reg(u, addr, data, size);
+} else if (ufs_is_mcq_reg(u, addr)) {
+ufs_write_mcq_reg(u, addr - ufs_mcq_reg_addr(u, 0), data, size);
+} else if (ufs_is_mcq_op_reg(u, addr)) {
+ufs_write_mcq_op_reg(u, addr - ufs_mcq_op_reg_addr(u, 0), data, size);
+} else {
  trace_ufs_err_invalid_register_offset(addr);
-return;
  }
-
-trace_ufs_mmio_write(addr, data, size);
-ufs_write_reg(u, addr, data, size);

thanks
-- PMM



Thanks for the detailed explanation! I will prepare a patch to fix the 
coverity issue.



Thanks,

Jeuk

Re: [PULL 0/3] Bsd user misc 2024q2 patches

[Richard Henderson]

On 6/9/24 09:55, Warner Losh wrote:

The following changes since commit 3e246da2c3f85298b52f8a1154b832acf36aa656:

   Merge tag 'for-upstream' ofhttps://gitlab.com/bonzini/qemu  into staging 
(2024-06-08 07:40:08 -0700)

are available in the Git repository at:

   g...@gitlab.com:bsdimp/qemu.git  tags/bsd-user-misc-2024q2-pull-request

for you to fetch changes up to cb4c259052cbc5dd04c17d963c789360cb8fe340:

   bsd-user: Catch up to run-time reserved_va math (2024-06-09 10:30:25 -0600)


Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/9.1 as 
appropriate.


r~

Re: [PATCH v13 03/13] virtio-gpu: Handle virtio_gpu_virgl_init() failure

[Dmitry Osipenko]

On 6/4/24 17:21, Marc-André Lureau wrote:
>> @@ -65,13 +70,21 @@ static void virtio_gpu_gl_handle_ctrl(VirtIODevice
>> *vdev, VirtQueue *vq)
>>  return;
>>  }
>>
>> -if (!gl->renderer_inited) {
>> -virtio_gpu_virgl_init(g);
>> -gl->renderer_inited = true;
>> -}
>> -if (gl->renderer_reset) {
>> -gl->renderer_reset = false;
>> +switch (gl->renderer_state) {
>> +case RS_RESET:
>>  virtio_gpu_virgl_reset(g);
>> +/* fallthrough */
>> +case RS_START:
>> +if (virtio_gpu_virgl_init(g)) {
>> +gl->renderer_state = RS_INIT_FAILED;
>> +} else {
>> +gl->renderer_state = RS_INITED;
>> +}
>> +break;
>> +case RS_INIT_FAILED:
>> +return;
>> +case RS_INITED:
>> +break;
>>  }
>>
>>
> This still lets it go through the cmd processing after setting
> gl->renderer_state = RS_INIT_FAILED, the first time.

Good catch, thanks!

-- 
Best regards,
Dmitry

Re: [PATCH v13 03/13] virtio-gpu: Handle virtio_gpu_virgl_init() failure

[Dmitry Osipenko]

On 6/3/24 08:44, Akihiko Odaki wrote:
> On 2024/06/03 14:26, Dmitry Osipenko wrote:
>> On 6/2/24 08:34, Akihiko Odaki wrote:
 +typedef enum {
 +    RS_START,   /* starting state */
 +    RS_INIT_FAILED, /* failed initialisation */
>>>
>>> Is the distinction between RS_START and RS_INIT_FAILED really necessary?
>>
>> The state stays in RS_INIT_FAILED once was failed until virtio-gpu is
>> reset, re-initializing virglrenderer isn't allowed in this state.
> 
> Can you elaborate more? Why isn't re-initializing allowed?

In practice, if virglrenderer initialization failed once, it will fail
second time. Otherwise we will be retrying to init endlessly because
guest won't stop sending virgl commands even if they all are timing out.
Each initialization failure produces a error msg.

-- 
Best regards,
Dmitry

Re: [PATCH 3/4] target/ppc: Move VSX vector storage access insns to decodetree.

[Chinmay Rath]

Hi Richard,

My apologies for the ill formatted reply in this patch series. Just 
realized it now. The cliched 'Tab' issue with the mail client XD.

On 6/7/24 21:16, Richard Henderson wrote:

On 6/7/24 07:49, Chinmay Rath wrote:

Moving the following instructions to decodetree specification:

   lxv{b16, d2, h8, w4, ds, ws}x   : X-form
   stxv{b16, d2, h8, w4}x  : X-form

The changes were verified by validating that the tcg-ops generated 
for those
instructions remain the same, which were captured using the '-d 
in_asm,op' flag.


Signed-off-by: Chinmay Rath 
---
  target/ppc/insn32.decode    |  10 ++
  target/ppc/translate/vsx-impl.c.inc | 199 
  target/ppc/translate/vsx-ops.c.inc  |  12 --
  3 files changed, 97 insertions(+), 124 deletions(-)


Because the ops are identical,
Reviewed-by: Richard Henderson 

But you really should update these to use tcg_gen_qemu_ld/st_i128 with 
the proper atomicity flags.  This will fix an existing bug...

^
Surely Richard, I have noted this suggestion from earlier patch and plan 
to do this, and a few others which I couldn't implement earlier, along 
with some clean-ups this week.


I refrained from doing it with the decodetree movement, to take time to 
properly understand and test. Should send out those patches soon.


Thanks & Regards,
Chinmay



+static bool trans_LXVD2X(DisasContext *ctx, arg_LXVD2X *a)
  {
  TCGv EA;
  TCGv_i64 t0;
+
+    REQUIRE_VSX(ctx);
+    REQUIRE_INSNS_FLAGS2(ctx, VSX);
+
  t0 = tcg_temp_new_i64();
  gen_set_access_type(ctx, ACCESS_INT);
+    EA = do_ea_calc(ctx, a->ra, cpu_gpr[a->rb]);
  gen_qemu_ld64_i64(ctx, t0, EA);
+    set_cpu_vsr(a->rt, t0, true);


where the vector register is partially modified ...


  tcg_gen_addi_tl(EA, EA, 8);
  gen_qemu_ld64_i64(ctx, t0, EA);


before a fault from the second load is recognized.
Similarly for stores leaving memory partially modified.


r~

Re: [PATCH 4/4] target/ppc: Move VSX fp compare insns to decodetree.

[Chinmay Rath]

On 6/7/24 21:25, Richard Henderson wrote:

On 6/7/24 07:49, Chinmay Rath wrote:

+static bool do_cmp(DisasContext *ctx, arg_XX3_rc *a,
+    void (*helper)(TCGv_i32, TCGv_ptr, TCGv_ptr, TCGv_ptr, 
TCGv_ptr))

+{
+    TCGv_i32 ignored;
+    TCGv_ptr xt, xa, xb;
+    REQUIRE_VSX(ctx);
+    xt = gen_vsr_ptr(a->xt);
+    xa = gen_vsr_ptr(a->xa);
+    xb = gen_vsr_ptr(a->xb);
+    if (a->rc) {
+    helper(cpu_crf[6], tcg_env, xt, xa, xb);
+    } else {
+    ignored = tcg_temp_new_i32();
+    helper(ignored, tcg_env, xt, xa, xb);
+    }


Better to unify the helper call.  E.g.

    dest = a->rc ? cpu_crf[6] : tcg_temp_new_i32();
    helper(dest, ...)


^
Sure Richard, will do in v2.

Thanks & Regards,
Chinmay


Anyway,
Reviewed-by: Richard Henderson 


r~

Re: [PATCH 3/4] target/ppc: Move VSX vector storage access insns to decodetree.

[Chinmay Rath]

Hi Richard,

On 6/7/24 21:16, Richard Henderson wrote:

On 6/7/24 07:49, Chinmay Rath wrote:

Moving the following instructions to decodetree specification:

   lxv{b16, d2, h8, w4, ds, ws}x   : X-form
   stxv{b16, d2, h8, w4}x  : X-form

The changes were verified by validating that the tcg-ops generated 
for those
instructions remain the same, which were captured using the '-d 
in_asm,op' flag.


Signed-off-by: Chinmay Rath 
---
  target/ppc/insn32.decode    |  10 ++
  target/ppc/translate/vsx-impl.c.inc | 199 
  target/ppc/translate/vsx-ops.c.inc  |  12 --
  3 files changed, 97 insertions(+), 124 deletions(-)


Because the ops are identical,
Reviewed-by: Richard Henderson 

But you really should update these to use tcg_gen_qemu_ld/st_i128 with 
the proper atomicity flags.  This will fix an existing bug...


^ Surely Richard, I have noted this suggestion of yours from an earlier 
patch, and plan to do this change and implement a few of your other 
suggestions,
    which I couldn't implement earlier, along with some clean-ups this 
week.
    I refrained from doing it with the decodetree movement, to take 
proper time to understand and test.


    Should send out those patches soon.

    Thanks & Regards,
    Chinmay

+static bool trans_LXVD2X(DisasContext *ctx, arg_LXVD2X *a)
  {
  TCGv EA;
  TCGv_i64 t0;
+
+    REQUIRE_VSX(ctx);
+    REQUIRE_INSNS_FLAGS2(ctx, VSX);
+
  t0 = tcg_temp_new_i64();
  gen_set_access_type(ctx, ACCESS_INT);
+    EA = do_ea_calc(ctx, a->ra, cpu_gpr[a->rb]);
  gen_qemu_ld64_i64(ctx, t0, EA);
+    set_cpu_vsr(a->rt, t0, true);


where the vector register is partially modified ...


  tcg_gen_addi_tl(EA, EA, 8);
  gen_qemu_ld64_i64(ctx, t0, EA);


before a fault from the second load is recognized.
Similarly for stores leaving memory partially modified.


r~

Re: [PATCH 2/4] target/ppc: Move VSX vector with length storage access insns to decodetree.

[Richard Henderson]

On 6/9/24 11:11, Chinmay Rath wrote:
The calculation of effective address in these instructions is slightly different than the 
others,

for which helper function exist :

EA for these insns : EA ← (RA=0) ? 0 : GPR[RA]
EA for rest storage access insns : EA ← ((RA=0) ? 0 : GPR[RA]) + GPR[RB]

This is why I could not reuse that function. Also, this calculation of EA is 
limited to these
4 insns above, and only 2 others (prefixed insns), which is why I did not create a new 
function

for this, considering it won't be reused for any other insn.

Please let me know if I should create a new function in this case as well.


If you expect this to be used just once, then leaving it inline is perfectly 
fine.


r~

Re: [PULL 0/6] hex queue

[Richard Henderson]

On 6/8/24 17:56, Brian Cain wrote:

The following changes since commit 3e246da2c3f85298b52f8a1154b832acf36aa656:

   Merge tag 'for-upstream' ofhttps://gitlab.com/bonzini/qemu  into staging 
(2024-06-08 07:40:08 -0700)

are available in the Git repository at:

   https://github.com/quic/qemu  tags/pull-hex-20240608

for you to fetch changes up to 1967a1ea985299c090dfd3efc1e5323ce60d75df:

   target/hexagon: idef-parser simplify predicate init (2024-06-08 17:49:36 
-0700)


* hexagon: idef-parser cleanup
* hexagon: implement PC alignment exception, tests
* hexagon: fix for HVX new-value store


Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/9.1 as 
appropriate.


r~

Re: [PATCH 2/4] target/ppc: Move VSX vector with length storage access insns to decodetree.

[Chinmay Rath]

Hi Richard,

On 6/7/24 21:11, Richard Henderson wrote:

On 6/7/24 07:49, Chinmay Rath wrote:

+static bool do_ld_st_vl(DisasContext *ctx, arg_X *a,
+    void (*helper)(TCGv_ptr, TCGv, TCGv_ptr, TCGv))
+{
+    TCGv EA;
+    TCGv_ptr xt;
+    if (a->rt < 32) {
+    REQUIRE_VSX(ctx);
+    } else {
+    REQUIRE_VECTOR(ctx);
+    }
+    xt = gen_vsr_ptr(a->rt);
+    gen_set_access_type(ctx, ACCESS_INT);
+
+    if (a->ra) {
+    EA = tcg_temp_new();
+    tcg_gen_mov_tl(EA, cpu_gpr[a->ra]);
+    } else {
+    EA = tcg_constant_tl(0);
+    }
+    if (NARROW_MODE(ctx)) {
+    tcg_gen_ext32u_tl(EA, EA);


ra == 0, narrow mode, will crash, due to write into constant 0.
Obviously 0 does not need extending, so this could be

    if (!a->ra) {
    ea = constant 0;
    } else if (narrow mode) {
    ea = tcg_temp_new();
    tcg_gen_ext32u_tl(ea, cpu_gpr[a->ra]);
    } else {
    ra = cpu_gpr[a->ra];
    }


^ Thank you Richard, will take care in v2.


Aren't there existing helper functions for computing this address?
And if not, better to create one.

^
The calculation of effective address in these instructions is slightly 
different than the others,

for which helper function exist :

EA for these insns : EA ← (RA=0) ? 0 : GPR[RA]
EA for rest storage access insns : EA ← ((RA=0) ? 0 : GPR[RA]) + GPR[RB]

This is why I could not reuse that function. Also, this calculation of 
EA is limited to these
4 insns above, and only 2 others (prefixed insns), which is why I did 
not create a new function

for this, considering it won't be reused for any other insn.

Please let me know if I should create a new function in this case as well.

Thanks and Regards,
Chinmay



r~

[PULL 1/3] linux-user: Adjust comment to reflect the code.

[Warner Losh]

If the user didn't specify reserved_va, there's an else for 64-bit host
32-bit (or fewer) target to reserve 32-bits of address space. Update the
comments to reflect this, and rejustify comment to 80 columns.

Signed-off-by: Warner Losh 
Reviewed-by: Richard Henderson 
---
 linux-user/main.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/linux-user/main.c b/linux-user/main.c
index 94e4c47f052..94c99a1366f 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -814,10 +814,10 @@ int main(int argc, char **argv, char **envp)
 thread_cpu = cpu;
 
 /*
- * Reserving too much vm space via mmap can run into problems
- * with rlimits, oom due to page table creation, etc.  We will
- * still try it, if directed by the command-line option, but
- * not by default.
+ * Reserving too much vm space via mmap can run into problems with rlimits,
+ * oom due to page table creation, etc.  We will still try it, if directed
+ * by the command-line option, but not by default. Unless we're running a
+ * target address space of 32 or fewer bits on a host with 64 bits.
  */
 max_reserved_va = MAX_RESERVED_VA(cpu);
 if (reserved_va != 0) {
-- 
2.43.0

[PULL 0/3] Bsd user misc 2024q2 patches

[Warner Losh]

The following changes since commit 3e246da2c3f85298b52f8a1154b832acf36aa656:

  Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging 
(2024-06-08 07:40:08 -0700)

are available in the Git repository at:

  g...@gitlab.com:bsdimp/qemu.git tags/bsd-user-misc-2024q2-pull-request

for you to fetch changes up to cb4c259052cbc5dd04c17d963c789360cb8fe340:

  bsd-user: Catch up to run-time reserved_va math (2024-06-09 10:30:25 -0600)


bsd-user: Baby Steps towards eliminating qemu_host_page_size, et al

First baby-steps towards eliminating qemu_host_page_size: tackle the reserve_va
calculation (which is easier to copy from linux-user than to fix).
-BEGIN PGP SIGNATURE-
Comment: GPGTools - https://gpgtools.org

iQIzBAABCgAdFiEEIDX4lLAKo898zeG3bBzRKH2wEQAFAmZl3pgACgkQbBzRKH2w
EQBfpg//U4YdJAA0H4okwPtowP1wIK1gpWvVd5FIN17pCXLKT4FR4efhWeEnQh8U
+dXvkCpX/MnhBkStYoGZBmYe1rNKkEAn8BPCsQqX4y3af5RzKyKWo0gZXOjN3L9e
ixmeFcg/7BTwnSbcO02xd9BOPPaRiFBDSidh28gr/1sxpXRxlbQHzIUpTBncDaN6
4w5DnF+b1RFHCz05ytrP517cj7E32Ig9S/cVMmBd1pGJiLnHiOp/peMprCL6tnI+
YNBzttCbRPNH2z0zVd9En/hDnVirGPYX+LXg0Djkw3I+stJj4jwbJTuDG+5Lzghp
YrYfiU6x7OG9ywjFJgY1/pExVT1cwkNjuGCXL+F4R49R5LfIEHq5/MlQp+tjpYYO
g5WmpiLnFpFosmXIPJmxr16zqm2sLD+P0Jr/kdIz58fTWmIQeKwi/Vu/73h4kxST
vjBbhC3eg56lQDaospc4h8+RehmI6LdSWYx0kxv2JKpXH3lQPqsDSrOcm9hEbWYS
DeV++vkyQcXrbCnwomfxG1U+dVYBlJ1L1wClxc/1WD9KxXXJIwlvGmIu3o3c2+xj
BM6eRe3evWioqdqhc2lY+XxATwbIUxiect6ml+F6E0KJxlm3Ajqy6qw49G+uhZxa
XWUEIYGDd6/xHMlBeo6FKUpe/Ez/i3eCFXr4AD4iO7AtTuukrO4=
=3EaH
-END PGP SIGNATURE-



Warner Losh (3):
  linux-user: Adjust comment to reflect the code.
  bsd-user: port linux-user:ff8a8bbc2ad1 for variable page sizes
  bsd-user: Catch up to run-time reserved_va math

 bsd-user/main.c   | 51 ---
 linux-user/main.c |  8 
 2 files changed, 43 insertions(+), 16 deletions(-)

-- 
2.43.0

[PULL 3/3] bsd-user: Catch up to run-time reserved_va math

[Warner Losh]

Catch up to linux-user's 8f67b9c694d0, 13c13397556a, 2f7828b57293, and
95059f9c313a by Richard Henderson which made reserved_va a run-time
calculation, defaulting to nothing except in the case of 64-bit host
32-bit target. Also include the adjustment of the comment heading that
work submitted in the same patch stream. Since this is a direct copy,
squash it into one patch rather than follow the Linux evolution since
breaking this down further at this point doesn't make sense for this
"new code".

Signed-off-by: Warner Losh 
Reviewed-by: Richard Henderson 
---
 bsd-user/main.c | 39 +++
 1 file changed, 27 insertions(+), 12 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index d685734d087..dcad266c2c9 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -77,25 +77,16 @@ bool have_guest_base;
 # if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
 #  if TARGET_VIRT_ADDR_SPACE_BITS == 32 && \
   (TARGET_LONG_BITS == 32 || defined(TARGET_ABI32))
-#   define MAX_RESERVED_VA  0xul
+#   define MAX_RESERVED_VA(CPU)  0xul
 #  else
-#   define MAX_RESERVED_VA  ((1ul << TARGET_VIRT_ADDR_SPACE_BITS) - 1)
+#   define MAX_RESERVED_VA(CPU)  ((1ul << TARGET_VIRT_ADDR_SPACE_BITS) - 1)
 #  endif
 # else
-#  define MAX_RESERVED_VA  0
+#  define MAX_RESERVED_VA(CPU)  0
 # endif
 #endif
 
-/*
- * That said, reserving *too* much vm space via mmap can run into problems
- * with rlimits, oom due to page table creation, etc.  We will still try it,
- * if directed by the command-line option, but not by default.
- */
-#if HOST_LONG_BITS == 64 && TARGET_VIRT_ADDR_SPACE_BITS <= 32
-unsigned long reserved_va = MAX_RESERVED_VA;
-#else
 unsigned long reserved_va;
-#endif
 
 const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
 const char *qemu_uname_release;
@@ -293,6 +284,7 @@ int main(int argc, char **argv)
 envlist_t *envlist = NULL;
 char *argv0 = NULL;
 int host_page_size;
+unsigned long max_reserved_va;
 
 adjust_ssize();
 
@@ -493,6 +485,29 @@ int main(int argc, char **argv)
 cpu_reset(cpu);
 thread_cpu = cpu;
 
+/*
+ * Reserving too much vm space via mmap can run into problems with rlimits,
+ * oom due to page table creation, etc.  We will still try it, if directed
+ * by the command-line option, but not by default. Unless we're running a
+ * target address space of 32 or fewer bits on a host with 64 bits.
+ */
+max_reserved_va = MAX_RESERVED_VA(cpu);
+if (reserved_va != 0) {
+if ((reserved_va + 1) % host_page_size) {
+char *s = size_to_str(host_page_size);
+fprintf(stderr, "Reserved virtual address not aligned mod %s\n", 
s);
+g_free(s);
+exit(EXIT_FAILURE);
+}
+if (max_reserved_va && reserved_va > max_reserved_va) {
+fprintf(stderr, "Reserved virtual address too big\n");
+exit(EXIT_FAILURE);
+}
+} else if (HOST_LONG_BITS == 64 && TARGET_VIRT_ADDR_SPACE_BITS <= 32) {
+/* MAX_RESERVED_VA + 1 is a large power of 2, so is aligned. */
+reserved_va = max_reserved_va;
+}
+
 if (getenv("QEMU_STRACE")) {
 do_strace = 1;
 }
-- 
2.43.0

[PULL 2/3] bsd-user: port linux-user:ff8a8bbc2ad1 for variable page sizes

[Warner Losh]

Bring in Richard Henderson's ff8a8bbc2ad1 to finalize the page size to
allow TARGET_PAGE_BITS_VARY. bsd-user's "blitz" fork has aarch64
support, which is now variable page size. Add support for it here, even
though it's effectively a nop in upstream qemu.

Signed-off-by: Warner Losh 
Reviewed-by: Richard Henderson 
---
 bsd-user/main.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index 29a629d8779..d685734d087 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -46,6 +46,7 @@
 #include "crypto/init.h"
 #include "qemu/guest-random.h"
 #include "gdbstub/user.h"
+#include "exec/page-vary.h"
 
 #include "host-os.h"
 #include "target_arch_cpu.h"
@@ -291,6 +292,7 @@ int main(int argc, char **argv)
 char **target_environ, **wrk;
 envlist_t *envlist = NULL;
 char *argv0 = NULL;
+int host_page_size;
 
 adjust_ssize();
 
@@ -476,6 +478,16 @@ int main(int argc, char **argv)
  opt_one_insn_per_tb, &error_abort);
 ac->init_machine(NULL);
 }
+
+/*
+ * Finalize page size before creating CPUs.
+ * This will do nothing if !TARGET_PAGE_BITS_VARY.
+ * The most efficient setting is to match the host.
+ */
+host_page_size = qemu_real_host_page_size();
+set_preferred_target_page_bits(ctz32(host_page_size));
+finalize_target_page_bits();
+
 cpu = cpu_create(cpu_type);
 env = cpu_env(cpu);
 cpu_reset(cpu);
-- 
2.43.0

Re: [PATCH v3 11/13] hw/riscv/riscv-iommu: add DBG support

[Frank Chang]

Reviewed-by: Frank Chang 

Daniel Henrique Barboza  於 2024年5月24日 週五 上午1:42寫道：
>
> From: Tomasz Jeznach 
>
> DBG support adds three additional registers: tr_req_iova, tr_req_ctl and
> tr_response.
>
> The DBG cap is always enabled. No on/off toggle is provided for it.
>
> Signed-off-by: Tomasz Jeznach 
> Signed-off-by: Daniel Henrique Barboza 
> ---
>  hw/riscv/riscv-iommu-bits.h | 17 +++
>  hw/riscv/riscv-iommu.c  | 59 +
>  2 files changed, 76 insertions(+)
>
> diff --git a/hw/riscv/riscv-iommu-bits.h b/hw/riscv/riscv-iommu-bits.h
> index e253b29b16..f143c4a926 100644
> --- a/hw/riscv/riscv-iommu-bits.h
> +++ b/hw/riscv/riscv-iommu-bits.h
> @@ -84,6 +84,7 @@ struct riscv_iommu_pq_record {
>  #define RISCV_IOMMU_CAP_ATS BIT_ULL(25)
>  #define RISCV_IOMMU_CAP_T2GPA   BIT_ULL(26)
>  #define RISCV_IOMMU_CAP_IGS GENMASK_ULL(29, 28)
> +#define RISCV_IOMMU_CAP_DBG BIT_ULL(31)
>  #define RISCV_IOMMU_CAP_PAS GENMASK_ULL(37, 32)
>  #define RISCV_IOMMU_CAP_PD8 BIT_ULL(38)
>  #define RISCV_IOMMU_CAP_PD17BIT_ULL(39)
> @@ -185,6 +186,22 @@ enum {
>  RISCV_IOMMU_INTR_COUNT
>  };
>
> +/* 5.24 Translation request IOVA (64bits) */
> +#define RISCV_IOMMU_REG_TR_REQ_IOVA 0x0258
> +
> +/* 5.25 Translation request control (64bits) */
> +#define RISCV_IOMMU_REG_TR_REQ_CTL  0x0260
> +#define RISCV_IOMMU_TR_REQ_CTL_GO_BUSY  BIT_ULL(0)
> +#define RISCV_IOMMU_TR_REQ_CTL_NW   BIT_ULL(3)
> +#define RISCV_IOMMU_TR_REQ_CTL_PID  GENMASK_ULL(31, 12)
> +#define RISCV_IOMMU_TR_REQ_CTL_DID  GENMASK_ULL(63, 40)
> +
> +/* 5.26 Translation request response (64bits) */
> +#define RISCV_IOMMU_REG_TR_RESPONSE 0x0268
> +#define RISCV_IOMMU_TR_RESPONSE_FAULT   BIT_ULL(0)
> +#define RISCV_IOMMU_TR_RESPONSE_S   BIT_ULL(9)
> +#define RISCV_IOMMU_TR_RESPONSE_PPN RISCV_IOMMU_PPN_FIELD
> +
>  /* 5.27 Interrupt cause to vector (64bits) */
>  #define RISCV_IOMMU_REG_IVEC0x02F8
>
> diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
> index 3516b82081..52f0851895 100644
> --- a/hw/riscv/riscv-iommu.c
> +++ b/hw/riscv/riscv-iommu.c
> @@ -1655,6 +1655,50 @@ static void 
> riscv_iommu_process_pq_control(RISCVIOMMUState *s)
>  riscv_iommu_reg_mod32(s, RISCV_IOMMU_REG_PQCSR, ctrl_set, ctrl_clr);
>  }
>
> +static void riscv_iommu_process_dbg(RISCVIOMMUState *s)
> +{
> +uint64_t iova = riscv_iommu_reg_get64(s, RISCV_IOMMU_REG_TR_REQ_IOVA);
> +uint64_t ctrl = riscv_iommu_reg_get64(s, RISCV_IOMMU_REG_TR_REQ_CTL);
> +unsigned devid = get_field(ctrl, RISCV_IOMMU_TR_REQ_CTL_DID);
> +unsigned pid = get_field(ctrl, RISCV_IOMMU_TR_REQ_CTL_PID);
> +RISCVIOMMUContext *ctx;
> +void *ref;
> +
> +if (!(ctrl & RISCV_IOMMU_TR_REQ_CTL_GO_BUSY)) {
> +return;
> +}
> +
> +ctx = riscv_iommu_ctx(s, devid, pid, &ref);
> +if (ctx == NULL) {
> +riscv_iommu_reg_set64(s, RISCV_IOMMU_REG_TR_RESPONSE,
> + RISCV_IOMMU_TR_RESPONSE_FAULT |
> + (RISCV_IOMMU_FQ_CAUSE_DMA_DISABLED << 10));
> +} else {
> +IOMMUTLBEntry iotlb = {
> +.iova = iova,
> +.perm = ctrl & RISCV_IOMMU_TR_REQ_CTL_NW ? IOMMU_RO : IOMMU_RW,
> +.addr_mask = ~0,
> +.target_as = NULL,
> +};
> +int fault = riscv_iommu_translate(s, ctx, &iotlb, false);
> +if (fault) {
> +iova = RISCV_IOMMU_TR_RESPONSE_FAULT | (((uint64_t) fault) << 
> 10);
> +} else {
> +iova = iotlb.translated_addr & ~iotlb.addr_mask;
> +iova >>= TARGET_PAGE_BITS;
> +iova &= RISCV_IOMMU_TR_RESPONSE_PPN;
> +
> +/* We do not support superpages (> 4kbs) for now */
> +iova &= ~RISCV_IOMMU_TR_RESPONSE_S;
> +}
> +riscv_iommu_reg_set64(s, RISCV_IOMMU_REG_TR_RESPONSE, iova);
> +}
> +
> +riscv_iommu_reg_mod64(s, RISCV_IOMMU_REG_TR_REQ_CTL, 0,
> +RISCV_IOMMU_TR_REQ_CTL_GO_BUSY);
> +riscv_iommu_ctx_put(s, ref);
> +}
> +
>  typedef void riscv_iommu_process_fn(RISCVIOMMUState *s);
>
>  static void riscv_iommu_update_ipsr(RISCVIOMMUState *s, uint64_t data)
> @@ -1778,6 +1822,12 @@ static MemTxResult riscv_iommu_mmio_write(void 
> *opaque, hwaddr addr,
>
>  return MEMTX_OK;
>
> +case RISCV_IOMMU_REG_TR_REQ_CTL:
> +process_fn = riscv_iommu_process_dbg;
> +regb = RISCV_IOMMU_REG_TR_REQ_CTL;
> +busy = RISCV_IOMMU_TR_REQ_CTL_GO_BUSY;
> +break;
> +
>  default:
>  break;
>  }
> @@ -1950,6 +2000,9 @@ static void riscv_iommu_realize(DeviceState *dev, Error 
> **errp)
>  s->cap |= RISCV_IOMMU_CAP_SV32X4 | RISCV_IOMMU_CAP_SV39X4 |
>RISCV_IOMMU_CAP_SV48X4 | RISCV_IOMMU_CAP_SV57X4;
>  }
> +/* Enable translation debug interface */
> +s->cap |= RISCV_IOMMU_CAP_DBG;
> +
>  /* Report QEMU target

Re: [PATCH v3 10/13] hw/riscv/riscv-iommu: add ATS support

[Frank Chang]

Reviewed-by: Frank Chang 

Daniel Henrique Barboza  於 2024年5月24日 週五 上午1:41寫道：
>
> From: Tomasz Jeznach 
>
> Add PCIe Address Translation Services (ATS) capabilities to the IOMMU.
> This will add support for ATS translation requests in Fault/Event
> queues, Page-request queue and IOATC invalidations.
>
> Signed-off-by: Tomasz Jeznach 
> Signed-off-by: Daniel Henrique Barboza 
> ---
>  hw/riscv/riscv-iommu-bits.h |  43 +++-
>  hw/riscv/riscv-iommu.c  | 129 +++-
>  hw/riscv/riscv-iommu.h  |   1 +
>  hw/riscv/trace-events   |   3 +
>  4 files changed, 173 insertions(+), 3 deletions(-)
>
> diff --git a/hw/riscv/riscv-iommu-bits.h b/hw/riscv/riscv-iommu-bits.h
> index a4def7b8ec..e253b29b16 100644
> --- a/hw/riscv/riscv-iommu-bits.h
> +++ b/hw/riscv/riscv-iommu-bits.h
> @@ -81,6 +81,7 @@ struct riscv_iommu_pq_record {
>  #define RISCV_IOMMU_CAP_SV57X4  BIT_ULL(19)
>  #define RISCV_IOMMU_CAP_MSI_FLATBIT_ULL(22)
>  #define RISCV_IOMMU_CAP_MSI_MRIFBIT_ULL(23)
> +#define RISCV_IOMMU_CAP_ATS BIT_ULL(25)
>  #define RISCV_IOMMU_CAP_T2GPA   BIT_ULL(26)
>  #define RISCV_IOMMU_CAP_IGS GENMASK_ULL(29, 28)
>  #define RISCV_IOMMU_CAP_PAS GENMASK_ULL(37, 32)
> @@ -209,6 +210,7 @@ struct riscv_iommu_dc {
>
>  /* Translation control fields */
>  #define RISCV_IOMMU_DC_TC_V BIT_ULL(0)
> +#define RISCV_IOMMU_DC_TC_EN_ATSBIT_ULL(1)
>  #define RISCV_IOMMU_DC_TC_EN_PRIBIT_ULL(2)
>  #define RISCV_IOMMU_DC_TC_T2GPA BIT_ULL(3)
>  #define RISCV_IOMMU_DC_TC_DTF   BIT_ULL(4)
> @@ -270,6 +272,20 @@ struct riscv_iommu_command {
>  #define RISCV_IOMMU_CMD_IODIR_DVBIT_ULL(33)
>  #define RISCV_IOMMU_CMD_IODIR_DID   GENMASK_ULL(63, 40)
>
> +/* 3.1.4 I/O MMU PCIe ATS */
> +#define RISCV_IOMMU_CMD_ATS_OPCODE  4
> +#define RISCV_IOMMU_CMD_ATS_FUNC_INVAL  0
> +#define RISCV_IOMMU_CMD_ATS_FUNC_PRGR   1
> +#define RISCV_IOMMU_CMD_ATS_PID GENMASK_ULL(31, 12)
> +#define RISCV_IOMMU_CMD_ATS_PV  BIT_ULL(32)
> +#define RISCV_IOMMU_CMD_ATS_DSV BIT_ULL(33)
> +#define RISCV_IOMMU_CMD_ATS_RID GENMASK_ULL(55, 40)
> +#define RISCV_IOMMU_CMD_ATS_DSEGGENMASK_ULL(63, 56)
> +/* dword1 is the ATS payload, two different payload types for INVAL and PRGR 
> */
> +
> +/* ATS.PRGR payload */
> +#define RISCV_IOMMU_CMD_ATS_PRGR_RESP_CODE  GENMASK_ULL(47, 44)
> +
>  enum riscv_iommu_dc_fsc_atp_modes {
>  RISCV_IOMMU_DC_FSC_MODE_BARE = 0,
>  RISCV_IOMMU_DC_FSC_IOSATP_MODE_SV32 = 8,
> @@ -334,7 +350,32 @@ enum riscv_iommu_fq_ttypes {
>  RISCV_IOMMU_FQ_TTYPE_TADDR_INST_FETCH = 5,
>  RISCV_IOMMU_FQ_TTYPE_TADDR_RD = 6,
>  RISCV_IOMMU_FQ_TTYPE_TADDR_WR = 7,
> -RISCV_IOMMU_FW_TTYPE_PCIE_MSG_REQ = 8,
> +RISCV_IOMMU_FQ_TTYPE_PCIE_ATS_REQ = 8,
> +RISCV_IOMMU_FW_TTYPE_PCIE_MSG_REQ = 9,
> +};
> +
> +/* Header fields */
> +#define RISCV_IOMMU_PREQ_HDR_PIDGENMASK_ULL(31, 12)
> +#define RISCV_IOMMU_PREQ_HDR_PV BIT_ULL(32)
> +#define RISCV_IOMMU_PREQ_HDR_PRIV   BIT_ULL(33)
> +#define RISCV_IOMMU_PREQ_HDR_EXEC   BIT_ULL(34)
> +#define RISCV_IOMMU_PREQ_HDR_DIDGENMASK_ULL(63, 40)
> +
> +/* Payload fields */
> +#define RISCV_IOMMU_PREQ_PAYLOAD_R  BIT_ULL(0)
> +#define RISCV_IOMMU_PREQ_PAYLOAD_W  BIT_ULL(1)
> +#define RISCV_IOMMU_PREQ_PAYLOAD_L  BIT_ULL(2)
> +#define RISCV_IOMMU_PREQ_PAYLOAD_M  GENMASK_ULL(2, 0)
> +#define RISCV_IOMMU_PREQ_PRG_INDEX  GENMASK_ULL(11, 3)
> +#define RISCV_IOMMU_PREQ_UADDR  GENMASK_ULL(63, 12)
> +
> +
> +/*
> + * struct riscv_iommu_msi_pte - MSI Page Table Entry
> + */
> +struct riscv_iommu_msi_pte {
> +  uint64_t pte;
> +  uint64_t mrif_info;
>  };
>
>  /* Fields on pte */
> diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
> index 11c418b548..3516b82081 100644
> --- a/hw/riscv/riscv-iommu.c
> +++ b/hw/riscv/riscv-iommu.c
> @@ -641,6 +641,20 @@ static bool 
> riscv_iommu_validate_device_ctx(RISCVIOMMUState *s,
>  RISCVIOMMUContext *ctx)
>  {
>  uint32_t fsc_mode, msi_mode;
> +uint64_t gatp;
> +
> +if (!(s->cap & RISCV_IOMMU_CAP_ATS) &&
> +(ctx->tc & RISCV_IOMMU_DC_TC_EN_ATS ||
> + ctx->tc & RISCV_IOMMU_DC_TC_EN_PRI ||
> + ctx->tc & RISCV_IOMMU_DC_TC_PRPR)) {
> +return false;
> +}
> +
> +if (!(ctx->tc & RISCV_IOMMU_DC_TC_EN_ATS) &&
> +(ctx->tc & RISCV_IOMMU_DC_TC_T2GPA ||
> + ctx->tc & RISCV_IOMMU_DC_TC_EN_PRI)) {
> +return false;
> +}
>
>  if (!(ctx->tc & RISCV_IOMMU_DC_TC_EN_PRI) &&
>  ctx->tc & RISCV_IOMMU_DC_TC_PRPR) {
> @@ -661,6 +675,12 @@ static bool 
> riscv_iommu_validate_device_ctx(RISCVIOMMUState *s,
>  }
>  }
>
> +gatp = get_field(ctx->gatp, RISCV_IOMMU_ATP_MODE_FIELD);
> +if (ctx->tc & RISCV_IOMMU_DC_TC_T2GPA &&
> +gatp == RISCV_IOMMU_DC_

Re: [PATCH 3/3] ui/cocoa: Adds support for mouse cursors

[Akihiko Odaki]

On 2024/06/09 5:20, Phil Dennis-Jordan wrote:

This change implements the callbacks dpy_cursor_define and dpy_mouse_set
for the Cocoa UI. The incoming mouse cursor image is converted into an
NSCursor object, allowing the guest mouse cursor to be rendered as the
host's native OS cursor on macOS.

This is straightforward in absolute pointing mode, but rather trickier
with a relative pointing device:

  1. The cursor position in Qemu's coordinate system must be translated
 and converted into macOS's Core Graphics/Quartz coordinates when
 positioning the cursor. Additionally, the position already includes
 the hotspot offset; we'd prefer to use the host OS's hotspot support
 so we need subtract the hotspot vector off again.
  2. Setting the cursor position programmatically on macOS biases the
 next mouse movement event by the amount the cursor was shifted.
 If we didn't reverse that bias when forwarding the next event
 back into Qemu's input stack, this would create a feedback loop.
 (The behaviour of affecting mouse events makes sense for e.g.
 setting the cursor position in a remote access system.)

This change slightly improves the user experience when using virtual
display adapter implementations which check for UI back-end cursor
support, and fixes the issue of no visible mouse cursor when using one
which does not. (Such as virtio-vga)


Thanks for working on ui/cocoa, but I already have submitted a patch for 
this particular problem:

https://patchew.org/QEMU/20240318-cursor-v1-0-0bbe6c382...@daynix.com/

The difference between these patches is that my patch does not use 
warping at all. I thought reversing the mouse movement bias is a fragile 
approach that depends on the details of how Quartz works.

Re: [PATCH 2/3] hw: Moves int_clamp() implementations to header

[Akihiko Odaki]

On 2024/06/09 5:20, Phil Dennis-Jordan wrote:

Both hw/input/hid.c and hw/usb/dev-wacom.c define identical versions
(aside from code formatting) of a clamping function, int_clamp().
(marked inline) To avoid duplication and to enable further re-use, this
change moves the function into qemu/cutils.h.


Wht about replacing int_clamp(a, b, c) with MIN(MAX(a, b), c)? 
MIN(MAX(a, b), c) has a few advantages:

- It works with any integer types
  (so you can replace even uint_clamp() in hw/display/vga.c)
- It makes clear that b is the minimum value and c is the maximum value
  while it is not with int_clamp()
- It is already used in other places.

Re: [PATCH v3 05/13] hw/riscv: add riscv-iommu-pci reference device

[Frank Chang]

Hi Daniel,

Daniel Henrique Barboza  於 2024年5月24日 週五 上午1:42寫道：
>
> From: Tomasz Jeznach 
>
> The RISC-V IOMMU can be modelled as a PCIe device following the
> guidelines of the RISC-V IOMMU spec, chapter 7.1, "Integrating an IOMMU
> as a PCIe device".
>
> Signed-off-by: Tomasz Jeznach 
> Signed-off-by: Daniel Henrique Barboza 
> ---
>  hw/riscv/meson.build   |   2 +-
>  hw/riscv/riscv-iommu-pci.c | 177 +
>  2 files changed, 178 insertions(+), 1 deletion(-)
>  create mode 100644 hw/riscv/riscv-iommu-pci.c
>
> diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build
> index cbc99c6e8e..adbef8a9b2 100644
> --- a/hw/riscv/meson.build
> +++ b/hw/riscv/meson.build
> @@ -10,6 +10,6 @@ riscv_ss.add(when: 'CONFIG_SIFIVE_U', if_true: 
> files('sifive_u.c'))
>  riscv_ss.add(when: 'CONFIG_SPIKE', if_true: files('spike.c'))
>  riscv_ss.add(when: 'CONFIG_MICROCHIP_PFSOC', if_true: 
> files('microchip_pfsoc.c'))
>  riscv_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c'))
> -riscv_ss.add(when: 'CONFIG_RISCV_IOMMU', if_true: files('riscv-iommu.c'))
> +riscv_ss.add(when: 'CONFIG_RISCV_IOMMU', if_true: files('riscv-iommu.c', 
> 'riscv-iommu-pci.c'))
>
>  hw_arch += {'riscv': riscv_ss}
> diff --git a/hw/riscv/riscv-iommu-pci.c b/hw/riscv/riscv-iommu-pci.c
> new file mode 100644
> index 00..7635cc64ff
> --- /dev/null
> +++ b/hw/riscv/riscv-iommu-pci.c
> @@ -0,0 +1,177 @@
> +/*
> + * QEMU emulation of an RISC-V IOMMU
> + *
> + * Copyright (C) 2022-2023 Rivos Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License along
> + * with this program; if not, see .
> + */
> +
> +#include "qemu/osdep.h"
> +#include "hw/pci/msi.h"
> +#include "hw/pci/msix.h"
> +#include "hw/pci/pci_bus.h"
> +#include "hw/qdev-properties.h"
> +#include "hw/riscv/riscv_hart.h"
> +#include "migration/vmstate.h"
> +#include "qapi/error.h"
> +#include "qemu/error-report.h"
> +#include "qemu/host-utils.h"
> +#include "qom/object.h"
> +
> +#include "cpu_bits.h"
> +#include "riscv-iommu.h"
> +#include "riscv-iommu-bits.h"
> +
> +/* RISC-V IOMMU PCI Device Emulation */
> +
> +typedef struct RISCVIOMMUStatePci {
> +PCIDevicepci; /* Parent PCIe device state */
> +uint16_t vendor_id;
> +uint16_t device_id;
> +uint8_t  revision;
> +MemoryRegion bar0;/* PCI BAR (including MSI-x config) */
> +RISCVIOMMUState  iommu;   /* common IOMMU state */
> +} RISCVIOMMUStatePci;
> +
> +/* interrupt delivery callback */
> +static void riscv_iommu_pci_notify(RISCVIOMMUState *iommu, unsigned vector)
> +{
> +RISCVIOMMUStatePci *s = container_of(iommu, RISCVIOMMUStatePci, iommu);
> +
> +if (msix_enabled(&(s->pci))) {
> +msix_notify(&(s->pci), vector);
> +}
> +}
> +
> +static void riscv_iommu_pci_realize(PCIDevice *dev, Error **errp)
> +{
> +RISCVIOMMUStatePci *s = DO_UPCAST(RISCVIOMMUStatePci, pci, dev);
> +RISCVIOMMUState *iommu = &s->iommu;
> +uint8_t *pci_conf = dev->config;
> +Error *err = NULL;
> +
> +pci_set_word(pci_conf + PCI_VENDOR_ID, s->vendor_id);
> +pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID, s->vendor_id);
> +pci_set_word(pci_conf + PCI_DEVICE_ID, s->device_id);
> +pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, s->device_id);
> +pci_set_byte(pci_conf + PCI_REVISION_ID, s->revision);
> +
> +/* Set device id for trace / debug */
> +DEVICE(iommu)->id = g_strdup_printf("%02x:%02x.%01x",
> +pci_dev_bus_num(dev), PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
> +qdev_realize(DEVICE(iommu), NULL, errp);
> +
> +memory_region_init(&s->bar0, OBJECT(s), "riscv-iommu-bar0",
> +QEMU_ALIGN_UP(memory_region_size(&iommu->regs_mr), 
> TARGET_PAGE_SIZE));
> +memory_region_add_subregion(&s->bar0, 0, &iommu->regs_mr);
> +
> +pcie_endpoint_cap_init(dev, 0);
> +
> +pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
> + PCI_BASE_ADDRESS_MEM_TYPE_64, &s->bar0);
> +
> +int ret = msix_init(dev, RISCV_IOMMU_INTR_COUNT,
> +&s->bar0, 0, RISCV_IOMMU_REG_MSI_CONFIG,
> +&s->bar0, 0, RISCV_IOMMU_REG_MSI_CONFIG + 256, 0, 
> &err);
> +
> +if (ret == -ENOTSUP) {
> +/*
> + * MSI-x is not supported by the platform.
> + * Driver should use timer/polling based notification handlers.
> + */
> +warn_report_err(err);
> +} else if (

Re: [PATCH 1/3] Cursor: 8 -> 1 bit alpha downsampling improvement

[Akihiko Odaki]

On 2024/06/09 5:20, Phil Dennis-Jordan wrote:

Mouse cursors with 8 bit alpha were downsampled to 1-bit opacity maps by
turning alpha values of 255 into 1 and everything else into 0. This
means that mostly-opaque pixels ended up completely invisible.

This patch changes the behaviour so that only pixels with less than 50%
alpha (0-127) are treated as transparent when converted to 1-bit alpha.

This greatly improves the subjective appearance of anti-aliased mouse
cursors, such as those used by macOS, when using a front-end UI without
support for alpha-blended cursors, such as some VNC clients.

Signed-off-by: Phil Dennis-Jordan 
---
  ui/cursor.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ui/cursor.c b/ui/cursor.c
index 29717b3ecb..4c05ec 100644
--- a/ui/cursor.c
+++ b/ui/cursor.c
@@ -232,7 +232,7 @@ void cursor_get_mono_mask(QEMUCursor *c, int transparent, 
uint8_t *mask)
  for (y = 0; y < c->height; y++) {
  bit = 0x80;
  for (x = 0; x < c->width; x++, data++) {
-if ((*data & 0xff00) != 0xff00) {
+if ((*data & 0xff00) < 0x8000) {


You can just evaluate: !(*data & 0x8000)