[Qemu-devel] [PATCH] hw/char/cmsdk-apb-uart.c: Accept more input after character read
The character frontend needs to be notified that the uart receive buffer is empty and ready to handle another character. Previously, the uart only worked correctly when receiving one character at a time. Signed-off-by: Patrick Oppenlander <patrick.oppenlan...@gmail.com> --- hw/char/cmsdk-apb-uart.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/char/cmsdk-apb-uart.c b/hw/char/cmsdk-apb-uart.c index 9c0929d8a2..ddfbb25c24 100644 --- a/hw/char/cmsdk-apb-uart.c +++ b/hw/char/cmsdk-apb-uart.c @@ -157,6 +157,7 @@ static uint64_t uart_read(void *opaque, hwaddr offset, unsigned size) r = s->rxbuf; s->state &= ~R_STATE_RXFULL_MASK; cmsdk_apb_uart_update(s); +qemu_chr_fe_accept_input(>chr); break; case A_STATE: r = s->state; -- 2.17.0
Re: [Qemu-devel] [Bug 1760262] Re: cmsdk-apb-uart doesn't appear to clear interrupt flags
On Tue, Apr 10, 2018 at 11:45 PM, Peter Maydell <peter.mayd...@linaro.org> wrote: > > Thanks for the bug report; I've submitted this patch (which is similar to but > not quite the same as your fix): > https://patchwork.ozlabs.org/patch/896715/ > > Hopefully this will get into 2.12, but we're quite close to release now > so it will depend on whether we need to spin an extra release candidate > for some other reason. Thanks for looking into it. Patrick -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1760262 Title: cmsdk-apb-uart doesn't appear to clear interrupt flags Status in QEMU: In Progress Bug description: I have been writing a small operating system and using QEMU emulating the mps2-an385 board for some of my testing. During development of the uart driver I observed some odd behaviour with the TX interrupt -- writing a '1' to bit 0 of the INTCLEAR register doesn't clear the TX interrupt flag, and the interrupt fires continuously. It's possible that I have an error somewhere in my code, but after inspecting the QEMU source it does appear to be a QEMU bug. I applied the following patch and it solved my issue: From 9875839c144fa60a3772f16ae44d32685f9328aa Mon Sep 17 00:00:00 2001 From: Patrick Oppenlander <patrick.oppenlan...@gmail.com> Date: Sat, 31 Mar 2018 15:10:28 +1100 Subject: [PATCH] hw/char/cmsdk-apb-uart: fix clearing of interrupt flags --- hw/char/cmsdk-apb-uart.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/char/cmsdk-apb-uart.c b/hw/char/cmsdk-apb-uart.c index 1ad1e14295..64991bd9d7 100644 --- a/hw/char/cmsdk-apb-uart.c +++ b/hw/char/cmsdk-apb-uart.c @@ -274,6 +274,7 @@ static void uart_write(void *opaque, hwaddr offset, uint64_t value, * is then reflected into the intstatus value by the update function). */ s->state &= ~(value & (R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK)); +s->intstatus &= ~(value & ~(R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK)); cmsdk_apb_uart_update(s); break; case A_BAUDDIV: -- 2.16.2 To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1760262/+subscriptions
[Qemu-devel] [Bug 1760262] Re: cmsdk-apb-uart doesn't appear to clear interrupt flags
** Patch added: "0001-hw-char-cmsdk-apb-uart-fix-clearing-of-interrupt-fla.patch" https://bugs.launchpad.net/qemu/+bug/1760262/+attachment/5096702/+files/0001-hw-char-cmsdk-apb-uart-fix-clearing-of-interrupt-fla.patch -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1760262 Title: cmsdk-apb-uart doesn't appear to clear interrupt flags Status in QEMU: New Bug description: I have been writing a small operating system and using QEMU emulating the mps2-an385 board for some of my testing. During development of the uart driver I observed some odd behaviour with the TX interrupt -- writing a '1' to bit 0 of the INTCLEAR register doesn't clear the TX interrupt flag, and the interrupt fires continuously. It's possible that I have an error somewhere in my code, but after inspecting the QEMU source it does appear to be a QEMU bug. I applied the following patch and it solved my issue: From 9875839c144fa60a3772f16ae44d32685f9328aa Mon Sep 17 00:00:00 2001 From: Patrick Oppenlander <patrick.oppenlan...@gmail.com> Date: Sat, 31 Mar 2018 15:10:28 +1100 Subject: [PATCH] hw/char/cmsdk-apb-uart: fix clearing of interrupt flags --- hw/char/cmsdk-apb-uart.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/char/cmsdk-apb-uart.c b/hw/char/cmsdk-apb-uart.c index 1ad1e14295..64991bd9d7 100644 --- a/hw/char/cmsdk-apb-uart.c +++ b/hw/char/cmsdk-apb-uart.c @@ -274,6 +274,7 @@ static void uart_write(void *opaque, hwaddr offset, uint64_t value, * is then reflected into the intstatus value by the update function). */ s->state &= ~(value & (R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK)); +s->intstatus &= ~(value & ~(R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK)); cmsdk_apb_uart_update(s); break; case A_BAUDDIV: -- 2.16.2 To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1760262/+subscriptions
[Qemu-devel] [Bug 1760262] [NEW] cmsdk-apb-uart doesn't appear to clear interrupt flags
Public bug reported: I have been writing a small operating system and using QEMU emulating the mps2-an385 board for some of my testing. During development of the uart driver I observed some odd behaviour with the TX interrupt -- writing a '1' to bit 0 of the INTCLEAR register doesn't clear the TX interrupt flag, and the interrupt fires continuously. It's possible that I have an error somewhere in my code, but after inspecting the QEMU source it does appear to be a QEMU bug. I applied the following patch and it solved my issue: >From 9875839c144fa60a3772f16ae44d32685f9328aa Mon Sep 17 00:00:00 2001 From: Patrick Oppenlander <patrick.oppenlan...@gmail.com> Date: Sat, 31 Mar 2018 15:10:28 +1100 Subject: [PATCH] hw/char/cmsdk-apb-uart: fix clearing of interrupt flags --- hw/char/cmsdk-apb-uart.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/char/cmsdk-apb-uart.c b/hw/char/cmsdk-apb-uart.c index 1ad1e14295..64991bd9d7 100644 --- a/hw/char/cmsdk-apb-uart.c +++ b/hw/char/cmsdk-apb-uart.c @@ -274,6 +274,7 @@ static void uart_write(void *opaque, hwaddr offset, uint64_t value, * is then reflected into the intstatus value by the update function). */ s->state &= ~(value & (R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK)); +s->intstatus &= ~(value & ~(R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK)); cmsdk_apb_uart_update(s); break; case A_BAUDDIV: -- 2.16.2 ** Affects: qemu Importance: Undecided Status: New -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1760262 Title: cmsdk-apb-uart doesn't appear to clear interrupt flags Status in QEMU: New Bug description: I have been writing a small operating system and using QEMU emulating the mps2-an385 board for some of my testing. During development of the uart driver I observed some odd behaviour with the TX interrupt -- writing a '1' to bit 0 of the INTCLEAR register doesn't clear the TX interrupt flag, and the interrupt fires continuously. It's possible that I have an error somewhere in my code, but after inspecting the QEMU source it does appear to be a QEMU bug. I applied the following patch and it solved my issue: From 9875839c144fa60a3772f16ae44d32685f9328aa Mon Sep 17 00:00:00 2001 From: Patrick Oppenlander <patrick.oppenlan...@gmail.com> Date: Sat, 31 Mar 2018 15:10:28 +1100 Subject: [PATCH] hw/char/cmsdk-apb-uart: fix clearing of interrupt flags --- hw/char/cmsdk-apb-uart.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/char/cmsdk-apb-uart.c b/hw/char/cmsdk-apb-uart.c index 1ad1e14295..64991bd9d7 100644 --- a/hw/char/cmsdk-apb-uart.c +++ b/hw/char/cmsdk-apb-uart.c @@ -274,6 +274,7 @@ static void uart_write(void *opaque, hwaddr offset, uint64_t value, * is then reflected into the intstatus value by the update function). */ s->state &= ~(value & (R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK)); +s->intstatus &= ~(value & ~(R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK)); cmsdk_apb_uart_update(s); break; case A_BAUDDIV: -- 2.16.2 To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1760262/+subscriptions
[Qemu-devel] [Bug 1760262] Re: cmsdk-apb-uart doesn't appear to clear interrupt flags
Found in v2.12.0-rc1. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1760262 Title: cmsdk-apb-uart doesn't appear to clear interrupt flags Status in QEMU: New Bug description: I have been writing a small operating system and using QEMU emulating the mps2-an385 board for some of my testing. During development of the uart driver I observed some odd behaviour with the TX interrupt -- writing a '1' to bit 0 of the INTCLEAR register doesn't clear the TX interrupt flag, and the interrupt fires continuously. It's possible that I have an error somewhere in my code, but after inspecting the QEMU source it does appear to be a QEMU bug. I applied the following patch and it solved my issue: From 9875839c144fa60a3772f16ae44d32685f9328aa Mon Sep 17 00:00:00 2001 From: Patrick Oppenlander <patrick.oppenlan...@gmail.com> Date: Sat, 31 Mar 2018 15:10:28 +1100 Subject: [PATCH] hw/char/cmsdk-apb-uart: fix clearing of interrupt flags --- hw/char/cmsdk-apb-uart.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/char/cmsdk-apb-uart.c b/hw/char/cmsdk-apb-uart.c index 1ad1e14295..64991bd9d7 100644 --- a/hw/char/cmsdk-apb-uart.c +++ b/hw/char/cmsdk-apb-uart.c @@ -274,6 +274,7 @@ static void uart_write(void *opaque, hwaddr offset, uint64_t value, * is then reflected into the intstatus value by the update function). */ s->state &= ~(value & (R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK)); +s->intstatus &= ~(value & ~(R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK)); cmsdk_apb_uart_update(s); break; case A_BAUDDIV: -- 2.16.2 To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1760262/+subscriptions
