Re: [PATCH] ppc/pnv: Update Power10's cfam id to use Power10 DD2
Hi Nick, On 23/07/24 09:48, Nicholas Piggin wrote: On Mon Jul 22, 2024 at 7:17 PM AEST, Aditya Gupta wrote: Hello, Any comments on this change ? Though this isn't urgent and won't change behaviour much, mainly other than skiboot recognising the chip as P10 DD2. Hey Aditya, Yeah I missed this in my last PR but I have it in my tree. Got it, thank you ! - Aditya Gupta Thanks, Nick Thanks - Aditya Gupta On 02/05/24 13:51, Cédric Le Goater wrote: On 5/2/24 08:27, Aditya Gupta wrote: Power10 DD1.0 was dropped in: commit 8f054d9ee825 ("ppc: Drop support for POWER9 and POWER10 DD1 chips") Use the newer Power10 DD2 chips cfam id. Cc: Cédric Le Goater Cc: David Gibson Cc: Frédéric Barrat Cc: Laurent Vivier Cc: Mahesh J Salgaonkar Cc: Madhavan Srinivasan Cc: Nicholas Piggin Cc: Paolo Bonzini Cc: Thomas Huth Signed-off-by: Aditya Gupta Reviewed-by: Cédric Le Goater Thanks, C. --- hw/ppc/pnv.c | 2 +- tests/qtest/pnv-xscom.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 6e3a5ccdec76..06a4e4d13948 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2090,7 +2090,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, void *data) PnvChipClass *k = PNV_CHIP_CLASS(klass); static const int i2c_ports_per_engine[PNV10_CHIP_MAX_I2C] = {14, 14, 2, 16}; - k->chip_cfam_id = 0x120da0498000ull; /* P10 DD1.0 (with NX) */ + k->chip_cfam_id = 0x220da0498000ull; /* P10 DD2.0 (with NX) */ k->cores_mask = POWER10_CORE_MASK; k->chip_pir = pnv_chip_pir_p10; k->intc_create = pnv_chip_power10_intc_create; diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h index 6f62941744a6..5aa1701ea768 100644 --- a/tests/qtest/pnv-xscom.h +++ b/tests/qtest/pnv-xscom.h @@ -56,7 +56,7 @@ static const PnvChip pnv_chips[] = { .chip_type = PNV_CHIP_POWER10, .cpu_model = "POWER10", .xscom_base = 0x000603fcull, - .cfam_id = 0x120da0498000ull, + .cfam_id = 0x220da0498000ull, .first_core = 0x0, .num_i2c = 4, },
Re: [PATCH] ppc/pnv: Update Power10's cfam id to use Power10 DD2
On Mon Jul 22, 2024 at 7:17 PM AEST, Aditya Gupta wrote: > Hello, > > Any comments on this change ? > > Though this isn't urgent and won't change behaviour much, mainly other > than skiboot recognising the chip as P10 DD2. Hey Aditya, Yeah I missed this in my last PR but I have it in my tree. Thanks, Nick > > > Thanks > > - Aditya Gupta > > > On 02/05/24 13:51, Cédric Le Goater wrote: > > > On 5/2/24 08:27, Aditya Gupta wrote: > >> Power10 DD1.0 was dropped in: > >> > >> commit 8f054d9ee825 ("ppc: Drop support for POWER9 and POWER10 > >> DD1 chips") > >> > >> Use the newer Power10 DD2 chips cfam id. > >> > >> Cc: Cédric Le Goater > >> Cc: David Gibson > >> Cc: Frédéric Barrat > >> Cc: Laurent Vivier > >> Cc: Mahesh J Salgaonkar > >> Cc: Madhavan Srinivasan > >> Cc: Nicholas Piggin > >> Cc: Paolo Bonzini > >> Cc: Thomas Huth > >> Signed-off-by: Aditya Gupta > > > > > > Reviewed-by: Cédric Le Goater > > > > Thanks, > > > > C. > > > > > >> --- > >> hw/ppc/pnv.c | 2 +- > >> tests/qtest/pnv-xscom.h | 2 +- > >> 2 files changed, 2 insertions(+), 2 deletions(-) > >> > >> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c > >> index 6e3a5ccdec76..06a4e4d13948 100644 > >> --- a/hw/ppc/pnv.c > >> +++ b/hw/ppc/pnv.c > >> @@ -2090,7 +2090,7 @@ static void > >> pnv_chip_power10_class_init(ObjectClass *klass, void *data) > >> PnvChipClass *k = PNV_CHIP_CLASS(klass); > >> static const int i2c_ports_per_engine[PNV10_CHIP_MAX_I2C] = > >> {14, 14, 2, 16}; > >> - k->chip_cfam_id = 0x120da0498000ull; /* P10 DD1.0 (with > >> NX) */ > >> + k->chip_cfam_id = 0x220da0498000ull; /* P10 DD2.0 (with NX) */ > >> k->cores_mask = POWER10_CORE_MASK; > >> k->chip_pir = pnv_chip_pir_p10; > >> k->intc_create = pnv_chip_power10_intc_create; > >> diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h > >> index 6f62941744a6..5aa1701ea768 100644 > >> --- a/tests/qtest/pnv-xscom.h > >> +++ b/tests/qtest/pnv-xscom.h > >> @@ -56,7 +56,7 @@ static const PnvChip pnv_chips[] = { > >> .chip_type = PNV_CHIP_POWER10, > >> .cpu_model = "POWER10", > >> .xscom_base = 0x000603fcull, > >> - .cfam_id = 0x120da0498000ull, > >> + .cfam_id = 0x220da0498000ull, > >> .first_core = 0x0, > >> .num_i2c = 4, > >> }, > >
Re: [PATCH] ppc/pnv: Update Power10's cfam id to use Power10 DD2
Hello, Any comments on this change ? Though this isn't urgent and won't change behaviour much, mainly other than skiboot recognising the chip as P10 DD2. Thanks - Aditya Gupta On 02/05/24 13:51, Cédric Le Goater wrote: On 5/2/24 08:27, Aditya Gupta wrote: Power10 DD1.0 was dropped in: commit 8f054d9ee825 ("ppc: Drop support for POWER9 and POWER10 DD1 chips") Use the newer Power10 DD2 chips cfam id. Cc: Cédric Le Goater Cc: David Gibson Cc: Frédéric Barrat Cc: Laurent Vivier Cc: Mahesh J Salgaonkar Cc: Madhavan Srinivasan Cc: Nicholas Piggin Cc: Paolo Bonzini Cc: Thomas Huth Signed-off-by: Aditya Gupta Reviewed-by: Cédric Le Goater Thanks, C. --- hw/ppc/pnv.c | 2 +- tests/qtest/pnv-xscom.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 6e3a5ccdec76..06a4e4d13948 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2090,7 +2090,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, void *data) PnvChipClass *k = PNV_CHIP_CLASS(klass); static const int i2c_ports_per_engine[PNV10_CHIP_MAX_I2C] = {14, 14, 2, 16}; - k->chip_cfam_id = 0x120da0498000ull; /* P10 DD1.0 (with NX) */ + k->chip_cfam_id = 0x220da0498000ull; /* P10 DD2.0 (with NX) */ k->cores_mask = POWER10_CORE_MASK; k->chip_pir = pnv_chip_pir_p10; k->intc_create = pnv_chip_power10_intc_create; diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h index 6f62941744a6..5aa1701ea768 100644 --- a/tests/qtest/pnv-xscom.h +++ b/tests/qtest/pnv-xscom.h @@ -56,7 +56,7 @@ static const PnvChip pnv_chips[] = { .chip_type = PNV_CHIP_POWER10, .cpu_model = "POWER10", .xscom_base = 0x000603fcull, - .cfam_id = 0x120da0498000ull, + .cfam_id = 0x220da0498000ull, .first_core = 0x0, .num_i2c = 4, },
Re: [PATCH] ppc/pnv: Update Power10's cfam id to use Power10 DD2
On 5/2/24 08:27, Aditya Gupta wrote: Power10 DD1.0 was dropped in: commit 8f054d9ee825 ("ppc: Drop support for POWER9 and POWER10 DD1 chips") Use the newer Power10 DD2 chips cfam id. Cc: Cédric Le Goater Cc: David Gibson Cc: Frédéric Barrat Cc: Laurent Vivier Cc: Mahesh J Salgaonkar Cc: Madhavan Srinivasan Cc: Nicholas Piggin Cc: Paolo Bonzini Cc: Thomas Huth Signed-off-by: Aditya Gupta Reviewed-by: Cédric Le Goater Thanks, C. --- hw/ppc/pnv.c| 2 +- tests/qtest/pnv-xscom.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 6e3a5ccdec76..06a4e4d13948 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2090,7 +2090,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, void *data) PnvChipClass *k = PNV_CHIP_CLASS(klass); static const int i2c_ports_per_engine[PNV10_CHIP_MAX_I2C] = {14, 14, 2, 16}; -k->chip_cfam_id = 0x120da0498000ull; /* P10 DD1.0 (with NX) */ +k->chip_cfam_id = 0x220da0498000ull; /* P10 DD2.0 (with NX) */ k->cores_mask = POWER10_CORE_MASK; k->chip_pir = pnv_chip_pir_p10; k->intc_create = pnv_chip_power10_intc_create; diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h index 6f62941744a6..5aa1701ea768 100644 --- a/tests/qtest/pnv-xscom.h +++ b/tests/qtest/pnv-xscom.h @@ -56,7 +56,7 @@ static const PnvChip pnv_chips[] = { .chip_type = PNV_CHIP_POWER10, .cpu_model = "POWER10", .xscom_base = 0x000603fcull, -.cfam_id= 0x120da0498000ull, +.cfam_id= 0x220da0498000ull, .first_core = 0x0, .num_i2c= 4, },
[PATCH] ppc/pnv: Update Power10's cfam id to use Power10 DD2
Power10 DD1.0 was dropped in: commit 8f054d9ee825 ("ppc: Drop support for POWER9 and POWER10 DD1 chips") Use the newer Power10 DD2 chips cfam id. Cc: Cédric Le Goater Cc: David Gibson Cc: Frédéric Barrat Cc: Laurent Vivier Cc: Mahesh J Salgaonkar Cc: Madhavan Srinivasan Cc: Nicholas Piggin Cc: Paolo Bonzini Cc: Thomas Huth Signed-off-by: Aditya Gupta --- hw/ppc/pnv.c| 2 +- tests/qtest/pnv-xscom.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 6e3a5ccdec76..06a4e4d13948 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2090,7 +2090,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, void *data) PnvChipClass *k = PNV_CHIP_CLASS(klass); static const int i2c_ports_per_engine[PNV10_CHIP_MAX_I2C] = {14, 14, 2, 16}; -k->chip_cfam_id = 0x120da0498000ull; /* P10 DD1.0 (with NX) */ +k->chip_cfam_id = 0x220da0498000ull; /* P10 DD2.0 (with NX) */ k->cores_mask = POWER10_CORE_MASK; k->chip_pir = pnv_chip_pir_p10; k->intc_create = pnv_chip_power10_intc_create; diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h index 6f62941744a6..5aa1701ea768 100644 --- a/tests/qtest/pnv-xscom.h +++ b/tests/qtest/pnv-xscom.h @@ -56,7 +56,7 @@ static const PnvChip pnv_chips[] = { .chip_type = PNV_CHIP_POWER10, .cpu_model = "POWER10", .xscom_base = 0x000603fcull, -.cfam_id= 0x120da0498000ull, +.cfam_id= 0x220da0498000ull, .first_core = 0x0, .num_i2c= 4, }, -- 2.44.0