Re: [PATCH] target/mips: add gdb xml files
On Wednesday, October 9, 2019, Mikhail Abakumov wrote: > Aleksandar Markovic писал 2019-10-08 16:37: > >> On Monday, October 7, 2019, Alex Bennée >> wrote: >> >> Mikhail Abakumov writes: >>> >>> From: Mikhail Abakumov >>> >>> Hmm the email got truncated here. >>> >>> This patch add xml files with gdb registers for mips. Signed-off-by: Mikhail Abakumov --- configure | 3 ++ gdb-xml/mips-core.xml | 84 >>> + >>> gdb-xml/mips64-core.xml | 84 + >>> >>> Otherwise for the configure/xml: >>> >>> Acked-by: Alex Bennée >>> >>> I assume the changes will go in via a MIPS tree. >>> >> >> Yes, this should go via mips tree. Thanks for taking a look. >> >> Mikhail, thanks for this effort. >> >> Is there any way to include MSA registers, possibly in a separate >> file, and in a separate patch? What about a separate file for FPU >> registers? Can you take a look at corresponding solutions for other >> architectures? >> > > Thanks for the feedback. > > Yes, I did it initially. But looking at other architectures, redid it. > Everywhere, one main xml-file is used for registers, described > in the target/gdbstub. And additional ones are appended through > 'gdb_register_coprocessor'. > In the current patch, I made a description of the registers described > only in the target/gdbstub. In the future, I think FPU registers > can be moved to a separate file, but then need to move them from > the mips/gdbstub. Mikhail, Your implementation assumes that 64-bit CPU always has 64-bit FPU, and 32-bit CPU - 32-bit FPU. However, that is not always true. Please see related patch for RISC-V: https://patchew.org/QEMU/20190821162831.27811-1-georg.kothei...@kernkonzept.com/ ... and correct your solution in a similar way. Keep also in mind that, in general, gdb xml support should work for all (or at least, almost all) QEMU-supported MIPS CPUs, not just the most common. For example, is your solution correct for R4000 CPU? Is the register layout the same for, for example, "ancient" R4000 and "moderm" I6400? Thanks again! Aleksandar > >> Yours, >> Aleksandar >> >> target/mips/cpu.c | 11 ++ 4 files changed, 182 insertions(+) create mode 100644 gdb-xml/mips-core.xml create mode 100644 gdb-xml/mips64-core.xml diff --git a/configure b/configure index 8f8446f52b..5bb2c62194 100755 --- a/configure +++ b/configure @@ -7466,12 +7466,14 @@ case "$target_name" in mips|mipsel) mttcg="yes" TARGET_ARCH=mips + gdb_xml_files="mips-core.xml" echo "TARGET_ABI_MIPSO32=y" >> $config_target_mak ;; mipsn32|mipsn32el) mttcg="yes" TARGET_ARCH=mips64 TARGET_BASE_ARCH=mips + gdb_xml_files="mips64-core.xml" echo "TARGET_ABI_MIPSN32=y" >> $config_target_mak echo "TARGET_ABI32=y" >> $config_target_mak ;; @@ -7479,6 +7481,7 @@ case "$target_name" in mttcg="yes" TARGET_ARCH=mips64 TARGET_BASE_ARCH=mips + gdb_xml_files="mips64-core.xml" echo "TARGET_ABI_MIPSN64=y" >> $config_target_mak ;; moxie) diff --git a/gdb-xml/mips-core.xml b/gdb-xml/mips-core.xml new file mode 100644 index 00..a46b2993eb --- /dev/null +++ b/gdb-xml/mips-core.xml @@ -0,0 +1,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb-xml/mips64-core.xml b/gdb-xml/mips64-core.xml new file mode 100644 index 00..cc1a15ad56 --- /dev/null +++ b/gdb-xml/mips64-core.xml @@ -0,0 +1,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/target/mips/cpu.c b/target/mips/cpu.c index bbcf7ca463..014f1db59e 100644 --- a/target/mips/cpu.c +++
Re: [PATCH] target/mips: add gdb xml files
Aleksandar Markovic писал 2019-10-08 16:37: On Monday, October 7, 2019, Alex Bennée wrote: Mikhail Abakumov writes: From: Mikhail Abakumov Hmm the email got truncated here. This patch add xml files with gdb registers for mips. Signed-off-by: Mikhail Abakumov --- configure | 3 ++ gdb-xml/mips-core.xml | 84 + gdb-xml/mips64-core.xml | 84 + Otherwise for the configure/xml: Acked-by: Alex Bennée I assume the changes will go in via a MIPS tree. Yes, this should go via mips tree. Thanks for taking a look. Mikhail, thanks for this effort. Is there any way to include MSA registers, possibly in a separate file, and in a separate patch? What about a separate file for FPU registers? Can you take a look at corresponding solutions for other architectures? Thanks for the feedback. Yes, I did it initially. But looking at other architectures, redid it. Everywhere, one main xml-file is used for registers, described in the target/gdbstub. And additional ones are appended through 'gdb_register_coprocessor'. In the current patch, I made a description of the registers described only in the target/gdbstub. In the future, I think FPU registers can be moved to a separate file, but then need to move them from the mips/gdbstub. Yours, Aleksandar target/mips/cpu.c | 11 ++ 4 files changed, 182 insertions(+) create mode 100644 gdb-xml/mips-core.xml create mode 100644 gdb-xml/mips64-core.xml diff --git a/configure b/configure index 8f8446f52b..5bb2c62194 100755 --- a/configure +++ b/configure @@ -7466,12 +7466,14 @@ case "$target_name" in mips|mipsel) mttcg="yes" TARGET_ARCH=mips + gdb_xml_files="mips-core.xml" echo "TARGET_ABI_MIPSO32=y" >> $config_target_mak ;; mipsn32|mipsn32el) mttcg="yes" TARGET_ARCH=mips64 TARGET_BASE_ARCH=mips + gdb_xml_files="mips64-core.xml" echo "TARGET_ABI_MIPSN32=y" >> $config_target_mak echo "TARGET_ABI32=y" >> $config_target_mak ;; @@ -7479,6 +7481,7 @@ case "$target_name" in mttcg="yes" TARGET_ARCH=mips64 TARGET_BASE_ARCH=mips + gdb_xml_files="mips64-core.xml" echo "TARGET_ABI_MIPSN64=y" >> $config_target_mak ;; moxie) diff --git a/gdb-xml/mips-core.xml b/gdb-xml/mips-core.xml new file mode 100644 index 00..a46b2993eb --- /dev/null +++ b/gdb-xml/mips-core.xml @@ -0,0 +1,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb-xml/mips64-core.xml b/gdb-xml/mips64-core.xml new file mode 100644 index 00..cc1a15ad56 --- /dev/null +++ b/gdb-xml/mips64-core.xml @@ -0,0 +1,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/target/mips/cpu.c b/target/mips/cpu.c index bbcf7ca463..014f1db59e 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -181,6 +181,11 @@ static ObjectClass *mips_cpu_class_by_name(const char *cpu_model) return oc; } +static gchar *mips_gdb_arch_name(CPUState *cs) +{ + return g_strdup("mips"); +} + static void mips_cpu_class_init(ObjectClass *c, void *data) { MIPSCPUClass *mcc = MIPS_CPU_CLASS(c); @@ -213,6 +218,12 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->tlb_fill = mips_cpu_tlb_fill; #endif + cc->gdb_arch_name = mips_gdb_arch_name; +#ifdef TARGET_MIPS64 + cc->gdb_core_xml_file = "mips64-core.xml"; +#else + cc->gdb_core_xml_file = "mips-core.xml"; +#endif cc->gdb_num_core_regs = 73; cc->gdb_stop_before_watchpoint = true; } -- Alex Bennée -- Mikhail Abakumov
Re: [PATCH] target/mips: add gdb xml files
On Monday, October 7, 2019, Alex Bennée wrote: > > Mikhail Abakumov writes: > > > From: Mikhail Abakumov > > Hmm the email got truncated here. > > > > > This patch add xml files with gdb registers for mips. > > > > Signed-off-by: Mikhail Abakumov > > --- > > configure | 3 ++ > > gdb-xml/mips-core.xml | 84 + > > gdb-xml/mips64-core.xml | 84 > > + > > Otherwise for the configure/xml: > > Acked-by: Alex Bennée > > I assume the changes will go in via a MIPS tree. > > Yes, this should go via mips tree. Thanks for taking a look. Mikhail, thanks for this effort. Is there any way to include MSA registers, possibly in a separate file, and in a separate patch? What about a separate file for FPU registers? Can you take a look at corresponding solutions for other architectures? Yours, Aleksandar > > target/mips/cpu.c | 11 ++ > > 4 files changed, 182 insertions(+) > > create mode 100644 gdb-xml/mips-core.xml > > create mode 100644 gdb-xml/mips64-core.xml > > > > diff --git a/configure b/configure > > index 8f8446f52b..5bb2c62194 100755 > > --- a/configure > > +++ b/configure > > @@ -7466,12 +7466,14 @@ case "$target_name" in > >mips|mipsel) > > mttcg="yes" > > TARGET_ARCH=mips > > +gdb_xml_files="mips-core.xml" > > echo "TARGET_ABI_MIPSO32=y" >> $config_target_mak > >;; > >mipsn32|mipsn32el) > > mttcg="yes" > > TARGET_ARCH=mips64 > > TARGET_BASE_ARCH=mips > > +gdb_xml_files="mips64-core.xml" > > echo "TARGET_ABI_MIPSN32=y" >> $config_target_mak > > echo "TARGET_ABI32=y" >> $config_target_mak > >;; > > @@ -7479,6 +7481,7 @@ case "$target_name" in > > mttcg="yes" > > TARGET_ARCH=mips64 > > TARGET_BASE_ARCH=mips > > +gdb_xml_files="mips64-core.xml" > > echo "TARGET_ABI_MIPSN64=y" >> $config_target_mak > >;; > >moxie) > > diff --git a/gdb-xml/mips-core.xml b/gdb-xml/mips-core.xml > > new file mode 100644 > > index 00..a46b2993eb > > --- /dev/null > > +++ b/gdb-xml/mips-core.xml > > @@ -0,0 +1,84 @@ > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > diff --git a/gdb-xml/mips64-core.xml b/gdb-xml/mips64-core.xml > > new file mode 100644 > > index 00..cc1a15ad56 > > --- /dev/null > > +++ b/gdb-xml/mips64-core.xml > > @@ -0,0 +1,84 @@ > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > diff --git a/target/mips/cpu.c b/target/mips/cpu.c > > index bbcf7ca463..014f1db59e 100644 > > --- a/target/mips/cpu.c > > +++ b/target/mips/cpu.c > > @@ -181,6 +181,11 @@ static ObjectClass *mips_cpu_class_by_name(const > > char *cpu_model) > > return oc; > > } > > > > +static gchar *mips_gdb_arch_name(CPUState *cs) > > +{ > > +return g_strdup("mips"); > > +} > > + > > static void mips_cpu_class_init(ObjectClass *c, void *data) > > { > > MIPSCPUClass *mcc = MIPS_CPU_CLASS(c); > > @@ -213,6 +218,12 @@ static void mips_cpu_class_init(ObjectClass *c, > > void *data) > > cc->tlb_fill = mips_cpu_tlb_fill; > > #endif > > > > +cc->gdb_arch_name = mips_gdb_arch_name; > > +#ifdef TARGET_MIPS64 > > +cc->gdb_core_xml_file = "mips64-core.xml"; > > +#else > > +cc->gdb_core_xml_file = "mips-core.xml"; > > +#endif > > cc->gdb_num_core_regs = 73; > > cc->gdb_stop_before_watchpoint = true; > > } > > > -- > Alex Bennée > >
Re: [PATCH] target/mips: add gdb xml files
Mikhail Abakumov writes: > From: Mikhail Abakumov Hmm the email got truncated here. > > This patch add xml files with gdb registers for mips. > > Signed-off-by: Mikhail Abakumov > --- > configure | 3 ++ > gdb-xml/mips-core.xml | 84 + > gdb-xml/mips64-core.xml | 84 > + Otherwise for the configure/xml: Acked-by: Alex Bennée I assume the changes will go in via a MIPS tree. > target/mips/cpu.c | 11 ++ > 4 files changed, 182 insertions(+) > create mode 100644 gdb-xml/mips-core.xml > create mode 100644 gdb-xml/mips64-core.xml > > diff --git a/configure b/configure > index 8f8446f52b..5bb2c62194 100755 > --- a/configure > +++ b/configure > @@ -7466,12 +7466,14 @@ case "$target_name" in >mips|mipsel) > mttcg="yes" > TARGET_ARCH=mips > +gdb_xml_files="mips-core.xml" > echo "TARGET_ABI_MIPSO32=y" >> $config_target_mak >;; >mipsn32|mipsn32el) > mttcg="yes" > TARGET_ARCH=mips64 > TARGET_BASE_ARCH=mips > +gdb_xml_files="mips64-core.xml" > echo "TARGET_ABI_MIPSN32=y" >> $config_target_mak > echo "TARGET_ABI32=y" >> $config_target_mak >;; > @@ -7479,6 +7481,7 @@ case "$target_name" in > mttcg="yes" > TARGET_ARCH=mips64 > TARGET_BASE_ARCH=mips > +gdb_xml_files="mips64-core.xml" > echo "TARGET_ABI_MIPSN64=y" >> $config_target_mak >;; >moxie) > diff --git a/gdb-xml/mips-core.xml b/gdb-xml/mips-core.xml > new file mode 100644 > index 00..a46b2993eb > --- /dev/null > +++ b/gdb-xml/mips-core.xml > @@ -0,0 +1,84 @@ > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > diff --git a/gdb-xml/mips64-core.xml b/gdb-xml/mips64-core.xml > new file mode 100644 > index 00..cc1a15ad56 > --- /dev/null > +++ b/gdb-xml/mips64-core.xml > @@ -0,0 +1,84 @@ > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > diff --git a/target/mips/cpu.c b/target/mips/cpu.c > index bbcf7ca463..014f1db59e 100644 > --- a/target/mips/cpu.c > +++ b/target/mips/cpu.c > @@ -181,6 +181,11 @@ static ObjectClass *mips_cpu_class_by_name(const > char *cpu_model) > return oc; > } > > +static gchar *mips_gdb_arch_name(CPUState *cs) > +{ > +return g_strdup("mips"); > +} > + > static void mips_cpu_class_init(ObjectClass *c, void *data) > { > MIPSCPUClass *mcc = MIPS_CPU_CLASS(c); > @@ -213,6 +218,12 @@ static void mips_cpu_class_init(ObjectClass *c, > void *data) > cc->tlb_fill = mips_cpu_tlb_fill; > #endif > > +cc->gdb_arch_name = mips_gdb_arch_name; > +#ifdef TARGET_MIPS64 > +cc->gdb_core_xml_file = "mips64-core.xml"; > +#else > +cc->gdb_core_xml_file = "mips-core.xml"; > +#endif > cc->gdb_num_core_regs = 73; > cc->gdb_stop_before_watchpoint = true; > } -- Alex Bennée
[PATCH] target/mips: add gdb xml files
From: Mikhail Abakumov This patch add xml files with gdb registers for mips. Signed-off-by: Mikhail Abakumov --- configure | 3 ++ gdb-xml/mips-core.xml | 84 + gdb-xml/mips64-core.xml | 84 + target/mips/cpu.c | 11 ++ 4 files changed, 182 insertions(+) create mode 100644 gdb-xml/mips-core.xml create mode 100644 gdb-xml/mips64-core.xml diff --git a/configure b/configure index 8f8446f52b..5bb2c62194 100755 --- a/configure +++ b/configure @@ -7466,12 +7466,14 @@ case "$target_name" in mips|mipsel) mttcg="yes" TARGET_ARCH=mips +gdb_xml_files="mips-core.xml" echo "TARGET_ABI_MIPSO32=y" >> $config_target_mak ;; mipsn32|mipsn32el) mttcg="yes" TARGET_ARCH=mips64 TARGET_BASE_ARCH=mips +gdb_xml_files="mips64-core.xml" echo "TARGET_ABI_MIPSN32=y" >> $config_target_mak echo "TARGET_ABI32=y" >> $config_target_mak ;; @@ -7479,6 +7481,7 @@ case "$target_name" in mttcg="yes" TARGET_ARCH=mips64 TARGET_BASE_ARCH=mips +gdb_xml_files="mips64-core.xml" echo "TARGET_ABI_MIPSN64=y" >> $config_target_mak ;; moxie) diff --git a/gdb-xml/mips-core.xml b/gdb-xml/mips-core.xml new file mode 100644 index 00..a46b2993eb --- /dev/null +++ b/gdb-xml/mips-core.xml @@ -0,0 +1,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb-xml/mips64-core.xml b/gdb-xml/mips64-core.xml new file mode 100644 index 00..cc1a15ad56 --- /dev/null +++ b/gdb-xml/mips64-core.xml @@ -0,0 +1,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/target/mips/cpu.c b/target/mips/cpu.c index bbcf7ca463..014f1db59e 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -181,6 +181,11 @@ static ObjectClass *mips_cpu_class_by_name(const char *cpu_model) return oc; } +static gchar *mips_gdb_arch_name(CPUState *cs) +{ +return g_strdup("mips"); +} + static void mips_cpu_class_init(ObjectClass *c, void *data) { MIPSCPUClass *mcc = MIPS_CPU_CLASS(c); @@ -213,6 +218,12 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->tlb_fill = mips_cpu_tlb_fill; #endif +cc->gdb_arch_name = mips_gdb_arch_name; +#ifdef TARGET_MIPS64 +cc->gdb_core_xml_file = "mips64-core.xml"; +#else +cc->gdb_core_xml_file = "mips-core.xml"; +#endif cc->gdb_num_core_regs = 73; cc->gdb_stop_before_watchpoint = true; } -- 2.17.1