Move the registers handled by the mmio_ops struct into the NeXTPC
device. This allows us to also move the scr1 and scr2 data fields.
Signed-off-by: Peter Maydell
---
hw/m68k/next-cube.c | 80 +
1 file changed, 44 insertions(+), 36 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index dccf3eb4313..ff121143e92 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -84,9 +84,6 @@ struct NeXTState {
qemu_irq scsi_reset;
qemu_irq *fd_irq;
-uint32_t scr1;
-uint32_t scr2;
-
NextRtc rtc;
};
@@ -98,6 +95,11 @@ struct NeXTPC {
/* Temporary until all functionality has been moved into this device */
NeXTState *ns;
+
+MemoryRegion mmiomem;
+
+uint32_t scr1;
+uint32_t scr2;
};
/* Thanks to NeXT forums for this */
@@ -120,13 +122,13 @@ static const uint8_t rtc_ram2[32] = {
#define SCR2_RTDATA 0x4
#define SCR2_TOBCD(x) (((x / 10) << 4) + (x % 10))
-static void nextscr2_write(NeXTState *s, uint32_t val, int size)
+static void nextscr2_write(NeXTPC *s, uint32_t val, int size)
{
static int led;
static int phase;
static uint8_t old_scr2;
uint8_t scr2_2;
-NextRtc *rtc = &s->rtc;
+NextRtc *rtc = &s->ns->rtc;
if (size == 4) {
scr2_2 = (val >> 8) & 0xFF;
@@ -238,7 +240,7 @@ static void nextscr2_write(NeXTState *s, uint32_t val, int
size)
/* clear FTU */
if (rtc->value & 0x04) {
rtc->status = rtc->status & (~0x18);
-s->int_status = s->int_status & (~0x04);
+s->ns->int_status = s->ns->int_status & (~0x04);
}
}
}
@@ -254,7 +256,7 @@ static void nextscr2_write(NeXTState *s, uint32_t val, int
size)
old_scr2 = scr2_2;
}
-static uint32_t mmio_readb(NeXTState *s, hwaddr addr)
+static uint32_t mmio_readb(NeXTPC *s, hwaddr addr)
{
switch (addr) {
case 0xc000:
@@ -284,7 +286,7 @@ static uint32_t mmio_readb(NeXTState *s, hwaddr addr)
}
}
-static uint32_t mmio_readw(NeXTState *s, hwaddr addr)
+static uint32_t mmio_readw(NeXTPC *s, hwaddr addr)
{
switch (addr) {
default:
@@ -293,16 +295,16 @@ static uint32_t mmio_readw(NeXTState *s, hwaddr addr)
}
}
-static uint32_t mmio_readl(NeXTState *s, hwaddr addr)
+static uint32_t mmio_readl(NeXTPC *s, hwaddr addr)
{
switch (addr) {
case 0x7000:
-/* DPRINTF("Read INT status: %x\n", s->int_status); */
-return s->int_status;
+/* DPRINTF("Read INT status: %x\n", s->ns->int_status); */
+return s->ns->int_status;
case 0x7800:
-DPRINTF("MMIO Read INT mask: %x\n", s->int_mask);
-return s->int_mask;
+DPRINTF("MMIO Read INT mask: %x\n", s->ns->int_mask);
+return s->ns->int_mask;
case 0xc000:
return s->scr1;
@@ -316,7 +318,7 @@ static uint32_t mmio_readl(NeXTState *s, hwaddr addr)
}
}
-static void mmio_writeb(NeXTState *s, hwaddr addr, uint32_t val)
+static void mmio_writeb(NeXTPC *s, hwaddr addr, uint32_t val)
{
switch (addr) {
case 0xd003:
@@ -328,21 +330,21 @@ static void mmio_writeb(NeXTState *s, hwaddr addr,
uint32_t val)
}
-static void mmio_writew(NeXTState *s, hwaddr addr, uint32_t val)
+static void mmio_writew(NeXTPC *s, hwaddr addr, uint32_t val)
{
DPRINTF("MMIO Write W\n");
}
-static void mmio_writel(NeXTState *s, hwaddr addr, uint32_t val)
+static void mmio_writel(NeXTPC *s, hwaddr addr, uint32_t val)
{
switch (addr) {
case 0x7000:
-DPRINTF("INT Status old: %x new: %x\n", s->int_status, val);
-s->int_status = val;
+DPRINTF("INT Status old: %x new: %x\n", s->ns->int_status, val);
+s->ns->int_status = val;
break;
case 0x7800:
-DPRINTF("INT Mask old: %x new: %x\n", s->int_mask, val);
-s->int_mask = val;
+DPRINTF("INT Mask old: %x new: %x\n", s->ns->int_mask, val);
+s->ns->int_mask = val;
break;
case 0xc000:
DPRINTF("SCR1 Write: %x\n", val);
@@ -358,15 +360,15 @@ static void mmio_writel(NeXTState *s, hwaddr addr,
uint32_t val)
static uint64_t mmio_readfn(void *opaque, hwaddr addr, unsigned size)
{
-NeXTState *ns = NEXT_MACHINE(opaque);
+NeXTPC *s = NEXT_PC(opaque);
switch (size) {
case 1:
-return mmio_readb(ns, addr);
+return mmio_readb(s, addr);
case 2:
-return mmio_readw(ns, addr);
+return mmio_readw(s, addr);
case 4:
-return mmio_readl(ns, addr);
+return mmio_readl(s, addr);
default:
g_assert_not_reached();
}
@@ -375,17 +377,17 @@ static uint64_t mmio_readfn(void *opaque, hwaddr addr,
unsigned size)
static void mmio_writefn(void *opaque, hwaddr addr, uint64_t value,
unsigned size)
{
-NeXTState *ns = NEXT_MACHINE(opaque);
+NeXTPC *s = NEXT_
