[PATCH 1/2] riscv: opentitan: fixup plic stride len
From: Wilfred Mallawa The following change was made to rectify incorrectly set stride length on the PLIC. Where it should be 32bit and not 24bit (0x18). This was discovered whilst attempting to fix a bug where a timer_interrupt was not serviced on TockOS-OpenTitan. Signed-off-by: Wilfred Mallawa --- hw/riscv/opentitan.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index c531450b9f..5144845567 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -160,7 +160,7 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) qdev_prop_set_uint32(DEVICE(&s->plic), "priority-base", 0x00); qdev_prop_set_uint32(DEVICE(&s->plic), "pending-base", 0x1000); qdev_prop_set_uint32(DEVICE(&s->plic), "enable-base", 0x2000); -qdev_prop_set_uint32(DEVICE(&s->plic), "enable-stride", 0x18); +qdev_prop_set_uint32(DEVICE(&s->plic), "enable-stride", 32); qdev_prop_set_uint32(DEVICE(&s->plic), "context-base", 0x20); qdev_prop_set_uint32(DEVICE(&s->plic), "context-stride", 8); qdev_prop_set_uint32(DEVICE(&s->plic), "aperture-size", memmap[IBEX_DEV_PLIC].size); -- 2.34.1
Re: [PATCH 1/2] riscv: opentitan: fixup plic stride len
On Mon, Jan 10, 2022 at 4:13 PM Alistair Francis wrote: > > From: Wilfred Mallawa > > The following change was made to rectify incorrectly set stride length > on the PLIC. Where it should be 32bit and not 24bit (0x18). This was > discovered whilst attempting to fix a bug where a timer_interrupt was > not serviced on TockOS-OpenTitan. > > Signed-off-by: Wilfred Mallawa Reviewed-by: Alistair Francis Tested-by: Alistair Francis Alistair > --- > hw/riscv/opentitan.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c > index c531450b9f..5144845567 100644 > --- a/hw/riscv/opentitan.c > +++ b/hw/riscv/opentitan.c > @@ -160,7 +160,7 @@ static void lowrisc_ibex_soc_realize(DeviceState > *dev_soc, Error **errp) > qdev_prop_set_uint32(DEVICE(&s->plic), "priority-base", 0x00); > qdev_prop_set_uint32(DEVICE(&s->plic), "pending-base", 0x1000); > qdev_prop_set_uint32(DEVICE(&s->plic), "enable-base", 0x2000); > -qdev_prop_set_uint32(DEVICE(&s->plic), "enable-stride", 0x18); > +qdev_prop_set_uint32(DEVICE(&s->plic), "enable-stride", 32); > qdev_prop_set_uint32(DEVICE(&s->plic), "context-base", 0x20); > qdev_prop_set_uint32(DEVICE(&s->plic), "context-stride", 8); > qdev_prop_set_uint32(DEVICE(&s->plic), "aperture-size", > memmap[IBEX_DEV_PLIC].size); > -- > 2.34.1 >
Re: [PATCH 1/2] riscv: opentitan: fixup plic stride len
On Mon, Jan 10, 2022 at 2:13 PM Alistair Francis wrote: > > From: Wilfred Mallawa > > The following change was made to rectify incorrectly set stride length > on the PLIC. Where it should be 32bit and not 24bit (0x18). This was PLIC [1] > discovered whilst attempting to fix a bug where a timer_interrupt was > not serviced on TockOS-OpenTitan. > [1] https://docs.opentitan.org/hw/top_earlgrey/ip_autogen/rv_plic/doc/ > Signed-off-by: Wilfred Mallawa > --- > hw/riscv/opentitan.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Bin Meng
Re: [PATCH 1/2] riscv: opentitan: fixup plic stride len
On Mon, 2022-01-10 at 15:34 +0800, Bin Meng wrote: > CAUTION: This email originated from outside of Western Digital. Do > not click on links or open attachments unless you recognize the > sender and know that the content is safe. > > > On Mon, Jan 10, 2022 at 2:13 PM Alistair Francis > wrote: > > > > From: Wilfred Mallawa > > > > The following change was made to rectify incorrectly set stride > > length > > on the PLIC. Where it should be 32bit and not 24bit (0x18). This > > was > > PLIC [1] Thanks, will add this in. > > > discovered whilst attempting to fix a bug where a timer_interrupt > > was > > not serviced on TockOS-OpenTitan. > > > > [1] > https://docs.opentitan.org/hw/top_earlgrey/ip_autogen/rv_plic/doc/ > > > Signed-off-by: Wilfred Mallawa > > --- > > hw/riscv/opentitan.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > Reviewed-by: Bin Meng
