Re: [PATCH 19/24] riscv: Fix to put "riscv.hart_array" devices on sysbus
On Sun, May 17, 2020 at 10:16 PM Markus Armbruster wrote: > > riscv_sifive_e_soc_init(), riscv_sifive_u_soc_init(), > spike_board_init(), spike_v1_10_0_board_init(), > spike_v1_09_1_board_init(), and riscv_virt_board_init() create > "riscv-hart_array" sysbus devices in a way that leaves them unplugged. > > Create them the common way that puts them into the main system bus. > Affects machines sifive_e, sifive_u, spike, spike_v1.10, spike_v1.9.1, > and virt. Visible in "info qtree", here's the change for sifive_e: > > bus: main-system-bus >type System > + dev: riscv.hart_array, id "" > +num-harts = 1 (0x1) > +hartid-base = 0 (0x0) > +cpu-type = "sifive-e31-riscv-cpu" >dev: sifive_soc.gpio, id "" > > Cc: Palmer Dabbelt > Cc: Alistair Francis > Cc: Sagar Karandikar > Cc: Bastian Koppelmann > Cc: qemu-ri...@nongnu.org > Signed-off-by: Markus Armbruster Reviewed-by: Alistair Francis Alistair > --- > hw/riscv/sifive_e.c | 5 ++--- > hw/riscv/sifive_u.c | 14 ++ > hw/riscv/spike.c| 12 ++-- > hw/riscv/virt.c | 4 ++-- > 4 files changed, 16 insertions(+), 19 deletions(-) > > diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c > index b53109521e..8831e6728e 100644 > --- a/hw/riscv/sifive_e.c > +++ b/hw/riscv/sifive_e.c > @@ -120,9 +120,8 @@ static void riscv_sifive_e_soc_init(Object *obj) > MachineState *ms = MACHINE(qdev_get_machine()); > SiFiveESoCState *s = RISCV_E_SOC(obj); > > -object_initialize_child(obj, "cpus", &s->cpus, > -sizeof(s->cpus), TYPE_RISCV_HART_ARRAY, > -&error_abort, NULL); > +sysbus_init_child_obj(obj, "cpus", &s->cpus, > + sizeof(s->cpus), TYPE_RISCV_HART_ARRAY); > object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts", > &error_abort); > sysbus_init_child_obj(obj, "riscv.sifive.e.gpio0", > diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c > index 4299bdf480..bb69fd8e48 100644 > --- a/hw/riscv/sifive_u.c > +++ b/hw/riscv/sifive_u.c > @@ -491,10 +491,9 @@ static void riscv_sifive_u_soc_init(Object *obj) > &error_abort, NULL); > qdev_prop_set_uint32(DEVICE(&s->e_cluster), "cluster-id", 0); > > -object_initialize_child(OBJECT(&s->e_cluster), "e-cpus", > -&s->e_cpus, sizeof(s->e_cpus), > -TYPE_RISCV_HART_ARRAY, &error_abort, > -NULL); > +sysbus_init_child_obj(OBJECT(&s->e_cluster), "e-cpus", > + &s->e_cpus, sizeof(s->e_cpus), > + TYPE_RISCV_HART_ARRAY); > qdev_prop_set_uint32(DEVICE(&s->e_cpus), "num-harts", 1); > qdev_prop_set_uint32(DEVICE(&s->e_cpus), "hartid-base", 0); > qdev_prop_set_string(DEVICE(&s->e_cpus), "cpu-type", SIFIVE_E_CPU); > @@ -504,10 +503,9 @@ static void riscv_sifive_u_soc_init(Object *obj) > &error_abort, NULL); > qdev_prop_set_uint32(DEVICE(&s->u_cluster), "cluster-id", 1); > > -object_initialize_child(OBJECT(&s->u_cluster), "u-cpus", > -&s->u_cpus, sizeof(s->u_cpus), > -TYPE_RISCV_HART_ARRAY, &error_abort, > -NULL); > +sysbus_init_child_obj(OBJECT(&s->u_cluster), "u-cpus", > + &s->u_cpus, sizeof(s->u_cpus), > + TYPE_RISCV_HART_ARRAY); > qdev_prop_set_uint32(DEVICE(&s->u_cpus), "num-harts", ms->smp.cpus - 1); > qdev_prop_set_uint32(DEVICE(&s->u_cpus), "hartid-base", 1); > qdev_prop_set_string(DEVICE(&s->u_cpus), "cpu-type", SIFIVE_U_CPU); > diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c > index d0c4843712..01d52e758e 100644 > --- a/hw/riscv/spike.c > +++ b/hw/riscv/spike.c > @@ -169,8 +169,8 @@ static void spike_board_init(MachineState *machine) > unsigned int smp_cpus = machine->smp.cpus; > > /* Initialize SOC */ > -object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), > -TYPE_RISCV_HART_ARRAY, &error_abort, NULL); > +sysbus_init_child_obj(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), > + TYPE_RISCV_HART_ARRAY); > object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", > &error_abort); > object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", > @@ -275,8 +275,8 @@ static void spike_v1_10_0_board_init(MachineState > *machine) > } > > /* Initialize SOC */ > -object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), > -TYPE_RISCV_HART_ARRAY, &error_abort, NULL); > +sysbus_init_child_obj(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), > + TYPE_RISCV_HART_ARRAY); > object_property_set_str(OBJECT(&s->soc), SPIKE
[PATCH 19/24] riscv: Fix to put "riscv.hart_array" devices on sysbus
riscv_sifive_e_soc_init(), riscv_sifive_u_soc_init(), spike_board_init(), spike_v1_10_0_board_init(), spike_v1_09_1_board_init(), and riscv_virt_board_init() create "riscv-hart_array" sysbus devices in a way that leaves them unplugged. Create them the common way that puts them into the main system bus. Affects machines sifive_e, sifive_u, spike, spike_v1.10, spike_v1.9.1, and virt. Visible in "info qtree", here's the change for sifive_e: bus: main-system-bus type System + dev: riscv.hart_array, id "" +num-harts = 1 (0x1) +hartid-base = 0 (0x0) +cpu-type = "sifive-e31-riscv-cpu" dev: sifive_soc.gpio, id "" Cc: Palmer Dabbelt Cc: Alistair Francis Cc: Sagar Karandikar Cc: Bastian Koppelmann Cc: qemu-ri...@nongnu.org Signed-off-by: Markus Armbruster --- hw/riscv/sifive_e.c | 5 ++--- hw/riscv/sifive_u.c | 14 ++ hw/riscv/spike.c| 12 ++-- hw/riscv/virt.c | 4 ++-- 4 files changed, 16 insertions(+), 19 deletions(-) diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index b53109521e..8831e6728e 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -120,9 +120,8 @@ static void riscv_sifive_e_soc_init(Object *obj) MachineState *ms = MACHINE(qdev_get_machine()); SiFiveESoCState *s = RISCV_E_SOC(obj); -object_initialize_child(obj, "cpus", &s->cpus, -sizeof(s->cpus), TYPE_RISCV_HART_ARRAY, -&error_abort, NULL); +sysbus_init_child_obj(obj, "cpus", &s->cpus, + sizeof(s->cpus), TYPE_RISCV_HART_ARRAY); object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts", &error_abort); sysbus_init_child_obj(obj, "riscv.sifive.e.gpio0", diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 4299bdf480..bb69fd8e48 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -491,10 +491,9 @@ static void riscv_sifive_u_soc_init(Object *obj) &error_abort, NULL); qdev_prop_set_uint32(DEVICE(&s->e_cluster), "cluster-id", 0); -object_initialize_child(OBJECT(&s->e_cluster), "e-cpus", -&s->e_cpus, sizeof(s->e_cpus), -TYPE_RISCV_HART_ARRAY, &error_abort, -NULL); +sysbus_init_child_obj(OBJECT(&s->e_cluster), "e-cpus", + &s->e_cpus, sizeof(s->e_cpus), + TYPE_RISCV_HART_ARRAY); qdev_prop_set_uint32(DEVICE(&s->e_cpus), "num-harts", 1); qdev_prop_set_uint32(DEVICE(&s->e_cpus), "hartid-base", 0); qdev_prop_set_string(DEVICE(&s->e_cpus), "cpu-type", SIFIVE_E_CPU); @@ -504,10 +503,9 @@ static void riscv_sifive_u_soc_init(Object *obj) &error_abort, NULL); qdev_prop_set_uint32(DEVICE(&s->u_cluster), "cluster-id", 1); -object_initialize_child(OBJECT(&s->u_cluster), "u-cpus", -&s->u_cpus, sizeof(s->u_cpus), -TYPE_RISCV_HART_ARRAY, &error_abort, -NULL); +sysbus_init_child_obj(OBJECT(&s->u_cluster), "u-cpus", + &s->u_cpus, sizeof(s->u_cpus), + TYPE_RISCV_HART_ARRAY); qdev_prop_set_uint32(DEVICE(&s->u_cpus), "num-harts", ms->smp.cpus - 1); qdev_prop_set_uint32(DEVICE(&s->u_cpus), "hartid-base", 1); qdev_prop_set_string(DEVICE(&s->u_cpus), "cpu-type", SIFIVE_U_CPU); diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index d0c4843712..01d52e758e 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -169,8 +169,8 @@ static void spike_board_init(MachineState *machine) unsigned int smp_cpus = machine->smp.cpus; /* Initialize SOC */ -object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), -TYPE_RISCV_HART_ARRAY, &error_abort, NULL); +sysbus_init_child_obj(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), + TYPE_RISCV_HART_ARRAY); object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", @@ -275,8 +275,8 @@ static void spike_v1_10_0_board_init(MachineState *machine) } /* Initialize SOC */ -object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), -TYPE_RISCV_HART_ARRAY, &error_abort, NULL); +sysbus_init_child_obj(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), + TYPE_RISCV_HART_ARRAY); object_property_set_str(OBJECT(&s->soc), SPIKE_V1_10_0_CPU, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", @@ -365,8 +365,8 @@ static void spike_v1_09_1_board_init(MachineState *machine) } /* Initialize SOC */ -object_initialize_child(OBJECT(machine
