Re: [PATCH 3/3] Add support for TPM devices over I2C bus
On 3/22/23 8:04 AM, Stefan Berger wrote: On 3/22/23 07:50, Stefan Berger wrote: On 3/22/23 07:28, Ninad Palsule wrote: On 3/21/23 8:30 PM, Stefan Berger wrote: I think there should be tpm_tis_set_data_buffer function that you can call rather than transferring the data byte-by-byte. Thanks for the series! Stefan I thought about it but the FIFO case performs multiple operations hence I did not want to change it. Currently there is no function to set data buffer in the common code. It may not be correct to transfer it in one go, either. I just printed the I2C specs and I am going to look at them now. When one writes TPM command data to the TIS the STS register has its TPM_TIS_STS_VALID bit set and TPM_TIS_STS_EXPECT bit reset once the command is complete. This would imply that you should not have a holding area for the command bytes but pass them on to the TIS immediately to get the effect of the STS register... Regarding the registers defined for the I2C: You can pass the data onto the TIS but you should mask out input flags that are not defined for I2C and if the return value has flags not defined for I2C you should also mask those out as well. This applies to the TPM_INT_ENABLE & TPM_STS registers on read and write and to the TPM_INT_CAPABILITY on read. Also you should implement support for TPM_I2C_INTERACE_CAPABILITY on the I2C layer and return sensible values for the defined bits. The TPM_I2C_DEVICE_ADDRESS register should be handled probably assuming fixed address support only. Good catch. - Added capability conversion for TPM_I2C_INTERFACE_CAPABILITY. - Added clearing of bits in TPM_STS register. - Adde check to reject TPM_I2C_DEVICE_ADDRESS register. - No changes are required for TPM_INT_ENABLE and TPM_INT_CAPABILITY as they have same bits between TPM TIS and TPM I2C. Ideally there would be a test case similar to this one here https://github.com/qemu/qemu/blob/master/tests/qtest/tpm-tis-util.c . However, I am not sure how easy it is to talk to I2C without a driver for it. Ok, Thanks. Stefan Thanks for the review! Ninad Palsule
Re: [PATCH 3/3] Add support for TPM devices over I2C bus
On 3/22/23 6:50 AM, Stefan Berger wrote:
On 3/22/23 07:28, Ninad Palsule wrote:
On 3/21/23 8:30 PM, Stefan Berger wrote:
On 3/21/23 01:30, Ninad Palsule wrote:
Qemu already supports devices attached to ISA and sysbus. This drop
adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
+
+/* Send data to TPM */
+static inline void tpm_tis_i2c_tpm_send(TPMStateI2C *i2cst)
+{
+ if ((i2cst->operation == OP_SEND) && (i2cst->offset > 1)) {
+ uint16_t tis_reg;
+ uint32_t data;
+ int i;
+
+ tis_reg = tpm_tis_i2c_to_tis_reg(i2cst->data[0],
>size);
+
+ /* Index 0 is always a register */
+ for (i = 1; i < i2cst->offset; i++) {
+ data = (i2cst->data[i] & 0xff);
+ tpm_tis_write_data(>state, tis_reg, data, 1);
+ }
I think there should be tpm_tis_set_data_buffer function that you
can call rather than transferring the data byte-by-byte.
Thanks for the series!
Stefan
I thought about it but the FIFO case performs multiple operations
hence I did not want to change it. Currently there is no function to
set data buffer in the common code.
It may not be correct to transfer it in one go, either. I just printed
the I2C specs and I am going to look at them now.
When one writes TPM command data to the TIS the STS register has its
TPM_TIS_STS_VALID bit set and TPM_TIS_STS_EXPECT bit reset once the
command is complete. This would imply that you should not have a
holding area for the command bytes but pass them on to the TIS
immediately to get the effect of the STS register...
Stefan
Yes, I had issue related to STS status while reading but did not see any
issue while writing but now I have changed it to _send too so there is
no holding area for FIFO data in the I2C.
Thanks for the review!
Ninad Palsule
Re: [PATCH 3/3] Add support for TPM devices over I2C bus
On 3/22/23 07:50, Stefan Berger wrote: On 3/22/23 07:28, Ninad Palsule wrote: On 3/21/23 8:30 PM, Stefan Berger wrote: I think there should be tpm_tis_set_data_buffer function that you can call rather than transferring the data byte-by-byte. Thanks for the series! Stefan I thought about it but the FIFO case performs multiple operations hence I did not want to change it. Currently there is no function to set data buffer in the common code. It may not be correct to transfer it in one go, either. I just printed the I2C specs and I am going to look at them now. When one writes TPM command data to the TIS the STS register has its TPM_TIS_STS_VALID bit set and TPM_TIS_STS_EXPECT bit reset once the command is complete. This would imply that you should not have a holding area for the command bytes but pass them on to the TIS immediately to get the effect of the STS register... Regarding the registers defined for the I2C: You can pass the data onto the TIS but you should mask out input flags that are not defined for I2C and if the return value has flags not defined for I2C you should also mask those out as well. This applies to the TPM_INT_ENABLE & TPM_STS registers on read and write and to the TPM_INT_CAPABILITY on read. Also you should implement support for TPM_I2C_INTERACE_CAPABILITY on the I2C layer and return sensible values for the defined bits. The TPM_I2C_DEVICE_ADDRESS register should be handled probably assuming fixed address support only. Ideally there would be a test case similar to this one here https://github.com/qemu/qemu/blob/master/tests/qtest/tpm-tis-util.c . However, I am not sure how easy it is to talk to I2C without a driver for it. Stefan
Re: [PATCH 3/3] Add support for TPM devices over I2C bus
On 3/22/23 07:28, Ninad Palsule wrote:
On 3/21/23 8:30 PM, Stefan Berger wrote:
On 3/21/23 01:30, Ninad Palsule wrote:
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
+
+/* Send data to TPM */
+static inline void tpm_tis_i2c_tpm_send(TPMStateI2C *i2cst)
+{
+ if ((i2cst->operation == OP_SEND) && (i2cst->offset > 1)) {
+ uint16_t tis_reg;
+ uint32_t data;
+ int i;
+
+ tis_reg = tpm_tis_i2c_to_tis_reg(i2cst->data[0], >size);
+
+ /* Index 0 is always a register */
+ for (i = 1; i < i2cst->offset; i++) {
+ data = (i2cst->data[i] & 0xff);
+ tpm_tis_write_data(>state, tis_reg, data, 1);
+ }
I think there should be tpm_tis_set_data_buffer function that you can call
rather than transferring the data byte-by-byte.
Thanks for the series!
Stefan
I thought about it but the FIFO case performs multiple operations hence I did
not want to change it. Currently there is no function to set data buffer in the
common code.
It may not be correct to transfer it in one go, either. I just printed the I2C
specs and I am going to look at them now.
When one writes TPM command data to the TIS the STS register has its
TPM_TIS_STS_VALID bit set and TPM_TIS_STS_EXPECT bit reset once the command is
complete. This would imply that you should not have a holding area for the
command bytes but pass them on to the TIS immediately to get the effect of the
STS register...
Stefan
Thanks for the review!
Ninad Palsule
Re: [PATCH 3/3] Add support for TPM devices over I2C bus
On 3/21/23 8:30 PM, Stefan Berger wrote:
On 3/21/23 01:30, Ninad Palsule wrote:
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
+
+/* Send data to TPM */
+static inline void tpm_tis_i2c_tpm_send(TPMStateI2C *i2cst)
+{
+ if ((i2cst->operation == OP_SEND) && (i2cst->offset > 1)) {
+ uint16_t tis_reg;
+ uint32_t data;
+ int i;
+
+ tis_reg = tpm_tis_i2c_to_tis_reg(i2cst->data[0], >size);
+
+ /* Index 0 is always a register */
+ for (i = 1; i < i2cst->offset; i++) {
+ data = (i2cst->data[i] & 0xff);
+ tpm_tis_write_data(>state, tis_reg, data, 1);
+ }
I think there should be tpm_tis_set_data_buffer function that you can
call rather than transferring the data byte-by-byte.
Thanks for the series!
Stefan
I thought about it but the FIFO case performs multiple operations hence
I did not want to change it. Currently there is no function to set data
buffer in the common code.
Thanks for the review!
Ninad Palsule
Re: [PATCH 3/3] Add support for TPM devices over I2C bus
On 3/21/23 8:10 PM, Stefan Berger wrote:
On 3/21/23 01:30, Ninad Palsule wrote:
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
This commit includes changes for the common code.
- Added I2C emulation model. Logic was added in the model to temporarily
cache the data as I2C interface works per byte basis.
- New tpm type "tpm-tis-i2c" added for I2C support. User specify this
string on command line.
Testing:
TPM I2C device modulte is tested using SWTPM (software based TPM
package). The qemu used the rainier machine and it was connected to
swtpm over the socket interface.
The command to start swtpm is as follows:
$ swtpm socket --tpmstate dir=/tmp/mytpm1 \
--ctrl type=unixio,path=/tmp/mytpm1/swtpm-sock \
--tpm2 --log level=100
The command to start qemu is as follows:
$ qemu-system-arm -M rainier-bmc -nographic \
-kernel ${IMAGEPATH}/fitImage-linux.bin \
-dtb ${IMAGEPATH}/aspeed-bmc-ibm-rainier.dtb \
-initrd
${IMAGEPATH}/obmc-phosphor-initramfs.rootfs.cpio.xz \
-drive
file=${IMAGEPATH}/obmc-phosphor-image.rootfs.wic.qcow2,if=sd,index=2 \
-net nic -net
user,hostfwd=:127.0.0.1:-:22,hostfwd=:127.0.0.1:2443-:443 \
-chardev socket,id=chrtpm,path=/tmp/mytpm1/swtpm-sock \
-tpmdev emulator,id=tpm0,chardev=chrtpm \
-device
tpm-tis-i2c,tpmdev=tpm0,bus=aspeed.i2c.bus.12,address=0x2e
Please add this command line example also to the documentation.
Added rainier-bmc command in the documentation. The swtpm command is
already in the document.
When you run scripts/checkpatch.pl over this patch it reports the
following relevant complaints:
WARNING: Block comments use a leading /* on a separate line
#255: FILE: hw/tpm/tpm_tis_i2c.c:190:
+/* If data is for FIFO then it is received from tpm_tis_common buffer
WARNING: Block comments use a leading /* on a separate line
#345: FILE: hw/tpm/tpm_tis_i2c.c:280:
+ /* Get the backend pointer. It is not initialized propery during
Sorry about that. Fixed it.
Note: Currently you need to specify the I2C bus and device address on
command line. In future we can add a device at board level.
Signed-off-by: Ninad Palsule
---
hw/tpm/meson.build | 1 +
hw/tpm/tpm_tis_i2c.c | 342 +++
include/sysemu/tpm.h | 3 +
3 files changed, 346 insertions(+)
create mode 100644 hw/tpm/tpm_tis_i2c.c
diff --git a/hw/tpm/meson.build b/hw/tpm/meson.build
index 7abc2d794a..76fe3cb098 100644
--- a/hw/tpm/meson.build
+++ b/hw/tpm/meson.build
@@ -1,6 +1,7 @@
softmmu_ss.add(when: 'CONFIG_TPM_TIS', if_true:
files('tpm_tis_common.c'))
softmmu_ss.add(when: 'CONFIG_TPM_TIS_ISA', if_true:
files('tpm_tis_isa.c'))
softmmu_ss.add(when: 'CONFIG_TPM_TIS_SYSBUS', if_true:
files('tpm_tis_sysbus.c'))
+softmmu_ss.add(when: 'CONFIG_TPM_TIS_I2C', if_true:
files('tpm_tis_i2c.c'))
softmmu_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_crb.c'))
softmmu_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_ppi.c'))
softmmu_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_ppi.c'))
diff --git a/hw/tpm/tpm_tis_i2c.c b/hw/tpm/tpm_tis_i2c.c
new file mode 100644
index 00..3c45af4140
--- /dev/null
+++ b/hw/tpm/tpm_tis_i2c.c
@@ -0,0 +1,342 @@
+/*
+ * tpm_tis_i2c.c - QEMU's TPM TIS I2C Device
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2
or later.
+ * See the COPYING file in the top-level directory.
+ *
+ * Implementation of the TIS interface according to specs found at
+ * http://www.trustedcomputinggroup.org. This implementation currently
+ * supports version 1.3, 21 March 2013
+ * In the developers menu choose the PC Client section then find the
TIS
+ * specification.
+ *
+ * TPM TIS for TPM 2 implementation following TCG PC Client Platform
+ * TPM Profile (PTP) Specification, Familiy 2.0, Revision 00.43
+ */
+
+#include "qemu/osdep.h"
+#include "hw/i2c/i2c.h"
+#include "hw/qdev-properties.h"
+#include "hw/acpi/tpm.h"
+#include "migration/vmstate.h"
+#include "tpm_prop.h"
+#include "tpm_tis.h"
+#include "qom/object.h"
+#include "block/aio.h"
+#include "qemu/main-loop.h"
+
+/* TPM TIS I2C registers */
+#define TPM_TIS_I2C_REG_LOC_SEL 0x00
+#define TPM_TIS_I2C_REG_ACCESS 0x04
+#define TPM_TIS_I2C_REG_INT_ENABLE 0x08
+#define TPM_TIS_I2C_REG_INT_CAPABILITY 0x14
+#define TPM_TIS_I2C_REG_STS 0x18
+#define TPM_TIS_I2C_REG_DATA_FIFO 0x24
+#define TPM_TIS_I2C_REG_INTF_CAPABILITY 0x30
+#define TPM_TIS_I2C_REG_DATA_CSUM_ENABLE 0x40
+#define TPM_TIS_I2C_REG_DATA_CSUM_GET 0x44
+#define TPM_TIS_I2C_REG_DID_VID 0x48
+#define TPM_TIS_I2C_REG_RID 0x4c
+#define TPM_TIS_I2C_REG_UNKNOWN 0xff
+
+/* Operations */
+#define OP_SEND 1
+#define OP_RECV
Re: [PATCH 3/3] Add support for TPM devices over I2C bus
On 3/21/23 01:30, Ninad Palsule wrote:
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
+
+/* Send data to TPM */
+static inline void tpm_tis_i2c_tpm_send(TPMStateI2C *i2cst)
+{
+if ((i2cst->operation == OP_SEND) && (i2cst->offset > 1)) {
+uint16_t tis_reg;
+uint32_t data;
+int i;
+
+tis_reg = tpm_tis_i2c_to_tis_reg(i2cst->data[0], >size);
+
+/* Index 0 is always a register */
+for (i = 1; i < i2cst->offset; i++) {
+data = (i2cst->data[i] & 0xff);
+tpm_tis_write_data(>state, tis_reg, data, 1);
+}
I think there should be tpm_tis_set_data_buffer function that you can call
rather than transferring the data byte-by-byte.
Thanks for the series!
Stefan
Re: [PATCH 3/3] Add support for TPM devices over I2C bus
On 3/21/23 01:30, Ninad Palsule wrote:
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
This commit includes changes for the common code.
- Added I2C emulation model. Logic was added in the model to temporarily
cache the data as I2C interface works per byte basis.
- New tpm type "tpm-tis-i2c" added for I2C support. User specify this
string on command line.
Testing:
TPM I2C device modulte is tested using SWTPM (software based TPM
package). The qemu used the rainier machine and it was connected to
swtpm over the socket interface.
The command to start swtpm is as follows:
$ swtpm socket --tpmstate dir=/tmp/mytpm1\
--ctrl type=unixio,path=/tmp/mytpm1/swtpm-sock \
--tpm2 --log level=100
The command to start qemu is as follows:
$ qemu-system-arm -M rainier-bmc -nographic \
-kernel ${IMAGEPATH}/fitImage-linux.bin \
-dtb ${IMAGEPATH}/aspeed-bmc-ibm-rainier.dtb \
-initrd ${IMAGEPATH}/obmc-phosphor-initramfs.rootfs.cpio.xz \
-drive
file=${IMAGEPATH}/obmc-phosphor-image.rootfs.wic.qcow2,if=sd,index=2 \
-net nic -net
user,hostfwd=:127.0.0.1:-:22,hostfwd=:127.0.0.1:2443-:443 \
-chardev socket,id=chrtpm,path=/tmp/mytpm1/swtpm-sock \
-tpmdev emulator,id=tpm0,chardev=chrtpm \
-device tpm-tis-i2c,tpmdev=tpm0,bus=aspeed.i2c.bus.12,address=0x2e
Please add this command line example also to the documentation.
When you run scripts/checkpatch.pl over this patch it reports the following
relevant complaints:
WARNING: Block comments use a leading /* on a separate line
#255: FILE: hw/tpm/tpm_tis_i2c.c:190:
+/* If data is for FIFO then it is received from tpm_tis_common buffer
WARNING: Block comments use a leading /* on a separate line
#345: FILE: hw/tpm/tpm_tis_i2c.c:280:
+/* Get the backend pointer. It is not initialized propery during
Note: Currently you need to specify the I2C bus and device address on
command line. In future we can add a device at board level.
Signed-off-by: Ninad Palsule
---
hw/tpm/meson.build | 1 +
hw/tpm/tpm_tis_i2c.c | 342 +++
include/sysemu/tpm.h | 3 +
3 files changed, 346 insertions(+)
create mode 100644 hw/tpm/tpm_tis_i2c.c
diff --git a/hw/tpm/meson.build b/hw/tpm/meson.build
index 7abc2d794a..76fe3cb098 100644
--- a/hw/tpm/meson.build
+++ b/hw/tpm/meson.build
@@ -1,6 +1,7 @@
softmmu_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_tis_common.c'))
softmmu_ss.add(when: 'CONFIG_TPM_TIS_ISA', if_true: files('tpm_tis_isa.c'))
softmmu_ss.add(when: 'CONFIG_TPM_TIS_SYSBUS', if_true:
files('tpm_tis_sysbus.c'))
+softmmu_ss.add(when: 'CONFIG_TPM_TIS_I2C', if_true: files('tpm_tis_i2c.c'))
softmmu_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_crb.c'))
softmmu_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_ppi.c'))
softmmu_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_ppi.c'))
diff --git a/hw/tpm/tpm_tis_i2c.c b/hw/tpm/tpm_tis_i2c.c
new file mode 100644
index 00..3c45af4140
--- /dev/null
+++ b/hw/tpm/tpm_tis_i2c.c
@@ -0,0 +1,342 @@
+/*
+ * tpm_tis_i2c.c - QEMU's TPM TIS I2C Device
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ * Implementation of the TIS interface according to specs found at
+ * http://www.trustedcomputinggroup.org. This implementation currently
+ * supports version 1.3, 21 March 2013
+ * In the developers menu choose the PC Client section then find the TIS
+ * specification.
+ *
+ * TPM TIS for TPM 2 implementation following TCG PC Client Platform
+ * TPM Profile (PTP) Specification, Familiy 2.0, Revision 00.43
+ */
+
+#include "qemu/osdep.h"
+#include "hw/i2c/i2c.h"
+#include "hw/qdev-properties.h"
+#include "hw/acpi/tpm.h"
+#include "migration/vmstate.h"
+#include "tpm_prop.h"
+#include "tpm_tis.h"
+#include "qom/object.h"
+#include "block/aio.h"
+#include "qemu/main-loop.h"
+
+/* TPM TIS I2C registers */
+#define TPM_TIS_I2C_REG_LOC_SEL 0x00
+#define TPM_TIS_I2C_REG_ACCESS 0x04
+#define TPM_TIS_I2C_REG_INT_ENABLE 0x08
+#define TPM_TIS_I2C_REG_INT_CAPABILITY 0x14
+#define TPM_TIS_I2C_REG_STS 0x18
+#define TPM_TIS_I2C_REG_DATA_FIFO0x24
+#define TPM_TIS_I2C_REG_INTF_CAPABILITY 0x30
+#define TPM_TIS_I2C_REG_DATA_CSUM_ENABLE 0x40
+#define TPM_TIS_I2C_REG_DATA_CSUM_GET0x44
+#define TPM_TIS_I2C_REG_DID_VID 0x48
+#define TPM_TIS_I2C_REG_RID 0x4c
+#define TPM_TIS_I2C_REG_UNKNOWN 0xff
+
+/* Operations */
+#define OP_SEND 1
+#define OP_RECV 2
+
+typedef struct TPMStateI2C {
+/*< private >*/
+I2CSlave parent_obj;
+
+int offset; /* offset in to data[] */
+int size; /* Size of the
[PATCH 3/3] Add support for TPM devices over I2C bus
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
This commit includes changes for the common code.
- Added I2C emulation model. Logic was added in the model to temporarily
cache the data as I2C interface works per byte basis.
- New tpm type "tpm-tis-i2c" added for I2C support. User specify this
string on command line.
Testing:
TPM I2C device modulte is tested using SWTPM (software based TPM
package). The qemu used the rainier machine and it was connected to
swtpm over the socket interface.
The command to start swtpm is as follows:
$ swtpm socket --tpmstate dir=/tmp/mytpm1\
--ctrl type=unixio,path=/tmp/mytpm1/swtpm-sock \
--tpm2 --log level=100
The command to start qemu is as follows:
$ qemu-system-arm -M rainier-bmc -nographic \
-kernel ${IMAGEPATH}/fitImage-linux.bin \
-dtb ${IMAGEPATH}/aspeed-bmc-ibm-rainier.dtb \
-initrd ${IMAGEPATH}/obmc-phosphor-initramfs.rootfs.cpio.xz \
-drive
file=${IMAGEPATH}/obmc-phosphor-image.rootfs.wic.qcow2,if=sd,index=2 \
-net nic -net
user,hostfwd=:127.0.0.1:-:22,hostfwd=:127.0.0.1:2443-:443 \
-chardev socket,id=chrtpm,path=/tmp/mytpm1/swtpm-sock \
-tpmdev emulator,id=tpm0,chardev=chrtpm \
-device tpm-tis-i2c,tpmdev=tpm0,bus=aspeed.i2c.bus.12,address=0x2e
Note: Currently you need to specify the I2C bus and device address on
command line. In future we can add a device at board level.
Signed-off-by: Ninad Palsule
---
hw/tpm/meson.build | 1 +
hw/tpm/tpm_tis_i2c.c | 342 +++
include/sysemu/tpm.h | 3 +
3 files changed, 346 insertions(+)
create mode 100644 hw/tpm/tpm_tis_i2c.c
diff --git a/hw/tpm/meson.build b/hw/tpm/meson.build
index 7abc2d794a..76fe3cb098 100644
--- a/hw/tpm/meson.build
+++ b/hw/tpm/meson.build
@@ -1,6 +1,7 @@
softmmu_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_tis_common.c'))
softmmu_ss.add(when: 'CONFIG_TPM_TIS_ISA', if_true: files('tpm_tis_isa.c'))
softmmu_ss.add(when: 'CONFIG_TPM_TIS_SYSBUS', if_true:
files('tpm_tis_sysbus.c'))
+softmmu_ss.add(when: 'CONFIG_TPM_TIS_I2C', if_true: files('tpm_tis_i2c.c'))
softmmu_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_crb.c'))
softmmu_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_ppi.c'))
softmmu_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_ppi.c'))
diff --git a/hw/tpm/tpm_tis_i2c.c b/hw/tpm/tpm_tis_i2c.c
new file mode 100644
index 00..3c45af4140
--- /dev/null
+++ b/hw/tpm/tpm_tis_i2c.c
@@ -0,0 +1,342 @@
+/*
+ * tpm_tis_i2c.c - QEMU's TPM TIS I2C Device
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ * Implementation of the TIS interface according to specs found at
+ * http://www.trustedcomputinggroup.org. This implementation currently
+ * supports version 1.3, 21 March 2013
+ * In the developers menu choose the PC Client section then find the TIS
+ * specification.
+ *
+ * TPM TIS for TPM 2 implementation following TCG PC Client Platform
+ * TPM Profile (PTP) Specification, Familiy 2.0, Revision 00.43
+ */
+
+#include "qemu/osdep.h"
+#include "hw/i2c/i2c.h"
+#include "hw/qdev-properties.h"
+#include "hw/acpi/tpm.h"
+#include "migration/vmstate.h"
+#include "tpm_prop.h"
+#include "tpm_tis.h"
+#include "qom/object.h"
+#include "block/aio.h"
+#include "qemu/main-loop.h"
+
+/* TPM TIS I2C registers */
+#define TPM_TIS_I2C_REG_LOC_SEL 0x00
+#define TPM_TIS_I2C_REG_ACCESS 0x04
+#define TPM_TIS_I2C_REG_INT_ENABLE 0x08
+#define TPM_TIS_I2C_REG_INT_CAPABILITY 0x14
+#define TPM_TIS_I2C_REG_STS 0x18
+#define TPM_TIS_I2C_REG_DATA_FIFO0x24
+#define TPM_TIS_I2C_REG_INTF_CAPABILITY 0x30
+#define TPM_TIS_I2C_REG_DATA_CSUM_ENABLE 0x40
+#define TPM_TIS_I2C_REG_DATA_CSUM_GET0x44
+#define TPM_TIS_I2C_REG_DID_VID 0x48
+#define TPM_TIS_I2C_REG_RID 0x4c
+#define TPM_TIS_I2C_REG_UNKNOWN 0xff
+
+/* Operations */
+#define OP_SEND 1
+#define OP_RECV 2
+
+typedef struct TPMStateI2C {
+/*< private >*/
+I2CSlave parent_obj;
+
+int offset; /* offset in to data[] */
+int size; /* Size of the current reg data */
+uint8_t operation; /* OP_SEND & OP_RECV */
+uint8_t data[4096]; /* Data */
+
+/*< public >*/
+TPMState state; /* not a QOM object */
+
+} TPMStateI2C;
+
+DECLARE_INSTANCE_CHECKER(TPMStateI2C, TPM_TIS_I2C,
+ TYPE_TPM_TIS_I2C)
+
+static const VMStateDescription vmstate_tpm_tis_i2c = {
+.name = "tpm",
+.unmigratable = 1,
+};
+
+/* Register map */
+typedef struct reg_map {
+uint16_t i2c_reg;/* I2C register */
+uint16_t tis_reg;/* TIS register */
+uint32_t data_size; /* data size expected */
