Some features use multiple CPUID bits to form a value to be used, e.g.,
CPUID(0x1E,0):EBX[23:08] is regarded as the tmul_maxn value for AMX.
Introduce a new struct "MultiBitFeatureInfo" to hold the information for
those features and create a corresponding member in struct FeatureWordInfo,
so that the infomation can be assigned for each item in feature_word_info
array and used in the future.
Signed-off-by: Wang, Lei <lei4.w...@intel.com>
---
target/i386/cpu-internal.h | 9 +++++++
target/i386/cpu.c | 54 ++++++++++++++++++++++++++++++++++++++
2 files changed, 63 insertions(+)
diff --git a/target/i386/cpu-internal.h b/target/i386/cpu-internal.h
index 9baac5c0b4..66b3d66cb4 100644
--- a/target/i386/cpu-internal.h
+++ b/target/i386/cpu-internal.h
@@ -25,6 +25,13 @@ typedef enum FeatureWordType {
MSR_FEATURE_WORD,
} FeatureWordType;
+typedef struct MultiBitFeatureInfo {
+ const char *feat_name;
+ uint64_t mask;
+ unsigned high_bit_position;
+ unsigned low_bit_position;
+} MultiBitFeatureInfo;
+
typedef struct FeatureWordInfo {
FeatureWordType type;
/* feature flags names are taken from "Intel Processor Identification and
@@ -51,6 +58,8 @@ typedef struct FeatureWordInfo {
uint64_t migratable_flags; /* Feature flags known to be migratable */
/* Features that shouldn't be auto-enabled by "-cpu host" */
uint64_t no_autoenable_flags;
+ unsigned num_multi_bit_features;
+ MultiBitFeatureInfo *multi_bit_features;
} FeatureWordInfo;
extern FeatureWordInfo feature_word_info[];
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 0083a2a7f7..7ae232ab18 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1011,6 +1011,21 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
},
.migratable_flags = CPUID_AMX_PALETTE_1_TOTAL_TILE_BYTES_MASK |
CPUID_AMX_PALETTE_1_BYTES_PER_TILE_MASK,
+ .num_multi_bit_features = 2,
+ .multi_bit_features = (MultiBitFeatureInfo[]){
+ {
+ .feat_name = "total_tile_bytes",
+ .mask = CPUID_AMX_PALETTE_1_TOTAL_TILE_BYTES_MASK,
+ .high_bit_position = 15,
+ .low_bit_position = 0,
+ },
+ {
+ .feat_name = "bytes_per_tile",
+ .mask = CPUID_AMX_PALETTE_1_BYTES_PER_TILE_MASK,
+ .high_bit_position = 31,
+ .low_bit_position = 16,
+ },
+ },
},
[FEAT_1D_1_EBX] = {
.type = CPUID_FEATURE_WORD,
@@ -1021,6 +1036,21 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
},
.migratable_flags = CPUID_AMX_PALETTE_1_BYTES_PER_ROW_MASK |
CPUID_AMX_PALETTE_1_MAX_NAMES_MASK,
+ .num_multi_bit_features = 2,
+ .multi_bit_features = (MultiBitFeatureInfo[]){
+ {
+ .feat_name = "bytes_per_row",
+ .mask = CPUID_AMX_PALETTE_1_BYTES_PER_ROW_MASK,
+ .high_bit_position = 15,
+ .low_bit_position = 0,
+ },
+ {
+ .feat_name = "max_names",
+ .mask = CPUID_AMX_PALETTE_1_MAX_NAMES_MASK,
+ .high_bit_position = 31,
+ .low_bit_position = 16,
+ },
+ },
},
[FEAT_1D_1_ECX] = {
.type = CPUID_FEATURE_WORD,
@@ -1030,6 +1060,15 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
.reg = R_ECX,
},
.migratable_flags = CPUID_AMX_PALETTE_1_MAX_ROWS_MASK,
+ .num_multi_bit_features = 1,
+ .multi_bit_features = (MultiBitFeatureInfo[]){
+ {
+ .feat_name = "max_rows",
+ .mask = CPUID_AMX_PALETTE_1_MAX_ROWS_MASK,
+ .high_bit_position = 15,
+ .low_bit_position = 0,
+ },
+ },
},
[FEAT_1E_0_EBX] = {
.type = CPUID_FEATURE_WORD,
@@ -1040,6 +1079,21 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
},
.migratable_flags = CPUID_AMX_TMUL_MAX_K_MASK |
CPUID_AMX_TMUL_MAX_N_MASK,
+ .num_multi_bit_features = 2,
+ .multi_bit_features = (MultiBitFeatureInfo[]){
+ {
+ .feat_name = "tmul_maxk",
+ .mask = CPUID_AMX_TMUL_MAX_K_MASK,
+ .high_bit_position = 7,
+ .low_bit_position = 0,
+ },
+ {
+ .feat_name = "tmul_maxn",
+ .mask = CPUID_AMX_TMUL_MAX_N_MASK,
+ .high_bit_position = 23,
+ .low_bit_position = 8,
+ },
+ },
},
/*Below are MSR exposed features*/
[FEAT_ARCH_CAPABILITIES] = {
--
2.34.1
