Re: [PATCH for-6.2 22/34] target/arm: Implement MVE narrowing moves

2021-07-21 Thread Richard Henderson 

On 7/13/21 3:37 AM, Peter Maydell wrote:

Implement the MVE narrowing move insns VMOVN, VQMOVN and VQMOVUN.
These take a double-width input, narrow it (possibly saturating) and
store the result to either the top or bottom half of the output
element.

Signed-off-by: Peter Maydell
---
  target/arm/helper-mve.h| 20 ++
  target/arm/mve.decode  | 12 ++
  target/arm/mve_helper.c| 78 ++
  target/arm/translate-mve.c | 22 +++
  4 files changed, 132 insertions(+)


Reviewed-by: Richard Henderson 

r~

[PATCH for-6.2 22/34] target/arm: Implement MVE narrowing moves

2021-07-13 Thread Peter Maydell 
Implement the MVE narrowing move insns VMOVN, VQMOVN and VQMOVUN.
These take a double-width input, narrow it (possibly saturating) and
store the result to either the top or bottom half of the output
element.

Signed-off-by: Peter Maydell 
---
 target/arm/helper-mve.h| 20 ++
 target/arm/mve.decode  | 12 ++
 target/arm/mve_helper.c| 78 ++
 target/arm/translate-mve.c | 22 +++
 4 files changed, 132 insertions(+)

diff --git a/target/arm/helper-mve.h b/target/arm/helper-mve.h
index 5c3f8a26df0..84aa9de6e06 100644
--- a/target/arm/helper-mve.h
+++ b/target/arm/helper-mve.h
@@ -80,6 +80,26 @@ DEF_HELPER_FLAGS_3(mve_vnegw, TCG_CALL_NO_WG, void, env, 
ptr, ptr)
 DEF_HELPER_FLAGS_3(mve_vfnegh, TCG_CALL_NO_WG, void, env, ptr, ptr)
 DEF_HELPER_FLAGS_3(mve_vfnegs, TCG_CALL_NO_WG, void, env, ptr, ptr)
 
+DEF_HELPER_FLAGS_3(mve_vmovnbb, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vmovnbh, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vmovntb, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vmovnth, TCG_CALL_NO_WG, void, env, ptr, ptr)
+
+DEF_HELPER_FLAGS_3(mve_vqmovunbb, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vqmovunbh, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vqmovuntb, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vqmovunth, TCG_CALL_NO_WG, void, env, ptr, ptr)
+
+DEF_HELPER_FLAGS_3(mve_vqmovnbsb, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vqmovnbsh, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vqmovntsb, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vqmovntsh, TCG_CALL_NO_WG, void, env, ptr, ptr)
+
+DEF_HELPER_FLAGS_3(mve_vqmovnbub, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vqmovnbuh, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vqmovntub, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vqmovntuh, TCG_CALL_NO_WG, void, env, ptr, ptr)
+
 DEF_HELPER_FLAGS_4(mve_vand, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
 DEF_HELPER_FLAGS_4(mve_vbic, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
 DEF_HELPER_FLAGS_4(mve_vorr, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
diff --git a/target/arm/mve.decode b/target/arm/mve.decode
index bf6cf6f8383..79c529e762f 100644
--- a/target/arm/mve.decode
+++ b/target/arm/mve.decode
@@ -153,6 +153,9 @@ VMUL 1110  0 . .. ... 0 ... 0 1001 . 1 . 1 
... 0 @2op
   VSHLL_BS   111 0 1110 0 . 11 .. 01 ... 0 1110 0 0 . 0 ... 1 
@2_shll_esize_b
   VSHLL_BS   111 0 1110 0 . 11 .. 01 ... 0 1110 0 0 . 0 ... 1 
@2_shll_esize_h
 
+  VQMOVUNB   111 0 1110 0 . 11 .. 01 ... 0 1110 1 0 . 0 ... 1 @1op
+  VQMOVN_BS  111 0 1110 0 . 11 .. 11 ... 0 1110 0 0 . 0 ... 1 @1op
+
   VMULH_S111 0 1110 0 . .. ...1 ... 0 1110 . 0 . 0 ... 1 @2op
 }
 
@@ -160,6 +163,9 @@ VMUL 1110  0 . .. ... 0 ... 0 1001 . 1 . 1 
... 0 @2op
   VSHLL_BU   111 1 1110 0 . 11 .. 01 ... 0 1110 0 0 . 0 ... 1 
@2_shll_esize_b
   VSHLL_BU   111 1 1110 0 . 11 .. 01 ... 0 1110 0 0 . 0 ... 1 
@2_shll_esize_h
 
+  VMOVNB 111 1 1110 0 . 11 .. 01 ... 0 1110 1 0 . 0 ... 1 @1op
+  VQMOVN_BU  111 1 1110 0 . 11 .. 11 ... 0 1110 0 0 . 0 ... 1 @1op
+
   VMULH_U111 1 1110 0 . .. ...1 ... 0 1110 . 0 . 0 ... 1 @2op
 }
 
@@ -167,6 +173,9 @@ VMUL 1110  0 . .. ... 0 ... 0 1001 . 1 . 1 
... 0 @2op
   VSHLL_TS   111 0 1110 0 . 11 .. 01 ... 1 1110 0 0 . 0 ... 1 
@2_shll_esize_b
   VSHLL_TS   111 0 1110 0 . 11 .. 01 ... 1 1110 0 0 . 0 ... 1 
@2_shll_esize_h
 
+  VQMOVUNT   111 0 1110 0 . 11 .. 01 ... 1 1110 1 0 . 0 ... 1 @1op
+  VQMOVN_TS  111 0 1110 0 . 11 .. 11 ... 1 1110 0 0 . 0 ... 1 @1op
+
   VRMULH_S   111 0 1110 0 . .. ...1 ... 1 1110 . 0 . 0 ... 1 @2op
 }
 
@@ -174,6 +183,9 @@ VMUL 1110  0 . .. ... 0 ... 0 1001 . 1 . 1 
... 0 @2op
   VSHLL_TU   111 1 1110 0 . 11 .. 01 ... 1 1110 0 0 . 0 ... 1 
@2_shll_esize_b
   VSHLL_TU   111 1 1110 0 . 11 .. 01 ... 1 1110 0 0 . 0 ... 1 
@2_shll_esize_h
 
+  VMOVNT 111 1 1110 0 . 11 .. 01 ... 1 1110 1 0 . 0 ... 1 @1op
+  VQMOVN_TU  111 1 1110 0 . 11 .. 11 ... 1 1110 0 0 . 0 ... 1 @1op
+
   VRMULH_U   111 1 1110 0 . .. ...1 ... 1 1110 . 0 . 0 ... 1 @2op
 }
 
diff --git a/target/arm/mve_helper.c b/target/arm/mve_helper.c
index 4eb5dbce6d7..725fe64a348 100644
--- a/target/arm/mve_helper.c
+++ b/target/arm/mve_helper.c
@@ -1668,6 +1668,84 @@ DO_VSHRN_SAT_UH(vqrshrnb_uh, vqrshrnt_uh, DO_RSHRN_UH)
 DO_VSHRN_SAT_SB(vqrshrunbb, vqrshruntb, DO_RSHRUN_B)
 DO_VSHRN_SAT_SH(vqrshrunbh, vqrshrunth, DO_RSHRUN_H)
 
+#define DO_VMOVN(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE)   \
+void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm) \
+{   \
+LTYPE *m = vm;  \
+TYPE *d = vd;