Re: [PATCH v2 0/2] hw/arm: ast2600: Wire up eMMC controller
On 12/13/19 8:37 AM, Andrew Jeffery wrote: On Fri, 13 Dec 2019, at 18:03, Cédric Le Goater wrote: On 13/12/2019 05:28, Andrew Jeffery wrote: Hello, The AST2600 has an additional SDHCI intended for use as an eMMC boot source. These two patches rework the existing ASPEED SDHCI model to accommodate the single-slot nature of the eMMC controller and wire it into the AST2600 SoC. v2 contains some minor refactorings in response to issues pointed out by Cedric. I think these patches are based on mainline. I fixed them locally on my aspeed 5.0 branch and I plan to send them along with other aspeed changes in the 5.0 timeframe. Yeah, they're based on Peter's tree. I'll base future patches on yours. To help any reviewer, simply add a note in the cover on which tree your series is based. This also works with individual patch, add the note under the '---' separator.
Re: [PATCH v2 0/2] hw/arm: ast2600: Wire up eMMC controller
On Fri, 13 Dec 2019, at 18:03, Cédric Le Goater wrote: > On 13/12/2019 05:28, Andrew Jeffery wrote: > > Hello, > > > > The AST2600 has an additional SDHCI intended for use as an eMMC boot source. > > These two patches rework the existing ASPEED SDHCI model to accommodate the > > single-slot nature of the eMMC controller and wire it into the AST2600 SoC. > > > > v2 contains some minor refactorings in response to issues pointed out by > > Cedric. > > > I think these patches are based on mainline. I fixed them locally on > my aspeed 5.0 branch and I plan to send them along with other aspeed > changes in the 5.0 timeframe. Yeah, they're based on Peter's tree. I'll base future patches on yours. Andrew
Re: [PATCH v2 0/2] hw/arm: ast2600: Wire up eMMC controller
On 13/12/2019 05:28, Andrew Jeffery wrote: > Hello, > > The AST2600 has an additional SDHCI intended for use as an eMMC boot source. > These two patches rework the existing ASPEED SDHCI model to accommodate the > single-slot nature of the eMMC controller and wire it into the AST2600 SoC. > > v2 contains some minor refactorings in response to issues pointed out by > Cedric. I think these patches are based on mainline. I fixed them locally on my aspeed 5.0 branch and I plan to send them along with other aspeed changes in the 5.0 timeframe. Thanks, C. > > v1 can be found here: > > https://patchwork.ozlabs.org/cover/1206845/ > > Please review! > > Andrew > > Andrew Jeffery (2): > hw/sd: Configure number of slots exposed by the ASPEED SDHCI model > hw/arm: ast2600: Wire up the eMMC controller > > hw/arm/aspeed.c | 27 +-- > hw/arm/aspeed_ast2600.c | 23 +++ > hw/arm/aspeed_soc.c | 2 ++ > hw/sd/aspeed_sdhci.c | 11 +-- > include/hw/arm/aspeed_soc.h | 2 ++ > include/hw/sd/aspeed_sdhci.h | 1 + > 6 files changed, 54 insertions(+), 12 deletions(-) > > base-commit: 6a4ef4e5d1084ce41fafa7d470a644b0fd3d9317 >
[PATCH v2 0/2] hw/arm: ast2600: Wire up eMMC controller
Hello, The AST2600 has an additional SDHCI intended for use as an eMMC boot source. These two patches rework the existing ASPEED SDHCI model to accommodate the single-slot nature of the eMMC controller and wire it into the AST2600 SoC. v2 contains some minor refactorings in response to issues pointed out by Cedric. v1 can be found here: https://patchwork.ozlabs.org/cover/1206845/ Please review! Andrew Andrew Jeffery (2): hw/sd: Configure number of slots exposed by the ASPEED SDHCI model hw/arm: ast2600: Wire up the eMMC controller hw/arm/aspeed.c | 27 +-- hw/arm/aspeed_ast2600.c | 23 +++ hw/arm/aspeed_soc.c | 2 ++ hw/sd/aspeed_sdhci.c | 11 +-- include/hw/arm/aspeed_soc.h | 2 ++ include/hw/sd/aspeed_sdhci.h | 1 + 6 files changed, 54 insertions(+), 12 deletions(-) base-commit: 6a4ef4e5d1084ce41fafa7d470a644b0fd3d9317 -- git-series 0.9.1
