Re: [PATCH v2 02/38] util: Add cpuinfo-ppc.c
On 6/19/23 12:37, Philippe Mathieu-Daudé wrote: On 9/6/23 04:23, Richard Henderson wrote: Move the code from tcg/. Fix a bug in that PPC_FEATURE2_ARCH_3_10 is actually spelled PPC_FEATURE2_ARCH_3_1. This is rather confusing. Signed-off-by: Richard Henderson --- host/include/ppc/host/cpuinfo.h | 29 host/include/ppc64/host/cpuinfo.h | 1 + tcg/ppc/tcg-target.h | 16 - util/cpuinfo-ppc.c | 57 +++ tcg/ppc/tcg-target.c.inc | 44 +--- util/meson.build | 2 ++ 6 files changed, 98 insertions(+), 51 deletions(-) create mode 100644 host/include/ppc/host/cpuinfo.h create mode 100644 host/include/ppc64/host/cpuinfo.h create mode 100644 util/cpuinfo-ppc.c diff --git a/host/include/ppc/host/cpuinfo.h b/host/include/ppc/host/cpuinfo.h new file mode 100644 index 00..7ec252ef52 --- /dev/null +++ b/host/include/ppc/host/cpuinfo.h @@ -0,0 +1,29 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Host specific cpu indentification for ppc. + */ + +#ifndef HOST_CPUINFO_H +#define HOST_CPUINFO_H + +/* Digested version of */ + +#define CPUINFO_ALWAYS (1u << 0) /* so cpuinfo is nonzero */ +#define CPUINFO_V2_06 (1u << 1) +#define CPUINFO_V2_07 (1u << 2) +#define CPUINFO_V3_00 (1u << 3) +#define CPUINFO_V3_10 (1u << 4) Could we define as CPUINFO_V3_1 ... +#define CPUINFO_ISEL (1u << 5) +#define CPUINFO_ALTIVEC (1u << 6) +#define CPUINFO_VSX (1u << 7) -#define have_isa_2_06 (have_isa >= tcg_isa_2_06) -#define have_isa_2_07 (have_isa >= tcg_isa_2_07) -#define have_isa_3_00 (have_isa >= tcg_isa_3_00) -#define have_isa_3_10 (have_isa >= tcg_isa_3_10) +#define have_isa_2_06 (cpuinfo & CPUINFO_V2_06) +#define have_isa_2_07 (cpuinfo & CPUINFO_V2_07) +#define have_isa_3_00 (cpuinfo & CPUINFO_V3_00) +#define have_isa_3_10 (cpuinfo & CPUINFO_V3_10) ... and have_isa_3_1 instead? I suppose we could, but they all line up this way. :-) r~ Otherwise, Reviewed-by: Philippe Mathieu-Daudé
Re: [PATCH v2 02/38] util: Add cpuinfo-ppc.c
On 9/6/23 04:23, Richard Henderson wrote: Move the code from tcg/. Fix a bug in that PPC_FEATURE2_ARCH_3_10 is actually spelled PPC_FEATURE2_ARCH_3_1. This is rather confusing. Signed-off-by: Richard Henderson --- host/include/ppc/host/cpuinfo.h | 29 host/include/ppc64/host/cpuinfo.h | 1 + tcg/ppc/tcg-target.h | 16 - util/cpuinfo-ppc.c| 57 +++ tcg/ppc/tcg-target.c.inc | 44 +--- util/meson.build | 2 ++ 6 files changed, 98 insertions(+), 51 deletions(-) create mode 100644 host/include/ppc/host/cpuinfo.h create mode 100644 host/include/ppc64/host/cpuinfo.h create mode 100644 util/cpuinfo-ppc.c diff --git a/host/include/ppc/host/cpuinfo.h b/host/include/ppc/host/cpuinfo.h new file mode 100644 index 00..7ec252ef52 --- /dev/null +++ b/host/include/ppc/host/cpuinfo.h @@ -0,0 +1,29 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Host specific cpu indentification for ppc. + */ + +#ifndef HOST_CPUINFO_H +#define HOST_CPUINFO_H + +/* Digested version of */ + +#define CPUINFO_ALWAYS (1u << 0) /* so cpuinfo is nonzero */ +#define CPUINFO_V2_06 (1u << 1) +#define CPUINFO_V2_07 (1u << 2) +#define CPUINFO_V3_00 (1u << 3) +#define CPUINFO_V3_10 (1u << 4) Could we define as CPUINFO_V3_1 ... +#define CPUINFO_ISEL(1u << 5) +#define CPUINFO_ALTIVEC (1u << 6) +#define CPUINFO_VSX (1u << 7) -#define have_isa_2_06 (have_isa >= tcg_isa_2_06) -#define have_isa_2_07 (have_isa >= tcg_isa_2_07) -#define have_isa_3_00 (have_isa >= tcg_isa_3_00) -#define have_isa_3_10 (have_isa >= tcg_isa_3_10) +#define have_isa_2_06 (cpuinfo & CPUINFO_V2_06) +#define have_isa_2_07 (cpuinfo & CPUINFO_V2_07) +#define have_isa_3_00 (cpuinfo & CPUINFO_V3_00) +#define have_isa_3_10 (cpuinfo & CPUINFO_V3_10) ... and have_isa_3_1 instead? Otherwise, Reviewed-by: Philippe Mathieu-Daudé
Re: [PATCH v2 02/38] util: Add cpuinfo-ppc.c
On 6/8/23 23:23, Richard Henderson wrote:
Move the code from tcg/. Fix a bug in that PPC_FEATURE2_ARCH_3_10
is actually spelled PPC_FEATURE2_ARCH_3_1.
Signed-off-by: Richard Henderson
---
Reviewed-by: Daniel Henrique Barboza
host/include/ppc/host/cpuinfo.h | 29
host/include/ppc64/host/cpuinfo.h | 1 +
tcg/ppc/tcg-target.h | 16 -
util/cpuinfo-ppc.c| 57 +++
tcg/ppc/tcg-target.c.inc | 44 +---
util/meson.build | 2 ++
6 files changed, 98 insertions(+), 51 deletions(-)
create mode 100644 host/include/ppc/host/cpuinfo.h
create mode 100644 host/include/ppc64/host/cpuinfo.h
create mode 100644 util/cpuinfo-ppc.c
diff --git a/host/include/ppc/host/cpuinfo.h b/host/include/ppc/host/cpuinfo.h
new file mode 100644
index 00..7ec252ef52
--- /dev/null
+++ b/host/include/ppc/host/cpuinfo.h
@@ -0,0 +1,29 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ * Host specific cpu indentification for ppc.
+ */
+
+#ifndef HOST_CPUINFO_H
+#define HOST_CPUINFO_H
+
+/* Digested version of */
+
+#define CPUINFO_ALWAYS (1u << 0) /* so cpuinfo is nonzero */
+#define CPUINFO_V2_06 (1u << 1)
+#define CPUINFO_V2_07 (1u << 2)
+#define CPUINFO_V3_00 (1u << 3)
+#define CPUINFO_V3_10 (1u << 4)
+#define CPUINFO_ISEL(1u << 5)
+#define CPUINFO_ALTIVEC (1u << 6)
+#define CPUINFO_VSX (1u << 7)
+
+/* Initialized with a constructor. */
+extern unsigned cpuinfo;
+
+/*
+ * We cannot rely on constructor ordering, so other constructors must
+ * use the function interface rather than the variable above.
+ */
+unsigned cpuinfo_init(void);
+
+#endif /* HOST_CPUINFO_H */
diff --git a/host/include/ppc64/host/cpuinfo.h
b/host/include/ppc64/host/cpuinfo.h
new file mode 100644
index 00..2f036a0627
--- /dev/null
+++ b/host/include/ppc64/host/cpuinfo.h
@@ -0,0 +1 @@
+#include "host/include/ppc/host/cpuinfo.h"
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index c7552b6391..b632a5a647 100644
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -25,6 +25,8 @@
#ifndef PPC_TCG_TARGET_H
#define PPC_TCG_TARGET_H
+#include "host/cpuinfo.h"
+
#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1)
#define TCG_TARGET_NB_REGS 64
@@ -61,14 +63,12 @@ typedef enum {
tcg_isa_3_10,
} TCGPowerISA;
-extern TCGPowerISA have_isa;
-extern bool have_altivec;
-extern bool have_vsx;
-
-#define have_isa_2_06 (have_isa >= tcg_isa_2_06)
-#define have_isa_2_07 (have_isa >= tcg_isa_2_07)
-#define have_isa_3_00 (have_isa >= tcg_isa_3_00)
-#define have_isa_3_10 (have_isa >= tcg_isa_3_10)
+#define have_isa_2_06 (cpuinfo & CPUINFO_V2_06)
+#define have_isa_2_07 (cpuinfo & CPUINFO_V2_07)
+#define have_isa_3_00 (cpuinfo & CPUINFO_V3_00)
+#define have_isa_3_10 (cpuinfo & CPUINFO_V3_10)
+#define have_altivec (cpuinfo & CPUINFO_ALTIVEC)
+#define have_vsx (cpuinfo & CPUINFO_VSX)
/* optional instructions automatically implemented */
#define TCG_TARGET_HAS_ext8u_i320 /* andi */
diff --git a/util/cpuinfo-ppc.c b/util/cpuinfo-ppc.c
new file mode 100644
index 00..ee761de33a
--- /dev/null
+++ b/util/cpuinfo-ppc.c
@@ -0,0 +1,57 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ * Host specific cpu indentification for ppc.
+ */
+
+#include "qemu/osdep.h"
+#include "host/cpuinfo.h"
+
+#ifdef CONFIG_GETAUXVAL
+# include
+#else
+# include
+# include "elf.h"
+#endif
+
+unsigned cpuinfo;
+
+/* Called both as constructor and (possibly) via other constructors. */
+unsigned __attribute__((constructor)) cpuinfo_init(void)
+{
+unsigned info = cpuinfo;
+unsigned long hwcap, hwcap2;
+
+if (info) {
+return info;
+}
+
+hwcap = qemu_getauxval(AT_HWCAP);
+hwcap2 = qemu_getauxval(AT_HWCAP2);
+info = CPUINFO_ALWAYS;
+
+if (hwcap & PPC_FEATURE_ARCH_2_06) {
+info |= CPUINFO_V2_06;
+}
+if (hwcap2 & PPC_FEATURE2_ARCH_2_07) {
+info |= CPUINFO_V2_07;
+}
+if (hwcap2 & PPC_FEATURE2_ARCH_3_00) {
+info |= CPUINFO_V3_00;
+}
+if (hwcap2 & PPC_FEATURE2_ARCH_3_1) {
+info |= CPUINFO_V3_10;
+}
+if (hwcap2 & PPC_FEATURE2_HAS_ISEL) {
+info |= CPUINFO_ISEL;
+}
+if (hwcap & PPC_FEATURE_HAS_ALTIVEC) {
+info |= CPUINFO_ALTIVEC;
+/* We only care about the portion of VSX that overlaps Altivec. */
+if (hwcap & PPC_FEATURE_HAS_VSX) {
+info |= CPUINFO_VSX;
+}
+}
+
+cpuinfo = info;
+return info;
+}
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 5c8378f8f6..c866f2c997 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -101,10 +101,7 @@
#define ALL_GENERAL_REGS 0xu
#define ALL_VECTOR_REGS 0xull
-TCGPowerISA have_isa;
-static bool have_isel;
-bool have_altivec;
-bool
[PATCH v2 02/38] util: Add cpuinfo-ppc.c
Move the code from tcg/. Fix a bug in that PPC_FEATURE2_ARCH_3_10
is actually spelled PPC_FEATURE2_ARCH_3_1.
Signed-off-by: Richard Henderson
---
host/include/ppc/host/cpuinfo.h | 29
host/include/ppc64/host/cpuinfo.h | 1 +
tcg/ppc/tcg-target.h | 16 -
util/cpuinfo-ppc.c| 57 +++
tcg/ppc/tcg-target.c.inc | 44 +---
util/meson.build | 2 ++
6 files changed, 98 insertions(+), 51 deletions(-)
create mode 100644 host/include/ppc/host/cpuinfo.h
create mode 100644 host/include/ppc64/host/cpuinfo.h
create mode 100644 util/cpuinfo-ppc.c
diff --git a/host/include/ppc/host/cpuinfo.h b/host/include/ppc/host/cpuinfo.h
new file mode 100644
index 00..7ec252ef52
--- /dev/null
+++ b/host/include/ppc/host/cpuinfo.h
@@ -0,0 +1,29 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ * Host specific cpu indentification for ppc.
+ */
+
+#ifndef HOST_CPUINFO_H
+#define HOST_CPUINFO_H
+
+/* Digested version of */
+
+#define CPUINFO_ALWAYS (1u << 0) /* so cpuinfo is nonzero */
+#define CPUINFO_V2_06 (1u << 1)
+#define CPUINFO_V2_07 (1u << 2)
+#define CPUINFO_V3_00 (1u << 3)
+#define CPUINFO_V3_10 (1u << 4)
+#define CPUINFO_ISEL(1u << 5)
+#define CPUINFO_ALTIVEC (1u << 6)
+#define CPUINFO_VSX (1u << 7)
+
+/* Initialized with a constructor. */
+extern unsigned cpuinfo;
+
+/*
+ * We cannot rely on constructor ordering, so other constructors must
+ * use the function interface rather than the variable above.
+ */
+unsigned cpuinfo_init(void);
+
+#endif /* HOST_CPUINFO_H */
diff --git a/host/include/ppc64/host/cpuinfo.h
b/host/include/ppc64/host/cpuinfo.h
new file mode 100644
index 00..2f036a0627
--- /dev/null
+++ b/host/include/ppc64/host/cpuinfo.h
@@ -0,0 +1 @@
+#include "host/include/ppc/host/cpuinfo.h"
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index c7552b6391..b632a5a647 100644
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -25,6 +25,8 @@
#ifndef PPC_TCG_TARGET_H
#define PPC_TCG_TARGET_H
+#include "host/cpuinfo.h"
+
#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1)
#define TCG_TARGET_NB_REGS 64
@@ -61,14 +63,12 @@ typedef enum {
tcg_isa_3_10,
} TCGPowerISA;
-extern TCGPowerISA have_isa;
-extern bool have_altivec;
-extern bool have_vsx;
-
-#define have_isa_2_06 (have_isa >= tcg_isa_2_06)
-#define have_isa_2_07 (have_isa >= tcg_isa_2_07)
-#define have_isa_3_00 (have_isa >= tcg_isa_3_00)
-#define have_isa_3_10 (have_isa >= tcg_isa_3_10)
+#define have_isa_2_06 (cpuinfo & CPUINFO_V2_06)
+#define have_isa_2_07 (cpuinfo & CPUINFO_V2_07)
+#define have_isa_3_00 (cpuinfo & CPUINFO_V3_00)
+#define have_isa_3_10 (cpuinfo & CPUINFO_V3_10)
+#define have_altivec (cpuinfo & CPUINFO_ALTIVEC)
+#define have_vsx (cpuinfo & CPUINFO_VSX)
/* optional instructions automatically implemented */
#define TCG_TARGET_HAS_ext8u_i320 /* andi */
diff --git a/util/cpuinfo-ppc.c b/util/cpuinfo-ppc.c
new file mode 100644
index 00..ee761de33a
--- /dev/null
+++ b/util/cpuinfo-ppc.c
@@ -0,0 +1,57 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ * Host specific cpu indentification for ppc.
+ */
+
+#include "qemu/osdep.h"
+#include "host/cpuinfo.h"
+
+#ifdef CONFIG_GETAUXVAL
+# include
+#else
+# include
+# include "elf.h"
+#endif
+
+unsigned cpuinfo;
+
+/* Called both as constructor and (possibly) via other constructors. */
+unsigned __attribute__((constructor)) cpuinfo_init(void)
+{
+unsigned info = cpuinfo;
+unsigned long hwcap, hwcap2;
+
+if (info) {
+return info;
+}
+
+hwcap = qemu_getauxval(AT_HWCAP);
+hwcap2 = qemu_getauxval(AT_HWCAP2);
+info = CPUINFO_ALWAYS;
+
+if (hwcap & PPC_FEATURE_ARCH_2_06) {
+info |= CPUINFO_V2_06;
+}
+if (hwcap2 & PPC_FEATURE2_ARCH_2_07) {
+info |= CPUINFO_V2_07;
+}
+if (hwcap2 & PPC_FEATURE2_ARCH_3_00) {
+info |= CPUINFO_V3_00;
+}
+if (hwcap2 & PPC_FEATURE2_ARCH_3_1) {
+info |= CPUINFO_V3_10;
+}
+if (hwcap2 & PPC_FEATURE2_HAS_ISEL) {
+info |= CPUINFO_ISEL;
+}
+if (hwcap & PPC_FEATURE_HAS_ALTIVEC) {
+info |= CPUINFO_ALTIVEC;
+/* We only care about the portion of VSX that overlaps Altivec. */
+if (hwcap & PPC_FEATURE_HAS_VSX) {
+info |= CPUINFO_VSX;
+}
+}
+
+cpuinfo = info;
+return info;
+}
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 5c8378f8f6..c866f2c997 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -101,10 +101,7 @@
#define ALL_GENERAL_REGS 0xu
#define ALL_VECTOR_REGS 0xull
-TCGPowerISA have_isa;
-static bool have_isel;
-bool have_altivec;
-bool have_vsx;
+#define have_isel (cpuinfo & CPUINFO_ISEL)
#ifndef CONFIG_SOFTMMU
#define TCG_GUEST_BASE_REG 30
@@ -387
