Re: [PATCH v2 07/12] mos6522: add register names to register read/write trace events
On 5/3/22 15:17, Mark Cave-Ayland wrote:
On 24/02/2022 14:04, Philippe Mathieu-Daudé wrote:
On 24/2/22 12:59, Mark Cave-Ayland wrote:
This helps to follow how the guest is programming the mos6522 when
debugging.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Peter Maydell
---
hw/misc/mos6522.c | 10 --
hw/misc/trace-events | 4 ++--
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index 093cc83dcf..aaae195d63 100644
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -36,6 +36,12 @@
#include "qemu/module.h"
#include "trace.h"
I'd feel safer adding:
#define MOS6522_IOSIZE 0x10
+static const char *mos6522_reg_names[16] = {
Then here:
... mos6522_reg_names[MOS6522_IOSIZE] ...
+ "ORB", "ORA", "DDRB", "DDRA", "T1CL", "T1CH", "T1LL", "T1LH",
+ "T2CL", "T2CH", "SR", "ACR", "PCR", "IFR", "IER", "ANH"
+};
+
/* XXX: implement all timer modes */
static void mos6522_timer1_update(MOS6522State *s, MOS6522Timer *ti,
@@ -310,7 +316,7 @@ uint64_t mos6522_read(void *opaque, hwaddr addr,
unsigned size)
}
if (addr != VIA_REG_IFR || val != 0) {
- trace_mos6522_read(addr, val);
+ trace_mos6522_read(addr, mos6522_reg_names[addr], val);
}
And finally:
-- >8 --
@@ -478,7 +478,8 @@ static void mos6522_init(Object *obj)
MOS6522State *s = MOS6522(obj);
int i;
- memory_region_init_io(&s->mem, obj, &mos6522_ops, s, "mos6522",
0x10);
+ memory_region_init_io(&s->mem, obj, &mos6522_ops, s, "mos6522",
+ MOS6522_IOSIZE);
sysbus_init_mmio(sbd, &s->mem);
sysbus_init_irq(sbd, &s->irq);
---
Regardless:
Reviewed-by: Philippe Mathieu-Daudé
I've done this in v3 but using MOS6522_NUM_REGS rather than
MOS6522_IOSIZE since IO size != number of registers at a higher level
(e.g. where the 6522 registers are mapped in CUDA/mac_via with a stride).
OK, thanks. R-b stands for v3.
Re: [PATCH v2 07/12] mos6522: add register names to register read/write trace events
On 24/02/2022 14:04, Philippe Mathieu-Daudé wrote:
On 24/2/22 12:59, Mark Cave-Ayland wrote:
This helps to follow how the guest is programming the mos6522 when debugging.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Peter Maydell
---
hw/misc/mos6522.c | 10 --
hw/misc/trace-events | 4 ++--
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index 093cc83dcf..aaae195d63 100644
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -36,6 +36,12 @@
#include "qemu/module.h"
#include "trace.h"
I'd feel safer adding:
#define MOS6522_IOSIZE 0x10
+static const char *mos6522_reg_names[16] = {
Then here:
... mos6522_reg_names[MOS6522_IOSIZE] ...
+ "ORB", "ORA", "DDRB", "DDRA", "T1CL", "T1CH", "T1LL", "T1LH",
+ "T2CL", "T2CH", "SR", "ACR", "PCR", "IFR", "IER", "ANH"
+};
+
/* XXX: implement all timer modes */
static void mos6522_timer1_update(MOS6522State *s, MOS6522Timer *ti,
@@ -310,7 +316,7 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned
size)
}
if (addr != VIA_REG_IFR || val != 0) {
- trace_mos6522_read(addr, val);
+ trace_mos6522_read(addr, mos6522_reg_names[addr], val);
}
And finally:
-- >8 --
@@ -478,7 +478,8 @@ static void mos6522_init(Object *obj)
MOS6522State *s = MOS6522(obj);
int i;
- memory_region_init_io(&s->mem, obj, &mos6522_ops, s, "mos6522", 0x10);
+ memory_region_init_io(&s->mem, obj, &mos6522_ops, s, "mos6522",
+ MOS6522_IOSIZE);
sysbus_init_mmio(sbd, &s->mem);
sysbus_init_irq(sbd, &s->irq);
---
Regardless:
Reviewed-by: Philippe Mathieu-Daudé
I've done this in v3 but using MOS6522_NUM_REGS rather than MOS6522_IOSIZE since IO
size != number of registers at a higher level (e.g. where the 6522 registers are
mapped in CUDA/mac_via with a stride).
ATB,
Mark.
Re: [PATCH v2 07/12] mos6522: add register names to register read/write trace events
Le 24/02/2022 à 12:59, Mark Cave-Ayland a écrit : This helps to follow how the guest is programming the mos6522 when debugging. Signed-off-by: Mark Cave-Ayland Reviewed-by: Peter Maydell --- hw/misc/mos6522.c| 10 -- hw/misc/trace-events | 4 ++-- 2 files changed, 10 insertions(+), 4 deletions(-) With changes proposed by Philippe: Reviewed-by: Laurent Vivier
Re: [PATCH v2 07/12] mos6522: add register names to register read/write trace events
On 24/2/22 12:59, Mark Cave-Ayland wrote:
This helps to follow how the guest is programming the mos6522 when debugging.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Peter Maydell
---
hw/misc/mos6522.c| 10 --
hw/misc/trace-events | 4 ++--
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index 093cc83dcf..aaae195d63 100644
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -36,6 +36,12 @@
#include "qemu/module.h"
#include "trace.h"
I'd feel safer adding:
#define MOS6522_IOSIZE 0x10
+static const char *mos6522_reg_names[16] = {
Then here:
... mos6522_reg_names[MOS6522_IOSIZE] ...
+"ORB", "ORA", "DDRB", "DDRA", "T1CL", "T1CH", "T1LL", "T1LH",
+"T2CL", "T2CH", "SR", "ACR", "PCR", "IFR", "IER", "ANH"
+};
+
/* XXX: implement all timer modes */
static void mos6522_timer1_update(MOS6522State *s, MOS6522Timer *ti,
@@ -310,7 +316,7 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned
size)
}
if (addr != VIA_REG_IFR || val != 0) {
-trace_mos6522_read(addr, val);
+trace_mos6522_read(addr, mos6522_reg_names[addr], val);
}
And finally:
-- >8 --
@@ -478,7 +478,8 @@ static void mos6522_init(Object *obj)
MOS6522State *s = MOS6522(obj);
int i;
-memory_region_init_io(&s->mem, obj, &mos6522_ops, s, "mos6522", 0x10);
+memory_region_init_io(&s->mem, obj, &mos6522_ops, s, "mos6522",
+ MOS6522_IOSIZE);
sysbus_init_mmio(sbd, &s->mem);
sysbus_init_irq(sbd, &s->irq);
---
Regardless:
Reviewed-by: Philippe Mathieu-Daudé
[PATCH v2 07/12] mos6522: add register names to register read/write trace events
This helps to follow how the guest is programming the mos6522 when debugging.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Peter Maydell
---
hw/misc/mos6522.c| 10 --
hw/misc/trace-events | 4 ++--
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index 093cc83dcf..aaae195d63 100644
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -36,6 +36,12 @@
#include "qemu/module.h"
#include "trace.h"
+
+static const char *mos6522_reg_names[16] = {
+"ORB", "ORA", "DDRB", "DDRA", "T1CL", "T1CH", "T1LL", "T1LH",
+"T2CL", "T2CH", "SR", "ACR", "PCR", "IFR", "IER", "ANH"
+};
+
/* XXX: implement all timer modes */
static void mos6522_timer1_update(MOS6522State *s, MOS6522Timer *ti,
@@ -310,7 +316,7 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned
size)
}
if (addr != VIA_REG_IFR || val != 0) {
-trace_mos6522_read(addr, val);
+trace_mos6522_read(addr, mos6522_reg_names[addr], val);
}
return val;
@@ -321,7 +327,7 @@ void mos6522_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
MOS6522State *s = opaque;
MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
-trace_mos6522_write(addr, val);
+trace_mos6522_write(addr, mos6522_reg_names[addr], val);
switch (addr) {
case VIA_REG_B:
diff --git a/hw/misc/trace-events b/hw/misc/trace-events
index 1c373dd0a4..c1ea57de31 100644
--- a/hw/misc/trace-events
+++ b/hw/misc/trace-events
@@ -95,8 +95,8 @@ imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08"
PRIx64 "value 0x%08
mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d
counter=0x%"PRId64 " delta_next=0x%"PRId64
mos6522_set_sr_int(void) "set sr_int"
-mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64
-mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x"
+mos6522_write(uint64_t addr, const char *name, uint64_t val) "reg=0x%"PRIx64 "
[%s] val=0x%"PRIx64
+mos6522_read(uint64_t addr, const char *name, unsigned val) "reg=0x%"PRIx64 "
[%s] val=0x%x"
# npcm7xx_clk.c
npcm7xx_clk_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 "
value: 0x%08" PRIx32
--
2.20.1
